diff options
Diffstat (limited to 'recipes-devtools/qemu/qemu-zynqmp-mainline/0010-char-cadence_uart-Split-state-struct-and-type-into-h.patch')
-rw-r--r-- | recipes-devtools/qemu/qemu-zynqmp-mainline/0010-char-cadence_uart-Split-state-struct-and-type-into-h.patch | 115 |
1 files changed, 0 insertions, 115 deletions
diff --git a/recipes-devtools/qemu/qemu-zynqmp-mainline/0010-char-cadence_uart-Split-state-struct-and-type-into-h.patch b/recipes-devtools/qemu/qemu-zynqmp-mainline/0010-char-cadence_uart-Split-state-struct-and-type-into-h.patch deleted file mode 100644 index e56aed88..00000000 --- a/recipes-devtools/qemu/qemu-zynqmp-mainline/0010-char-cadence_uart-Split-state-struct-and-type-into-h.patch +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | From f50fc4d6e1ee32e47f0f9cd6b8b98aa754ced588 Mon Sep 17 00:00:00 2001 | ||
2 | From: Peter Crosthwaite <peter.crosthwaite@xilinx.com> | ||
3 | Date: Mon, 23 Mar 2015 04:05:16 -0700 | ||
4 | Subject: [PATCH 10/15] char: cadence_uart: Split state struct and type into | ||
5 | header | ||
6 | |||
7 | To allow using the device with modern SoC programming conventions. The | ||
8 | state struct needs to be visible to embed the device in SoC containers. | ||
9 | |||
10 | Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> | ||
11 | Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> | ||
12 | --- | ||
13 | hw/char/cadence_uart.c | 29 +---------------------------- | ||
14 | include/hw/char/cadence_uart.h | 35 +++++++++++++++++++++++++++++++++++ | ||
15 | 2 files changed, 36 insertions(+), 28 deletions(-) | ||
16 | create mode 100644 include/hw/char/cadence_uart.h | ||
17 | |||
18 | diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c | ||
19 | index 4a4d3eb..9d379e5 100644 | ||
20 | --- a/hw/char/cadence_uart.c | ||
21 | +++ b/hw/char/cadence_uart.c | ||
22 | @@ -16,9 +16,7 @@ | ||
23 | * with this program; if not, see <http://www.gnu.org/licenses/>. | ||
24 | */ | ||
25 | |||
26 | -#include "hw/sysbus.h" | ||
27 | -#include "sysemu/char.h" | ||
28 | -#include "qemu/timer.h" | ||
29 | +#include "hw/char/cadence_uart.h" | ||
30 | |||
31 | #ifdef CADENCE_UART_ERR_DEBUG | ||
32 | #define DB_PRINT(...) do { \ | ||
33 | @@ -85,8 +83,6 @@ | ||
34 | #define LOCAL_LOOPBACK (0x2 << UART_MR_CHMODE_SH) | ||
35 | #define REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SH) | ||
36 | |||
37 | -#define CADENCE_UART_RX_FIFO_SIZE 16 | ||
38 | -#define CADENCE_UART_TX_FIFO_SIZE 16 | ||
39 | #define UART_INPUT_CLK 50000000 | ||
40 | |||
41 | #define R_CR (0x00/4) | ||
42 | @@ -108,29 +104,6 @@ | ||
43 | #define R_PWID (0x40/4) | ||
44 | #define R_TTRIG (0x44/4) | ||
45 | |||
46 | -#define CADENCE_UART_R_MAX (0x48/4) | ||
47 | - | ||
48 | -#define TYPE_CADENCE_UART "cadence_uart" | ||
49 | -#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ | ||
50 | - TYPE_CADENCE_UART) | ||
51 | - | ||
52 | -typedef struct { | ||
53 | - /*< private >*/ | ||
54 | - SysBusDevice parent_obj; | ||
55 | - /*< public >*/ | ||
56 | - | ||
57 | - MemoryRegion iomem; | ||
58 | - uint32_t r[CADENCE_UART_R_MAX]; | ||
59 | - uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; | ||
60 | - uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; | ||
61 | - uint32_t rx_wpos; | ||
62 | - uint32_t rx_count; | ||
63 | - uint32_t tx_count; | ||
64 | - uint64_t char_tx_time; | ||
65 | - CharDriverState *chr; | ||
66 | - qemu_irq irq; | ||
67 | - QEMUTimer *fifo_trigger_handle; | ||
68 | -} CadenceUARTState; | ||
69 | |||
70 | static void uart_update_status(CadenceUARTState *s) | ||
71 | { | ||
72 | diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h | ||
73 | new file mode 100644 | ||
74 | index 0000000..3456d4c | ||
75 | --- /dev/null | ||
76 | +++ b/include/hw/char/cadence_uart.h | ||
77 | @@ -0,0 +1,35 @@ | ||
78 | +#ifndef CADENCE_UART_H_ | ||
79 | + | ||
80 | +#include "hw/sysbus.h" | ||
81 | +#include "sysemu/char.h" | ||
82 | +#include "qemu/timer.h" | ||
83 | + | ||
84 | +#define CADENCE_UART_RX_FIFO_SIZE 16 | ||
85 | +#define CADENCE_UART_TX_FIFO_SIZE 16 | ||
86 | + | ||
87 | +#define CADENCE_UART_R_MAX (0x48/4) | ||
88 | + | ||
89 | +#define TYPE_CADENCE_UART "cadence_uart" | ||
90 | +#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ | ||
91 | + TYPE_CADENCE_UART) | ||
92 | + | ||
93 | +typedef struct { | ||
94 | + /*< private >*/ | ||
95 | + SysBusDevice parent_obj; | ||
96 | + | ||
97 | + /*< public >*/ | ||
98 | + MemoryRegion iomem; | ||
99 | + uint32_t r[CADENCE_UART_R_MAX]; | ||
100 | + uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; | ||
101 | + uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; | ||
102 | + uint32_t rx_wpos; | ||
103 | + uint32_t rx_count; | ||
104 | + uint32_t tx_count; | ||
105 | + uint64_t char_tx_time; | ||
106 | + CharDriverState *chr; | ||
107 | + qemu_irq irq; | ||
108 | + QEMUTimer *fifo_trigger_handle; | ||
109 | +} CadenceUARTState; | ||
110 | + | ||
111 | +#define CADENCE_UART_H_ | ||
112 | +#endif | ||
113 | -- | ||
114 | 1.7.10.4 | ||
115 | |||