diff options
Diffstat (limited to 'recipes-devtools/qemu/qemu-zynqmp-mainline/0008-arm-xilinx-zynqmp-Add-GEM-support.patch')
-rw-r--r-- | recipes-devtools/qemu/qemu-zynqmp-mainline/0008-arm-xilinx-zynqmp-Add-GEM-support.patch | 107 |
1 files changed, 0 insertions, 107 deletions
diff --git a/recipes-devtools/qemu/qemu-zynqmp-mainline/0008-arm-xilinx-zynqmp-Add-GEM-support.patch b/recipes-devtools/qemu/qemu-zynqmp-mainline/0008-arm-xilinx-zynqmp-Add-GEM-support.patch deleted file mode 100644 index 9441f609..00000000 --- a/recipes-devtools/qemu/qemu-zynqmp-mainline/0008-arm-xilinx-zynqmp-Add-GEM-support.patch +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | From 5f3d79a3b5ede9d2da63dded227f7cdf44e7d476 Mon Sep 17 00:00:00 2001 | ||
2 | From: Peter Crosthwaite <peter.crosthwaite@xilinx.com> | ||
3 | Date: Wed, 18 Feb 2015 18:56:37 -0800 | ||
4 | Subject: [PATCH 08/15] arm: xilinx-zynqmp: Add GEM support | ||
5 | |||
6 | There are 4x Cadence GEMs in ZynqMP. Add them. | ||
7 | |||
8 | Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> | ||
9 | --- | ||
10 | hw/arm/xlnx-zynqmp.c | 32 ++++++++++++++++++++++++++++++++ | ||
11 | include/hw/arm/xlnx-zynqmp.h | 3 +++ | ||
12 | 2 files changed, 35 insertions(+) | ||
13 | |||
14 | diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c | ||
15 | index 29954f5..d8c648d 100644 | ||
16 | --- a/hw/arm/xlnx-zynqmp.c | ||
17 | +++ b/hw/arm/xlnx-zynqmp.c | ||
18 | @@ -25,6 +25,14 @@ | ||
19 | #define GIC_DIST_ADDR 0xf9010000 | ||
20 | #define GIC_CPU_ADDR 0xf9020000 | ||
21 | |||
22 | +static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = { | ||
23 | + 0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000, | ||
24 | +}; | ||
25 | + | ||
26 | +static const int gem_intr[XLNX_ZYNQMP_NUM_GEMS] = { | ||
27 | + 57, 59, 61, 63, | ||
28 | +}; | ||
29 | + | ||
30 | static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index) | ||
31 | { | ||
32 | return GIC_NUM_SPI_INTR + cpu_nr * 32 + ppi_index; | ||
33 | @@ -44,6 +52,11 @@ static void xlnx_zynqmp_init(Object *obj) | ||
34 | |||
35 | object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); | ||
36 | qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); | ||
37 | + | ||
38 | + for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { | ||
39 | + object_initialize(&s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM); | ||
40 | + qdev_set_parent_bus(DEVICE(&s->gem[i]), sysbus_get_default()); | ||
41 | + } | ||
42 | } | ||
43 | |||
44 | #define ERR_PROP_CHECK_RETURN(err, errp) do { \ | ||
45 | @@ -57,6 +70,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) | ||
46 | { | ||
47 | XlnxZynqMPState *s = XLNX_ZYNQMP(dev); | ||
48 | uint8_t i; | ||
49 | + qemu_irq gic_spi[GIC_NUM_SPI_INTR]; | ||
50 | Error *err = NULL; | ||
51 | |||
52 | qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32); | ||
53 | @@ -82,6 +96,24 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) | ||
54 | arm_gic_ppi_index(i, ARM_VIRT_TIMER_PPI)); | ||
55 | qdev_connect_gpio_out(DEVICE(&s->cpu[i]), 1, irq); | ||
56 | } | ||
57 | + | ||
58 | + for (i = 0; i < GIC_NUM_SPI_INTR; i++) { | ||
59 | + gic_spi[i] = qdev_get_gpio_in(DEVICE(&s->gic), i); | ||
60 | + } | ||
61 | + | ||
62 | + for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { | ||
63 | + NICInfo *nd = &nd_table[i]; | ||
64 | + | ||
65 | + if (nd->used) { | ||
66 | + qemu_check_nic_model(nd, TYPE_CADENCE_GEM); | ||
67 | + qdev_set_nic_properties(DEVICE(&s->gem[i]), nd); | ||
68 | + } | ||
69 | + object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); | ||
70 | + ERR_PROP_CHECK_RETURN(err, errp); | ||
71 | + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]); | ||
72 | + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0, | ||
73 | + gic_spi[gem_intr[i]]); | ||
74 | + } | ||
75 | } | ||
76 | |||
77 | static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data) | ||
78 | diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h | ||
79 | index d29c7de..12a1be1 100644 | ||
80 | --- a/include/hw/arm/xlnx-zynqmp.h | ||
81 | +++ b/include/hw/arm/xlnx-zynqmp.h | ||
82 | @@ -3,12 +3,14 @@ | ||
83 | #include "qemu-common.h" | ||
84 | #include "hw/arm/arm.h" | ||
85 | #include "hw/intc/arm_gic.h" | ||
86 | +#include "hw/net/cadence_gem.h" | ||
87 | |||
88 | #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" | ||
89 | #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ | ||
90 | TYPE_XLNX_ZYNQMP) | ||
91 | |||
92 | #define XLNX_ZYNQMP_NUM_CPUS 4 | ||
93 | +#define XLNX_ZYNQMP_NUM_GEMS 4 | ||
94 | |||
95 | typedef struct XlnxZynqMPState { | ||
96 | /*< private >*/ | ||
97 | @@ -17,6 +19,7 @@ typedef struct XlnxZynqMPState { | ||
98 | |||
99 | ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS]; | ||
100 | GICState gic; | ||
101 | + CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; | ||
102 | } XlnxZynqMPState; | ||
103 | |||
104 | #define XLNX_ZYNQMP_H_ | ||
105 | -- | ||
106 | 1.7.10.4 | ||
107 | |||