diff options
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch')
-rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch new file mode 100644 index 00000000..ca1a2b9f --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch | |||
@@ -0,0 +1,107 @@ | |||
1 | From bb65903ab6293a47d154764a585f6c53b5fcf853 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Fri, 23 Aug 2019 16:16:53 +0530 | ||
4 | Subject: [PATCH 62/63] Added new MB-64 single register arithmetic instructions | ||
5 | |||
6 | --- | ||
7 | gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++++++++++ | ||
8 | 1 file changed, 56 insertions(+) | ||
9 | |||
10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
11 | index 3e7c647..4d40cc5 100644 | ||
12 | --- a/gcc/config/microblaze/microblaze.md | ||
13 | +++ b/gcc/config/microblaze/microblaze.md | ||
14 | @@ -654,6 +654,18 @@ | ||
15 | } | ||
16 | }) | ||
17 | |||
18 | +(define_insn "adddi3_int" | ||
19 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
20 | + (plus:DI (match_operand:DI 1 "register_operand" "%0") | ||
21 | + (match_operand:DI 2 "immediate_operand" "I")))] | ||
22 | + "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" | ||
23 | + "@ | ||
24 | + addlik\t%0,%2" | ||
25 | + [(set_attr "type" "darith") | ||
26 | + (set_attr "mode" "DI") | ||
27 | + (set_attr "length" "4")] | ||
28 | +) | ||
29 | + | ||
30 | (define_insn "*adddi3_long" | ||
31 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
32 | (plus:DI (match_operand:DI 1 "register_operand" "%d,d") | ||
33 | @@ -719,6 +731,18 @@ | ||
34 | { | ||
35 | }") | ||
36 | |||
37 | +(define_insn "subdi316imm" | ||
38 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
39 | + (minus:DI (match_operand:DI 1 "register_operand" "d") | ||
40 | + (match_operand:DI 2 "arith_operand" "K")))] | ||
41 | + "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767) && (REGNO (operands[0]) == REGNO (operands[1]))" | ||
42 | + "@ | ||
43 | + addlik\t%0,-%2" | ||
44 | + [(set_attr "type" "darith") | ||
45 | + (set_attr "mode" "DI") | ||
46 | + (set_attr "length" "4")]) | ||
47 | + | ||
48 | + | ||
49 | (define_insn "subsidi3" | ||
50 | [(set (match_operand:DI 0 "register_operand" "=d,d,d") | ||
51 | (minus:DI (match_operand:DI 1 "register_operand" "d,d,d") | ||
52 | @@ -1015,6 +1039,17 @@ | ||
53 | ;; Logical | ||
54 | ;;---------------------------------------------------------------- | ||
55 | |||
56 | +(define_insn "anddi3imm16" | ||
57 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
58 | + (and:DI (match_operand:DI 1 "arith_operand" "%0") | ||
59 | + (match_operand:DI 2 "arith_operand" "K")))] | ||
60 | + "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" | ||
61 | + "@ | ||
62 | + andli\t%0,%2" | ||
63 | + [(set_attr "type" "darith") | ||
64 | + (set_attr "mode" "DI") | ||
65 | + (set_attr "length" "4")]) | ||
66 | + | ||
67 | (define_insn "anddi3" | ||
68 | [(set (match_operand:DI 0 "register_operand" "=d,d,d") | ||
69 | (and:DI (match_operand:DI 1 "arith_operand" "d,d,d") | ||
70 | @@ -1042,6 +1077,16 @@ | ||
71 | (set_attr "mode" "SI,SI,SI,SI") | ||
72 | (set_attr "length" "4,8,8,8")]) | ||
73 | |||
74 | +(define_insn "iordi3imm16" | ||
75 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
76 | + (ior:DI (match_operand:DI 1 "arith_operand" "%0") | ||
77 | + (match_operand:DI 2 "arith_operand" "K")))] | ||
78 | + "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" | ||
79 | + "@ | ||
80 | + orli\t%0,%2" | ||
81 | + [(set_attr "type" "darith") | ||
82 | + (set_attr "mode" "DI") | ||
83 | + (set_attr "length" "4")]) | ||
84 | |||
85 | (define_insn "iordi3" | ||
86 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
87 | @@ -1069,6 +1114,17 @@ | ||
88 | (set_attr "mode" "SI,SI,SI,SI") | ||
89 | (set_attr "length" "4,8,8,8")]) | ||
90 | |||
91 | +(define_insn "xordi3imm16" | ||
92 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
93 | + (xor:DI (match_operand:DI 1 "arith_operand" "%0") | ||
94 | + (match_operand:DI 2 "arith_operand" "K")))] | ||
95 | + "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" | ||
96 | + "@ | ||
97 | + xorli\t%0,%2" | ||
98 | + [(set_attr "type" "darith") | ||
99 | + (set_attr "mode" "DI") | ||
100 | + (set_attr "length" "4")]) | ||
101 | + | ||
102 | (define_insn "xordi3" | ||
103 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
104 | (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") | ||
105 | -- | ||
106 | 2.7.4 | ||
107 | |||