55 files changed, 1489 insertions, 2540 deletions

diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
new file mode 100644
index 00000000..9671968a
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
@@ -0,0 +1,40 @@
+From 501b60af6b36fc69987e1610645742f5593a6da2 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 6 Aug 2020 15:37:52 -0500
+Subject: [PATCH 01/40] sim: Allow microblaze* architecture
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ sim/configure     | 2 +-
+ sim/configure.tgt | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sim/configure b/sim/configure
+index 72f95cd5c7a..9e28cc78687 100755
+--- a/sim/configure
++++ b/sim/configure
+@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
+ 
+ 
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+ 
+   sim_arch=microblaze
+   subdirs="$subdirs microblaze"
+diff --git a/sim/configure.tgt b/sim/configure.tgt
+index 8a8e03d96f4..f6743fe8d41 100644
+--- a/sim/configure.tgt
++++ b/sim/configure.tgt
+@@ -59,7 +59,7 @@ case "${target}" in
+    mcore-*-*)
+        SIM_ARCH(mcore)
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+        SIM_ARCH(microblaze)
+        ;;
+    mips*-*-*)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index e0de79fd..039bfc96 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From 247ead894f7079a4ededf2b48a65ffa6e78e2222 Mon Sep 17 00:00:00 2001
+From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
 
 Added two new instructions, wdc.ext.clear and wdc.ext.flush,
 to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 62ee3c9a4d..865151f95b 100644
+index 27d8684df04..b6c5016e4d2 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@ index 62ee3c9a4d..865151f95b 100644
    {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
    {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5a2d3b0c8b..42f3dd3be5 100644
+index aa53dfe6bb5..795c57b5ff6 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
index 98e40c0e..2d4d65e4 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
@@ -1,7 +1,7 @@
-From 7163824e07ade3ad2dc24e888265d27e0bc87869 Mon Sep 17 00:00:00 2001
+From d2a03159f8643b1c6a2db5d95c478540cc6ca6c4 Mon Sep 17 00:00:00 2001
 From: nagaraju <nmekala@xilix.com>
 Date: Tue, 19 Mar 2013 17:18:23 +0530
-Subject: [PATCH 02/43] Add mlittle-endian and mbig-endian flags
+Subject: [PATCH 03/40] Add mlittle-endian and mbig-endian flags
 
 Added support in gas for mlittle-endian and mbig-endian flags
 as options.
@@ -16,7 +16,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ab90c6b20f..c92e9ce563 100644
+index ae5d36dc9c3..34eeb972357 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -37,6 +37,8 @@
@@ -28,7 +28,7 @@ index ab90c6b20f..c92e9ce563 100644
  
  void microblaze_generate_symbol (char *sym);
  static bfd_boolean check_spl_reg (unsigned *);
-@@ -1845,6 +1847,8 @@ struct option md_longopts[] =
+@@ -1842,6 +1844,8 @@ struct option md_longopts[] =
  {
    {"EB", no_argument, NULL, OPTION_EB},
    {"EL", no_argument, NULL, OPTION_EL},
@@ -37,7 +37,7 @@ index ab90c6b20f..c92e9ce563 100644
    { NULL,          no_argument, NULL, 0}
  };
  
-@@ -2498,9 +2502,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2494,9 +2498,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
    switch (c)
      {
      case OPTION_EB:
@@ -49,7 +49,7 @@ index ab90c6b20f..c92e9ce563 100644
        target_big_endian = 0;
        break;
      default:
-@@ -2515,6 +2521,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -2511,6 +2517,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
    /*  fprintf(stream, _("\
        MicroBlaze options:\n\
        -noSmall         Data in the comm and data sections do not go into the small data section\n")); */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
index 445f5dd8..f7b9c7b0 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,7 +1,7 @@
-From 2b9eec7fdfae66c5500baef444559976d1b20e0b Mon Sep 17 00:00:00 2001
+From a8d621e5ab335e6e61de0f081036b4705071fb74 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 03/43] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index a13e81ebb8..1824ba6e5b 100644
+index 7a129b00f8d..d5e4a5c062d 100644
 --- a/bfd/elf-eh-frame.c
 +++ b/bfd/elf-eh-frame.c
 @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
@@ -24,8 +24,8 @@ index a13e81ebb8..1824ba6e5b 100644
       abfd, sec);
 +}
    hdr_info->u.dwarf.table = FALSE;
-   if (sec_info)
-     free (sec_info);
+   free (sec_info);
+  success:
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
index d1b754c3..14a4f329 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
@@ -1,18 +1,18 @@
-From ababe1df64146c616455eb1af4cf8fd21eb6f42c Mon Sep 17 00:00:00 2001
+From c4ce6cb47613293e02837fc00c2c2ebfcdd596f6 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 04/43] Fix relaxation of assembler resolved references
+Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
 
 ---
- bfd/elf32-microblaze.c     | 38 ++++++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c     | 41 ++++++++++++++++++++++++++++++++++++++
  gas/config/tc-microblaze.c |  1 +
- 2 files changed, 39 insertions(+)
+ 2 files changed, 42 insertions(+)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index e3c8027248..359484dd5e 100644
+index 693fc71f730..09dedc46106 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1969,6 +1969,47 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
@@ -45,9 +45,12 @@ index e3c8027248..359484dd5e 100644
 +                          elf_section_data (o)->this_hdr.contents = ocontents;
 +                        }
 +                    }
-+                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+                                                    + isym->st_value, sec);
 +                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++                  if (val != irelscan->r_addend) {
++                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++                  }
++                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                                                    + isym->st_value, 0, sec);
 +                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
 +                                                     irelscan->r_addend);
 +              }
@@ -58,10 +61,10 @@ index e3c8027248..359484dd5e 100644
                 {
                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c92e9ce563..3e728400b7 100644
+index 34eeb972357..d01653aeef9 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -2205,6 +2205,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2201,6 +2201,7 @@ md_apply_fix (fixS *   fixP,
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
index ac13e6e3..308a453e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
@@ -1,10 +1,12 @@
-From e9837b5aec42b084c93868095b409f9a6a81b570 Mon Sep 17 00:00:00 2001
+From 77c9dd2085e5a9e116cd8d8b4fbc1387c93d26d8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 05/43] [LOCAL]: Fixup debug_loc sections after linker
- relaxation Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing reloc
- info from the assembler to the linker when the linker manages to fully
- resolve a local symbol reference.
+Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
+ relaxation
+
+Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
+reloc info from the assembler to the linker when the linker
+manages to fully resolve a local symbol reference.
 
 This is a workaround for design flaws in the assembler to
 linker interface with regards to linker relaxation.
@@ -12,46 +14,39 @@ linker interface with regards to linker relaxation.
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
 ---
- bfd/bfd-in2.h              |  9 +++++--
- bfd/elf32-microblaze.c     | 53 ++++++++++++++++++++++++++++----------
+ bfd/bfd-in2.h              |  5 +++++
+ bfd/elf32-microblaze.c     | 39 +++++++++++++++++++++++++++++++-------
  bfd/libbfd.h               |  1 +
- bfd/reloc.c                |  6 +++++
- binutils/readelf.c         |  4 +++
- gas/config/tc-microblaze.c |  5 +++-
- include/elf/microblaze.h   |  2 ++
- 7 files changed, 64 insertions(+), 16 deletions(-)
+ bfd/reloc.c                |  6 ++++++
+ binutils/readelf.c         |  4 ++++
+ gas/config/tc-microblaze.c |  3 +++
+ include/elf/microblaze.h   |  1 +
+ 7 files changed, 52 insertions(+), 7 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index e25da50aaf..721531886a 100644
+index 35ef4d755bb..3fdbf8ed755 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5866,10 +5866,15 @@ value relative to the read-write small data area anchor  */
+@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor  */
  expressions of the form "Symbol Op Symbol"  */
    BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
  
--/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 32 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
--  BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
 +  BFD_RELOC_MICROBLAZE_32_NONE,
 +
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
- 
  /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 359484dd5e..1c69c269c7 100644
+index 09dedc46106..1be1ead2f41 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
           FALSE),               /* PC relative offset?  */
  
--   /* This reloc does nothing. Used for relaxation.  */
 +   HOWTO (R_MICROBLAZE_32_NONE,   /* Type.  */
 +          0,         /* Rightshift.  */
 +          2,            /* Size (0 = byte, 1 = short, 2 = long).  */
@@ -66,10 +61,9 @@ index 359484dd5e..1c69c269c7 100644
 +          0,         /* Dest Mask.  */
 +          FALSE),       /* PC relative offset?  */
 +
-+   /* This reloc does nothing.  Used for relaxation.  */
+    /* This reloc does nothing. Used for relaxation.  */
     HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
           0,                    /* Rightshift.  */
-          3,                    /* Size (0 = byte, 1 = short, 2 = long).  */
 @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
      case BFD_RELOC_NONE:
        microblaze_reloc = R_MICROBLAZE_NONE;
@@ -80,7 +74,7 @@ index 359484dd5e..1c69c269c7 100644
      case BFD_RELOC_MICROBLAZE_64_NONE:
        microblaze_reloc = R_MICROBLAZE_64_NONE;
        break;
-@@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1914,14 +1931,22 @@ microblaze_elf_relax_section (bfd *abfd,
                 }
               break;
             case R_MICROBLAZE_NONE:
@@ -88,7 +82,9 @@ index 359484dd5e..1c69c269c7 100644
               {
                 /* This was a PC-relative instruction that was
                    completely resolved.  */
-@@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd,
+                int sfix, efix;
++               unsigned int val;
+                bfd_vma target_address;
                 target_address = irel->r_addend + irel->r_offset;
                 sfix = calc_fixup (irel->r_offset, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
@@ -101,20 +97,12 @@ index 359484dd5e..1c69c269c7 100644
                 irel->r_addend -= (efix - sfix);
                 /* Should use HOWTO.  */
                 microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-                                                   irel->r_addend);
--             }
--             break;
-+               }
-+               break;
-            case R_MICROBLAZE_64_NONE:
-              {
-                /* This was a PC-relative 64-bit instruction that was
-@@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1969,12 +1994,16 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
 -              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+             if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
                  {
                    unsigned int val;
  
@@ -127,22 +115,12 @@ index 359484dd5e..1c69c269c7 100644
                    /* This was a PC-relative instruction that was completely resolved.  */
                    if (ocontents == NULL)
                      {
-@@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd,
-                                                          (file_ptr) 0,
-                                                          o->rawsize))
-                               goto error_return;
--                          elf_section_data (o)->this_hdr.contents = ocontents;
--                        }
--                    }
--                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
--                                                    + isym->st_value, sec);
-+                         elf_section_data (o)->this_hdr.contents = ocontents;
-+                       }
-+                   }
-                   val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
+@@ -2002,14 +2031,10 @@ microblaze_elf_relax_section (bfd *abfd,
+                   if (val != irelscan->r_addend) {
+                     fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
+                   }
+-                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
+-                                                    + isym->st_value, 0, sec);
 +                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
@@ -153,20 +131,20 @@ index 359484dd5e..1c69c269c7 100644
               if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
                 {
                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2069,7 +2094,7 @@ microblaze_elf_relax_section (bfd *abfd,
                               elf_section_data (o)->this_hdr.contents = ocontents;
                             }
                         }
 -                     irelscan->r_addend -= calc_fixup (irel->r_addend
-+              irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
                                                         + isym->st_value,
                                                         0,
                                                         sec);
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 36284d71a9..feb9fada1e 100644
+index b97534fc9fe..c1551b92405 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_ROSDA",
    "BFD_RELOC_MICROBLAZE_32_RWSDA",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
@@ -175,10 +153,10 @@ index 36284d71a9..feb9fada1e 100644
    "BFD_RELOC_MICROBLAZE_64_GOTPC",
    "BFD_RELOC_MICROBLAZE_64_GOT",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index e6446a7809..87753ae4f0 100644
+index 9aba84ca81e..9b39b419415 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6795,6 +6795,12 @@ ENUM
+@@ -6858,6 +6858,12 @@ ENUM
  ENUMDOC
    This is a 32 bit reloc for the microblaze to handle
    expressions of the form "Symbol Op Symbol"
@@ -192,10 +170,10 @@ index e6446a7809..87753ae4f0 100644
    BFD_RELOC_MICROBLAZE_64_NONE
  ENUMDOC
 diff --git a/binutils/readelf.c b/binutils/readelf.c
-index b13eb6a43b..da6252c128 100644
+index 6057515a89b..04704d22fef 100644
 --- a/binutils/readelf.c
 +++ b/binutils/readelf.c
-@@ -13019,6 +13019,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
+@@ -13406,6 +13406,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
               || reloc_type == 32 /* R_AVR_DIFF32.  */);
      case EM_METAG:
        return reloc_type == 3; /* R_METAG_NONE.  */
@@ -207,38 +185,35 @@ index b13eb6a43b..da6252c128 100644
        return (reloc_type == 0       /* R_XTENSA_NONE.  */
               || reloc_type == 204  /* R_NDS32_DIFF8.  */
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3e728400b7..fa665b4e25 100644
+index d01653aeef9..74a63abeb0c 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -2201,7 +2201,9 @@ md_apply_fix (fixS *   fixP,
-       /* This fixup has been resolved.  Create a reloc in case the linker
+@@ -2198,6 +2198,8 @@ md_apply_fix (fixS *   fixP,
          moves code around due to relaxing.  */
        if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
--       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
 +      else if (fixP->fx_r_type == BFD_RELOC_32)
-+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
++       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2426,6 +2428,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2422,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
    switch (fixp->fx_r_type)
      {
      case BFD_RELOC_NONE:
-+    case BFD_RELOC_MICROBLAZE_32_NONE: 
++    case BFD_RELOC_MICROBLAZE_32_NONE:
      case BFD_RELOC_MICROBLAZE_64_NONE:
      case BFD_RELOC_32:
      case BFD_RELOC_MICROBLAZE_32_LO:
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 830b5ad446..6ee0966444 100644
+index 2fec296967b..55f34f72b0d 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
-@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
    RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
 +  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
-+   
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
  /* Global base address names.  */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 97d692c7..4319f1d7 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From 403d6e82742452be4e3f3010c8d9989f0a490c0b Mon Sep 17 00:00:00 2001
+From 3f743710f53d86ed5e53d97b3b1b06d7a8cbcdc1 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 06/43] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
  regression
 
 Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -23,10 +23,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 deletion(-)
 
 diff --git a/bfd/elflink.c b/bfd/elflink.c
-index e50c0e4b38..09d43e3ca5 100644
+index 998b72f2281..2daf8fdf6a8 100644
 --- a/bfd/elflink.c
 +++ b/bfd/elflink.c
-@@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
+@@ -6372,7 +6372,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
  
        inf = (struct elf_gc_sweep_symbol_info *) data;
        (*inf->hide_symbol) (inf->info, h, TRUE);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
index 49534b4e..4ab7681e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 072a8968c50b2ebd93e225a6b959916f9d60b493 Mon Sep 17 00:00:00 2001
+From 481dd44f36e7df691037201d9865482debbb397d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 07/43] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
 
 Fixed the problem related to the fixup/relocations TLSTPREL.
 When the fixup is applied the addend is not added at the correct offset
@@ -13,10 +13,10 @@ big & little-endian compilers
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 1c69c269c7..d19a6dca84 100644
+index 1be1ead2f41..ec1944c6faf 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1447,9 +1447,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               relocation += addend;
               relocation -= dtprel_base(info);
               bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
index 51fcee90..c5bd3b2d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From 4674056da6bafa8168c0a680498b958f3a39be94 Mon Sep 17 00:00:00 2001
+From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 08/43] Added Address extension instructions
+Subject: [PATCH 09/40] Added Address extension instructions
 
 This patch adds the support of new instructions which are required
 for supporting Address extension feature.
@@ -13,17 +13,27 @@ ChangeLog:
 
   *microblaze-opc.h (op_code_struct): Update
      Added new instructions
+     Set MAX_OPCODES to matching value
   *microblaze-opcm.h (microblaze_instr): Update
      Added new instructions
 ---
- opcodes/microblaze-opc.h  | 11 +++++++++++
+ opcodes/microblaze-opc.h  | 13 ++++++++++++-
  opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 16 insertions(+), 5 deletions(-)
+ 2 files changed, 17 insertions(+), 6 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 865151f95b..330f1040e7 100644
+index b6c5016e4d2..c7a506b845a 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+ 
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+ 
+ struct op_code_struct
+ {
 @@ -178,8 +178,11 @@ struct op_code_struct
    {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
    {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -71,7 +81,7 @@ index 865151f95b..330f1040e7 100644
    {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
    {"", 0, 0, 0, 0, 0, 0, 0, 0},
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 42f3dd3be5..1c39dbf50b 100644
+index 795c57b5ff6..b05e319862e 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,13 +33,13 @@ enum microblaze_instr
@@ -90,7 +100,7 @@ index 42f3dd3be5..1c39dbf50b 100644
 -  shr, sw, swr, swx, lbui, lhui, lwi,
 +  bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
-   sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+   sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
 -- 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
deleted file mode 100644
index d93ccd20..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 7651a2f7ab486e26981cb5e032bf578d0951ff4a Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Thu, 28 Jan 2016 14:07:34 +0530
-Subject: [PATCH 09/43] fixing the MAX_OPCODES to correct value
-
----
- opcodes/microblaze-opc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 330f1040e7..2a6b841232 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
- 
- struct op_code_struct
- {
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
index 901c53e6..1612c11c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 7e9e123337f2d441b213ea9d0be07e9049241f64 Mon Sep 17 00:00:00 2001
+From 0034d6b5231a0a72c5f9fc47ba4c8eba0c35ff39 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/43] Add new bit-field instructions
+Subject: [PATCH 10/40] Add new bit-field instructions
 
 This patches adds new bsefi and bsifi instructions.
 BSEFI- The instruction shall extract a bit field from a
@@ -14,13 +14,13 @@ The rest of the bits in the destination register shall be unchanged
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   | 16 +++++++++
+ opcodes/microblaze-dis.c   | 17 +++++++++
  opcodes/microblaze-opc.h   | 12 ++++++-
  opcodes/microblaze-opcm.h  |  6 +++-
- 4 files changed, 102 insertions(+), 3 deletions(-)
+ 4 files changed, 103 insertions(+), 3 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index fa665b4e25..71bb888ab8 100644
+index 74a63abeb0c..765abfb3885 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -917,7 +917,7 @@ md_assemble (char * str)
@@ -110,41 +110,42 @@ index fa665b4e25..71bb888ab8 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f691740dfd..f8aaf27873 100644
+index be1534c257c..52c9068805f 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -73,6 +73,18 @@ get_field_imm5_mbar (long instr)
-   return(strdup(tmpstr));
+@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm5width (long instr)
++get_field_imm5width (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
 +  if (instr & 0x00004000)
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
 + else
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+  return (strdup (tmpstr));
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++  return p;
 +}
 +
  static char *
- get_field_rfsl (long instr)
+ get_field_rfsl (struct string_buf *buf, long instr)
  {
-@@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         /* For mbar 16 or sleep insn.  */
-         case INST_TYPE_NONE:
-           break;
+@@ -428,6 +440,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+        case INST_TYPE_NONE:
+          break;
+          /* For tuqula instruction */
 +        /* For bit field insns.  */
-+           case INST_TYPE_RD_R1_IMM5_IMM5:
-+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
-+            break;
-        /* For tuqula instruction */
++       case INST_TYPE_RD_R1_IMM5_IMM5:
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++         break;
++       /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
+          print_func (stream, "\t%s", get_field_rd (&buf, inst));
+          break;
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 2a6b841232..ce8ac351b5 100644
+index c7a506b845a..f61f4ef66d9 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -59,6 +59,9 @@
@@ -195,7 +196,7 @@ index 2a6b841232..ce8ac351b5 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 1c39dbf50b..28662694cd 100644
+index b05e319862e..fa921c90c98 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -29,7 +29,7 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
index 4c1b0c25..fcb9c8ae 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
@@ -1,18 +1,18 @@
-From 8b2e8fe916066bb1caa99abc67f8cde3ebd41c70 Mon Sep 17 00:00:00 2001
+From 75e55d8ebf3cd780fe69c066163ab2da7ac204f2 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/43] fixing the imm bug. with relax option imm -1 is also
- getting removed this is corrected now.
+Subject: [PATCH 11/40] fixing the imm bug.
 
+with relax option imm -1 is also getting removed this is corrected now.
 ---
  bfd/elf32-microblaze.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d19a6dca84..d001437b3f 100644
+index ec1944c6faf..cf4a7fdba33 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1865,8 +1865,7 @@ microblaze_elf_relax_section (bfd *abfd,
        else
         symval += irel->r_addend;
  
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
index ad4db430..02cc1259 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
@@ -1,7 +1,7 @@
-From 2a7b66bbc0473c6cbe6653a48818962b5b411ef2 Mon Sep 17 00:00:00 2001
+From 5432f81ba9d7c17b20ff576c7c09ae78f4fe6e9c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Fri, 29 Sep 2017 18:00:23 +0530
-Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will
+Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will
  support .long 0U and .long 0u
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/expr.c b/gas/expr.c
-index ee85bda1cc..b502418b71 100644
+index 6f8ccb82303..0e34ca53d9b 100644
 --- a/gas/expr.c
 +++ b/gas/expr.c
-@@ -810,6 +810,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
+@@ -803,6 +803,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
               break;
             }
         }
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
index 323b7bde..accff214 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
@@ -1,15 +1,15 @@
-From 59a9a1a913b7dfa424792c907001413c1ddd320c Mon Sep 17 00:00:00 2001
+From 6337e24a220dca86b71efcc10c5ffed6bf11bc22 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 16 Oct 2017 15:44:23 +0530
-Subject: [PATCH 13/43] fixing the constant range check issue sample error: not
- in range ffffffff80000000..7fffffff, not ffffffff70000000
+Subject: [PATCH 13/40] fixing the constant range check issue
 
+sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000
 ---
  gas/config/tc-microblaze.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 71bb888ab8..16b10d00a9 100644
+index 765abfb3885..5810a74a5fc 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
index 1a3e0130..cdbe65a6 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
@@ -1,7 +1,7 @@
-From 00b7561a868b08dab952b9b9f4a01118195aeb29 Mon Sep 17 00:00:00 2001
+From e7e06edfb6c24a993603c9100f8ab8c29999ef90 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 21 Feb 2018 12:32:02 +0530
-Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages
+Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages
  in more detail for mxl-gp-opt flag..
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages
  1 file changed, 12 insertions(+)
 
 diff --git a/ld/ldmain.c b/ld/ldmain.c
-index 77cdbd0dd2..517d85baef 100644
+index 08be9030cb5..613d748fefd 100644
 --- a/ld/ldmain.c
 +++ b/ld/ldmain.c
-@@ -1446,6 +1446,18 @@ reloc_overflow (struct bfd_link_info *info,
+@@ -1515,6 +1515,18 @@ reloc_overflow (struct bfd_link_info *info,
           break;
         case bfd_link_hash_defined:
         case bfd_link_hash_defweak:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
index d0f96eca..9f228015 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
@@ -1,7 +1,7 @@
-From 9aeae734291f8aaeb449c1403561b71de1ea3bea Mon Sep 17 00:00:00 2001
+From a7626e576d867c6c9c8321f00cf5e17dc31c52b8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/43] intial commit of MB 64-bit
+Subject: [PATCH 15/40] intial commit of MB 64-bit
 
 ---
  bfd/Makefile.am                    |    2 +
@@ -9,78 +9,79 @@ Subject: [PATCH 15/43] intial commit of MB 64-bit
  bfd/config.bfd                     |    4 +
  bfd/configure                      |    2 +
  bfd/configure.ac                   |    2 +
- bfd/cpu-microblaze.c               |   52 +-
- bfd/elf64-microblaze.c             | 3584 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c               |   55 +-
+ bfd/doc/Makefile.in                |    1 +
+ bfd/elf64-microblaze.c             | 3560 ++++++++++++++++++++++++++++
  bfd/targets.c                      |    6 +
  gas/config/tc-microblaze.c         |  274 ++-
  gas/config/tc-microblaze.h         |    4 +-
  include/elf/common.h               |    1 +
- ld/Makefile.am                     |    8 +
- ld/Makefile.in                     |   10 +
+ ld/Makefile.am                     |    4 +
+ ld/Makefile.in                     |    7 +
  ld/configure.tgt                   |    3 +
  ld/emulparams/elf64microblaze.sh   |   23 +
  ld/emulparams/elf64microblazeel.sh |   23 +
- opcodes/microblaze-dis.c           |   39 +-
+ opcodes/microblaze-dis.c           |   43 +-
  opcodes/microblaze-opc.h           |  162 +-
  opcodes/microblaze-opcm.h          |   20 +-
- 19 files changed, 4181 insertions(+), 41 deletions(-)
+ 20 files changed, 4156 insertions(+), 43 deletions(-)
  create mode 100644 bfd/elf64-microblaze.c
  create mode 100644 ld/emulparams/elf64microblaze.sh
  create mode 100644 ld/emulparams/elf64microblazeel.sh
 
 diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index a9191555ad..c5fd250812 100644
+index c88c4480001..9e12b34038c 100644
 --- a/bfd/Makefile.am
 +++ b/bfd/Makefile.am
-@@ -570,6 +570,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -552,6 +552,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -591,6 +592,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
 diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index 896df52042..fd457cba1e 100644
+index d0d14c6ab32..5c12b706616 100644
 --- a/bfd/Makefile.in
 +++ b/bfd/Makefile.in
-@@ -995,6 +995,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -978,6 +978,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -1017,6 +1018,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
-@@ -1494,6 +1496,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
+@@ -1495,6 +1497,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 0e1ddb659c..93d210643d 100644
+index 14523caf0c5..437c03bb9d9 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
-@@ -850,11 +850,15 @@ case "${targ}" in
+@@ -825,11 +825,15 @@ case "${targ}" in
    microblazeel*-*)
      targ_defvec=microblaze_elf32_le_vec
      targ_selvecs=microblaze_elf32_vec
@@ -97,36 +98,36 @@ index 0e1ddb659c..93d210643d 100644
  
  #ifdef BFD64
 diff --git a/bfd/configure b/bfd/configure
-index 04786696dc..d455abe7c5 100755
+index 5ab3e856bc2..982ecd254a8 100755
 --- a/bfd/configure
 +++ b/bfd/configure
-@@ -14847,6 +14847,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -14828,6 +14828,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/configure.ac b/bfd/configure.ac
-index eda38ea086..f01c3362fe 100644
+index 8e86f8399ce..38e80148171 100644
 --- a/bfd/configure.ac
 +++ b/bfd/configure.ac
-@@ -615,6 +615,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -564,6 +564,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 9bc2eb3de9..c91ba46f75 100644
+index 05a3f767e22..f94dc2c177b 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,24 @@
+@@ -23,7 +23,25 @@
  #include "bfd.h"
  #include "libbfd.h"
  
@@ -147,15 +148,16 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
  {
-   32,                          /* 32 bits in a word.  */
-   32,                          /* 32 bits in an address.  */
-@@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch =
-   bfd_default_scan,            /* String to architecture conversion.  */
+   32,                          /* Bits in a word.  */
+   32,                          /* Bits in an address.  */
+@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
    bfd_arch_default_fill,       /* Default fill.  */
-   NULL                         /* Next in list.  */
+   NULL,                                /* Next in list.  */
+   0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#else
 +{
@@ -171,7 +173,8 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
 +{
 +  64,                          /* 32 bits in a word.  */
@@ -186,16 +189,29 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  NULL                         /* Next in list.  */
++  NULL,                                /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#endif
  };
+diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
+index 2c1ddd45b8d..a976b24d0bf 100644
+--- a/bfd/doc/Makefile.in
++++ b/bfd/doc/Makefile.in
+@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
+ prefix = @prefix@
+ program_transform_name = @program_transform_name@
+ psdir = @psdir@
++runstatedir = @runstatedir@
+ sbindir = @sbindir@
+ sharedstatedir = @sharedstatedir@
+ srcdir = @srcdir@
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
 new file mode 100644
-index 0000000000..0f43ae6ea8
+index 00000000000..fa4b95e47e0
 --- /dev/null
 +++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3584 @@
+@@ -0,0 +1,3560 @@
 +/* Xilinx MicroBlaze-specific support for 32-bit ELF
 +
 +   Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -853,7 +869,7 @@ index 0000000000..0f43ae6ea8
 +
 +/* Set the howto pointer for a RCE ELF reloc.  */
 +
-+static void
++static bfd_boolean
 +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
 +                             arelent * cache_ptr,
 +                             Elf_Internal_Rela * dst)
@@ -867,13 +883,14 @@ index 0000000000..0f43ae6ea8
 +  r_type = ELF64_R_TYPE (dst->r_info);
 +  if (r_type >= R_MICROBLAZE_max)
 +    {
-+      (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"),
++      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
 +                            abfd, r_type);
 +      bfd_set_error (bfd_error_bad_value);
-+      r_type = R_MICROBLAZE_NONE;
++      return FALSE;
 +    }
 +
 +  cache_ptr->howto = microblaze_elf_howto_table [r_type];
++ return TRUE;
 +}
 +
 +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
@@ -1272,7 +1289,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata2") == 0
 +                       || strcmp (name, ".sbss2") == 0)
@@ -1301,7 +1318,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1317,7 +1334,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata") == 0
 +                       || strcmp (name, ".sbss") == 0)
@@ -1346,7 +1363,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1408,6 +1425,7 @@ index 0000000000..0f43ae6ea8
 +             goto dogot;
 +           case (int) R_MICROBLAZE_TLSLD:
 +             tls_type = (TLS_TLS | TLS_LD);
++              /* Fall through. */
 +           dogot:
 +           case (int) R_MICROBLAZE_GOT_64:
 +             {
@@ -1708,7 +1726,7 @@ index 0000000000..0f43ae6ea8
 +                         {
 +                           BFD_FAIL ();
 +                           (*_bfd_error_handler)
-+                             (_("%B: probably compiled without -fPIC?"),
++                             (_("%pB: probably compiled without -fPIC?"),
 +                              input_bfd);
 +                           bfd_set_error (bfd_error_bad_value);
 +                           return FALSE;
@@ -1762,7 +1780,7 @@ index 0000000000..0f43ae6ea8
 +             name = (bfd_elf_string_from_elf_section
 +                     (input_bfd, symtab_hdr->sh_link, sym->st_name));
 +             if (name == NULL || *name == '\0')
-+               name = bfd_section_name (input_bfd, sec);
++               name = bfd_section_name (sec);
 +           }
 +
 +         if (errmsg != NULL)
@@ -1807,21 +1825,6 @@ index 0000000000..0f43ae6ea8
 +  return ret;
 +}
 +
-+/* Merge backend specific data from an object file to the output
-+   object file when linking.
-+
-+   Note: We only use this hook to catch endian mismatches.  */
-+static bfd_boolean
-+microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
-+{
-+  /* Check if we have the same endianess.  */
-+  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
-+    return FALSE;
-+
-+  return TRUE;
-+}
-+
-+
 +/* Calculate fixup value for reference.  */
 +
 +static int
@@ -2138,7 +2141,7 @@ index 0000000000..0f43ae6ea8
 +          irelscanend = irelocs + o->reloc_count;
 +          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
 +            {
-+              if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
 +                {
 +                  unsigned int val;
 +
@@ -2497,17 +2500,6 @@ index 0000000000..0f43ae6ea8
 +  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
 +}
 +
-+/* Update the got entry reference counts for the section being removed.  */
-+
-+static bfd_boolean
-+microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
-+                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
-+                             asection * sec ATTRIBUTE_UNUSED,
-+                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
-+{
-+  return TRUE;
-+}
-+
 +/* PIC support.  */
 +
 +#define PLT_ENTRY_SIZE 16
@@ -2540,13 +2532,13 @@ index 0000000000..0f43ae6ea8
 +  if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL)
 +    htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got");
 +  if (htab->srelgot == NULL
-+      || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC
++      || ! bfd_set_section_flags (htab->srelgot, SEC_ALLOC
 +                                  | SEC_LOAD
 +                                  | SEC_HAS_CONTENTS
 +                                  | SEC_IN_MEMORY
 +                                  | SEC_LINKER_CREATED
 +                                  | SEC_READONLY)
-+      || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
++      || ! bfd_set_section_alignment (htab->srelgot, 2))
 +    return FALSE;
 +  return TRUE;
 +}
@@ -2627,7 +2619,7 @@ index 0000000000..0f43ae6ea8
 +
 +         /* PR15323, ref flags aren't set for references in the same
 +            object.  */
-+         h->root.non_ir_ref = 1;
++         h->root.non_ir_ref_regular = 1;
 +       }
 +
 +      switch (r_type)
@@ -2663,6 +2655,7 @@ index 0000000000..0f43ae6ea8
 +          tls_type |= (TLS_TLS | TLS_LD);
 +        dogottls:
 +          sec->has_tls_reloc = 1;
++          /* Fall through. */
 +        case R_MICROBLAZE_GOT_64:
 +          if (htab->sgot == NULL)
 +            {
@@ -2936,12 +2929,12 @@ index 0000000000..0f43ae6ea8
 +  /* If this is a weak symbol, and there is a real definition, the
 +     processor independent code will have arranged for us to see the
 +     real definition first, and we can just use the same value.  */
-+  if (h->u.weakdef != NULL)
++  if (h->is_weakalias)
 +    {
-+      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
-+                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
-+      h->root.u.def.section = h->u.weakdef->root.u.def.section;
-+      h->root.u.def.value = h->u.weakdef->root.u.def.value;
++      struct elf_link_hash_entry *def = weakdef (h);
++      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
++      h->root.u.def.section = def->root.u.def.section;
++      h->root.u.def.value = def->root.u.def.value;
 +      return TRUE;
 +    }
 +
@@ -3013,9 +3006,9 @@ index 0000000000..0f43ae6ea8
 +  sdynbss = htab->sdynbss;
 +  /* Apply the required alignment.  */
 +  sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss))
++  if (power_of_two > bfd_section_alignment (sdynbss))
 +    {
-+      if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two))
++      if (! bfd_set_section_alignment (sdynbss, power_of_two))
 +       return FALSE;
 +    }
 +
@@ -3362,7 +3355,7 @@ index 0000000000..0f43ae6ea8
 +
 +      /* It's OK to base decisions on the section name, because none
 +         of the dynobj section names depend upon the input files.  */
-+      name = bfd_get_section_name (dynobj, s);
++      name = bfd_section_name (s);
 +
 +      if (strncmp (name, ".rela", 5) == 0)
 +        {
@@ -3730,7 +3723,7 @@ index 0000000000..0f43ae6ea8
 +        put into .sbss.  */
 +      *secp = bfd_make_section_old_way (abfd, ".sbss");
 +      if (*secp == NULL
-+          || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON))
++          || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
 +        return FALSE;
 +
 +      *valp = sym->st_size;
@@ -3757,11 +3750,10 @@ index 0000000000..0f43ae6ea8
 +#define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
 +#define elf_backend_relocate_section           microblaze_elf_relocate_section
 +#define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
 +#define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
 +
 +#define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
-+#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
 +#define elf_backend_check_relocs                microblaze_elf_check_relocs
 +#define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
 +#define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
@@ -3781,10 +3773,10 @@ index 0000000000..0f43ae6ea8
 +
 +#include "elf64-target.h"
 diff --git a/bfd/targets.c b/bfd/targets.c
-index 158168cb3b..ef567a30c8 100644
+index 0732c5e4292..1ec226b2f47 100644
 --- a/bfd/targets.c
 +++ b/bfd/targets.c
-@@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec;
+@@ -782,6 +782,8 @@ extern const bfd_target mep_elf32_le_vec;
  extern const bfd_target metag_elf32_vec;
  extern const bfd_target microblaze_elf32_vec;
  extern const bfd_target microblaze_elf32_le_vec;
@@ -3793,7 +3785,7 @@ index 158168cb3b..ef567a30c8 100644
  extern const bfd_target mips_ecoff_be_vec;
  extern const bfd_target mips_ecoff_le_vec;
  extern const bfd_target mips_ecoff_bele_vec;
-@@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] =
+@@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] =
  
         &metag_elf32_vec,
  
@@ -3805,7 +3797,7 @@ index 158168cb3b..ef567a30c8 100644
  
         &mips_ecoff_be_vec,
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 16b10d00a9..c79434785a 100644
+index 5810a74a5fc..ffbb843d33e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -35,10 +35,13 @@
@@ -4153,7 +4145,7 @@ index 16b10d00a9..c79434785a 100644
  
      default:
        as_fatal (_("unimplemented opcode \"%s\""), name);
-@@ -1918,6 +2142,7 @@ struct option md_longopts[] =
+@@ -1915,6 +2139,7 @@ struct option md_longopts[] =
    {"EL", no_argument, NULL, OPTION_EL},
    {"mlittle-endian", no_argument, NULL, OPTION_LITTLE},
    {"mbig-endian", no_argument, NULL, OPTION_BIG},
@@ -4161,7 +4153,7 @@ index 16b10d00a9..c79434785a 100644
    { NULL,          no_argument, NULL, 0}
  };
  
-@@ -2569,6 +2794,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2565,6 +2790,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
    return rel;
  }
  
@@ -4180,7 +4172,7 @@ index 16b10d00a9..c79434785a 100644
  int
  md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
  {
-@@ -2582,6 +2819,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2578,6 +2815,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_LITTLE:
        target_big_endian = 0;
        break;
@@ -4191,7 +4183,7 @@ index 16b10d00a9..c79434785a 100644
      default:
        return 0;
      }
-@@ -2597,6 +2838,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -2593,6 +2834,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
    fprintf (stream, _(" MicroBlaze specific assembler options:\n"));
    fprintf (stream, "  -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu"));
    fprintf (stream, "  -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu"));
@@ -4200,7 +4192,7 @@ index 16b10d00a9..c79434785a 100644
  
  
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index ca9dbb861f..9d38d2ced5 100644
+index 01cb3e894f7..7435a70ef5e 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[];
@@ -4215,10 +4207,10 @@ index ca9dbb861f..9d38d2ced5 100644
  #define ELF_TC_SPECIAL_SECTIONS \
    { ".sdata",          SHT_PROGBITS,   SHF_ALLOC + SHF_WRITE }, \
 diff --git a/include/elf/common.h b/include/elf/common.h
-index 996acf9703..2f1e5be366 100644
+index 4d94c4fd5b3..f709a01816c 100644
 --- a/include/elf/common.h
 +++ b/include/elf/common.h
-@@ -339,6 +339,7 @@
+@@ -340,6 +340,7 @@
  #define EM_RISCV       243     /* RISC-V */
  #define EM_LANAI       244     /* Lanai 32-bit processor.  */
  #define EM_BPF         247     /* Linux BPF – in-kernel virtual machine.  */
@@ -4227,71 +4219,71 @@ index 996acf9703..2f1e5be366 100644
  #define EM_CSKY                252     /* C-SKY processor family.  */
  
 diff --git a/ld/Makefile.am b/ld/Makefile.am
-index c2c798b4fe..b272f537e4 100644
+index 02c4fc16395..d063e2d32c5 100644
 --- a/ld/Makefile.am
 +++ b/ld/Makefile.am
-@@ -422,6 +422,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -416,6 +416,8 @@ ALL_64_EMULATION_SOURCES = \
         eelf32ltsmipn32.c \
         eelf32ltsmipn32_fbsd.c \
         eelf32mipswindiss.c \
 +       eelf64microblazeel.c \
 +       eelf64microblaze.c \
         eelf64_aix.c \
+        eelf64bpf.c \
         eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -1702,6 +1704,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \
-   $(srcdir)/emulparams/elf_nacl.sh \
-   $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
-+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
-+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
- eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \
-   $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
+@@ -898,6 +900,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/Makefile.in b/ld/Makefile.in
-index fc687fc516..1a530ad729 100644
+index 2fe12e14f63..01ebb051faa 100644
 --- a/ld/Makefile.in
 +++ b/ld/Makefile.in
-@@ -907,6 +907,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -515,6 +515,7 @@ pdfdir = @pdfdir@
+ prefix = @prefix@
+ program_transform_name = @program_transform_name@
+ psdir = @psdir@
++runstatedir = @runstatedir@
+ sbindir = @sbindir@
+ sharedstatedir = @sharedstatedir@
+ srcdir = @srcdir@
+@@ -898,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \
         eelf32ltsmipn32.c \
         eelf32ltsmipn32_fbsd.c \
         eelf32mipswindiss.c \
 +       eelf64microblazeel.c \
 +       eelf64microblaze.c \
         eelf64_aix.c \
+        eelf64bpf.c \
         eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -1355,6 +1357,8 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16xs.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
+@@ -1360,6 +1363,8 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@
-@@ -3306,6 +3310,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \
-   $(srcdir)/emulparams/elf_nacl.sh \
-   $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
-+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
-+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
- eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \
-   $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc_fbsd.Po@am__quote@
+@@ -2493,6 +2498,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/configure.tgt b/ld/configure.tgt
-index beba17ef51..5109799f2b 100644
+index 87c7d9a4cad..801d27c9e3f 100644
 --- a/ld/configure.tgt
 +++ b/ld/configure.tgt
-@@ -423,6 +423,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
+@@ -469,6 +469,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
  microblazeel*)         targ_emul=elf32microblazeel
                         targ_extra_emuls=elf32microblaze
                         ;;
@@ -4303,7 +4295,7 @@ index beba17ef51..5109799f2b 100644
                         ;;
 diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
 new file mode 100644
-index 0000000000..9c7b0eb708
+index 00000000000..7b4c7c411bd
 --- /dev/null
 +++ b/ld/emulparams/elf64microblaze.sh
 @@ -0,0 +1,23 @@
@@ -4328,11 +4320,11 @@ index 0000000000..9c7b0eb708
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
 new file mode 100644
-index 0000000000..9c7b0eb708
+index 00000000000..7b4c7c411bd
 --- /dev/null
 +++ b/ld/emulparams/elf64microblazeel.sh
 @@ -0,0 +1,23 @@
@@ -4357,104 +4349,108 @@ index 0000000000..9c7b0eb708
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f8aaf27873..20ea6a885a 100644
+index 52c9068805f..a03f5b7a55b 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
 @@ -33,6 +33,7 @@
- #define get_field_r1(instr)        get_field (instr, RA_MASK, RA_LOW)
- #define get_field_r2(instr)        get_field (instr, RB_MASK, RB_LOW)
+ #define get_field_r1(buf, instr)   get_field (buf, instr, RA_MASK, RA_LOW)
+ #define get_field_r2(buf, instr)   get_field (buf, instr, RB_MASK, RB_LOW)
  #define get_int_field_imm(instr)   ((instr & IMM_MASK) >> IMM_LOW)
 +#define get_int_field_imml(instr)  ((instr & IMML_MASK) >> IMM_LOW)
  #define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
  
- 
-@@ -56,11 +57,20 @@ get_field_imm (long instr)
+ #define NUM_STRBUFS 3
+@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5 (long instr)
-+get_field_imml (long instr)
+-get_field_imm5 (struct string_buf *buf, long instr)
++get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  return p;
 +}
 +
 +static char *
-+get_field_imms (long instr)
++get_field_imms (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
+   return p;
  }
  
-@@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr)
+@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5width (long instr)
-+get_field_immw (long instr)
+-get_field_imm5width (struct string_buf *buf, long instr)
++get_field_immw (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
    if (instr & 0x00004000)
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
   else
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
-   return (strdup (tmpstr));
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
+   return p;
  }
  
-@@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+@@ -308,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
 -       case INST_TYPE_RD_R1_IMM5:
 +       case INST_TYPE_RD_R1_IMML:
-+         print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
-+                  get_field_r1(inst), get_field_imm (inst));
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+-                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
++                  get_field_r1(&buf, inst), get_field_imm (&buf, inst));
 +          /* TODO: Also print symbol */
++          break;
 +       case INST_TYPE_RD_R1_IMMS:
-          print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
--                  get_field_r1(inst), get_field_imm5 (inst));
-+                  get_field_r1(inst), get_field_imms (inst));
++         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++                  get_field_r1(&buf, inst), get_field_imms (&buf, inst));
           break;
         case INST_TYPE_RD_RFSL:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
-@@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+@@ -414,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
+-       case INST_TYPE_RD_R2:
+-         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+-                     get_field_r2 (&buf, inst));
 +        case INST_TYPE_IMML:
-+         print_func (stream, "\t%s", get_field_imml (inst));
++         print_func (stream, "\t%s", get_field_imml (&buf, inst));
 +          /* TODO: Also print symbol */
 +         break;
-         case INST_TYPE_RD_R2:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
++        case INST_TYPE_RD_R2:
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
+          break;
+        case INST_TYPE_R2:
+          print_func (stream, "\t%s", get_field_r2 (&buf, inst));
+@@ -441,8 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
           break;
-@@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         case INST_TYPE_NONE:
-           break;
+          /* For tuqula instruction */
          /* For bit field insns.  */
--           case INST_TYPE_RD_R1_IMM5_IMM5:
--          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
--            break;
+-       case INST_TYPE_RD_R1_IMM5_IMM5:
+-         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
 +       case INST_TYPE_RD_R1_IMMW_IMMS:
-+         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst),
-+                  get_field_immw (inst), get_field_imms (inst));
-+         break;
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
++                  get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+          break;
         /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index ce8ac351b5..985834b8df 100644
+index f61f4ef66d9..61eaa39b3eb 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -40,7 +40,7 @@
@@ -4682,7 +4678,7 @@ index ce8ac351b5..985834b8df 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 28662694cd..076dbcd0b3 100644
+index fa921c90c98..1dcd3dca3d1 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -25,6 +25,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
index 0c3da95a..06a8f70a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
@@ -1,32 +1,32 @@
-From bcd4263219c9756b9c1c1df64c6fef1311057fac Mon Sep 17 00:00:00 2001
+From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
 
 ---
  bfd/bfd-in2.h              |  10 +++
- bfd/elf32-microblaze.c     |  65 +++++++++++++++-
- bfd/elf64-microblaze.c     |  61 ++++++++++++++-
+ bfd/elf32-microblaze.c     |  63 +++++++++++++++++-
+ bfd/elf64-microblaze.c     |  59 +++++++++++++++++
  bfd/libbfd.h               |   2 +
- bfd/reloc.c                |  12 +++
- gas/config/tc-microblaze.c | 152 ++++++++++++++++++++++++++++++-------
+ bfd/reloc.c                |  12 ++++
+ gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++----------
  include/elf/microblaze.h   |   2 +
  opcodes/microblaze-opc.h   |   4 +-
  opcodes/microblaze-opcm.h  |   4 +-
- 9 files changed, 277 insertions(+), 35 deletions(-)
+ 9 files changed, 243 insertions(+), 40 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 721531886a..4f777059d8 100644
+index 3fdbf8ed755..c55092c9ec7 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5876,11 +5876,21 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64_NONE,
+@@ -5438,11 +5438,21 @@ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64_NONE,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64,
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
@@ -42,7 +42,7 @@ index 721531886a..4f777059d8 100644
  value in two words (with an imm instruction).  The relocation is
  GOT offset  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d001437b3f..035e71f311 100644
+index cf4a7fdba33..e1a66f57e79 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -68,7 +68,7 @@ index d001437b3f..035e71f311 100644
           0,                    /* Rightshift.  */
 @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
-          TRUE),                /* PC relative offset?  */
+          TRUE),                /* PC relative offset?  */
  
 +   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
 +   HOWTO (R_MICROBLAZE_GPC_64,         /* Type.  */
@@ -104,23 +104,14 @@ index d001437b3f..035e71f311 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -142,21 +133,21 @@ index d001437b3f..035e71f311 100644
             case R_MICROBLAZE_NONE:
             case R_MICROBLAZE_32_NONE:
               {
-@@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
 -             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
 -               {
 -                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
-+                {
++             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++               {
 +                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
  
                   /* Look at the reloc only if the value has been resolved.  */
                   if (isym->st_shndx == shndx
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 0f43ae6ea8..56a45f2a05 100644
+index fa4b95e47e0..d55700fc513 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -219,7 +210,7 @@ index 0f43ae6ea8..56a45f2a05 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               break; /* Do nothing.  */
  
             case (int) R_MICROBLAZE_GOTPC_64:
@@ -227,23 +218,14 @@ index 0f43ae6ea8..56a45f2a05 100644
               relocation = htab->sgotplt->output_section->vma
                 + htab->sgotplt->output_offset;
               relocation -= (input_section->output_section->vma
-@@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -266,10 +248,10 @@ index 0f43ae6ea8..56a45f2a05 100644
             case R_MICROBLAZE_32_NONE:
               {
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index feb9fada1e..450653f2d8 100644
+index c1551b92405..b4aace6a70d 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -280,10 +262,10 @@ index feb9fada1e..450653f2d8 100644
    "BFD_RELOC_MICROBLAZE_64_PLT",
    "BFD_RELOC_MICROBLAZE_64_GOTOFF",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 87753ae4f0..ccf29f54cf 100644
+index 9b39b419415..0e8a24e9cb0 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,12 +6803,24 @@ ENUMDOC
+@@ -6866,12 +6866,24 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -309,7 +291,7 @@ index 87753ae4f0..ccf29f54cf 100644
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c79434785a..3f90b7c892 100644
+index ffbb843d33e..b8250e4cded 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -320,16 +302,17 @@ index c79434785a..3f90b7c892 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -117,6 +118,8 @@ const relax_typeS md_relax_table[] =
+@@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] =
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+//  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
+-  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
++  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -339,7 +322,7 @@ index c79434785a..3f90b7c892 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"sbss", microblaze_s_bss, 1},
    {"text", microblaze_s_text, 0},
    {"word", cons, 4},
@@ -347,7 +330,7 @@ index c79434785a..3f90b7c892 100644
    {"frame", s_ignore, 0},
    {"mask", s_ignore, 0}, /* Emitted by gcc.  */
    {NULL, NULL, 0}
-@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len)
+@@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len)
  extern bfd_reloc_code_real_type
  parse_cons_expression_microblaze (expressionS *exp, int size)
  {
@@ -356,7 +339,7 @@ index c79434785a..3f90b7c892 100644
      {
        /* Handle @GOTOFF et.al.  */
        char *save, *gotfree_copy;
-@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
+@@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
  
  static const char * str_microblaze_ro_anchor = "RO";
  static const char * str_microblaze_rw_anchor = "RW";
@@ -364,41 +347,7 @@ index c79434785a..3f90b7c892 100644
  
  static bfd_boolean
  check_spl_reg (unsigned * reg)
-@@ -1174,6 +1180,33 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
-+#if 0 //revisit
-+      else if (streq (name, "lli") || streq (name, "sli"))
-+       {
-+          temp = immed & 0xFFFFFFFFFFFF8000;
-+          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
-+           {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+
-+              inst1 = opcode1->bit_sequence;
-+             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+           }
-+         inst |= (reg1 << RD_LOW) & RD_MASK;
-+         inst |= (reg2 << RA_LOW) & RA_MASK;
-+         inst |= (immed << IMM_LOW) & IMM_MASK;
-+        }
-+#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1926,6 +1959,7 @@ md_assemble (char * str)
+@@ -1926,6 +1931,7 @@ md_assemble (char * str)
        if (exp.X_op != O_constant)
         {
           char *opc = NULL;
@@ -406,7 +355,7 @@ index c79434785a..3f90b7c892 100644
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1939,7 +1973,7 @@ md_assemble (char * str)
+@@ -1939,7 +1945,7 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -415,7 +364,7 @@ index c79434785a..3f90b7c892 100644
           immedl = 0L;
          }
        else
-@@ -1977,7 +2011,7 @@ md_assemble (char * str)
+@@ -1977,7 +1983,7 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -424,17 +373,17 @@ index c79434785a..3f90b7c892 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1987,7 +2021,8 @@ md_assemble (char * str)
+@@ -1987,7 +1993,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -          char *opc = NULL;
 +         //char *opc = NULL;
-+          char *opc = str_microblaze_64;
++          char *opc = strdup(str_microblaze_64);
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2001,14 +2036,13 @@ md_assemble (char * str)
+@@ -2001,14 +2008,13 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -450,7 +399,7 @@ index c79434785a..3f90b7c892 100644
           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
           if (opcode1 == NULL)
             {
-@@ -2187,13 +2221,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -475,7 +424,7 @@ index c79434785a..3f90b7c892 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2416,22 +2460,38 @@ md_apply_fix (fixS *   fixP,
+@@ -2412,22 +2428,38 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_64_PCREL:
      case BFD_RELOC_64:
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
@@ -526,7 +475,7 @@ index c79434785a..3f90b7c892 100644
        buf[0] = INST_BYTE0 (inst1);
        buf[1] = INST_BYTE1 (inst1);
        buf[2] = INST_BYTE2 (inst1);
-@@ -2460,6 +2520,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2456,6 +2488,7 @@ md_apply_fix (fixS *   fixP,
        /* Fall through.  */
  
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -534,7 +483,7 @@ index c79434785a..3f90b7c892 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2467,12 +2528,16 @@ md_apply_fix (fixS *   fixP,
+@@ -2463,12 +2496,16 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -555,22 +504,27 @@ index c79434785a..3f90b7c892 100644
           return;
         }
  
-@@ -2496,6 +2561,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2490,7 +2527,7 @@ md_apply_fix (fixS *   fixP,
+     {
+       /* This fixup has been resolved.  Create a reloc in case the linker
          moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+-      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
 +      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2539,6 +2606,32 @@ md_estimate_size_before_relax (fragS * fragP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+@@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP,
            as_bad (_("Absolute PC-relative value in relaxation code.  Assembler error....."));
            abort ();
          }
+-      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+-               !S_IS_WEAK (fragP->fr_symbol))
 +      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
 +               && !S_IS_WEAK (fragP->fr_symbol))
-+        {
+         {
+-          fragP->fr_subtype = DEFINED_PC_OFFSET;
+-          /* Don't know now whether we need an imm instruction.  */
+-          fragP->fr_var = INST_WORD_SIZE;
 +           if (fragP->fr_opcode != NULL) {
 +            if(streq (fragP->fr_opcode, str_microblaze_64)) 
 +             {
@@ -592,20 +546,10 @@ index c79434785a..3f90b7c892 100644
 +              /* Don't know now whether we need an imm instruction.  */
 +               fragP->fr_var = INST_WORD_SIZE;
 +            }
-+        }
-+    #if 0
-       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
-                !S_IS_WEAK (fragP->fr_symbol))
-         {
-@@ -2546,6 +2639,7 @@ md_estimate_size_before_relax (fragS * fragP,
-           /* Don't know now whether we need an imm instruction.  */
-           fragP->fr_var = INST_WORD_SIZE;
          }
-+#endif
        else if (S_IS_DEFINED (fragP->fr_symbol)
                && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2648,6 +2742,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSLD_OFFSET:
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
@@ -613,16 +557,16 @@ index c79434785a..3f90b7c892 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2701,7 +2796,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
 -      if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2734,6 +2829,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_RWSDA:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -631,7 +575,7 @@ index c79434785a..3f90b7c892 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2876,7 +2973,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -644,7 +588,7 @@ index c79434785a..3f90b7c892 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 6ee0966444..16b2736577 100644
+index 55f34f72b0d..8576e55cb8a 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
 @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -653,11 +597,11 @@ index 6ee0966444..16b2736577 100644
    RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
 +  RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
 +  RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35)    /* GOT entry offset.  */
-    
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
+ /* Global base address names.  */
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 985834b8df..9b6264b61c 100644
+index 61eaa39b3eb..f2139a6839b 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -538,8 +538,8 @@ struct op_code_struct
@@ -672,7 +616,7 @@ index 985834b8df..9b6264b61c 100644
    {"dadd",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
    {"drsub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 076dbcd0b3..5f2e190d23 100644
+index 1dcd3dca3d1..ad8b8ce345b 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -40,8 +40,8 @@ enum microblaze_instr
@@ -680,9 +624,9 @@ index 076dbcd0b3..5f2e190d23 100644
    brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
    bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 -  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
--  sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+-  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+  sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
++  sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
    tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index a6428534..067d9266 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,15 +1,16 @@
-From 7f6533a7c442b8966f30bbe7f0e872b1ef6a0d3f Mon Sep 17 00:00:00 2001
+From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/43] [Patch,Microblaze] : negl instruction is overriding
- rsubl,fixed it by changing the instruction order...
+Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
+ rsubl
 
+fixed it by changing the instruction order...
 ---
  opcodes/microblaze-opc.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 9b6264b61c..824afc0ab0 100644
+index f2139a6839b..f9709412097 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -275,9 +275,7 @@ struct op_code_struct
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
index 99c5f62a..0ed01b79 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
@@ -1,48 +1,48 @@
-From 6d241a6865abf8196ba0cfa2aed7e847df087b6e Mon Sep 17 00:00:00 2001
+From 90d732c25cb6b55b33837e1d23d6850e4cbe10f7 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/43] Added relocations for MB-X
+Subject: [PATCH 18/40] Added relocations for MB-X
 
 ---
- bfd/bfd-in2.h              | 11 +++--
- bfd/libbfd.h               |  4 +-
- bfd/reloc.c                | 26 ++++++-----
- gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
- 4 files changed, 62 insertions(+), 69 deletions(-)
+ bfd/bfd-in2.h              | 11 +++++---
+ bfd/libbfd.h               |  4 +--
+ bfd/reloc.c                | 26 +++++++++---------
+ gas/config/tc-microblaze.c | 54 +++++++++++++++++++++++++++-----------
+ 4 files changed, 63 insertions(+), 32 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 4f777059d8..de46e78902 100644
+index c55092c9ec7..88f89bcdbcd 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5872,15 +5872,20 @@ done here - only used for relaxing  */
+@@ -5434,15 +5434,20 @@ done here - only used for relaxing  */
    BFD_RELOC_MICROBLAZE_32_NONE,
  
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-- *  +value in two words (with an imm instruction).  No relocation is
-+ *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
--    BFD_RELOC_MICROBLAZE_64_NONE,
-+    BFD_RELOC_MICROBLAZE_64_PCREL,
+-value in two words (with an imm instruction).  No relocation is
++value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+-  BFD_RELOC_MICROBLAZE_64_NONE,
++  BFD_RELOC_MICROBLAZE_64_PCREL,
  
 -/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 64 bit reloc that stores the 32 bit relative
-  *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64_NONE,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
  PC-relative GOT offset  */
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 450653f2d8..d87a183d5e 100644
+index b4aace6a70d..b4b7ee29a30 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2969,14 +2969,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -60,10 +60,10 @@ index 450653f2d8..d87a183d5e 100644
    "BFD_RELOC_MICROBLAZE_64_TLSGD",
    "BFD_RELOC_MICROBLAZE_64_TLSLD",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index ccf29f54cf..861f2d48c0 100644
+index 0e8a24e9cb0..b5c97da3ffd 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,24 +6803,12 @@ ENUMDOC
+@@ -6866,24 +6866,12 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -88,7 +88,7 @@ index ccf29f54cf..861f2d48c0 100644
  ENUMDOC
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
-@@ -6906,6 +6894,20 @@ ENUMDOC
+@@ -6969,6 +6957,20 @@ ENUMDOC
    value in two words (with an imm instruction).  The relocation is
    relative offset from start of TEXT.
  
@@ -110,7 +110,7 @@ index ccf29f54cf..861f2d48c0 100644
    BFD_RELOC_AARCH64_RELOC_START
  ENUMDOC
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3f90b7c892..587a4d56ec 100644
+index b8250e4cded..9c8b6284fb1 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -121,62 +121,28 @@ index 3f90b7c892..587a4d56ec 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] =
+@@ -118,7 +119,8 @@ const relax_typeS md_relax_table[] =
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
- //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
+-  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }  /* 20: DEFINED_64_PC_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -1180,33 +1182,6 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
--#if 0 //revisit
--      else if (streq (name, "lli") || streq (name, "sli"))
--       {
--          temp = immed & 0xFFFFFFFFFFFF8000;
--          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
--           {
--              /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
--              if (opcode1 == NULL)
--                {
--                  as_bad (_("unknown opcode \"%s\""), "imml");
--                  return;
--                }
--
--              inst1 = opcode1->bit_sequence;
--             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
--              output[0] = INST_BYTE0 (inst1);
--              output[1] = INST_BYTE1 (inst1);
--              output[2] = INST_BYTE2 (inst1);
--              output[3] = INST_BYTE3 (inst1);
--              output = frag_more (isize);
--           }
--         inst |= (reg1 << RD_LOW) & RD_MASK;
--         inst |= (reg2 << RA_LOW) & RA_MASK;
--         inst |= (immed << IMM_LOW) & IMM_MASK;
--        }
--#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1958,8 +1933,8 @@ md_assemble (char * str)
+@@ -1930,8 +1932,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -         char *opc = NULL;
 -         //char *opc = str_microblaze_64;
 +         //char *opc = NULL;
-+         char *opc = str_microblaze_64;
++         char *opc = strdup(str_microblaze_64);
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2221,13 +2196,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2190,13 +2192,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -198,7 +164,7 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2237,7 +2218,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2206,7 +2214,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
                  fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC);
        else
          fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
@@ -207,7 +173,7 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2457,14 +2438,17 @@ md_apply_fix (fixS *   fixP,
+@@ -2425,14 +2433,17 @@ md_apply_fix (fixS *   fixP,
             }
         }
        break;
@@ -226,7 +192,7 @@ index 3f90b7c892..587a4d56ec 100644
          {
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-@@ -2477,6 +2461,10 @@ md_apply_fix (fixS *   fixP,
+@@ -2445,6 +2456,10 @@ md_apply_fix (fixS *   fixP,
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
              inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
@@ -237,7 +203,7 @@ index 3f90b7c892..587a4d56ec 100644
           }
        else
          {
-@@ -2487,7 +2475,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2455,7 +2470,7 @@ md_apply_fix (fixS *   fixP,
               as_bad (_("unknown opcode \"%s\""), "imm");
               return;
             }
@@ -246,7 +212,7 @@ index 3f90b7c892..587a4d56ec 100644
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-@@ -2534,7 +2522,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2502,7 +2517,7 @@ md_apply_fix (fixS *   fixP,
          opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
        if (opcode1 == NULL)
         {
@@ -255,16 +221,16 @@ index 3f90b7c892..587a4d56ec 100644
             as_bad (_("unknown opcode \"%s\""), "imml");
            else
             as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -2561,8 +2549,6 @@ md_apply_fix (fixS *   fixP,
+@@ -2527,7 +2542,7 @@ md_apply_fix (fixS *   fixP,
+     {
+       /* This fixup has been resolved.  Create a reloc in case the linker
          moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
 -      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
--           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2613,33 +2599,24 @@ md_estimate_size_before_relax (fragS * fragP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+@@ -2579,21 +2594,21 @@ md_estimate_size_before_relax (fragS * fragP,
              if(streq (fragP->fr_opcode, str_microblaze_64)) 
               {
                 /* Used as an absolute value.  */
@@ -290,19 +256,7 @@ index 3f90b7c892..587a4d56ec 100644
                 fragP->fr_var = INST_WORD_SIZE;
              }
          }
--    #if 0
--      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
--               !S_IS_WEAK (fragP->fr_symbol))
--        {
--          fragP->fr_subtype = DEFINED_PC_OFFSET;
--          /* Don't know now whether we need an imm instruction.  */
--          fragP->fr_var = INST_WORD_SIZE;
--        }
--#endif
-       else if (S_IS_DEFINED (fragP->fr_symbol)
-               && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2669,6 +2646,13 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2626,6 +2641,13 @@ md_estimate_size_before_relax (fragS * fragP,
               /* Variable part does not change.  */
               fragP->fr_var = INST_WORD_SIZE*2;
             }
@@ -316,7 +270,7 @@ index 3f90b7c892..587a4d56ec 100644
           else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
             {
                /* It is accessed using the small data read only anchor.  */
-@@ -2743,6 +2727,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2700,6 +2722,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
      case DEFINED_64_OFFSET:
@@ -324,16 +278,16 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2796,7 +2781,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2753,7 +2776,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
--      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
+-      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2831,6 +2816,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2788,6 +2811,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
      case BFD_RELOC_MICROBLAZE_64:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
index edbfac0c..a621fb05 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
@@ -1,28 +1,29 @@
-From bb6c70cfa1402a685995103ac90e7ceeccdd0991 Mon Sep 17 00:00:00 2001
+From c3e194e231529c1b642f7f1a19a2a7b1ea644bd9 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/43] -Fixed MB-x relocation issues -Added imml for required
- MB-x instructions
+Subject: [PATCH 19/40] Update MB-x
 
+-Fixed MB-x relocation issues
+-Added imml for required MB-x instructions
 ---
- bfd/elf64-microblaze.c     |  68 ++++++++++++++---
- gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++----------
+ bfd/elf64-microblaze.c     |  68 ++++++++++--
+ gas/config/tc-microblaze.c | 221 +++++++++++++++++++++++++------------
  gas/tc.h                   |   2 +-
- 3 files changed, 167 insertions(+), 55 deletions(-)
+ 3 files changed, 209 insertions(+), 82 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 56a45f2a05..54a2461037 100644
+index d55700fc513..f8f52870639 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                           relocation -= (input_section->output_section->vma
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -33,7 +34,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
@@ -43,7 +44,7 @@ index 56a45f2a05..54a2461037 100644
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                         {
 +                           if (!input_section->output_section->vma &&
-+                                !input_section->output_offset && !offset)      
++                                !input_section->output_offset && !offset)
 +                             relocation -= (input_section->output_section->vma
 +                                            + input_section->output_offset
 +                                            + offset);
@@ -53,9 +54,9 @@ index 56a45f2a05..54a2461037 100644
 +                                            + offset + INST_WORD_SIZE);
 +                         }
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -66,7 +67,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1690,9 +1716,19 @@ static void
+@@ -1677,9 +1703,19 @@ static void
  microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -89,7 +90,7 @@ index 56a45f2a05..54a2461037 100644
  }
  
  /* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -113,10 +114,10 @@ index 56a45f2a05..54a2461037 100644
      instr_lo &= ~0x0000ffff;
      instr_lo |= (val & 0x0000ffff);
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 587a4d56ec..fa437b6c98 100644
+index 9c8b6284fb1..f61fdf3b90a 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -391,7 +391,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
     Integer arg to pass to the function.  */
  /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
     and then in the read.c table.  */
@@ -125,7 +126,7 @@ index 587a4d56ec..fa437b6c98 100644
  {
    {"lcomm", microblaze_s_lcomm, 1},
    {"data", microblaze_s_data, 0},
-@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -400,7 +400,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -134,7 +135,84 @@ index 587a4d56ec..fa437b6c98 100644
    {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
-@@ -996,7 +996,7 @@ md_assemble (char * str)
+@@ -538,30 +538,6 @@ parse_reg (char * s, unsigned * reg)
+       *reg = REG_SP;
+       return s + 3;
+     }
+-  else if (strncasecmp (s, "rfsl", 4) == 0)
+-    {
+-      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
+-        {
+-          tmpreg = (s[4] - '0') * 10 + s[5] - '0';
+-          s += 6;
+-        }
+-      else if (ISDIGIT (s[4]))
+-        {
+-          tmpreg = s[4] - '0';
+-          s += 5;
+-        }
+-      else
+-       as_bad (_("register expected, but saw '%.6s'"), s);
+-
+-      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
+-        *reg = tmpreg;
+-      else
+-       {
+-          as_bad (_("Invalid register number at '%.6s'"), s);
+-          *reg = 0;
+-       }
+-      return s;
+-    }
+   /* Stack protection registers.  */
+   else if (strncasecmp (s, "rshr", 4) == 0)
+     {
+@@ -605,6 +581,45 @@ parse_reg (char * s, unsigned * reg)
+   return s;
+ }
+ 
++/* Same as above, but with long(er) register */
++static char *
++parse_regl (char * s, unsigned long * reg)
++{
++  unsigned long tmpreg = 0;
++
++  /* Strip leading whitespace.  */
++  while (ISSPACE (* s))
++    ++ s;
++
++  if (strncasecmp (s, "rfsl", 4) == 0)
++    {
++      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
++       {
++         tmpreg = (s[4] - '0') * 10 + s[5] - '0';
++         s += 6;
++       }
++      else if (ISDIGIT (s[4]))
++       {
++         tmpreg = s[4] - '0';
++         s += 5;
++       }
++      else
++       as_bad (_("register expected, but saw '%.6s'"), s);
++
++      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
++       *reg = tmpreg;
++      else
++       {
++         as_bad (_("Invalid register number at '%.6s'"), s);
++         *reg = 0;
++       }
++      return s;
++    }
++  as_bad (_("register expected, but saw '%.6s'"), s);
++  *reg = 0;
++  return s;
++}
++
+ static char *
+ parse_exp (char *s, expressionS *e)
+ {
+@@ -995,7 +1010,7 @@ md_assemble (char * str)
    unsigned reg2;
    unsigned reg3;
    unsigned isize;
@@ -143,7 +221,7 @@ index 587a4d56ec..fa437b6c98 100644
    expressionS exp;
    char name[20];
    long immedl;
-@@ -1118,8 +1118,9 @@ md_assemble (char * str)
+@@ -1117,8 +1132,9 @@ md_assemble (char * str)
             as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
           else if (streq (name, "smi"))
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
@@ -155,7 +233,7 @@ index 587a4d56ec..fa437b6c98 100644
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
             opc = str_microblaze_rw_anchor;
-@@ -1182,31 +1183,55 @@ md_assemble (char * str)
+@@ -1181,31 +1197,55 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -197,7 +275,7 @@ index 587a4d56ec..fa437b6c98 100644
 +          inst |= (reg2 << RA_LOW) & RA_MASK;
 +          inst |= (immed << IMM_LOW) & IMM_MASK;
 +         }
-+       else 
++       else
 +        {
 +           temp = immed & 0xFFFF8000;
 +           if ((temp != 0) && (temp != 0xFFFF8000))
@@ -225,7 +303,34 @@ index 587a4d56ec..fa437b6c98 100644
        break;
  
      case INST_TYPE_RD_R1_IMMS:
-@@ -1832,12 +1857,20 @@ md_assemble (char * str)
+@@ -1400,7 +1440,7 @@ md_assemble (char * str)
+           reg1 = 0;
+         }
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1454,7 +1494,7 @@ md_assemble (char * str)
+           reg1 = 0;
+         }
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1472,7 +1512,7 @@ md_assemble (char * str)
+ 
+     case INST_TYPE_RFSL:
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1831,12 +1871,20 @@ md_assemble (char * str)
      case INST_TYPE_IMM:
        if (streq (name, "imm"))
          as_fatal (_("An IMM instruction should not be present in the .s file"));
@@ -240,21 +345,21 @@ index 587a4d56ec..fa437b6c98 100644
         {
 -          char *opc = NULL;
 +         char *opc;
-+          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+                streq (name, "breaid") || 
++          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++                streq (name, "breaid") ||
 +                streq (name, "brai") || streq (name, "braid")))
-+            opc = str_microblaze_64;
++            opc = strdup(str_microblaze_64);
 +         else
 +            opc = NULL;
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1860,27 +1893,54 @@ md_assemble (char * str)
+@@ -1859,27 +1907,54 @@ md_assemble (char * str)
            immed = exp.X_add_number;
          }
  
-+      if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+            streq (name, "breaid") || 
++      if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++            streq (name, "breaid") ||
 +           streq (name, "brai") || streq (name, "braid")))
 +        {
 +          temp = immed & 0xFFFFFF8000;
@@ -322,7 +427,7 @@ index 587a4d56ec..fa437b6c98 100644
        break;
  
      case INST_TYPE_NONE:
-@@ -2460,7 +2520,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2455,7 +2530,7 @@ md_apply_fix (fixS *   fixP,
  
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -331,13 +436,13 @@ index 587a4d56ec..fa437b6c98 100644
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
               fixP->fx_r_type = BFD_RELOC_64; 
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-@@ -2628,7 +2688,14 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2623,7 +2698,14 @@ md_estimate_size_before_relax (fragS * fragP,
          }
        else
         {
 -         fragP->fr_subtype = UNDEFINED_PC_OFFSET;
 +         if (fragP->fr_opcode != NULL) {
-+           if (streq (fragP->fr_opcode, str_microblaze_64)) 
++           if (streq (fragP->fr_opcode, str_microblaze_64))
 +              fragP->fr_subtype = DEFINED_64_PC_OFFSET;
 +           else
 +             fragP->fr_subtype = UNDEFINED_PC_OFFSET;
@@ -347,7 +452,7 @@ index 587a4d56ec..fa437b6c98 100644
           fragP->fr_var = INST_WORD_SIZE*2;
         }
        break;
-@@ -2905,6 +2972,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2900,6 +2982,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_M64:
        //if (arg != NULL && strcmp (arg, "64") == 0)
        microblaze_arch_size = 64;
@@ -356,7 +461,7 @@ index 587a4d56ec..fa437b6c98 100644
      default:
        return 0;
 diff --git a/gas/tc.h b/gas/tc.h
-index 0a50a6985b..529a73b43b 100644
+index da1738d67a8..5bdfe5c3475 100644
 --- a/gas/tc.h
 +++ b/gas/tc.h
 @@ -22,7 +22,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch
deleted file mode 100644
index 528c9279..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 8375ef893eb327ae4a5dc9207041ffc0e9bc6e2b Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Sun, 30 Sep 2018 17:06:58 +0530
-Subject: [PATCH 20/43] Fixing the branch related issues
-
----
- bfd/elf64-microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 54a2461037..e9b3cf3a86 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd,
- 
-          /* PR15323, ref flags aren't set for references in the same
-             object.  */
--         h->root.non_ir_ref = 1;
-+         h->root.non_ir_ref_regular = 1;
-        }
- 
-       switch (r_type)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
index d62f0ed2..ad2fd5fe 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
@@ -1,9 +1,10 @@
-From 9f13e07180c09f814665676ac6c04cb7a2cd7c11 Mon Sep 17 00:00:00 2001
+From 1594b2f497822ebdb923b4ae55e81a10bfd4817d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
- Fixed imml dissassamble issue
+Subject: [PATCH 20/40] Various fixes
 
+- Fixed address computation issues with 64bit address
+- Fixed imml dissassamble issue
 ---
  bfd/bfd-in2.h              |  5 +++
  bfd/elf64-microblaze.c     | 14 ++++----
@@ -12,23 +13,23 @@ Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
  4 files changed, 79 insertions(+), 16 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index de46e78902..33c9cb62d9 100644
+index 88f89bcdbcd..8902d9c7939 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5881,6 +5881,11 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+@@ -5443,6 +5443,11 @@ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
 +    BFD_RELOC_MICROBLAZE_EA64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-  *  +value in two words (with an imm instruction).  No relocation is
-  *   +done here - only used for relaxing  */
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index e9b3cf3a86..40f10aac6d 100644
+index f8f52870639..17e58748a0b 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -71,7 +72,7 @@ index e9b3cf3a86..40f10aac6d 100644
        microblaze_reloc = R_MICROBLAZE_IMML_64;
        break;
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
                 efix = calc_fixup (target_address, 0, sec);
  
              /* Validate the in-band val.  */
@@ -81,10 +82,10 @@ index e9b3cf3a86..40f10aac6d 100644
                 fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
              }
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index fa437b6c98..46df32e72f 100644
+index f61fdf3b90a..0dfb59ffe8b 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +401,6 @@ pseudo_typeS md_pseudo_table[] =
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
    {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
@@ -92,7 +93,7 @@ index fa437b6c98..46df32e72f 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -2479,18 +2478,74 @@ md_apply_fix (fixS *   fixP,
+@@ -2489,18 +2488,74 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_RVA:
      case BFD_RELOC_32_PCREL:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
@@ -142,7 +143,7 @@ index fa437b6c98..46df32e72f 100644
 +         }
 +       }
 +      break;
-+    
++
 +    case BFD_RELOC_MICROBLAZE_EA64:
        /* Don't do anything if the symbol is not defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -171,16 +172,16 @@ index fa437b6c98..46df32e72f 100644
               buf[3] |= ((val >> 24) & 0xff);
               buf[2] |= ((val >> 16) & 0xff);
               buf[1] |= ((val >> 8) & 0xff);
-@@ -2611,6 +2666,8 @@ md_apply_fix (fixS *   fixP,
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+@@ -2621,6 +2676,8 @@ md_apply_fix (fixS *   fixP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
 +      else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64)
-+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
++       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2882,6 +2939,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2892,6 +2949,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
@@ -188,7 +189,7 @@ index fa437b6c98..46df32e72f 100644
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
      case BFD_RELOC_MICROBLAZE_64_GOT:
-@@ -3027,10 +3085,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3037,10 +3095,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -203,16 +204,16 @@ index fa437b6c98..46df32e72f 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 20ea6a885a..f679a43606 100644
+index a03f5b7a55b..fc8e79b19cf 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -61,7 +61,7 @@ get_field_imml (long instr)
+@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
+   return p;
  }
  
 -- 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index ec82926d..99f285f2 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,7 +1,7 @@
-From beeceebb05a4eeaeca697f4ba7e214485b10369a Mon Sep 17 00:00:00 2001
+From b33fdfda4af069859ebe6588a5b9774cb5a2f14d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
 
 ---
  bfd/elf64-microblaze.c     | 11 +++++++--
@@ -9,10 +9,10 @@ Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata
  2 files changed, 54 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 40f10aac6d..4d9b90647f 100644
+index 17e58748a0b..b62c47e8514 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
             case (int) R_MICROBLAZE_64_PCREL :
             case (int) R_MICROBLAZE_64:
             case (int) R_MICROBLAZE_32:
@@ -20,16 +20,16 @@ index 40f10aac6d..4d9b90647f 100644
               {
                 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
                    from removed linkonce sections, or sections discarded by
-@@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+                    if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
 +                   else if (r_type == R_MICROBLAZE_IMML_64)
 +                     bfd_put_64 (input_bfd, relocation, contents + offset);
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                       }
                     else
                       {
@@ -38,7 +38,7 @@ index 40f10aac6d..4d9b90647f 100644
                           {
                             outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
                             outrel.r_addend = relocation + addend;
-@@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
                     if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -47,7 +47,7 @@ index 40f10aac6d..4d9b90647f 100644
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
@@ -57,7 +57,7 @@ index 40f10aac6d..4d9b90647f 100644
                  {
                   isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
  
-@@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
          case R_MICROBLAZE_64:
          case R_MICROBLAZE_64_PCREL:
          case R_MICROBLAZE_32:
@@ -66,10 +66,10 @@ index 40f10aac6d..4d9b90647f 100644
              if (h != NULL && !bfd_link_pic (info))
               {
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 46df32e72f..c6d2e4c82d 100644
+index 0dfb59ffe8b..4bd71557ca2 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1119,6 +1119,13 @@ md_assemble (char * str)
+@@ -1133,6 +1133,13 @@ md_assemble (char * str)
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
            if(streq (name, "lli") || streq (name, "sli"))
              opc = str_microblaze_64;
@@ -83,7 +83,7 @@ index 46df32e72f..c6d2e4c82d 100644
           else if (reg2 == REG_ROSDP)
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
-@@ -1182,7 +1189,10 @@ md_assemble (char * str)
+@@ -1196,7 +1203,10 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -95,19 +95,19 @@ index 46df32e72f..c6d2e4c82d 100644
          {
            temp = immed & 0xFFFFFF8000;
            if (temp != 0 && temp != 0xFFFFFF8000)
-@@ -1794,6 +1804,11 @@ md_assemble (char * str)
+@@ -1808,6 +1818,11 @@ md_assemble (char * str)
  
           if (exp.X_md != 0)
             subtype = get_imm_otype(exp.X_md);
 +          else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
 +            {
-+              opc = str_microblaze_64;
++              opc = strdup(str_microblaze_64);
 +             subtype = opcode->inst_offset_type;
 +           }
           else
             subtype = opcode->inst_offset_type;
  
-@@ -1811,6 +1826,31 @@ md_assemble (char * str)
+@@ -1825,6 +1840,31 @@ md_assemble (char * str)
            output = frag_more (isize);
            immed = exp.X_add_number;
          }
@@ -139,7 +139,7 @@ index 46df32e72f..c6d2e4c82d 100644
  
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
-@@ -1834,6 +1874,7 @@ md_assemble (char * str)
+@@ -1848,6 +1888,7 @@ md_assemble (char * str)
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM_MASK;
@@ -147,7 +147,7 @@ index 46df32e72f..c6d2e4c82d 100644
        break;
  
      case INST_TYPE_R2:
-@@ -3085,10 +3126,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3095,10 +3136,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
index d1ec5dbf..48b89d64 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 3f031961082caec9e172ff0224a51c08ab6e19c3 Mon Sep 17 00:00:00 2001
+From 118e1717ef8421bc86bcf56c9186f065bd607efd Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 23/43] fixing the .bss relocation issue
+Subject: [PATCH 22/40] fixing the .bss relocation issue
 
 ---
  bfd/elf64-microblaze.c | 18 ++++++++++++------
  1 file changed, 12 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 4d9b90647f..184b7d560d 100644
+index b62c47e8514..cb3b40b574c 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                              + offset + INST_WORD_SIZE);
                           }
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
  
@@ -38,7 +38,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr &= ~0x00ffffff;
          instr |= (val & 0xffffff);
-@@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr_hi &= ~0x00ffffff;
          instr_hi |= (val >> 16) & 0xffffff;
-@@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
@@ -59,7 +59,7 @@ index 4d9b90647f..184b7d560d 100644
            immediate |= (instr_lo & 0x0000ffff);
                       offset = calc_fixup (irelscan->r_addend, 0, sec);
                       immediate -= offset;
-@@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index 20752939..c84767fa 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From 843b73643718b0776462bce6aba6b2c6fdb33d85 Mon Sep 17 00:00:00 2001
+From 04d4e164cec91078b1b1155bae6ae4b508758969 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  It was adjusting only lower 16bits.
 
 ---
@@ -10,10 +10,10 @@ Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 035e71f311..2d8c062a42 100644
+index e1a66f57e79..bf09c68afd9 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2019,8 +2019,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
@@ -25,10 +25,10 @@ index 035e71f311..2d8c062a42 100644
               break;
             }
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 184b7d560d..ef6a87062b 100644
+index cb3b40b574c..b002b414d64 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
index b0fe8231..9a8e799c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
@@ -1,7 +1,7 @@
-From 69b77a73f4e609883cd7a0946b407becd46bf918 Mon Sep 17 00:00:00 2001
+From 7d26e7f32769e1a324a8dfd3bc3eaa2a5fbfe62a Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 27 Feb 2019 15:12:32 +0530
-Subject: [PATCH 27/43] Revert "ld: Remove unused expression state"
+Subject: [PATCH 24/40] Revert "ld: Remove unused expression state"
 
 This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb.
 
@@ -13,10 +13,10 @@ Conflicts:
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/ld/ldexp.c b/ld/ldexp.c
-index 60b17ef576..dac4b52450 100644
+index b4e7c41209d..dd3b058110a 100644
 --- a/ld/ldexp.c
 +++ b/ld/ldexp.c
-@@ -1354,6 +1354,7 @@ static etree_type *
+@@ -1360,6 +1360,7 @@ static etree_type *
  exp_assop (const char *dst,
            etree_type *src,
            enum node_tree_enum class,
@@ -24,7 +24,7 @@ index 60b17ef576..dac4b52450 100644
            bfd_boolean hidden)
  {
    etree_type *n;
-@@ -1365,6 +1366,7 @@ exp_assop (const char *dst,
+@@ -1371,6 +1372,7 @@ exp_assop (const char *dst,
    n->assign.type.node_class = class;
    n->assign.src = src;
    n->assign.dst = dst;
@@ -32,7 +32,7 @@ index 60b17ef576..dac4b52450 100644
    n->assign.hidden = hidden;
    return n;
  }
-@@ -1374,7 +1376,7 @@ exp_assop (const char *dst,
+@@ -1380,7 +1382,7 @@ exp_assop (const char *dst,
  etree_type *
  exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
  {
@@ -41,7 +41,7 @@ index 60b17ef576..dac4b52450 100644
  }
  
  /* Handle --defsym command-line option.  */
-@@ -1382,7 +1384,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
+@@ -1388,7 +1390,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
  etree_type *
  exp_defsym (const char *dst, etree_type *src)
  {
@@ -50,7 +50,7 @@ index 60b17ef576..dac4b52450 100644
  }
  
  /* Handle PROVIDE.  */
-@@ -1390,7 +1392,7 @@ exp_defsym (const char *dst, etree_type *src)
+@@ -1396,7 +1398,7 @@ exp_defsym (const char *dst, etree_type *src)
  etree_type *
  exp_provide (const char *dst, etree_type *src, bfd_boolean hidden)
  {
@@ -60,7 +60,7 @@ index 60b17ef576..dac4b52450 100644
  
  /* Handle ASSERT.  */
 diff --git a/ld/ldexp.h b/ld/ldexp.h
-index 71395bc6c4..f94b00aedb 100644
+index 717e839bd41..852ac6c5889 100644
 --- a/ld/ldexp.h
 +++ b/ld/ldexp.h
 @@ -66,6 +66,7 @@ typedef union etree_union {
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
deleted file mode 100644
index 50179787..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 3a5e6a9c614c3f6abcf8bf853527ef07a5370f80 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 2 Dec 2018 14:49:14 +0530
-Subject: [PATCH 25/43] [Patch,MicroBlaze]: fixed Build issue which are due to
- conflicts in patches.
-
----
- bfd/elf32-microblaze.c     |  1 +
- bfd/elf64-microblaze.c     | 12 ++++++------
- gas/config/tc-microblaze.c |  4 ++--
- 3 files changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 2d8c062a42..6a795c5069 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                /* This was a PC-relative instruction that was
-                   completely resolved.  */
-                int sfix, efix;
-+               unsigned int val;
-                bfd_vma target_address;
-                target_address = irel->r_addend + irel->r_offset;
-                sfix = calc_fixup (irel->r_offset, 0, sec);
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index ef6a87062b..bed534e7dd 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-   /* If this is a weak symbol, and there is a real definition, the
-      processor independent code will have arranged for us to see the
-      real definition first, and we can just use the same value.  */
--  if (h->u.weakdef != NULL)
-+  if (h->is_weakalias)
-     {
--      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
--                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
--      h->root.u.def.section = h->u.weakdef->root.u.def.section;
--      h->root.u.def.value = h->u.weakdef->root.u.def.value;
-+      struct elf_link_hash_entry *def = weakdef (h);
-+      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
-+      h->root.u.def.section = def->root.u.def.section;
-+      h->root.u.def.value = def->root.u.def.value;
-       return TRUE;
--    }
-+    }  
- 
-   /* This is a reference to a symbol defined by a dynamic object which
-      is not a function.  */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c6d2e4c82d..b3e49f0cf0 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -118,9 +118,9 @@ const relax_typeS md_relax_table[] =
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
--  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
- //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
-   { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
- };
- 
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
index 0fd14f6d..97d75650 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
@@ -1,7 +1,7 @@
-From 282a60ab92e6705853dac30fd38aaf298d7f02b0 Mon Sep 17 00:00:00 2001
+From 8293b0cf15d4411402a2b0b50e4c532093c5d952 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing
+Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
  build error for windows builds.commenting for now.
 
 ---
@@ -9,18 +9,18 @@ Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing
  1 file changed, 2 insertions(+)
 
 diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index bfe135e7fb..feb5cb37f5 100644
+index 070104c2734..8331c8759d5 100644
 --- a/bfd/elf-attrs.c
 +++ b/bfd/elf-attrs.c
-@@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
-   /* PR 17512: file: 2844a11d.  */
+@@ -442,6 +442,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
    if (hdr->sh_size == 0)
      return;
+ 
 +  #if 0
-   if (hdr->sh_size > bfd_get_file_size (abfd))
+   filesize = bfd_get_file_size (abfd);
+   if (filesize != 0 && hdr->sh_size > filesize)
      {
-       /* xgettext:c-format */
-@@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+@@ -451,6 +452,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
        bfd_set_error (bfd_error_invalid_operation);
        return;
      }
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
deleted file mode 100644
index aef46b3f..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From e7f43c3afe90faa42c09f368671972c26c2b7b38 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 26 Feb 2019 17:31:41 +0530
-Subject: [PATCH 26/43] [Patch,Microblaze] : changes of "PR22458, failure to
- choose a matching ELF target"     is causing "Multiple Prevailing definition
- errors",added check for best_match elf.
-
----
- bfd/format.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/bfd/format.c b/bfd/format.c
-index 97a92291a8..3a74cc49d2 100644
---- a/bfd/format.c
-+++ b/bfd/format.c
-@@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching)
- 
-       /* Don't check the default target twice.  */
-       if (*target == &binary_vec
-+#if !BFD_SUPPORTS_PLUGINS
-          || (!abfd->target_defaulted && *target == save_targ))
-+#else
-+         || (!abfd->target_defaulted && *target == save_targ)
-+         || (*target)->match_priority > best_match)
-+#endif
-        continue;
- 
-       /* If we already tried a match, the bfd is modified and may
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
index dbafc786..ebd1fa4c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From 26662110955e26c62629f4263a999216dac326ef Mon Sep 17 00:00:00 2001
+From 987bd08638fab099dcfdce412448734182be51e6 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
 
 ---
  gas/config/tc-microblaze.c | 10 +++++-----
@@ -9,10 +9,10 @@ Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue
  2 files changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b3e49f0cf0..5b506d3348 100644
+index 4bd71557ca2..83e17c60fa0 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
+@@ -797,7 +797,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
  }
  
   static char *
@@ -21,7 +21,7 @@ index b3e49f0cf0..5b506d3348 100644
  {
    char *new_pointer;
    char *atp;
-@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
+@@ -848,11 +848,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
      ; /* An error message has already been emitted.  */
    else if ((e->X_op != O_constant && e->X_op != O_symbol) )
      as_fatal (_("operand must be a constant or a label"));
@@ -38,7 +38,7 @@ index b3e49f0cf0..5b506d3348 100644
  
    if (atp)
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 824afc0ab0..d59ee0a95f 100644
+index f9709412097..77d74c17f3a 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
index 8141095a..12f44a6d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,21 +1,21 @@
-From 7b332d61cb3dbcae69021ce706f2c408c85af193 Mon Sep 17 00:00:00 2001
+From dde3395588ca91a7c484cc4a003f72f80848c534 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 30/43] Added support to new arithmetic single register
+Subject: [PATCH 27/40] Added support to new arithmetic single register
  instructions
 
 ---
- gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   |  12 +++
- opcodes/microblaze-opc.h   |  43 ++++++++++-
+ gas/config/tc-microblaze.c | 145 ++++++++++++++++++++++++++++++++++++-
+ opcodes/microblaze-dis.c   |  13 +++-
+ opcodes/microblaze-opc.h   |  45 +++++++++++-
  opcodes/microblaze-opcm.h  |   5 +-
- 4 files changed, 201 insertions(+), 6 deletions(-)
+ 4 files changed, 201 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 5b506d3348..12eef24a29 100644
+index 83e17c60fa0..b4330652758 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -423,12 +423,33 @@ void
+@@ -422,12 +422,33 @@ void
  md_begin (void)
  {
    struct op_code_struct * opcode;
@@ -26,7 +26,7 @@ index 5b506d3348..12eef24a29 100644
    /* Insert unique names into hash table.  */
 -  for (opcode = opcodes; opcode->name; opcode ++)
 -    hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
-+  for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
++  for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
 +    {
 +      if (strcmp (prev_name, opcode->name))
 +       {
@@ -51,7 +51,7 @@ index 5b506d3348..12eef24a29 100644
  }
  
  /* Try to parse a reg name.  */
-@@ -986,6 +1007,7 @@ md_assemble (char * str)
+@@ -1000,6 +1021,7 @@ md_assemble (char * str)
  {
    char * op_start;
    char * op_end;
@@ -59,19 +59,15 @@ index 5b506d3348..12eef24a29 100644
    struct op_code_struct * opcode, *opcode1;
    char * output = NULL;
    int nlen = 0;
-@@ -996,9 +1018,10 @@ md_assemble (char * str)
-   unsigned reg3;
-   unsigned isize;
-   unsigned long immed, immed2, temp;
--  expressionS exp;
-+  expressionS exp,exp1;
+@@ -1013,6 +1035,7 @@ md_assemble (char * str)
+   expressionS exp;
    char name[20];
    long immedl;
 +  int reg=0;
  
    /* Drop leading whitespace.  */
    while (ISSPACE (* str))
-@@ -1029,7 +1052,78 @@ md_assemble (char * str)
+@@ -1043,7 +1066,78 @@ md_assemble (char * str)
        as_bad (_("unknown opcode \"%s\""), name);
        return;
      }
@@ -151,7 +147,7 @@ index 5b506d3348..12eef24a29 100644
    inst = opcode->bit_sequence;
    isize = 4;
  
-@@ -1480,6 +1574,51 @@ md_assemble (char * str)
+@@ -1494,6 +1588,51 @@ md_assemble (char * str)
        inst |= (immed << IMM_LOW) & IMM15_MASK;
        break;
  
@@ -204,37 +200,45 @@ index 5b506d3348..12eef24a29 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f679a43606..e5e880cb1c 100644
+index fc8e79b19cf..f5db1189240 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -114,6 +114,15 @@ get_field_imm15 (long instr)
-   return (strdup (tmpstr));
+@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm16 (long instr)
++get_field_imm16 (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
++  return p;
 +}
 +
  static char *
- get_field_special (long instr, struct op_code_struct * op)
- {
-@@ -419,6 +428,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-        case INST_TYPE_RD_IMM15:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
+ get_field_special (struct string_buf *buf, long instr,
+                   struct op_code_struct *op)
+@@ -450,6 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+                      get_field_imm15 (&buf, inst));
           break;
 +       case INST_TYPE_RD_IMML:
-+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm16 (inst));
-+          break;
-         /* For mbar insn.  */
-         case INST_TYPE_IMM5:
-           print_func (stream, "\t%s", get_field_imm5_mbar (inst));
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++         break;
+          /* For mbar insn.  */
+        case INST_TYPE_IMM5:
+          print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
+@@ -457,7 +469,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          /* For mbar 16 or sleep insn.  */
+        case INST_TYPE_NONE:
+          break;
+-         /* For tuqula instruction */
+         /* For bit field insns.  */
+        case INST_TYPE_RD_R1_IMMW_IMMS:
+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d59ee0a95f..0774f70e08 100644
+index 77d74c17f3a..bd1cc90bff6 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -69,6 +69,7 @@
@@ -287,7 +291,7 @@ index d59ee0a95f..0774f70e08 100644
  /* New Mask for msrset, msrclr insns.  */
  #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
  /* Mask for mbar insn.  */
-@@ -114,7 +143,7 @@
+@@ -114,13 +143,13 @@
  #define DELAY_SLOT 1
  #define NO_DELAY_SLOT 0
  
@@ -296,6 +300,13 @@ index d59ee0a95f..0774f70e08 100644
  
  struct op_code_struct
  {
+   const char * name;
+   short inst_type;            /* Registers and immediate values involved.  */
+-  short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
++  int inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
+   short delay_slots;          /* Info about delay slots needed after this instr. */
+   short immval_mask;
+   unsigned long bit_sequence; /* All the fixed bits for the op are set and
 @@ -444,13 +473,21 @@ struct op_code_struct
    {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
    {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -333,7 +344,7 @@ index d59ee0a95f..0774f70e08 100644
    {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
    {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5f2e190d23..4d2ee2dd0d 100644
+index ad8b8ce345b..86cdb3b0715 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -61,7 +61,9 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
index f9f0fc55..a8d5a385 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -1,19 +1,19 @@
-From 213df2cac38d404619614939de0c9d3dcbf7557d Mon Sep 17 00:00:00 2001
+From 623f4e7ea6c18bec0e141c7471c7bd609bd9a6d7 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 31/43] [Patch,MicroBlaze] : double imml generation for 64 bit
+Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
  values.
 
 ---
- gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++-------
+ gas/config/tc-microblaze.c | 324 ++++++++++++++++++++++++++++++-------
  opcodes/microblaze-opc.h   |   4 +-
- 2 files changed, 263 insertions(+), 63 deletions(-)
+ 2 files changed, 264 insertions(+), 64 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 12eef24a29..3ff6a14baf 100644
+index b4330652758..f5cc1e05f7e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1008,7 +1008,7 @@ md_assemble (char * str)
+@@ -1022,7 +1022,7 @@ md_assemble (char * str)
    char * op_start;
    char * op_end;
    char * temp_op_end;
@@ -22,20 +22,21 @@ index 12eef24a29..3ff6a14baf 100644
    char * output = NULL;
    int nlen = 0;
    int i;
-@@ -1192,7 +1192,12 @@ md_assemble (char * str)
+@@ -1206,7 +1206,12 @@ md_assemble (char * str)
            reg2 = 0;
          }
        if (strcmp (op_end, ""))
+-       op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +        {
-+        if(microblaze_arch_size == 64)
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+       else
-        op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
++          if (microblaze_arch_size == 64)
++            op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
++         else
++           op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +       }
        else
         as_fatal (_("Error in statement syntax"));
  
-@@ -1288,24 +1293,51 @@ md_assemble (char * str)
+@@ -1302,24 +1307,51 @@ md_assemble (char * str)
                 || streq (name, "lwi") || streq (name, "sbi")
                  || streq (name, "shi") || streq (name, "swi"))))
          {
@@ -51,27 +52,28 @@ index 12eef24a29..3ff6a14baf 100644
 +            {
 +             opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +             if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode1->bit_sequence;
+                 {
+                   as_bad (_("unknown opcode \"%s\""), "imml");
+                   return;
+                 }
+               inst1 = opcode1->bit_sequence;
+-             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
 +              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
+               output[0] = INST_BYTE0 (inst1);
+               output[1] = INST_BYTE1 (inst1);
+               output[2] = INST_BYTE2 (inst1);
+               output[3] = INST_BYTE3 (inst1);
+               output = frag_more (isize);
+             }
 +         else 
 +           {
 +           opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +              if (opcode1 == NULL || opcode2 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
++                {
++                  as_bad (_("unknown opcode \"%s\""), "imml");
++                  return;
++                }
 +              inst1 = opcode2->bit_sequence;
 +              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
 +              output[0] = INST_BYTE0 (inst1);
@@ -79,20 +81,19 @@ index 12eef24a29..3ff6a14baf 100644
 +              output[2] = INST_BYTE2 (inst1);
 +              output[3] = INST_BYTE3 (inst1);
 +              output = frag_more (isize);
-               inst1 = opcode1->bit_sequence;
--             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
++              inst1 = opcode1->bit_sequence;
 +              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
++              output[0] = INST_BYTE0 (inst1);
++              output[1] = INST_BYTE1 (inst1);
++              output[2] = INST_BYTE2 (inst1);
++              output[3] = INST_BYTE3 (inst1);
++              output = frag_more (isize);
++            }
 +         }
            inst |= (reg1 << RD_LOW) & RD_MASK;
            inst |= (reg2 << RA_LOW) & RA_MASK;
            inst |= (immed << IMM_LOW) & IMM_MASK;
-@@ -1316,14 +1348,13 @@ md_assemble (char * str)
+@@ -1330,14 +1362,13 @@ md_assemble (char * str)
             if ((temp != 0) && (temp != 0xFFFF8000))
              {
                 /* Needs an immediate inst.  */
@@ -109,7 +110,7 @@ index 12eef24a29..3ff6a14baf 100644
                 inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
                 output[0] = INST_BYTE0 (inst1);
                 output[1] = INST_BYTE1 (inst1);
-@@ -1564,7 +1595,7 @@ md_assemble (char * str)
+@@ -1578,7 +1609,7 @@ md_assemble (char * str)
          as_fatal (_("Cannot use special register with this instruction"));
  
        if (exp.X_op != O_constant)
@@ -118,7 +119,7 @@ index 12eef24a29..3ff6a14baf 100644
        else
         {
            output = frag_more (isize);
-@@ -1898,8 +1929,9 @@ md_assemble (char * str)
+@@ -1912,8 +1943,9 @@ md_assemble (char * str)
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
@@ -129,7 +130,7 @@ index 12eef24a29..3ff6a14baf 100644
            if (opcode1 == NULL)
              {
                as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -1928,7 +1960,12 @@ md_assemble (char * str)
+@@ -1942,7 +1974,12 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -142,7 +143,7 @@ index 12eef24a29..3ff6a14baf 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1967,30 +2004,55 @@ md_assemble (char * str)
+@@ -1981,30 +2018,55 @@ md_assemble (char * str)
          }
        if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
          {
@@ -203,8 +204,8 @@ index 12eef24a29..3ff6a14baf 100644
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
-@@ -2076,25 +2138,50 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
+@@ -2090,25 +2152,50 @@ md_assemble (char * str)
+             streq (name, "breaid") ||
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFF8000;
@@ -258,7 +259,7 @@ index 12eef24a29..3ff6a14baf 100644
            inst |= (immed << IMM_LOW) & IMM_MASK;
         }
        else
-@@ -2194,21 +2281,45 @@ md_assemble (char * str)
+@@ -2208,21 +2295,45 @@ md_assemble (char * str)
         {
           output = frag_more (isize);
           immedl = exp.X_add_number;
@@ -319,7 +320,7 @@ index 12eef24a29..3ff6a14baf 100644
          }
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
-@@ -2257,21 +2368,46 @@ md_assemble (char * str)
+@@ -2271,21 +2382,46 @@ md_assemble (char * str)
         {
            output = frag_more (isize);
            immedl = exp.X_add_number;
@@ -374,7 +375,7 @@ index 12eef24a29..3ff6a14baf 100644
  
        inst |= (reg1 << RA_LOW) & RA_MASK;
        inst |= (immedl << IMM_LOW) & IMM_MASK;
-@@ -2554,8 +2690,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2565,8 +2701,8 @@ md_apply_fix (fixS *   fixP,
    /* Note: use offsetT because it is signed, valueT is unsigned.  */
    offsetT      val  = (offsetT) * valp;
    int          i;
@@ -385,7 +386,7 @@ index 12eef24a29..3ff6a14baf 100644
  
    symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
  
-@@ -2739,30 +2875,75 @@ md_apply_fix (fixS *   fixP,
+@@ -2749,30 +2885,75 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
@@ -471,7 +472,7 @@ index 12eef24a29..3ff6a14baf 100644
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
            if (opcode1 == NULL)
-@@ -2774,12 +2955,11 @@ md_apply_fix (fixS *   fixP,
+@@ -2784,12 +2965,11 @@ md_apply_fix (fixS *   fixP,
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
@@ -485,7 +486,7 @@ index 12eef24a29..3ff6a14baf 100644
        /* Add the value only if the symbol is defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
         {
-@@ -2811,21 +2991,41 @@ md_apply_fix (fixS *   fixP,
+@@ -2821,21 +3001,41 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -532,7 +533,7 @@ index 12eef24a29..3ff6a14baf 100644
          within the same section only.  */
        buf[0] = INST_BYTE0 (inst1);
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 0774f70e08..bd9d91cd57 100644
+index bd1cc90bff6..cf5b5920921 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
@@ -541,7 +542,7 @@ index 0774f70e08..bd9d91cd57 100644
  
 -#define MIN_IMML  ((long long) 0xffffff8000000000L)
 -#define MAX_IMML  ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) -9223372036854775808)
++#define MIN_IMML  ((long long) -9223372036854775807)
 +#define MAX_IMML  ((long long) 9223372036854775807)
  
  #endif /* MICROBLAZE_OPC */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
index 118c5629..3720f2dc 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
@@ -1,7 +1,7 @@
-From d64ce07a2b9206ce1e53d8958b28de02cc7cca2b Mon Sep 17 00:00:00 2001
+From b7b5caa314177cfe8aeb0fb6d748f6e52fe51a83 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Wed, 22 Jan 2020 16:31:12 +0530
-Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new
+Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new
  MB-64 instructions with single register.
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new
  1 file changed, 47 insertions(+), 3 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 95a1e69729..dc79328df6 100644
+index f5cc1e05f7e..efd1a42769e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1642,12 +1642,56 @@ md_assemble (char * str)
+@@ -1653,12 +1653,56 @@ md_assemble (char * str)
                               exp.X_add_symbol,
                               exp.X_add_number,
                               (char *) opc);
@@ -70,8 +70,8 @@ index 95a1e69729..dc79328df6 100644
          }
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM16_MASK;
-@@ -2141,8 +2185,8 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
+@@ -2152,8 +2196,8 @@ md_assemble (char * str)
+             streq (name, "breaid") ||
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFFFFFFFF8000;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
new file mode 100644
index 00000000..8cd3563b
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
@@ -0,0 +1,47 @@
+From 0afa4ba2af8d63cb70771f1c7e235af920603533 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 16 Apr 2020 18:08:58 +0530
+Subject: [PATCH 30/40] [Patch,MicroBlaze m64]: Update imml instructions for
+ Type A branch EA
+
+This patch will remove imml 0 and imml -1 instructions when the offset is less than 16 bit for Type A branch EA instructions.
+---
+ gas/config/tc-microblaze.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index efd1a42769e..1d838abfefa 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2164,13 +2164,13 @@ md_assemble (char * str)
+       if (exp.X_op != O_constant)
+        {
+          char *opc;
+-          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
+-                streq (name, "breaid") ||
+-                streq (name, "brai") || streq (name, "braid")))
+-            opc = strdup(str_microblaze_64);
++          /* removal of imml 0 and imml -1 for bea type A insns.
++             if offset is 16 bit then imml instructions are redundant */
++         if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
++           opc = strdup(str_microblaze_64);
+          else
+-            opc = NULL;
+-          relax_substateT subtype;
++           opc = NULL;
++         relax_substateT subtype;
+ 
+          if (exp.X_md != 0)
+            subtype = get_imm_otype(exp.X_md);
+@@ -2930,7 +2930,7 @@ md_apply_fix (fixS *   fixP,
+     case BFD_RELOC_MICROBLAZE_64:
+     case BFD_RELOC_MICROBLAZE_64_PCREL:
+       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
+-            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
++            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
+         {
+           /* Generate the imm instruction.  */
+            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
new file mode 100644
index 00000000..fda23a1a
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
@@ -0,0 +1,38 @@
+From 23f0f6e8281b5cd481ef7636739c07b446828f7e Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 17 Jun 2020 21:20:26 +0530
+Subject: [PATCH 31/40] ldlang.c: Workaround for improper address mapping
+ causing runtime loops
+
+[Patch,MicroBlaze] : improper address mapping of PROVIDE directive
+symbols[DTOR_END] are causing runtime loops and we don't need to override
+PROVIDE symbols if symbols are defined in libraries and linker so I am
+disabling override for PROVIDE symbols.
+---
+ ld/ldlang.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/ld/ldlang.c b/ld/ldlang.c
+index 9977195074a..9e2c1da066e 100644
+--- a/ld/ldlang.c
++++ b/ld/ldlang.c
+@@ -3657,9 +3657,15 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
+            plugin_insert = NULL;
+ #endif
+          break;
++       /* This is from a --defsym on the command line.  */
+        case lang_assignment_statement_enum:
+          if (s->assignment_statement.exp->type.node_class != etree_assert)
+-           exp_fold_tree_no_dot (s->assignment_statement.exp);
++           {
++             if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
++               ;
++             else
++               exp_fold_tree_no_dot (s->assignment_statement.exp);
++           }
+          break;
+        default:
+          break;
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
new file mode 100644
index 00000000..0e813f96
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
@@ -0,0 +1,83 @@
+From 4d0c68ffb688c23f984de8c0a22af824c3902d83 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 16 Jul 2020 12:38:11 -0500
+Subject: [PATCH 32/40] gas: revert moving of md_pseudo_table from const
+
+The base system expect md_pseudo_table to be constant, Changing the
+definition will break other architectures when compiled with a
+unified source code.
+
+Patch reverts the change away from const, and implements a newer
+dynamic handler that passes the correct argument value based on word
+size.
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ gas/config/tc-microblaze.c | 16 +++++++++++++---
+ gas/tc.h                   |  2 +-
+ 2 files changed, 14 insertions(+), 4 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 1d838abfefa..da99d4ef482 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -384,6 +384,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+   demand_empty_rest_of_line ();
+ }
+ 
++/* Handle the .gpword pseudo-op, Pass to s_rva */
++
++static void
++microblaze_s_gpword (int ignore ATTRIBUTE_UNUSED)
++{
++  int size = 4;
++  if (microblaze_arch_size == 64)
++    size = 8;
++  s_rva(size);
++}
++
+ /* This table describes all the machine specific pseudo-ops the assembler
+    has to support.  The fields are:
+    Pseudo-op name without dot
+@@ -391,7 +402,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+    Integer arg to pass to the function.  */
+ /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
+    and then in the read.c table.  */
+-pseudo_typeS md_pseudo_table[] =
++const pseudo_typeS md_pseudo_table[] =
+ {
+   {"lcomm", microblaze_s_lcomm, 1},
+   {"data", microblaze_s_data, 0},
+@@ -400,7 +411,7 @@ pseudo_typeS md_pseudo_table[] =
+   {"data32", cons, 4},     /* Same as word.  */
+   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
+   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
+-  {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
++  {"gpword", microblaze_s_gpword, 0}, /* gpword label => store resolved label address in data section.  */
+   {"weakext", microblaze_s_weakext, 0},
+   {"rodata", microblaze_s_rdata, 0},
+   {"sdata2", microblaze_s_rdata, 1},
+@@ -3464,7 +3475,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+     case OPTION_M64:
+       //if (arg != NULL && strcmp (arg, "64") == 0)
+       microblaze_arch_size = 64;
+-      md_pseudo_table[7].poc_val = 8;
+       break;
+     default:
+       return 0;
+diff --git a/gas/tc.h b/gas/tc.h
+index 5bdfe5c3475..da1738d67a8 100644
+--- a/gas/tc.h
++++ b/gas/tc.h
+@@ -22,7 +22,7 @@
+ /* In theory (mine, at least!) the machine dependent part of the assembler
+    should only have to include one file.  This one.  -- JF */
+ 
+-extern pseudo_typeS md_pseudo_table[];
++extern const pseudo_typeS md_pseudo_table[];
+ 
+ const char * md_atof (int, char *, int *);
+ int    md_parse_option (int, const char *);
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
new file mode 100644
index 00000000..7339995e
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
@@ -0,0 +1,105 @@
+From d9114e764eb42ae1daaf6af7c2a5e48fc764109d Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Fri, 17 Jul 2020 09:20:54 -0500
+Subject: [PATCH 33/40] Fix various compile warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ bfd/elf64-microblaze.c     |  9 +++++----
+ gas/config/tc-microblaze.c | 11 +++++------
+ 2 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index b002b414d64..8308f1ebd09 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ /* Set the howto pointer for a RCE ELF reloc.  */
+ 
+ static bfd_boolean
+-microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
+                              arelent * cache_ptr,
+                              Elf_Internal_Rela * dst)
+ {
+@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
+   r_type = ELF64_R_TYPE (dst->r_info);
+   if (r_type >= R_MICROBLAZE_max)
+     {
+-      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
++      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
+                             abfd, r_type);
+       bfd_set_error (bfd_error_bad_value);
+       return FALSE;
+     }
+ 
+   cache_ptr->howto = microblaze_elf_howto_table [r_type];
+- return TRUE;
++  return TRUE;
+ }
+ 
+ /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
+@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                        else
+                          {
+                            BFD_FAIL ();
+-                           (*_bfd_error_handler)
++                           _bfd_error_handler
+                              (_("%pB: probably compiled without -fPIC?"),
+                               input_bfd);
+                            bfd_set_error (bfd_error_bad_value);
+@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+           goto dogottls;
+         case R_MICROBLAZE_TLSLD:
+           tls_type |= (TLS_TLS | TLS_LD);
++          /* Fall through. */
+         dogottls:
+           sec->has_tls_reloc = 1;
+           /* Fall through. */
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index da99d4ef482..62daa56b47a 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -1091,7 +1091,6 @@ md_assemble (char * str)
+         reg  = is_reg (temp_op_end + 1);
+       if (reg) 
+        {
+-          
+          opcode->inst_type=INST_TYPE_RD_R1_IMML;
+           opcode->inst_offset_type = OPCODE_MASK_H;
+           if (streq (name, "addli"))
+@@ -1242,18 +1241,18 @@ md_assemble (char * str)
+          else if (streq (name, "smi"))
+            as_fatal (_("smi pseudo instruction should not use a label in imm field"));
+           if(streq (name, "lli") || streq (name, "sli"))
+-            opc = str_microblaze_64;
++            opc = strdup(str_microblaze_64);
+           else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
+                        || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
+                        || streq (name, "shi") || streq (name, "swi"))))
+            {
+-              opc = str_microblaze_64;
++              opc = strdup(str_microblaze_64);
+              subtype = opcode->inst_offset_type;
+            }
+          else if (reg2 == REG_ROSDP)
+-           opc = str_microblaze_ro_anchor;
++           opc = strdup(str_microblaze_ro_anchor);
+          else if (reg2 == REG_RWSDP)
+-           opc = str_microblaze_rw_anchor;
++           opc = strdup(str_microblaze_rw_anchor);
+          else
+            opc = NULL;
+          if (exp.X_md != 0)
+@@ -1718,7 +1717,7 @@ md_assemble (char * str)
+       inst |= (reg1 << RD_LOW) & RD_MASK;
+       inst |= (immed << IMM_LOW) & IMM16_MASK;
+       break;
+-       
++
+     case INST_TYPE_R1_RFSL:
+       if (strcmp (op_end, ""))
+         op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
index 7ac89d2d..00e5410c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
@@ -1,7 +1,7 @@
-From c347f9727cc86bb0174dc001446c0670e7306692 Mon Sep 17 00:00:00 2001
+From c466a54f6ac8fae44f3e79e33bb782086dc08a2b Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 32/43] Add initial port of linux gdbserver add
+Subject: [PATCH 34/40] Add initial port of linux gdbserver add
  gdb_proc_service_h to gdbserver microblaze-linux
 
 gdbserver needs to initialise the microblaze registers
@@ -21,17 +21,21 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
  gdb/configure.host                   |   3 +
+ gdb/features/microblaze-linux.xml    |  12 ++
  gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
  gdb/microblaze-linux-tdep.c          |  29 +++-
  gdb/microblaze-tdep.c                |  35 ++++-
  gdb/microblaze-tdep.h                |   4 +-
  gdb/regformats/reg-microblaze.dat    |  41 ++++++
- 6 files changed, 298 insertions(+), 3 deletions(-)
+ gdbserver/Makefile.in                |   4 +
+ gdbserver/configure.srv              |   8 ++
+ 9 files changed, 322 insertions(+), 3 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
  create mode 100644 gdb/gdbserver/linux-microblaze-low.c
  create mode 100644 gdb/regformats/reg-microblaze.dat
 
 diff --git a/gdb/configure.host b/gdb/configure.host
-index c87f997abc..de8d6b00f3 100644
+index ce528237291..cf1a08e8b28 100644
 --- a/gdb/configure.host
 +++ b/gdb/configure.host
 @@ -65,6 +65,7 @@ hppa*)                        gdb_host_cpu=pa ;;
@@ -51,9 +55,27 @@ index c87f997abc..de8d6b00f3 100644
  powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
                         gdb_host=aix ;;
  powerpc*-*-freebsd*)   gdb_host=fbsd ;;
+diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+new file mode 100644
+index 00000000000..8983e66eb3d
+--- /dev/null
++++ b/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++  <osabi>GNU/Linux</osabi>
++  <xi:include href="microblaze-core.xml"/>
++</target>
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
 new file mode 100644
-index 0000000000..cba5d6fc58
+index 00000000000..cba5d6fc585
 --- /dev/null
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -0,0 +1,189 @@
@@ -247,7 +269,7 @@ index 0000000000..cba5d6fc58
 +  microblaze_supply_ptrace_register,
 +};
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 4e5f60cd4e..7ab650a1cc 100644
+index be710bedb64..d15b24d619e 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
 @@ -37,6 +37,22 @@
@@ -273,17 +295,14 @@ index 4e5f60cd4e..7ab650a1cc 100644
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
                                            struct bp_target_info *bp_tgt)
-@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
- 
+@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    /* Determine appropriate breakpoint contents and size for this address.  */
    bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
  
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
    val = target_read_memory (addr, old_contents, bplen);
  
    /* If our breakpoint is no longer at the address, this means that the
@@ -296,10 +315,8 @@ index 4e5f60cd4e..7ab650a1cc 100644
 +      microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
  
-+  do_cleanups (cleanup);
    return val;
  }
- 
 @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    /* Trampolines.  */
    tramp_frame_prepend_unwinder (gdbarch,
@@ -310,9 +327,9 @@ index 4e5f60cd4e..7ab650a1cc 100644
 +                                             svr4_fetch_objfile_link_map);
  }
  
- void
+ void _initialize_microblaze_linux_tdep ();
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 1248acbdc9..730a2b281f 100644
+index 5c804133040..5972a69eb5f 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
@@ -329,7 +346,6 @@ index 1248acbdc9..730a2b281f 100644
 +  int val;
 +  int bplen;
 +  gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
 +
 +  /* Determine appropriate breakpoint contents and size for this address.  */
 +  bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
@@ -337,7 +353,9 @@ index 1248acbdc9..730a2b281f 100644
 +    error (_("Software breakpoints not implemented for this target."));
 +
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
 +  val = target_read_memory (addr, old_contents, bplen);
 +
 +  /* If our breakpoint is no longer at the address, this means that the
@@ -349,7 +367,6 @@ index 1248acbdc9..730a2b281f 100644
 +    microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
 +
-+  do_cleanups (cleanup);
 +  return val;
 +}
  
@@ -363,14 +380,14 @@ index 1248acbdc9..730a2b281f 100644
  
    set_gdbarch_frame_args_skip (gdbarch, 8);
  
-@@ -770,4 +802,5 @@ When non-zero, microblaze specific debugging is enabled."),
+@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
                              NULL,
                              &setdebuglist, &showdebuglist);
  
 +
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index a0048148e4..63aab84ef6 100644
+index 4fbdf9933f0..db0772643dc 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -117,6 +117,8 @@ struct microblaze_frame_cache
@@ -385,7 +402,7 @@ index a0048148e4..63aab84ef6 100644
  #endif /* microblaze-tdep.h */
 diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
 new file mode 100644
-index 0000000000..bd8a438442
+index 00000000000..bd8a4384424
 --- /dev/null
 +++ b/gdb/regformats/reg-microblaze.dat
 @@ -0,0 +1,41 @@
@@ -430,6 +447,54 @@ index 0000000000..bd8a438442
 +32:fsr
 +32:slr
 +32:shr
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index 9d7687be534..8195ccb8ad2 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -183,6 +183,7 @@ SFILES = \
+        $(srcdir)/linux-ia64-low.cc \
+        $(srcdir)/linux-low.cc \
+        $(srcdir)/linux-m68k-low.cc \
++       $(srcdir)/linux-microblaze-low.c \
+        $(srcdir)/linux-mips-low.cc \
+        $(srcdir)/linux-nios2-low.cc \
+        $(srcdir)/linux-ppc-low.cc \
+@@ -216,6 +217,7 @@ SFILES = \
+        $(srcdir)/../gdb/nat/linux-namespaces.c \
+        $(srcdir)/../gdb/nat/linux-osdata.c \
+        $(srcdir)/../gdb/nat/linux-personality.c \
++       $(srcdir)/../gdb/nat/microblaze-linux.c \
+        $(srcdir)/../gdb/nat/mips-linux-watch.c \
+        $(srcdir)/../gdb/nat/ppc-linux.c \
+        $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
+@@ -557,6 +559,8 @@ target/%.o: ../gdb/target/%.c
+ 
+ %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
+        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+ 
+ #
+ # Dependency tracking.
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 5e33bd9c54d..13d5c6aff87 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,6 +155,14 @@ case "${gdbserver_host}" in
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+                        ;;
++  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
++                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_xmlfiles="microblaze-linux.xml"
++                       srv_linux_regsets=yes
++                       srv_linux_usrregs=yes
++                       srv_linux_thread_db=yes
++                       ;;
+   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
+                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+                        srv_regobj="${srv_regobj} powerpc-vsx32l.o"
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
index e6bbf2b7..4eeeb7da 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
@@ -1,22 +1,22 @@
-From 0fd864ff792d7bcbbcbed5ee0ae9f429f1fd2353 Mon Sep 17 00:00:00 2001
+From b6c01467951b83f9cca621ffeb89151eba1d73a1 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 33/43] Initial port of core reading support Added support for
+Subject: [PATCH 35/40] Initial port of core reading support Added support for
  reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
  information for rebuilding ".reg" sections of core dumps at run time.
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
- bfd/elf32-microblaze.c      | 84 ++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c      | 84 +++++++++++++++++++++++++++++++++++++
  gdb/configure.tgt           |  2 +-
- gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
- gdb/microblaze-tdep.c       | 90 +++++++++++++++++++++++++++++++++++++
- gdb/microblaze-tdep.h       | 27 +++++++++++
- 5 files changed, 259 insertions(+), 1 deletion(-)
+ gdb/microblaze-linux-tdep.c | 17 +++++++-
+ gdb/microblaze-tdep.c       | 48 +++++++++++++++++++++
+ gdb/microblaze-tdep.h       | 27 ++++++++++++
+ 5 files changed, 176 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 6a795c5069..c280431df6 100644
+index bf09c68afd9..a4b15882d77 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
@@ -107,7 +107,7 @@ index 6a795c5069..c280431df6 100644
  /* ELF linker hash entry.  */
  
  struct elf32_mb_link_hash_entry
-@@ -3672,4 +3753,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+@@ -3574,4 +3655,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
  #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
  #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
  
@@ -116,10 +116,10 @@ index 6a795c5069..c280431df6 100644
 +
  #include "elf32-target.h"
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 27f122ad04..622bd486b3 100644
+index d66f01bb9f7..2938fddfe82 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -397,7 +397,7 @@ mep-*-*)
+@@ -389,7 +389,7 @@ mep-*-*)
  
  microblaze*-linux-*|microblaze*-*-linux*)
         # Target: Xilinx MicroBlaze running Linux
@@ -129,65 +129,34 @@ index 27f122ad04..622bd486b3 100644
         gdb_sim=../sim/microblaze/libsim.a
         ;;
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 7ab650a1cc..e2225d778a 100644
+index d15b24d619e..0d5c08d24f6 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
-@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
+@@ -36,6 +36,7 @@
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
+ 
+ static int microblaze_debug_flag = 0;
+ 
+@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
    microblaze_linux_sighandler_cache_init
  };
  
-+const struct microblaze_gregset microblaze_linux_core_gregset;
-+
-+static void
-+microblaze_linux_supply_core_gregset (const struct regset *regset,
-+                                   struct regcache *regcache,
-+                                   int regnum, const void *gregs, size_t len)
-+{
-+  microblaze_supply_gregset (&microblaze_linux_core_gregset, regcache,
-+                             regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_gregset (const struct regset *regset,
-+                                    const struct regcache *regcache,
-+                                    int regnum, void *gregs, size_t len)
-+{
-+  microblaze_collect_gregset (&microblaze_linux_core_gregset, regcache,
-+                              regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_supply_core_fpregset (const struct regset *regset,
-+                                    struct regcache *regcache,
-+                                    int regnum, const void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_supply_fpregset (regcache, regnum, fpregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_fpregset (const struct regset *regset,
-+                                     const struct regcache *regcache,
-+                                     int regnum, void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_collect_fpregset (regcache, regnum, fpregs);
-+}
- 
+-
  static void
  microblaze_linux_init_abi (struct gdbarch_info info,
                            struct gdbarch *gdbarch)
  {
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
-+                                microblaze_linux_collect_core_gregset);
 +  tdep->sizeof_gregset = 200;
 +
    linux_init_abi (info, gdbarch);
  
    set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    tramp_frame_prepend_unwinder (gdbarch,
                                 &microblaze_linux_sighandler_tramp_frame);
  
@@ -202,109 +171,50 @@ index 7ab650a1cc..e2225d778a 100644
 +  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
 +  set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 +
-+  set_gdbarch_regset_from_core_section (gdbarch,
-+                                       microblaze_regset_from_core_section);
-+
    /* Enable TLS support.  */
    set_gdbarch_fetch_tls_load_module_address (gdbarch,
                                               svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 730a2b281f..49713ea9b1 100644
+index 5972a69eb5f..7462a1f7ce6 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
-@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
- 
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
-+static CORE_ADDR
-+microblaze_store_arguments (struct regcache *regcache, int nargs,
-+                           struct value **args, CORE_ADDR sp,
-+                           int struct_return, CORE_ADDR struct_addr)
-+{
-+  error (_("store_arguments not implemented"));
-+  return sp;
-+}
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-                                    struct bp_target_info *bp_tgt)
-@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame,
-   return cache->base;
- }
- 
-+static const struct frame_unwind *
-+microblaze_frame_sniffer (struct frame_info *next_frame)
-+{
-+  return &microblaze_frame_unwind;
-+}
-+
- static const struct frame_base microblaze_frame_base =
- {
-   &microblaze_frame_unwind,
-@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
                                    tdesc_microblaze_with_stack_protect);
  }
  
 +void
-+microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++microblaze_supply_gregset (const struct regset *regset,
 +                        struct regcache *regcache,
 +                        int regnum, const void *gregs)
 +{
-+  unsigned int *regs = gregs;
++  const unsigned int *regs = (const unsigned int *)gregs;
 +  if (regnum >= 0)
-+    regcache_raw_supply (regcache, regnum, regs + regnum);
++    regcache->raw_supply (regnum, regs + regnum);
 +
 +  if (regnum == -1) {
 +    int i;
 +
 +    for (i = 0; i < 50; i++) {
-+      regcache_raw_supply (regcache, i, regs + i);
++      regcache->raw_supply (i, regs + i);
 +    }
 +  }
 +}
 +
 +
-+void
-+microblaze_collect_gregset (const struct microblaze_gregset *gregset,
-+                         const struct regcache *regcache,
-+                         int regnum, void *gregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_supply_fpregset (struct regcache *regcache,
-+                         int regnum, const void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_collect_fpregset (const struct regcache *regcache,
-+                          int regnum, void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+
 +/* Return the appropriate register set for the core section identified
 +   by SECT_NAME and SECT_SIZE.  */
 +
-+const struct regset *
-+microblaze_regset_from_core_section (struct gdbarch *gdbarch,
-+                                     const char *sect_name, size_t sect_size)
++static void
++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
++                                     iterate_over_regset_sections_cb *cb,
++                                     void *cb_data,
++                                     const struct regcache *regcache)
 +{
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
-+
-+  if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
-+    return tdep->gregset;
-+
-+  if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
-+    return tdep->fpregset;
++  cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
-+  return NULL;
++  cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
 +}
 +
 +
@@ -312,7 +222,7 @@ index 730a2b281f..49713ea9b1 100644
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  {
-@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    tdep = XCNEW (struct gdbarch_tdep);
    gdbarch = gdbarch_alloc (&info, tdep);
  
@@ -323,7 +233,7 @@ index 730a2b281f..49713ea9b1 100644
    set_gdbarch_long_double_bit (gdbarch, 128);
  
    set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
    if (tdesc_data != NULL)
      tdesc_use_registers (gdbarch, tdesc, tdesc_data);
@@ -331,14 +241,14 @@ index 730a2b281f..49713ea9b1 100644
 +
 +  /* If we have register sets, enable the generic core file support.  */
 +  if (tdep->gregset) {
-+      set_gdbarch_regset_from_core_section (gdbarch,
-+                                          microblaze_regset_from_core_section);
++    set_gdbarch_iterate_over_regset_sections (gdbarch,
++                                          microblaze_iterate_over_regset_sections);
 +  }
  
    return gdbarch;
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 63aab84ef6..02650f61d9 100644
+index db0772643dc..8f41ba19351 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -22,8 +22,22 @@
@@ -368,10 +278,10 @@ index 63aab84ef6..02650f61d9 100644
  #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
  #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
  
-+extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_supply_gregset (const struct regset *regset,
 +                                    struct regcache *regcache,
 +                                    int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_collect_gregset (const struct regset *regset,
 +                                     const struct regcache *regcache,
 +                                     int regnum, void *gregs);
 +extern void microblaze_supply_fpregset (struct regcache *regcache,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch
deleted file mode 100644
index ddb53a07..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 1c5dbbd272854e6e7912e2602bdfd78b64399319 Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Mon, 22 Jul 2013 11:16:05 +1000
-Subject: [PATCH 35/43] revert master-rebase changes to gdbserver
-
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gdb/gdbserver/configure.srv | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index d19d22b3a3..7a0be5b072 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,6 +210,13 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
-+  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_linux_regsets=yes
-+                       srv_linux_usrregs=yes
-+                       srv_linux_thread_db=yes
-+                       ;;
-   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
-                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
-                        srv_regobj="${srv_regobj} powerpc-cell32l.o"
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
index df5b3db3..79d08da9 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,7 +1,7 @@
-From e44a27432ce56bb48eb9785ffaae14bc3a12bd27 Mon Sep 17 00:00:00 2001
+From dc76254a84fa1086983aefe9db4d8f94b42efb9b Mon Sep 17 00:00:00 2001
 From: Nathan Rossi <nathan.rossi@petalogix.com>
 Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 34/43] Fix debug message when register is unavailable
+Subject: [PATCH 36/40] Fix debug message when register is unavailable
 
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
  1 file changed, 10 insertions(+), 3 deletions(-)
 
 diff --git a/gdb/frame.c b/gdb/frame.c
-index d8b5f819f1..49706dc97c 100644
+index ff27b9f00e9..bf931b370c9 100644
 --- a/gdb/frame.c
 +++ b/gdb/frame.c
-@@ -1227,12 +1227,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
+@@ -1263,12 +1263,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
           else
             {
               int i;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
deleted file mode 100644
index f2e5e951..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bd55e11af18006afb87a8b0fbd93bb0920354e0e Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 30 Apr 2018 17:09:55 +0530
-Subject: [PATCH 36/43] revert master-rebase changes to gdbserver , previous
- commit typo's
-
----
- gdb/gdbserver/Makefile.in | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 4ae13692a2..45d95e6cab 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -169,6 +169,7 @@ SFILES = \
-        $(srcdir)/linux-low.c \
-        $(srcdir)/linux-m32r-low.c \
-        $(srcdir)/linux-m68k-low.c \
-+        $(srcdir)/linux-microblaze-low.c \
-        $(srcdir)/linux-mips-low.c \
-        $(srcdir)/linux-nios2-low.c \
-        $(srcdir)/linux-ppc-low.c \
-@@ -226,6 +227,7 @@ SFILES = \
-        $(srcdir)/nat/linux-osdata.c \
-        $(srcdir)/nat/linux-personality.c \
-        $(srcdir)/nat/mips-linux-watch.c \
-+        $(srcdir)/nat/microblaze-linux.c \
-        $(srcdir)/nat/ppc-linux.c \
-        $(srcdir)/nat/fork-inferior.c \
-        $(srcdir)/target/waitstatus.c
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index e2b601b6..80b70fcc 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 988a9a41ac91ce3293af8708c1c88c51c48a2a72 Mon Sep 17 00:00:00 2001
+From 23376adc47cf72e46a1edf99e7fbc40164d39cd6 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/43] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
  configure.tgt
 
 For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -16,10 +16,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 622bd486b3..989523735b 100644
+index 2938fddfe82..ac2d35a9917 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -405,6 +405,7 @@ microblaze*-*-*)
+@@ -397,6 +397,7 @@ microblaze*-*-*)
         # Target: Xilinx MicroBlaze running standalone
         gdb_target_obs="microblaze-tdep.o"
         gdb_sim=../sim/microblaze/libsim.a
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
index 1a50f0a6..9360bc5a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
@@ -1,62 +1,43 @@
-From aa9cb6db79c663dc944cb67928d16e63f2a69f74 Mon Sep 17 00:00:00 2001
+From f34017e4cec8ad571accfd964187ab1f2db8de7f Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@petalogix.com>
 Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/43] Initial support for native gdb
+Subject: [PATCH 38/40] Initial support for native gdb
 
 microblaze: Follow PPC method of getting setting registers
 using PTRACE PEEK/POKE
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
-
-Conflicts:
-        gdb/Makefile.in
 ---
- gdb/Makefile.in                |   4 +-
+ gdb/Makefile.in                |   2 +
  gdb/config/microblaze/linux.mh |   9 +
  gdb/microblaze-linux-nat.c     | 431 +++++++++++++++++++++++++++++++++
- 3 files changed, 443 insertions(+), 1 deletion(-)
+ 3 files changed, 442 insertions(+)
  create mode 100644 gdb/config/microblaze/linux.mh
  create mode 100644 gdb/microblaze-linux-nat.c
 
 diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 215ef7933c..8c9a3c07c0 100644
+index 9ae9fe2d1e1..a44464b9830 100644
 --- a/gdb/Makefile.in
 +++ b/gdb/Makefile.in
-@@ -1316,6 +1316,7 @@ HFILES_NO_SRCDIR = \
+@@ -1328,6 +1328,7 @@ HFILES_NO_SRCDIR = \
         memory-map.h \
         memrange.h \
         microblaze-tdep.h \
-+        microblaze-linux-tdep.h \
++       microblaze-linux-tdep.h \
         mips-linux-tdep.h \
         mips-nbsd-tdep.h \
         mips-tdep.h \
-@@ -1349,6 +1350,7 @@ HFILES_NO_SRCDIR = \
-        prologue-value.h \
-        psympriv.h \
-        psymtab.h \
-+        ia64-hpux-tdep.h \
-        ravenscar-thread.h \
-        record.h \
-        record-full.h \
-@@ -2263,6 +2265,7 @@ ALLDEPFILES = \
+@@ -2207,6 +2208,7 @@ ALLDEPFILES = \
         m68k-tdep.c \
         microblaze-linux-tdep.c \
         microblaze-tdep.c \
-+        microblaze-linux-nat.c \ 
++       microblaze-linux-nat.c \
         mingw-hdep.c \
         mips-fbsd-nat.c \
         mips-fbsd-tdep.c \
-@@ -2365,7 +2368,6 @@ ALLDEPFILES = \
-        xtensa-linux-tdep.c \
-        xtensa-tdep.c \
-        xtensa-xtregs.c \
--       common/mingw-strerror.c \
-        common/posix-strerror.c
- 
- # Some files need explicit build rules (due to -Werror problems) or due
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
 new file mode 100644
-index 0000000000..a4eaf540e1
+index 00000000000..a4eaf540e1d
 --- /dev/null
 +++ b/gdb/config/microblaze/linux.mh
 @@ -0,0 +1,9 @@
@@ -71,7 +52,7 @@ index 0000000000..a4eaf540e1
 +LOADLIBES = -ldl $(RDYNAMIC)
 diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
 new file mode 100644
-index 0000000000..e9b8c9c522
+index 00000000000..e9b8c9c5221
 --- /dev/null
 +++ b/gdb/microblaze-linux-nat.c
 @@ -0,0 +1,431 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
index 0b1475a7..136291f2 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
@@ -1,20 +1,19 @@
-From 0b5b76d6c9757ebb1c9677772c24272957190345 Mon Sep 17 00:00:00 2001
+From 1a493a6fc3bebb50d9679a4d11709676f933ab04 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/43] Fixing the issues related to GDB-7.12 added all the
- required function which are new in 7.12 and removed few deprecated functions
- from 7.6
+Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
 
+added all the required function which are new in 7.12 and removed
+few deprecated functions from 7.6
 ---
  gdb/config/microblaze/linux.mh       |  4 +-
- gdb/gdbserver/configure.srv          |  3 +-
  gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-linux-tdep.c          | 68 +++++++++++++++++--
  gdb/microblaze-tdep.h                |  1 +
- 5 files changed, 153 insertions(+), 20 deletions(-)
+ gdbserver/configure.srv              |  3 +-
+ 4 files changed, 89 insertions(+), 16 deletions(-)
 
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1..74a53b854a 100644
+index a4eaf540e1d..74a53b854a4 100644
 --- a/gdb/config/microblaze/linux.mh
 +++ b/gdb/config/microblaze/linux.mh
 @@ -1,9 +1,11 @@
@@ -30,22 +29,8 @@ index a4eaf540e1..74a53b854a 100644
  NAT_CDEPS = $(srcdir)/proc-service.list
  
  LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index 7a0be5b072..c421790bd0 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -211,8 +211,7 @@ case "${target}" in
-                        srv_linux_thread_db=yes
-                        ;;
-   microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
--                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
--                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc58..a2733f3c21 100644
+index cba5d6fc585..a2733f3c21c 100644
 --- a/gdb/gdbserver/linux-microblaze-low.c
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -39,10 +39,11 @@ static int microblaze_regmap[] =
@@ -200,100 +185,8 @@ index cba5d6fc58..a2733f3c21 100644
 +{
 +  init_registers_microblaze ();
 +}
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e2225d778a..011e513941 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -29,13 +29,76 @@
- #include "regcache.h"
- #include "value.h"
- #include "osabi.h"
--#include "regset.h"
- #include "solib-svr4.h"
- #include "microblaze-tdep.h"
- #include "trad-frame.h"
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
-+
-+#include "gdb_assert.h"
-+
-+#ifndef REGSET_H
-+#define REGSET_H 1
-+
-+struct gdbarch;
-+struct regcache;
-+
-+/* Data structure for the supported register notes in a core file.  */
-+struct core_regset_section
-+{
-+  const char *sect_name;
-+  int size;
-+  const char *human_name;
-+};
-+
-+/* Data structure describing a register set.  */
-+
-+typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
-+                                    int, const void *, size_t);
-+typedef void (collect_regset_ftype) (const struct regset *,
-+                                     const struct regcache *,
-+                                     int, void *, size_t);
-+
-+struct regset
-+{
-+  /* Data pointer for private use by the methods below, presumably
-+     providing some sort of description of the register set.  */
-+  const void *descr;
-+
-+  /* Function supplying values in a register set to a register cache.  */
-+  supply_regset_ftype *supply_regset;
-+
-+  /* Function collecting values in a register set from a register cache.  */
-+  collect_regset_ftype *collect_regset;
-+
-+  /* Architecture associated with the register set.  */
-+  struct gdbarch *arch;
-+};
-+
-+#endif
-+
-+/* Allocate a fresh 'struct regset' whose supply_regset function is
-+   SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
-+   If the regset has no collect_regset function, pass NULL for
-+   COLLECT_REGSET.
-+
-+   The object returned is allocated on ARCH's obstack.  */
-+
-+struct regset *
-+regset_alloc (struct gdbarch *arch,
-+              supply_regset_ftype *supply_regset,
-+              collect_regset_ftype *collect_regset)
-+{
-+  struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
-+
-+  regset->arch = arch;
-+  regset->supply_regset = supply_regset;
-+  regset->collect_regset = collect_regset;
-+
-+  return regset;
-+}
- 
- static int microblaze_debug_flag = 0;
- 
-@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
- 
--  set_gdbarch_regset_from_core_section (gdbarch,
--                                       microblaze_regset_from_core_section);
--
-   /* Enable TLS support.  */
-   set_gdbarch_fetch_tls_load_module_address (gdbarch,
-                                              svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 02650f61d9..3777cbb6a8 100644
+index 8f41ba19351..d2112dc07e1 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -24,6 +24,7 @@
@@ -304,6 +197,20 @@ index 02650f61d9..3777cbb6a8 100644
     unsigned int gregs[32];
     unsigned int fpregs[32];
     unsigned int pregs[16];
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 13d5c6aff87..ff9ada71b0d 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
+                        srv_linux_thread_db=yes
+                        ;;
+   microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
+-                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
+-                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+                        srv_xmlfiles="microblaze-linux.xml"
+                        srv_linux_regsets=yes
+                        srv_linux_usrregs=yes
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
index 6582af01..1dc6b695 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
@@ -1,37 +1,33 @@
-From 34e572e123b166122cc54a8d8e66676c36515711 Mon Sep 17 00:00:00 2001
+From 928d8d1f05274ab6029e4da7d659312c769beded Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/43] [Patch, microblaze]: Adding 64 bit MB support Added new
- architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju
- Mekala <nmekala@xilix.com>
+Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
 
-Merged on top of binutils work.
+Added new architecture to Microblaze 64-bit support to GDB
 
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  bfd/archures.c                                |   2 +
  bfd/bfd-in2.h                                 |   2 +
- bfd/cpu-microblaze.c                          |  12 +-
- bfd/elf32-microblaze.c                        |  93 +-------
- gas/config/tc-microblaze.c                    |  16 +-
+ bfd/cpu-microblaze.c                          |  16 +-
+ bfd/elf32-microblaze.c                        |   9 +
+ gas/config/tc-microblaze.c                    |  14 ++
  gas/config/tc-microblaze.h                    |   4 +
- gdb/Makefile.in                               |   2 +-
  gdb/features/Makefile                         |   3 +
  gdb/features/microblaze-core.xml              |   6 +-
- gdb/features/microblaze-stack-protect.xml     |   4 +-
- gdb/features/microblaze-with-stack-protect.c  |   8 +-
+ gdb/features/microblaze-with-stack-protect.c  |   4 +-
  gdb/features/microblaze.c                     |   6 +-
- gdb/features/microblaze64-core.xml            |  69 ++++++
- gdb/features/microblaze64-stack-protect.xml   |  12 +
- .../microblaze64-with-stack-protect.c         |  79 +++++++
- .../microblaze64-with-stack-protect.xml       |  12 +
- gdb/features/microblaze64.c                   |  77 +++++++
- gdb/features/microblaze64.xml                 |  11 +
- gdb/microblaze-tdep.c                         | 207 ++++++++++++++++--
- gdb/microblaze-tdep.h                         |   8 +-
+ gdb/features/microblaze64-core.xml            |  69 +++++++
+ gdb/features/microblaze64-stack-protect.xml   |  12 ++
+ .../microblaze64-with-stack-protect.c         |  79 ++++++++
+ .../microblaze64-with-stack-protect.xml       |  12 ++
+ gdb/features/microblaze64.c                   |  77 ++++++++
+ gdb/features/microblaze64.xml                 |  11 ++
+ gdb/microblaze-linux-tdep.c                   |  29 ++-
+ gdb/microblaze-tdep.c                         | 176 ++++++++++++++++--
+ gdb/microblaze-tdep.h                         |   9 +-
  .../microblaze-with-stack-protect.dat         |   4 +-
- opcodes/microblaze-opc.h                      |   1 -
- 22 files changed, 504 insertions(+), 134 deletions(-)
+ 20 files changed, 504 insertions(+), 40 deletions(-)
  create mode 100644 gdb/features/microblaze64-core.xml
  create mode 100644 gdb/features/microblaze64-stack-protect.xml
  create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -40,10 +36,10 @@ Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
  create mode 100644 gdb/features/microblaze64.xml
 
 diff --git a/bfd/archures.c b/bfd/archures.c
-index 647cf0d8d4..3fdf7c3c0e 100644
+index 551ec8732f0..627d81261da 100644
 --- a/bfd/archures.c
 +++ b/bfd/archures.c
-@@ -512,6 +512,8 @@ DESCRIPTION
+@@ -522,6 +522,8 @@ DESCRIPTION
  .  bfd_arch_lm32,      {* Lattice Mico32.  *}
  .#define bfd_mach_lm32         1
  .  bfd_arch_microblaze,{* Xilinx MicroBlaze.  *}
@@ -53,10 +49,10 @@ index 647cf0d8d4..3fdf7c3c0e 100644
  .  bfd_arch_tilegx,    {* Tilera TILE-Gx.  *}
  .#define bfd_mach_tilepro      1
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 33c9cb62d9..db624c62b9 100644
+index 8902d9c7939..0e5071c235d 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -2411,6 +2411,8 @@ enum bfd_architecture
+@@ -1922,6 +1922,8 @@ enum bfd_architecture
    bfd_arch_lm32,      /* Lattice Mico32.  */
  #define bfd_mach_lm32          1
    bfd_arch_microblaze,/* Xilinx MicroBlaze.  */
@@ -66,7 +62,7 @@ index 33c9cb62d9..db624c62b9 100644
    bfd_arch_tilegx,    /* Tilera TILE-Gx.  */
  #define bfd_mach_tilepro       1
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index c91ba46f75..8e7bcead28 100644
+index f94dc2c177b..4dbc149155e 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
 @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
@@ -80,16 +76,23 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   32,                          /* 32 bits in an address.  */
-   8,                           /* 8 bits in a byte.  */
-   bfd_arch_microblaze,         /* Architecture.  */
+@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   0 /* Maximum offset of a reloc from the start of an insn.  */
+ },
+ {
+-  32,                          /* Bits in a word.  */
+-  32,                          /* Bits in an address.  */
+-  8,                           /* Bits in a byte.  */
++  32,                          /* 32 bits in a word.  */
++  32,                          /* 32 bits in an address.  */
++  8,                           /* 8 bits in a byte.  */
+   bfd_arch_microblaze,         /* Architecture number.  */
 -  0,                           /* Machine number - 0 for now.  */
 +  bfd_mach_microblaze,         /* 32 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -62,7 +62,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    32,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
    bfd_arch_microblaze,                 /* Architecture.  */
@@ -98,110 +101,20 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -76,8 +76,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   64,                          /* 32 bits in a word.  */
+@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    64,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
--  bfd_arch_microblaze,                 /* Architecture.  */
+   bfd_arch_microblaze,                 /* Architecture.  */
 -  0,                           /* Machine number - 0 for now.  */
-+  bfd_arch_microblaze,         /* Architecture.  */
 +  bfd_mach_microblaze64,       /* 64 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index c280431df6..f9996eae12 100644
+index a4b15882d77..d33f709b8b3 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -767,87 +767,6 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
-   return _bfd_elf_is_local_label_name (abfd, name);
- }
- 
--/* Support for core dump NOTE sections.  */
--static bfd_boolean
--microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
--{
--  int offset;
--  unsigned int size;
--
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 228:         /* Linux/MicroBlaze */
--        /* pr_cursig */
--        elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
--
--        /* pr_pid */
--        elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
--
--        /* pr_reg */
--        offset = 72;
--        size = 50 * 4;
--
--        break;
--    }
--
--  /* Make a ".reg/999" section.  */
--  return _bfd_elfcore_make_pseudosection (abfd, ".reg",
--                                          size, note->descpos + offset);
--}
--
--static bfd_boolean
--microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
--{
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 128:         /* Linux/MicroBlaze elf_prpsinfo */
--        elf_tdata (abfd)->core->program
--         = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
--        elf_tdata (abfd)->core->command
--         = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
--    }
--
--  /* Note that for some reason, a spurious space is tacked
--     onto the end of the args in some (at least one anyway)
--     implementations, so strip it off if it exists.  */
--
--  {
--    char *command = elf_tdata (abfd)->core->command;
--    int n = strlen (command);
--
--    if (0 < n && command[n - 1] == ' ')
--      command[n - 1] = '\0';
--  }
--
--  return TRUE;
--}
--
--/* The microblaze linker (like many others) needs to keep track of
--   the number of relocs that it decides to copy as dynamic relocs in
--   check_relocs for each symbol. This is so that it can later discard
--   them if they are found to be unnecessary.  We store the information
--   in a field extending the regular ELF linker hash table.  */
--
--struct elf32_mb_dyn_relocs
--{
--  struct elf32_mb_dyn_relocs *next;
--
--  /* The input section of the reloc.  */
--  asection *sec;
--
--  /* Total number of relocs copied for the input section.  */
--  bfd_size_type count;
--
--  /* Number of pc-relative relocs copied for the input section.  */
--  bfd_size_type pc_count;
--};
--
- /* ELF linker hash entry.  */
- 
- struct elf32_mb_link_hash_entry
-@@ -3683,6 +3602,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
+@@ -3585,6 +3585,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
    return TRUE;
  }
  
@@ -216,42 +129,30 @@ index c280431df6..f9996eae12 100644
  /* Hook called by the linker routine which adds symbols from an object
     file.  We use it to put .comm items in .sbss, and not .bss.  */
  
-@@ -3752,8 +3679,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define elf_backend_finish_dynamic_symbol      microblaze_elf_finish_dynamic_symbol
- #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
- #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
--
--#define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
--#define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
+@@ -3657,5 +3665,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+ 
+ #define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
+ #define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
 +#define elf_backend_object_p                   elf_microblaze_object_p
  
  #include "elf32-target.h"
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3ff6a14baf..95a1e69729 100644
+index 62daa56b47a..b22f6de2df6 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -426,7 +426,10 @@ md_begin (void)
-   const char *prev_name = "";
+@@ -437,6 +437,11 @@ md_begin (void)
  
    opcode_hash_control = hash_new ();
--
+ 
 +  if (microblaze_arch_size == 64)
 +    bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze64);
 +  else
 +    bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze);
++
    /* Insert unique names into hash table.  */
-   for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
+   for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
      {
-@@ -1348,7 +1351,7 @@ md_assemble (char * str)
-            if ((temp != 0) && (temp != 0xFFFF8000))
-             {
-                /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
-+               opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
-                if (opcode1 == NULL)
-                  {
-                    as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -3431,6 +3434,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -3494,6 +3499,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
  }
  
  
@@ -268,7 +169,7 @@ index 3ff6a14baf..95a1e69729 100644
     found a machine specific op in an expression,
     then we create relocs accordingly.  */
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 9d38d2ced5..13f58917e7 100644
+index 7435a70ef5e..90c2a4a5558 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -23,6 +23,10 @@
@@ -282,34 +183,21 @@ index 9d38d2ced5..13f58917e7 100644
  #ifndef TARGET_BYTES_BIG_ENDIAN
  /* Used to initialise target_big_endian.  */
  #define TARGET_BYTES_BIG_ENDIAN 1
-diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 8c9a3c07c0..15387197c7 100644
---- a/gdb/Makefile.in
-+++ b/gdb/Makefile.in
-@@ -2265,7 +2265,7 @@ ALLDEPFILES = \
-        m68k-tdep.c \
-        microblaze-linux-tdep.c \
-        microblaze-tdep.c \
--        microblaze-linux-nat.c \ 
-+       microblaze-linux-nat.c \
-        mingw-hdep.c \
-        mips-fbsd-nat.c \
-        mips-fbsd-tdep.c \
 diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index 3d84ca09a1..fdeec19753 100644
+index d0af9a47b48..2c3cf91b69f 100644
 --- a/gdb/features/Makefile
 +++ b/gdb/features/Makefile
-@@ -64,6 +64,7 @@ WHICH = aarch64 \
-        i386/x32-avx-avx512-linux \
-        mips-linux mips-dsp-linux \
+@@ -46,6 +46,7 @@
+ # List of .dat files to create in ../regformats/
+ WHICH = mips-linux mips-dsp-linux \
         microblaze-with-stack-protect \
 +       microblaze64-with-stack-protect \
         mips64-linux mips64-dsp-linux \
         nios2-linux \
         rs6000/powerpc-32 \
-@@ -135,7 +136,9 @@ XMLTOC = \
-        arm/arm-with-vfpv2.xml \
-        arm/arm-with-vfpv3.xml \
+@@ -107,7 +108,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH))
+ # to make on the command line.
+ XMLTOC = \
         microblaze-with-stack-protect.xml \
 +       microblaze64-with-stack-protect.xml \
         microblaze.xml \
@@ -318,7 +206,7 @@ index 3d84ca09a1..fdeec19753 100644
         mips-linux.xml \
         mips64-dsp-linux.xml \
 diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 88c93e5d66..5bc3e49f84 100644
+index f272650a41b..d1f2282fd1e 100644
 --- a/gdb/features/microblaze-core.xml
 +++ b/gdb/features/microblaze-core.xml
 @@ -8,7 +8,7 @@
@@ -343,24 +231,11 @@ index 88c93e5d66..5bc3e49f84 100644
    <reg name="rtlbsx" bitsize="32"/>
    <reg name="rtlblo" bitsize="32"/>
    <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index 870c148bb0..a7f27b903c 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="rslr" bitsize="32"/>
--  <reg name="rshr" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
++  <reg name="rslr" bitsize="32"/>
++  <reg name="rshr" bitsize="32"/>
  </feature>
 diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa19887..609934e2b4 100644
+index b39aa198874..ab162fd2588 100644
 --- a/gdb/features/microblaze-with-stack-protect.c
 +++ b/gdb/features/microblaze-with-stack-protect.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
@@ -381,19 +256,8 @@ index b39aa19887..609934e2b4 100644
    tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
 diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc0770..ceb98ca8b8 100644
+index 6c86fc07700..7919ac96e62 100644
 --- a/gdb/features/microblaze.c
 +++ b/gdb/features/microblaze.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
@@ -418,14 +282,14 @@ index 6c86fc0770..ceb98ca8b8 100644
    tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
  
    tdesc_microblaze = result;
  }
 diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
 new file mode 100644
-index 0000000000..96e99e2fb2
+index 00000000000..b9adadfade6
 --- /dev/null
 +++ b/gdb/features/microblaze64-core.xml
 @@ -0,0 +1,69 @@
@@ -495,12 +359,12 @@ index 0000000000..96e99e2fb2
 +  <reg name="rtlbsx" bitsize="32"/>
 +  <reg name="rtlblo" bitsize="32"/>
 +  <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
 new file mode 100644
-index 0000000000..1bbf5fc3ce
+index 00000000000..9d7ea8b9fd7
 --- /dev/null
 +++ b/gdb/features/microblaze64-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -513,12 +377,12 @@ index 0000000000..1bbf5fc3ce
 +
 +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
 +<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
 new file mode 100644
-index 0000000000..f448c9a749
+index 00000000000..249cb534daa
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.c
 @@ -0,0 +1,79 @@
@@ -596,14 +460,14 @@ index 0000000000..f448c9a749
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
 +
 +  feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64_with_stack_protect = result;
 +}
 diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
 new file mode 100644
-index 0000000000..0e9f01611f
+index 00000000000..0e9f01611f3
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -621,7 +485,7 @@ index 0000000000..0e9f01611f
 +</target>
 diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
 new file mode 100644
-index 0000000000..1aa37c4512
+index 00000000000..5d3e2c8cd91
 --- /dev/null
 +++ b/gdb/features/microblaze64.c
 @@ -0,0 +1,77 @@
@@ -697,14 +561,14 @@ index 0000000000..1aa37c4512
 +  tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64 = result;
 +}
 diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
 new file mode 100644
-index 0000000000..515d18e65c
+index 00000000000..515d18e65cf
 --- /dev/null
 +++ b/gdb/features/microblaze64.xml
 @@ -0,0 +1,11 @@
@@ -719,8 +583,55 @@ index 0000000000..515d18e65c
 +<target>
 +  <xi:include href="microblaze64-core.xml"/>
 +</target>
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index 0d5c08d24f6..a9a0eef3854 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ 
+   /* BFD target for core files.  */
+   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    }
+   else
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    }
++
++  switch (info.bfd_arch_info->mach)
++    {
++    case bfd_mach_microblaze64:
++      set_gdbarch_ptr_bit (gdbarch, 64);
++    break;
++    }
+ 
+ 
+   /* Shared library handling.  */
+@@ -177,6 +198,8 @@ void _initialize_microblaze_linux_tdep ();
+ void
+ _initialize_microblaze_linux_tdep ()
+ {
+-  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
++                         microblaze_linux_init_abi);
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
+                          microblaze_linux_init_abi);
+ }
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 49713ea9b1..0605283c9e 100644
+index 7462a1f7ce6..5dd0b3ea532 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -40,7 +40,9 @@
@@ -733,57 +644,34 @@ index 49713ea9b1..0605283c9e 100644
  
  /* Instruction macros used for analyzing the prologue.  */
  /* This set of instruction macros need to be changed whenever the
-@@ -75,12 +77,13 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "rslr", "rshr"
-+  "slr", "shr"
+@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
  };
  
  #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
- 
+-
++
  static unsigned int microblaze_debug_flag = 0;
-+int reg_size = 4;
++int MICROBLAZE_REGISTER_SIZE = 4;
  
  static void ATTRIBUTE_PRINTF (1, 2)
  microblaze_debug (const char *fmt, ...)
-@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs,
-   error (_("store_arguments not implemented"));
-   return sp;
- }
+@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
 +#if 0
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
                                     struct bp_target_info *bp_tgt)
-@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
--  struct cleanup *cleanup;
-+  //struct cleanup *cleanup;
+@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
  
-   /* Determine appropriate breakpoint contents and size for this address.  */
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-     error (_("Software breakpoints not implemented for this target."));
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  scoped_restore 
-+    cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    return val;
  }
- 
 +#endif
+ 
  /* Allocate and initialize a frame cache.  */
  
- static struct microblaze_frame_cache *
-@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
                                  gdb_byte *valbuf)
  {
    gdb_byte buf[8];
@@ -791,19 +679,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF.  */
    switch (TYPE_LENGTH (type))
      {
-       case 1:  /* return last byte in the register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
-+       memcpy(valbuf, buf + reg_size - 1, 1);
-        return;
-       case 2:  /* return last 2 bytes in register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
-+       memcpy(valbuf, buf + reg_size - 2, 2);
-        return;
-       case 4:  /* for sizes 4 or 8, copy the required length.  */
-       case 8:
-@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
    return (TYPE_LENGTH (type) == 16);
  }
  
@@ -915,16 +791,14 @@ index 49713ea9b1..0605283c9e 100644
 +}
 +#endif
 +
-+static void
-+microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
-+{
-+  regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
-+}
-+
  static int dwarf2_to_reg_map[78] =
  { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
    4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
-@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+   return -1;
+ }
+ 
++#if 0
  static void
  microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
  {
@@ -940,46 +814,27 @@ index 49713ea9b1..0605283c9e 100644
 -                                  tdesc_microblaze_with_stack_protect);
 +                                  tdesc_microblaze64_with_stack_protect);
  }
++#endif
  
  void
-@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ microblaze_supply_gregset (const struct regset *regset,
                          struct regcache *regcache,
                          int regnum, const void *gregs)
  {
--  unsigned int *regs = gregs;
+-  const unsigned int *regs = (const unsigned int *)gregs;
 +  const gdb_byte *regs = (const gdb_byte *) gregs;
    if (regnum >= 0)
--    regcache_raw_supply (regcache, regnum, regs + regnum);
-+    regcache->raw_supply (regnum, regs + regnum);
- 
-   if (regnum == -1) {
-     int i;
+     regcache->raw_supply (regnum, regs + regnum);
  
-     for (i = 0; i < 50; i++) {
--      regcache_raw_supply (regcache, i, regs + i);
-+      regcache->raw_supply (regnum, regs + i);
-     }
-   }
+@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
  }
-@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- }
- 
  
-+static void
-+make_regs (struct gdbarch *arch)
-+{
-+  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-+  int mach = gdbarch_bfd_arch_info (arch)->mach;
-+  
-+  if (mach == bfd_mach_microblaze64)
-+    {
-+      set_gdbarch_ptr_bit (arch, 64);
-+    }
-+}
  
+-
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    if (arches != NULL)
      return arches->gdbarch;
    if (tdesc == NULL)
@@ -989,7 +844,7 @@ index 49713ea9b1..0605283c9e 100644
 +      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) 
 +        {
 +         tdesc = tdesc_microblaze64;
-+          reg_size = 8;
++          MICROBLAZE_REGISTER_SIZE = 8;
 +       }
 +      else
 +       tdesc = tdesc_microblaze;
@@ -997,7 +852,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Check any target description for validity.  */
    if (tdesc_has_registers (tdesc))
      {
-@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        int valid_p;
        int i;
  
@@ -1038,7 +893,7 @@ index 49713ea9b1..0605283c9e 100644
          }
  
        if (!valid_p)
-@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            tdesc_data_cleanup (tdesc_data);
            return NULL;
          }
@@ -1046,7 +901,7 @@ index 49713ea9b1..0605283c9e 100644
      }
  
    /* Allocate space for the new architecture.  */
-@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    /* Register numbers of various important registers.  */
    set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); 
    set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); 
@@ -1064,7 +919,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Map Dwarf2 registers to GDB registers.  */
    set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
  
-@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
                                        microblaze_breakpoint::kind_from_pc);
    set_gdbarch_sw_breakpoint_from_kind (gdbarch,
                                        microblaze_breakpoint::bp_from_kind);
@@ -1082,21 +937,7 @@ index 49713ea9b1..0605283c9e 100644
  
    frame_base_set_default (gdbarch, &microblaze_frame_base);
  
-@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-     tdesc_use_registers (gdbarch, tdesc, tdesc_data);
-   //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
- 
--  /* If we have register sets, enable the generic core file support.  */
-+  /* If we have register sets, enable the generic core file support.  
-   if (tdep->gregset) {
-       set_gdbarch_regset_from_core_section (gdbarch,
-                                           microblaze_regset_from_core_section);
--  }
-+  }*/
- 
-   return gdbarch;
- }
-@@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void)
+@@ -841,6 +981,8 @@ _initialize_microblaze_tdep ()
  
    initialize_tdesc_microblaze_with_stack_protect ();
    initialize_tdesc_microblaze ();
@@ -1106,7 +947,7 @@ index 49713ea9b1..0605283c9e 100644
    add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
                              &microblaze_debug_flag, _("\
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 3777cbb6a8..55f5dd1962 100644
+index d2112dc07e1..bd03e969b9b 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -27,7 +27,7 @@ struct microblaze_gregset
@@ -1130,17 +971,18 @@ index 3777cbb6a8..55f5dd1962 100644
  };
  
  struct microblaze_frame_cache
-@@ -128,7 +128,7 @@ struct microblaze_frame_cache
+@@ -128,7 +128,8 @@ struct microblaze_frame_cache
    struct trad_frame_saved_reg *saved_regs;
  };
  /* All registers are 32 bits.  */
 -#define MICROBLAZE_REGISTER_SIZE 4
-+//#define MICROBLAZE_REGISTER_SIZE 8
++extern int microblaze_reg_size;
++#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
  
  /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
     Only used for native debugging.  */
 diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd..450e321d49 100644
+index 8040a7b3fd0..450e321d49e 100644
 --- a/gdb/regformats/microblaze-with-stack-protect.dat
 +++ b/gdb/regformats/microblaze-with-stack-protect.dat
 @@ -60,5 +60,5 @@ expedite:r1,rpc
@@ -1151,18 +993,6 @@ index 8040a7b3fd..450e321d49 100644
 -32:rshr
 +32:slr
 +32:shr
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index bd9d91cd57..12d4456bc2 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -134,7 +134,6 @@
- #define ORLI_MASK 0xA0000000
- #define XORLI_MASK 0xA8000000
- 
--
- /* New Mask for msrset, msrclr insns.  */
- #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
- /* Mask for mbar insn.  */
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
deleted file mode 100644
index 1a0153b8..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 07757f455d343beb50ac04815c77b04075bf9534 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 12 Dec 2019 14:56:17 +0530
-Subject: [PATCH 41/43] [patch,MicroBlaze] : porting GDB for linux
-
----
- gdb/features/microblaze-linux.xml | 12 ++++++++++
- gdb/gdbserver/Makefile.in         |  2 ++
- gdb/gdbserver/configure.srv       |  3 ++-
- gdb/microblaze-linux-tdep.c       | 39 ++++++++++++++++++++++++-------
- 4 files changed, 47 insertions(+), 9 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
-
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
-new file mode 100644
-index 0000000000..8983e66eb3
---- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
-+
-+     Copying and distribution of this file, with or without modification,
-+     are permitted in any medium without royalty provided the copyright
-+     notice and this notice are preserved.  -->
-+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+  <osabi>GNU/Linux</osabi>
-+  <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 45d95e6cab..7c8fa3c246 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -633,6 +633,8 @@ common/%.o: ../common/%.c
- 
- %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
-        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
- 
- #
- # Dependency tracking.
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index c421790bd0..6ad0ac9fa6 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,8 +210,9 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
--  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
-                        srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-+                       srv_xmlfiles="microblaze-linux.xml"
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 011e513941..e3d2a7508d 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -41,7 +41,7 @@
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--
-+int MICROBLAZE_REGISTER_SIZE=4;
- struct gdbarch;
- struct regcache;
- 
-@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
-        va_end (args);
-     }
- }
--
-+#if 0
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
-                                           struct bp_target_info *bp_tgt)
-@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   do_cleanups (cleanup);
-   return val;
- }
-+#endif
- 
- static void
- microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
-@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   linux_init_abi (info, gdbarch);
- 
--  set_gdbarch_memory_remove_breakpoint (gdbarch,
--                                       microblaze_linux_memory_remove_breakpoint);
-+//  set_gdbarch_memory_remove_breakpoint (gdbarch,
-+//                                     microblaze_linux_memory_remove_breakpoint);
- 
-   /* Shared library handling.  */
-   set_solib_svr4_fetch_link_map_offsets (gdbarch,
-@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   /* BFD target for core files.  */
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    }
-   else
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    }
- 
-+  switch (info.bfd_arch_info->mach)
-+    {
-+    case bfd_mach_microblaze64:
-+      set_gdbarch_ptr_bit (gdbarch, 64);
-+    break;
-+    }
- 
-   /* Shared library handling.  */
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-@@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- void
- _initialize_microblaze_linux_tdep (void)
- {
--  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
-+                         microblaze_linux_init_abi);
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
-                          microblaze_linux_init_abi);
- }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
deleted file mode 100644
index ad8dcb53..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From c2a4667e87bd610a48a6690fcc9fdc6761398bcf Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 19 Dec 2019 12:22:04 +0530
-Subject: [PATCH 42/43] Correcting the register names from slr & shr to rslr &
- rshr
-
----
- gdb/features/microblaze-core.xml               | 4 ++--
- gdb/features/microblaze-stack-protect.xml      | 4 ++--
- gdb/features/microblaze-with-stack-protect.c   | 4 ++--
- gdb/features/microblaze.c                      | 4 ++--
- gdb/features/microblaze64-core.xml             | 4 ++--
- gdb/features/microblaze64-stack-protect.xml    | 4 ++--
- gdb/features/microblaze64-with-stack-protect.c | 4 ++--
- gdb/features/microblaze64.c                    | 4 ++--
- gdb/microblaze-tdep.c                          | 2 +-
- 9 files changed, 17 insertions(+), 17 deletions(-)
-
-diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 5bc3e49f84..6f73f4eb84 100644
---- a/gdb/features/microblaze-core.xml
-+++ b/gdb/features/microblaze-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index a7f27b903c..870c148bb0 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index 609934e2b4..ab162fd258 100644
---- a/gdb/features/microblaze-with-stack-protect.c
-+++ b/gdb/features/microblaze-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index ceb98ca8b8..7919ac96e6 100644
---- a/gdb/features/microblaze.c
-+++ b/gdb/features/microblaze.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze = result;
- }
-diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
-index 96e99e2fb2..b9adadfade 100644
---- a/gdb/features/microblaze64-core.xml
-+++ b/gdb/features/microblaze64-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
-index 1bbf5fc3ce..9d7ea8b9fd 100644
---- a/gdb/features/microblaze64-stack-protect.xml
-+++ b/gdb/features/microblaze64-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze64.stack-protect">
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
-index f448c9a749..249cb534da 100644
---- a/gdb/features/microblaze64-with-stack-protect.c
-+++ b/gdb/features/microblaze64-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
-index 1aa37c4512..5d3e2c8cd9 100644
---- a/gdb/features/microblaze64.c
-+++ b/gdb/features/microblaze64.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64 = result;
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 0605283c9e..7a0c2527f4 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -77,7 +77,7 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "slr", "shr"
-+  "rslr", "rshr"
- };
- 
- #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
deleted file mode 100644
index 930e161c..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From 9562530bc48c76d8f824b8f4901ad90dd2969086 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Fri, 17 Jan 2020 15:45:48 +0530
-Subject: [PATCH 43/43] Removing the header "gdb_assert.h" from MB target file
-
----
- gdb/microblaze-linux-tdep.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e3d2a7508d..5ef937219c 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -37,7 +37,6 @@
- #include "linux-tdep.h"
- #include "glibc-tdep.h"
- 
--#include "gdb_assert.h"
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
deleted file mode 100644
index 29e198cd..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
+++ /dev/null
@@ -1,364 +0,0 @@
-From 4f0e06249d23629e1d56b296e7a040b6968484e9 Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@xilinx.com>
-Date: Mon, 20 Jan 2020 12:48:13 -0800
-Subject: [PATCH 44/45] gdb/microblaze-linux-nat.c: Fix target compilation of
- gdb
-
-Add the nat to the configure file
-
-Remove gdb_assert.h and gdb_string.h.
-
-Adjust include for opcodes as well.
-
-Update to match latest style of components, similar to ppc-linux-nat.c
-
-Update:
-  get_regcache_arch(regcache) to regcache->arch()
-  regcache_raw_supply(regcache, ...) to regcache->raw_supply(...)
-  regcache_raw_collect(regcache, ...) to regcache->raw_collect(...)
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
----
- gdb/configure.nat          |   4 +
- gdb/microblaze-linux-nat.c | 149 +++++++++++++------------------------
- gdb/microblaze-tdep.c      |   3 +-
- 3 files changed, 57 insertions(+), 99 deletions(-)
-
-diff --git a/gdb/configure.nat b/gdb/configure.nat
-index 3118263ac6..b8dc7398a5 100644
---- a/gdb/configure.nat
-+++ b/gdb/configure.nat
-@@ -260,6 +260,10 @@ case ${gdb_host} in
-                # Host: Motorola m68k running GNU/Linux.
-                NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o"
-                ;;
-+           microblaze*)
-+               # Host: Microblaze, running Linux
-+               NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o"
-+               ;;
-            mips)
-                # Host: Linux/MIPS
-                NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
-diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
-index e9b8c9c522..e09a86bb3f 100644
---- a/gdb/microblaze-linux-nat.c
-+++ b/gdb/microblaze-linux-nat.c
-@@ -36,11 +36,9 @@
- #include "dwarf2-frame.h"
- #include "osabi.h"
- 
--#include "gdb_assert.h"
--#include "gdb_string.h"
- #include "target-descriptions.h"
--#include "opcodes/microblaze-opcm.h"
--#include "opcodes/microblaze-dis.h"
-+#include "../opcodes/microblaze-opcm.h"
-+#include "../opcodes/microblaze-dis.h"
- 
- #include "linux-nat.h"
- #include "target-descriptions.h"
-@@ -61,34 +59,27 @@
- /* Defines ps_err_e, struct ps_prochandle.  */
- #include "gdb_proc_service.h"
- 
--/* On GNU/Linux, threads are implemented as pseudo-processes, in which
--   case we may be tracing more than one process at a time.  In that
--   case, inferior_ptid will contain the main process ID and the
--   individual thread (process) ID.  get_thread_id () is used to get
--   the thread id if it's available, and the process id otherwise.  */
--
--int
--get_thread_id (ptid_t ptid)
--{
--  int tid = TIDGET (ptid);
--  if (0 == tid)
--    tid = PIDGET (ptid);
--  return tid;
--}
--
--#define GET_THREAD_ID(PTID)    get_thread_id (PTID)
--
- /* Non-zero if our kernel may support the PTRACE_GETREGS and
-    PTRACE_SETREGS requests, for reading and writing the
-    general-purpose registers.  Zero if we've tried one of
-    them and gotten an error.  */
- int have_ptrace_getsetregs = 1;
- 
-+struct microblaze_linux_nat_target final : public linux_nat_target
-+{
-+  /* Add our register access methods.  */
-+  void fetch_registers (struct regcache *, int) override;
-+  void store_registers (struct regcache *, int) override;
-+
-+  const struct target_desc *read_description () override;
-+};
-+
-+static microblaze_linux_nat_target the_microblaze_linux_nat_target;
-+
- static int
- microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- {
-   int u_addr = -1;
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
-      interface, and not the wordsize of the program's ABI.  */
-   int wordsize = sizeof (long);
-@@ -105,18 +96,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- static void
- fetch_register (struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int bytes_transferred;
--  unsigned int offset;         /* Offset of registers within the u area.  */
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-   {
-     memset (buf, '\0', register_size (gdbarch, regno));   /* Supply zeroes */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-     return;
-   }
- 
-@@ -149,14 +138,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
-   {
-     /* Little-endian values are always found at the left end of the
-        bytes transferred.  */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values are found at the right end of the bytes
-        transferred.  */
-     size_t padding = (bytes_transferred - register_size (gdbarch, regno));
--    regcache_raw_supply (regcache, regno, buf + padding);
-+    regcache->raw_supply (regno, buf + padding);
-   }
-   else
-     internal_error (__FILE__, __LINE__,
-@@ -175,8 +164,6 @@ fetch_register (struct regcache *regcache, int tid, int regno)
- static int
- fetch_all_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -204,8 +191,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid)
- static void
- fetch_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -219,17 +204,29 @@ fetch_gp_regs (struct regcache *regcache, int tid)
-     fetch_register (regcache, tid, i);
- }
- 
-+/* Fetch registers from the child process.  Fetch all registers if
-+   regno == -1, otherwise fetch all general registers or all floating
-+   point registers depending upon the value of regno.  */
-+void
-+microblaze_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
-+{
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
-+
-+  if (regno == -1)
-+    fetch_gp_regs (regcache, tid);
-+  else
-+    fetch_register (regcache, tid, regno);
-+}
- 
- static void
- store_register (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int i;
-   size_t bytes_to_transfer;
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-     return;
-@@ -242,13 +239,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
-   {
-     /* Little-endian values always sit at the left end of the buffer.  */
--    regcache_raw_collect (regcache, regno, buf);
-+    regcache->raw_collect (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values sit at the right end of the buffer.  */
-     size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
--    regcache_raw_collect (regcache, regno, buf + padding);
-+    regcache->raw_collect (regno, buf + padding);
-   }
- 
-   for (i = 0; i < bytes_to_transfer; i += sizeof (long))
-@@ -281,8 +278,6 @@ store_register (const struct regcache *regcache, int tid, int regno)
- static int
- store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -319,8 +314,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- static void
- store_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -335,33 +328,10 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno)
- }
- 
- 
--/* Fetch registers from the child process.  Fetch all registers if
--   regno == -1, otherwise fetch all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
--{
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
--
--  if (regno == -1)
--    fetch_gp_regs (regcache, tid);
--  else
--    fetch_register (regcache, tid, regno);
--}
--
--/* Store registers back into the inferior.  Store all registers if
--   regno == -1, otherwise store all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_store_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
-+void
-+microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno)
- {
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
- 
-   if (regno >= 0)
-     store_register (regcache, tid, regno);
-@@ -373,59 +343,44 @@ microblaze_linux_store_inferior_registers (struct target_ops *ops,
-    thread debugging.  */
- 
- void
--fill_gregset (const struct regcache *regcache,
--             gdb_gregset_t *gregsetp, int regno)
-+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
- {
--  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
-+  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
- }
- 
- void
--supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
-+fill_gregset (const struct regcache *regcache,
-+             gdb_gregset_t *gregsetp, int regno)
- {
--  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
-+  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
- }
- 
- void
--fill_fpregset (const struct regcache *regcache,
--             gdb_fpregset_t *fpregsetp, int regno)
-+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
- {
-   /* FIXME. */
-+  return;
- }
- 
- void
--supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
-+fill_fpregset (const struct regcache *regcache,
-+             gdb_fpregset_t *fpregsetp, int regno)
- {
-   /* FIXME. */
-+  return;
- }
- 
--static const struct target_desc *
--microblaze_linux_read_description (struct target_ops *ops)
-+const struct target_desc *
-+microblaze_linux_nat_target::read_description ()
- {
--  CORE_ADDR microblaze_hwcap = 0;
--
--  if (target_auxv_search (ops, AT_HWCAP, &microblaze_hwcap) != 1)
--    return NULL;
--
-   return NULL;
- }
- 
--
--void _initialize_microblaze_linux_nat (void);
--
- void
- _initialize_microblaze_linux_nat (void)
- {
--  struct target_ops *t;
--
--  /* Fill in the generic GNU/Linux methods.  */
--  t = linux_target ();
--
--  /* Add our register access methods.  */
--  t->to_fetch_registers = microblaze_linux_fetch_inferior_registers;
--  t->to_store_registers = microblaze_linux_store_inferior_registers;
--
--  t->to_read_description = microblaze_linux_read_description;
-+  linux_target = &the_microblaze_linux_nat_target;
- 
-   /* Register the target.  */
--  linux_nat_add_target (t);
-+  add_inf_child_target (linux_target);
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 7a0c2527f4..23deb24d26 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -657,7 +657,7 @@ static std::vector<CORE_ADDR>
- microblaze_software_single_step (struct regcache *regcache)
- {
- //  struct gdbarch *arch = get_frame_arch(frame);
--  struct gdbarch *arch = get_regcache_arch (regcache);
-+  struct gdbarch *arch = regcache->arch();
-   struct address_space *aspace = get_regcache_aspace (regcache);
- //  struct address_space *aspace = get_frame_address_space (frame);
-   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-@@ -876,7 +876,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- static void
- make_regs (struct gdbarch *arch)
- {
--  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-   int mach = gdbarch_bfd_arch_info (arch)->mach;
-   
-   if (mach == bfd_mach_microblaze64)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
deleted file mode 100644
index 7677ab35..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 9c8f4f1c11d324f0788da3a077b06c6bc9e6f2b8 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 16 Apr 2020 18:08:58 +0530
-Subject: [PATCH]  [Patch,MicroBlaze m64] : This patch will remove imml 0 and
- imml -1 instructions when the offset is less than 16 bit for Type A branch EA
- instructions.
-
----
- gas/config/tc-microblaze.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 088eae73a9..12fd145a03 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,9 +2150,7 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
--                streq (name, "breaid") || 
--                streq (name, "brai") || streq (name, "braid")))
-+          if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
-             opc = NULL;
-@@ -2920,7 +2918,7 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
-       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
--            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
-         {
-           /* Generate the imm instruction.  */
-            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch
deleted file mode 100644
index 93314594..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 2ab2547493c871b452adb2cb8754691b0adf5f03 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 19 Apr 2020 21:17:03 +0530
-Subject: [PATCH 47/49] [Patch,MicroBlaze] : commit for triggering build to
- remove imml for Type A BEA insns.
-
----
- gas/config/tc-microblaze.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 12fd145a03..7ae0dbc018 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,6 +2150,7 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
-+/* removal imml 0 and imml -1 for bea type A insns */
-           if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch
deleted file mode 100644
index 30fbbe7b..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 9b61edf44e44303f1937e98a02a7d78f750a9b24 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 30 Apr 2020 19:40:16 +0530
-Subject: [PATCH 48/49] [Patch,MicroBlaze] : Adding more description to the
- imml removal for bea type B insns.
-
----
- gas/config/tc-microblaze.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 7ae0dbc018..1d37af54bf 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,7 +2150,8 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--/* removal imml 0 and imml -1 for bea type A insns */
-+/* removal of imml 0 and imml -1 for bea type A insns.
-+if offset is 16 bit then imml instructions are redundant */
-           if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
deleted file mode 100644
index b751f294..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ba660177916ffb8a0a9882c27246a201dbc218bd Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Jun 2020 21:20:26 +0530
-Subject: [PATCH 49/49] [Patch,MicroBlaze] : improper address mapping of
- PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't
- need to override PROVIDE symbols if symbols are defined in libraries and
- linker so I am disabling override for PROVIDE symbols.
-
----
- ld/ldlang.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/ld/ldlang.c b/ld/ldlang.c
-index 33f6bda292..a0b404c04d 100644
---- a/ld/ldlang.c
-+++ b/ld/ldlang.c
-@@ -3559,10 +3559,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
-            plugin_insert = NULL;
- #endif
-          break;
-+         /* This is from a --defsym on the command line.  */
-        case lang_assignment_statement_enum:
--         if (s->assignment_statement.exp->type.node_class != etree_assert)
--           exp_fold_tree_no_dot (s->assignment_statement.exp);
--         break;
-+          if (s->assignment_statement.exp->type.node_class != etree_assert)
-+          {
-+          if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
-+          ;
-+          else
-+          exp_fold_tree_no_dot (s->assignment_statement.exp);
-+          }
-+          break;
-        default:
-          break;
-        }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch
deleted file mode 100644
index 9469732e..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-Fix a possible compilation issue on i386 when using microblaze patches
-
-Due to patch 0019, a later item may need to refer to this table.
-
-| ../../gas/config/tc-i386.c:1155:20: error: conflicting types for ‘md_pseudo_table’
-| const pseudo_typeS md_pseudo_table[] =
-|           ^~~~~~~~~~~~~~~
-| In file included from ../../gas/as.h:565:0,
-|         from ../../gas/config/tc-i386.c:28:
-| ../../gas/tc.h:25:21: note: previous declaration of ‘md_pseudo_table’ was here
-| extern pseudo_typeS md_pseudo_table[];
-|           ^~~~~~~~~~~~~~~
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
-
-Index: git/gas/config/tc-i386.c
-===================================================================
---- git.orig/gas/config/tc-i386.c
-+++ git/gas/config/tc-i386.c
-@@ -1152,7 +1152,7 @@ pe_lcomm (int needs_align)
- }
- #endif
- 
--const pseudo_typeS md_pseudo_table[] =
-+pseudo_typeS md_pseudo_table[] =
- {
- #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
-   {"align", s_align_bytes, 0},