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-rw-r--r--meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch171
1 files changed, 0 insertions, 171 deletions
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
deleted file mode 100644
index 19ebc0b0..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
+++ /dev/null
@@ -1,171 +0,0 @@
1From 6209a572f4ec70608564fa7aa0270d640aa421f0 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Tue, 2 Nov 2021 17:28:24 +0530
4Subject: [PATCH 18/34] [Patch,MicroBlaze : Adding new relocation to support
5 64bit rodata.
6
7Upstream-Status: Pending
8
9Signed-off-by: Mark Hatle <mark.hatle@amd.com>
10
11---
12 bfd/elf64-microblaze.c | 11 +++++++--
13 gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++----
14 2 files changed, 54 insertions(+), 6 deletions(-)
15
16diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
17index f16b544b1fc..355e9131987 100644
18--- a/bfd/elf64-microblaze.c
19+++ b/bfd/elf64-microblaze.c
20@@ -1529,6 +1529,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
21 case (int) R_MICROBLAZE_64_PCREL :
22 case (int) R_MICROBLAZE_64:
23 case (int) R_MICROBLAZE_32:
24+ case (int) R_MICROBLAZE_IMML_64:
25 {
26 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
27 from removed linkonce sections, or sections discarded by
28@@ -1538,6 +1539,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
29 relocation += addend;
30 if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
31 bfd_put_32 (input_bfd, relocation, contents + offset);
32+ else if (r_type == R_MICROBLAZE_IMML_64)
33+ bfd_put_64 (input_bfd, relocation, contents + offset);
34 else
35 {
36 if (r_type == R_MICROBLAZE_64_PCREL)
37@@ -1626,7 +1629,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
38 }
39 else
40 {
41- if (r_type == R_MICROBLAZE_32)
42+ if (r_type == R_MICROBLAZE_32 || r_type == R_MICROBLAZE_IMML_64)
43 {
44 outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
45 outrel.r_addend = relocation + addend;
46@@ -1652,6 +1655,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
47 relocation += addend;
48 if (r_type == R_MICROBLAZE_32)
49 bfd_put_32 (input_bfd, relocation, contents + offset);
50+ else if (r_type == R_MICROBLAZE_IMML_64)
51+ bfd_put_64 (input_bfd, relocation, contents + offset + endian);
52 else
53 {
54 if (r_type == R_MICROBLAZE_64_PCREL)
55@@ -2166,7 +2171,8 @@ microblaze_elf_relax_section (bfd *abfd,
56 microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
57 irelscan->r_addend);
58 }
59- if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
60+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32
61+ || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
62 {
63 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
64
65@@ -2633,6 +2639,7 @@ microblaze_elf_check_relocs (bfd * abfd,
66 case R_MICROBLAZE_64:
67 case R_MICROBLAZE_64_PCREL:
68 case R_MICROBLAZE_32:
69+ case R_MICROBLAZE_IMML_64:
70 {
71 if (h != NULL && !bfd_link_pic (info))
72 {
73diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
74index d3de049e9c0..76ce516d8aa 100644
75--- a/gas/config/tc-microblaze.c
76+++ b/gas/config/tc-microblaze.c
77@@ -1119,6 +1119,13 @@ md_assemble (char * str)
78 as_fatal (_("smi pseudo instruction should not use a label in imm field"));
79 if(streq (name, "lli") || streq (name, "sli"))
80 opc = str_microblaze_64;
81+ else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
82+ || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
83+ || streq (name, "shi") || streq (name, "swi"))))
84+ {
85+ opc = str_microblaze_64;
86+ subtype = opcode->inst_offset_type;
87+ }
88 else if (reg2 == REG_ROSDP)
89 opc = str_microblaze_ro_anchor;
90 else if (reg2 == REG_RWSDP)
91@@ -1186,7 +1193,10 @@ md_assemble (char * str)
92 inst |= (immed << IMM_LOW) & IMM_MASK;
93 }
94 }
95- else if (streq (name, "lli") || streq (name, "sli"))
96+ else if (streq (name, "lli") || streq (name, "sli") || ((microblaze_arch_size == 64)
97+ && ((streq (name, "lbui")) || streq (name, "lhui")
98+ || streq (name, "lwi") || streq (name, "sbi")
99+ || streq (name, "shi") || streq (name, "swi"))))
100 {
101 temp = immed & 0xFFFFFF8000;
102 if (temp != 0 && temp != 0xFFFFFF8000)
103@@ -1802,6 +1812,11 @@ md_assemble (char * str)
104
105 if (exp.X_md != 0)
106 subtype = get_imm_otype(exp.X_md);
107+ else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
108+ {
109+ opc = str_microblaze_64;
110+ subtype = opcode->inst_offset_type;
111+ }
112 else
113 subtype = opcode->inst_offset_type;
114
115@@ -1819,6 +1834,31 @@ md_assemble (char * str)
116 output = frag_more (isize);
117 immed = exp.X_add_number;
118 }
119+ if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
120+ {
121+ temp = immed & 0xFFFFFF8000;
122+ if (temp != 0 && temp != 0xFFFFFF8000)
123+ {
124+ /* Needs an immediate inst. */
125+ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
126+ if (opcode1 == NULL)
127+ {
128+ as_bad (_("unknown opcode \"%s\""), "imml");
129+ return;
130+ }
131+ inst1 = opcode1->bit_sequence;
132+ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
133+ output[0] = INST_BYTE0 (inst1);
134+ output[1] = INST_BYTE1 (inst1);
135+ output[2] = INST_BYTE2 (inst1);
136+ output[3] = INST_BYTE3 (inst1);
137+ output = frag_more (isize);
138+ }
139+ inst |= (reg1 << RD_LOW) & RD_MASK;
140+ inst |= (immed << IMM_LOW) & IMM_MASK;
141+ }
142+ else
143+ {
144
145 temp = immed & 0xFFFF8000;
146 if ((temp != 0) && (temp != 0xFFFF8000))
147@@ -1844,6 +1884,7 @@ md_assemble (char * str)
148
149 inst |= (reg1 << RD_LOW) & RD_MASK;
150 inst |= (immed << IMM_LOW) & IMM_MASK;
151+ }
152 break;
153
154 case INST_TYPE_R2:
155@@ -3090,10 +3131,10 @@ cons_fix_new_microblaze (fragS * frag,
156 r = BFD_RELOC_32;
157 break;
158 case 8:
159- /*if (microblaze_arch_size == 64)
160- r = BFD_RELOC_32;
161- else*/
162+ if (microblaze_arch_size == 64)
163 r = BFD_RELOC_MICROBLAZE_EA64;
164+ else
165+ r = BFD_RELOC_64;
166 break;
167 default:
168 as_bad (_("unsupported BFD relocation size %u"), size);
169--
1702.37.1 (Apple Git-137.1)
171
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-06-06 20:36:48 +0000