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1# Build Instructions to create firmware recipes using dfx_user_dts bbclass
2
3* [Introduction](#introduction)
4* [How to create a firmware recipe app](#how-to-create-a-firmware-recipe-app)
5* [Test Procedure on Target](#test-procedure-on-target)
6 * [Loading PL bitstream or pdi and dt overlay](#loading-pl-bitstream-or-pdi-and-dt-overlay)
7 * [Testing PL functionality](#testing-pl-functionality)
8 * [Unloading PL bitstream or pdi and dt overlay](#unloading-pl-bitstream-or-pdi-and-dt-overlay)
9* [References](#references)
10
11## Introduction
12This readme describes the build instructions to create firmware recipes using
13dfx_user_dts.bbclass for dfx configuration. This bitbake class supports
14following use cases.
15
16> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for
17> shell.json and accel.json file content.
18
19* **Zynq-7000 and ZynqMP**:
20 * Design: Vivado flat design.
21 * Input files to firmware recipes: .bit, .dtsi or dtbo and shell.json (optional)
22 * Usage Examples:
23```
24SRC_URI = " \
25 file://<flat_design_pl>.bit \
26 file://<flat_design_pl>.dtsi \
27 file://shell.json \
28 "
29```
30
31```
32SRC_URI = " \
33 file://<flat_design_pl>.bit \
34 file://<flat_design_pl>.dtbo \
35 file://shell.json \
36 "
37```
38
39* **ZynqMP and Versal**:
40 * Design: Vivado DFx design.
41 * Input files to firmware recipes: .bit(ZynqMP) or .pdi(Versal), .dtsi or dtbo
42 shell.json or accel.json (optional) and .xclbin (optional).
43 * Usage Examples:
44
45```
46# ZynqMP DFx Static
47SRC_URI = " \
48 file://<dfx_design_static_pl>.bit \
49 file://<dfx_design_static_pl>.dtsi \
50 file://shell.json \
51 file://<dfx_design_static_pl>.xclbin \
52 "
53```
54
55```
56# ZynqMP DFx Static
57SRC_URI = " \
58 file://<dfx_design_static_pl>.bit \
59 file://<dfx_design_static_pl>.dtbo \
60 file://shell.json \
61 file://<dfx_design_static_pl>.xclbin \
62 "
63```
64
65```
66# ZynqMP DFx RP
67SRC_URI = " \
68 file://<dfx_design_rp_rm_pl>.bit \
69 file://<dfx_design_rp_rm_pl>.dtsi \
70 file://accel.json \
71 file://<dfx_design_rp_rm_pl>.xclbin \
72 "
73```
74
75```
76# ZynqMP DFx RP
77SRC_URI = " \
78 file://<dfx_design_rp_rm_pl>.bit \
79 file://<dfx_design_rp_rm_pl>.dtbo \
80 file://accel.json \
81 file://<dfx_design_rp_rm_pl>.xclbin \
82 "
83```
84```
85# Versal DFx Static
86SRC_URI = " \
87 file://<dfx_design_static_pl>.pdi \
88 file://<dfx_design_static_pl>.dtsi \
89 file://shell.json \
90 file://<dfx_design_static_pl>.xclbin \
91 "
92```
93
94```
95# Versal DFx Static
96SRC_URI = " \
97 file://<dfx_design_static_pl>.pdi \
98 file://<dfx_design_static_pl>.dtbo \
99 file://shell.json \
100 file://<dfx_design_static_pl>.xclbin \
101 "
102```
103
104```
105# Versal DFx RP
106SRC_URI = " \
107 file://<dfx_design_rp_rm_pl>.pdi \
108 file://<dfx_design_rp_rm_pl>.dtsi \
109 file://accel.json \
110 file://<dfx_design_rp_rm_pl>.xclbin \
111 "
112```
113
114```
115# Versal DFx RP
116SRC_URI = " \
117 file://<dfx_design_rp_rm_pl>.pdi \
118 file://<dfx_design_rp_rm_pl>.dtbo \
119 file://accel.json \
120 file://<dfx_design_rp_rm_pl>.xclbin \
121 "
122```
123---
124
125## How to create a firmware recipe app
126
1271. Follow [Building Instructions](../README.building.md) upto step 4.
1282. Create recipes-firmware directory in meta layer and copy the .bit/pdi,
129 .dtsi/dtbo, .json and .xclbin file to these directories.
130```
131$ mkdir -p <meta-layer>/recipes-fimrware/<recipes-firmware-app>/files
132$ cp -r <path-to-files>/*.{bit or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-fimrware/<firmware-app-name>/files
133```
1343. Now create the recipes for flat or static or partial firmware using recipetool.
135```
136$ recipetool create -o <meta-layer>/recipes-fimrware/<firmware-app-name>/firmware-app-name.bb file:///<meta-layer>/recipes-fimrware/<firmware-app-name>/files
137```
1384. Modify the recipe and inherit dfx_user_dts bbclass as shown below.
139```
140SUMMARY = "Full Bitstream loading app firmware using dfx_user_dts bbclass"
141LICENSE = "MIT"
142LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
143
144inherit dfx_user_dts
145
146SRC_URI = "\
147 file://zcu111-pl-demo.bit \
148 file://zcu111-pl-demo.dtsi \
149 "
150
151COMPATIBLE_MACHINE ?= "^$"
152COMPATIBLE_MACHINE:zynqmp = "zynqmp"
153```
1545. Add firmware-recipe app to image and enable fpga-overlay machine features to
155 local.conf as shown below.
156> **Note:** fpga-manager-script provides fpgautil tool to load .bit/pdi and dtbo
157> at runtime linux.
158```
159MACHINE_FEATURES += "fpga-overlay"
160IMAGE_INSTALL:append = " \
161 firmware-app-name \
162 fpga-manager-script \
163 "
164```
1656. Follow [Building Instructions](../README.building.md) and continue from step 5.
1667. Once images are built firmware app files will be installed on target_rootfs.
167```
168# <target_rootfs>/lib/firmware/xilinx/firmware-app-name
169```
170---
171
172## Test Procedure on Target
173* Once Linux boots on target, use fpgautil command to load .bit or .pdi and
174 corresponding dt overlay as shown below.
175> **Note:** firmware can be loaded only with sudo or root permissions.
176---
177
178### Loading PL bitstream or pdi and dt overlay
179
180* ZynqMP
181```
182yocto-zynqmp-generic-20231:~$ sudo su
183yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
184 CPU0 CPU1 CPU2 CPU3
185 11: 13309 13021 13673 14170 GICv2 30 Level arch_timer
186 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
187 15: 0 0 0 0 GICv2 175 Level arm-pmu
188 16: 0 0 0 0 GICv2 176 Level arm-pmu
189 17: 0 0 0 0 GICv2 177 Level arm-pmu
190 18: 0 0 0 0 GICv2 178 Level arm-pmu
191 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
192 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
193 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
194 22: 0 0 0 0 GICv2 88 Level ams-irq
195 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
196 24: 327 0 0 0 GICv2 53 Level xuartps
197 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
198 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
199 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
200 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
201 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
202 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
203 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
204 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
205 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
206 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
207 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
208 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
209 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
210 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
211 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
212 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
213 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
214 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
215 45: 76 0 0 0 GICv2 95 Level eth0, eth0
216 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
217 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
218 48: 501 0 0 0 GICv2 50 Level cdns-i2c
219 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
220 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
221 52: 548 0 0 0 GICv2 81 Level mmc0
222 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
223 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
224 55: 0 0 0 0 zynq-gpio 22 Edge sw19
225IPI0: 64 25 87 38 Rescheduling interrupts
226IPI1: 1933 6579 1096 5686 Function call interrupts
227IPI2: 0 0 0 0 CPU stop interrupts
228IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
229IPI4: 0 0 0 0 Timer broadcast interrupts
230IPI5: 0 0 0 0 IRQ work interrupts
231IPI6: 0 0 0 0 CPU wake-up interrupts
232Err: 0
233yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/
234/lib/firmware/
235`-- xilinx
236 `-- zcu111-pl-demo
237 |-- zcu111-pl-demo.bit.bin
238 `-- zcu111-pl-demo.dtbo
239
2402 directories, 2 files
241yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
242[ 91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager
243[ 91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name
244[ 91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid
245[ 91.547598] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/resets
246[ 91.557087] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/uid
247[ 91.566804] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0
248[ 91.576312] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0
249[ 91.586255] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0
250[ 91.596280] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0
251[ 91.606300] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1
252[ 91.616325] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2
253[ 91.626342] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
254[ 91.636705] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0
255[ 91.661849] gpio gpiochip3: (a0000000.gpio): not an immutable chip, please consider fixing it!
256[ 91.662020] gpio gpiochip4: (a0010000.gpio): not an immutable chip, please consider fixing it!
257[ 91.863492] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 58, base_baud = 0) is a uartlite
258[ 91.876674] uartlite a0030000.serial: Runtime PM usage count underflow!
259[ 91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1
260Time taken to load BIN is 901.000000 Milli Seconds
261BIN FILE loaded through FPGA manager successfully
262yocto-zynqmp-generic-20231:/home/petalinux#
263```
264* Versal (DFx Static)
265```
266yocto-vck190-dfx-2023:~$ sudo su
267root@yocto-vck190-dfx-2023:~#
268root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
269[ 257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
270[ 257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
271[ 257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
272[ 257.583599] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0
273[ 257.593434] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1
274[ 257.603268] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2
275[ 257.613100] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0
276[ 257.624762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1
277[ 257.636589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2
278[ 257.648415] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3
279[ 257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed
280[ 257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed
281[ 257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed
282root@yocto-vck190-dfx-2023:~#
283```
284* Versal (DFx RP)
285```
286root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
287[ 273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
288[284052.461]Loading PDI from DDR
289[284052.566]Monolithic/Master Device
290[284055.847]3.365 ms: PDI initialization time
291[284059.809]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002
292[284065.432]---Loading Partition#: 0x0, Id: 0x103
293[284069.829] 0.033 ms for Partition#: 0x0, Size: 1312 Bytes
294[284074.973]---Loading Partition#: 0x1, Id: 0x105
295[284079.344] 0.007 ms for Partition#: 0x1, Size: 160 Bytes
296[284084.430]---Loading Partition#: 0x2, Id: 0x205
297[284088.844] 0.049 ms for Partition#: 0x2, Size: 960 Bytes
298[284093.887]---Loading Partition#: 0x3, Id: 0x203
299[284098.280] 0.030 ms for Partition#: 0x3, Size: 688 Bytes
300[284103.342]---Loading Partition#: 0x4, Id: 0x303
301[284108.863] 1.156 ms for Partition#: 0x4, Size: 209440 Bytes
302[284113.052]---Loading Partition#: 0x5, Id: 0x305
303[284117.712] 0.296 ms for Partition#: 0x5, Size: 3536 Bytes
304[284122.594]---Loading Partition#: 0x6, Id: 0x403
305[284126.991] 0.034 ms for Partition#: 0x6, Size: 8096 Bytes
306[284132.136]---Loading Partition#: 0x7, Id: 0x405
307[284136.507] 0.007 ms for Partition#: 0x7, Size: 160 Bytes
308[284141.636]Subsystem PDI Load: Done
309[ 273.615503] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
310[ 273.627382] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/fpga-bridges
311[ 273.636953] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/partial-fpga-config
312[ 273.647241] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
313[ 273.660826] gpio gpiochip1: (a4010000.gpio): not an immutable chip, please consider fixing it!
314[ 273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
315Time taken to load BIN is 171.000000 Milli Seconds
316BIN FILE loaded through FPGA manager successfully
317root@yocto-vck190-dfx-2023:~#
318```
319---
320
321### Testing PL functionality
322
323* This examples uses PL GPIO DIP switches and Push buttons to capture interrupts.
324* Verify PL GPIO DIP switches and Push buttons are registered.
325* Move the DIP Switches ON/OFF and verify the interrupt counts.
326```
327yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
328 CPU0 CPU1 CPU2 CPU3
329 11: 23303 22971 24203 24990 GICv2 30 Level arch_timer
330 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
331 15: 0 0 0 0 GICv2 175 Level arm-pmu
332 16: 0 0 0 0 GICv2 176 Level arm-pmu
333 17: 0 0 0 0 GICv2 177 Level arm-pmu
334 18: 0 0 0 0 GICv2 178 Level arm-pmu
335 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
336 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
337 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
338 22: 0 0 0 0 GICv2 88 Level ams-irq
339 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
340 24: 515 0 0 0 GICv2 53 Level xuartps
341 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
342 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
343 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
344 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
345 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
346 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
347 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
348 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
349 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
350 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
351 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
352 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
353 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
354 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
355 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
356 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
357 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
358 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
359 45: 110 0 0 0 GICv2 95 Level eth0, eth0
360 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
361 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
362 48: 501 0 0 0 GICv2 50 Level cdns-i2c
363 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
364 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
365 52: 548 0 0 0 GICv2 81 Level mmc0
366 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
367 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
368 55: 0 0 0 0 zynq-gpio 22 Edge sw19
369 59: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
370 60: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
371 61: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
372 62: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
373 63: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
374 64: 0 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
375 65: 0 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
376 66: 0 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
377 67: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
378 68: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
379 69: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
380 70: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
381 71: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
382IPI0: 64 25 87 38 Rescheduling interrupts
383IPI1: 2066 6747 1212 5791 Function call interrupts
384IPI2: 0 0 0 0 CPU stop interrupts
385IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
386IPI4: 0 0 0 0 Timer broadcast interrupts
387IPI5: 0 0 0 0 IRQ work interrupts
388IPI6: 0 0 0 0 CPU wake-up interrupts
389Err: 0
390yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
391 CPU0 CPU1 CPU2 CPU3
392 11: 28169 27725 29250 30190 GICv2 30 Level arch_timer
393 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
394 15: 0 0 0 0 GICv2 175 Level arm-pmu
395 16: 0 0 0 0 GICv2 176 Level arm-pmu
396 17: 0 0 0 0 GICv2 177 Level arm-pmu
397 18: 0 0 0 0 GICv2 178 Level arm-pmu
398 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
399 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
400 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
401 22: 0 0 0 0 GICv2 88 Level ams-irq
402 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
403 24: 603 0 0 0 GICv2 53 Level xuartps
404 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
405 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
406 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
407 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
408 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
409 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
410 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
411 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
412 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
413 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
414 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
415 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
416 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
417 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
418 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
419 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
420 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
421 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
422 45: 134 0 0 0 GICv2 95 Level eth0, eth0
423 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
424 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
425 48: 501 0 0 0 GICv2 50 Level cdns-i2c
426 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
427 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
428 52: 548 0 0 0 GICv2 81 Level mmc0
429 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
430 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
431 55: 0 0 0 0 zynq-gpio 22 Edge sw19
432 59: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
433 60: 4 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
434 61: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
435 62: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
436 63: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
437 64: 2 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
438 65: 2 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
439 66: 4 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
440 67: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
441 68: 2 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
442 69: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
443 70: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
444 71: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
445IPI0: 64 26 87 38 Rescheduling interrupts
446IPI1: 2163 6791 1243 5866 Function call interrupts
447IPI2: 0 0 0 0 CPU stop interrupts
448IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
449IPI4: 0 0 0 0 Timer broadcast interrupts
450IPI5: 0 0 0 0 IRQ work interrupts
451IPI6: 0 0 0 0 CPU wake-up interrupts
452Err: 0
453yocto-zynqmp-generic-20231:/home/petalinux#
454```
455---
456
457### Unloading PL bitstream or pdi and dt overlay
458* Zynq or ZynqMP
459```
460yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R
461```
462* Versal (DFx RP)
463```
464root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0
465```
466* Versal (DFx Static)
467```
468root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full
469```
470---
471
472## References
473* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/Solution+Zynq+PL+Programming+With+FPGA+Manager
474* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming
475* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1188397412/Solution+Versal+PL+Programming
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