89 files changed, 3114 insertions, 708 deletions
diff --git a/meta-dpdk/COPYING.MIT b/meta-dpdk/COPYING.MIT
deleted file mode 100644
index fb950dc6..00000000
--- a/meta-dpdk/COPYING.MIT
+++ /dev/null
@@ -1,17 +0,0 @@
-Permission is hereby granted, free of charge, to any person obtaining a copy 
-of this software and associated documentation files (the "Software"), to deal 
-in the Software without restriction, including without limitation the rights 
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 
-copies of the Software, and to permit persons to whom the Software is 
-furnished to do so, subject to the following conditions:
-The above copyright notice and this permission notice shall be included in 
-all copies or substantial portions of the Software.
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
-THE SOFTWARE.
diff --git a/meta-dpdk/LICENSE b/meta-dpdk/LICENSE
deleted file mode 100644
index e57d3b90..00000000
--- a/meta-dpdk/LICENSE
+++ /dev/null
@@ -1,5 +0,0 @@
-All metadata files (including, but not limited to bb, bbappend,
-bbclass, inc and conf files) are MIT licensed unless otherwise stated.
-Source code included in tree for individual recipes is under the
-LICENSE stated in the associated recipe (.bb file) unless otherwise
-stated.
diff --git a/meta-dpdk/README b/meta-dpdk/README
deleted file mode 100644
index 1b256d02..00000000
--- a/meta-dpdk/README
+++ /dev/null
@@ -1,56 +0,0 @@
-meta-dpdk
-=========
-This README file contains information on building the DPDK package.
-This is a fork of meta-dpdk, git://git.yoctoproject.org/meta-dpdk
-langdale branch as of commit bd1b4f10262f12dd66a91383757ccba4eeda0b08.
-The software in this fork is specific to the AMD Embedded versal-net.
-Dependencies
-============
-This layer depends on:
-  URI: git://git.openembedded.org/bitbake
-  branch: master
-  URI: git://git.openembedded.org/openembedded-core
-  layers: meta
-  branch: master
-Guidelines for submitting patches
-====================================
-Please submit any patches against this fork of meta-dpdk to the meta-xilinx
-mailing list (meta-xilinx@lists.yoctoproject.org).
-Regardless of how you submit a patch or patchset, the patches should
-at minimum follow the suggestions outlined in the 'Submitting a Change
-to the Yocto Project' section in the Yocto Project Development Manual.
-Specifically, they should:
-  - Include a 'Signed-off-by:' line.  A commit can't legally be pulled
-    in without this.
-  - Provide a single-line, short summary of the change.  This short
-    description should be prefixed by the BSP or recipe name, as
-    appropriate, followed by a colon.  Capitalize the first character
-    of the summary (following the colon).
-  - For the body of the commit message, provide detailed information
-    that describes what you changed, why you made the change, and the
-    approach you used.
-  - If the change addresses a specific bug or issue that is associated
-    with a bug-tracking ID, include a reference to that ID in your
-    detailed description in the following format: [YOCTO #<bug-id>].
-  - Pay attention to line length - please don't allow any particular
-    line in the commit message to stretch past 72 characters.
-  - For any non-trivial patch, provide information about how you
-    tested the patch, and for any non-trivial or non-obvious testing
-    setup, provide details of that setup.
diff --git a/meta-dpdk/conf/layer.conf b/meta-dpdk/conf/layer.conf
deleted file mode 100644
index 2b33f7a9..00000000
--- a/meta-dpdk/conf/layer.conf
+++ /dev/null
@@ -1,24 +0,0 @@
-# We have a conf and classes directory, add to BBPATH
-BBPATH .= ":${LAYERDIR}"
-# We have recipes-* directories, add to BBFILES
-BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
-            ${LAYERDIR}/recipes-*/*/*.bbappend"
-BBFILE_COLLECTIONS += "dpdk"
-BBFILE_PATTERN_dpdk := "^${LAYERDIR}/"
-BBFILE_PRIORITY_dpdk = "5"
-LAYERDEPENDS_dpdk = "core"
-# This should only be incremented on significant changes that will
-# cause compatibility issues with other layers
-LAYERVERSION_dpdk = "1"
-LAYERSERIES_COMPAT_dpdk = "kirkstone langdale"
-BBFILES_DYNAMIC += " \
-    clang-layer:${LAYERDIR}/dynamic-layers/clang-layer/*/*/*.bb \
-    clang-layer:${LAYERDIR}/dynamic-layers/clang-layer/*/*/*.bbappend \
-    petalinux:${LAYERDIR}/dynamic-layers/petalinux/recipes-*/*/*.bb \
-    petalinux:${LAYERDIR}/dynamic-layers/petalinux/recipes-*/*/*.bbappend \
-"
diff --git a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0001-configure-skip-toolchain-checks.patch b/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0001-configure-skip-toolchain-checks.patch
deleted file mode 100644
index 32a88b20..00000000
--- a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0001-configure-skip-toolchain-checks.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 53f8a8dffa571de99b50f1a7b757cfd7d8c24d21 Mon Sep 17 00:00:00 2001
-From: Naveen Saini <naveen.kumar.saini@intel.com>
-Date: Mon, 17 Oct 2022 15:44:16 +0800
-Subject: [PATCH 1/4] configure: skip toolchain checks
-Current logic fetch full command line along with the tool. i.e
-gcc -m64 -march=skylake -mtune=generic ...
-Which throws ERROR: Cannot find tool -m64
-So need to re-write for loop, so it can work in cross-compilation
-environment too.
-Upstream-Status: Inappropriate
-Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
---
- configure | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-diff --git a/configure b/configure
-index 70fdfdf..48d1ea5 100755
--- a/configure
-+++ b/configure
-@@ -38,12 +38,12 @@ check_toolchain()
-     : ${EMACS=emacs}
-     : ${ARCH_INCLUDES=}
- 
-    for TOOL in $PKG_CONFIG $CC $LD $OBJCOPY $CLANG $LLC $M4; do
-        if [ ! $(command -v ${TOOL} 2>/dev/null) ]; then
-            echo "*** ERROR: Cannot find tool ${TOOL}" ;
-            exit 1;
-        fi;
-    done
-+    #for TOOL in $PKG_CONFIG $CC $LD $OBJCOPY $CLANG $LLC $M4; do
-+    #    if [ ! $(command -v ${TOOL} 2>/dev/null) ]; then
-+    #        echo "*** ERROR: Cannot find tool ${TOOL}" ;
-+    #        exit 1;
-+    #    fi;
-+    #done
- 
-     clang_version=$($CLANG --version | grep -Po '(?<=clang version )[[:digit:]]+')
-     echo "Found clang binary '$CLANG' with version $clang_version (from '$($CLANG --version | head -n 1)')"
-- 
-2.25.1
diff --git a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0002-Makefile-It-does-not-detect-libbpf-header-from-sysro.patch b/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0002-Makefile-It-does-not-detect-libbpf-header-from-sysro.patch
deleted file mode 100644
index 2e667836..00000000
--- a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0002-Makefile-It-does-not-detect-libbpf-header-from-sysro.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 2840cf0b89497f545fae2eed7ece3f3c5fc558e3 Mon Sep 17 00:00:00 2001
-From: Naveen Saini <naveen.kumar.saini@intel.com>
-Date: Mon, 17 Oct 2022 15:50:34 +0800
-Subject: [PATCH 2/4] Makefile: It does not detect libbpf header from sysroot
-So adding sysroot headers path.
-Upstream-Status: OE-Specific
-Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
---
- lib/common.mk       | 2 +-
- lib/libxdp/Makefile | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-diff --git a/lib/common.mk b/lib/common.mk
-index 56c0406..ab0bad8 100644
--- a/lib/common.mk
-+++ b/lib/common.mk
-@@ -55,7 +55,7 @@ LIBXDP_SOURCES := $(wildcard $(LIBXDP_DIR)/*.[ch] $(LIBXDP_DIR)/*.in)
- KERN_USER_H ?= $(wildcard common_kern_user.h)
- 
- CFLAGS += -I$(HEADER_DIR) -I$(LIB_DIR)/util $(ARCH_INCLUDES)
-BPF_CFLAGS += -I$(HEADER_DIR) $(ARCH_INCLUDES)
-+BPF_CFLAGS += -I$(HEADER_DIR) $(ARCH_INCLUDES) -I${STAGING_INCDIR}/
- 
- BPF_HEADERS := $(wildcard $(HEADER_DIR)/bpf/*.h) $(wildcard $(HEADER_DIR)/xdp/*.h)
- 
-diff --git a/lib/libxdp/Makefile b/lib/libxdp/Makefile
-index 358b751..8f459d8 100644
--- a/lib/libxdp/Makefile
-+++ b/lib/libxdp/Makefile
-@@ -30,7 +30,7 @@ PC_FILE := $(OBJDIR)/libxdp.pc
- TEMPLATED_SOURCES := xdp-dispatcher.c
- 
- CFLAGS += -I$(HEADER_DIR)
-BPF_CFLAGS += -I$(HEADER_DIR)
-+BPF_CFLAGS += -I$(HEADER_DIR) -I${STAGING_INCDIR}/
- 
- 
- ifndef BUILD_STATIC_ONLY
-- 
-2.25.1
diff --git a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0003-Makefile-fix-KeyError-failure.patch b/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0003-Makefile-fix-KeyError-failure.patch
deleted file mode 100644
index 41c57f6e..00000000
--- a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0003-Makefile-fix-KeyError-failure.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 157546fbc4f18751c52b3c8788879c05cf253331 Mon Sep 17 00:00:00 2001
-From: Naveen Saini <naveen.kumar.saini@intel.com>
-Date: Mon, 17 Oct 2022 16:02:46 +0800
-Subject: [PATCH 3/4] Makefile: fix KeyError failure
-Error:
-Exception: KeyError: 'getpwuid(): uid not found: 11857215'
-Upstream-Status: Inappropriate
-Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
---
- lib/libxdp/Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/lib/libxdp/Makefile b/lib/libxdp/Makefile
-index 8f459d8..9a340a3 100644
--- a/lib/libxdp/Makefile
-+++ b/lib/libxdp/Makefile
-@@ -55,7 +55,7 @@ install: all
-        $(Q)install -d -m 0755 $(DESTDIR)$(BPF_OBJECT_DIR)
-        $(Q)install -m 0644 $(LIB_HEADERS) $(DESTDIR)$(HDRDIR)/
-        $(Q)install -m 0644 $(PC_FILE) $(DESTDIR)$(LIBDIR)/pkgconfig/
-       $(Q)cp -fpR $(SHARED_LIBS) $(STATIC_LIBS) $(DESTDIR)$(LIBDIR)
-+       $(Q)cp -fpR --no-preserve=ownership $(SHARED_LIBS) $(STATIC_LIBS) $(DESTDIR)$(LIBDIR)
-        $(Q)install -m 0755 $(XDP_OBJS) $(DESTDIR)$(BPF_OBJECT_DIR)
-        $(if $(MAN_FILES),$(Q)install -m 0755 -d $(DESTDIR)$(MANDIR)/man3)
-        $(if $(MAN_FILES),$(Q)install -m 0644 $(MAN_FILES) $(DESTDIR)$(MANDIR)/man3)
-- 
-2.25.1
diff --git a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0004-Makefile-fix-libxdp.pc-error.patch b/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0004-Makefile-fix-libxdp.pc-error.patch
deleted file mode 100644
index b1e15e52..00000000
--- a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools/0004-Makefile-fix-libxdp.pc-error.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 46b3ff797135574aa0ee42f633a281d44f48da95 Mon Sep 17 00:00:00 2001
-From: Naveen Saini <naveen.kumar.saini@intel.com>
-Date: Mon, 17 Oct 2022 16:05:15 +0800
-Subject: [PATCH 4/4] Makefile: fix libxdp.pc error
-Error:
-do_populate_sysroot: QA Issue: libxdp.pc failed sanity test (tmpdir) in
-path ... xdp-tools/1.2.8-r0/sysroot-destdir/usr/lib/pkgconfig [pkgconfig]
-Upstream-Status: Inappropriate
-Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
---
- lib/libxdp/Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-diff --git a/lib/libxdp/Makefile b/lib/libxdp/Makefile
-index 9a340a3..bc39177 100644
--- a/lib/libxdp/Makefile
-+++ b/lib/libxdp/Makefile
-@@ -76,8 +76,8 @@ $(OBJDIR)/libxdp.so.$(LIBXDP_VERSION): $(SHARED_OBJS)
-                      $^ $(LDFLAGS) $(LDLIBS) -o $@
- 
- $(OBJDIR)/libxdp.pc:
-       $(Q)sed -e "s|@PREFIX@|$(PREFIX)|" \
-                       -e "s|@LIBDIR@|$(LIBDIR)|" \
-+       $(Q)sed -e "s|@PREFIX@|$(prefix)|" \
-+                       -e "s|@LIBDIR@|$(libdir)|" \
-                        -e "s|@VERSION@|$(TOOLS_VERSION)|" \
-                        < libxdp.pc.template > $@
- 
-- 
-2.25.1
diff --git a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools_1.2.8.bb b/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools_1.2.8.bb
deleted file mode 100644
index 7cd49a0b..00000000
--- a/meta-dpdk/dynamic-layers/clang-layer/recipes-support/xdp-tools/xdp-tools_1.2.8.bb
+++ /dev/null
@@ -1,37 +0,0 @@
-SUMMARY = "Utilities and example programs for use with XDP"
-HOMEPAGE = "https://github.com/xdp-project/xdp-tools"
-LICENSE = "GPL-2.0-or-later & LGPL-2.1-or-later & BSD-2-Clause"
-LIC_FILES_CHKSUM = "file://LICENSE;md5=9ee53f8d06bbdb4c11b1557ecc4f8cd5 \
-                    file://LICENSES/GPL-2.0;md5=994331978b428511800bfbd17eea3001 \
-                    file://LICENSES/LGPL-2.1;md5=b370887980db5dd40659b50909238dbd \
-                    file://LICENSES/BSD-2-Clause;md5=5d6306d1b08f8df623178dfd81880927"
-DEPENDS += " libbpf clang-native zlib elfutils libpcap"
-SRC_URI = "git://github.com/xdp-project/xdp-tools.git;branch=v1.2;protocol=https \
-            file://0001-configure-skip-toolchain-checks.patch \
-            file://0002-Makefile-It-does-not-detect-libbpf-header-from-sysro.patch \
-            file://0003-Makefile-fix-KeyError-failure.patch \
-            file://0004-Makefile-fix-libxdp.pc-error.patch \
-          "
-SRCREV = "d4ff1f9bcf8b03556b625ab6e16958598482e861"
-S = "${WORKDIR}/git"
-inherit pkgconfig
-EXTRA_OEMAKE += "PREFIX=${D}${prefix} LIBDIR=${D}${libdir} BUILD_STATIC_ONLY=1 PRODUCTION=1"
-CFLAGS += "-fPIC"
-export STAGING_INCDIR
-do_install () {
-    oe_runmake install
-    # Remove object files *.o
-    rm -rf ${D}/${libdir}/bpf
-}
-RDEPENDS:${PN} += "bash"
diff --git a/meta-dpdk/dynamic-layers/petalinux/recipes-core/images/petalinux-image-everything.bbappend b/meta-dpdk/dynamic-layers/petalinux/recipes-core/images/petalinux-image-everything.bbappend
deleted file mode 100644
index 732b1b45..00000000
--- a/meta-dpdk/dynamic-layers/petalinux/recipes-core/images/petalinux-image-everything.bbappend
+++ /dev/null
@@ -1,2 +0,0 @@
-COMMON_INSTALL:append:versal-net = " dpdk libmcdi"
diff --git a/meta-dpdk/recipes-extended/dpdk/dpdk.inc b/meta-dpdk/recipes-extended/dpdk/dpdk.inc
deleted file mode 100644
index 9ce9737e..00000000
--- a/meta-dpdk/recipes-extended/dpdk/dpdk.inc
+++ /dev/null
@@ -1,12 +0,0 @@
-DESCRIPTION = "Data Plane Development Kit"
-HOMEPAGE = "http://dpdk.org"
-LICENSE = "BSD-3-Clause & LGPL-2.1-only & GPL-2.0-only"
-LIC_FILES_CHKSUM = "file://license/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
-                    file://license/lgpl-2.1.txt;md5=4b54a1fd55a448865a0b32d41598759d \
-                    file://license/bsd-3-clause.txt;md5=0f00d99239d922ffd13cabef83b33444"
-SRC_URI = "git://dpdk.org/dpdk${STABLE};branch=${BRANCH} \
-"
-CVE_PRODUCT = "data_plane_development_kit"
diff --git a/meta-dpdk/recipes-extended/dpdk/dpdk_22.11.0.bb b/meta-dpdk/recipes-extended/dpdk/dpdk_22.11.0.bb
deleted file mode 100644
index abce8d16..00000000
--- a/meta-dpdk/recipes-extended/dpdk/dpdk_22.11.0.bb
+++ /dev/null
@@ -1,71 +0,0 @@
-include dpdk.inc
-SRC_URI = "git://github.com/Xilinx-CNS/cns-dpdk-next-sfc.git;branch=${BRANCH};protocol=https"
-BRANCH = "cdx_22.11"
-SRCREV = "92339d519b50996915e7dbb5b8246b34febcba93"
-S = "${WORKDIR}/git"
-# kernel module is provide by dpdk-module recipe, so disable here
-EXTRA_OEMESON = " \
-                -Denable_kmods=false \
-                -Dexamples=cdma_demo,cdx_test \
-"
-COMPATIBLE_MACHINE = "null"
-COMPATIBLE_MACHINE:versal-net = "${MACHINE}"
-COMPATIBLE_HOST:libc-musl:class-target = "null"
-COMPATIBLE_HOST:linux-gnux32 = "null"
-PACKAGECONFIG ??= " "
-PACKAGECONFIG[afxdp] = ",,libbpf xdp-tools"
-PACKAGECONFIG[libvirt] = ",,libvirt"
-RDEPENDS:${PN} += "pciutils python3-core"
-RDEPENDS:${PN}-examples += "bash"
-DEPENDS = "numactl python3-pyelftools-native"
-inherit meson pkgconfig
-INSTALL_PATH = "${prefix}/share/dpdk"
-do_write_config:append(){
-    sed -i "/\[properties\]/a platform = \'cdx\'" ${WORKDIR}/meson.cross
-}
-do_install:append(){
-    # remove  source files
-    rm -rf ${D}/${INSTALL_PATH}/examples/*
-    # Install examples
-    install -m 0755 -d ${D}/${INSTALL_PATH}/examples/
-    for dirname in ${B}/examples/dpdk-*
-    do
-        if [ ! -d ${dirname} ] && [ -x ${dirname} ]; then
-            install -m 0755 ${dirname} ${D}/${INSTALL_PATH}/examples/
-        fi
-    done
-}
-PACKAGES =+ "${PN}-examples ${PN}-tools"
-FILES:${PN} += " ${bindir}/dpdk-testpmd \
-                 ${bindir}/dpdk-proc-info \
-                 ${libdir}/*.so* \
-                 ${libdir}/dpdk/pmds-22.0/*.so* \
-                 "
-FILES:${PN}-examples = " \
-        ${INSTALL_PATH}/examples/* \
-        "
-FILES:${PN}-tools = " \
-    ${bindir}/dpdk-pdump \
-    ${bindir}/dpdk-test \
-    ${bindir}/dpdk-test-* \
-    ${bindir}/dpdk-*.py \
-    "
-CVE_PRODUCT = "data_plane_development_kit"
-INSANE_SKIP:${PN} = "dev-so"
diff --git a/meta-dpdk/recipes-extended/dpdk/libmcdi_0.1.0.bb b/meta-dpdk/recipes-extended/dpdk/libmcdi_0.1.0.bb
deleted file mode 100644
index 0bc9a849..00000000
--- a/meta-dpdk/recipes-extended/dpdk/libmcdi_0.1.0.bb
+++ /dev/null
@@ -1,33 +0,0 @@
-DESCRIPTION = "Management Controller Driver Interface library"
-LICENSE = "MIT"
-LIC_FILES_CHKSUM = "file://COPYING.MIT;md5=838c366f69b72c5df05c96dff79b35f2"
-SRC_URI = "git://github.com/Xilinx-CNS/mcdi-lib.git;branch=${BRANCH};protocol=https"
-BRANCH = "master"
-SRCREV = "db448189e5fcb38b4750faf6afe243d7998863bc"
-S = "${WORKDIR}/git"
-COMPATIBLE_MACHINE = "^$"
-COMPATIBLE_MACHINE:versal-net = "${MACHINE}"
-MCDI_PATH_EXAMPLES = "${datadir}/${BPN}/examples"
-do_compile() {
-    oe_runmake all CC="${CC}" CROSS_COMPILE="${TARGET_PREFIX}"
-}
-do_install() {
-    oe_runmake install prefix="${prefix}" DESTDIR="${D}"
-    install -d ${D}/${MCDI_PATH_EXAMPLES}
-    install -m 0755 ${B}/example/mcdi_example_app ${D}/${MCDI_PATH_EXAMPLES}
-    install -m 0755 ${B}/init/init_app ${D}/${MCDI_PATH_EXAMPLES}
-}
-PACKAGES =+ "${PN}-examples"
-FILES:${PN}-examples = " \
-    ${MCDI_PATH_EXAMPLES}/* \
-    "
diff --git a/meta-xilinx-bsp/conf/layer.conf b/meta-xilinx-bsp/conf/layer.conf
index 56a5bc29..051ca361 100644
--- a/meta-xilinx-bsp/conf/layer.conf
+++ b/meta-xilinx-bsp/conf/layer.conf
@@ -17,5 +17,3 @@ BBFILE_PRIORITY_xilinx-bsp = "5"
 LAYERDEPENDS_xilinx-bsp = "xilinx"
 LAYERSERIES_COMPAT_xilinx-bsp = "langdale"
-PREFERRED_VERSION_kc705-bitstream ?= "${XILINX_RELEASE_VERSION}"
diff --git a/meta-xilinx-bsp/conf/machine/vck5000-versal.conf b/meta-xilinx-bsp/conf/machine/vck5000-versal.conf
deleted file mode 100644
index 9396bd97..00000000
--- a/meta-xilinx-bsp/conf/machine/vck5000-versal.conf
+++ /dev/null
@@ -1,45 +0,0 @@
-#@TYPE: Machine
-#@NAME: vck500-versal
-#@DESCRIPTION: Machine configuration for the VCK5000 evaluation board.
-#### Preamble
-MACHINEOVERRIDES =. "${@['', 'vck5000-versal:']['vck5000-versal' !='${MACHINE}']}"
-#### Regular settings follow
-# Variables that changes based on hw design or board specific requirement must be
-# defined before calling the required inclusion file else pre-expansion value
-# defined in versal-generic.conf will be set.
-# Yocto device-tree variables
-YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-YAML_DT_BOARD_FLAGS ?= "{BOARD template}"
-# Yocto arm-trusted-firmware(TF-A) variables
-ATF_CONSOLE ?= "pl011"
-TFA_BL33_LOAD ?= "0x8000000"
-# Yocto PLM variables
-YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-# Yocto KERNEL Variables
-UBOOT_ENTRYPOINT  ?= "0x200000"
-UBOOT_LOADADDRESS ?= "0x200000"
-# vck5000-versal Serial Console
-SERIAL_CONSOLES ?= "115200;ttyAMA0"
-YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
-# Required generic machine inclusion
-# VCK5000 board uses Versal AI Core device hence use soc variant based generic
-# machine inclusion
-require conf/machine/versal-ai-core-generic.conf
-# This machine conf file uses vck5000-versal xsa as reference input.
-# User can override with vck5000 custom xsa using HDF_BASE and HDF_PATH variables
-# from local.conf.
-HDF_MACHINE = "vck5000-versal"
-#### No additional settings should be after the Postamble
-#### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', ' vck5000_versal']['vck5000-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf b/meta-xilinx-bsp/conf/machine/vhk158-versal.conf
deleted file mode 100644
index b09bde28..00000000
--- a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf
+++ /dev/null
@@ -1,52 +0,0 @@
-#@TYPE: Machine
-#@NAME: vhk158-versal
-#@DESCRIPTION: Machine configuration for the VHK158 evaluation board.
-#### Preamble
-MACHINEOVERRIDES =. "${@['', 'vhk158-versal:']['vhk158-versal' !='${MACHINE}']}"
-#### Regular settings follow
-# Variables that changes based on hw design or board specific requirement must be
-# defined before calling the required inclusion file else pre-expansion value
-# defined in versal-generic.conf will be set.
-# Yocto device-tree variables
-YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vhk158-reva}"
-# Yocto arm-trusted-firmware(TF-A) variables
-ATF_CONSOLE ?= "pl011"
-TFA_BL33_LOAD ?= "0x8000000"
-# Yocto PLM variables
-YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0"
-# Yocto KERNEL Variables
-UBOOT_ENTRYPOINT  ?= "0x200000"
-UBOOT_LOADADDRESS ?= "0x200000"
-# vhk158-versal Serial Console
-SERIAL_CONSOLES ?= "115200;ttyAMA0"
-YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
-# Required generic machine inclusion
-# VHK158 board uses Versal HBM device hence use soc variant based generic
-# machine inclusion
-require conf/machine/versal-hbm-generic.conf
-# This machine conf file uses vhk158-versal xsa as reference input.
-# User can override with vhk158 custom xsa using HDF_BASE and HDF_PATH variables
-# from local.conf.
-HDF_MACHINE = "vhk158-versal"
-# VHK158 has 32GB memory only but default versal-generic has QB_MEM set to 8G,
-# Since versal-vhk158-reva.dts has 32GB set, we need set same in QB_MEM
-QB_MEM = "-m 32G"
-QEMU_HW_DTB_PS =  "${QEMU_HW_DTB_PATH}/board-versal-ps-vhk158.dtb"
-QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"
-#### No additional settings should be after the Postamble
-#### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', ' vhk158_versal']['vhk158-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf
new file mode 100644
index 00000000..71c94038
--- /dev/null
+++ b/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf
@@ -0,0 +1,50 @@
+#@TYPE: Machine
+#@NAME: zcu1275-zynqmp
+#@DESCRIPTION: Machine configuration for the ZCU1275 evaluation board.
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'zcu1275-zynqmp:']['zcu1275-zynqmp' !='${MACHINE}']}"
+#### Regular settings follow
+# Yocto device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0"
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD zcu1275-revb}"
+# Yocto arm-trusted-firmware(TF-A) variables
+ATF_CONSOLE ?= "cadence"
+TFA_BL33_LOAD ?= "0x8000000"
+# Yocto PMUFW variables
+YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0"
+# Yocto FSBL variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0"
+# Yocto KERNEL Variables
+UBOOT_ENTRYPOINT  ?= "0x200000"
+UBOOT_LOADADDRESS ?= "0x200000"
+# zcu1275-zynqmp Serial Console
+SERIAL_CONSOLES ?= "115200;ttyPS0"
+YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
+# Required generic machine inclusion
+# ZCU1275 board uses ZynqMP DR device hence use soc variant based generic machine
+# inclusion
+require conf/machine/zynqmp-dr-generic.conf
+# This eval board machine conf file uses zcu1275-zynqmp xsa as reference input.
+# User can override with zcu1275 custom xsa using HDF_BASE and HDF_PATH variables
+# from local.conf.
+HDF_MACHINE = "zcu1275-zynqmp"
+# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match
+# the xsa. User can enable explicitly if required from local.conf.
+# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1275-revB.dtb"
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu1275_zynqmp']['zcu1275-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf
index c726e9f5..812a283f 100644
--- a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf
@@ -1,9 +1,9 @@
 #@TYPE: Machine
-#@NAME: zcu670-zynqmp
+#@NAME: zcu1285-zynqmp
-#@DESCRIPTION: Machine configuration for the ZCU670 evaluation board.
+#@DESCRIPTION: Machine configuration for the ZCU1285 evaluation board.
 #### Preamble
-MACHINEOVERRIDES =. "${@['', 'zcu670-zynqmp:']['zcu670-zynqmp' !='${MACHINE}']}"
+MACHINEOVERRIDES =. "${@['', 'zcu1285-zynqmp:']['zcu1285-zynqmp' !='${MACHINE}']}"
 #### Regular settings follow
 # Variables that changes based on hw design or board specific requirement must be
@@ -13,7 +13,7 @@ MACHINEOVERRIDES =. "${@['', 'zcu670-zynqmp:']['zcu670-zynqmp' !='${MACHINE}']}"
 # Yocto device-tree variables
 YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0"
 YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0"
-YAML_DT_BOARD_FLAGS ?= "{BOARD zcu670-revb}"
+YAML_DT_BOARD_FLAGS ?= "{BOARD zcu1285-reva}"
 # Yocto arm-trusted-firmware(TF-A) variables
 ATF_CONSOLE ?= "cadence"
@@ -31,20 +31,24 @@ YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0"
 UBOOT_ENTRYPOINT  ?= "0x200000"
 UBOOT_LOADADDRESS ?= "0x200000"
-# zcu670-zynqmp Serial Console 
+# zcu1285-zynqmp Serial Console
 SERIAL_CONSOLES ?= "115200;ttyPS0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 # Required generic machine inclusion
-# ZCU670 board uses ZynqMP DR device hence use soc variant based generic machine
+# ZCU1285 board uses ZynqMP DR device hence use soc variant based generic machine
 # inclusion
 require conf/machine/zynqmp-dr-generic.conf
-# This eval board machine conf file uses zcu670-zynqmp xsa as reference input.
+# This eval board machine conf file uses zcu1285-zynqmp xsa as reference input.
-# User can override with zcu670 custom xsa using HDF_BASE and HDF_PATH variables
+# User can override with zcu1285 custom xsa using HDF_BASE and HDF_PATH variables
 # from local.conf.
-HDF_MACHINE = "zcu670-zynqmp"
+HDF_MACHINE = "zcu1285-zynqmp"
+# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match
+# the xsa. User can enable explicitly if required from local.conf.
+# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1285-revA.dtb"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu670_zynqmp']['zcu670-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu1285_zynqmp']['zcu1285-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb b/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb
deleted file mode 100644
index e512777c..00000000
--- a/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb
+++ /dev/null
@@ -1,48 +0,0 @@
-SUMMARY = "KC705 Pre-built Bitstream"
-DESCRIPTION = "A Pre-built bitstream for the KC705, which is capable of booting a Linux system."
-HOMEPAGE = "http://www.xilinx.com"
-SECTION = "bsp"
-# The BSP package does not include any license information.
-LICENSE = "Proprietary"
-LICENSE_FLAGS = "xilinx"
-LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/Proprietary;md5=0557f9d92cf58f2ccdd50f62f8ac0b28"
-COMPATIBLE_MACHINE = "kc705-microblazeel"
-inherit deploy
-inherit xilinx-fetch-restricted
-BSP_NAME = "xilinx-kc705"
-BSP_FILE = "${BSP_NAME}-v${PV}-final.bsp"
-SRC_URI = "https://www.xilinx.com/member/forms/download/xef.html?filename=${BSP_FILE};downloadfilename=${BSP_FILE}"
-SRC_URI[md5sum] = "5c0365a8a26cc27b4419aa1d7dd82351"
-SRC_URI[sha256sum] = "a909a91a37a9925ee2f972ccb10f986a26ff9785c1a71a483545a192783bf773"
-PROVIDES = "virtual/bitstream"
-FILES:${PN} += "/boot/download.bit"
-INHIBIT_DEFAULT_DEPS = "1"
-PACKAGE_ARCH = "${MACHINE_ARCH}"
-# deps needed to extract content from the .bsp file
-DEPENDS += "tar-native gzip-native"
-do_compile() {
-        # Extract the bitstream into workdir
-        tar -xf ${WORKDIR}/${BSP_FILE} ${BSP_NAME}-axi-full-${PV}/pre-built/linux/images/download.bit -C ${S}
-        # move the bit file to ${S}/ as it is in a subdir in the tar file
-        for i in $(find -type f -name download.bit); do mv $i ${S}; done
-}
-do_install() {
-        install -D ${S}/download.bit ${D}/boot/download.bit
-}
-do_deploy () {
-        install -D ${S}/download.bit ${DEPLOYDIR}/download.bit
-}
-addtask deploy before do_build after do_install
diff --git a/meta-xilinx-contrib/recipes-bsp/bitstream/bitstream-extraction_%.bbappend b/meta-xilinx-contrib/recipes-bsp/bitstream/bitstream-extraction_%.bbappend
new file mode 100644
index 00000000..4653c93a
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-bsp/bitstream/bitstream-extraction_%.bbappend
@@ -0,0 +1,2 @@
+COMPATIBLE_MACHINE:zybo-linux-bd-zynq7 = "^$"
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
new file mode 100644
index 00000000..660bc218
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
@@ -0,0 +1,305 @@
+From 21cc8144efdaa3cd8dbd7279f87b14fa3432fae4 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:14:13 +1000
+Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards
+Add the dglnt_encoder driver that enables DRM support for the VGA and
+HDMI output ports found on many Digilent boards.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ .../bindings/drm/xilinx/dglnt_encoder.txt          |  23 +++
+ drivers/gpu/drm/xilinx/Kconfig                     |   6 +
+ drivers/gpu/drm/xilinx/Makefile                    |   1 +
+ drivers/gpu/drm/xilinx/dglnt_encoder.c             | 217 +++++++++++++++++++++
+ 4 files changed, 247 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+ create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c
+diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+new file mode 100644
+index 0000000..242b24e
+--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+@@ -0,0 +1,23 @@
+Device-Tree bindings for Digilent DRM Encoder Slave
+
+This driver provides support for VGA and HDMI outputs on Digilent FPGA boards.
+The VGA or HDMI port must be connected to a Xilinx display pipeline via an
+axi2vid IP core.
+
+Required properties:
+ - compatible: Should be "digilent,drm-encoder".
+
+Optional properties:
+ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video
+                   connector. This is used to obtain the supported resolutions
+                   of an attached monitor. If not defined, then a default
+                   set of resolutions is used and the display will initialize
+                   to 720p. Note most VGA connectors on Digilent boards do
+                   not have the DDC bus routed out.
+
+Example:
+
+       encoder_0: digilent_encoder {
+               compatible = "digilent,drm-encoder";
+               dglnt,edid-i2c = <&i2c1>;
+       };
+diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig
+index 57e18a9..d9ecff2 100644
+--- a/drivers/gpu/drm/xilinx/Kconfig
+++ b/drivers/gpu/drm/xilinx/Kconfig
+@@ -33,6 +33,12 @@ config DRM_XILINX_DP_SUB
+        help
+          DRM driver for Xilinx Display Port Subsystem.
+ 
+config DRM_DIGILENT_ENCODER
+   tristate "Digilent VGA/HDMI DRM Encoder Driver"
+   depends on DRM_XILINX
+   help
+     DRM slave encoder for Video-out on Digilent boards.
+
+ config DRM_XILINX_DP_SUB_DEBUG_FS
+        bool "Xilinx DRM DPSUB debugfs"
+        depends on DEBUG_FS && DRM_XILINX_DP_SUB
+diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile
+index 19bc154..c2717e40 100644
+--- a/drivers/gpu/drm/xilinx/Makefile
+++ b/drivers/gpu/drm/xilinx/Makefile
+@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \
+                xilinx_drm_plane.o
+ xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o
+ 
+obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o
+ obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o
+ obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o
+ obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o
+diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+new file mode 100644
+index 0000000..cb9fc7d
+--- /dev/null
+++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+@@ -0,0 +1,217 @@
+/*
+ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat.
+ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <drm/drmP.h>
+#include <drm/drm_edid.h>
+#include <drm/drm_encoder_slave.h>
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#define DGLNT_ENC_MAX_FREQ 150000
+#define DGLNT_ENC_MAX_H 1920
+#define DGLNT_ENC_MAX_V 1080
+#define DGLNT_ENC_PREF_H 1280
+#define DGLNT_ENC_PREF_V 720
+
+struct dglnt_encoder {
+       struct drm_encoder *encoder;
+       struct i2c_adapter *i2c_bus;
+       bool i2c_present;
+};
+
+static inline struct dglnt_encoder *to_dglnt_encoder(
+                                       struct drm_encoder *encoder)
+{
+       return to_encoder_slave(encoder)->slave_priv;
+}
+
+static bool dglnt_mode_fixup(struct drm_encoder *encoder,
+                               const struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+       return true;
+}
+
+static void dglnt_encoder_mode_set(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+}
+
+static void
+dglnt_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+}
+
+static void dglnt_encoder_save(struct drm_encoder *encoder)
+{
+}
+
+static void dglnt_encoder_restore(struct drm_encoder *encoder)
+{
+}
+
+static int dglnt_encoder_mode_valid(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode)
+{
+       if (mode &&
+               !(mode->flags & ((DRM_MODE_FLAG_INTERLACE |
+                       DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) &&
+               (mode->clock <= DGLNT_ENC_MAX_FREQ) &&
+               (mode->hdisplay <= DGLNT_ENC_MAX_H) &&
+               (mode->vdisplay <= DGLNT_ENC_MAX_V))
+               return MODE_OK;
+       return MODE_BAD;
+}
+
+static int dglnt_encoder_get_modes(struct drm_encoder *encoder,
+                               struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+       struct edid *edid;
+       int num_modes = 0;
+
+       if (dglnt->i2c_present) {
+               edid = drm_get_edid(connector, dglnt->i2c_bus);
+               drm_connector_update_edid_property(connector, edid);
+               if (edid) {
+                       num_modes = drm_add_edid_modes(connector, edid);
+                       kfree(edid);
+               }
+       } else {
+               num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H,
+                                               DGLNT_ENC_MAX_V);
+               drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H,
+                                       DGLNT_ENC_PREF_V);
+       }
+       return num_modes;
+}
+
+static enum drm_connector_status dglnt_encoder_detect(
+                                       struct drm_encoder *encoder,
+                                       struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+
+       if (dglnt->i2c_present) {
+               if (drm_probe_ddc(dglnt->i2c_bus))
+                       return connector_status_connected;
+               return connector_status_disconnected;
+       } else
+               return connector_status_unknown;
+}
+
+static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = {
+       .dpms                   = dglnt_encoder_dpms,
+       .save                   = dglnt_encoder_save,
+       .restore                = dglnt_encoder_restore,
+       .mode_fixup             = dglnt_mode_fixup,
+       .mode_valid             = dglnt_encoder_mode_valid,
+       .mode_set               = dglnt_encoder_mode_set,
+       .detect                 = dglnt_encoder_detect,
+       .get_modes              = dglnt_encoder_get_modes,
+};
+
+static int dglnt_encoder_encoder_init(struct platform_device *pdev,
+                               struct drm_device *dev,
+                               struct drm_encoder_slave *encoder)
+{
+       struct dglnt_encoder *dglnt = platform_get_drvdata(pdev);
+       struct device_node *sub_node;
+
+       encoder->slave_priv = dglnt;
+       encoder->slave_funcs = &dglnt_encoder_slave_funcs;
+
+       dglnt->encoder = &encoder->base;
+
+       /* get i2c adapter for edid */
+       dglnt->i2c_present = false;
+       sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0);
+       if (sub_node) {
+               dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node);
+               if (!dglnt->i2c_bus)
+                       DRM_INFO("failed to get the edid i2c adapter, using default modes\n");
+               else
+                       dglnt->i2c_present = true;
+               of_node_put(sub_node);
+       }
+
+       return 0;
+}
+
+static int dglnt_encoder_probe(struct platform_device *pdev)
+{
+       struct dglnt_encoder *dglnt;
+
+       dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL);
+       if (!dglnt)
+               return -ENOMEM;
+
+       platform_set_drvdata(pdev, dglnt);
+
+       return 0;
+}
+
+static int dglnt_encoder_remove(struct platform_device *pdev)
+{
+       return 0;
+}
+
+static const struct of_device_id dglnt_encoder_of_match[] = {
+       { .compatible = "digilent,drm-encoder", },
+       { /* end of table */ },
+};
+MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match);
+
+static struct drm_platform_encoder_driver dglnt_encoder_driver = {
+       .platform_driver = {
+               .probe                  = dglnt_encoder_probe,
+               .remove                 = dglnt_encoder_remove,
+               .driver                 = {
+                       .owner          = THIS_MODULE,
+                       .name           = "dglnt-drm-enc",
+                       .of_match_table = dglnt_encoder_of_match,
+               },
+       },
+
+       .encoder_init = dglnt_encoder_encoder_init,
+};
+
+static int __init dglnt_encoder_init(void)
+{
+       return platform_driver_register(&dglnt_encoder_driver.platform_driver);
+}
+
+static void __exit dglnt_encoder_exit(void)
+{
+       platform_driver_unregister(&dglnt_encoder_driver.platform_driver);
+}
+
+module_init(dglnt_encoder_init);
+module_exit(dglnt_encoder_exit);
+
+MODULE_AUTHOR("Digilent, Inc.");
+MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards");
+MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
new file mode 100644
index 00000000..9b6229db
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
@@ -0,0 +1,607 @@
+From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:16:06 +1000
+Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core
+Add support for the axi_dynclk IP Core available from Digilent. This IP
+core dynamically configures the clock resources inside a Xilinx FPGA to
+generate a clock with a software programmable frequency.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ drivers/clk/Kconfig            |   8 +
+ drivers/clk/Makefile           |   1 +
+ drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 556 insertions(+)
+ create mode 100644 drivers/clk/clk-dglnt-dynclk.c
+diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
+index dccb111100..7fe65a702b 100644
+--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
+@@ -148,6 +148,14 @@ config CLK_QORIQ
+          This adds the clock driver support for Freescale QorIQ platforms
+          using common clock framework.
+ 
+config COMMON_CLK_DGLNT_DYNCLK
+       tristate "Digilent axi_dynclk Driver"
+       depends on ARCH_ZYNQ || MICROBLAZE
+       help
+       ---help---
+         Support for the Digilent AXI Dynamic Clock core for Xilinx
+         FPGAs.
+
+ config COMMON_CLK_XGENE
+        bool "Clock driver for APM XGene SoC"
+        default y
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 0760449dde..45ce97d053 100644
+--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706)      += clk-cdce706.o
+ obj-$(CONFIG_COMMON_CLK_CDCE925)       += clk-cdce925.o
+ obj-$(CONFIG_ARCH_CLPS711X)            += clk-clps711x.o
+ obj-$(CONFIG_COMMON_CLK_CS2000_CP)     += clk-cs2000-cp.o
+obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK)  += clk-dglnt-dynclk.o
+ obj-$(CONFIG_ARCH_EFM32)               += clk-efm32gg.o
+ obj-$(CONFIG_ARCH_HIGHBANK)            += clk-highbank.o
+ obj-$(CONFIG_COMMON_CLK_MAX77686)      += clk-max77686.o
+diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c
+new file mode 100644
+index 0000000000..496ad5fc90
+--- /dev/null
+++ b/drivers/clk/clk-dglnt-dynclk.c
+@@ -0,0 +1,547 @@
+/*
+ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clk-provider.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+
+#define CLK_BIT_WEDGE 13
+#define CLK_BIT_NOCOUNT 12
+
+/* This value is used to signal an error */
+#define ERR_CLKCOUNTCALC 0xFFFFFFFF
+#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT)
+
+#define DYNCLK_DIV_1_REGMASK 0x1041
+/* 25 MHz (125 KHz / 5) */
+#define DYNCLK_DEFAULT_FREQ 125000
+
+#define MMCM_FREQ_VCOMIN 600000
+#define MMCM_FREQ_VCOMAX 1200000
+#define MMCM_FREQ_PFDMIN 10000
+#define MMCM_FREQ_PFDMAX 450000
+#define MMCM_FREQ_OUTMIN 4000
+#define MMCM_FREQ_OUTMAX 800000
+#define MMCM_DIV_MAX 106
+#define MMCM_FB_MIN 2
+#define MMCM_FB_MAX 64
+#define MMCM_CLKDIV_MAX 128
+#define MMCM_CLKDIV_MIN 1
+
+#define OFST_DISPLAY_CTRL 0x0
+#define OFST_DISPLAY_STATUS 0x4
+#define OFST_DISPLAY_CLK_L 0x8
+#define OFST_DISPLAY_FB_L 0x0C
+#define OFST_DISPLAY_FB_H_CLK_H 0x10
+#define OFST_DISPLAY_DIV 0x14
+#define OFST_DISPLAY_LOCK_L 0x18
+#define OFST_DISPLAY_FLTR_LOCK_H 0x1C
+
+static const u64 lock_lookup[64] = {
+       0b0011000110111110100011111010010000000001,
+       0b0011000110111110100011111010010000000001,
+       0b0100001000111110100011111010010000000001,
+       0b0101101011111110100011111010010000000001,
+       0b0111001110111110100011111010010000000001,
+       0b1000110001111110100011111010010000000001,
+       0b1001110011111110100011111010010000000001,
+       0b1011010110111110100011111010010000000001,
+       0b1100111001111110100011111010010000000001,
+       0b1110011100111110100011111010010000000001,
+       0b1111111111111000010011111010010000000001,
+       0b1111111111110011100111111010010000000001,
+       0b1111111111101110111011111010010000000001,
+       0b1111111111101011110011111010010000000001,
+       0b1111111111101000101011111010010000000001,
+       0b1111111111100111000111111010010000000001,
+       0b1111111111100011111111111010010000000001,
+       0b1111111111100010011011111010010000000001,
+       0b1111111111100000110111111010010000000001,
+       0b1111111111011111010011111010010000000001,
+       0b1111111111011101101111111010010000000001,
+       0b1111111111011100001011111010010000000001,
+       0b1111111111011010100111111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111010111011111111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001
+};
+
+static const u32 filter_lookup_low[64] = {
+       0b0001011111,
+       0b0001010111,
+       0b0001111011,
+       0b0001011011,
+       0b0001101011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001001011,
+       0b0001001011,
+       0b0001001011,
+       0b0010110011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011
+};
+
+struct dglnt_dynclk_reg;
+struct dglnt_dynclk_mode;
+struct dglnt_dynclk;
+
+struct dglnt_dynclk_reg {
+       u32 clk0L;
+       u32 clkFBL;
+       u32 clkFBH_clk0H;
+       u32 divclk;
+       u32 lockL;
+       u32 fltr_lockH;
+};
+
+struct dglnt_dynclk_mode {
+       u32 freq;
+       u32 fbmult;
+       u32 clkdiv;
+       u32 maindiv;
+};
+
+struct dglnt_dynclk {
+       void __iomem *base;
+       struct clk_hw clk_hw;
+       unsigned long freq;
+};
+
+u32 dglnt_dynclk_divider(u32 divide)
+{
+       u32 output = 0;
+       u32 highTime = 0;
+       u32 lowTime = 0;
+
+       if ((divide < 1) || (divide > 128))
+               return ERR_CLKDIVIDER;
+
+       if (divide == 1)
+               return DYNCLK_DIV_1_REGMASK;
+
+       highTime = divide / 2;
+       /* if divide is odd */
+       if (divide & 0x1) {
+               lowTime = highTime + 1;
+               output = 1 << CLK_BIT_WEDGE;
+       } else {
+               lowTime = highTime;
+       }
+
+       output |= 0x03F & lowTime;
+       output |= 0xFC0 & (highTime << 6);
+       return output;
+}
+
+u32 dglnt_dynclk_count_calc(u32 divide)
+{
+       u32 output = 0;
+       u32 divCalc = 0;
+
+       divCalc = dglnt_dynclk_divider(divide);
+       if (divCalc == ERR_CLKDIVIDER)
+               output = ERR_CLKCOUNTCALC;
+       else
+               output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000);
+       return output;
+}
+
+
+int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues,
+                         struct dglnt_dynclk_mode *clkParams)
+{
+       if ((clkParams->fbmult < 2) || clkParams->fbmult > 64)
+               return -EINVAL;
+
+       regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv);
+       if (regValues->clk0L == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult);
+       if (regValues->clkFBL == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBH_clk0H = 0;
+
+       regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv);
+       if (regValues->divclk == ERR_CLKDIVIDER)
+               return -EINVAL;
+
+       regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] &
+                                0xFFFFFFFF);
+
+       regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >>
+                                      32) & 0x000000FF);
+       regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] <<
+                                  16) & 0x03FF0000);
+
+       return 0;
+}
+
+void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues,
+                           void __iomem *baseaddr)
+{
+       writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L);
+       writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L);
+       writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H);
+       writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV);
+       writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L);
+       writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H);
+}
+
+u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq,
+                          struct dglnt_dynclk_mode *bestPick)
+{
+       u32 bestError = MMCM_FREQ_OUTMAX;
+       u32 curError;
+       u32 curClkMult;
+       u32 curFreq;
+       u32 divVal;
+       u32 curFb, curClkDiv;
+       u32 minFb = 0;
+       u32 maxFb = 0;
+       u32 curDiv = 1;
+       u32 maxDiv;
+       bool freq_found = false;
+
+       bestPick->freq = 0;
+       if (parentFreq == 0)
+               return 0;
+
+       /* minimum frequency is actually dictated by VCOmin */
+       if (freq < MMCM_FREQ_OUTMIN)
+               freq = MMCM_FREQ_OUTMIN;
+       if (freq > MMCM_FREQ_OUTMAX)
+               freq = MMCM_FREQ_OUTMAX;
+
+       if (parentFreq > MMCM_FREQ_PFDMAX)
+               curDiv = 2;
+       maxDiv = parentFreq / MMCM_FREQ_PFDMIN;
+       if (maxDiv > MMCM_DIV_MAX)
+               maxDiv = MMCM_DIV_MAX;
+
+       while (curDiv <= maxDiv && !freq_found) {
+               minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq);
+               maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq);
+               if (maxFb > MMCM_FB_MAX)
+                       maxFb = MMCM_FB_MAX;
+               if (minFb < MMCM_FB_MIN)
+                       minFb = MMCM_FB_MIN;
+
+               divVal = curDiv * freq;
+               /*
+                * This multiplier is used to find the best clkDiv value for
+                * each FB value
+                */
+               curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal;
+
+               curFb = minFb;
+               while (curFb <= maxFb && !freq_found) {
+                       curClkDiv = ((curClkMult * curFb) + 500) / 1000;
+                       if (curClkDiv > MMCM_CLKDIV_MAX)
+                               curClkDiv = MMCM_CLKDIV_MAX;
+                       if (curClkDiv < MMCM_CLKDIV_MIN)
+                               curClkDiv = MMCM_CLKDIV_MIN;
+                       curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv);
+                       if (curFreq >= freq)
+                               curError = curFreq - freq;
+                       else
+                               curError = freq - curFreq;
+                       if (curError < bestError) {
+                               bestError = curError;
+                               bestPick->clkdiv = curClkDiv;
+                               bestPick->fbmult = curFb;
+                               bestPick->maindiv = curDiv;
+                               bestPick->freq = curFreq;
+                       }
+                       if (!curError)
+                               freq_found = true;
+                       curFb++;
+               }
+               curDiv++;
+       }
+       return bestPick->freq;
+}
+
+static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw)
+{
+       return container_of(clk_hw, struct dglnt_dynclk, clk_hw);
+}
+
+
+static int dglnt_dynclk_enable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       unsigned int clock_state;
+
+       if (dglnt_dynclk->freq) {
+               writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+               do {
+                       clock_state = readl(dglnt_dynclk->base +
+                                           OFST_DISPLAY_STATUS);
+               } while (!clock_state);
+       }
+       return 0;
+}
+
+static void dglnt_dynclk_disable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+}
+
+static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw,
+       unsigned long rate, unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       struct dglnt_dynclk_reg clkReg;
+       struct dglnt_dynclk_mode clkMode;
+
+       if (parent_rate == 0 || rate == 0)
+               return -EINVAL;
+       if (rate == dglnt_dynclk->freq)
+               return 0;
+
+       /*
+        * Convert from Hz to KHz, then multiply by five to account for
+        * BUFR division
+        */
+       rate = (rate + 100) / 200;
+       /* convert from Hz to KHz */
+       parent_rate = (parent_rate + 500) / 1000;
+       if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode))
+               return -EINVAL;
+
+       /*
+        * Write to the PLL dynamic configuration registers to configure it
+        * with the calculated parameters.
+        */
+       dglnt_dynclk_find_reg(&clkReg, &clkMode);
+       dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base);
+       dglnt_dynclk->freq = clkMode.freq * 200;
+       dglnt_dynclk_disable(clk_hw);
+       dglnt_dynclk_enable(clk_hw);
+
+       return 0;
+}
+
+static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate,
+       unsigned long *parent_rate)
+{
+       struct dglnt_dynclk_mode clkMode;
+
+       dglnt_dynclk_find_mode(((rate + 100) / 200),
+               ((*parent_rate) + 500) / 1000, &clkMode);
+
+       return (clkMode.freq * 200);
+}
+
+static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw,
+       unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       return dglnt_dynclk->freq;
+}
+
+
+static const struct clk_ops dglnt_dynclk_ops = {
+       .recalc_rate = dglnt_dynclk_recalc_rate,
+       .round_rate = dglnt_dynclk_round_rate,
+       .set_rate = dglnt_dynclk_set_rate,
+       .enable = dglnt_dynclk_enable,
+       .disable = dglnt_dynclk_disable,
+};
+
+static const struct of_device_id dglnt_dynclk_ids[] = {
+       { .compatible = "digilent,axi-dynclk", },
+       { },
+};
+MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids);
+
+static int dglnt_dynclk_probe(struct platform_device *pdev)
+{
+       const struct of_device_id *id;
+       struct dglnt_dynclk *dglnt_dynclk;
+       struct clk_init_data init;
+       const char *parent_name;
+       const char *clk_name;
+       struct resource *mem;
+       struct clk *clk;
+
+       if (!pdev->dev.of_node)
+               return -ENODEV;
+
+       id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node);
+       if (!id)
+               return -ENODEV;
+
+       dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk),
+                                   GFP_KERNEL);
+       if (!dglnt_dynclk)
+               return -ENOMEM;
+
+       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem);
+       if (IS_ERR(dglnt_dynclk->base))
+               return PTR_ERR(dglnt_dynclk->base);
+
+       parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
+       if (!parent_name)
+               return -EINVAL;
+
+       clk_name = pdev->dev.of_node->name;
+       of_property_read_string(pdev->dev.of_node, "clock-output-names",
+               &clk_name);
+
+       init.name = clk_name;
+       init.ops = &dglnt_dynclk_ops;
+       init.flags = 0;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+
+       dglnt_dynclk->freq = 0;
+       dglnt_dynclk_disable(&dglnt_dynclk->clk_hw);
+
+       dglnt_dynclk->clk_hw.init = &init;
+       clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+
+       return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
+                                  clk);
+}
+
+static int dglnt_dynclk_remove(struct platform_device *pdev)
+{
+       of_clk_del_provider(pdev->dev.of_node);
+
+       return 0;
+}
+
+static struct platform_driver dglnt_dynclk_driver = {
+       .driver = {
+               .name = "dglnt-dynclk",
+               .owner = THIS_MODULE,
+               .of_match_table = dglnt_dynclk_ids,
+       },
+       .probe = dglnt_dynclk_probe,
+       .remove = dglnt_dynclk_remove,
+};
+module_platform_driver(dglnt_dynclk_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sam Bobrowicz <sbobrowicz@digilentinc.com>");
+MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core");
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
new file mode 100644
index 00000000..a98d84c5
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
@@ -0,0 +1,54 @@
+From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan@nathanrossi.com>
+Date: Mon, 2 May 2016 23:46:42 +1000
+Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on
+Fix the issues where the VTC is reset (losing its timing config).
+Also fix the issue where the plane destroys its DMA descriptors and
+marks the DMA channels as inactive but never recreates the descriptors
+and never updates the active state when turning DPMS back on.
+Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
+Upstream-Status: Pending [This is a workaround]
+---
+ drivers/gpu/drm/xilinx/xilinx_drm_crtc.c  | 1 -
+ drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+index 631d35b921..93dbd4b58a 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
+        default:
+                if (crtc->vtc) {
+                        xilinx_vtc_disable(crtc->vtc);
+-                       xilinx_vtc_reset(crtc->vtc);
+                }
+                if (crtc->cresample) {
+                        xilinx_cresample_disable(crtc->cresample);
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+index 6a248b72d4..d2518a4bdf 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+        for (i = 0; i < MAX_NUM_SUB_PLANES; i++) {
+                struct xilinx_drm_plane_dma *dma = &plane->dma[i];
+ 
+-               if (dma->chan && dma->is_active) {
+               if (dma->chan) {
+                        flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
+                        desc = dmaengine_prep_interleaved_dma(dma->chan,
+                                                              &dma->xt,
+@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+                        dmaengine_submit(desc);
+ 
+                        dma_async_issue_pending(dma->chan);
+                       dma->is_active = true;
+                }
+        }
+ }
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0004-minized-wifi-bluetooth.cfg b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0004-minized-wifi-bluetooth.cfg
new file mode 100644
index 00000000..f71e53ab
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.1/0004-minized-wifi-bluetooth.cfg
@@ -0,0 +1,33 @@
+#
+# Bluetooth config
+#
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_HS=y
+CONFIG_BT_LE=y
+CONFIG_BT_BCM=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HIDP=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_BRCMUTIL=y
+CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_SDIO=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_SHA256=y
+#
+# Regulator config
+#
+CONFIG_REGMAP_IRQ=y
+CONFIG_I2C_XILINX=y
+CONFIG_MFD_DA9062=y
+CONFIG_REGULATOR_DA9062=y
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
new file mode 100644
index 00000000..660bc218
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
@@ -0,0 +1,305 @@
+From 21cc8144efdaa3cd8dbd7279f87b14fa3432fae4 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:14:13 +1000
+Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards
+Add the dglnt_encoder driver that enables DRM support for the VGA and
+HDMI output ports found on many Digilent boards.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ .../bindings/drm/xilinx/dglnt_encoder.txt          |  23 +++
+ drivers/gpu/drm/xilinx/Kconfig                     |   6 +
+ drivers/gpu/drm/xilinx/Makefile                    |   1 +
+ drivers/gpu/drm/xilinx/dglnt_encoder.c             | 217 +++++++++++++++++++++
+ 4 files changed, 247 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+ create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c
+diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+new file mode 100644
+index 0000000..242b24e
+--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+@@ -0,0 +1,23 @@
+Device-Tree bindings for Digilent DRM Encoder Slave
+
+This driver provides support for VGA and HDMI outputs on Digilent FPGA boards.
+The VGA or HDMI port must be connected to a Xilinx display pipeline via an
+axi2vid IP core.
+
+Required properties:
+ - compatible: Should be "digilent,drm-encoder".
+
+Optional properties:
+ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video
+                   connector. This is used to obtain the supported resolutions
+                   of an attached monitor. If not defined, then a default
+                   set of resolutions is used and the display will initialize
+                   to 720p. Note most VGA connectors on Digilent boards do
+                   not have the DDC bus routed out.
+
+Example:
+
+       encoder_0: digilent_encoder {
+               compatible = "digilent,drm-encoder";
+               dglnt,edid-i2c = <&i2c1>;
+       };
+diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig
+index 57e18a9..d9ecff2 100644
+--- a/drivers/gpu/drm/xilinx/Kconfig
+++ b/drivers/gpu/drm/xilinx/Kconfig
+@@ -33,6 +33,12 @@ config DRM_XILINX_DP_SUB
+        help
+          DRM driver for Xilinx Display Port Subsystem.
+ 
+config DRM_DIGILENT_ENCODER
+   tristate "Digilent VGA/HDMI DRM Encoder Driver"
+   depends on DRM_XILINX
+   help
+     DRM slave encoder for Video-out on Digilent boards.
+
+ config DRM_XILINX_DP_SUB_DEBUG_FS
+        bool "Xilinx DRM DPSUB debugfs"
+        depends on DEBUG_FS && DRM_XILINX_DP_SUB
+diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile
+index 19bc154..c2717e40 100644
+--- a/drivers/gpu/drm/xilinx/Makefile
+++ b/drivers/gpu/drm/xilinx/Makefile
+@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \
+                xilinx_drm_plane.o
+ xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o
+ 
+obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o
+ obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o
+ obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o
+ obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o
+diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+new file mode 100644
+index 0000000..cb9fc7d
+--- /dev/null
+++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+@@ -0,0 +1,217 @@
+/*
+ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat.
+ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <drm/drmP.h>
+#include <drm/drm_edid.h>
+#include <drm/drm_encoder_slave.h>
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#define DGLNT_ENC_MAX_FREQ 150000
+#define DGLNT_ENC_MAX_H 1920
+#define DGLNT_ENC_MAX_V 1080
+#define DGLNT_ENC_PREF_H 1280
+#define DGLNT_ENC_PREF_V 720
+
+struct dglnt_encoder {
+       struct drm_encoder *encoder;
+       struct i2c_adapter *i2c_bus;
+       bool i2c_present;
+};
+
+static inline struct dglnt_encoder *to_dglnt_encoder(
+                                       struct drm_encoder *encoder)
+{
+       return to_encoder_slave(encoder)->slave_priv;
+}
+
+static bool dglnt_mode_fixup(struct drm_encoder *encoder,
+                               const struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+       return true;
+}
+
+static void dglnt_encoder_mode_set(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+}
+
+static void
+dglnt_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+}
+
+static void dglnt_encoder_save(struct drm_encoder *encoder)
+{
+}
+
+static void dglnt_encoder_restore(struct drm_encoder *encoder)
+{
+}
+
+static int dglnt_encoder_mode_valid(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode)
+{
+       if (mode &&
+               !(mode->flags & ((DRM_MODE_FLAG_INTERLACE |
+                       DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) &&
+               (mode->clock <= DGLNT_ENC_MAX_FREQ) &&
+               (mode->hdisplay <= DGLNT_ENC_MAX_H) &&
+               (mode->vdisplay <= DGLNT_ENC_MAX_V))
+               return MODE_OK;
+       return MODE_BAD;
+}
+
+static int dglnt_encoder_get_modes(struct drm_encoder *encoder,
+                               struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+       struct edid *edid;
+       int num_modes = 0;
+
+       if (dglnt->i2c_present) {
+               edid = drm_get_edid(connector, dglnt->i2c_bus);
+               drm_connector_update_edid_property(connector, edid);
+               if (edid) {
+                       num_modes = drm_add_edid_modes(connector, edid);
+                       kfree(edid);
+               }
+       } else {
+               num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H,
+                                               DGLNT_ENC_MAX_V);
+               drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H,
+                                       DGLNT_ENC_PREF_V);
+       }
+       return num_modes;
+}
+
+static enum drm_connector_status dglnt_encoder_detect(
+                                       struct drm_encoder *encoder,
+                                       struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+
+       if (dglnt->i2c_present) {
+               if (drm_probe_ddc(dglnt->i2c_bus))
+                       return connector_status_connected;
+               return connector_status_disconnected;
+       } else
+               return connector_status_unknown;
+}
+
+static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = {
+       .dpms                   = dglnt_encoder_dpms,
+       .save                   = dglnt_encoder_save,
+       .restore                = dglnt_encoder_restore,
+       .mode_fixup             = dglnt_mode_fixup,
+       .mode_valid             = dglnt_encoder_mode_valid,
+       .mode_set               = dglnt_encoder_mode_set,
+       .detect                 = dglnt_encoder_detect,
+       .get_modes              = dglnt_encoder_get_modes,
+};
+
+static int dglnt_encoder_encoder_init(struct platform_device *pdev,
+                               struct drm_device *dev,
+                               struct drm_encoder_slave *encoder)
+{
+       struct dglnt_encoder *dglnt = platform_get_drvdata(pdev);
+       struct device_node *sub_node;
+
+       encoder->slave_priv = dglnt;
+       encoder->slave_funcs = &dglnt_encoder_slave_funcs;
+
+       dglnt->encoder = &encoder->base;
+
+       /* get i2c adapter for edid */
+       dglnt->i2c_present = false;
+       sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0);
+       if (sub_node) {
+               dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node);
+               if (!dglnt->i2c_bus)
+                       DRM_INFO("failed to get the edid i2c adapter, using default modes\n");
+               else
+                       dglnt->i2c_present = true;
+               of_node_put(sub_node);
+       }
+
+       return 0;
+}
+
+static int dglnt_encoder_probe(struct platform_device *pdev)
+{
+       struct dglnt_encoder *dglnt;
+
+       dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL);
+       if (!dglnt)
+               return -ENOMEM;
+
+       platform_set_drvdata(pdev, dglnt);
+
+       return 0;
+}
+
+static int dglnt_encoder_remove(struct platform_device *pdev)
+{
+       return 0;
+}
+
+static const struct of_device_id dglnt_encoder_of_match[] = {
+       { .compatible = "digilent,drm-encoder", },
+       { /* end of table */ },
+};
+MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match);
+
+static struct drm_platform_encoder_driver dglnt_encoder_driver = {
+       .platform_driver = {
+               .probe                  = dglnt_encoder_probe,
+               .remove                 = dglnt_encoder_remove,
+               .driver                 = {
+                       .owner          = THIS_MODULE,
+                       .name           = "dglnt-drm-enc",
+                       .of_match_table = dglnt_encoder_of_match,
+               },
+       },
+
+       .encoder_init = dglnt_encoder_encoder_init,
+};
+
+static int __init dglnt_encoder_init(void)
+{
+       return platform_driver_register(&dglnt_encoder_driver.platform_driver);
+}
+
+static void __exit dglnt_encoder_exit(void)
+{
+       platform_driver_unregister(&dglnt_encoder_driver.platform_driver);
+}
+
+module_init(dglnt_encoder_init);
+module_exit(dglnt_encoder_exit);
+
+MODULE_AUTHOR("Digilent, Inc.");
+MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards");
+MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
new file mode 100644
index 00000000..9b6229db
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
@@ -0,0 +1,607 @@
+From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:16:06 +1000
+Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core
+Add support for the axi_dynclk IP Core available from Digilent. This IP
+core dynamically configures the clock resources inside a Xilinx FPGA to
+generate a clock with a software programmable frequency.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ drivers/clk/Kconfig            |   8 +
+ drivers/clk/Makefile           |   1 +
+ drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 556 insertions(+)
+ create mode 100644 drivers/clk/clk-dglnt-dynclk.c
+diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
+index dccb111100..7fe65a702b 100644
+--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
+@@ -148,6 +148,14 @@ config CLK_QORIQ
+          This adds the clock driver support for Freescale QorIQ platforms
+          using common clock framework.
+ 
+config COMMON_CLK_DGLNT_DYNCLK
+       tristate "Digilent axi_dynclk Driver"
+       depends on ARCH_ZYNQ || MICROBLAZE
+       help
+       ---help---
+         Support for the Digilent AXI Dynamic Clock core for Xilinx
+         FPGAs.
+
+ config COMMON_CLK_XGENE
+        bool "Clock driver for APM XGene SoC"
+        default y
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 0760449dde..45ce97d053 100644
+--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706)      += clk-cdce706.o
+ obj-$(CONFIG_COMMON_CLK_CDCE925)       += clk-cdce925.o
+ obj-$(CONFIG_ARCH_CLPS711X)            += clk-clps711x.o
+ obj-$(CONFIG_COMMON_CLK_CS2000_CP)     += clk-cs2000-cp.o
+obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK)  += clk-dglnt-dynclk.o
+ obj-$(CONFIG_ARCH_EFM32)               += clk-efm32gg.o
+ obj-$(CONFIG_ARCH_HIGHBANK)            += clk-highbank.o
+ obj-$(CONFIG_COMMON_CLK_MAX77686)      += clk-max77686.o
+diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c
+new file mode 100644
+index 0000000000..496ad5fc90
+--- /dev/null
+++ b/drivers/clk/clk-dglnt-dynclk.c
+@@ -0,0 +1,547 @@
+/*
+ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clk-provider.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+
+#define CLK_BIT_WEDGE 13
+#define CLK_BIT_NOCOUNT 12
+
+/* This value is used to signal an error */
+#define ERR_CLKCOUNTCALC 0xFFFFFFFF
+#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT)
+
+#define DYNCLK_DIV_1_REGMASK 0x1041
+/* 25 MHz (125 KHz / 5) */
+#define DYNCLK_DEFAULT_FREQ 125000
+
+#define MMCM_FREQ_VCOMIN 600000
+#define MMCM_FREQ_VCOMAX 1200000
+#define MMCM_FREQ_PFDMIN 10000
+#define MMCM_FREQ_PFDMAX 450000
+#define MMCM_FREQ_OUTMIN 4000
+#define MMCM_FREQ_OUTMAX 800000
+#define MMCM_DIV_MAX 106
+#define MMCM_FB_MIN 2
+#define MMCM_FB_MAX 64
+#define MMCM_CLKDIV_MAX 128
+#define MMCM_CLKDIV_MIN 1
+
+#define OFST_DISPLAY_CTRL 0x0
+#define OFST_DISPLAY_STATUS 0x4
+#define OFST_DISPLAY_CLK_L 0x8
+#define OFST_DISPLAY_FB_L 0x0C
+#define OFST_DISPLAY_FB_H_CLK_H 0x10
+#define OFST_DISPLAY_DIV 0x14
+#define OFST_DISPLAY_LOCK_L 0x18
+#define OFST_DISPLAY_FLTR_LOCK_H 0x1C
+
+static const u64 lock_lookup[64] = {
+       0b0011000110111110100011111010010000000001,
+       0b0011000110111110100011111010010000000001,
+       0b0100001000111110100011111010010000000001,
+       0b0101101011111110100011111010010000000001,
+       0b0111001110111110100011111010010000000001,
+       0b1000110001111110100011111010010000000001,
+       0b1001110011111110100011111010010000000001,
+       0b1011010110111110100011111010010000000001,
+       0b1100111001111110100011111010010000000001,
+       0b1110011100111110100011111010010000000001,
+       0b1111111111111000010011111010010000000001,
+       0b1111111111110011100111111010010000000001,
+       0b1111111111101110111011111010010000000001,
+       0b1111111111101011110011111010010000000001,
+       0b1111111111101000101011111010010000000001,
+       0b1111111111100111000111111010010000000001,
+       0b1111111111100011111111111010010000000001,
+       0b1111111111100010011011111010010000000001,
+       0b1111111111100000110111111010010000000001,
+       0b1111111111011111010011111010010000000001,
+       0b1111111111011101101111111010010000000001,
+       0b1111111111011100001011111010010000000001,
+       0b1111111111011010100111111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111010111011111111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001
+};
+
+static const u32 filter_lookup_low[64] = {
+       0b0001011111,
+       0b0001010111,
+       0b0001111011,
+       0b0001011011,
+       0b0001101011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001001011,
+       0b0001001011,
+       0b0001001011,
+       0b0010110011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011
+};
+
+struct dglnt_dynclk_reg;
+struct dglnt_dynclk_mode;
+struct dglnt_dynclk;
+
+struct dglnt_dynclk_reg {
+       u32 clk0L;
+       u32 clkFBL;
+       u32 clkFBH_clk0H;
+       u32 divclk;
+       u32 lockL;
+       u32 fltr_lockH;
+};
+
+struct dglnt_dynclk_mode {
+       u32 freq;
+       u32 fbmult;
+       u32 clkdiv;
+       u32 maindiv;
+};
+
+struct dglnt_dynclk {
+       void __iomem *base;
+       struct clk_hw clk_hw;
+       unsigned long freq;
+};
+
+u32 dglnt_dynclk_divider(u32 divide)
+{
+       u32 output = 0;
+       u32 highTime = 0;
+       u32 lowTime = 0;
+
+       if ((divide < 1) || (divide > 128))
+               return ERR_CLKDIVIDER;
+
+       if (divide == 1)
+               return DYNCLK_DIV_1_REGMASK;
+
+       highTime = divide / 2;
+       /* if divide is odd */
+       if (divide & 0x1) {
+               lowTime = highTime + 1;
+               output = 1 << CLK_BIT_WEDGE;
+       } else {
+               lowTime = highTime;
+       }
+
+       output |= 0x03F & lowTime;
+       output |= 0xFC0 & (highTime << 6);
+       return output;
+}
+
+u32 dglnt_dynclk_count_calc(u32 divide)
+{
+       u32 output = 0;
+       u32 divCalc = 0;
+
+       divCalc = dglnt_dynclk_divider(divide);
+       if (divCalc == ERR_CLKDIVIDER)
+               output = ERR_CLKCOUNTCALC;
+       else
+               output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000);
+       return output;
+}
+
+
+int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues,
+                         struct dglnt_dynclk_mode *clkParams)
+{
+       if ((clkParams->fbmult < 2) || clkParams->fbmult > 64)
+               return -EINVAL;
+
+       regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv);
+       if (regValues->clk0L == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult);
+       if (regValues->clkFBL == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBH_clk0H = 0;
+
+       regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv);
+       if (regValues->divclk == ERR_CLKDIVIDER)
+               return -EINVAL;
+
+       regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] &
+                                0xFFFFFFFF);
+
+       regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >>
+                                      32) & 0x000000FF);
+       regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] <<
+                                  16) & 0x03FF0000);
+
+       return 0;
+}
+
+void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues,
+                           void __iomem *baseaddr)
+{
+       writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L);
+       writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L);
+       writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H);
+       writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV);
+       writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L);
+       writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H);
+}
+
+u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq,
+                          struct dglnt_dynclk_mode *bestPick)
+{
+       u32 bestError = MMCM_FREQ_OUTMAX;
+       u32 curError;
+       u32 curClkMult;
+       u32 curFreq;
+       u32 divVal;
+       u32 curFb, curClkDiv;
+       u32 minFb = 0;
+       u32 maxFb = 0;
+       u32 curDiv = 1;
+       u32 maxDiv;
+       bool freq_found = false;
+
+       bestPick->freq = 0;
+       if (parentFreq == 0)
+               return 0;
+
+       /* minimum frequency is actually dictated by VCOmin */
+       if (freq < MMCM_FREQ_OUTMIN)
+               freq = MMCM_FREQ_OUTMIN;
+       if (freq > MMCM_FREQ_OUTMAX)
+               freq = MMCM_FREQ_OUTMAX;
+
+       if (parentFreq > MMCM_FREQ_PFDMAX)
+               curDiv = 2;
+       maxDiv = parentFreq / MMCM_FREQ_PFDMIN;
+       if (maxDiv > MMCM_DIV_MAX)
+               maxDiv = MMCM_DIV_MAX;
+
+       while (curDiv <= maxDiv && !freq_found) {
+               minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq);
+               maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq);
+               if (maxFb > MMCM_FB_MAX)
+                       maxFb = MMCM_FB_MAX;
+               if (minFb < MMCM_FB_MIN)
+                       minFb = MMCM_FB_MIN;
+
+               divVal = curDiv * freq;
+               /*
+                * This multiplier is used to find the best clkDiv value for
+                * each FB value
+                */
+               curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal;
+
+               curFb = minFb;
+               while (curFb <= maxFb && !freq_found) {
+                       curClkDiv = ((curClkMult * curFb) + 500) / 1000;
+                       if (curClkDiv > MMCM_CLKDIV_MAX)
+                               curClkDiv = MMCM_CLKDIV_MAX;
+                       if (curClkDiv < MMCM_CLKDIV_MIN)
+                               curClkDiv = MMCM_CLKDIV_MIN;
+                       curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv);
+                       if (curFreq >= freq)
+                               curError = curFreq - freq;
+                       else
+                               curError = freq - curFreq;
+                       if (curError < bestError) {
+                               bestError = curError;
+                               bestPick->clkdiv = curClkDiv;
+                               bestPick->fbmult = curFb;
+                               bestPick->maindiv = curDiv;
+                               bestPick->freq = curFreq;
+                       }
+                       if (!curError)
+                               freq_found = true;
+                       curFb++;
+               }
+               curDiv++;
+       }
+       return bestPick->freq;
+}
+
+static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw)
+{
+       return container_of(clk_hw, struct dglnt_dynclk, clk_hw);
+}
+
+
+static int dglnt_dynclk_enable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       unsigned int clock_state;
+
+       if (dglnt_dynclk->freq) {
+               writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+               do {
+                       clock_state = readl(dglnt_dynclk->base +
+                                           OFST_DISPLAY_STATUS);
+               } while (!clock_state);
+       }
+       return 0;
+}
+
+static void dglnt_dynclk_disable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+}
+
+static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw,
+       unsigned long rate, unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       struct dglnt_dynclk_reg clkReg;
+       struct dglnt_dynclk_mode clkMode;
+
+       if (parent_rate == 0 || rate == 0)
+               return -EINVAL;
+       if (rate == dglnt_dynclk->freq)
+               return 0;
+
+       /*
+        * Convert from Hz to KHz, then multiply by five to account for
+        * BUFR division
+        */
+       rate = (rate + 100) / 200;
+       /* convert from Hz to KHz */
+       parent_rate = (parent_rate + 500) / 1000;
+       if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode))
+               return -EINVAL;
+
+       /*
+        * Write to the PLL dynamic configuration registers to configure it
+        * with the calculated parameters.
+        */
+       dglnt_dynclk_find_reg(&clkReg, &clkMode);
+       dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base);
+       dglnt_dynclk->freq = clkMode.freq * 200;
+       dglnt_dynclk_disable(clk_hw);
+       dglnt_dynclk_enable(clk_hw);
+
+       return 0;
+}
+
+static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate,
+       unsigned long *parent_rate)
+{
+       struct dglnt_dynclk_mode clkMode;
+
+       dglnt_dynclk_find_mode(((rate + 100) / 200),
+               ((*parent_rate) + 500) / 1000, &clkMode);
+
+       return (clkMode.freq * 200);
+}
+
+static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw,
+       unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       return dglnt_dynclk->freq;
+}
+
+
+static const struct clk_ops dglnt_dynclk_ops = {
+       .recalc_rate = dglnt_dynclk_recalc_rate,
+       .round_rate = dglnt_dynclk_round_rate,
+       .set_rate = dglnt_dynclk_set_rate,
+       .enable = dglnt_dynclk_enable,
+       .disable = dglnt_dynclk_disable,
+};
+
+static const struct of_device_id dglnt_dynclk_ids[] = {
+       { .compatible = "digilent,axi-dynclk", },
+       { },
+};
+MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids);
+
+static int dglnt_dynclk_probe(struct platform_device *pdev)
+{
+       const struct of_device_id *id;
+       struct dglnt_dynclk *dglnt_dynclk;
+       struct clk_init_data init;
+       const char *parent_name;
+       const char *clk_name;
+       struct resource *mem;
+       struct clk *clk;
+
+       if (!pdev->dev.of_node)
+               return -ENODEV;
+
+       id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node);
+       if (!id)
+               return -ENODEV;
+
+       dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk),
+                                   GFP_KERNEL);
+       if (!dglnt_dynclk)
+               return -ENOMEM;
+
+       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem);
+       if (IS_ERR(dglnt_dynclk->base))
+               return PTR_ERR(dglnt_dynclk->base);
+
+       parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
+       if (!parent_name)
+               return -EINVAL;
+
+       clk_name = pdev->dev.of_node->name;
+       of_property_read_string(pdev->dev.of_node, "clock-output-names",
+               &clk_name);
+
+       init.name = clk_name;
+       init.ops = &dglnt_dynclk_ops;
+       init.flags = 0;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+
+       dglnt_dynclk->freq = 0;
+       dglnt_dynclk_disable(&dglnt_dynclk->clk_hw);
+
+       dglnt_dynclk->clk_hw.init = &init;
+       clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+
+       return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
+                                  clk);
+}
+
+static int dglnt_dynclk_remove(struct platform_device *pdev)
+{
+       of_clk_del_provider(pdev->dev.of_node);
+
+       return 0;
+}
+
+static struct platform_driver dglnt_dynclk_driver = {
+       .driver = {
+               .name = "dglnt-dynclk",
+               .owner = THIS_MODULE,
+               .of_match_table = dglnt_dynclk_ids,
+       },
+       .probe = dglnt_dynclk_probe,
+       .remove = dglnt_dynclk_remove,
+};
+module_platform_driver(dglnt_dynclk_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sam Bobrowicz <sbobrowicz@digilentinc.com>");
+MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core");
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
new file mode 100644
index 00000000..a98d84c5
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
@@ -0,0 +1,54 @@
+From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan@nathanrossi.com>
+Date: Mon, 2 May 2016 23:46:42 +1000
+Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on
+Fix the issues where the VTC is reset (losing its timing config).
+Also fix the issue where the plane destroys its DMA descriptors and
+marks the DMA channels as inactive but never recreates the descriptors
+and never updates the active state when turning DPMS back on.
+Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
+Upstream-Status: Pending [This is a workaround]
+---
+ drivers/gpu/drm/xilinx/xilinx_drm_crtc.c  | 1 -
+ drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+index 631d35b921..93dbd4b58a 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
+        default:
+                if (crtc->vtc) {
+                        xilinx_vtc_disable(crtc->vtc);
+-                       xilinx_vtc_reset(crtc->vtc);
+                }
+                if (crtc->cresample) {
+                        xilinx_cresample_disable(crtc->cresample);
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+index 6a248b72d4..d2518a4bdf 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+        for (i = 0; i < MAX_NUM_SUB_PLANES; i++) {
+                struct xilinx_drm_plane_dma *dma = &plane->dma[i];
+ 
+-               if (dma->chan && dma->is_active) {
+               if (dma->chan) {
+                        flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
+                        desc = dmaengine_prep_interleaved_dma(dma->chan,
+                                                              &dma->xt,
+@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+                        dmaengine_submit(desc);
+ 
+                        dma_async_issue_pending(dma->chan);
+                       dma->is_active = true;
+                }
+        }
+ }
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg
new file mode 100644
index 00000000..f71e53ab
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg
@@ -0,0 +1,33 @@
+#
+# Bluetooth config
+#
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_HS=y
+CONFIG_BT_LE=y
+CONFIG_BT_BCM=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HIDP=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_BRCMUTIL=y
+CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_SDIO=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_SHA256=y
+#
+# Regulator config
+#
+CONFIG_REGMAP_IRQ=y
+CONFIG_I2C_XILINX=y
+CONFIG_MFD_DA9062=y
+CONFIG_REGULATOR_DA9062=y
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend
new file mode 100644
index 00000000..c789c7a9
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend
@@ -0,0 +1,12 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx/v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}:"
+# Note: These patches are very old and doesn't apply on top of 5.x
+#       kernel. For more details refer README.md file.
+#SRC_URI:append:zybo-linux-bd-zynq7 = " \
+#       file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \
+#       file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \
+#       file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \
+#       "
+SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg"
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend
new file mode 100644
index 00000000..c789c7a9
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend
@@ -0,0 +1,12 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx/v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}:"
+# Note: These patches are very old and doesn't apply on top of 5.x
+#       kernel. For more details refer README.md file.
+#SRC_URI:append:zybo-linux-bd-zynq7 = " \
+#       file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \
+#       file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \
+#       file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \
+#       "
+SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg"
diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf
index 5441fd96..d7eb9aa8 100644
--- a/meta-xilinx-core/conf/layer.conf
+++ b/meta-xilinx-core/conf/layer.conf
@@ -46,6 +46,8 @@ XILINX_RELEASE_VERSION ??= "v2023.2"
 BUILDCFG_VARS:append = " SOC_VARIANT XILINX_RELEASE_VERSION"
+XILINX_QEMU_VERSION[v2022.1] = "v7.1.0-xilinx-v2022.1%"
+XILINX_QEMU_VERSION[v2022.2] = "v7.1.0-xilinx-v2022.2%"
 XILINX_QEMU_VERSION[v2023.1] = "v7.1.0-xilinx-v2023.1%"
 XILINX_QEMU_VERSION[v2023.2] = "v7.1.0-xilinx-v2023.2%"
 PREFERRED_VERSION_qemu-xilinx ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
@@ -63,7 +65,9 @@ XILINX_UBOOT_VERSION[v2023.2] = "v2023.01-xilinx-v2023.2%"
 PREFERRED_VERSION_u-boot-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
-XILINX_LINUX_VERSION[v2023.1] = "6.1.5-xilinx-v2023.1%"
+XILINX_LINUX_VERSION[v2022.1] = "5.15.19-xilinx-v2022.1%"
+XILINX_LINUX_VERSION[v2022.2] = "5.15.36-xilinx-v2022.2%"
+XILINX_LINUX_VERSION[v2023.1] = "6.1.30-xilinx-v2023.1%"
 XILINX_LINUX_VERSION[v2023.2] = "6.1.30-xilinx-v2023.2%"
 PREFERRED_VERSION_linux-xlnx ?= "${@d.getVarFlag('XILINX_LINUX_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb
new file mode 100644
index 00000000..6a4fd880
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb
@@ -0,0 +1,47 @@
+SUMMARY = "Xilinx AI Engine runtime"
+DESCRIPTION = "This library provides APIs for the runtime support of the Xilinx AI Engine IP"
+require aie-rt.inc
+SECTION = "libs"
+AIEDIR ?= "${S}/driver"
+S = "${WORKDIR}/git"
+I = "${AIEDIR}/include"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "${SOC_VARIANT_ARCH}"
+PV = "3.3"
+IOBACKENDS ?= "Linux"
+DEPENDS = "${@bb.utils.contains('IOBACKENDS', 'metal', 'libmetal', '', d)}"
+RDEPENDS:${PN} = "${@bb.utils.contains('IOBACKENDS', 'metal', 'libmetal', '', d)}"
+PROVIDES = "libxaiengine"
+RPROVIDES:${PN} = "libxaiengine"
+# The makefile isn't ready for parallel execution at the moment
+PARALLEL_MAKE = "-j 1"
+CFLAGS += "-Wall -Wextra -fno-thread-jumps -fno-tree-pre"
+CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'Linux', ' -D__AIELINUX__', '', d)}"
+CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'metal', ' -D__AIEMETAL__', '', d)}"
+EXTRA_OEMAKE = "-C ${AIEDIR}/src -f Makefile.Linux CFLAGS='${CFLAGS}'"
+do_compile(){
+        oe_runmake
+}
+do_install(){
+        install -d ${D}${includedir}
+        install ${I}/*.h ${D}${includedir}/
+        install -d ${D}${includedir}/xaiengine
+        install ${I}/xaiengine/*.h ${D}${includedir}/xaiengine/
+        install -d ${D}${libdir}
+        cp -dr ${AIEDIR}/src/*.so* ${D}${libdir}
+}
+PACKAGE_ARCH:versal-ai-core = "${SOC_VARIANT_ARCH}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb
index e364462b..f86c5985 100644
--- a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb
@@ -1,7 +1,7 @@
 SUMMARY = "Xilinx AI Engine runtime"
 DESCRIPTION = "This library provides APIs for the runtime support of the Xilinx AI Engine IP"
-require aie-rt.inc
+require aie-rt-2022.inc
 SECTION = "libs"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2022.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2022.inc
new file mode 100644
index 00000000..85121654
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2022.inc
@@ -0,0 +1,11 @@
+SECTION = "libs"
+REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https"
+BRANCH ?= "xlnx_rel_v2022.2"
+SRCREV ?= "ae24c8ede049906323510693f37e6167a963fd0e"
+LICENSE = "BSD-3-Clause"
+LIC_FILES_CHKSUM ?= "file://license.txt;md5=b81abf1f508952331dd7d2ab36408f5b"
+SRC_URI = "${REPO};branch=${BRANCH}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb
new file mode 100644
index 00000000..641c39a9
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb
@@ -0,0 +1,33 @@
+SUMMARY = "Xilinx AI Engine FAL(Functional Abstraction Layer)"
+DESCRIPTION = "AIE FAL provides functional abstraction APIs for runtime support of Xilinx AI Engine IP"
+require aie-rt.inc
+SECTION = "devel"
+XAIEFAL_DIR ?= "fal"
+S = "${WORKDIR}/git"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "${SOC_VARIANT_ARCH}"
+IOBACKENDS ?= "Linux"
+PROVIDES = "aiefal"
+ALLOW_EMPTY:${PN} = "1"
+inherit pkgconfig cmake
+DEPENDS = "libxaiengine"
+OECMAKE_SOURCEPATH = "${S}/${XAIEFAL_DIR}"
+EXTRA_OECMAKE = "-DWITH_TESTS=OFF "
+EXTRA_OECMAKE:append = "${@'-DWITH_EXAMPLES=ON' if d.getVar('WITH_EXAMPLES') == 'y' else '-DWITH_EXAMPLES=OFF'}"
+FILES:${PN}-demos = " \
+    ${bindir}/* \
+"
+PACKAGE_ARCH:versal-ai-core = "${SOC_VARIANT_ARCH}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb
index 6ac86a1b..2c6c9cd1 100644
--- a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb
@@ -1,7 +1,7 @@
 SUMMARY = "Xilinx AI Engine FAL(Functional Abstraction Layer)"
 DESCRIPTION = "AIE FAL provides functional abstraction APIs for runtime support of Xilinx AI Engine IP"
-require aie-rt.inc
+require aie-rt-2022.inc
 SECTION = "devel"
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.1.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.1.bb
new file mode 100644
index 00000000..f02bb879
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.1.bb
@@ -0,0 +1,8 @@
+ATF_VERSION = "2.6"
+SRCREV = "67ca59c67f542322554d78820bf9ddaa736d6a84"
+BRANCH = "xlnx_rebase_v2.6"
+LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
+include arm-trusted-firmware.inc
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb
new file mode 100644
index 00000000..5ef2e6ac
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb
@@ -0,0 +1,8 @@
+ATF_VERSION = "2.6"
+SRCREV = "0897efd45ccad29a3dbab610578c70e3a52b2caa"
+BRANCH = "xlnx_rebase_v2.6"
+LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
+include arm-trusted-firmware.inc
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.1.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.1.bb
index 454fbe86..2bcbe7d4 100644
--- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.1.bb
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.1.bb
@@ -1,5 +1,5 @@
 ATF_VERSION = "2.8"
-SRCREV = "6fcc6b179dc14de0f6ba19a1829e597b60f7aee5"
+SRCREV = "c9b71dc96f3f18ca94cad590612aae3224c8c84d"
 BRANCH = "xlnx_rebase_v2.8"
 LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
diff --git a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb
new file mode 100644
index 00000000..fdf28f41
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb
@@ -0,0 +1,31 @@
+SUMMARY = "Building and installing bootgen"
+DESCRIPTION = "Building and installing bootgen, a Xilinx tool that lets you stitch binary files together and generate device boot images"
+LICENSE = "Apache-2.0"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=d526b6d0807bf263b97da1da876f39b1"
+S = "${WORKDIR}/git"
+DEPENDS += "openssl"
+RDEPENDS:${PN} += "openssl"
+REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https"
+BRANCH ?= "xlnx_rel_v2022.2"
+SRCREV = "cf4ba93b99644dc4429ef633471a639e1382f0e7"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+EXTRA_OEMAKE += 'CROSS_COMPILER="${CXX}" -C ${S}'
+CXXFLAGS:append = " -std=c++0x"
+TARGET_CC_ARCH += "${LDFLAGS}"
+do_install() {
+    install -d ${D}${bindir}
+    install -Dm 0755 ${S}/bootgen ${D}${bindir}
+}
+FILES:${PN} = "${bindir}/bootgen"
+BBCLASSEXTEND = "native nativesdk"
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb
new file mode 100644
index 00000000..b4de4fe6
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb
@@ -0,0 +1,78 @@
+SUMMARY  = "Xilinx dfx-mgr libraries"
+DESCRIPTION = "Xilinx Runtime User Space Libraries and Binaries"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=d67bcef754e935bf77b6d7051bd62b5e"
+REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+BRANCH = "xlnx_rel_v2022.2"
+SRCREV = "bc06691eb35d7f0acb7c2508b6d050d77b0264a0"
+SOMAJOR = "1"
+SOMINOR = "0"
+SOVERSION = "${SOMAJOR}.${SOMINOR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
+S = "${WORKDIR}/git"
+inherit cmake update-rc.d systemd
+DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm"
+RDEPENDS:${PN} += " fru-print"
+EXTRA_OECMAKE += " \
+               -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \
+                "
+# Workaround for: the comparison will always evaluate as 'true' for the address of 'defaul_accel_name' will never be NULL [-Werror=address]
+CFLAGS += "-Wno-address"
+# Workaround for: '__builtin_strncpy' specified bound depends on the length of the source argument [-Werror=stringop-truncation]
+CFLAGS += "-Wno-stringop-truncation"
+INITSCRIPT_NAME = "dfx-mgr.sh"
+INITSCRIPT_PARAMS = "start 99 S ."
+SYSTEMD_PACKAGES="${PN}"
+SYSTEMD_SERVICE:${PN}="dfx-mgr.service"
+SYSTEMD_AUTO_ENABLE:${PN}="enable"
+do_install(){
+        install -d ${D}${bindir}
+        install -d ${D}${libdir}
+        install -d ${D}${includedir}
+        install -d ${D}${base_libdir}/firmware/xilinx
+        install -d ${D}${sysconfdir}/dfx-mgrd
+        cp ${B}/example/sys/linux/dfx-mgrd-static ${D}${bindir}/dfx-mgrd
+        cp ${B}/example/sys/linux/dfx-mgr-client-static ${D}${bindir}/dfx-mgr-client
+        chrpath -d ${D}${bindir}/dfx-mgrd
+        chrpath -d ${D}${bindir}/dfx-mgr-client
+        install -m 0644 ${S}/src/dfxmgr_client.h ${D}${includedir}
+        oe_soinstall ${B}/src/libdfx-mgr.so.${SOVERSION} ${D}${libdir}
+        install -m 0755 ${S}/src/daemon.conf ${D}${sysconfdir}/dfx-mgrd/
+        if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then
+                install -d ${D}${sysconfdir}/init.d/
+                install -m 0755 ${S}/src/dfx-mgr.sh ${D}${sysconfdir}/init.d/
+        fi
+        install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir}
+        install -m 0755 ${S}/src/scripts/xlnx-firmware-detect ${D}${bindir}
+        install -d ${D}${systemd_system_unitdir}
+        install -m 0644 ${S}/src/dfx-mgr.service ${D}${systemd_system_unitdir}
+}
+PACKAGES =+ "libdfx-mgr"
+FILES:${PN} += "${base_libdir}/firmware/xilinx"
+FILES:${PN} += "${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/init.d/dfx-mgr.sh', '', d)} ${systemd_system_unitdir}"
+FILES:libdfx-mgr = "${libdir}/libdfx-mgr.so.${SOVERSION} ${libdir}/libdfx-mgr.so.${SOMAJOR}"
diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb
new file mode 100644
index 00000000..2c180561
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb
@@ -0,0 +1,23 @@
+SUMMARY = "Xilinx libdfx library"
+DESCRIPTION = "Xilinx libdfx Library and headers"
+LICENSE = "MIT & GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+SRCREV = "f2b7bbca9d6936141024becfb92266600eeefc2b"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
+S = "${WORKDIR}/git"
+inherit cmake
+# Due to an update where the soname/version was defined, we need to use an RREPLACES
+# so updates will work properly.
+RREPLACES:${PN} = "libdfx"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.1.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.1.bb
new file mode 100644
index 00000000..eaf8d4ce
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.1.bb
@@ -0,0 +1,21 @@
+require u-boot-tools-xlnx.inc
+require u-boot-xlnx-2022.1.inc
+# MUST clear CONFIG_VIDEO to avoid a compilation failure trying to construct
+# bmp_logo.h
+SED_CONFIG_EFI:append = ' -e "s/CONFIG_VIDEO=.*/# CONFIG_VIDEO is not set/"'
+# Default do_compile fails with:
+# | error: object directory ../downloads/git2/github.com.Xilinx.u-boot-xlnx.git/objects does not exist; check .git/objects/info/alternates.
+# The regular workaround of calling 'git diff' seems to be problematic.
+do_compile () {
+        oe_runmake -C ${S} tools-only_defconfig O=${B}
+        # Disable CONFIG_CMD_LICENSE, license.h is not used by tools and
+        # generating it requires bin2header tool, which for target build
+        # is built with target tools and thus cannot be executed on host.
+        sed -i -e "s/CONFIG_CMD_LICENSE=.*/# CONFIG_CMD_LICENSE is not set/" ${SED_CONFIG_EFI} ${B}/.config
+        oe_runmake -C ${S} cross_tools NO_SDL=1 O=${B}
+}
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.2.bb
new file mode 100644
index 00000000..44636872
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2022.2.bb
@@ -0,0 +1,21 @@
+require u-boot-tools-xlnx.inc
+require u-boot-xlnx-2022.2.inc
+# MUST clear CONFIG_VIDEO to avoid a compilation failure trying to construct
+# bmp_logo.h
+SED_CONFIG_EFI:append = ' -e "s/CONFIG_VIDEO=.*/# CONFIG_VIDEO is not set/"'
+# Default do_compile fails with:
+# | error: object directory ../downloads/git2/github.com.Xilinx.u-boot-xlnx.git/objects does not exist; check .git/objects/info/alternates.
+# The regular workaround of calling 'git diff' seems to be problematic.
+do_compile () {
+        oe_runmake -C ${S} tools-only_defconfig O=${B}
+        # Disable CONFIG_CMD_LICENSE, license.h is not used by tools and
+        # generating it requires bin2header tool, which for target build
+        # is built with target tools and thus cannot be executed on host.
+        sed -i -e "s/CONFIG_CMD_LICENSE=.*/# CONFIG_CMD_LICENSE is not set/" ${SED_CONFIG_EFI} ${B}/.config
+        oe_runmake -C ${S} cross_tools NO_SDL=1 O=${B}
+}
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.1.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.1.inc
new file mode 100644
index 00000000..a0c0b50d
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.1.inc
@@ -0,0 +1,17 @@
+UBOOT_VERSION = "v2021.01"
+UBRANCH ?= "xlnx_rebase_v2022.01_2022.1_update"
+SRCREV = "91ad7924e7f59584d597353e1bb86794341e0a7e"
+LICENSE = "GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
+# u-boot-xlnx has support for these
+HAS_PLATFORM_INIT ?= " \
+                xilinx_zynqmp_virt_config \
+                xilinx_zynq_virt_defconfig \
+                xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \
+                "
+DEPENDS += "bc-native dtc-native python3-setuptools-native gnutls-native"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.2.inc
new file mode 100644
index 00000000..6415861d
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2022.2.inc
@@ -0,0 +1,17 @@
+UBOOT_VERSION = "v2021.01"
+UBRANCH ?= "xlnx_rebase_v2022.01"
+SRCREV = "b31476685debf5512ed0d4e8000fa5167a22f530"
+LICENSE = "GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
+# u-boot-xlnx has support for these
+HAS_PLATFORM_INIT ?= " \
+                xilinx_zynqmp_virt_config \
+                xilinx_zynq_virt_defconfig \
+                xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \
+                "
+DEPENDS += "bc-native dtc-native python3-setuptools-native gnutls-native"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc
index fd51561a..72f43f71 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc
@@ -1,8 +1,8 @@
 UBOOT_VERSION = "v2023.01"
-UBRANCH = "xlnx_rebase_v2023.01"
+UBRANCH = "xlnx_rebase_v2023.01_update"
-SRCREV = "8624651f9ae49d326e29d9ec9a80a881a769640a"
+SRCREV = "1689570b68dd3827e527a520805aa0bb7f58ee09"
 LICENSE = "GPL-2.0-or-later"
 LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.1.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.1.bb
new file mode 100644
index 00000000..c1c45e56
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.1.bb
@@ -0,0 +1,4 @@
+require u-boot-xlnx.inc
+require u-boot-spl-zynq-init.inc
+require u-boot-xlnx-2022.1.inc
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb
new file mode 100644
index 00000000..b10f321b
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb
@@ -0,0 +1,4 @@
+require u-boot-xlnx.inc
+require u-boot-spl-zynq-init.inc
+require u-boot-xlnx-2022.2.inc
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb
new file mode 100644
index 00000000..7c734cd6
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb
@@ -0,0 +1,8 @@
+require qemu-devicetrees.inc
+BRANCH ?= "xlnx_rel_v2022.1"
+SRCREV ?= "0499324af1178057c3730b0989c8fb5c5bbc4cf8"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+SRC_URI:append = " file://0001-Makefile-Use-python3-instead-of-python.patch"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb
new file mode 100644
index 00000000..6675ba3e
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb
@@ -0,0 +1,6 @@
+require qemu-devicetrees.inc
+BRANCH ?= "xlnx_rel_v2022.2"
+SRCREV ?= "cf5d357e16c13ac447861f908e83951ffb7b4301"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.1.bb
index 91e787bd..dc1feda4 100644
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.1.bb
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.1.bb
@@ -2,5 +2,5 @@
 require qemu-devicetrees.inc
 BRANCH ?= "xlnx_rel_v2023.1"
-SRCREV ?= "1c45adcde1fc06432c01be250bf668c6477d8459"
+SRCREV ?= "56538937584f527fb408347c3b430142e74723e8"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.1.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.1.inc
new file mode 100644
index 00000000..bb8fac70
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.1.inc
@@ -0,0 +1,8 @@
+# Note this isn't really the 2022.1 or 2022.2 version of qemu-xilinx
+# Instead it's the current master version, as qemu 6.1.0 doesn't
+# work reliabily anymore.
+XILINX_QEMU_VERSION = "v7.1.0"
+BRANCH = "master"
+SRCREV = "21adc9f99e813fb24fb65421259b5b0614938376"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.2.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.2.inc
new file mode 100644
index 00000000..bb8fac70
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2022.2.inc
@@ -0,0 +1,8 @@
+# Note this isn't really the 2022.1 or 2022.2 version of qemu-xilinx
+# Instead it's the current master version, as qemu 6.1.0 doesn't
+# work reliabily anymore.
+XILINX_QEMU_VERSION = "v7.1.0"
+BRANCH = "master"
+SRCREV = "21adc9f99e813fb24fb65421259b5b0614938376"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch
deleted file mode 100644
index 4298964d..00000000
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b51e6dd833172954c718bd600d846540eeb07220 Mon Sep 17 00:00:00 2001
-From: He Zhe <zhe.he@windriver.com>
-Date: Wed, 28 Aug 2019 19:56:28 +0800
-Subject: [PATCH] configure: Add pkg-config handling for libgcrypt
-libgcrypt may also be controlled by pkg-config, this patch adds pkg-config
-handling for libgcrypt.
-Upstream-Status: Denied [https://lists.nongnu.org/archive/html/qemu-devel/2019-08/msg06333.html]
-Signed-off-by: He Zhe <zhe.he@windriver.com>
---
- meson.build | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/meson.build b/meson.build
-index b3e7ec0e9..4cbe715b7 100644
--- a/meson.build
-+++ b/meson.build
-@@ -874,7 +874,7 @@ endif
- if not gnutls_crypto.found()
-   if (not get_option('gcrypt').auto() or have_system) and not get_option('nettle').enabled()
-     gcrypt = dependency('libgcrypt', version: '>=1.8',
-                        method: 'config-tool',
-+                        method: 'pkg-config',
-                         required: get_option('gcrypt'),
-                         kwargs: static_kwargs)
-     # Debian has removed -lgpg-error from libgcrypt-config
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/cross.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/cross.patch
deleted file mode 100644
index bdb77ec7..00000000
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-6.1.0/cross.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From f51ece86f84c877f255746cba22a6745f37d2b7f Mon Sep 17 00:00:00 2001
-From: Richard Purdie <richard.purdie@linuxfoundation.org>
-Date: Tue, 5 Jan 2021 23:00:14 +0000
-Subject: [PATCH] qemu: Upgrade 5.1.0->5.2.0
-We need to be able to trigger configure's cross code but we don't want
-to set cross_prefix as it does other things we don't want. Patch things
-so we can do what we need in the target config case.
-Upstream-Status: Inappropriate [may be rewritten in a way upstream may accept?]
-Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
---
- configure | 4 ----
- 1 file changed, 4 deletions(-)
-diff --git a/configure b/configure
-index 9a79a004d..563b7827f 100755
--- a/configure
-+++ b/configure
-@@ -5128,7 +5128,6 @@ if test "$skip_meson" = no; then
-   fi
-   echo "strip = [$(meson_quote $strip)]" >> $cross
-   echo "windres = [$(meson_quote $windres)]" >> $cross
-  if test "$cross_compile" = "yes"; then
-     cross_arg="--cross-file config-meson.cross"
-     echo "[host_machine]" >> $cross
-     if test "$mingw32" = "yes" ; then
-@@ -5160,9 +5159,6 @@ if test "$skip_meson" = no; then
-     else
-         echo "endian = 'little'" >> $cross
-     fi
-  else
-    cross_arg="--native-file config-meson.cross"
-  fi
-   mv $cross config-meson.cross
- 
-   rm -rf meson-private meson-info meson-logs
-- 
-2.17.1
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc
deleted file mode 100644
index b22ab432..00000000
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc
+++ /dev/null
@@ -1,11 +0,0 @@
-require recipes-devtools/qemu/qemu-native.inc
-require qemu-xilinx.inc
-DEPENDS = "glib-2.0-native zlib-native ninja-native meson-native"
-SRC_URI:remove = "file://0012-fix-libcap-header-issue-on-some-distro.patch"
-SRC_URI:remove = "file://0013-cpus.c-Add-error-messages-when-qemi_cpu_kick_thread-.patch"
-do_install:append(){
-       rm -rf ${D}${datadir}/icons
-}
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.1.bb
new file mode 100644
index 00000000..42794f55
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.1.bb
@@ -0,0 +1,9 @@
+require qemu-xilinx-2022.1.inc
+require qemu-xilinx-native-7.1.inc
+require qemu-native-alt.inc
+BPN = "qemu-xilinx"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent"
+PACKAGECONFIG ??= "pie"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb
new file mode 100644
index 00000000..e6a69f3a
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb
@@ -0,0 +1,9 @@
+require qemu-xilinx-2022.2.inc
+require qemu-xilinx-native-7.1.inc
+require qemu-native-alt.inc
+BPN = "qemu-xilinx"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent"
+PACKAGECONFIG ??= "pie"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.1.bb
new file mode 100644
index 00000000..6a2742bf
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.1.bb
@@ -0,0 +1,26 @@
+require qemu-system-native-alt.inc
+require qemu-xilinx-2022.1.inc
+require qemu-xilinx-native-7.1.inc
+PROVIDES = "qemu-system-native"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}"
+PACKAGECONFIG ??= "fdt alsa kvm gcrypt pie slirp"
+PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}"
+DEPENDS += "pixman-native qemu-xilinx-native bison-native ninja-native meson-native"
+DEPENDS += "qemu-xilinx-multiarch-helper-native"
+do_install:append() {
+    # The following is also installed by qemu-native
+    rm -f ${D}${datadir}/qemu/trace-events-all
+    rm -rf ${D}${datadir}/qemu/keymaps
+    rm -rf ${D}${datadir}/icons
+    rm -rf ${D}${includedir}/qemu-plugin.h
+    # Install qmp.py to be used with testimage
+    install -d ${D}${libdir}/qemu-python/qmp/
+    install -D ${S}/python/qemu/qmp/* ${D}${libdir}/qemu-python/qmp/
+}
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb
new file mode 100644
index 00000000..1f02812d
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb
@@ -0,0 +1,26 @@
+require qemu-system-native-alt.inc
+require qemu-xilinx-2022.2.inc
+require qemu-xilinx-native-7.1.inc
+PROVIDES = "qemu-system-native"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}"
+PACKAGECONFIG ??= "fdt alsa kvm gcrypt pie slirp"
+PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}"
+DEPENDS += "pixman-native qemu-xilinx-native bison-native ninja-native meson-native"
+DEPENDS += "qemu-xilinx-multiarch-helper-native"
+do_install:append() {
+    # The following is also installed by qemu-native
+    rm -f ${D}${datadir}/qemu/trace-events-all
+    rm -rf ${D}${datadir}/qemu/keymaps
+    rm -rf ${D}${datadir}/icons
+    rm -rf ${D}${includedir}/qemu-plugin.h
+    # Install qmp.py to be used with testimage
+    install -d ${D}${libdir}/qemu-python/qmp/
+    install -D ${S}/python/qemu/qmp/* ${D}${libdir}/qemu-python/qmp/
+}
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc
deleted file mode 100644
index 788a3fe0..00000000
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc
+++ /dev/null
@@ -1,47 +0,0 @@
-SUMMARY = "Xilinx's fork of a fast open source processor emulator"
-HOMEPAGE = "https://github.com/xilinx/qemu/"
-# x86_64 is needed to build nativesdks
-QEMU_TARGETS = "aarch64 arm microblaze microblazeel x86_64"
-LIC_FILES_CHKSUM = " \
-                file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \
-                file://COPYING.LIB;endline=24;md5=8c5efda6cf1e1b03dcfd0e6c0d271c7f \
-                "
-DEPENDS = "glib-2.0 zlib pixman bison-native ninja-native meson-native"
-FILESEXTRAPATHS:prepend := "${THISDIR}/qemu-xilinx-6.1.0:"
-PV = "${XILINX_QEMU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
-REPO ?= "gitsm://github.com/Xilinx/qemu.git;protocol=https"
-BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
-SRC_URI = "${REPO};${BRANCHARG}"
-SRC_URI:append = " file://0010-configure-Add-pkg-config-handling-for-libgcrypt.patch"
-S = "${WORKDIR}/git"
-# Disable KVM completely
-PACKAGECONFIG:remove = "kvm"
-PACKAGECONFIG:append = " fdt sdl gcrypt pie slirp"
-# Remove when version is in sync with core oe-core
-PACKAGECONFIG:remove:class-nativesdk= "pulsedio"
-PACKAGECONFIG:remove:class-native = "pulsedio"
-PACKAGECONFIG[alsa] = "--audio-drv-list=alsa,,alsa-lib"
-PACKAGECONFIG[pulsedio] = "--audio-drv-list=pa,,pulseaudio"
-PACKAGECONFIG[selinux] = ""
-PACKAGECONFIG[slirp] = "--enable-slirp=git,--disable-slirp,,"
-PACKAGECONFIG[jack] = ""
-DISABLE_STATIC:pn-${PN} = ""
-do_install:append() {
-        # Prevent QA warnings about installed ${localstatedir}/run
-        if [ -d ${D}${localstatedir}/run ]; then rmdir ${D}${localstatedir}/run; fi
-}
-FILES:${PN} += "${datadir}/qemu/"
-FILES:${PN}:append:class-nativesdk:mingw32 = " ${SDKPATHNATIVE}"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.1.bb
new file mode 100644
index 00000000..04b0efe4
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.1.bb
@@ -0,0 +1,24 @@
+require qemu-xilinx-2022.1.inc
+require recipes-devtools/qemu/qemu.inc
+require qemu-xilinx-7.1.inc
+require qemu-alt.inc
+# Links to libmali-xlnx, so it becomes MACHINE_ARCH specific
+DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}"
+MALI_PACKAGE_ARCH = "${@'${MACHINE_ARCH}' if d.getVar('PREFERRED_PROVIDER_virtual/libgles1') == 'libmali-xlnx' else '${DEFAULT_PACKAGE_ARCH}'}"
+PACKAGE_ARCH:class-target = "${@bb.utils.contains_any('DEPENDS', 'libepoxy virglrenderer', '${MALI_PACKAGE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}"
+BBCLASSEXTEND = "nativesdk"
+RDEPENDS:${PN}:class-target += "bash"
+PROVIDES:class-nativesdk = "nativesdk-qemu"
+RPROVIDES:${PN}:class-nativesdk = "nativesdk-qemu"
+EXTRA_OECONF:append:class-target = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-nativesdk = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-target:mipsarcho32 = "${@bb.utils.contains('BBEXTENDCURR', 'multilib', ' --disable-capstone', '', d)}"
+do_install:append:class-nativesdk() {
+    ${@bb.utils.contains('PACKAGECONFIG', 'gtk+', 'make_qemu_wrapper', '', d)}
+}
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb
new file mode 100644
index 00000000..9d3ad975
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb
@@ -0,0 +1,24 @@
+require qemu-xilinx-2022.2.inc
+require recipes-devtools/qemu/qemu.inc
+require qemu-xilinx-7.1.inc
+require qemu-alt.inc
+# Links to libmali-xlnx, so it becomes MACHINE_ARCH specific
+DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}"
+MALI_PACKAGE_ARCH = "${@'${MACHINE_ARCH}' if d.getVar('PREFERRED_PROVIDER_virtual/libgles1') == 'libmali-xlnx' else '${DEFAULT_PACKAGE_ARCH}'}"
+PACKAGE_ARCH:class-target = "${@bb.utils.contains_any('DEPENDS', 'libepoxy virglrenderer', '${MALI_PACKAGE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}"
+BBCLASSEXTEND = "nativesdk"
+RDEPENDS:${PN}:class-target += "bash"
+PROVIDES:class-nativesdk = "nativesdk-qemu"
+RPROVIDES:${PN}:class-nativesdk = "nativesdk-qemu"
+EXTRA_OECONF:append:class-target = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-nativesdk = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-target:mipsarcho32 = "${@bb.utils.contains('BBEXTENDCURR', 'multilib', ' --disable-capstone', '', d)}"
+do_install:append:class-nativesdk() {
+    ${@bb.utils.contains('PACKAGECONFIG', 'gtk+', 'make_qemu_wrapper', '', d)}
+}
diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2022.2.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2022.2.bb
new file mode 100644
index 00000000..dda6ec31
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2022.2.bb
@@ -0,0 +1,24 @@
+SUMMARY = "Xilinx DisplayPort Linux Kernel module"
+DESCRIPTION = "Out-of-tree DisplayPort(DP) kernel modules provider for aarch64 devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XLNX_DP_VERSION = "5.10.0"
+PV = "${XLNX_DP_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}" 
+S = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO   ?= "git://github.com/xilinx/dp-modules.git;protocol=https"
+SRCREV ?= "c57b2ce95ee6c86f35caecbc7007644ff8f6d337"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+inherit module
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
diff --git a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2022.2.bb b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2022.2.bb
new file mode 100644
index 00000000..c1f66013
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2022.2.bb
@@ -0,0 +1,24 @@
+SUMMARY = "Xilinx HDMI Linux Kernel module"
+DESCRIPTION = "Out-of-tree HDMI kernel modules provider for MPSoC EG/EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=b34277fe156508fd5a650609dc36d1fe"
+XLNX_HDMI_VERSION = "5.15.19"
+PV = "${XLNX_HDMI_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO   ?= "git://github.com/Xilinx/hdmi-modules.git;protocol=https"
+SRCREV = "25b6fe7a26a975be15c002b48cfd4c291486491e"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+inherit module
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.1.bb
new file mode 100644
index 00000000..41c1ffe2
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.1.bb
@@ -0,0 +1,9 @@
+LINUX_VERSION = "5.15.19"
+KBRANCH="xlnx_rebase_v5.15_LTS_2022.1_update"
+SRCREV = "75872fda9ad270b611ee6ae2433492da1e22b688"
+KCONF_AUDIT_LEVEL="0"
+include linux-xlnx.inc
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb
new file mode 100644
index 00000000..260224b8
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb
@@ -0,0 +1,9 @@
+LINUX_VERSION = "5.15.36"
+KBRANCH="xlnx_rebase_v5.15_LTS"
+SRCREV = "19984dd147fa7fbb7cb14b17400263ad0925c189"
+KCONF_AUDIT_LEVEL="0"
+include linux-xlnx.inc
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.1.bb
new file mode 100644
index 00000000..7ef1d5fd
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.1.bb
@@ -0,0 +1,39 @@
+SUMMARY = "Linux kernel module for Video Code Unit"
+DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+BRANCH = "xlnx_rel_v2022.1"
+REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https"
+SRCREV = "9d2657550eccebccce08cacfcdd369367b9f6be4"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = " \
+    ${REPO};${BRANCHARG} \
+    file://99-vcu-enc-dec.rules \
+    "
+inherit module features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+RDEPENDS:${PN} = "vcu-firmware"
+KERNEL_MODULE_AUTOLOAD += "dmaproxy"
+do_install:append() {
+    install -d ${D}${sysconfdir}/udev/rules.d
+    install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/
+}
+FILES:${PN} = "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb
new file mode 100644
index 00000000..b1c96d3c
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb
@@ -0,0 +1,39 @@
+SUMMARY = "Linux kernel module for Video Code Unit"
+DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+BRANCH = "xlnx_rel_v2022.2"
+REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https"
+SRCREV = "b131e220285e06658b6ab27f9e19b1c592a55f3a"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = " \
+    ${REPO};${BRANCHARG} \
+    file://99-vcu-enc-dec.rules \
+    "
+inherit module features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+RDEPENDS:${PN} = "vcu-firmware"
+KERNEL_MODULE_AUTOLOAD += "dmaproxy"
+do_install:append() {
+    install -d ${D}${sysconfdir}/udev/rules.d
+    install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/
+}
+FILES:${PN} = "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.1.bb
new file mode 100644
index 00000000..47c521c4
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.1.bb
@@ -0,0 +1,51 @@
+SUMMARY = "OpenMAX Integration layer for VCU"
+DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO   ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https"
+SRCREV = "b3308c608be7ed9250b9c6732f6e0a02b1a2e985"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+DEPENDS = "libvcu-xlnx"
+RDEPENDS:${PN} = "kernel-module-vcu libvcu-xlnx"
+EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu-ctrl-sw/include"
+EXTRA_OEMAKE = " \
+    CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \
+    EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \
+    "
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-omx-il
+    install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu-omx-il
+    install -Dm 0755 ${S}/bin/omx_decoder ${D}/${bindir}/omx_decoder
+    install -Dm 0755 ${S}/bin/omx_encoder ${D}/${bindir}/omx_encoder
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb
new file mode 100644
index 00000000..c5b956bc
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb
@@ -0,0 +1,50 @@
+SUMMARY = "OpenMAX Integration layer for VCU"
+DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO   ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https"
+SRCREV = "6752f5da88a8783f689ae762065295b89902d6d4"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+DEPENDS = "libvcu-xlnx"
+RDEPENDS:${PN} = "kernel-module-vcu libvcu-xlnx"
+EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu-ctrl-sw/include"
+EXTRA_OEMAKE = " \
+    CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \
+    EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \
+    "
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-omx-il
+    install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu-omx-il
+    install -Dm 0755 ${S}/bin/omx_decoder ${D}/${bindir}/omx_decoder
+    install -Dm 0755 ${S}/bin/omx_encoder ${D}/${bindir}/omx_encoder
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.1.bb
new file mode 100644
index 00000000..71e6e572
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.1.bb
@@ -0,0 +1,46 @@
+SUMMARY = "Control Software for VCU"
+DESCRIPTION = "Control software libraries, test applications and headers provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO   ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https"
+SRCREV = "5bf158af204b181f00ac009c8745557642ecfe5f"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+RDEPENDS:${PN} = "kernel-module-vcu"
+EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'"
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-ctrl-sw/include
+    install -Dm 0755 ${S}/bin/ctrlsw_encoder ${D}/${bindir}/ctrlsw_encoder
+    install -Dm 0755 ${S}/bin/ctrlsw_decoder ${D}/${bindir}/ctrlsw_decoder
+    oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu-ctrl-sw/include
+    oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+# Disable buildpaths QA check warnings.
+INSANE_SKIP:${PN} += "buildpaths"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb
new file mode 100644
index 00000000..130d79bc
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb
@@ -0,0 +1,46 @@
+SUMMARY = "Control Software for VCU"
+DESCRIPTION = "Control software libraries, test applications and headers provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO   ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https"
+SRCREV = "3c59dede1923a159a8db736ce0b4ab55633a2114"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+RDEPENDS:${PN} = "kernel-module-vcu"
+EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'"
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-ctrl-sw/include
+    install -Dm 0755 ${S}/bin/ctrlsw_encoder ${D}/${bindir}/ctrlsw_encoder
+    install -Dm 0755 ${S}/bin/ctrlsw_decoder ${D}/${bindir}/ctrlsw_decoder
+    oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu-ctrl-sw/include
+    oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+# Disable buildpaths QA check warnings.
+INSANE_SKIP:${PN} += "buildpaths"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.1.bb
new file mode 100644
index 00000000..c5c2b045
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.1.bb
@@ -0,0 +1,40 @@
+SUMMARY = "Firmware for VCU"
+DESCRIPTION = "Firmware binaries provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=63b45903a9a50120df488435f03cf498"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S  = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https"
+SRCREV = "569f980527fd58f43baf16bd0b294bf8c7cdf963"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI   = "${REPO};${BRANCHARG}"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+do_install() {
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d_b.fw ${D}/lib/firmware/al5d_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d.fw ${D}/lib/firmware/al5d.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e_b.fw ${D}/lib/firmware/al5e_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e.fw ${D}/lib/firmware/al5e.fw
+}
+# Inhibit warnings about files being stripped
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+FILES:${PN} = "/lib/firmware/*"
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+INSANE_SKIP:${PN} = "ldflags"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb
new file mode 100644
index 00000000..594a94c3
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb
@@ -0,0 +1,40 @@
+SUMMARY = "Firmware for VCU"
+DESCRIPTION = "Firmware binaries provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=63b45903a9a50120df488435f03cf498"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S  = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2022.2"
+REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https"
+SRCREV = "3980c778d71fa51a15e89bf70fd8fb28d5cb12e0"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI   = "${REPO};${BRANCHARG}"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+do_install() {
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d_b.fw ${D}/lib/firmware/al5d_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d.fw ${D}/lib/firmware/al5d.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e_b.fw ${D}/lib/firmware/al5e_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e.fw ${D}/lib/firmware/al5e.fw
+}
+# Inhibit warnings about files being stripped
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+FILES:${PN} = "/lib/firmware/*"
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+INSANE_SKIP:${PN} = "ldflags"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
index 9b835490..9b835490 100755..100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
index 602dc2fc..602dc2fc 100755..100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
index b4fc482e..b4fc482e 100755..100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
diff --git a/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc b/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
index 2ddb173d..b1de721e 100644
--- a/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
+++ b/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
@@ -9,6 +9,4 @@ REPO = "git://github.com/Xilinx/embeddedsw-experimental-dt-support.git;protocol=
 ESW_BRANCH[2023_sdt_experimental] = "xlnx_rel_v2023.2_sdt"
 ESW_REV[2023_sdt_experimental] = "742a608800e7621fb7c376daf5124333b5826d6d"
 LIC_FILES_CHKSUM[master] = '7c92de7a21a6613265035c28f4a92f48'
-LIC_FILES_CHKSUM[xlnx_rel_v2022.1_sdt_experimental_beta] = 'e26f53a7d6f58f4b1a9687099417225c'
-LIC_FILES_CHKSUM[xlnx_rel_v2023.1_sdt_experimental] = 'ce611484168a6000bd35df68fc4f4290'
 LIC_FILES_CHKSUM[xlnx_rel_v2023.2_sdt] = 'ce611484168a6000bd35df68fc4f4290'
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index 12db0da2..13ae11b1 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -3,11 +3,15 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master'
 REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https"
-ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1"
+ESW_BRANCH[2022.1] = "xlnx_rel_v2022.1_update"
+ESW_BRANCH[2022.2] = "xlnx_rel_v2022.2"
+ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1_update"
 ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2"
 BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}"
-ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab"
+ESW_REV[2022.1] = "56d94a506fd9f80949f4cff08e13015928603f01"
+ESW_REV[2022.2] = "5330a64c8efd14f0eef09befdbb8d3d738c33ec2"
+ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a"
 ESW_REV[2023.2] = "c9a0ee31b2a14cbcfcb56ca369037319b4ad4847"
 SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}"
@@ -15,7 +19,9 @@ EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH'
 EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}"
 LICENSE = "MIT"
-LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c'
+LIC_FILES_CHKSUM[xlnx_rel_v2022.1_update] = 'e62cb7a722c4430999e0a55a7234035d'
+LIC_FILES_CHKSUM[xlnx_rel_v2022.2]  = 'ce611484168a6000bd35df68fc4f4290'
+LIC_FILES_CHKSUM[xlnx_rel_v2023.1_update] = '3c310a3ee2197a4c92c6a0e2937c207c'
 LIC_FILES_CHKSUM[xlnx_rel_v2023.2] = '9fceecdbcad88698f265578f3d4cb26c'
 LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.1.bb
new file mode 100644
index 00000000..3f9740a0
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.1.bb
@@ -0,0 +1,11 @@
+require fsbl-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://fsbl-fixups.patch \
+           "
+# This version does not build for zynq
+COMPATIBLE_MACHINE:zynq = "none"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.2.bb
new file mode 100644
index 00000000..3f9740a0
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.2.bb
@@ -0,0 +1,11 @@
+require fsbl-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://fsbl-fixups.patch \
+           "
+# This version does not build for zynq
+COMPATIBLE_MACHINE:zynq = "none"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.1.bb
new file mode 100644
index 00000000..cc810241
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.1.bb
@@ -0,0 +1,16 @@
+require plm-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.2.bb
new file mode 100644
index 00000000..cc810241
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.2.bb
@@ -0,0 +1,16 @@
+require plm-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.1.bb
new file mode 100644
index 00000000..2c554d6d
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.1.bb
@@ -0,0 +1,16 @@
+require pmu-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-zynqmp_pmufw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.2.bb
new file mode 100644
index 00000000..2c554d6d
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.2.bb
@@ -0,0 +1,16 @@
+require pmu-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-zynqmp_pmufw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.1.bb
new file mode 100644
index 00000000..d861fb1c
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.1.bb
@@ -0,0 +1,16 @@
+require psm-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.2.bb
new file mode 100644
index 00000000..d861fb1c
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.2.bb
@@ -0,0 +1,16 @@
+require psm-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}