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author | Adrian Dudau <adrian.dudau@enea.com> | 2014-06-26 14:29:42 +0200 |
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committer | Adrian Dudau <adrian.dudau@enea.com> | 2014-06-26 14:29:42 +0200 |
commit | 99ac0639fff61cbdcfe58668eb9b0083d624504f (patch) | |
tree | f9142a48899bace9dda4f48c80e9a6f4b123c504 /recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch | |
download | meta-xilinx-99ac0639fff61cbdcfe58668eb9b0083d624504f.tar.gz |
initial commit for Enea Linux 4.0
Migrated from the internal git server on the daisy-enea branch
Signed-off-by: Adrian Dudau <adrian.dudau@enea.com>
Diffstat (limited to 'recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch')
-rw-r--r-- | recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch new file mode 100644 index 00000000..cb58f603 --- /dev/null +++ b/recipes-devtools/gdb/files/0009-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch | |||
@@ -0,0 +1,67 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Date: Wed, 8 May 2013 11:03:36 +1000 | ||
3 | Subject: Add wdc.ext.clear and wdc.ext.flush insns | ||
4 | |||
5 | Added two new instructions, wdc.ext.clear and wdc.ext.flush, | ||
6 | to enable MicroBlaze to flush an external cache, which is | ||
7 | used with the new coherency support for multiprocessing. | ||
8 | |||
9 | Signed-off-by:nagaraju <nmekala@xilix.com> | ||
10 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
11 | Upstream-Status: Pending | ||
12 | --- | ||
13 | opcodes/microblaze-opc.h | 5 ++++- | ||
14 | opcodes/microblaze-opcm.h | 6 +++--- | ||
15 | 2 files changed, 7 insertions(+), 4 deletions(-) | ||
16 | |||
17 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | ||
18 | index e9da12a..dd56ab5 100644 | ||
19 | --- a/opcodes/microblaze-opc.h | ||
20 | +++ b/opcodes/microblaze-opc.h | ||
21 | @@ -91,6 +91,7 @@ | ||
22 | #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ | ||
23 | #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ | ||
24 | #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ | ||
25 | +#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ | ||
26 | #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ | ||
27 | |||
28 | /* New Mask for msrset, msrclr insns. */ | ||
29 | @@ -101,7 +102,7 @@ | ||
30 | #define DELAY_SLOT 1 | ||
31 | #define NO_DELAY_SLOT 0 | ||
32 | |||
33 | -#define MAX_OPCODES 289 | ||
34 | +#define MAX_OPCODES 291 | ||
35 | |||
36 | struct op_code_struct | ||
37 | { | ||
38 | @@ -174,7 +175,9 @@ struct op_code_struct | ||
39 | {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst }, | ||
40 | {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst }, | ||
41 | {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst }, | ||
42 | + {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, | ||
43 | {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, | ||
44 | + {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst }, | ||
45 | {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst }, | ||
46 | {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, | ||
47 | {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, | ||
48 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | ||
49 | index 124cdec..8e531f9 100644 | ||
50 | --- a/opcodes/microblaze-opcm.h | ||
51 | +++ b/opcodes/microblaze-opcm.h | ||
52 | @@ -31,9 +31,9 @@ enum microblaze_instr | ||
53 | idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, | ||
54 | ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor, | ||
55 | andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, | ||
56 | - wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd, | ||
57 | - brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, | ||
58 | - bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, | ||
59 | + wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, | ||
60 | + br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, | ||
61 | + blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, | ||
62 | imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, | ||
63 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, | ||
64 | bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, | ||
65 | -- | ||
66 | 1.7.9.5 | ||
67 | |||