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author | Nathan Rossi <nathan@nathanrossi.com> | 2017-12-13 16:58:34 -0800 |
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committer | Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> | 2018-01-12 15:47:59 -0800 |
commit | 7935ef724cd7359ed97e6ae3d90ebc8f07dd7e1f (patch) | |
tree | 7c6faff836ccec34825a97fa7b7c49936e2bc4e2 /meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch | |
parent | fb15f2e401ed07f774ea89e0c91ecd927bf09235 (diff) | |
download | meta-xilinx-7935ef724cd7359ed97e6ae3d90ebc8f07dd7e1f.tar.gz |
gcc-source: Add all Xilinx MicroBlaze GCC 7.2 patchesrocko
Add all the Xilinx patches for MicroBlaze, this includes a number of
bug fixes, testsuite fixes, feature improvements and additional feature
support.
Important changes:
* v10.0 - CPU support
* v10.0 - Bit-field instruction support
* v10.0 - 8-stage pipeline aka 'frequency' optimized
* Size optimized implementations for shift instructions
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch')
-rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch new file mode 100644 index 00000000..e75bebeb --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0015-MicroBlaze-fixed-missing-save-of-r18-in-fast_interru.patch | |||
@@ -0,0 +1,46 @@ | |||
1 | From 79ea36649467aea6045a49c7d016f8f9245efb8c Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Sat, 26 Aug 2017 19:21:29 -0700 | ||
4 | Subject: [PATCH] MicroBlaze fixed missing save of r18 in fast_interrupt | ||
5 | |||
6 | Fixed missing save of r18 in fast_interrupt. Register 18 is used as a | ||
7 | clobber register, and must be stored when entering a fast_interrupt. | ||
8 | Before this fix, register 18 was only saved if it was used directly in | ||
9 | the interrupt function. | ||
10 | |||
11 | However, if the fast_interrupt function called a function that used | ||
12 | r18, the register would not be saved, and thus be mangled | ||
13 | upon returning from the interrupt. | ||
14 | |||
15 | Changelog | ||
16 | |||
17 | 2014-02-27 Klaus Petersen <klauspetersen@gmail.com> | ||
18 | |||
19 | * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in | ||
20 | microblaze_must_save_register. | ||
21 | |||
22 | Signed-off-by: Klaus Petersen <klauspetersen@gmail.com> | ||
23 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
24 | Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> | ||
25 | Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> | ||
26 | Upstream-Status: Pending | ||
27 | --- | ||
28 | gcc/config/microblaze/microblaze.c | 2 +- | ||
29 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
30 | |||
31 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
32 | index 15080db539..558796cad9 100644 | ||
33 | --- a/gcc/config/microblaze/microblaze.c | ||
34 | +++ b/gcc/config/microblaze/microblaze.c | ||
35 | @@ -1943,7 +1943,7 @@ microblaze_must_save_register (int regno) | ||
36 | { | ||
37 | if (df_regs_ever_live_p (regno) | ||
38 | || regno == MB_ABI_MSR_SAVE_REG | ||
39 | - || (interrupt_handler | ||
40 | + || ((interrupt_handler || fast_interrupt) | ||
41 | && (regno == MB_ABI_ASM_TEMP_REGNUM | ||
42 | || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM))) | ||
43 | return 1; | ||
44 | -- | ||
45 | 2.14.2 | ||
46 | |||