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author | Nathan Rossi <nathan@nathanrossi.com> | 2017-12-13 16:58:34 -0800 |
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committer | Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> | 2018-01-12 15:47:59 -0800 |
commit | 7935ef724cd7359ed97e6ae3d90ebc8f07dd7e1f (patch) | |
tree | 7c6faff836ccec34825a97fa7b7c49936e2bc4e2 /meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch | |
parent | fb15f2e401ed07f774ea89e0c91ecd927bf09235 (diff) | |
download | meta-xilinx-7935ef724cd7359ed97e6ae3d90ebc8f07dd7e1f.tar.gz |
gcc-source: Add all Xilinx MicroBlaze GCC 7.2 patchesrocko
Add all the Xilinx patches for MicroBlaze, this includes a number of
bug fixes, testsuite fixes, feature improvements and additional feature
support.
Important changes:
* v10.0 - CPU support
* v10.0 - Bit-field instruction support
* v10.0 - 8-stage pipeline aka 'frequency' optimized
* Size optimized implementations for shift instructions
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch')
-rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch index 9aa5d98a..03ea8b19 100644 --- a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch | |||
@@ -1,8 +1,7 @@ | |||
1 | From db7a0ac634ccaa1781d0a0d17dfffd3f1719bb6d Mon Sep 17 00:00:00 2001 | 1 | From 2d90c10cf4d95999f68f474305828c7dfc51af18 Mon Sep 17 00:00:00 2001 |
2 | From: Nathan Rossi <nathan@nathanrossi.com> | 2 | From: Nathan Rossi <nathan@nathanrossi.com> |
3 | Date: Thu, 12 Nov 2015 16:09:31 +1000 | 3 | Date: Thu, 12 Nov 2015 16:09:31 +1000 |
4 | Subject: [PATCH 2/4] microblaze.md: Improve 'adddi3' and 'subdi3' insn | 4 | Subject: [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' insn definitions |
5 | definitions | ||
6 | 5 | ||
7 | Change adddi3 to handle DI immediates as the second operand, this | 6 | Change adddi3 to handle DI immediates as the second operand, this |
8 | requires modification to the output template however reduces the need to | 7 | requires modification to the output template however reduces the need to |
@@ -63,5 +62,5 @@ index b3a0011fd7..8a372d7ebb 100644 | |||
63 | "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" | 62 | "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" |
64 | [(set_attr "type" "darith") | 63 | [(set_attr "type" "darith") |
65 | -- | 64 | -- |
66 | 2.11.0 | 65 | 2.14.2 |
67 | 66 | ||