meta-microblaze: toolchains

Resync the microblaze toolchain items to match the latest YP master version.

binutils and gdb are based on the same patch set, but the release version
are based on slightly different sources, thus the patches are a bit
different.

Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>

173 files changed, 3249 insertions, 6967 deletions

diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
index ed6e75b2..e10c34ff 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
+++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
@@ -1,54 +1,44 @@
 FILESEXTRAPATHS_append := ":${THISDIR}/binutils"
 
 SRC_URI_append = " \
-        file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
-        file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \
-        file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
-        file://0004-Fix-relaxation-of-assembler-resolved-references.patch \
-        file://0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \
-        file://0006-upstream-change-to-garbage-collection-sweep-causes-m.patch \
-        file://0007-Fix-bug-in-TLSTPREL-Relocation.patch \
-        file://0008-Added-Address-extension-instructions.patch \
-        file://0009-fixing-the-MAX_OPCODES-to-correct-value.patch \
-        file://0010-Add-new-bit-field-instructions.patch \
-        file://0011-fixing-the-imm-bug.patch \
-        file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
-        file://0013-fixing-the-constant-range-check-issue.patch \
-        file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
-        file://0015-intial-commit-of-MB-64-bit.patch \
-        file://0016-MB-X-initial-commit.patch \
-        file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
-        file://0018-Added-relocations-for-MB-X.patch \
-        file://0019-Fixed-MB-x-relocation-issues.patch \
-        file://0020-Fixing-the-branch-related-issues.patch \
-        file://0021-Fixed-address-computation-issues-with-64bit-address.patch \
-        file://0022-Adding-new-relocation-to-support-64bit-rodata.patch \
-        file://0023-fixing-the-.bss-relocation-issue.patch \
-        file://0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
-        file://0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch \
-        file://0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch \
-        file://0027-Revert-ld-Remove-unused-expression-state.patch \
-        file://0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
-        file://0029-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-        file://0030-Added-support-to-new-arithmetic-single-register-inst.patch \
-        file://0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
-        file://0032-Add-initial-port-of-linux-gdbserver.patch \
-        file://0033-Initial-port-of-core-reading-support.patch \
-        file://0034-Fix-debug-message-when-register-is-unavailable.patch \
-        file://0035-revert-master-rebase-changes-to-gdbserver.patch \
-        file://0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch \
-        file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
-        file://0038-Initial-support-for-native-gdb.patch \
-        file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
-        file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
-        file://0041-patch-MicroBlaze-porting-GDB-for-linux.patch \
-        file://0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \
-        file://0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \
-        file://0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch \
-        file://0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
-        file://0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \
-        file://0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch \
-        file://0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch \
-        file://0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \
-        file://0050-Fix-i386-md_pseudo_table.patch \
-        "
+     file://0001-sim-Allow-microblaze-architecture.patch \
+     file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
+     file://0003-Add-mlittle-endian-and-mbig-endian-flags.patch \
+     file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \
+     file://0005-Fix-relaxation-of-assembler-resolved-references.patch \
+     file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \
+     file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \
+     file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \
+     file://0009-Added-Address-extension-instructions.patch \
+     file://0010-Add-new-bit-field-instructions.patch \
+     file://0011-fixing-the-imm-bug.patch \
+     file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
+     file://0013-fixing-the-constant-range-check-issue.patch \
+     file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
+     file://0015-intial-commit-of-MB-64-bit.patch \
+     file://0016-MB-X-initial-commit.patch \
+     file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
+     file://0018-Added-relocations-for-MB-X.patch \
+     file://0019-Update-MB-x.patch \
+     file://0020-Various-fixes.patch \
+     file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
+     file://0022-fixing-the-.bss-relocation-issue.patch \
+     file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
+     file://0024-Revert-ld-Remove-unused-expression-state.patch \
+     file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
+     file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+     file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \
+     file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
+     file://0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
+     file://0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch \
+     file://0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch \
+     file://0032-gas-revert-moving-of-md_pseudo_table-from-const.patch \
+     file://0033-Fix-various-compile-warnings.patch \
+     file://0034-Add-initial-port-of-linux-gdbserver.patch \
+     file://0035-Initial-port-of-core-reading-support.patch \
+     file://0036-Fix-debug-message-when-register-is-unavailable.patch \
+     file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
+     file://0038-Initial-support-for-native-gdb.patch \
+     file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
+     file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
+     "
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
new file mode 100644
index 00000000..9671968a
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
@@ -0,0 +1,40 @@
+From 501b60af6b36fc69987e1610645742f5593a6da2 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 6 Aug 2020 15:37:52 -0500
+Subject: [PATCH 01/40] sim: Allow microblaze* architecture
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ sim/configure     | 2 +-
+ sim/configure.tgt | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sim/configure b/sim/configure
+index 72f95cd5c7a..9e28cc78687 100755
+--- a/sim/configure
++++ b/sim/configure
+@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
+ 
+ 
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+ 
+   sim_arch=microblaze
+   subdirs="$subdirs microblaze"
+diff --git a/sim/configure.tgt b/sim/configure.tgt
+index 8a8e03d96f4..f6743fe8d41 100644
+--- a/sim/configure.tgt
++++ b/sim/configure.tgt
+@@ -59,7 +59,7 @@ case "${target}" in
+    mcore-*-*)
+        SIM_ARCH(mcore)
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+        SIM_ARCH(microblaze)
+        ;;
+    mips*-*-*)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index e0de79fd..039bfc96 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From 247ead894f7079a4ededf2b48a65ffa6e78e2222 Mon Sep 17 00:00:00 2001
+From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
 
 Added two new instructions, wdc.ext.clear and wdc.ext.flush,
 to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 62ee3c9a4d..865151f95b 100644
+index 27d8684df04..b6c5016e4d2 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@ index 62ee3c9a4d..865151f95b 100644
    {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
    {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5a2d3b0c8b..42f3dd3be5 100644
+index aa53dfe6bb5..795c57b5ff6 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
index 98e40c0e..2d4d65e4 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
@@ -1,7 +1,7 @@
-From 7163824e07ade3ad2dc24e888265d27e0bc87869 Mon Sep 17 00:00:00 2001
+From d2a03159f8643b1c6a2db5d95c478540cc6ca6c4 Mon Sep 17 00:00:00 2001
 From: nagaraju <nmekala@xilix.com>
 Date: Tue, 19 Mar 2013 17:18:23 +0530
-Subject: [PATCH 02/43] Add mlittle-endian and mbig-endian flags
+Subject: [PATCH 03/40] Add mlittle-endian and mbig-endian flags
 
 Added support in gas for mlittle-endian and mbig-endian flags
 as options.
@@ -16,7 +16,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ab90c6b20f..c92e9ce563 100644
+index ae5d36dc9c3..34eeb972357 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -37,6 +37,8 @@
@@ -28,7 +28,7 @@ index ab90c6b20f..c92e9ce563 100644
  
  void microblaze_generate_symbol (char *sym);
  static bfd_boolean check_spl_reg (unsigned *);
-@@ -1845,6 +1847,8 @@ struct option md_longopts[] =
+@@ -1842,6 +1844,8 @@ struct option md_longopts[] =
  {
    {"EB", no_argument, NULL, OPTION_EB},
    {"EL", no_argument, NULL, OPTION_EL},
@@ -37,7 +37,7 @@ index ab90c6b20f..c92e9ce563 100644
    { NULL,          no_argument, NULL, 0}
  };
  
-@@ -2498,9 +2502,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2494,9 +2498,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
    switch (c)
      {
      case OPTION_EB:
@@ -49,7 +49,7 @@ index ab90c6b20f..c92e9ce563 100644
        target_big_endian = 0;
        break;
      default:
-@@ -2515,6 +2521,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -2511,6 +2517,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
    /*  fprintf(stream, _("\
        MicroBlaze options:\n\
        -noSmall         Data in the comm and data sections do not go into the small data section\n")); */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
index 445f5dd8..f7b9c7b0 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,7 +1,7 @@
-From 2b9eec7fdfae66c5500baef444559976d1b20e0b Mon Sep 17 00:00:00 2001
+From a8d621e5ab335e6e61de0f081036b4705071fb74 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 03/43] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index a13e81ebb8..1824ba6e5b 100644
+index 7a129b00f8d..d5e4a5c062d 100644
 --- a/bfd/elf-eh-frame.c
 +++ b/bfd/elf-eh-frame.c
 @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
@@ -24,8 +24,8 @@ index a13e81ebb8..1824ba6e5b 100644
       abfd, sec);
 +}
    hdr_info->u.dwarf.table = FALSE;
-   if (sec_info)
-     free (sec_info);
+   free (sec_info);
+  success:
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
index d1b754c3..14a4f329 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
@@ -1,18 +1,18 @@
-From ababe1df64146c616455eb1af4cf8fd21eb6f42c Mon Sep 17 00:00:00 2001
+From c4ce6cb47613293e02837fc00c2c2ebfcdd596f6 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 04/43] Fix relaxation of assembler resolved references
+Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
 
 ---
- bfd/elf32-microblaze.c     | 38 ++++++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c     | 41 ++++++++++++++++++++++++++++++++++++++
  gas/config/tc-microblaze.c |  1 +
- 2 files changed, 39 insertions(+)
+ 2 files changed, 42 insertions(+)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index e3c8027248..359484dd5e 100644
+index 693fc71f730..09dedc46106 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1969,6 +1969,47 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
@@ -45,9 +45,12 @@ index e3c8027248..359484dd5e 100644
 +                          elf_section_data (o)->this_hdr.contents = ocontents;
 +                        }
 +                    }
-+                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+                                                    + isym->st_value, sec);
 +                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++                  if (val != irelscan->r_addend) {
++                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++                  }
++                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                                                    + isym->st_value, 0, sec);
 +                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
 +                                                     irelscan->r_addend);
 +              }
@@ -58,10 +61,10 @@ index e3c8027248..359484dd5e 100644
                 {
                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c92e9ce563..3e728400b7 100644
+index 34eeb972357..d01653aeef9 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -2205,6 +2205,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2201,6 +2201,7 @@ md_apply_fix (fixS *   fixP,
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
index ac13e6e3..308a453e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
@@ -1,10 +1,12 @@
-From e9837b5aec42b084c93868095b409f9a6a81b570 Mon Sep 17 00:00:00 2001
+From 77c9dd2085e5a9e116cd8d8b4fbc1387c93d26d8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 05/43] [LOCAL]: Fixup debug_loc sections after linker
- relaxation Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing reloc
- info from the assembler to the linker when the linker manages to fully
- resolve a local symbol reference.
+Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
+ relaxation
+
+Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
+reloc info from the assembler to the linker when the linker
+manages to fully resolve a local symbol reference.
 
 This is a workaround for design flaws in the assembler to
 linker interface with regards to linker relaxation.
@@ -12,46 +14,39 @@ linker interface with regards to linker relaxation.
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
 ---
- bfd/bfd-in2.h              |  9 +++++--
- bfd/elf32-microblaze.c     | 53 ++++++++++++++++++++++++++++----------
+ bfd/bfd-in2.h              |  5 +++++
+ bfd/elf32-microblaze.c     | 39 +++++++++++++++++++++++++++++++-------
  bfd/libbfd.h               |  1 +
- bfd/reloc.c                |  6 +++++
- binutils/readelf.c         |  4 +++
- gas/config/tc-microblaze.c |  5 +++-
- include/elf/microblaze.h   |  2 ++
- 7 files changed, 64 insertions(+), 16 deletions(-)
+ bfd/reloc.c                |  6 ++++++
+ binutils/readelf.c         |  4 ++++
+ gas/config/tc-microblaze.c |  3 +++
+ include/elf/microblaze.h   |  1 +
+ 7 files changed, 52 insertions(+), 7 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index e25da50aaf..721531886a 100644
+index 35ef4d755bb..3fdbf8ed755 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5866,10 +5866,15 @@ value relative to the read-write small data area anchor  */
+@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor  */
  expressions of the form "Symbol Op Symbol"  */
    BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
  
--/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 32 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
--  BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
 +  BFD_RELOC_MICROBLAZE_32_NONE,
 +
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
- 
  /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 359484dd5e..1c69c269c7 100644
+index 09dedc46106..1be1ead2f41 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
           FALSE),               /* PC relative offset?  */
  
--   /* This reloc does nothing. Used for relaxation.  */
 +   HOWTO (R_MICROBLAZE_32_NONE,   /* Type.  */
 +          0,         /* Rightshift.  */
 +          2,            /* Size (0 = byte, 1 = short, 2 = long).  */
@@ -66,10 +61,9 @@ index 359484dd5e..1c69c269c7 100644
 +          0,         /* Dest Mask.  */
 +          FALSE),       /* PC relative offset?  */
 +
-+   /* This reloc does nothing.  Used for relaxation.  */
+    /* This reloc does nothing. Used for relaxation.  */
     HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
           0,                    /* Rightshift.  */
-          3,                    /* Size (0 = byte, 1 = short, 2 = long).  */
 @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
      case BFD_RELOC_NONE:
        microblaze_reloc = R_MICROBLAZE_NONE;
@@ -80,7 +74,7 @@ index 359484dd5e..1c69c269c7 100644
      case BFD_RELOC_MICROBLAZE_64_NONE:
        microblaze_reloc = R_MICROBLAZE_64_NONE;
        break;
-@@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1914,14 +1931,22 @@ microblaze_elf_relax_section (bfd *abfd,
                 }
               break;
             case R_MICROBLAZE_NONE:
@@ -88,7 +82,9 @@ index 359484dd5e..1c69c269c7 100644
               {
                 /* This was a PC-relative instruction that was
                    completely resolved.  */
-@@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd,
+                int sfix, efix;
++               unsigned int val;
+                bfd_vma target_address;
                 target_address = irel->r_addend + irel->r_offset;
                 sfix = calc_fixup (irel->r_offset, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
@@ -101,20 +97,12 @@ index 359484dd5e..1c69c269c7 100644
                 irel->r_addend -= (efix - sfix);
                 /* Should use HOWTO.  */
                 microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-                                                   irel->r_addend);
--             }
--             break;
-+               }
-+               break;
-            case R_MICROBLAZE_64_NONE:
-              {
-                /* This was a PC-relative 64-bit instruction that was
-@@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1969,12 +1994,16 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
 -              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+             if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
                  {
                    unsigned int val;
  
@@ -127,22 +115,12 @@ index 359484dd5e..1c69c269c7 100644
                    /* This was a PC-relative instruction that was completely resolved.  */
                    if (ocontents == NULL)
                      {
-@@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd,
-                                                          (file_ptr) 0,
-                                                          o->rawsize))
-                               goto error_return;
--                          elf_section_data (o)->this_hdr.contents = ocontents;
--                        }
--                    }
--                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
--                                                    + isym->st_value, sec);
-+                         elf_section_data (o)->this_hdr.contents = ocontents;
-+                       }
-+                   }
-                   val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
+@@ -2002,14 +2031,10 @@ microblaze_elf_relax_section (bfd *abfd,
+                   if (val != irelscan->r_addend) {
+                     fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
+                   }
+-                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
+-                                                    + isym->st_value, 0, sec);
 +                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
@@ -153,20 +131,20 @@ index 359484dd5e..1c69c269c7 100644
               if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
                 {
                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2069,7 +2094,7 @@ microblaze_elf_relax_section (bfd *abfd,
                               elf_section_data (o)->this_hdr.contents = ocontents;
                             }
                         }
 -                     irelscan->r_addend -= calc_fixup (irel->r_addend
-+              irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
                                                         + isym->st_value,
                                                         0,
                                                         sec);
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 36284d71a9..feb9fada1e 100644
+index b97534fc9fe..c1551b92405 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_ROSDA",
    "BFD_RELOC_MICROBLAZE_32_RWSDA",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
@@ -175,10 +153,10 @@ index 36284d71a9..feb9fada1e 100644
    "BFD_RELOC_MICROBLAZE_64_GOTPC",
    "BFD_RELOC_MICROBLAZE_64_GOT",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index e6446a7809..87753ae4f0 100644
+index 9aba84ca81e..9b39b419415 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6795,6 +6795,12 @@ ENUM
+@@ -6858,6 +6858,12 @@ ENUM
  ENUMDOC
    This is a 32 bit reloc for the microblaze to handle
    expressions of the form "Symbol Op Symbol"
@@ -192,10 +170,10 @@ index e6446a7809..87753ae4f0 100644
    BFD_RELOC_MICROBLAZE_64_NONE
  ENUMDOC
 diff --git a/binutils/readelf.c b/binutils/readelf.c
-index b13eb6a43b..da6252c128 100644
+index 6057515a89b..04704d22fef 100644
 --- a/binutils/readelf.c
 +++ b/binutils/readelf.c
-@@ -13019,6 +13019,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
+@@ -13406,6 +13406,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
               || reloc_type == 32 /* R_AVR_DIFF32.  */);
      case EM_METAG:
        return reloc_type == 3; /* R_METAG_NONE.  */
@@ -207,38 +185,35 @@ index b13eb6a43b..da6252c128 100644
        return (reloc_type == 0       /* R_XTENSA_NONE.  */
               || reloc_type == 204  /* R_NDS32_DIFF8.  */
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3e728400b7..fa665b4e25 100644
+index d01653aeef9..74a63abeb0c 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -2201,7 +2201,9 @@ md_apply_fix (fixS *   fixP,
-       /* This fixup has been resolved.  Create a reloc in case the linker
+@@ -2198,6 +2198,8 @@ md_apply_fix (fixS *   fixP,
          moves code around due to relaxing.  */
        if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
--       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
 +      else if (fixP->fx_r_type == BFD_RELOC_32)
-+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
++       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2426,6 +2428,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2422,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
    switch (fixp->fx_r_type)
      {
      case BFD_RELOC_NONE:
-+    case BFD_RELOC_MICROBLAZE_32_NONE: 
++    case BFD_RELOC_MICROBLAZE_32_NONE:
      case BFD_RELOC_MICROBLAZE_64_NONE:
      case BFD_RELOC_32:
      case BFD_RELOC_MICROBLAZE_32_LO:
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 830b5ad446..6ee0966444 100644
+index 2fec296967b..55f34f72b0d 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
-@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
    RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
 +  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
-+   
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
  /* Global base address names.  */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 97d692c7..4319f1d7 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From 403d6e82742452be4e3f3010c8d9989f0a490c0b Mon Sep 17 00:00:00 2001
+From 3f743710f53d86ed5e53d97b3b1b06d7a8cbcdc1 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 06/43] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
  regression
 
 Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -23,10 +23,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 deletion(-)
 
 diff --git a/bfd/elflink.c b/bfd/elflink.c
-index e50c0e4b38..09d43e3ca5 100644
+index 998b72f2281..2daf8fdf6a8 100644
 --- a/bfd/elflink.c
 +++ b/bfd/elflink.c
-@@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
+@@ -6372,7 +6372,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
  
        inf = (struct elf_gc_sweep_symbol_info *) data;
        (*inf->hide_symbol) (inf->info, h, TRUE);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
index 49534b4e..4ab7681e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 072a8968c50b2ebd93e225a6b959916f9d60b493 Mon Sep 17 00:00:00 2001
+From 481dd44f36e7df691037201d9865482debbb397d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 07/43] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
 
 Fixed the problem related to the fixup/relocations TLSTPREL.
 When the fixup is applied the addend is not added at the correct offset
@@ -13,10 +13,10 @@ big & little-endian compilers
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 1c69c269c7..d19a6dca84 100644
+index 1be1ead2f41..ec1944c6faf 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1447,9 +1447,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               relocation += addend;
               relocation -= dtprel_base(info);
               bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
index 51fcee90..c5bd3b2d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From 4674056da6bafa8168c0a680498b958f3a39be94 Mon Sep 17 00:00:00 2001
+From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 08/43] Added Address extension instructions
+Subject: [PATCH 09/40] Added Address extension instructions
 
 This patch adds the support of new instructions which are required
 for supporting Address extension feature.
@@ -13,17 +13,27 @@ ChangeLog:
 
   *microblaze-opc.h (op_code_struct): Update
      Added new instructions
+     Set MAX_OPCODES to matching value
   *microblaze-opcm.h (microblaze_instr): Update
      Added new instructions
 ---
- opcodes/microblaze-opc.h  | 11 +++++++++++
+ opcodes/microblaze-opc.h  | 13 ++++++++++++-
  opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 16 insertions(+), 5 deletions(-)
+ 2 files changed, 17 insertions(+), 6 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 865151f95b..330f1040e7 100644
+index b6c5016e4d2..c7a506b845a 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+ 
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+ 
+ struct op_code_struct
+ {
 @@ -178,8 +178,11 @@ struct op_code_struct
    {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
    {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -71,7 +81,7 @@ index 865151f95b..330f1040e7 100644
    {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
    {"", 0, 0, 0, 0, 0, 0, 0, 0},
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 42f3dd3be5..1c39dbf50b 100644
+index 795c57b5ff6..b05e319862e 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,13 +33,13 @@ enum microblaze_instr
@@ -90,7 +100,7 @@ index 42f3dd3be5..1c39dbf50b 100644
 -  shr, sw, swr, swx, lbui, lhui, lwi,
 +  bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
-   sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+   sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
 -- 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
deleted file mode 100644
index d93ccd20..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 7651a2f7ab486e26981cb5e032bf578d0951ff4a Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Thu, 28 Jan 2016 14:07:34 +0530
-Subject: [PATCH 09/43] fixing the MAX_OPCODES to correct value
-
----
- opcodes/microblaze-opc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 330f1040e7..2a6b841232 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
- 
- struct op_code_struct
- {
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
index 901c53e6..1612c11c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 7e9e123337f2d441b213ea9d0be07e9049241f64 Mon Sep 17 00:00:00 2001
+From 0034d6b5231a0a72c5f9fc47ba4c8eba0c35ff39 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/43] Add new bit-field instructions
+Subject: [PATCH 10/40] Add new bit-field instructions
 
 This patches adds new bsefi and bsifi instructions.
 BSEFI- The instruction shall extract a bit field from a
@@ -14,13 +14,13 @@ The rest of the bits in the destination register shall be unchanged
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   | 16 +++++++++
+ opcodes/microblaze-dis.c   | 17 +++++++++
  opcodes/microblaze-opc.h   | 12 ++++++-
  opcodes/microblaze-opcm.h  |  6 +++-
- 4 files changed, 102 insertions(+), 3 deletions(-)
+ 4 files changed, 103 insertions(+), 3 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index fa665b4e25..71bb888ab8 100644
+index 74a63abeb0c..765abfb3885 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -917,7 +917,7 @@ md_assemble (char * str)
@@ -110,41 +110,42 @@ index fa665b4e25..71bb888ab8 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f691740dfd..f8aaf27873 100644
+index be1534c257c..52c9068805f 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -73,6 +73,18 @@ get_field_imm5_mbar (long instr)
-   return(strdup(tmpstr));
+@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm5width (long instr)
++get_field_imm5width (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
 +  if (instr & 0x00004000)
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
 + else
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+  return (strdup (tmpstr));
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++  return p;
 +}
 +
  static char *
- get_field_rfsl (long instr)
+ get_field_rfsl (struct string_buf *buf, long instr)
  {
-@@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         /* For mbar 16 or sleep insn.  */
-         case INST_TYPE_NONE:
-           break;
+@@ -428,6 +440,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+        case INST_TYPE_NONE:
+          break;
+          /* For tuqula instruction */
 +        /* For bit field insns.  */
-+           case INST_TYPE_RD_R1_IMM5_IMM5:
-+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
-+            break;
-        /* For tuqula instruction */
++       case INST_TYPE_RD_R1_IMM5_IMM5:
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++         break;
++       /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
+          print_func (stream, "\t%s", get_field_rd (&buf, inst));
+          break;
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 2a6b841232..ce8ac351b5 100644
+index c7a506b845a..f61f4ef66d9 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -59,6 +59,9 @@
@@ -195,7 +196,7 @@ index 2a6b841232..ce8ac351b5 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 1c39dbf50b..28662694cd 100644
+index b05e319862e..fa921c90c98 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -29,7 +29,7 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
index 4c1b0c25..fcb9c8ae 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
@@ -1,18 +1,18 @@
-From 8b2e8fe916066bb1caa99abc67f8cde3ebd41c70 Mon Sep 17 00:00:00 2001
+From 75e55d8ebf3cd780fe69c066163ab2da7ac204f2 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/43] fixing the imm bug. with relax option imm -1 is also
- getting removed this is corrected now.
+Subject: [PATCH 11/40] fixing the imm bug.
 
+with relax option imm -1 is also getting removed this is corrected now.
 ---
  bfd/elf32-microblaze.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d19a6dca84..d001437b3f 100644
+index ec1944c6faf..cf4a7fdba33 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1865,8 +1865,7 @@ microblaze_elf_relax_section (bfd *abfd,
        else
         symval += irel->r_addend;
  
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
index ad4db430..02cc1259 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
@@ -1,7 +1,7 @@
-From 2a7b66bbc0473c6cbe6653a48818962b5b411ef2 Mon Sep 17 00:00:00 2001
+From 5432f81ba9d7c17b20ff576c7c09ae78f4fe6e9c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Fri, 29 Sep 2017 18:00:23 +0530
-Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will
+Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will
  support .long 0U and .long 0u
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/expr.c b/gas/expr.c
-index ee85bda1cc..b502418b71 100644
+index 6f8ccb82303..0e34ca53d9b 100644
 --- a/gas/expr.c
 +++ b/gas/expr.c
-@@ -810,6 +810,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
+@@ -803,6 +803,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
               break;
             }
         }
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
index 323b7bde..accff214 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
@@ -1,15 +1,15 @@
-From 59a9a1a913b7dfa424792c907001413c1ddd320c Mon Sep 17 00:00:00 2001
+From 6337e24a220dca86b71efcc10c5ffed6bf11bc22 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 16 Oct 2017 15:44:23 +0530
-Subject: [PATCH 13/43] fixing the constant range check issue sample error: not
- in range ffffffff80000000..7fffffff, not ffffffff70000000
+Subject: [PATCH 13/40] fixing the constant range check issue
 
+sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000
 ---
  gas/config/tc-microblaze.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 71bb888ab8..16b10d00a9 100644
+index 765abfb3885..5810a74a5fc 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
index 1a3e0130..cdbe65a6 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
@@ -1,7 +1,7 @@
-From 00b7561a868b08dab952b9b9f4a01118195aeb29 Mon Sep 17 00:00:00 2001
+From e7e06edfb6c24a993603c9100f8ab8c29999ef90 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 21 Feb 2018 12:32:02 +0530
-Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages
+Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages
  in more detail for mxl-gp-opt flag..
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages
  1 file changed, 12 insertions(+)
 
 diff --git a/ld/ldmain.c b/ld/ldmain.c
-index 77cdbd0dd2..517d85baef 100644
+index 08be9030cb5..613d748fefd 100644
 --- a/ld/ldmain.c
 +++ b/ld/ldmain.c
-@@ -1446,6 +1446,18 @@ reloc_overflow (struct bfd_link_info *info,
+@@ -1515,6 +1515,18 @@ reloc_overflow (struct bfd_link_info *info,
           break;
         case bfd_link_hash_defined:
         case bfd_link_hash_defweak:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
index d0f96eca..9f228015 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
@@ -1,7 +1,7 @@
-From 9aeae734291f8aaeb449c1403561b71de1ea3bea Mon Sep 17 00:00:00 2001
+From a7626e576d867c6c9c8321f00cf5e17dc31c52b8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/43] intial commit of MB 64-bit
+Subject: [PATCH 15/40] intial commit of MB 64-bit
 
 ---
  bfd/Makefile.am                    |    2 +
@@ -9,78 +9,79 @@ Subject: [PATCH 15/43] intial commit of MB 64-bit
  bfd/config.bfd                     |    4 +
  bfd/configure                      |    2 +
  bfd/configure.ac                   |    2 +
- bfd/cpu-microblaze.c               |   52 +-
- bfd/elf64-microblaze.c             | 3584 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c               |   55 +-
+ bfd/doc/Makefile.in                |    1 +
+ bfd/elf64-microblaze.c             | 3560 ++++++++++++++++++++++++++++
  bfd/targets.c                      |    6 +
  gas/config/tc-microblaze.c         |  274 ++-
  gas/config/tc-microblaze.h         |    4 +-
  include/elf/common.h               |    1 +
- ld/Makefile.am                     |    8 +
- ld/Makefile.in                     |   10 +
+ ld/Makefile.am                     |    4 +
+ ld/Makefile.in                     |    7 +
  ld/configure.tgt                   |    3 +
  ld/emulparams/elf64microblaze.sh   |   23 +
  ld/emulparams/elf64microblazeel.sh |   23 +
- opcodes/microblaze-dis.c           |   39 +-
+ opcodes/microblaze-dis.c           |   43 +-
  opcodes/microblaze-opc.h           |  162 +-
  opcodes/microblaze-opcm.h          |   20 +-
- 19 files changed, 4181 insertions(+), 41 deletions(-)
+ 20 files changed, 4156 insertions(+), 43 deletions(-)
  create mode 100644 bfd/elf64-microblaze.c
  create mode 100644 ld/emulparams/elf64microblaze.sh
  create mode 100644 ld/emulparams/elf64microblazeel.sh
 
 diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index a9191555ad..c5fd250812 100644
+index c88c4480001..9e12b34038c 100644
 --- a/bfd/Makefile.am
 +++ b/bfd/Makefile.am
-@@ -570,6 +570,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -552,6 +552,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -591,6 +592,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
 diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index 896df52042..fd457cba1e 100644
+index d0d14c6ab32..5c12b706616 100644
 --- a/bfd/Makefile.in
 +++ b/bfd/Makefile.in
-@@ -995,6 +995,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -978,6 +978,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -1017,6 +1018,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
-@@ -1494,6 +1496,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
+@@ -1495,6 +1497,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 0e1ddb659c..93d210643d 100644
+index 14523caf0c5..437c03bb9d9 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
-@@ -850,11 +850,15 @@ case "${targ}" in
+@@ -825,11 +825,15 @@ case "${targ}" in
    microblazeel*-*)
      targ_defvec=microblaze_elf32_le_vec
      targ_selvecs=microblaze_elf32_vec
@@ -97,36 +98,36 @@ index 0e1ddb659c..93d210643d 100644
  
  #ifdef BFD64
 diff --git a/bfd/configure b/bfd/configure
-index 04786696dc..d455abe7c5 100755
+index 5ab3e856bc2..982ecd254a8 100755
 --- a/bfd/configure
 +++ b/bfd/configure
-@@ -14847,6 +14847,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -14828,6 +14828,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/configure.ac b/bfd/configure.ac
-index eda38ea086..f01c3362fe 100644
+index 8e86f8399ce..38e80148171 100644
 --- a/bfd/configure.ac
 +++ b/bfd/configure.ac
-@@ -615,6 +615,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -564,6 +564,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 9bc2eb3de9..c91ba46f75 100644
+index 05a3f767e22..f94dc2c177b 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,24 @@
+@@ -23,7 +23,25 @@
  #include "bfd.h"
  #include "libbfd.h"
  
@@ -147,15 +148,16 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
  {
-   32,                          /* 32 bits in a word.  */
-   32,                          /* 32 bits in an address.  */
-@@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch =
-   bfd_default_scan,            /* String to architecture conversion.  */
+   32,                          /* Bits in a word.  */
+   32,                          /* Bits in an address.  */
+@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
    bfd_arch_default_fill,       /* Default fill.  */
-   NULL                         /* Next in list.  */
+   NULL,                                /* Next in list.  */
+   0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#else
 +{
@@ -171,7 +173,8 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
 +{
 +  64,                          /* 32 bits in a word.  */
@@ -186,16 +189,29 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  NULL                         /* Next in list.  */
++  NULL,                                /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#endif
  };
+diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
+index 2c1ddd45b8d..a976b24d0bf 100644
+--- a/bfd/doc/Makefile.in
++++ b/bfd/doc/Makefile.in
+@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
+ prefix = @prefix@
+ program_transform_name = @program_transform_name@
+ psdir = @psdir@
++runstatedir = @runstatedir@
+ sbindir = @sbindir@
+ sharedstatedir = @sharedstatedir@
+ srcdir = @srcdir@
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
 new file mode 100644
-index 0000000000..0f43ae6ea8
+index 00000000000..fa4b95e47e0
 --- /dev/null
 +++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3584 @@
+@@ -0,0 +1,3560 @@
 +/* Xilinx MicroBlaze-specific support for 32-bit ELF
 +
 +   Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -853,7 +869,7 @@ index 0000000000..0f43ae6ea8
 +
 +/* Set the howto pointer for a RCE ELF reloc.  */
 +
-+static void
++static bfd_boolean
 +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
 +                             arelent * cache_ptr,
 +                             Elf_Internal_Rela * dst)
@@ -867,13 +883,14 @@ index 0000000000..0f43ae6ea8
 +  r_type = ELF64_R_TYPE (dst->r_info);
 +  if (r_type >= R_MICROBLAZE_max)
 +    {
-+      (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"),
++      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
 +                            abfd, r_type);
 +      bfd_set_error (bfd_error_bad_value);
-+      r_type = R_MICROBLAZE_NONE;
++      return FALSE;
 +    }
 +
 +  cache_ptr->howto = microblaze_elf_howto_table [r_type];
++ return TRUE;
 +}
 +
 +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
@@ -1272,7 +1289,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata2") == 0
 +                       || strcmp (name, ".sbss2") == 0)
@@ -1301,7 +1318,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1317,7 +1334,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata") == 0
 +                       || strcmp (name, ".sbss") == 0)
@@ -1346,7 +1363,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1408,6 +1425,7 @@ index 0000000000..0f43ae6ea8
 +             goto dogot;
 +           case (int) R_MICROBLAZE_TLSLD:
 +             tls_type = (TLS_TLS | TLS_LD);
++              /* Fall through. */
 +           dogot:
 +           case (int) R_MICROBLAZE_GOT_64:
 +             {
@@ -1708,7 +1726,7 @@ index 0000000000..0f43ae6ea8
 +                         {
 +                           BFD_FAIL ();
 +                           (*_bfd_error_handler)
-+                             (_("%B: probably compiled without -fPIC?"),
++                             (_("%pB: probably compiled without -fPIC?"),
 +                              input_bfd);
 +                           bfd_set_error (bfd_error_bad_value);
 +                           return FALSE;
@@ -1762,7 +1780,7 @@ index 0000000000..0f43ae6ea8
 +             name = (bfd_elf_string_from_elf_section
 +                     (input_bfd, symtab_hdr->sh_link, sym->st_name));
 +             if (name == NULL || *name == '\0')
-+               name = bfd_section_name (input_bfd, sec);
++               name = bfd_section_name (sec);
 +           }
 +
 +         if (errmsg != NULL)
@@ -1807,21 +1825,6 @@ index 0000000000..0f43ae6ea8
 +  return ret;
 +}
 +
-+/* Merge backend specific data from an object file to the output
-+   object file when linking.
-+
-+   Note: We only use this hook to catch endian mismatches.  */
-+static bfd_boolean
-+microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
-+{
-+  /* Check if we have the same endianess.  */
-+  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
-+    return FALSE;
-+
-+  return TRUE;
-+}
-+
-+
 +/* Calculate fixup value for reference.  */
 +
 +static int
@@ -2138,7 +2141,7 @@ index 0000000000..0f43ae6ea8
 +          irelscanend = irelocs + o->reloc_count;
 +          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
 +            {
-+              if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
 +                {
 +                  unsigned int val;
 +
@@ -2497,17 +2500,6 @@ index 0000000000..0f43ae6ea8
 +  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
 +}
 +
-+/* Update the got entry reference counts for the section being removed.  */
-+
-+static bfd_boolean
-+microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
-+                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
-+                             asection * sec ATTRIBUTE_UNUSED,
-+                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
-+{
-+  return TRUE;
-+}
-+
 +/* PIC support.  */
 +
 +#define PLT_ENTRY_SIZE 16
@@ -2540,13 +2532,13 @@ index 0000000000..0f43ae6ea8
 +  if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL)
 +    htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got");
 +  if (htab->srelgot == NULL
-+      || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC
++      || ! bfd_set_section_flags (htab->srelgot, SEC_ALLOC
 +                                  | SEC_LOAD
 +                                  | SEC_HAS_CONTENTS
 +                                  | SEC_IN_MEMORY
 +                                  | SEC_LINKER_CREATED
 +                                  | SEC_READONLY)
-+      || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
++      || ! bfd_set_section_alignment (htab->srelgot, 2))
 +    return FALSE;
 +  return TRUE;
 +}
@@ -2627,7 +2619,7 @@ index 0000000000..0f43ae6ea8
 +
 +         /* PR15323, ref flags aren't set for references in the same
 +            object.  */
-+         h->root.non_ir_ref = 1;
++         h->root.non_ir_ref_regular = 1;
 +       }
 +
 +      switch (r_type)
@@ -2663,6 +2655,7 @@ index 0000000000..0f43ae6ea8
 +          tls_type |= (TLS_TLS | TLS_LD);
 +        dogottls:
 +          sec->has_tls_reloc = 1;
++          /* Fall through. */
 +        case R_MICROBLAZE_GOT_64:
 +          if (htab->sgot == NULL)
 +            {
@@ -2936,12 +2929,12 @@ index 0000000000..0f43ae6ea8
 +  /* If this is a weak symbol, and there is a real definition, the
 +     processor independent code will have arranged for us to see the
 +     real definition first, and we can just use the same value.  */
-+  if (h->u.weakdef != NULL)
++  if (h->is_weakalias)
 +    {
-+      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
-+                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
-+      h->root.u.def.section = h->u.weakdef->root.u.def.section;
-+      h->root.u.def.value = h->u.weakdef->root.u.def.value;
++      struct elf_link_hash_entry *def = weakdef (h);
++      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
++      h->root.u.def.section = def->root.u.def.section;
++      h->root.u.def.value = def->root.u.def.value;
 +      return TRUE;
 +    }
 +
@@ -3013,9 +3006,9 @@ index 0000000000..0f43ae6ea8
 +  sdynbss = htab->sdynbss;
 +  /* Apply the required alignment.  */
 +  sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss))
++  if (power_of_two > bfd_section_alignment (sdynbss))
 +    {
-+      if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two))
++      if (! bfd_set_section_alignment (sdynbss, power_of_two))
 +       return FALSE;
 +    }
 +
@@ -3362,7 +3355,7 @@ index 0000000000..0f43ae6ea8
 +
 +      /* It's OK to base decisions on the section name, because none
 +         of the dynobj section names depend upon the input files.  */
-+      name = bfd_get_section_name (dynobj, s);
++      name = bfd_section_name (s);
 +
 +      if (strncmp (name, ".rela", 5) == 0)
 +        {
@@ -3730,7 +3723,7 @@ index 0000000000..0f43ae6ea8
 +        put into .sbss.  */
 +      *secp = bfd_make_section_old_way (abfd, ".sbss");
 +      if (*secp == NULL
-+          || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON))
++          || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
 +        return FALSE;
 +
 +      *valp = sym->st_size;
@@ -3757,11 +3750,10 @@ index 0000000000..0f43ae6ea8
 +#define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
 +#define elf_backend_relocate_section           microblaze_elf_relocate_section
 +#define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
 +#define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
 +
 +#define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
-+#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
 +#define elf_backend_check_relocs                microblaze_elf_check_relocs
 +#define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
 +#define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
@@ -3781,10 +3773,10 @@ index 0000000000..0f43ae6ea8
 +
 +#include "elf64-target.h"
 diff --git a/bfd/targets.c b/bfd/targets.c
-index 158168cb3b..ef567a30c8 100644
+index 0732c5e4292..1ec226b2f47 100644
 --- a/bfd/targets.c
 +++ b/bfd/targets.c
-@@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec;
+@@ -782,6 +782,8 @@ extern const bfd_target mep_elf32_le_vec;
  extern const bfd_target metag_elf32_vec;
  extern const bfd_target microblaze_elf32_vec;
  extern const bfd_target microblaze_elf32_le_vec;
@@ -3793,7 +3785,7 @@ index 158168cb3b..ef567a30c8 100644
  extern const bfd_target mips_ecoff_be_vec;
  extern const bfd_target mips_ecoff_le_vec;
  extern const bfd_target mips_ecoff_bele_vec;
-@@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] =
+@@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] =
  
         &metag_elf32_vec,
  
@@ -3805,7 +3797,7 @@ index 158168cb3b..ef567a30c8 100644
  
         &mips_ecoff_be_vec,
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 16b10d00a9..c79434785a 100644
+index 5810a74a5fc..ffbb843d33e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -35,10 +35,13 @@
@@ -4153,7 +4145,7 @@ index 16b10d00a9..c79434785a 100644
  
      default:
        as_fatal (_("unimplemented opcode \"%s\""), name);
-@@ -1918,6 +2142,7 @@ struct option md_longopts[] =
+@@ -1915,6 +2139,7 @@ struct option md_longopts[] =
    {"EL", no_argument, NULL, OPTION_EL},
    {"mlittle-endian", no_argument, NULL, OPTION_LITTLE},
    {"mbig-endian", no_argument, NULL, OPTION_BIG},
@@ -4161,7 +4153,7 @@ index 16b10d00a9..c79434785a 100644
    { NULL,          no_argument, NULL, 0}
  };
  
-@@ -2569,6 +2794,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2565,6 +2790,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
    return rel;
  }
  
@@ -4180,7 +4172,7 @@ index 16b10d00a9..c79434785a 100644
  int
  md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
  {
-@@ -2582,6 +2819,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2578,6 +2815,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_LITTLE:
        target_big_endian = 0;
        break;
@@ -4191,7 +4183,7 @@ index 16b10d00a9..c79434785a 100644
      default:
        return 0;
      }
-@@ -2597,6 +2838,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -2593,6 +2834,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
    fprintf (stream, _(" MicroBlaze specific assembler options:\n"));
    fprintf (stream, "  -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu"));
    fprintf (stream, "  -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu"));
@@ -4200,7 +4192,7 @@ index 16b10d00a9..c79434785a 100644
  
  
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index ca9dbb861f..9d38d2ced5 100644
+index 01cb3e894f7..7435a70ef5e 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[];
@@ -4215,10 +4207,10 @@ index ca9dbb861f..9d38d2ced5 100644
  #define ELF_TC_SPECIAL_SECTIONS \
    { ".sdata",          SHT_PROGBITS,   SHF_ALLOC + SHF_WRITE }, \
 diff --git a/include/elf/common.h b/include/elf/common.h
-index 996acf9703..2f1e5be366 100644
+index 4d94c4fd5b3..f709a01816c 100644
 --- a/include/elf/common.h
 +++ b/include/elf/common.h
-@@ -339,6 +339,7 @@
+@@ -340,6 +340,7 @@
  #define EM_RISCV       243     /* RISC-V */
  #define EM_LANAI       244     /* Lanai 32-bit processor.  */
  #define EM_BPF         247     /* Linux BPF – in-kernel virtual machine.  */
@@ -4227,71 +4219,71 @@ index 996acf9703..2f1e5be366 100644
  #define EM_CSKY                252     /* C-SKY processor family.  */
  
 diff --git a/ld/Makefile.am b/ld/Makefile.am
-index c2c798b4fe..b272f537e4 100644
+index 02c4fc16395..d063e2d32c5 100644
 --- a/ld/Makefile.am
 +++ b/ld/Makefile.am
-@@ -422,6 +422,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -416,6 +416,8 @@ ALL_64_EMULATION_SOURCES = \
         eelf32ltsmipn32.c \
         eelf32ltsmipn32_fbsd.c \
         eelf32mipswindiss.c \
 +       eelf64microblazeel.c \
 +       eelf64microblaze.c \
         eelf64_aix.c \
+        eelf64bpf.c \
         eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -1702,6 +1704,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \
-   $(srcdir)/emulparams/elf_nacl.sh \
-   $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
-+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
-+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
- eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \
-   $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
+@@ -898,6 +900,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/Makefile.in b/ld/Makefile.in
-index fc687fc516..1a530ad729 100644
+index 2fe12e14f63..01ebb051faa 100644
 --- a/ld/Makefile.in
 +++ b/ld/Makefile.in
-@@ -907,6 +907,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -515,6 +515,7 @@ pdfdir = @pdfdir@
+ prefix = @prefix@
+ program_transform_name = @program_transform_name@
+ psdir = @psdir@
++runstatedir = @runstatedir@
+ sbindir = @sbindir@
+ sharedstatedir = @sharedstatedir@
+ srcdir = @srcdir@
+@@ -898,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \
         eelf32ltsmipn32.c \
         eelf32ltsmipn32_fbsd.c \
         eelf32mipswindiss.c \
 +       eelf64microblazeel.c \
 +       eelf64microblaze.c \
         eelf64_aix.c \
+        eelf64bpf.c \
         eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -1355,6 +1357,8 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16xs.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
+@@ -1360,6 +1363,8 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@
-@@ -3306,6 +3310,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \
-   $(srcdir)/emulparams/elf_nacl.sh \
-   $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
-+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
-+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \
-+  $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS}
-+
- eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \
-   $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
- 
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc_fbsd.Po@am__quote@
+@@ -2493,6 +2498,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/configure.tgt b/ld/configure.tgt
-index beba17ef51..5109799f2b 100644
+index 87c7d9a4cad..801d27c9e3f 100644
 --- a/ld/configure.tgt
 +++ b/ld/configure.tgt
-@@ -423,6 +423,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
+@@ -469,6 +469,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
  microblazeel*)         targ_emul=elf32microblazeel
                         targ_extra_emuls=elf32microblaze
                         ;;
@@ -4303,7 +4295,7 @@ index beba17ef51..5109799f2b 100644
                         ;;
 diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
 new file mode 100644
-index 0000000000..9c7b0eb708
+index 00000000000..7b4c7c411bd
 --- /dev/null
 +++ b/ld/emulparams/elf64microblaze.sh
 @@ -0,0 +1,23 @@
@@ -4328,11 +4320,11 @@ index 0000000000..9c7b0eb708
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
 new file mode 100644
-index 0000000000..9c7b0eb708
+index 00000000000..7b4c7c411bd
 --- /dev/null
 +++ b/ld/emulparams/elf64microblazeel.sh
 @@ -0,0 +1,23 @@
@@ -4357,104 +4349,108 @@ index 0000000000..9c7b0eb708
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f8aaf27873..20ea6a885a 100644
+index 52c9068805f..a03f5b7a55b 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
 @@ -33,6 +33,7 @@
- #define get_field_r1(instr)        get_field (instr, RA_MASK, RA_LOW)
- #define get_field_r2(instr)        get_field (instr, RB_MASK, RB_LOW)
+ #define get_field_r1(buf, instr)   get_field (buf, instr, RA_MASK, RA_LOW)
+ #define get_field_r2(buf, instr)   get_field (buf, instr, RB_MASK, RB_LOW)
  #define get_int_field_imm(instr)   ((instr & IMM_MASK) >> IMM_LOW)
 +#define get_int_field_imml(instr)  ((instr & IMML_MASK) >> IMM_LOW)
  #define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
  
- 
-@@ -56,11 +57,20 @@ get_field_imm (long instr)
+ #define NUM_STRBUFS 3
+@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5 (long instr)
-+get_field_imml (long instr)
+-get_field_imm5 (struct string_buf *buf, long instr)
++get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  return p;
 +}
 +
 +static char *
-+get_field_imms (long instr)
++get_field_imms (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
+   return p;
  }
  
-@@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr)
+@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5width (long instr)
-+get_field_immw (long instr)
+-get_field_imm5width (struct string_buf *buf, long instr)
++get_field_immw (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
    if (instr & 0x00004000)
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
   else
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
-   return (strdup (tmpstr));
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
+   return p;
  }
  
-@@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+@@ -308,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
 -       case INST_TYPE_RD_R1_IMM5:
 +       case INST_TYPE_RD_R1_IMML:
-+         print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
-+                  get_field_r1(inst), get_field_imm (inst));
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+-                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
++                  get_field_r1(&buf, inst), get_field_imm (&buf, inst));
 +          /* TODO: Also print symbol */
++          break;
 +       case INST_TYPE_RD_R1_IMMS:
-          print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
--                  get_field_r1(inst), get_field_imm5 (inst));
-+                  get_field_r1(inst), get_field_imms (inst));
++         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++                  get_field_r1(&buf, inst), get_field_imms (&buf, inst));
           break;
         case INST_TYPE_RD_RFSL:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
-@@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+@@ -414,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
+-       case INST_TYPE_RD_R2:
+-         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+-                     get_field_r2 (&buf, inst));
 +        case INST_TYPE_IMML:
-+         print_func (stream, "\t%s", get_field_imml (inst));
++         print_func (stream, "\t%s", get_field_imml (&buf, inst));
 +          /* TODO: Also print symbol */
 +         break;
-         case INST_TYPE_RD_R2:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
++        case INST_TYPE_RD_R2:
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
+          break;
+        case INST_TYPE_R2:
+          print_func (stream, "\t%s", get_field_r2 (&buf, inst));
+@@ -441,8 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
           break;
-@@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         case INST_TYPE_NONE:
-           break;
+          /* For tuqula instruction */
          /* For bit field insns.  */
--           case INST_TYPE_RD_R1_IMM5_IMM5:
--          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
--            break;
+-       case INST_TYPE_RD_R1_IMM5_IMM5:
+-         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
 +       case INST_TYPE_RD_R1_IMMW_IMMS:
-+         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst),
-+                  get_field_immw (inst), get_field_imms (inst));
-+         break;
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
++                  get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+          break;
         /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index ce8ac351b5..985834b8df 100644
+index f61f4ef66d9..61eaa39b3eb 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -40,7 +40,7 @@
@@ -4682,7 +4678,7 @@ index ce8ac351b5..985834b8df 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 28662694cd..076dbcd0b3 100644
+index fa921c90c98..1dcd3dca3d1 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -25,6 +25,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
index 0c3da95a..06a8f70a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
@@ -1,32 +1,32 @@
-From bcd4263219c9756b9c1c1df64c6fef1311057fac Mon Sep 17 00:00:00 2001
+From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
 
 ---
  bfd/bfd-in2.h              |  10 +++
- bfd/elf32-microblaze.c     |  65 +++++++++++++++-
- bfd/elf64-microblaze.c     |  61 ++++++++++++++-
+ bfd/elf32-microblaze.c     |  63 +++++++++++++++++-
+ bfd/elf64-microblaze.c     |  59 +++++++++++++++++
  bfd/libbfd.h               |   2 +
- bfd/reloc.c                |  12 +++
- gas/config/tc-microblaze.c | 152 ++++++++++++++++++++++++++++++-------
+ bfd/reloc.c                |  12 ++++
+ gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++----------
  include/elf/microblaze.h   |   2 +
  opcodes/microblaze-opc.h   |   4 +-
  opcodes/microblaze-opcm.h  |   4 +-
- 9 files changed, 277 insertions(+), 35 deletions(-)
+ 9 files changed, 243 insertions(+), 40 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 721531886a..4f777059d8 100644
+index 3fdbf8ed755..c55092c9ec7 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5876,11 +5876,21 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64_NONE,
+@@ -5438,11 +5438,21 @@ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64_NONE,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64,
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
@@ -42,7 +42,7 @@ index 721531886a..4f777059d8 100644
  value in two words (with an imm instruction).  The relocation is
  GOT offset  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d001437b3f..035e71f311 100644
+index cf4a7fdba33..e1a66f57e79 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -68,7 +68,7 @@ index d001437b3f..035e71f311 100644
           0,                    /* Rightshift.  */
 @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
-          TRUE),                /* PC relative offset?  */
+          TRUE),                /* PC relative offset?  */
  
 +   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
 +   HOWTO (R_MICROBLAZE_GPC_64,         /* Type.  */
@@ -104,23 +104,14 @@ index d001437b3f..035e71f311 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -142,21 +133,21 @@ index d001437b3f..035e71f311 100644
             case R_MICROBLAZE_NONE:
             case R_MICROBLAZE_32_NONE:
               {
-@@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
 -             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
 -               {
 -                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
-+                {
++             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++               {
 +                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
  
                   /* Look at the reloc only if the value has been resolved.  */
                   if (isym->st_shndx == shndx
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 0f43ae6ea8..56a45f2a05 100644
+index fa4b95e47e0..d55700fc513 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -219,7 +210,7 @@ index 0f43ae6ea8..56a45f2a05 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               break; /* Do nothing.  */
  
             case (int) R_MICROBLAZE_GOTPC_64:
@@ -227,23 +218,14 @@ index 0f43ae6ea8..56a45f2a05 100644
               relocation = htab->sgotplt->output_section->vma
                 + htab->sgotplt->output_offset;
               relocation -= (input_section->output_section->vma
-@@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -266,10 +248,10 @@ index 0f43ae6ea8..56a45f2a05 100644
             case R_MICROBLAZE_32_NONE:
               {
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index feb9fada1e..450653f2d8 100644
+index c1551b92405..b4aace6a70d 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -280,10 +262,10 @@ index feb9fada1e..450653f2d8 100644
    "BFD_RELOC_MICROBLAZE_64_PLT",
    "BFD_RELOC_MICROBLAZE_64_GOTOFF",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 87753ae4f0..ccf29f54cf 100644
+index 9b39b419415..0e8a24e9cb0 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,12 +6803,24 @@ ENUMDOC
+@@ -6866,12 +6866,24 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -309,7 +291,7 @@ index 87753ae4f0..ccf29f54cf 100644
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c79434785a..3f90b7c892 100644
+index ffbb843d33e..b8250e4cded 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -320,16 +302,17 @@ index c79434785a..3f90b7c892 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -117,6 +118,8 @@ const relax_typeS md_relax_table[] =
+@@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] =
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+//  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
+-  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
++  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -339,7 +322,7 @@ index c79434785a..3f90b7c892 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"sbss", microblaze_s_bss, 1},
    {"text", microblaze_s_text, 0},
    {"word", cons, 4},
@@ -347,7 +330,7 @@ index c79434785a..3f90b7c892 100644
    {"frame", s_ignore, 0},
    {"mask", s_ignore, 0}, /* Emitted by gcc.  */
    {NULL, NULL, 0}
-@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len)
+@@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len)
  extern bfd_reloc_code_real_type
  parse_cons_expression_microblaze (expressionS *exp, int size)
  {
@@ -356,7 +339,7 @@ index c79434785a..3f90b7c892 100644
      {
        /* Handle @GOTOFF et.al.  */
        char *save, *gotfree_copy;
-@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
+@@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
  
  static const char * str_microblaze_ro_anchor = "RO";
  static const char * str_microblaze_rw_anchor = "RW";
@@ -364,41 +347,7 @@ index c79434785a..3f90b7c892 100644
  
  static bfd_boolean
  check_spl_reg (unsigned * reg)
-@@ -1174,6 +1180,33 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
-+#if 0 //revisit
-+      else if (streq (name, "lli") || streq (name, "sli"))
-+       {
-+          temp = immed & 0xFFFFFFFFFFFF8000;
-+          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
-+           {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+
-+              inst1 = opcode1->bit_sequence;
-+             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+           }
-+         inst |= (reg1 << RD_LOW) & RD_MASK;
-+         inst |= (reg2 << RA_LOW) & RA_MASK;
-+         inst |= (immed << IMM_LOW) & IMM_MASK;
-+        }
-+#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1926,6 +1959,7 @@ md_assemble (char * str)
+@@ -1926,6 +1931,7 @@ md_assemble (char * str)
        if (exp.X_op != O_constant)
         {
           char *opc = NULL;
@@ -406,7 +355,7 @@ index c79434785a..3f90b7c892 100644
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1939,7 +1973,7 @@ md_assemble (char * str)
+@@ -1939,7 +1945,7 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -415,7 +364,7 @@ index c79434785a..3f90b7c892 100644
           immedl = 0L;
          }
        else
-@@ -1977,7 +2011,7 @@ md_assemble (char * str)
+@@ -1977,7 +1983,7 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -424,17 +373,17 @@ index c79434785a..3f90b7c892 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1987,7 +2021,8 @@ md_assemble (char * str)
+@@ -1987,7 +1993,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -          char *opc = NULL;
 +         //char *opc = NULL;
-+          char *opc = str_microblaze_64;
++          char *opc = strdup(str_microblaze_64);
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2001,14 +2036,13 @@ md_assemble (char * str)
+@@ -2001,14 +2008,13 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -450,7 +399,7 @@ index c79434785a..3f90b7c892 100644
           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
           if (opcode1 == NULL)
             {
-@@ -2187,13 +2221,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -475,7 +424,7 @@ index c79434785a..3f90b7c892 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2416,22 +2460,38 @@ md_apply_fix (fixS *   fixP,
+@@ -2412,22 +2428,38 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_64_PCREL:
      case BFD_RELOC_64:
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
@@ -526,7 +475,7 @@ index c79434785a..3f90b7c892 100644
        buf[0] = INST_BYTE0 (inst1);
        buf[1] = INST_BYTE1 (inst1);
        buf[2] = INST_BYTE2 (inst1);
-@@ -2460,6 +2520,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2456,6 +2488,7 @@ md_apply_fix (fixS *   fixP,
        /* Fall through.  */
  
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -534,7 +483,7 @@ index c79434785a..3f90b7c892 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2467,12 +2528,16 @@ md_apply_fix (fixS *   fixP,
+@@ -2463,12 +2496,16 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -555,22 +504,27 @@ index c79434785a..3f90b7c892 100644
           return;
         }
  
-@@ -2496,6 +2561,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2490,7 +2527,7 @@ md_apply_fix (fixS *   fixP,
+     {
+       /* This fixup has been resolved.  Create a reloc in case the linker
          moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+-      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
 +      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2539,6 +2606,32 @@ md_estimate_size_before_relax (fragS * fragP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+@@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP,
            as_bad (_("Absolute PC-relative value in relaxation code.  Assembler error....."));
            abort ();
          }
+-      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+-               !S_IS_WEAK (fragP->fr_symbol))
 +      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
 +               && !S_IS_WEAK (fragP->fr_symbol))
-+        {
+         {
+-          fragP->fr_subtype = DEFINED_PC_OFFSET;
+-          /* Don't know now whether we need an imm instruction.  */
+-          fragP->fr_var = INST_WORD_SIZE;
 +           if (fragP->fr_opcode != NULL) {
 +            if(streq (fragP->fr_opcode, str_microblaze_64)) 
 +             {
@@ -592,20 +546,10 @@ index c79434785a..3f90b7c892 100644
 +              /* Don't know now whether we need an imm instruction.  */
 +               fragP->fr_var = INST_WORD_SIZE;
 +            }
-+        }
-+    #if 0
-       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
-                !S_IS_WEAK (fragP->fr_symbol))
-         {
-@@ -2546,6 +2639,7 @@ md_estimate_size_before_relax (fragS * fragP,
-           /* Don't know now whether we need an imm instruction.  */
-           fragP->fr_var = INST_WORD_SIZE;
          }
-+#endif
        else if (S_IS_DEFINED (fragP->fr_symbol)
                && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2648,6 +2742,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSLD_OFFSET:
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
@@ -613,16 +557,16 @@ index c79434785a..3f90b7c892 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2701,7 +2796,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
 -      if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2734,6 +2829,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_RWSDA:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -631,7 +575,7 @@ index c79434785a..3f90b7c892 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2876,7 +2973,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -644,7 +588,7 @@ index c79434785a..3f90b7c892 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 6ee0966444..16b2736577 100644
+index 55f34f72b0d..8576e55cb8a 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
 @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -653,11 +597,11 @@ index 6ee0966444..16b2736577 100644
    RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
 +  RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
 +  RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35)    /* GOT entry offset.  */
-    
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
+ /* Global base address names.  */
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 985834b8df..9b6264b61c 100644
+index 61eaa39b3eb..f2139a6839b 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -538,8 +538,8 @@ struct op_code_struct
@@ -672,7 +616,7 @@ index 985834b8df..9b6264b61c 100644
    {"dadd",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
    {"drsub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 076dbcd0b3..5f2e190d23 100644
+index 1dcd3dca3d1..ad8b8ce345b 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -40,8 +40,8 @@ enum microblaze_instr
@@ -680,9 +624,9 @@ index 076dbcd0b3..5f2e190d23 100644
    brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
    bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 -  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
--  sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+-  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+  sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
++  sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
    tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index a6428534..067d9266 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,15 +1,16 @@
-From 7f6533a7c442b8966f30bbe7f0e872b1ef6a0d3f Mon Sep 17 00:00:00 2001
+From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/43] [Patch,Microblaze] : negl instruction is overriding
- rsubl,fixed it by changing the instruction order...
+Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
+ rsubl
 
+fixed it by changing the instruction order...
 ---
  opcodes/microblaze-opc.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 9b6264b61c..824afc0ab0 100644
+index f2139a6839b..f9709412097 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -275,9 +275,7 @@ struct op_code_struct
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
index 99c5f62a..0ed01b79 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
@@ -1,48 +1,48 @@
-From 6d241a6865abf8196ba0cfa2aed7e847df087b6e Mon Sep 17 00:00:00 2001
+From 90d732c25cb6b55b33837e1d23d6850e4cbe10f7 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/43] Added relocations for MB-X
+Subject: [PATCH 18/40] Added relocations for MB-X
 
 ---
- bfd/bfd-in2.h              | 11 +++--
- bfd/libbfd.h               |  4 +-
- bfd/reloc.c                | 26 ++++++-----
- gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
- 4 files changed, 62 insertions(+), 69 deletions(-)
+ bfd/bfd-in2.h              | 11 +++++---
+ bfd/libbfd.h               |  4 +--
+ bfd/reloc.c                | 26 +++++++++---------
+ gas/config/tc-microblaze.c | 54 +++++++++++++++++++++++++++-----------
+ 4 files changed, 63 insertions(+), 32 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 4f777059d8..de46e78902 100644
+index c55092c9ec7..88f89bcdbcd 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5872,15 +5872,20 @@ done here - only used for relaxing  */
+@@ -5434,15 +5434,20 @@ done here - only used for relaxing  */
    BFD_RELOC_MICROBLAZE_32_NONE,
  
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-- *  +value in two words (with an imm instruction).  No relocation is
-+ *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
--    BFD_RELOC_MICROBLAZE_64_NONE,
-+    BFD_RELOC_MICROBLAZE_64_PCREL,
+-value in two words (with an imm instruction).  No relocation is
++value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+-  BFD_RELOC_MICROBLAZE_64_NONE,
++  BFD_RELOC_MICROBLAZE_64_PCREL,
  
 -/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 64 bit reloc that stores the 32 bit relative
-  *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64_NONE,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
  PC-relative GOT offset  */
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 450653f2d8..d87a183d5e 100644
+index b4aace6a70d..b4b7ee29a30 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2969,14 +2969,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -60,10 +60,10 @@ index 450653f2d8..d87a183d5e 100644
    "BFD_RELOC_MICROBLAZE_64_TLSGD",
    "BFD_RELOC_MICROBLAZE_64_TLSLD",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index ccf29f54cf..861f2d48c0 100644
+index 0e8a24e9cb0..b5c97da3ffd 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,24 +6803,12 @@ ENUMDOC
+@@ -6866,24 +6866,12 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -88,7 +88,7 @@ index ccf29f54cf..861f2d48c0 100644
  ENUMDOC
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
-@@ -6906,6 +6894,20 @@ ENUMDOC
+@@ -6969,6 +6957,20 @@ ENUMDOC
    value in two words (with an imm instruction).  The relocation is
    relative offset from start of TEXT.
  
@@ -110,7 +110,7 @@ index ccf29f54cf..861f2d48c0 100644
    BFD_RELOC_AARCH64_RELOC_START
  ENUMDOC
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3f90b7c892..587a4d56ec 100644
+index b8250e4cded..9c8b6284fb1 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -121,62 +121,28 @@ index 3f90b7c892..587a4d56ec 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] =
+@@ -118,7 +119,8 @@ const relax_typeS md_relax_table[] =
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
- //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
+-  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }  /* 20: DEFINED_64_PC_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -1180,33 +1182,6 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
--#if 0 //revisit
--      else if (streq (name, "lli") || streq (name, "sli"))
--       {
--          temp = immed & 0xFFFFFFFFFFFF8000;
--          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
--           {
--              /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
--              if (opcode1 == NULL)
--                {
--                  as_bad (_("unknown opcode \"%s\""), "imml");
--                  return;
--                }
--
--              inst1 = opcode1->bit_sequence;
--             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
--              output[0] = INST_BYTE0 (inst1);
--              output[1] = INST_BYTE1 (inst1);
--              output[2] = INST_BYTE2 (inst1);
--              output[3] = INST_BYTE3 (inst1);
--              output = frag_more (isize);
--           }
--         inst |= (reg1 << RD_LOW) & RD_MASK;
--         inst |= (reg2 << RA_LOW) & RA_MASK;
--         inst |= (immed << IMM_LOW) & IMM_MASK;
--        }
--#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1958,8 +1933,8 @@ md_assemble (char * str)
+@@ -1930,8 +1932,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -         char *opc = NULL;
 -         //char *opc = str_microblaze_64;
 +         //char *opc = NULL;
-+         char *opc = str_microblaze_64;
++         char *opc = strdup(str_microblaze_64);
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2221,13 +2196,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2190,13 +2192,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -198,7 +164,7 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2237,7 +2218,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2206,7 +2214,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
                  fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC);
        else
          fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
@@ -207,7 +173,7 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2457,14 +2438,17 @@ md_apply_fix (fixS *   fixP,
+@@ -2425,14 +2433,17 @@ md_apply_fix (fixS *   fixP,
             }
         }
        break;
@@ -226,7 +192,7 @@ index 3f90b7c892..587a4d56ec 100644
          {
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-@@ -2477,6 +2461,10 @@ md_apply_fix (fixS *   fixP,
+@@ -2445,6 +2456,10 @@ md_apply_fix (fixS *   fixP,
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
              inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
@@ -237,7 +203,7 @@ index 3f90b7c892..587a4d56ec 100644
           }
        else
          {
-@@ -2487,7 +2475,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2455,7 +2470,7 @@ md_apply_fix (fixS *   fixP,
               as_bad (_("unknown opcode \"%s\""), "imm");
               return;
             }
@@ -246,7 +212,7 @@ index 3f90b7c892..587a4d56ec 100644
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-@@ -2534,7 +2522,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2502,7 +2517,7 @@ md_apply_fix (fixS *   fixP,
          opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
        if (opcode1 == NULL)
         {
@@ -255,16 +221,16 @@ index 3f90b7c892..587a4d56ec 100644
             as_bad (_("unknown opcode \"%s\""), "imml");
            else
             as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -2561,8 +2549,6 @@ md_apply_fix (fixS *   fixP,
+@@ -2527,7 +2542,7 @@ md_apply_fix (fixS *   fixP,
+     {
+       /* This fixup has been resolved.  Create a reloc in case the linker
          moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
 -      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
--           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2613,33 +2599,24 @@ md_estimate_size_before_relax (fragS * fragP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+@@ -2579,21 +2594,21 @@ md_estimate_size_before_relax (fragS * fragP,
              if(streq (fragP->fr_opcode, str_microblaze_64)) 
               {
                 /* Used as an absolute value.  */
@@ -290,19 +256,7 @@ index 3f90b7c892..587a4d56ec 100644
                 fragP->fr_var = INST_WORD_SIZE;
              }
          }
--    #if 0
--      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
--               !S_IS_WEAK (fragP->fr_symbol))
--        {
--          fragP->fr_subtype = DEFINED_PC_OFFSET;
--          /* Don't know now whether we need an imm instruction.  */
--          fragP->fr_var = INST_WORD_SIZE;
--        }
--#endif
-       else if (S_IS_DEFINED (fragP->fr_symbol)
-               && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2669,6 +2646,13 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2626,6 +2641,13 @@ md_estimate_size_before_relax (fragS * fragP,
               /* Variable part does not change.  */
               fragP->fr_var = INST_WORD_SIZE*2;
             }
@@ -316,7 +270,7 @@ index 3f90b7c892..587a4d56ec 100644
           else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
             {
                /* It is accessed using the small data read only anchor.  */
-@@ -2743,6 +2727,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2700,6 +2722,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
      case DEFINED_64_OFFSET:
@@ -324,16 +278,16 @@ index 3f90b7c892..587a4d56ec 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2796,7 +2781,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2753,7 +2776,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
--      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
+-      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2831,6 +2816,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2788,6 +2811,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
      case BFD_RELOC_MICROBLAZE_64:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
index edbfac0c..a621fb05 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
@@ -1,28 +1,29 @@
-From bb6c70cfa1402a685995103ac90e7ceeccdd0991 Mon Sep 17 00:00:00 2001
+From c3e194e231529c1b642f7f1a19a2a7b1ea644bd9 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/43] -Fixed MB-x relocation issues -Added imml for required
- MB-x instructions
+Subject: [PATCH 19/40] Update MB-x
 
+-Fixed MB-x relocation issues
+-Added imml for required MB-x instructions
 ---
- bfd/elf64-microblaze.c     |  68 ++++++++++++++---
- gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++----------
+ bfd/elf64-microblaze.c     |  68 ++++++++++--
+ gas/config/tc-microblaze.c | 221 +++++++++++++++++++++++++------------
  gas/tc.h                   |   2 +-
- 3 files changed, 167 insertions(+), 55 deletions(-)
+ 3 files changed, 209 insertions(+), 82 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 56a45f2a05..54a2461037 100644
+index d55700fc513..f8f52870639 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                           relocation -= (input_section->output_section->vma
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -33,7 +34,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
@@ -43,7 +44,7 @@ index 56a45f2a05..54a2461037 100644
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                         {
 +                           if (!input_section->output_section->vma &&
-+                                !input_section->output_offset && !offset)      
++                                !input_section->output_offset && !offset)
 +                             relocation -= (input_section->output_section->vma
 +                                            + input_section->output_offset
 +                                            + offset);
@@ -53,9 +54,9 @@ index 56a45f2a05..54a2461037 100644
 +                                            + offset + INST_WORD_SIZE);
 +                         }
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -66,7 +67,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1690,9 +1716,19 @@ static void
+@@ -1677,9 +1703,19 @@ static void
  microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -89,7 +90,7 @@ index 56a45f2a05..54a2461037 100644
  }
  
  /* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -113,10 +114,10 @@ index 56a45f2a05..54a2461037 100644
      instr_lo &= ~0x0000ffff;
      instr_lo |= (val & 0x0000ffff);
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 587a4d56ec..fa437b6c98 100644
+index 9c8b6284fb1..f61fdf3b90a 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -391,7 +391,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
     Integer arg to pass to the function.  */
  /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
     and then in the read.c table.  */
@@ -125,7 +126,7 @@ index 587a4d56ec..fa437b6c98 100644
  {
    {"lcomm", microblaze_s_lcomm, 1},
    {"data", microblaze_s_data, 0},
-@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -400,7 +400,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -134,7 +135,84 @@ index 587a4d56ec..fa437b6c98 100644
    {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
-@@ -996,7 +996,7 @@ md_assemble (char * str)
+@@ -538,30 +538,6 @@ parse_reg (char * s, unsigned * reg)
+       *reg = REG_SP;
+       return s + 3;
+     }
+-  else if (strncasecmp (s, "rfsl", 4) == 0)
+-    {
+-      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
+-        {
+-          tmpreg = (s[4] - '0') * 10 + s[5] - '0';
+-          s += 6;
+-        }
+-      else if (ISDIGIT (s[4]))
+-        {
+-          tmpreg = s[4] - '0';
+-          s += 5;
+-        }
+-      else
+-       as_bad (_("register expected, but saw '%.6s'"), s);
+-
+-      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
+-        *reg = tmpreg;
+-      else
+-       {
+-          as_bad (_("Invalid register number at '%.6s'"), s);
+-          *reg = 0;
+-       }
+-      return s;
+-    }
+   /* Stack protection registers.  */
+   else if (strncasecmp (s, "rshr", 4) == 0)
+     {
+@@ -605,6 +581,45 @@ parse_reg (char * s, unsigned * reg)
+   return s;
+ }
+ 
++/* Same as above, but with long(er) register */
++static char *
++parse_regl (char * s, unsigned long * reg)
++{
++  unsigned long tmpreg = 0;
++
++  /* Strip leading whitespace.  */
++  while (ISSPACE (* s))
++    ++ s;
++
++  if (strncasecmp (s, "rfsl", 4) == 0)
++    {
++      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
++       {
++         tmpreg = (s[4] - '0') * 10 + s[5] - '0';
++         s += 6;
++       }
++      else if (ISDIGIT (s[4]))
++       {
++         tmpreg = s[4] - '0';
++         s += 5;
++       }
++      else
++       as_bad (_("register expected, but saw '%.6s'"), s);
++
++      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
++       *reg = tmpreg;
++      else
++       {
++         as_bad (_("Invalid register number at '%.6s'"), s);
++         *reg = 0;
++       }
++      return s;
++    }
++  as_bad (_("register expected, but saw '%.6s'"), s);
++  *reg = 0;
++  return s;
++}
++
+ static char *
+ parse_exp (char *s, expressionS *e)
+ {
+@@ -995,7 +1010,7 @@ md_assemble (char * str)
    unsigned reg2;
    unsigned reg3;
    unsigned isize;
@@ -143,7 +221,7 @@ index 587a4d56ec..fa437b6c98 100644
    expressionS exp;
    char name[20];
    long immedl;
-@@ -1118,8 +1118,9 @@ md_assemble (char * str)
+@@ -1117,8 +1132,9 @@ md_assemble (char * str)
             as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
           else if (streq (name, "smi"))
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
@@ -155,7 +233,7 @@ index 587a4d56ec..fa437b6c98 100644
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
             opc = str_microblaze_rw_anchor;
-@@ -1182,31 +1183,55 @@ md_assemble (char * str)
+@@ -1181,31 +1197,55 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -197,7 +275,7 @@ index 587a4d56ec..fa437b6c98 100644
 +          inst |= (reg2 << RA_LOW) & RA_MASK;
 +          inst |= (immed << IMM_LOW) & IMM_MASK;
 +         }
-+       else 
++       else
 +        {
 +           temp = immed & 0xFFFF8000;
 +           if ((temp != 0) && (temp != 0xFFFF8000))
@@ -225,7 +303,34 @@ index 587a4d56ec..fa437b6c98 100644
        break;
  
      case INST_TYPE_RD_R1_IMMS:
-@@ -1832,12 +1857,20 @@ md_assemble (char * str)
+@@ -1400,7 +1440,7 @@ md_assemble (char * str)
+           reg1 = 0;
+         }
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1454,7 +1494,7 @@ md_assemble (char * str)
+           reg1 = 0;
+         }
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1472,7 +1512,7 @@ md_assemble (char * str)
+ 
+     case INST_TYPE_RFSL:
+       if (strcmp (op_end, ""))
+-        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
++        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
+       else
+        {
+           as_fatal (_("Error in statement syntax"));
+@@ -1831,12 +1871,20 @@ md_assemble (char * str)
      case INST_TYPE_IMM:
        if (streq (name, "imm"))
          as_fatal (_("An IMM instruction should not be present in the .s file"));
@@ -240,21 +345,21 @@ index 587a4d56ec..fa437b6c98 100644
         {
 -          char *opc = NULL;
 +         char *opc;
-+          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+                streq (name, "breaid") || 
++          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++                streq (name, "breaid") ||
 +                streq (name, "brai") || streq (name, "braid")))
-+            opc = str_microblaze_64;
++            opc = strdup(str_microblaze_64);
 +         else
 +            opc = NULL;
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1860,27 +1893,54 @@ md_assemble (char * str)
+@@ -1859,27 +1907,54 @@ md_assemble (char * str)
            immed = exp.X_add_number;
          }
  
-+      if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+            streq (name, "breaid") || 
++      if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++            streq (name, "breaid") ||
 +           streq (name, "brai") || streq (name, "braid")))
 +        {
 +          temp = immed & 0xFFFFFF8000;
@@ -322,7 +427,7 @@ index 587a4d56ec..fa437b6c98 100644
        break;
  
      case INST_TYPE_NONE:
-@@ -2460,7 +2520,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2455,7 +2530,7 @@ md_apply_fix (fixS *   fixP,
  
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -331,13 +436,13 @@ index 587a4d56ec..fa437b6c98 100644
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
               fixP->fx_r_type = BFD_RELOC_64; 
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-@@ -2628,7 +2688,14 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2623,7 +2698,14 @@ md_estimate_size_before_relax (fragS * fragP,
          }
        else
         {
 -         fragP->fr_subtype = UNDEFINED_PC_OFFSET;
 +         if (fragP->fr_opcode != NULL) {
-+           if (streq (fragP->fr_opcode, str_microblaze_64)) 
++           if (streq (fragP->fr_opcode, str_microblaze_64))
 +              fragP->fr_subtype = DEFINED_64_PC_OFFSET;
 +           else
 +             fragP->fr_subtype = UNDEFINED_PC_OFFSET;
@@ -347,7 +452,7 @@ index 587a4d56ec..fa437b6c98 100644
           fragP->fr_var = INST_WORD_SIZE*2;
         }
        break;
-@@ -2905,6 +2972,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2900,6 +2982,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_M64:
        //if (arg != NULL && strcmp (arg, "64") == 0)
        microblaze_arch_size = 64;
@@ -356,7 +461,7 @@ index 587a4d56ec..fa437b6c98 100644
      default:
        return 0;
 diff --git a/gas/tc.h b/gas/tc.h
-index 0a50a6985b..529a73b43b 100644
+index da1738d67a8..5bdfe5c3475 100644
 --- a/gas/tc.h
 +++ b/gas/tc.h
 @@ -22,7 +22,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch
deleted file mode 100644
index 528c9279..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 8375ef893eb327ae4a5dc9207041ffc0e9bc6e2b Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Sun, 30 Sep 2018 17:06:58 +0530
-Subject: [PATCH 20/43] Fixing the branch related issues
-
----
- bfd/elf64-microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 54a2461037..e9b3cf3a86 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd,
- 
-          /* PR15323, ref flags aren't set for references in the same
-             object.  */
--         h->root.non_ir_ref = 1;
-+         h->root.non_ir_ref_regular = 1;
-        }
- 
-       switch (r_type)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
index d62f0ed2..ad2fd5fe 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
@@ -1,9 +1,10 @@
-From 9f13e07180c09f814665676ac6c04cb7a2cd7c11 Mon Sep 17 00:00:00 2001
+From 1594b2f497822ebdb923b4ae55e81a10bfd4817d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
- Fixed imml dissassamble issue
+Subject: [PATCH 20/40] Various fixes
 
+- Fixed address computation issues with 64bit address
+- Fixed imml dissassamble issue
 ---
  bfd/bfd-in2.h              |  5 +++
  bfd/elf64-microblaze.c     | 14 ++++----
@@ -12,23 +13,23 @@ Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
  4 files changed, 79 insertions(+), 16 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index de46e78902..33c9cb62d9 100644
+index 88f89bcdbcd..8902d9c7939 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5881,6 +5881,11 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+@@ -5443,6 +5443,11 @@ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
 +    BFD_RELOC_MICROBLAZE_EA64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-  *  +value in two words (with an imm instruction).  No relocation is
-  *   +done here - only used for relaxing  */
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index e9b3cf3a86..40f10aac6d 100644
+index f8f52870639..17e58748a0b 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -71,7 +72,7 @@ index e9b3cf3a86..40f10aac6d 100644
        microblaze_reloc = R_MICROBLAZE_IMML_64;
        break;
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
                 efix = calc_fixup (target_address, 0, sec);
  
              /* Validate the in-band val.  */
@@ -81,10 +82,10 @@ index e9b3cf3a86..40f10aac6d 100644
                 fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
              }
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index fa437b6c98..46df32e72f 100644
+index f61fdf3b90a..0dfb59ffe8b 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +401,6 @@ pseudo_typeS md_pseudo_table[] =
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
    {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
@@ -92,7 +93,7 @@ index fa437b6c98..46df32e72f 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -2479,18 +2478,74 @@ md_apply_fix (fixS *   fixP,
+@@ -2489,18 +2488,74 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_RVA:
      case BFD_RELOC_32_PCREL:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
@@ -142,7 +143,7 @@ index fa437b6c98..46df32e72f 100644
 +         }
 +       }
 +      break;
-+    
++
 +    case BFD_RELOC_MICROBLAZE_EA64:
        /* Don't do anything if the symbol is not defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -171,16 +172,16 @@ index fa437b6c98..46df32e72f 100644
               buf[3] |= ((val >> 24) & 0xff);
               buf[2] |= ((val >> 16) & 0xff);
               buf[1] |= ((val >> 8) & 0xff);
-@@ -2611,6 +2666,8 @@ md_apply_fix (fixS *   fixP,
-            fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+@@ -2621,6 +2676,8 @@ md_apply_fix (fixS *   fixP,
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
-         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
 +      else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64)
-+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
++       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2882,6 +2939,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2892,6 +2949,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
@@ -188,7 +189,7 @@ index fa437b6c98..46df32e72f 100644
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
      case BFD_RELOC_MICROBLAZE_64_GOT:
-@@ -3027,10 +3085,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3037,10 +3095,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -203,16 +204,16 @@ index fa437b6c98..46df32e72f 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 20ea6a885a..f679a43606 100644
+index a03f5b7a55b..fc8e79b19cf 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -61,7 +61,7 @@ get_field_imml (long instr)
+@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
+   return p;
  }
  
 -- 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index ec82926d..99f285f2 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,7 +1,7 @@
-From beeceebb05a4eeaeca697f4ba7e214485b10369a Mon Sep 17 00:00:00 2001
+From b33fdfda4af069859ebe6588a5b9774cb5a2f14d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
 
 ---
  bfd/elf64-microblaze.c     | 11 +++++++--
@@ -9,10 +9,10 @@ Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata
  2 files changed, 54 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 40f10aac6d..4d9b90647f 100644
+index 17e58748a0b..b62c47e8514 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
             case (int) R_MICROBLAZE_64_PCREL :
             case (int) R_MICROBLAZE_64:
             case (int) R_MICROBLAZE_32:
@@ -20,16 +20,16 @@ index 40f10aac6d..4d9b90647f 100644
               {
                 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
                    from removed linkonce sections, or sections discarded by
-@@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+                    if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
 +                   else if (r_type == R_MICROBLAZE_IMML_64)
 +                     bfd_put_64 (input_bfd, relocation, contents + offset);
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                       }
                     else
                       {
@@ -38,7 +38,7 @@ index 40f10aac6d..4d9b90647f 100644
                           {
                             outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
                             outrel.r_addend = relocation + addend;
-@@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
                     if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -47,7 +47,7 @@ index 40f10aac6d..4d9b90647f 100644
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
@@ -57,7 +57,7 @@ index 40f10aac6d..4d9b90647f 100644
                  {
                   isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
  
-@@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
          case R_MICROBLAZE_64:
          case R_MICROBLAZE_64_PCREL:
          case R_MICROBLAZE_32:
@@ -66,10 +66,10 @@ index 40f10aac6d..4d9b90647f 100644
              if (h != NULL && !bfd_link_pic (info))
               {
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 46df32e72f..c6d2e4c82d 100644
+index 0dfb59ffe8b..4bd71557ca2 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1119,6 +1119,13 @@ md_assemble (char * str)
+@@ -1133,6 +1133,13 @@ md_assemble (char * str)
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
            if(streq (name, "lli") || streq (name, "sli"))
              opc = str_microblaze_64;
@@ -83,7 +83,7 @@ index 46df32e72f..c6d2e4c82d 100644
           else if (reg2 == REG_ROSDP)
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
-@@ -1182,7 +1189,10 @@ md_assemble (char * str)
+@@ -1196,7 +1203,10 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -95,19 +95,19 @@ index 46df32e72f..c6d2e4c82d 100644
          {
            temp = immed & 0xFFFFFF8000;
            if (temp != 0 && temp != 0xFFFFFF8000)
-@@ -1794,6 +1804,11 @@ md_assemble (char * str)
+@@ -1808,6 +1818,11 @@ md_assemble (char * str)
  
           if (exp.X_md != 0)
             subtype = get_imm_otype(exp.X_md);
 +          else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
 +            {
-+              opc = str_microblaze_64;
++              opc = strdup(str_microblaze_64);
 +             subtype = opcode->inst_offset_type;
 +           }
           else
             subtype = opcode->inst_offset_type;
  
-@@ -1811,6 +1826,31 @@ md_assemble (char * str)
+@@ -1825,6 +1840,31 @@ md_assemble (char * str)
            output = frag_more (isize);
            immed = exp.X_add_number;
          }
@@ -139,7 +139,7 @@ index 46df32e72f..c6d2e4c82d 100644
  
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
-@@ -1834,6 +1874,7 @@ md_assemble (char * str)
+@@ -1848,6 +1888,7 @@ md_assemble (char * str)
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM_MASK;
@@ -147,7 +147,7 @@ index 46df32e72f..c6d2e4c82d 100644
        break;
  
      case INST_TYPE_R2:
-@@ -3085,10 +3126,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3095,10 +3136,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0023-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
index 2458df6c..48b89d64 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0023-fixing-the-.bss-relocation-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 3240839197b1c42b3cd6e77c5b3b47aa7a1378a4 Mon Sep 17 00:00:00 2001
+From 118e1717ef8421bc86bcf56c9186f065bd607efd Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 23/43] fixing the .bss relocation issue
+Subject: [PATCH 22/40] fixing the .bss relocation issue
 
 ---
  bfd/elf64-microblaze.c | 18 ++++++++++++------
  1 file changed, 12 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 4d9b90647f..184b7d560d 100644
+index b62c47e8514..cb3b40b574c 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                              + offset + INST_WORD_SIZE);
                           }
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
  
@@ -38,7 +38,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr &= ~0x00ffffff;
          instr |= (val & 0xffffff);
-@@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr_hi &= ~0x00ffffff;
          instr_hi |= (val >> 16) & 0xffffff;
-@@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
@@ -59,7 +59,7 @@ index 4d9b90647f..184b7d560d 100644
            immediate |= (instr_lo & 0x0000ffff);
                       offset = calc_fixup (irelscan->r_addend, 0, sec);
                       immediate -= offset;
-@@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index 20752939..c84767fa 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From 843b73643718b0776462bce6aba6b2c6fdb33d85 Mon Sep 17 00:00:00 2001
+From 04d4e164cec91078b1b1155bae6ae4b508758969 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  It was adjusting only lower 16bits.
 
 ---
@@ -10,10 +10,10 @@ Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 035e71f311..2d8c062a42 100644
+index e1a66f57e79..bf09c68afd9 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2019,8 +2019,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
@@ -25,10 +25,10 @@ index 035e71f311..2d8c062a42 100644
               break;
             }
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 184b7d560d..ef6a87062b 100644
+index cb3b40b574c..b002b414d64 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
index b0fe8231..9a8e799c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
@@ -1,7 +1,7 @@
-From 69b77a73f4e609883cd7a0946b407becd46bf918 Mon Sep 17 00:00:00 2001
+From 7d26e7f32769e1a324a8dfd3bc3eaa2a5fbfe62a Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 27 Feb 2019 15:12:32 +0530
-Subject: [PATCH 27/43] Revert "ld: Remove unused expression state"
+Subject: [PATCH 24/40] Revert "ld: Remove unused expression state"
 
 This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb.
 
@@ -13,10 +13,10 @@ Conflicts:
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/ld/ldexp.c b/ld/ldexp.c
-index 60b17ef576..dac4b52450 100644
+index b4e7c41209d..dd3b058110a 100644
 --- a/ld/ldexp.c
 +++ b/ld/ldexp.c
-@@ -1354,6 +1354,7 @@ static etree_type *
+@@ -1360,6 +1360,7 @@ static etree_type *
  exp_assop (const char *dst,
            etree_type *src,
            enum node_tree_enum class,
@@ -24,7 +24,7 @@ index 60b17ef576..dac4b52450 100644
            bfd_boolean hidden)
  {
    etree_type *n;
-@@ -1365,6 +1366,7 @@ exp_assop (const char *dst,
+@@ -1371,6 +1372,7 @@ exp_assop (const char *dst,
    n->assign.type.node_class = class;
    n->assign.src = src;
    n->assign.dst = dst;
@@ -32,7 +32,7 @@ index 60b17ef576..dac4b52450 100644
    n->assign.hidden = hidden;
    return n;
  }
-@@ -1374,7 +1376,7 @@ exp_assop (const char *dst,
+@@ -1380,7 +1382,7 @@ exp_assop (const char *dst,
  etree_type *
  exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
  {
@@ -41,7 +41,7 @@ index 60b17ef576..dac4b52450 100644
  }
  
  /* Handle --defsym command-line option.  */
-@@ -1382,7 +1384,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
+@@ -1388,7 +1390,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden)
  etree_type *
  exp_defsym (const char *dst, etree_type *src)
  {
@@ -50,7 +50,7 @@ index 60b17ef576..dac4b52450 100644
  }
  
  /* Handle PROVIDE.  */
-@@ -1390,7 +1392,7 @@ exp_defsym (const char *dst, etree_type *src)
+@@ -1396,7 +1398,7 @@ exp_defsym (const char *dst, etree_type *src)
  etree_type *
  exp_provide (const char *dst, etree_type *src, bfd_boolean hidden)
  {
@@ -60,7 +60,7 @@ index 60b17ef576..dac4b52450 100644
  
  /* Handle ASSERT.  */
 diff --git a/ld/ldexp.h b/ld/ldexp.h
-index 71395bc6c4..f94b00aedb 100644
+index 717e839bd41..852ac6c5889 100644
 --- a/ld/ldexp.h
 +++ b/ld/ldexp.h
 @@ -66,6 +66,7 @@ typedef union etree_union {
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
deleted file mode 100644
index 50179787..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 3a5e6a9c614c3f6abcf8bf853527ef07a5370f80 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 2 Dec 2018 14:49:14 +0530
-Subject: [PATCH 25/43] [Patch,MicroBlaze]: fixed Build issue which are due to
- conflicts in patches.
-
----
- bfd/elf32-microblaze.c     |  1 +
- bfd/elf64-microblaze.c     | 12 ++++++------
- gas/config/tc-microblaze.c |  4 ++--
- 3 files changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 2d8c062a42..6a795c5069 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                /* This was a PC-relative instruction that was
-                   completely resolved.  */
-                int sfix, efix;
-+               unsigned int val;
-                bfd_vma target_address;
-                target_address = irel->r_addend + irel->r_offset;
-                sfix = calc_fixup (irel->r_offset, 0, sec);
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index ef6a87062b..bed534e7dd 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-   /* If this is a weak symbol, and there is a real definition, the
-      processor independent code will have arranged for us to see the
-      real definition first, and we can just use the same value.  */
--  if (h->u.weakdef != NULL)
-+  if (h->is_weakalias)
-     {
--      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
--                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
--      h->root.u.def.section = h->u.weakdef->root.u.def.section;
--      h->root.u.def.value = h->u.weakdef->root.u.def.value;
-+      struct elf_link_hash_entry *def = weakdef (h);
-+      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
-+      h->root.u.def.section = def->root.u.def.section;
-+      h->root.u.def.value = def->root.u.def.value;
-       return TRUE;
--    }
-+    }  
- 
-   /* This is a reference to a symbol defined by a dynamic object which
-      is not a function.  */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c6d2e4c82d..b3e49f0cf0 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -118,9 +118,9 @@ const relax_typeS md_relax_table[] =
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
--  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
- //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
-   { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
- };
- 
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
index 664675b9..97d75650 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
@@ -1,7 +1,7 @@
-From 7fdfff333f4982d7eb32a564aacfd2d8822c0004 Mon Sep 17 00:00:00 2001
+From 8293b0cf15d4411402a2b0b50e4c532093c5d952 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing
+Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
  build error for windows builds.commenting for now.
 
 ---
@@ -9,18 +9,18 @@ Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing
  1 file changed, 2 insertions(+)
 
 diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index bfe135e7fb..feb5cb37f5 100644
+index 070104c2734..8331c8759d5 100644
 --- a/bfd/elf-attrs.c
 +++ b/bfd/elf-attrs.c
-@@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
-   /* PR 17512: file: 2844a11d.  */
+@@ -442,6 +442,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
    if (hdr->sh_size == 0)
      return;
+ 
 +  #if 0
-   if (hdr->sh_size > bfd_get_file_size (abfd))
+   filesize = bfd_get_file_size (abfd);
+   if (filesize != 0 && hdr->sh_size > filesize)
      {
-       /* xgettext:c-format */
-@@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+@@ -451,6 +452,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
        bfd_set_error (bfd_error_invalid_operation);
        return;
      }
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
deleted file mode 100644
index aef46b3f..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From e7f43c3afe90faa42c09f368671972c26c2b7b38 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 26 Feb 2019 17:31:41 +0530
-Subject: [PATCH 26/43] [Patch,Microblaze] : changes of "PR22458, failure to
- choose a matching ELF target"     is causing "Multiple Prevailing definition
- errors",added check for best_match elf.
-
----
- bfd/format.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/bfd/format.c b/bfd/format.c
-index 97a92291a8..3a74cc49d2 100644
---- a/bfd/format.c
-+++ b/bfd/format.c
-@@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching)
- 
-       /* Don't check the default target twice.  */
-       if (*target == &binary_vec
-+#if !BFD_SUPPORTS_PLUGINS
-          || (!abfd->target_defaulted && *target == save_targ))
-+#else
-+         || (!abfd->target_defaulted && *target == save_targ)
-+         || (*target)->match_priority > best_match)
-+#endif
-        continue;
- 
-       /* If we already tried a match, the bfd is modified and may
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
index dbafc786..ebd1fa4c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From 26662110955e26c62629f4263a999216dac326ef Mon Sep 17 00:00:00 2001
+From 987bd08638fab099dcfdce412448734182be51e6 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
 
 ---
  gas/config/tc-microblaze.c | 10 +++++-----
@@ -9,10 +9,10 @@ Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue
  2 files changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b3e49f0cf0..5b506d3348 100644
+index 4bd71557ca2..83e17c60fa0 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
+@@ -797,7 +797,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
  }
  
   static char *
@@ -21,7 +21,7 @@ index b3e49f0cf0..5b506d3348 100644
  {
    char *new_pointer;
    char *atp;
-@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
+@@ -848,11 +848,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
      ; /* An error message has already been emitted.  */
    else if ((e->X_op != O_constant && e->X_op != O_symbol) )
      as_fatal (_("operand must be a constant or a label"));
@@ -38,7 +38,7 @@ index b3e49f0cf0..5b506d3348 100644
  
    if (atp)
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 824afc0ab0..d59ee0a95f 100644
+index f9709412097..77d74c17f3a 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
index 8141095a..12f44a6d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,21 +1,21 @@
-From 7b332d61cb3dbcae69021ce706f2c408c85af193 Mon Sep 17 00:00:00 2001
+From dde3395588ca91a7c484cc4a003f72f80848c534 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 30/43] Added support to new arithmetic single register
+Subject: [PATCH 27/40] Added support to new arithmetic single register
  instructions
 
 ---
- gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   |  12 +++
- opcodes/microblaze-opc.h   |  43 ++++++++++-
+ gas/config/tc-microblaze.c | 145 ++++++++++++++++++++++++++++++++++++-
+ opcodes/microblaze-dis.c   |  13 +++-
+ opcodes/microblaze-opc.h   |  45 +++++++++++-
  opcodes/microblaze-opcm.h  |   5 +-
- 4 files changed, 201 insertions(+), 6 deletions(-)
+ 4 files changed, 201 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 5b506d3348..12eef24a29 100644
+index 83e17c60fa0..b4330652758 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -423,12 +423,33 @@ void
+@@ -422,12 +422,33 @@ void
  md_begin (void)
  {
    struct op_code_struct * opcode;
@@ -26,7 +26,7 @@ index 5b506d3348..12eef24a29 100644
    /* Insert unique names into hash table.  */
 -  for (opcode = opcodes; opcode->name; opcode ++)
 -    hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
-+  for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
++  for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
 +    {
 +      if (strcmp (prev_name, opcode->name))
 +       {
@@ -51,7 +51,7 @@ index 5b506d3348..12eef24a29 100644
  }
  
  /* Try to parse a reg name.  */
-@@ -986,6 +1007,7 @@ md_assemble (char * str)
+@@ -1000,6 +1021,7 @@ md_assemble (char * str)
  {
    char * op_start;
    char * op_end;
@@ -59,19 +59,15 @@ index 5b506d3348..12eef24a29 100644
    struct op_code_struct * opcode, *opcode1;
    char * output = NULL;
    int nlen = 0;
-@@ -996,9 +1018,10 @@ md_assemble (char * str)
-   unsigned reg3;
-   unsigned isize;
-   unsigned long immed, immed2, temp;
--  expressionS exp;
-+  expressionS exp,exp1;
+@@ -1013,6 +1035,7 @@ md_assemble (char * str)
+   expressionS exp;
    char name[20];
    long immedl;
 +  int reg=0;
  
    /* Drop leading whitespace.  */
    while (ISSPACE (* str))
-@@ -1029,7 +1052,78 @@ md_assemble (char * str)
+@@ -1043,7 +1066,78 @@ md_assemble (char * str)
        as_bad (_("unknown opcode \"%s\""), name);
        return;
      }
@@ -151,7 +147,7 @@ index 5b506d3348..12eef24a29 100644
    inst = opcode->bit_sequence;
    isize = 4;
  
-@@ -1480,6 +1574,51 @@ md_assemble (char * str)
+@@ -1494,6 +1588,51 @@ md_assemble (char * str)
        inst |= (immed << IMM_LOW) & IMM15_MASK;
        break;
  
@@ -204,37 +200,45 @@ index 5b506d3348..12eef24a29 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f679a43606..e5e880cb1c 100644
+index fc8e79b19cf..f5db1189240 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -114,6 +114,15 @@ get_field_imm15 (long instr)
-   return (strdup (tmpstr));
+@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm16 (long instr)
++get_field_imm16 (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
++  return p;
 +}
 +
  static char *
- get_field_special (long instr, struct op_code_struct * op)
- {
-@@ -419,6 +428,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-        case INST_TYPE_RD_IMM15:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
+ get_field_special (struct string_buf *buf, long instr,
+                   struct op_code_struct *op)
+@@ -450,6 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+                      get_field_imm15 (&buf, inst));
           break;
 +       case INST_TYPE_RD_IMML:
-+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm16 (inst));
-+          break;
-         /* For mbar insn.  */
-         case INST_TYPE_IMM5:
-           print_func (stream, "\t%s", get_field_imm5_mbar (inst));
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++         break;
+          /* For mbar insn.  */
+        case INST_TYPE_IMM5:
+          print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
+@@ -457,7 +469,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          /* For mbar 16 or sleep insn.  */
+        case INST_TYPE_NONE:
+          break;
+-         /* For tuqula instruction */
+         /* For bit field insns.  */
+        case INST_TYPE_RD_R1_IMMW_IMMS:
+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d59ee0a95f..0774f70e08 100644
+index 77d74c17f3a..bd1cc90bff6 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -69,6 +69,7 @@
@@ -287,7 +291,7 @@ index d59ee0a95f..0774f70e08 100644
  /* New Mask for msrset, msrclr insns.  */
  #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
  /* Mask for mbar insn.  */
-@@ -114,7 +143,7 @@
+@@ -114,13 +143,13 @@
  #define DELAY_SLOT 1
  #define NO_DELAY_SLOT 0
  
@@ -296,6 +300,13 @@ index d59ee0a95f..0774f70e08 100644
  
  struct op_code_struct
  {
+   const char * name;
+   short inst_type;            /* Registers and immediate values involved.  */
+-  short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
++  int inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
+   short delay_slots;          /* Info about delay slots needed after this instr. */
+   short immval_mask;
+   unsigned long bit_sequence; /* All the fixed bits for the op are set and
 @@ -444,13 +473,21 @@ struct op_code_struct
    {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
    {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -333,7 +344,7 @@ index d59ee0a95f..0774f70e08 100644
    {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
    {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5f2e190d23..4d2ee2dd0d 100644
+index ad8b8ce345b..86cdb3b0715 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -61,7 +61,9 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
index f9f0fc55..a8d5a385 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -1,19 +1,19 @@
-From 213df2cac38d404619614939de0c9d3dcbf7557d Mon Sep 17 00:00:00 2001
+From 623f4e7ea6c18bec0e141c7471c7bd609bd9a6d7 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 31/43] [Patch,MicroBlaze] : double imml generation for 64 bit
+Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
  values.
 
 ---
- gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++-------
+ gas/config/tc-microblaze.c | 324 ++++++++++++++++++++++++++++++-------
  opcodes/microblaze-opc.h   |   4 +-
- 2 files changed, 263 insertions(+), 63 deletions(-)
+ 2 files changed, 264 insertions(+), 64 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 12eef24a29..3ff6a14baf 100644
+index b4330652758..f5cc1e05f7e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1008,7 +1008,7 @@ md_assemble (char * str)
+@@ -1022,7 +1022,7 @@ md_assemble (char * str)
    char * op_start;
    char * op_end;
    char * temp_op_end;
@@ -22,20 +22,21 @@ index 12eef24a29..3ff6a14baf 100644
    char * output = NULL;
    int nlen = 0;
    int i;
-@@ -1192,7 +1192,12 @@ md_assemble (char * str)
+@@ -1206,7 +1206,12 @@ md_assemble (char * str)
            reg2 = 0;
          }
        if (strcmp (op_end, ""))
+-       op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +        {
-+        if(microblaze_arch_size == 64)
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+       else
-        op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
++          if (microblaze_arch_size == 64)
++            op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
++         else
++           op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +       }
        else
         as_fatal (_("Error in statement syntax"));
  
-@@ -1288,24 +1293,51 @@ md_assemble (char * str)
+@@ -1302,24 +1307,51 @@ md_assemble (char * str)
                 || streq (name, "lwi") || streq (name, "sbi")
                  || streq (name, "shi") || streq (name, "swi"))))
          {
@@ -51,27 +52,28 @@ index 12eef24a29..3ff6a14baf 100644
 +            {
 +             opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +             if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode1->bit_sequence;
+                 {
+                   as_bad (_("unknown opcode \"%s\""), "imml");
+                   return;
+                 }
+               inst1 = opcode1->bit_sequence;
+-             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
 +              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
+               output[0] = INST_BYTE0 (inst1);
+               output[1] = INST_BYTE1 (inst1);
+               output[2] = INST_BYTE2 (inst1);
+               output[3] = INST_BYTE3 (inst1);
+               output = frag_more (isize);
+             }
 +         else 
 +           {
 +           opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +              if (opcode1 == NULL || opcode2 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
++                {
++                  as_bad (_("unknown opcode \"%s\""), "imml");
++                  return;
++                }
 +              inst1 = opcode2->bit_sequence;
 +              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
 +              output[0] = INST_BYTE0 (inst1);
@@ -79,20 +81,19 @@ index 12eef24a29..3ff6a14baf 100644
 +              output[2] = INST_BYTE2 (inst1);
 +              output[3] = INST_BYTE3 (inst1);
 +              output = frag_more (isize);
-               inst1 = opcode1->bit_sequence;
--             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
++              inst1 = opcode1->bit_sequence;
 +              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
++              output[0] = INST_BYTE0 (inst1);
++              output[1] = INST_BYTE1 (inst1);
++              output[2] = INST_BYTE2 (inst1);
++              output[3] = INST_BYTE3 (inst1);
++              output = frag_more (isize);
++            }
 +         }
            inst |= (reg1 << RD_LOW) & RD_MASK;
            inst |= (reg2 << RA_LOW) & RA_MASK;
            inst |= (immed << IMM_LOW) & IMM_MASK;
-@@ -1316,14 +1348,13 @@ md_assemble (char * str)
+@@ -1330,14 +1362,13 @@ md_assemble (char * str)
             if ((temp != 0) && (temp != 0xFFFF8000))
              {
                 /* Needs an immediate inst.  */
@@ -109,7 +110,7 @@ index 12eef24a29..3ff6a14baf 100644
                 inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
                 output[0] = INST_BYTE0 (inst1);
                 output[1] = INST_BYTE1 (inst1);
-@@ -1564,7 +1595,7 @@ md_assemble (char * str)
+@@ -1578,7 +1609,7 @@ md_assemble (char * str)
          as_fatal (_("Cannot use special register with this instruction"));
  
        if (exp.X_op != O_constant)
@@ -118,7 +119,7 @@ index 12eef24a29..3ff6a14baf 100644
        else
         {
            output = frag_more (isize);
-@@ -1898,8 +1929,9 @@ md_assemble (char * str)
+@@ -1912,8 +1943,9 @@ md_assemble (char * str)
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
@@ -129,7 +130,7 @@ index 12eef24a29..3ff6a14baf 100644
            if (opcode1 == NULL)
              {
                as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -1928,7 +1960,12 @@ md_assemble (char * str)
+@@ -1942,7 +1974,12 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -142,7 +143,7 @@ index 12eef24a29..3ff6a14baf 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1967,30 +2004,55 @@ md_assemble (char * str)
+@@ -1981,30 +2018,55 @@ md_assemble (char * str)
          }
        if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
          {
@@ -203,8 +204,8 @@ index 12eef24a29..3ff6a14baf 100644
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
-@@ -2076,25 +2138,50 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
+@@ -2090,25 +2152,50 @@ md_assemble (char * str)
+             streq (name, "breaid") ||
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFF8000;
@@ -258,7 +259,7 @@ index 12eef24a29..3ff6a14baf 100644
            inst |= (immed << IMM_LOW) & IMM_MASK;
         }
        else
-@@ -2194,21 +2281,45 @@ md_assemble (char * str)
+@@ -2208,21 +2295,45 @@ md_assemble (char * str)
         {
           output = frag_more (isize);
           immedl = exp.X_add_number;
@@ -319,7 +320,7 @@ index 12eef24a29..3ff6a14baf 100644
          }
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
-@@ -2257,21 +2368,46 @@ md_assemble (char * str)
+@@ -2271,21 +2382,46 @@ md_assemble (char * str)
         {
            output = frag_more (isize);
            immedl = exp.X_add_number;
@@ -374,7 +375,7 @@ index 12eef24a29..3ff6a14baf 100644
  
        inst |= (reg1 << RA_LOW) & RA_MASK;
        inst |= (immedl << IMM_LOW) & IMM_MASK;
-@@ -2554,8 +2690,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2565,8 +2701,8 @@ md_apply_fix (fixS *   fixP,
    /* Note: use offsetT because it is signed, valueT is unsigned.  */
    offsetT      val  = (offsetT) * valp;
    int          i;
@@ -385,7 +386,7 @@ index 12eef24a29..3ff6a14baf 100644
  
    symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
  
-@@ -2739,30 +2875,75 @@ md_apply_fix (fixS *   fixP,
+@@ -2749,30 +2885,75 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
@@ -471,7 +472,7 @@ index 12eef24a29..3ff6a14baf 100644
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
            if (opcode1 == NULL)
-@@ -2774,12 +2955,11 @@ md_apply_fix (fixS *   fixP,
+@@ -2784,12 +2965,11 @@ md_apply_fix (fixS *   fixP,
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
@@ -485,7 +486,7 @@ index 12eef24a29..3ff6a14baf 100644
        /* Add the value only if the symbol is defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
         {
-@@ -2811,21 +2991,41 @@ md_apply_fix (fixS *   fixP,
+@@ -2821,21 +3001,41 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -532,7 +533,7 @@ index 12eef24a29..3ff6a14baf 100644
          within the same section only.  */
        buf[0] = INST_BYTE0 (inst1);
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 0774f70e08..bd9d91cd57 100644
+index bd1cc90bff6..cf5b5920921 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
@@ -541,7 +542,7 @@ index 0774f70e08..bd9d91cd57 100644
  
 -#define MIN_IMML  ((long long) 0xffffff8000000000L)
 -#define MAX_IMML  ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) -9223372036854775808)
++#define MIN_IMML  ((long long) -9223372036854775807)
 +#define MAX_IMML  ((long long) 9223372036854775807)
  
  #endif /* MICROBLAZE_OPC */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
index 118c5629..3720f2dc 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
@@ -1,7 +1,7 @@
-From d64ce07a2b9206ce1e53d8958b28de02cc7cca2b Mon Sep 17 00:00:00 2001
+From b7b5caa314177cfe8aeb0fb6d748f6e52fe51a83 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Wed, 22 Jan 2020 16:31:12 +0530
-Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new
+Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new
  MB-64 instructions with single register.
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new
  1 file changed, 47 insertions(+), 3 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 95a1e69729..dc79328df6 100644
+index f5cc1e05f7e..efd1a42769e 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1642,12 +1642,56 @@ md_assemble (char * str)
+@@ -1653,12 +1653,56 @@ md_assemble (char * str)
                               exp.X_add_symbol,
                               exp.X_add_number,
                               (char *) opc);
@@ -70,8 +70,8 @@ index 95a1e69729..dc79328df6 100644
          }
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM16_MASK;
-@@ -2141,8 +2185,8 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
+@@ -2152,8 +2196,8 @@ md_assemble (char * str)
+             streq (name, "breaid") ||
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFFFFFFFF8000;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
new file mode 100644
index 00000000..8cd3563b
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
@@ -0,0 +1,47 @@
+From 0afa4ba2af8d63cb70771f1c7e235af920603533 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 16 Apr 2020 18:08:58 +0530
+Subject: [PATCH 30/40] [Patch,MicroBlaze m64]: Update imml instructions for
+ Type A branch EA
+
+This patch will remove imml 0 and imml -1 instructions when the offset is less than 16 bit for Type A branch EA instructions.
+---
+ gas/config/tc-microblaze.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index efd1a42769e..1d838abfefa 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2164,13 +2164,13 @@ md_assemble (char * str)
+       if (exp.X_op != O_constant)
+        {
+          char *opc;
+-          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
+-                streq (name, "breaid") ||
+-                streq (name, "brai") || streq (name, "braid")))
+-            opc = strdup(str_microblaze_64);
++          /* removal of imml 0 and imml -1 for bea type A insns.
++             if offset is 16 bit then imml instructions are redundant */
++         if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
++           opc = strdup(str_microblaze_64);
+          else
+-            opc = NULL;
+-          relax_substateT subtype;
++           opc = NULL;
++         relax_substateT subtype;
+ 
+          if (exp.X_md != 0)
+            subtype = get_imm_otype(exp.X_md);
+@@ -2930,7 +2930,7 @@ md_apply_fix (fixS *   fixP,
+     case BFD_RELOC_MICROBLAZE_64:
+     case BFD_RELOC_MICROBLAZE_64_PCREL:
+       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
+-            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
++            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
+         {
+           /* Generate the imm instruction.  */
+            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
new file mode 100644
index 00000000..fda23a1a
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
@@ -0,0 +1,38 @@
+From 23f0f6e8281b5cd481ef7636739c07b446828f7e Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 17 Jun 2020 21:20:26 +0530
+Subject: [PATCH 31/40] ldlang.c: Workaround for improper address mapping
+ causing runtime loops
+
+[Patch,MicroBlaze] : improper address mapping of PROVIDE directive
+symbols[DTOR_END] are causing runtime loops and we don't need to override
+PROVIDE symbols if symbols are defined in libraries and linker so I am
+disabling override for PROVIDE symbols.
+---
+ ld/ldlang.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/ld/ldlang.c b/ld/ldlang.c
+index 9977195074a..9e2c1da066e 100644
+--- a/ld/ldlang.c
++++ b/ld/ldlang.c
+@@ -3657,9 +3657,15 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
+            plugin_insert = NULL;
+ #endif
+          break;
++       /* This is from a --defsym on the command line.  */
+        case lang_assignment_statement_enum:
+          if (s->assignment_statement.exp->type.node_class != etree_assert)
+-           exp_fold_tree_no_dot (s->assignment_statement.exp);
++           {
++             if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
++               ;
++             else
++               exp_fold_tree_no_dot (s->assignment_statement.exp);
++           }
+          break;
+        default:
+          break;
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
new file mode 100644
index 00000000..0e813f96
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
@@ -0,0 +1,83 @@
+From 4d0c68ffb688c23f984de8c0a22af824c3902d83 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 16 Jul 2020 12:38:11 -0500
+Subject: [PATCH 32/40] gas: revert moving of md_pseudo_table from const
+
+The base system expect md_pseudo_table to be constant, Changing the
+definition will break other architectures when compiled with a
+unified source code.
+
+Patch reverts the change away from const, and implements a newer
+dynamic handler that passes the correct argument value based on word
+size.
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ gas/config/tc-microblaze.c | 16 +++++++++++++---
+ gas/tc.h                   |  2 +-
+ 2 files changed, 14 insertions(+), 4 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 1d838abfefa..da99d4ef482 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -384,6 +384,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+   demand_empty_rest_of_line ();
+ }
+ 
++/* Handle the .gpword pseudo-op, Pass to s_rva */
++
++static void
++microblaze_s_gpword (int ignore ATTRIBUTE_UNUSED)
++{
++  int size = 4;
++  if (microblaze_arch_size == 64)
++    size = 8;
++  s_rva(size);
++}
++
+ /* This table describes all the machine specific pseudo-ops the assembler
+    has to support.  The fields are:
+    Pseudo-op name without dot
+@@ -391,7 +402,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+    Integer arg to pass to the function.  */
+ /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
+    and then in the read.c table.  */
+-pseudo_typeS md_pseudo_table[] =
++const pseudo_typeS md_pseudo_table[] =
+ {
+   {"lcomm", microblaze_s_lcomm, 1},
+   {"data", microblaze_s_data, 0},
+@@ -400,7 +411,7 @@ pseudo_typeS md_pseudo_table[] =
+   {"data32", cons, 4},     /* Same as word.  */
+   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
+   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
+-  {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
++  {"gpword", microblaze_s_gpword, 0}, /* gpword label => store resolved label address in data section.  */
+   {"weakext", microblaze_s_weakext, 0},
+   {"rodata", microblaze_s_rdata, 0},
+   {"sdata2", microblaze_s_rdata, 1},
+@@ -3464,7 +3475,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+     case OPTION_M64:
+       //if (arg != NULL && strcmp (arg, "64") == 0)
+       microblaze_arch_size = 64;
+-      md_pseudo_table[7].poc_val = 8;
+       break;
+     default:
+       return 0;
+diff --git a/gas/tc.h b/gas/tc.h
+index 5bdfe5c3475..da1738d67a8 100644
+--- a/gas/tc.h
++++ b/gas/tc.h
+@@ -22,7 +22,7 @@
+ /* In theory (mine, at least!) the machine dependent part of the assembler
+    should only have to include one file.  This one.  -- JF */
+ 
+-extern pseudo_typeS md_pseudo_table[];
++extern const pseudo_typeS md_pseudo_table[];
+ 
+ const char * md_atof (int, char *, int *);
+ int    md_parse_option (int, const char *);
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
new file mode 100644
index 00000000..7339995e
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
@@ -0,0 +1,105 @@
+From d9114e764eb42ae1daaf6af7c2a5e48fc764109d Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Fri, 17 Jul 2020 09:20:54 -0500
+Subject: [PATCH 33/40] Fix various compile warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ bfd/elf64-microblaze.c     |  9 +++++----
+ gas/config/tc-microblaze.c | 11 +++++------
+ 2 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index b002b414d64..8308f1ebd09 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ /* Set the howto pointer for a RCE ELF reloc.  */
+ 
+ static bfd_boolean
+-microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
+                              arelent * cache_ptr,
+                              Elf_Internal_Rela * dst)
+ {
+@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
+   r_type = ELF64_R_TYPE (dst->r_info);
+   if (r_type >= R_MICROBLAZE_max)
+     {
+-      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
++      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
+                             abfd, r_type);
+       bfd_set_error (bfd_error_bad_value);
+       return FALSE;
+     }
+ 
+   cache_ptr->howto = microblaze_elf_howto_table [r_type];
+- return TRUE;
++  return TRUE;
+ }
+ 
+ /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
+@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                        else
+                          {
+                            BFD_FAIL ();
+-                           (*_bfd_error_handler)
++                           _bfd_error_handler
+                              (_("%pB: probably compiled without -fPIC?"),
+                               input_bfd);
+                            bfd_set_error (bfd_error_bad_value);
+@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+           goto dogottls;
+         case R_MICROBLAZE_TLSLD:
+           tls_type |= (TLS_TLS | TLS_LD);
++          /* Fall through. */
+         dogottls:
+           sec->has_tls_reloc = 1;
+           /* Fall through. */
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index da99d4ef482..62daa56b47a 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -1091,7 +1091,6 @@ md_assemble (char * str)
+         reg  = is_reg (temp_op_end + 1);
+       if (reg) 
+        {
+-          
+          opcode->inst_type=INST_TYPE_RD_R1_IMML;
+           opcode->inst_offset_type = OPCODE_MASK_H;
+           if (streq (name, "addli"))
+@@ -1242,18 +1241,18 @@ md_assemble (char * str)
+          else if (streq (name, "smi"))
+            as_fatal (_("smi pseudo instruction should not use a label in imm field"));
+           if(streq (name, "lli") || streq (name, "sli"))
+-            opc = str_microblaze_64;
++            opc = strdup(str_microblaze_64);
+           else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
+                        || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
+                        || streq (name, "shi") || streq (name, "swi"))))
+            {
+-              opc = str_microblaze_64;
++              opc = strdup(str_microblaze_64);
+              subtype = opcode->inst_offset_type;
+            }
+          else if (reg2 == REG_ROSDP)
+-           opc = str_microblaze_ro_anchor;
++           opc = strdup(str_microblaze_ro_anchor);
+          else if (reg2 == REG_RWSDP)
+-           opc = str_microblaze_rw_anchor;
++           opc = strdup(str_microblaze_rw_anchor);
+          else
+            opc = NULL;
+          if (exp.X_md != 0)
+@@ -1718,7 +1717,7 @@ md_assemble (char * str)
+       inst |= (reg1 << RD_LOW) & RD_MASK;
+       inst |= (immed << IMM_LOW) & IMM16_MASK;
+       break;
+-       
++
+     case INST_TYPE_R1_RFSL:
+       if (strcmp (op_end, ""))
+         op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0032-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
index 88c137f5..00e5410c 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0032-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
@@ -1,7 +1,7 @@
-From 5c7fa77256c704cc493a6bd42425fcec814710e8 Mon Sep 17 00:00:00 2001
+From c466a54f6ac8fae44f3e79e33bb782086dc08a2b Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 32/43] Add initial port of linux gdbserver add
+Subject: [PATCH 34/40] Add initial port of linux gdbserver add
  gdb_proc_service_h to gdbserver microblaze-linux
 
 gdbserver needs to initialise the microblaze registers
@@ -21,17 +21,21 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
  gdb/configure.host                   |   3 +
+ gdb/features/microblaze-linux.xml    |  12 ++
  gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
  gdb/microblaze-linux-tdep.c          |  29 +++-
  gdb/microblaze-tdep.c                |  35 ++++-
  gdb/microblaze-tdep.h                |   4 +-
  gdb/regformats/reg-microblaze.dat    |  41 ++++++
- 6 files changed, 298 insertions(+), 3 deletions(-)
+ gdbserver/Makefile.in                |   4 +
+ gdbserver/configure.srv              |   8 ++
+ 9 files changed, 322 insertions(+), 3 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
  create mode 100644 gdb/gdbserver/linux-microblaze-low.c
  create mode 100644 gdb/regformats/reg-microblaze.dat
 
 diff --git a/gdb/configure.host b/gdb/configure.host
-index c87f997abc..de8d6b00f3 100644
+index ce528237291..cf1a08e8b28 100644
 --- a/gdb/configure.host
 +++ b/gdb/configure.host
 @@ -65,6 +65,7 @@ hppa*)                        gdb_host_cpu=pa ;;
@@ -51,9 +55,27 @@ index c87f997abc..de8d6b00f3 100644
  powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
                         gdb_host=aix ;;
  powerpc*-*-freebsd*)   gdb_host=fbsd ;;
+diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+new file mode 100644
+index 00000000000..8983e66eb3d
+--- /dev/null
++++ b/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++  <osabi>GNU/Linux</osabi>
++  <xi:include href="microblaze-core.xml"/>
++</target>
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
 new file mode 100644
-index 0000000000..cba5d6fc58
+index 00000000000..cba5d6fc585
 --- /dev/null
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -0,0 +1,189 @@
@@ -247,7 +269,7 @@ index 0000000000..cba5d6fc58
 +  microblaze_supply_ptrace_register,
 +};
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 4e5f60cd4e..7ab650a1cc 100644
+index be710bedb64..d15b24d619e 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
 @@ -37,6 +37,22 @@
@@ -273,17 +295,14 @@ index 4e5f60cd4e..7ab650a1cc 100644
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
                                            struct bp_target_info *bp_tgt)
-@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
- 
+@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    /* Determine appropriate breakpoint contents and size for this address.  */
    bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
  
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
    val = target_read_memory (addr, old_contents, bplen);
  
    /* If our breakpoint is no longer at the address, this means that the
@@ -296,10 +315,8 @@ index 4e5f60cd4e..7ab650a1cc 100644
 +      microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
  
-+  do_cleanups (cleanup);
    return val;
  }
- 
 @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    /* Trampolines.  */
    tramp_frame_prepend_unwinder (gdbarch,
@@ -310,9 +327,9 @@ index 4e5f60cd4e..7ab650a1cc 100644
 +                                             svr4_fetch_objfile_link_map);
  }
  
- void
+ void _initialize_microblaze_linux_tdep ();
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 1248acbdc9..730a2b281f 100644
+index 5c804133040..5972a69eb5f 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
@@ -329,7 +346,6 @@ index 1248acbdc9..730a2b281f 100644
 +  int val;
 +  int bplen;
 +  gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
 +
 +  /* Determine appropriate breakpoint contents and size for this address.  */
 +  bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
@@ -337,7 +353,9 @@ index 1248acbdc9..730a2b281f 100644
 +    error (_("Software breakpoints not implemented for this target."));
 +
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
 +  val = target_read_memory (addr, old_contents, bplen);
 +
 +  /* If our breakpoint is no longer at the address, this means that the
@@ -349,7 +367,6 @@ index 1248acbdc9..730a2b281f 100644
 +    microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
 +
-+  do_cleanups (cleanup);
 +  return val;
 +}
  
@@ -363,14 +380,14 @@ index 1248acbdc9..730a2b281f 100644
  
    set_gdbarch_frame_args_skip (gdbarch, 8);
  
-@@ -770,4 +802,5 @@ When non-zero, microblaze specific debugging is enabled."),
+@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
                              NULL,
                              &setdebuglist, &showdebuglist);
  
 +
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index a0048148e4..63aab84ef6 100644
+index 4fbdf9933f0..db0772643dc 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -117,6 +117,8 @@ struct microblaze_frame_cache
@@ -385,7 +402,7 @@ index a0048148e4..63aab84ef6 100644
  #endif /* microblaze-tdep.h */
 diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
 new file mode 100644
-index 0000000000..bd8a438442
+index 00000000000..bd8a4384424
 --- /dev/null
 +++ b/gdb/regformats/reg-microblaze.dat
 @@ -0,0 +1,41 @@
@@ -430,6 +447,54 @@ index 0000000000..bd8a438442
 +32:fsr
 +32:slr
 +32:shr
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index 9d7687be534..8195ccb8ad2 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -183,6 +183,7 @@ SFILES = \
+        $(srcdir)/linux-ia64-low.cc \
+        $(srcdir)/linux-low.cc \
+        $(srcdir)/linux-m68k-low.cc \
++       $(srcdir)/linux-microblaze-low.c \
+        $(srcdir)/linux-mips-low.cc \
+        $(srcdir)/linux-nios2-low.cc \
+        $(srcdir)/linux-ppc-low.cc \
+@@ -216,6 +217,7 @@ SFILES = \
+        $(srcdir)/../gdb/nat/linux-namespaces.c \
+        $(srcdir)/../gdb/nat/linux-osdata.c \
+        $(srcdir)/../gdb/nat/linux-personality.c \
++       $(srcdir)/../gdb/nat/microblaze-linux.c \
+        $(srcdir)/../gdb/nat/mips-linux-watch.c \
+        $(srcdir)/../gdb/nat/ppc-linux.c \
+        $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
+@@ -557,6 +559,8 @@ target/%.o: ../gdb/target/%.c
+ 
+ %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
+        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+ 
+ #
+ # Dependency tracking.
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 5e33bd9c54d..13d5c6aff87 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,6 +155,14 @@ case "${gdbserver_host}" in
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+                        ;;
++  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
++                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_xmlfiles="microblaze-linux.xml"
++                       srv_linux_regsets=yes
++                       srv_linux_usrregs=yes
++                       srv_linux_thread_db=yes
++                       ;;
+   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
+                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+                        srv_regobj="${srv_regobj} powerpc-vsx32l.o"
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
index e6bbf2b7..4eeeb7da 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
@@ -1,22 +1,22 @@
-From 0fd864ff792d7bcbbcbed5ee0ae9f429f1fd2353 Mon Sep 17 00:00:00 2001
+From b6c01467951b83f9cca621ffeb89151eba1d73a1 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 33/43] Initial port of core reading support Added support for
+Subject: [PATCH 35/40] Initial port of core reading support Added support for
  reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
  information for rebuilding ".reg" sections of core dumps at run time.
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
- bfd/elf32-microblaze.c      | 84 ++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c      | 84 +++++++++++++++++++++++++++++++++++++
  gdb/configure.tgt           |  2 +-
- gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
- gdb/microblaze-tdep.c       | 90 +++++++++++++++++++++++++++++++++++++
- gdb/microblaze-tdep.h       | 27 +++++++++++
- 5 files changed, 259 insertions(+), 1 deletion(-)
+ gdb/microblaze-linux-tdep.c | 17 +++++++-
+ gdb/microblaze-tdep.c       | 48 +++++++++++++++++++++
+ gdb/microblaze-tdep.h       | 27 ++++++++++++
+ 5 files changed, 176 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 6a795c5069..c280431df6 100644
+index bf09c68afd9..a4b15882d77 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
@@ -107,7 +107,7 @@ index 6a795c5069..c280431df6 100644
  /* ELF linker hash entry.  */
  
  struct elf32_mb_link_hash_entry
-@@ -3672,4 +3753,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+@@ -3574,4 +3655,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
  #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
  #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
  
@@ -116,10 +116,10 @@ index 6a795c5069..c280431df6 100644
 +
  #include "elf32-target.h"
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 27f122ad04..622bd486b3 100644
+index d66f01bb9f7..2938fddfe82 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -397,7 +397,7 @@ mep-*-*)
+@@ -389,7 +389,7 @@ mep-*-*)
  
  microblaze*-linux-*|microblaze*-*-linux*)
         # Target: Xilinx MicroBlaze running Linux
@@ -129,65 +129,34 @@ index 27f122ad04..622bd486b3 100644
         gdb_sim=../sim/microblaze/libsim.a
         ;;
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 7ab650a1cc..e2225d778a 100644
+index d15b24d619e..0d5c08d24f6 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
-@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
+@@ -36,6 +36,7 @@
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
+ 
+ static int microblaze_debug_flag = 0;
+ 
+@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
    microblaze_linux_sighandler_cache_init
  };
  
-+const struct microblaze_gregset microblaze_linux_core_gregset;
-+
-+static void
-+microblaze_linux_supply_core_gregset (const struct regset *regset,
-+                                   struct regcache *regcache,
-+                                   int regnum, const void *gregs, size_t len)
-+{
-+  microblaze_supply_gregset (&microblaze_linux_core_gregset, regcache,
-+                             regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_gregset (const struct regset *regset,
-+                                    const struct regcache *regcache,
-+                                    int regnum, void *gregs, size_t len)
-+{
-+  microblaze_collect_gregset (&microblaze_linux_core_gregset, regcache,
-+                              regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_supply_core_fpregset (const struct regset *regset,
-+                                    struct regcache *regcache,
-+                                    int regnum, const void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_supply_fpregset (regcache, regnum, fpregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_fpregset (const struct regset *regset,
-+                                     const struct regcache *regcache,
-+                                     int regnum, void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_collect_fpregset (regcache, regnum, fpregs);
-+}
- 
+-
  static void
  microblaze_linux_init_abi (struct gdbarch_info info,
                            struct gdbarch *gdbarch)
  {
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
-+                                microblaze_linux_collect_core_gregset);
 +  tdep->sizeof_gregset = 200;
 +
    linux_init_abi (info, gdbarch);
  
    set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    tramp_frame_prepend_unwinder (gdbarch,
                                 &microblaze_linux_sighandler_tramp_frame);
  
@@ -202,109 +171,50 @@ index 7ab650a1cc..e2225d778a 100644
 +  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
 +  set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 +
-+  set_gdbarch_regset_from_core_section (gdbarch,
-+                                       microblaze_regset_from_core_section);
-+
    /* Enable TLS support.  */
    set_gdbarch_fetch_tls_load_module_address (gdbarch,
                                               svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 730a2b281f..49713ea9b1 100644
+index 5972a69eb5f..7462a1f7ce6 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
-@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
- 
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
-+static CORE_ADDR
-+microblaze_store_arguments (struct regcache *regcache, int nargs,
-+                           struct value **args, CORE_ADDR sp,
-+                           int struct_return, CORE_ADDR struct_addr)
-+{
-+  error (_("store_arguments not implemented"));
-+  return sp;
-+}
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-                                    struct bp_target_info *bp_tgt)
-@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame,
-   return cache->base;
- }
- 
-+static const struct frame_unwind *
-+microblaze_frame_sniffer (struct frame_info *next_frame)
-+{
-+  return &microblaze_frame_unwind;
-+}
-+
- static const struct frame_base microblaze_frame_base =
- {
-   &microblaze_frame_unwind,
-@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
                                    tdesc_microblaze_with_stack_protect);
  }
  
 +void
-+microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++microblaze_supply_gregset (const struct regset *regset,
 +                        struct regcache *regcache,
 +                        int regnum, const void *gregs)
 +{
-+  unsigned int *regs = gregs;
++  const unsigned int *regs = (const unsigned int *)gregs;
 +  if (regnum >= 0)
-+    regcache_raw_supply (regcache, regnum, regs + regnum);
++    regcache->raw_supply (regnum, regs + regnum);
 +
 +  if (regnum == -1) {
 +    int i;
 +
 +    for (i = 0; i < 50; i++) {
-+      regcache_raw_supply (regcache, i, regs + i);
++      regcache->raw_supply (i, regs + i);
 +    }
 +  }
 +}
 +
 +
-+void
-+microblaze_collect_gregset (const struct microblaze_gregset *gregset,
-+                         const struct regcache *regcache,
-+                         int regnum, void *gregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_supply_fpregset (struct regcache *regcache,
-+                         int regnum, const void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_collect_fpregset (const struct regcache *regcache,
-+                          int regnum, void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+
 +/* Return the appropriate register set for the core section identified
 +   by SECT_NAME and SECT_SIZE.  */
 +
-+const struct regset *
-+microblaze_regset_from_core_section (struct gdbarch *gdbarch,
-+                                     const char *sect_name, size_t sect_size)
++static void
++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
++                                     iterate_over_regset_sections_cb *cb,
++                                     void *cb_data,
++                                     const struct regcache *regcache)
 +{
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
-+
-+  if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
-+    return tdep->gregset;
-+
-+  if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
-+    return tdep->fpregset;
++  cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
-+  return NULL;
++  cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
 +}
 +
 +
@@ -312,7 +222,7 @@ index 730a2b281f..49713ea9b1 100644
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  {
-@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    tdep = XCNEW (struct gdbarch_tdep);
    gdbarch = gdbarch_alloc (&info, tdep);
  
@@ -323,7 +233,7 @@ index 730a2b281f..49713ea9b1 100644
    set_gdbarch_long_double_bit (gdbarch, 128);
  
    set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
    if (tdesc_data != NULL)
      tdesc_use_registers (gdbarch, tdesc, tdesc_data);
@@ -331,14 +241,14 @@ index 730a2b281f..49713ea9b1 100644
 +
 +  /* If we have register sets, enable the generic core file support.  */
 +  if (tdep->gregset) {
-+      set_gdbarch_regset_from_core_section (gdbarch,
-+                                          microblaze_regset_from_core_section);
++    set_gdbarch_iterate_over_regset_sections (gdbarch,
++                                          microblaze_iterate_over_regset_sections);
 +  }
  
    return gdbarch;
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 63aab84ef6..02650f61d9 100644
+index db0772643dc..8f41ba19351 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -22,8 +22,22 @@
@@ -368,10 +278,10 @@ index 63aab84ef6..02650f61d9 100644
  #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
  #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
  
-+extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_supply_gregset (const struct regset *regset,
 +                                    struct regcache *regcache,
 +                                    int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_collect_gregset (const struct regset *regset,
 +                                     const struct regcache *regcache,
 +                                     int regnum, void *gregs);
 +extern void microblaze_supply_fpregset (struct regcache *regcache,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch
deleted file mode 100644
index ddb53a07..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 1c5dbbd272854e6e7912e2602bdfd78b64399319 Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Mon, 22 Jul 2013 11:16:05 +1000
-Subject: [PATCH 35/43] revert master-rebase changes to gdbserver
-
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gdb/gdbserver/configure.srv | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index d19d22b3a3..7a0be5b072 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,6 +210,13 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
-+  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_linux_regsets=yes
-+                       srv_linux_usrregs=yes
-+                       srv_linux_thread_db=yes
-+                       ;;
-   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
-                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
-                        srv_regobj="${srv_regobj} powerpc-cell32l.o"
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
index df5b3db3..79d08da9 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,7 +1,7 @@
-From e44a27432ce56bb48eb9785ffaae14bc3a12bd27 Mon Sep 17 00:00:00 2001
+From dc76254a84fa1086983aefe9db4d8f94b42efb9b Mon Sep 17 00:00:00 2001
 From: Nathan Rossi <nathan.rossi@petalogix.com>
 Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 34/43] Fix debug message when register is unavailable
+Subject: [PATCH 36/40] Fix debug message when register is unavailable
 
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
  1 file changed, 10 insertions(+), 3 deletions(-)
 
 diff --git a/gdb/frame.c b/gdb/frame.c
-index d8b5f819f1..49706dc97c 100644
+index ff27b9f00e9..bf931b370c9 100644
 --- a/gdb/frame.c
 +++ b/gdb/frame.c
-@@ -1227,12 +1227,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
+@@ -1263,12 +1263,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
           else
             {
               int i;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
deleted file mode 100644
index f2e5e951..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bd55e11af18006afb87a8b0fbd93bb0920354e0e Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 30 Apr 2018 17:09:55 +0530
-Subject: [PATCH 36/43] revert master-rebase changes to gdbserver , previous
- commit typo's
-
----
- gdb/gdbserver/Makefile.in | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 4ae13692a2..45d95e6cab 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -169,6 +169,7 @@ SFILES = \
-        $(srcdir)/linux-low.c \
-        $(srcdir)/linux-m32r-low.c \
-        $(srcdir)/linux-m68k-low.c \
-+        $(srcdir)/linux-microblaze-low.c \
-        $(srcdir)/linux-mips-low.c \
-        $(srcdir)/linux-nios2-low.c \
-        $(srcdir)/linux-ppc-low.c \
-@@ -226,6 +227,7 @@ SFILES = \
-        $(srcdir)/nat/linux-osdata.c \
-        $(srcdir)/nat/linux-personality.c \
-        $(srcdir)/nat/mips-linux-watch.c \
-+        $(srcdir)/nat/microblaze-linux.c \
-        $(srcdir)/nat/ppc-linux.c \
-        $(srcdir)/nat/fork-inferior.c \
-        $(srcdir)/target/waitstatus.c
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index e2b601b6..80b70fcc 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 988a9a41ac91ce3293af8708c1c88c51c48a2a72 Mon Sep 17 00:00:00 2001
+From 23376adc47cf72e46a1edf99e7fbc40164d39cd6 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/43] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
  configure.tgt
 
 For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -16,10 +16,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 622bd486b3..989523735b 100644
+index 2938fddfe82..ac2d35a9917 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -405,6 +405,7 @@ microblaze*-*-*)
+@@ -397,6 +397,7 @@ microblaze*-*-*)
         # Target: Xilinx MicroBlaze running standalone
         gdb_target_obs="microblaze-tdep.o"
         gdb_sim=../sim/microblaze/libsim.a
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
index 1a50f0a6..9360bc5a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
@@ -1,62 +1,43 @@
-From aa9cb6db79c663dc944cb67928d16e63f2a69f74 Mon Sep 17 00:00:00 2001
+From f34017e4cec8ad571accfd964187ab1f2db8de7f Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@petalogix.com>
 Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/43] Initial support for native gdb
+Subject: [PATCH 38/40] Initial support for native gdb
 
 microblaze: Follow PPC method of getting setting registers
 using PTRACE PEEK/POKE
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
-
-Conflicts:
-        gdb/Makefile.in
 ---
- gdb/Makefile.in                |   4 +-
+ gdb/Makefile.in                |   2 +
  gdb/config/microblaze/linux.mh |   9 +
  gdb/microblaze-linux-nat.c     | 431 +++++++++++++++++++++++++++++++++
- 3 files changed, 443 insertions(+), 1 deletion(-)
+ 3 files changed, 442 insertions(+)
  create mode 100644 gdb/config/microblaze/linux.mh
  create mode 100644 gdb/microblaze-linux-nat.c
 
 diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 215ef7933c..8c9a3c07c0 100644
+index 9ae9fe2d1e1..a44464b9830 100644
 --- a/gdb/Makefile.in
 +++ b/gdb/Makefile.in
-@@ -1316,6 +1316,7 @@ HFILES_NO_SRCDIR = \
+@@ -1328,6 +1328,7 @@ HFILES_NO_SRCDIR = \
         memory-map.h \
         memrange.h \
         microblaze-tdep.h \
-+        microblaze-linux-tdep.h \
++       microblaze-linux-tdep.h \
         mips-linux-tdep.h \
         mips-nbsd-tdep.h \
         mips-tdep.h \
-@@ -1349,6 +1350,7 @@ HFILES_NO_SRCDIR = \
-        prologue-value.h \
-        psympriv.h \
-        psymtab.h \
-+        ia64-hpux-tdep.h \
-        ravenscar-thread.h \
-        record.h \
-        record-full.h \
-@@ -2263,6 +2265,7 @@ ALLDEPFILES = \
+@@ -2207,6 +2208,7 @@ ALLDEPFILES = \
         m68k-tdep.c \
         microblaze-linux-tdep.c \
         microblaze-tdep.c \
-+        microblaze-linux-nat.c \ 
++       microblaze-linux-nat.c \
         mingw-hdep.c \
         mips-fbsd-nat.c \
         mips-fbsd-tdep.c \
-@@ -2365,7 +2368,6 @@ ALLDEPFILES = \
-        xtensa-linux-tdep.c \
-        xtensa-tdep.c \
-        xtensa-xtregs.c \
--       common/mingw-strerror.c \
-        common/posix-strerror.c
- 
- # Some files need explicit build rules (due to -Werror problems) or due
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
 new file mode 100644
-index 0000000000..a4eaf540e1
+index 00000000000..a4eaf540e1d
 --- /dev/null
 +++ b/gdb/config/microblaze/linux.mh
 @@ -0,0 +1,9 @@
@@ -71,7 +52,7 @@ index 0000000000..a4eaf540e1
 +LOADLIBES = -ldl $(RDYNAMIC)
 diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
 new file mode 100644
-index 0000000000..e9b8c9c522
+index 00000000000..e9b8c9c5221
 --- /dev/null
 +++ b/gdb/microblaze-linux-nat.c
 @@ -0,0 +1,431 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
index 0b1475a7..136291f2 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
@@ -1,20 +1,19 @@
-From 0b5b76d6c9757ebb1c9677772c24272957190345 Mon Sep 17 00:00:00 2001
+From 1a493a6fc3bebb50d9679a4d11709676f933ab04 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/43] Fixing the issues related to GDB-7.12 added all the
- required function which are new in 7.12 and removed few deprecated functions
- from 7.6
+Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
 
+added all the required function which are new in 7.12 and removed
+few deprecated functions from 7.6
 ---
  gdb/config/microblaze/linux.mh       |  4 +-
- gdb/gdbserver/configure.srv          |  3 +-
  gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-linux-tdep.c          | 68 +++++++++++++++++--
  gdb/microblaze-tdep.h                |  1 +
- 5 files changed, 153 insertions(+), 20 deletions(-)
+ gdbserver/configure.srv              |  3 +-
+ 4 files changed, 89 insertions(+), 16 deletions(-)
 
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1..74a53b854a 100644
+index a4eaf540e1d..74a53b854a4 100644
 --- a/gdb/config/microblaze/linux.mh
 +++ b/gdb/config/microblaze/linux.mh
 @@ -1,9 +1,11 @@
@@ -30,22 +29,8 @@ index a4eaf540e1..74a53b854a 100644
  NAT_CDEPS = $(srcdir)/proc-service.list
  
  LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index 7a0be5b072..c421790bd0 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -211,8 +211,7 @@ case "${target}" in
-                        srv_linux_thread_db=yes
-                        ;;
-   microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
--                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
--                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc58..a2733f3c21 100644
+index cba5d6fc585..a2733f3c21c 100644
 --- a/gdb/gdbserver/linux-microblaze-low.c
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -39,10 +39,11 @@ static int microblaze_regmap[] =
@@ -200,100 +185,8 @@ index cba5d6fc58..a2733f3c21 100644
 +{
 +  init_registers_microblaze ();
 +}
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e2225d778a..011e513941 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -29,13 +29,76 @@
- #include "regcache.h"
- #include "value.h"
- #include "osabi.h"
--#include "regset.h"
- #include "solib-svr4.h"
- #include "microblaze-tdep.h"
- #include "trad-frame.h"
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
-+
-+#include "gdb_assert.h"
-+
-+#ifndef REGSET_H
-+#define REGSET_H 1
-+
-+struct gdbarch;
-+struct regcache;
-+
-+/* Data structure for the supported register notes in a core file.  */
-+struct core_regset_section
-+{
-+  const char *sect_name;
-+  int size;
-+  const char *human_name;
-+};
-+
-+/* Data structure describing a register set.  */
-+
-+typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
-+                                    int, const void *, size_t);
-+typedef void (collect_regset_ftype) (const struct regset *,
-+                                     const struct regcache *,
-+                                     int, void *, size_t);
-+
-+struct regset
-+{
-+  /* Data pointer for private use by the methods below, presumably
-+     providing some sort of description of the register set.  */
-+  const void *descr;
-+
-+  /* Function supplying values in a register set to a register cache.  */
-+  supply_regset_ftype *supply_regset;
-+
-+  /* Function collecting values in a register set from a register cache.  */
-+  collect_regset_ftype *collect_regset;
-+
-+  /* Architecture associated with the register set.  */
-+  struct gdbarch *arch;
-+};
-+
-+#endif
-+
-+/* Allocate a fresh 'struct regset' whose supply_regset function is
-+   SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
-+   If the regset has no collect_regset function, pass NULL for
-+   COLLECT_REGSET.
-+
-+   The object returned is allocated on ARCH's obstack.  */
-+
-+struct regset *
-+regset_alloc (struct gdbarch *arch,
-+              supply_regset_ftype *supply_regset,
-+              collect_regset_ftype *collect_regset)
-+{
-+  struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
-+
-+  regset->arch = arch;
-+  regset->supply_regset = supply_regset;
-+  regset->collect_regset = collect_regset;
-+
-+  return regset;
-+}
- 
- static int microblaze_debug_flag = 0;
- 
-@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
- 
--  set_gdbarch_regset_from_core_section (gdbarch,
--                                       microblaze_regset_from_core_section);
--
-   /* Enable TLS support.  */
-   set_gdbarch_fetch_tls_load_module_address (gdbarch,
-                                              svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 02650f61d9..3777cbb6a8 100644
+index 8f41ba19351..d2112dc07e1 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -24,6 +24,7 @@
@@ -304,6 +197,20 @@ index 02650f61d9..3777cbb6a8 100644
     unsigned int gregs[32];
     unsigned int fpregs[32];
     unsigned int pregs[16];
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 13d5c6aff87..ff9ada71b0d 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
+                        srv_linux_thread_db=yes
+                        ;;
+   microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
+-                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
+-                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+                        srv_xmlfiles="microblaze-linux.xml"
+                        srv_linux_regsets=yes
+                        srv_linux_usrregs=yes
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
index 6582af01..1dc6b695 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
@@ -1,37 +1,33 @@
-From 34e572e123b166122cc54a8d8e66676c36515711 Mon Sep 17 00:00:00 2001
+From 928d8d1f05274ab6029e4da7d659312c769beded Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/43] [Patch, microblaze]: Adding 64 bit MB support Added new
- architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju
- Mekala <nmekala@xilix.com>
+Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
 
-Merged on top of binutils work.
+Added new architecture to Microblaze 64-bit support to GDB
 
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  bfd/archures.c                                |   2 +
  bfd/bfd-in2.h                                 |   2 +
- bfd/cpu-microblaze.c                          |  12 +-
- bfd/elf32-microblaze.c                        |  93 +-------
- gas/config/tc-microblaze.c                    |  16 +-
+ bfd/cpu-microblaze.c                          |  16 +-
+ bfd/elf32-microblaze.c                        |   9 +
+ gas/config/tc-microblaze.c                    |  14 ++
  gas/config/tc-microblaze.h                    |   4 +
- gdb/Makefile.in                               |   2 +-
  gdb/features/Makefile                         |   3 +
  gdb/features/microblaze-core.xml              |   6 +-
- gdb/features/microblaze-stack-protect.xml     |   4 +-
- gdb/features/microblaze-with-stack-protect.c  |   8 +-
+ gdb/features/microblaze-with-stack-protect.c  |   4 +-
  gdb/features/microblaze.c                     |   6 +-
- gdb/features/microblaze64-core.xml            |  69 ++++++
- gdb/features/microblaze64-stack-protect.xml   |  12 +
- .../microblaze64-with-stack-protect.c         |  79 +++++++
- .../microblaze64-with-stack-protect.xml       |  12 +
- gdb/features/microblaze64.c                   |  77 +++++++
- gdb/features/microblaze64.xml                 |  11 +
- gdb/microblaze-tdep.c                         | 207 ++++++++++++++++--
- gdb/microblaze-tdep.h                         |   8 +-
+ gdb/features/microblaze64-core.xml            |  69 +++++++
+ gdb/features/microblaze64-stack-protect.xml   |  12 ++
+ .../microblaze64-with-stack-protect.c         |  79 ++++++++
+ .../microblaze64-with-stack-protect.xml       |  12 ++
+ gdb/features/microblaze64.c                   |  77 ++++++++
+ gdb/features/microblaze64.xml                 |  11 ++
+ gdb/microblaze-linux-tdep.c                   |  29 ++-
+ gdb/microblaze-tdep.c                         | 176 ++++++++++++++++--
+ gdb/microblaze-tdep.h                         |   9 +-
  .../microblaze-with-stack-protect.dat         |   4 +-
- opcodes/microblaze-opc.h                      |   1 -
- 22 files changed, 504 insertions(+), 134 deletions(-)
+ 20 files changed, 504 insertions(+), 40 deletions(-)
  create mode 100644 gdb/features/microblaze64-core.xml
  create mode 100644 gdb/features/microblaze64-stack-protect.xml
  create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -40,10 +36,10 @@ Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
  create mode 100644 gdb/features/microblaze64.xml
 
 diff --git a/bfd/archures.c b/bfd/archures.c
-index 647cf0d8d4..3fdf7c3c0e 100644
+index 551ec8732f0..627d81261da 100644
 --- a/bfd/archures.c
 +++ b/bfd/archures.c
-@@ -512,6 +512,8 @@ DESCRIPTION
+@@ -522,6 +522,8 @@ DESCRIPTION
  .  bfd_arch_lm32,      {* Lattice Mico32.  *}
  .#define bfd_mach_lm32         1
  .  bfd_arch_microblaze,{* Xilinx MicroBlaze.  *}
@@ -53,10 +49,10 @@ index 647cf0d8d4..3fdf7c3c0e 100644
  .  bfd_arch_tilegx,    {* Tilera TILE-Gx.  *}
  .#define bfd_mach_tilepro      1
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 33c9cb62d9..db624c62b9 100644
+index 8902d9c7939..0e5071c235d 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -2411,6 +2411,8 @@ enum bfd_architecture
+@@ -1922,6 +1922,8 @@ enum bfd_architecture
    bfd_arch_lm32,      /* Lattice Mico32.  */
  #define bfd_mach_lm32          1
    bfd_arch_microblaze,/* Xilinx MicroBlaze.  */
@@ -66,7 +62,7 @@ index 33c9cb62d9..db624c62b9 100644
    bfd_arch_tilegx,    /* Tilera TILE-Gx.  */
  #define bfd_mach_tilepro       1
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index c91ba46f75..8e7bcead28 100644
+index f94dc2c177b..4dbc149155e 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
 @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
@@ -80,16 +76,23 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   32,                          /* 32 bits in an address.  */
-   8,                           /* 8 bits in a byte.  */
-   bfd_arch_microblaze,         /* Architecture.  */
+@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   0 /* Maximum offset of a reloc from the start of an insn.  */
+ },
+ {
+-  32,                          /* Bits in a word.  */
+-  32,                          /* Bits in an address.  */
+-  8,                           /* Bits in a byte.  */
++  32,                          /* 32 bits in a word.  */
++  32,                          /* 32 bits in an address.  */
++  8,                           /* 8 bits in a byte.  */
+   bfd_arch_microblaze,         /* Architecture number.  */
 -  0,                           /* Machine number - 0 for now.  */
 +  bfd_mach_microblaze,         /* 32 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -62,7 +62,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    32,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
    bfd_arch_microblaze,                 /* Architecture.  */
@@ -98,110 +101,20 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -76,8 +76,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   64,                          /* 32 bits in a word.  */
+@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    64,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
--  bfd_arch_microblaze,                 /* Architecture.  */
+   bfd_arch_microblaze,                 /* Architecture.  */
 -  0,                           /* Machine number - 0 for now.  */
-+  bfd_arch_microblaze,         /* Architecture.  */
 +  bfd_mach_microblaze64,       /* 64 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index c280431df6..f9996eae12 100644
+index a4b15882d77..d33f709b8b3 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -767,87 +767,6 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
-   return _bfd_elf_is_local_label_name (abfd, name);
- }
- 
--/* Support for core dump NOTE sections.  */
--static bfd_boolean
--microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
--{
--  int offset;
--  unsigned int size;
--
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 228:         /* Linux/MicroBlaze */
--        /* pr_cursig */
--        elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
--
--        /* pr_pid */
--        elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
--
--        /* pr_reg */
--        offset = 72;
--        size = 50 * 4;
--
--        break;
--    }
--
--  /* Make a ".reg/999" section.  */
--  return _bfd_elfcore_make_pseudosection (abfd, ".reg",
--                                          size, note->descpos + offset);
--}
--
--static bfd_boolean
--microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
--{
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 128:         /* Linux/MicroBlaze elf_prpsinfo */
--        elf_tdata (abfd)->core->program
--         = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
--        elf_tdata (abfd)->core->command
--         = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
--    }
--
--  /* Note that for some reason, a spurious space is tacked
--     onto the end of the args in some (at least one anyway)
--     implementations, so strip it off if it exists.  */
--
--  {
--    char *command = elf_tdata (abfd)->core->command;
--    int n = strlen (command);
--
--    if (0 < n && command[n - 1] == ' ')
--      command[n - 1] = '\0';
--  }
--
--  return TRUE;
--}
--
--/* The microblaze linker (like many others) needs to keep track of
--   the number of relocs that it decides to copy as dynamic relocs in
--   check_relocs for each symbol. This is so that it can later discard
--   them if they are found to be unnecessary.  We store the information
--   in a field extending the regular ELF linker hash table.  */
--
--struct elf32_mb_dyn_relocs
--{
--  struct elf32_mb_dyn_relocs *next;
--
--  /* The input section of the reloc.  */
--  asection *sec;
--
--  /* Total number of relocs copied for the input section.  */
--  bfd_size_type count;
--
--  /* Number of pc-relative relocs copied for the input section.  */
--  bfd_size_type pc_count;
--};
--
- /* ELF linker hash entry.  */
- 
- struct elf32_mb_link_hash_entry
-@@ -3683,6 +3602,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
+@@ -3585,6 +3585,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
    return TRUE;
  }
  
@@ -216,42 +129,30 @@ index c280431df6..f9996eae12 100644
  /* Hook called by the linker routine which adds symbols from an object
     file.  We use it to put .comm items in .sbss, and not .bss.  */
  
-@@ -3752,8 +3679,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define elf_backend_finish_dynamic_symbol      microblaze_elf_finish_dynamic_symbol
- #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
- #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
--
--#define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
--#define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
+@@ -3657,5 +3665,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+ 
+ #define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
+ #define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
 +#define elf_backend_object_p                   elf_microblaze_object_p
  
  #include "elf32-target.h"
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3ff6a14baf..95a1e69729 100644
+index 62daa56b47a..b22f6de2df6 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -426,7 +426,10 @@ md_begin (void)
-   const char *prev_name = "";
+@@ -437,6 +437,11 @@ md_begin (void)
  
    opcode_hash_control = hash_new ();
--
+ 
 +  if (microblaze_arch_size == 64)
 +    bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze64);
 +  else
 +    bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze);
++
    /* Insert unique names into hash table.  */
-   for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
+   for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
      {
-@@ -1348,7 +1351,7 @@ md_assemble (char * str)
-            if ((temp != 0) && (temp != 0xFFFF8000))
-             {
-                /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
-+               opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
-                if (opcode1 == NULL)
-                  {
-                    as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -3431,6 +3434,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -3494,6 +3499,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
  }
  
  
@@ -268,7 +169,7 @@ index 3ff6a14baf..95a1e69729 100644
     found a machine specific op in an expression,
     then we create relocs accordingly.  */
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 9d38d2ced5..13f58917e7 100644
+index 7435a70ef5e..90c2a4a5558 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -23,6 +23,10 @@
@@ -282,34 +183,21 @@ index 9d38d2ced5..13f58917e7 100644
  #ifndef TARGET_BYTES_BIG_ENDIAN
  /* Used to initialise target_big_endian.  */
  #define TARGET_BYTES_BIG_ENDIAN 1
-diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 8c9a3c07c0..15387197c7 100644
---- a/gdb/Makefile.in
-+++ b/gdb/Makefile.in
-@@ -2265,7 +2265,7 @@ ALLDEPFILES = \
-        m68k-tdep.c \
-        microblaze-linux-tdep.c \
-        microblaze-tdep.c \
--        microblaze-linux-nat.c \ 
-+       microblaze-linux-nat.c \
-        mingw-hdep.c \
-        mips-fbsd-nat.c \
-        mips-fbsd-tdep.c \
 diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index 3d84ca09a1..fdeec19753 100644
+index d0af9a47b48..2c3cf91b69f 100644
 --- a/gdb/features/Makefile
 +++ b/gdb/features/Makefile
-@@ -64,6 +64,7 @@ WHICH = aarch64 \
-        i386/x32-avx-avx512-linux \
-        mips-linux mips-dsp-linux \
+@@ -46,6 +46,7 @@
+ # List of .dat files to create in ../regformats/
+ WHICH = mips-linux mips-dsp-linux \
         microblaze-with-stack-protect \
 +       microblaze64-with-stack-protect \
         mips64-linux mips64-dsp-linux \
         nios2-linux \
         rs6000/powerpc-32 \
-@@ -135,7 +136,9 @@ XMLTOC = \
-        arm/arm-with-vfpv2.xml \
-        arm/arm-with-vfpv3.xml \
+@@ -107,7 +108,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH))
+ # to make on the command line.
+ XMLTOC = \
         microblaze-with-stack-protect.xml \
 +       microblaze64-with-stack-protect.xml \
         microblaze.xml \
@@ -318,7 +206,7 @@ index 3d84ca09a1..fdeec19753 100644
         mips-linux.xml \
         mips64-dsp-linux.xml \
 diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 88c93e5d66..5bc3e49f84 100644
+index f272650a41b..d1f2282fd1e 100644
 --- a/gdb/features/microblaze-core.xml
 +++ b/gdb/features/microblaze-core.xml
 @@ -8,7 +8,7 @@
@@ -343,24 +231,11 @@ index 88c93e5d66..5bc3e49f84 100644
    <reg name="rtlbsx" bitsize="32"/>
    <reg name="rtlblo" bitsize="32"/>
    <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index 870c148bb0..a7f27b903c 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="rslr" bitsize="32"/>
--  <reg name="rshr" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
++  <reg name="rslr" bitsize="32"/>
++  <reg name="rshr" bitsize="32"/>
  </feature>
 diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa19887..609934e2b4 100644
+index b39aa198874..ab162fd2588 100644
 --- a/gdb/features/microblaze-with-stack-protect.c
 +++ b/gdb/features/microblaze-with-stack-protect.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
@@ -381,19 +256,8 @@ index b39aa19887..609934e2b4 100644
    tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
 diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc0770..ceb98ca8b8 100644
+index 6c86fc07700..7919ac96e62 100644
 --- a/gdb/features/microblaze.c
 +++ b/gdb/features/microblaze.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
@@ -418,14 +282,14 @@ index 6c86fc0770..ceb98ca8b8 100644
    tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
  
    tdesc_microblaze = result;
  }
 diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
 new file mode 100644
-index 0000000000..96e99e2fb2
+index 00000000000..b9adadfade6
 --- /dev/null
 +++ b/gdb/features/microblaze64-core.xml
 @@ -0,0 +1,69 @@
@@ -495,12 +359,12 @@ index 0000000000..96e99e2fb2
 +  <reg name="rtlbsx" bitsize="32"/>
 +  <reg name="rtlblo" bitsize="32"/>
 +  <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
 new file mode 100644
-index 0000000000..1bbf5fc3ce
+index 00000000000..9d7ea8b9fd7
 --- /dev/null
 +++ b/gdb/features/microblaze64-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -513,12 +377,12 @@ index 0000000000..1bbf5fc3ce
 +
 +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
 +<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
 new file mode 100644
-index 0000000000..f448c9a749
+index 00000000000..249cb534daa
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.c
 @@ -0,0 +1,79 @@
@@ -596,14 +460,14 @@ index 0000000000..f448c9a749
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
 +
 +  feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64_with_stack_protect = result;
 +}
 diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
 new file mode 100644
-index 0000000000..0e9f01611f
+index 00000000000..0e9f01611f3
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -621,7 +485,7 @@ index 0000000000..0e9f01611f
 +</target>
 diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
 new file mode 100644
-index 0000000000..1aa37c4512
+index 00000000000..5d3e2c8cd91
 --- /dev/null
 +++ b/gdb/features/microblaze64.c
 @@ -0,0 +1,77 @@
@@ -697,14 +561,14 @@ index 0000000000..1aa37c4512
 +  tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64 = result;
 +}
 diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
 new file mode 100644
-index 0000000000..515d18e65c
+index 00000000000..515d18e65cf
 --- /dev/null
 +++ b/gdb/features/microblaze64.xml
 @@ -0,0 +1,11 @@
@@ -719,8 +583,55 @@ index 0000000000..515d18e65c
 +<target>
 +  <xi:include href="microblaze64-core.xml"/>
 +</target>
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index 0d5c08d24f6..a9a0eef3854 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ 
+   /* BFD target for core files.  */
+   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    }
+   else
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    }
++
++  switch (info.bfd_arch_info->mach)
++    {
++    case bfd_mach_microblaze64:
++      set_gdbarch_ptr_bit (gdbarch, 64);
++    break;
++    }
+ 
+ 
+   /* Shared library handling.  */
+@@ -177,6 +198,8 @@ void _initialize_microblaze_linux_tdep ();
+ void
+ _initialize_microblaze_linux_tdep ()
+ {
+-  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
++                         microblaze_linux_init_abi);
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
+                          microblaze_linux_init_abi);
+ }
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 49713ea9b1..0605283c9e 100644
+index 7462a1f7ce6..5dd0b3ea532 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -40,7 +40,9 @@
@@ -733,57 +644,34 @@ index 49713ea9b1..0605283c9e 100644
  
  /* Instruction macros used for analyzing the prologue.  */
  /* This set of instruction macros need to be changed whenever the
-@@ -75,12 +77,13 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "rslr", "rshr"
-+  "slr", "shr"
+@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
  };
  
  #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
- 
+-
++
  static unsigned int microblaze_debug_flag = 0;
-+int reg_size = 4;
++int MICROBLAZE_REGISTER_SIZE = 4;
  
  static void ATTRIBUTE_PRINTF (1, 2)
  microblaze_debug (const char *fmt, ...)
-@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs,
-   error (_("store_arguments not implemented"));
-   return sp;
- }
+@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
 +#if 0
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
                                     struct bp_target_info *bp_tgt)
-@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
--  struct cleanup *cleanup;
-+  //struct cleanup *cleanup;
+@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
  
-   /* Determine appropriate breakpoint contents and size for this address.  */
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-     error (_("Software breakpoints not implemented for this target."));
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  scoped_restore 
-+    cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    return val;
  }
- 
 +#endif
+ 
  /* Allocate and initialize a frame cache.  */
  
- static struct microblaze_frame_cache *
-@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
                                  gdb_byte *valbuf)
  {
    gdb_byte buf[8];
@@ -791,19 +679,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF.  */
    switch (TYPE_LENGTH (type))
      {
-       case 1:  /* return last byte in the register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
-+       memcpy(valbuf, buf + reg_size - 1, 1);
-        return;
-       case 2:  /* return last 2 bytes in register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
-+       memcpy(valbuf, buf + reg_size - 2, 2);
-        return;
-       case 4:  /* for sizes 4 or 8, copy the required length.  */
-       case 8:
-@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
    return (TYPE_LENGTH (type) == 16);
  }
  
@@ -915,16 +791,14 @@ index 49713ea9b1..0605283c9e 100644
 +}
 +#endif
 +
-+static void
-+microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
-+{
-+  regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
-+}
-+
  static int dwarf2_to_reg_map[78] =
  { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
    4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
-@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+   return -1;
+ }
+ 
++#if 0
  static void
  microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
  {
@@ -940,46 +814,27 @@ index 49713ea9b1..0605283c9e 100644
 -                                  tdesc_microblaze_with_stack_protect);
 +                                  tdesc_microblaze64_with_stack_protect);
  }
++#endif
  
  void
-@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ microblaze_supply_gregset (const struct regset *regset,
                          struct regcache *regcache,
                          int regnum, const void *gregs)
  {
--  unsigned int *regs = gregs;
+-  const unsigned int *regs = (const unsigned int *)gregs;
 +  const gdb_byte *regs = (const gdb_byte *) gregs;
    if (regnum >= 0)
--    regcache_raw_supply (regcache, regnum, regs + regnum);
-+    regcache->raw_supply (regnum, regs + regnum);
- 
-   if (regnum == -1) {
-     int i;
+     regcache->raw_supply (regnum, regs + regnum);
  
-     for (i = 0; i < 50; i++) {
--      regcache_raw_supply (regcache, i, regs + i);
-+      regcache->raw_supply (regnum, regs + i);
-     }
-   }
+@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
  }
-@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- }
- 
  
-+static void
-+make_regs (struct gdbarch *arch)
-+{
-+  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-+  int mach = gdbarch_bfd_arch_info (arch)->mach;
-+  
-+  if (mach == bfd_mach_microblaze64)
-+    {
-+      set_gdbarch_ptr_bit (arch, 64);
-+    }
-+}
  
+-
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    if (arches != NULL)
      return arches->gdbarch;
    if (tdesc == NULL)
@@ -989,7 +844,7 @@ index 49713ea9b1..0605283c9e 100644
 +      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) 
 +        {
 +         tdesc = tdesc_microblaze64;
-+          reg_size = 8;
++          MICROBLAZE_REGISTER_SIZE = 8;
 +       }
 +      else
 +       tdesc = tdesc_microblaze;
@@ -997,7 +852,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Check any target description for validity.  */
    if (tdesc_has_registers (tdesc))
      {
-@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        int valid_p;
        int i;
  
@@ -1038,7 +893,7 @@ index 49713ea9b1..0605283c9e 100644
          }
  
        if (!valid_p)
-@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            tdesc_data_cleanup (tdesc_data);
            return NULL;
          }
@@ -1046,7 +901,7 @@ index 49713ea9b1..0605283c9e 100644
      }
  
    /* Allocate space for the new architecture.  */
-@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    /* Register numbers of various important registers.  */
    set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); 
    set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); 
@@ -1064,7 +919,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Map Dwarf2 registers to GDB registers.  */
    set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
  
-@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
                                        microblaze_breakpoint::kind_from_pc);
    set_gdbarch_sw_breakpoint_from_kind (gdbarch,
                                        microblaze_breakpoint::bp_from_kind);
@@ -1082,21 +937,7 @@ index 49713ea9b1..0605283c9e 100644
  
    frame_base_set_default (gdbarch, &microblaze_frame_base);
  
-@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-     tdesc_use_registers (gdbarch, tdesc, tdesc_data);
-   //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
- 
--  /* If we have register sets, enable the generic core file support.  */
-+  /* If we have register sets, enable the generic core file support.  
-   if (tdep->gregset) {
-       set_gdbarch_regset_from_core_section (gdbarch,
-                                           microblaze_regset_from_core_section);
--  }
-+  }*/
- 
-   return gdbarch;
- }
-@@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void)
+@@ -841,6 +981,8 @@ _initialize_microblaze_tdep ()
  
    initialize_tdesc_microblaze_with_stack_protect ();
    initialize_tdesc_microblaze ();
@@ -1106,7 +947,7 @@ index 49713ea9b1..0605283c9e 100644
    add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
                              &microblaze_debug_flag, _("\
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 3777cbb6a8..55f5dd1962 100644
+index d2112dc07e1..bd03e969b9b 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -27,7 +27,7 @@ struct microblaze_gregset
@@ -1130,17 +971,18 @@ index 3777cbb6a8..55f5dd1962 100644
  };
  
  struct microblaze_frame_cache
-@@ -128,7 +128,7 @@ struct microblaze_frame_cache
+@@ -128,7 +128,8 @@ struct microblaze_frame_cache
    struct trad_frame_saved_reg *saved_regs;
  };
  /* All registers are 32 bits.  */
 -#define MICROBLAZE_REGISTER_SIZE 4
-+//#define MICROBLAZE_REGISTER_SIZE 8
++extern int microblaze_reg_size;
++#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
  
  /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
     Only used for native debugging.  */
 diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd..450e321d49 100644
+index 8040a7b3fd0..450e321d49e 100644
 --- a/gdb/regformats/microblaze-with-stack-protect.dat
 +++ b/gdb/regformats/microblaze-with-stack-protect.dat
 @@ -60,5 +60,5 @@ expedite:r1,rpc
@@ -1151,18 +993,6 @@ index 8040a7b3fd..450e321d49 100644
 -32:rshr
 +32:slr
 +32:shr
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index bd9d91cd57..12d4456bc2 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -134,7 +134,6 @@
- #define ORLI_MASK 0xA0000000
- #define XORLI_MASK 0xA8000000
- 
--
- /* New Mask for msrset, msrclr insns.  */
- #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
- /* Mask for mbar insn.  */
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
deleted file mode 100644
index 1a0153b8..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 07757f455d343beb50ac04815c77b04075bf9534 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 12 Dec 2019 14:56:17 +0530
-Subject: [PATCH 41/43] [patch,MicroBlaze] : porting GDB for linux
-
----
- gdb/features/microblaze-linux.xml | 12 ++++++++++
- gdb/gdbserver/Makefile.in         |  2 ++
- gdb/gdbserver/configure.srv       |  3 ++-
- gdb/microblaze-linux-tdep.c       | 39 ++++++++++++++++++++++++-------
- 4 files changed, 47 insertions(+), 9 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
-
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
-new file mode 100644
-index 0000000000..8983e66eb3
---- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
-+
-+     Copying and distribution of this file, with or without modification,
-+     are permitted in any medium without royalty provided the copyright
-+     notice and this notice are preserved.  -->
-+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+  <osabi>GNU/Linux</osabi>
-+  <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 45d95e6cab..7c8fa3c246 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -633,6 +633,8 @@ common/%.o: ../common/%.c
- 
- %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
-        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
- 
- #
- # Dependency tracking.
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index c421790bd0..6ad0ac9fa6 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,8 +210,9 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
--  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
-                        srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-+                       srv_xmlfiles="microblaze-linux.xml"
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 011e513941..e3d2a7508d 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -41,7 +41,7 @@
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--
-+int MICROBLAZE_REGISTER_SIZE=4;
- struct gdbarch;
- struct regcache;
- 
-@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
-        va_end (args);
-     }
- }
--
-+#if 0
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
-                                           struct bp_target_info *bp_tgt)
-@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   do_cleanups (cleanup);
-   return val;
- }
-+#endif
- 
- static void
- microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
-@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   linux_init_abi (info, gdbarch);
- 
--  set_gdbarch_memory_remove_breakpoint (gdbarch,
--                                       microblaze_linux_memory_remove_breakpoint);
-+//  set_gdbarch_memory_remove_breakpoint (gdbarch,
-+//                                     microblaze_linux_memory_remove_breakpoint);
- 
-   /* Shared library handling.  */
-   set_solib_svr4_fetch_link_map_offsets (gdbarch,
-@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   /* BFD target for core files.  */
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    }
-   else
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    }
- 
-+  switch (info.bfd_arch_info->mach)
-+    {
-+    case bfd_mach_microblaze64:
-+      set_gdbarch_ptr_bit (gdbarch, 64);
-+    break;
-+    }
- 
-   /* Shared library handling.  */
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-@@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- void
- _initialize_microblaze_linux_tdep (void)
- {
--  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
-+                         microblaze_linux_init_abi);
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
-                          microblaze_linux_init_abi);
- }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
deleted file mode 100644
index ad8dcb53..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From c2a4667e87bd610a48a6690fcc9fdc6761398bcf Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 19 Dec 2019 12:22:04 +0530
-Subject: [PATCH 42/43] Correcting the register names from slr & shr to rslr &
- rshr
-
----
- gdb/features/microblaze-core.xml               | 4 ++--
- gdb/features/microblaze-stack-protect.xml      | 4 ++--
- gdb/features/microblaze-with-stack-protect.c   | 4 ++--
- gdb/features/microblaze.c                      | 4 ++--
- gdb/features/microblaze64-core.xml             | 4 ++--
- gdb/features/microblaze64-stack-protect.xml    | 4 ++--
- gdb/features/microblaze64-with-stack-protect.c | 4 ++--
- gdb/features/microblaze64.c                    | 4 ++--
- gdb/microblaze-tdep.c                          | 2 +-
- 9 files changed, 17 insertions(+), 17 deletions(-)
-
-diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 5bc3e49f84..6f73f4eb84 100644
---- a/gdb/features/microblaze-core.xml
-+++ b/gdb/features/microblaze-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index a7f27b903c..870c148bb0 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index 609934e2b4..ab162fd258 100644
---- a/gdb/features/microblaze-with-stack-protect.c
-+++ b/gdb/features/microblaze-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index ceb98ca8b8..7919ac96e6 100644
---- a/gdb/features/microblaze.c
-+++ b/gdb/features/microblaze.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze = result;
- }
-diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
-index 96e99e2fb2..b9adadfade 100644
---- a/gdb/features/microblaze64-core.xml
-+++ b/gdb/features/microblaze64-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
-index 1bbf5fc3ce..9d7ea8b9fd 100644
---- a/gdb/features/microblaze64-stack-protect.xml
-+++ b/gdb/features/microblaze64-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze64.stack-protect">
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
-index f448c9a749..249cb534da 100644
---- a/gdb/features/microblaze64-with-stack-protect.c
-+++ b/gdb/features/microblaze64-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
-index 1aa37c4512..5d3e2c8cd9 100644
---- a/gdb/features/microblaze64.c
-+++ b/gdb/features/microblaze64.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64 = result;
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 0605283c9e..7a0c2527f4 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -77,7 +77,7 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "slr", "shr"
-+  "rslr", "rshr"
- };
- 
- #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
deleted file mode 100644
index 930e161c..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From 9562530bc48c76d8f824b8f4901ad90dd2969086 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Fri, 17 Jan 2020 15:45:48 +0530
-Subject: [PATCH 43/43] Removing the header "gdb_assert.h" from MB target file
-
----
- gdb/microblaze-linux-tdep.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e3d2a7508d..5ef937219c 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -37,7 +37,6 @@
- #include "linux-tdep.h"
- #include "glibc-tdep.h"
- 
--#include "gdb_assert.h"
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
deleted file mode 100644
index 29e198cd..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
+++ /dev/null
@@ -1,364 +0,0 @@
-From 4f0e06249d23629e1d56b296e7a040b6968484e9 Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@xilinx.com>
-Date: Mon, 20 Jan 2020 12:48:13 -0800
-Subject: [PATCH 44/45] gdb/microblaze-linux-nat.c: Fix target compilation of
- gdb
-
-Add the nat to the configure file
-
-Remove gdb_assert.h and gdb_string.h.
-
-Adjust include for opcodes as well.
-
-Update to match latest style of components, similar to ppc-linux-nat.c
-
-Update:
-  get_regcache_arch(regcache) to regcache->arch()
-  regcache_raw_supply(regcache, ...) to regcache->raw_supply(...)
-  regcache_raw_collect(regcache, ...) to regcache->raw_collect(...)
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
----
- gdb/configure.nat          |   4 +
- gdb/microblaze-linux-nat.c | 149 +++++++++++++------------------------
- gdb/microblaze-tdep.c      |   3 +-
- 3 files changed, 57 insertions(+), 99 deletions(-)
-
-diff --git a/gdb/configure.nat b/gdb/configure.nat
-index 3118263ac6..b8dc7398a5 100644
---- a/gdb/configure.nat
-+++ b/gdb/configure.nat
-@@ -260,6 +260,10 @@ case ${gdb_host} in
-                # Host: Motorola m68k running GNU/Linux.
-                NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o"
-                ;;
-+           microblaze*)
-+               # Host: Microblaze, running Linux
-+               NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o"
-+               ;;
-            mips)
-                # Host: Linux/MIPS
-                NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
-diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
-index e9b8c9c522..e09a86bb3f 100644
---- a/gdb/microblaze-linux-nat.c
-+++ b/gdb/microblaze-linux-nat.c
-@@ -36,11 +36,9 @@
- #include "dwarf2-frame.h"
- #include "osabi.h"
- 
--#include "gdb_assert.h"
--#include "gdb_string.h"
- #include "target-descriptions.h"
--#include "opcodes/microblaze-opcm.h"
--#include "opcodes/microblaze-dis.h"
-+#include "../opcodes/microblaze-opcm.h"
-+#include "../opcodes/microblaze-dis.h"
- 
- #include "linux-nat.h"
- #include "target-descriptions.h"
-@@ -61,34 +59,27 @@
- /* Defines ps_err_e, struct ps_prochandle.  */
- #include "gdb_proc_service.h"
- 
--/* On GNU/Linux, threads are implemented as pseudo-processes, in which
--   case we may be tracing more than one process at a time.  In that
--   case, inferior_ptid will contain the main process ID and the
--   individual thread (process) ID.  get_thread_id () is used to get
--   the thread id if it's available, and the process id otherwise.  */
--
--int
--get_thread_id (ptid_t ptid)
--{
--  int tid = TIDGET (ptid);
--  if (0 == tid)
--    tid = PIDGET (ptid);
--  return tid;
--}
--
--#define GET_THREAD_ID(PTID)    get_thread_id (PTID)
--
- /* Non-zero if our kernel may support the PTRACE_GETREGS and
-    PTRACE_SETREGS requests, for reading and writing the
-    general-purpose registers.  Zero if we've tried one of
-    them and gotten an error.  */
- int have_ptrace_getsetregs = 1;
- 
-+struct microblaze_linux_nat_target final : public linux_nat_target
-+{
-+  /* Add our register access methods.  */
-+  void fetch_registers (struct regcache *, int) override;
-+  void store_registers (struct regcache *, int) override;
-+
-+  const struct target_desc *read_description () override;
-+};
-+
-+static microblaze_linux_nat_target the_microblaze_linux_nat_target;
-+
- static int
- microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- {
-   int u_addr = -1;
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
-      interface, and not the wordsize of the program's ABI.  */
-   int wordsize = sizeof (long);
-@@ -105,18 +96,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- static void
- fetch_register (struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int bytes_transferred;
--  unsigned int offset;         /* Offset of registers within the u area.  */
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-   {
-     memset (buf, '\0', register_size (gdbarch, regno));   /* Supply zeroes */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-     return;
-   }
- 
-@@ -149,14 +138,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
-   {
-     /* Little-endian values are always found at the left end of the
-        bytes transferred.  */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values are found at the right end of the bytes
-        transferred.  */
-     size_t padding = (bytes_transferred - register_size (gdbarch, regno));
--    regcache_raw_supply (regcache, regno, buf + padding);
-+    regcache->raw_supply (regno, buf + padding);
-   }
-   else
-     internal_error (__FILE__, __LINE__,
-@@ -175,8 +164,6 @@ fetch_register (struct regcache *regcache, int tid, int regno)
- static int
- fetch_all_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -204,8 +191,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid)
- static void
- fetch_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -219,17 +204,29 @@ fetch_gp_regs (struct regcache *regcache, int tid)
-     fetch_register (regcache, tid, i);
- }
- 
-+/* Fetch registers from the child process.  Fetch all registers if
-+   regno == -1, otherwise fetch all general registers or all floating
-+   point registers depending upon the value of regno.  */
-+void
-+microblaze_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
-+{
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
-+
-+  if (regno == -1)
-+    fetch_gp_regs (regcache, tid);
-+  else
-+    fetch_register (regcache, tid, regno);
-+}
- 
- static void
- store_register (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int i;
-   size_t bytes_to_transfer;
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-     return;
-@@ -242,13 +239,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
-   {
-     /* Little-endian values always sit at the left end of the buffer.  */
--    regcache_raw_collect (regcache, regno, buf);
-+    regcache->raw_collect (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values sit at the right end of the buffer.  */
-     size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
--    regcache_raw_collect (regcache, regno, buf + padding);
-+    regcache->raw_collect (regno, buf + padding);
-   }
- 
-   for (i = 0; i < bytes_to_transfer; i += sizeof (long))
-@@ -281,8 +278,6 @@ store_register (const struct regcache *regcache, int tid, int regno)
- static int
- store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -319,8 +314,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- static void
- store_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -335,33 +328,10 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno)
- }
- 
- 
--/* Fetch registers from the child process.  Fetch all registers if
--   regno == -1, otherwise fetch all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
--{
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
--
--  if (regno == -1)
--    fetch_gp_regs (regcache, tid);
--  else
--    fetch_register (regcache, tid, regno);
--}
--
--/* Store registers back into the inferior.  Store all registers if
--   regno == -1, otherwise store all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_store_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
-+void
-+microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno)
- {
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
- 
-   if (regno >= 0)
-     store_register (regcache, tid, regno);
-@@ -373,59 +343,44 @@ microblaze_linux_store_inferior_registers (struct target_ops *ops,
-    thread debugging.  */
- 
- void
--fill_gregset (const struct regcache *regcache,
--             gdb_gregset_t *gregsetp, int regno)
-+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
- {
--  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
-+  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
- }
- 
- void
--supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
-+fill_gregset (const struct regcache *regcache,
-+             gdb_gregset_t *gregsetp, int regno)
- {
--  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
-+  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
- }
- 
- void
--fill_fpregset (const struct regcache *regcache,
--             gdb_fpregset_t *fpregsetp, int regno)
-+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
- {
-   /* FIXME. */
-+  return;
- }
- 
- void
--supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
-+fill_fpregset (const struct regcache *regcache,
-+             gdb_fpregset_t *fpregsetp, int regno)
- {
-   /* FIXME. */
-+  return;
- }
- 
--static const struct target_desc *
--microblaze_linux_read_description (struct target_ops *ops)
-+const struct target_desc *
-+microblaze_linux_nat_target::read_description ()
- {
--  CORE_ADDR microblaze_hwcap = 0;
--
--  if (target_auxv_search (ops, AT_HWCAP, &microblaze_hwcap) != 1)
--    return NULL;
--
-   return NULL;
- }
- 
--
--void _initialize_microblaze_linux_nat (void);
--
- void
- _initialize_microblaze_linux_nat (void)
- {
--  struct target_ops *t;
--
--  /* Fill in the generic GNU/Linux methods.  */
--  t = linux_target ();
--
--  /* Add our register access methods.  */
--  t->to_fetch_registers = microblaze_linux_fetch_inferior_registers;
--  t->to_store_registers = microblaze_linux_store_inferior_registers;
--
--  t->to_read_description = microblaze_linux_read_description;
-+  linux_target = &the_microblaze_linux_nat_target;
- 
-   /* Register the target.  */
--  linux_nat_add_target (t);
-+  add_inf_child_target (linux_target);
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 7a0c2527f4..23deb24d26 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -657,7 +657,7 @@ static std::vector<CORE_ADDR>
- microblaze_software_single_step (struct regcache *regcache)
- {
- //  struct gdbarch *arch = get_frame_arch(frame);
--  struct gdbarch *arch = get_regcache_arch (regcache);
-+  struct gdbarch *arch = regcache->arch();
-   struct address_space *aspace = get_regcache_aspace (regcache);
- //  struct address_space *aspace = get_frame_address_space (frame);
-   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-@@ -876,7 +876,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- static void
- make_regs (struct gdbarch *arch)
- {
--  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-   int mach = gdbarch_bfd_arch_info (arch)->mach;
-   
-   if (mach == bfd_mach_microblaze64)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
deleted file mode 100644
index 7677ab35..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 9c8f4f1c11d324f0788da3a077b06c6bc9e6f2b8 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 16 Apr 2020 18:08:58 +0530
-Subject: [PATCH]  [Patch,MicroBlaze m64] : This patch will remove imml 0 and
- imml -1 instructions when the offset is less than 16 bit for Type A branch EA
- instructions.
-
----
- gas/config/tc-microblaze.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 088eae73a9..12fd145a03 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,9 +2150,7 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
--                streq (name, "breaid") || 
--                streq (name, "brai") || streq (name, "braid")))
-+          if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
-             opc = NULL;
-@@ -2920,7 +2918,7 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
-       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
--            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
-         {
-           /* Generate the imm instruction.  */
-            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch
deleted file mode 100644
index 93314594..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 2ab2547493c871b452adb2cb8754691b0adf5f03 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 19 Apr 2020 21:17:03 +0530
-Subject: [PATCH 47/49] [Patch,MicroBlaze] : commit for triggering build to
- remove imml for Type A BEA insns.
-
----
- gas/config/tc-microblaze.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 12fd145a03..7ae0dbc018 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,6 +2150,7 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
-+/* removal imml 0 and imml -1 for bea type A insns */
-           if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch
deleted file mode 100644
index 30fbbe7b..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 9b61edf44e44303f1937e98a02a7d78f750a9b24 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 30 Apr 2020 19:40:16 +0530
-Subject: [PATCH 48/49] [Patch,MicroBlaze] : Adding more description to the
- imml removal for bea type B insns.
-
----
- gas/config/tc-microblaze.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 7ae0dbc018..1d37af54bf 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2150,7 +2150,8 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--/* removal imml 0 and imml -1 for bea type A insns */
-+/* removal of imml 0 and imml -1 for bea type A insns.
-+if offset is 16 bit then imml instructions are redundant */
-           if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
deleted file mode 100644
index b751f294..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ba660177916ffb8a0a9882c27246a201dbc218bd Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Jun 2020 21:20:26 +0530
-Subject: [PATCH 49/49] [Patch,MicroBlaze] : improper address mapping of
- PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't
- need to override PROVIDE symbols if symbols are defined in libraries and
- linker so I am disabling override for PROVIDE symbols.
-
----
- ld/ldlang.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/ld/ldlang.c b/ld/ldlang.c
-index 33f6bda292..a0b404c04d 100644
---- a/ld/ldlang.c
-+++ b/ld/ldlang.c
-@@ -3559,10 +3559,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
-            plugin_insert = NULL;
- #endif
-          break;
-+         /* This is from a --defsym on the command line.  */
-        case lang_assignment_statement_enum:
--         if (s->assignment_statement.exp->type.node_class != etree_assert)
--           exp_fold_tree_no_dot (s->assignment_statement.exp);
--         break;
-+          if (s->assignment_statement.exp->type.node_class != etree_assert)
-+          {
-+          if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
-+          ;
-+          else
-+          exp_fold_tree_no_dot (s->assignment_statement.exp);
-+          }
-+          break;
-        default:
-          break;
-        }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch
deleted file mode 100644
index 9469732e..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-Fix a possible compilation issue on i386 when using microblaze patches
-
-Due to patch 0019, a later item may need to refer to this table.
-
-| ../../gas/config/tc-i386.c:1155:20: error: conflicting types for ‘md_pseudo_table’
-| const pseudo_typeS md_pseudo_table[] =
-|           ^~~~~~~~~~~~~~~
-| In file included from ../../gas/as.h:565:0,
-|         from ../../gas/config/tc-i386.c:28:
-| ../../gas/tc.h:25:21: note: previous declaration of ‘md_pseudo_table’ was here
-| extern pseudo_typeS md_pseudo_table[];
-|           ^~~~~~~~~~~~~~~
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
-
-Index: git/gas/config/tc-i386.c
-===================================================================
---- git.orig/gas/config/tc-i386.c
-+++ git/gas/config/tc-i386.c
-@@ -1152,7 +1152,7 @@ pe_lcomm (int needs_align)
- }
- #endif
- 
--const pseudo_typeS md_pseudo_table[] =
-+pseudo_typeS md_pseudo_table[] =
- {
- #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
-   {"align", s_align_bytes, 0},
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
index 28247daa..af5a65cb 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
@@ -1,35 +1,29 @@
-From 23e6126392ab228c1d6483c02ffc32b15f00777e Mon Sep 17 00:00:00 2001
+From d2ebb14b318166dd91fe35bf3531d758dcbc995a Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 13:13:57 +0530
-Subject: [PATCH 01/63] LOCAL]: Testsuite - builtins tests require fpic
- Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+Subject: [PATCH 01/58] [LOCAL]: Testsuite - builtins tests require fpic
 
-Conflicts:
-
-        gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
- gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 8 ++++++++
- 1 file changed, 8 insertions(+)
+ gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 5 +++++
+ 1 file changed, 5 insertions(+)
 
 diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index acb9eac..363ce07 100644
+index 594c9297958..4103d43748d 100644
 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-@@ -48,6 +48,14 @@ if { [istarget *-*-eabi*]
+@@ -48,6 +48,11 @@ if { [istarget *-*-eabi*]
     lappend additional_flags "-Wl,--allow-multiple-definition"
  }
  
-+<<<<<<< HEAD
-+=======
 +if [istarget "microblaze*-*-linux*"] {
 +   lappend additional_flags "-Wl,-zmuldefs"
 +   lappend additional_flags "-fPIC"
 +}
 +
-+>>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic
  foreach src [lsort [find $srcdir/$subdir *.c]] {
      if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
         c-torture-execute [list $src \
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
index 8e4a2a32..976896da 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
@@ -1,10 +1,11 @@
-From e9c8884f473eae307945ceabaa1ff03278236c23 Mon Sep 17 00:00:00 2001
+From 54394232ffbaa9474f8a78c6882f08a48842242e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 14:31:10 +0530
-Subject: [PATCH 02/63] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This
- particular testcase fails with a timeout. Instead, fail it at compile-time
- for microblaze. This speeds up the testsuite without removing it from the
- FAIL reports.
+Subject: [PATCH 02/58] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C
+
+This particular testcase fails with a timeout. Instead, fail it
+at compile-time for microblaze. This speeds up the testsuite without
+removing it from the FAIL reports.
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -12,7 +13,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
  1 file changed, 4 insertions(+)
 
 diff --git a/gcc/testsuite/g++.dg/opt/memcpy1.C b/gcc/testsuite/g++.dg/opt/memcpy1.C
-index 3862756..db9f990 100644
+index 3862756083d..db9f990f781 100644
 --- a/gcc/testsuite/g++.dg/opt/memcpy1.C
 +++ b/gcc/testsuite/g++.dg/opt/memcpy1.C
 @@ -4,6 +4,10 @@
@@ -27,5 +28,5 @@ index 3862756..db9f990 100644
  typedef uint8_t uint8;
  __extension__ typedef __SIZE_TYPE__ size_t;
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch
index ef994457..8e6d22db 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch
@@ -1,14 +1,12 @@
-From fb4b4d4ecba04859d52a653d7c453df92014dc38 Mon Sep 17 00:00:00 2001
+From f0a446bcb453630d8116b30f542aee79407228ea Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 15:28:38 +0530
-Subject: [PATCH 03/63] [LOCAL]: Testsuite - explicitly add -fivopts for tests
- that depend on it (test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt
- exist in 4.6 branch)
+Subject: [PATCH 03/58] [LOCAL]: Testsuite - explicitly add -fivopts for tests
+ that depend on it
 
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+(test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt exist in 4.6 branch)
 
-Conflicts:
-        gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
  gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C   | 2 +-
  gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C   | 2 +-
@@ -21,7 +19,7 @@ Conflicts:
  8 files changed, 8 insertions(+), 8 deletions(-)
 
 diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-index 438db88..ede883e 100644
+index 438db882043..ede883eb284 100644
 --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
 +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
 @@ -1,5 +1,5 @@
@@ -32,7 +30,7 @@ index 438db88..ede883e 100644
  void test (int *b, int *e, int stride)
    {
 diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-index 07ff1b7..a09710c 100644
+index cbb6c850baa..34248021c23 100644
 --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
 +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
 @@ -1,5 +1,5 @@
@@ -43,7 +41,7 @@ index 07ff1b7..a09710c 100644
  class MinimalVec3
  {
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-index bda2516..22c8a5d 100644
+index bda25167353..22c8a5dcffe 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
 @@ -1,7 +1,7 @@
@@ -56,7 +54,7 @@ index bda2516..22c8a5d 100644
  
  /* Size of this structure should be sufficiently weird so that no memory
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-index f0770ab..65d74c8 100644
+index f0770abdbbc..65d74c8e620 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
 @@ -1,7 +1,7 @@
@@ -69,7 +67,7 @@ index f0770ab..65d74c8 100644
  
  /* Size of this structure should be sufficiently weird so that no memory
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-index 5f42857..9bc86ee 100644
+index 5f42857fe13..9bc86ee0d23 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
 @@ -1,7 +1,7 @@
@@ -82,7 +80,7 @@ index 5f42857..9bc86ee 100644
  void foo(long);
  
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-index 50d86a0..1e3eacd 100644
+index 50d86a00485..1e3eacd33d1 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
 @@ -1,5 +1,5 @@
@@ -93,7 +91,7 @@ index 50d86a0..1e3eacd 100644
  
  void
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-index 2c6cfc6..648e6e6 100644
+index 2c6cfc6f831..648e6e67e80 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
 @@ -1,5 +1,5 @@
@@ -104,7 +102,7 @@ index 2c6cfc6..648e6e6 100644
  void vnum_test8(int *data) 
  { 
 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-index e911bfc..5d3e7e0 100644
+index e911bfcd521..5d3e7e0801a 100644
 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
 +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
 @@ -1,5 +1,5 @@
@@ -115,5 +113,5 @@ index e911bfc..5d3e7e0 100644
  /* Slightly changed testcase from PR middle-end/40815.  */
  void bar(char*, char*, int);
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
index a575b518..4974462c 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
@@ -1,35 +1,30 @@
-From 38022a87b01cf2e36b605d4f6d0faab22a0d2f44 Mon Sep 17 00:00:00 2001
+From f8809fdebc3ef3927695c84224d3446fa13447d6 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 15:46:28 +0530
-Subject: [PATCH 04/63] [LOCAL]: For dejagnu static testing on qemu, suppress
- warnings about multiple definitions from the test function and libc in line
- with method used by powerpc. Dynamic linking and using a qemu binary which
- understands sysroot resolves all test failures with builtins
+Subject: [PATCH 04/58] [LOCAL]: For dejagnu static testing on qemu, suppress
+ warnings
+
+about multiple definitions from the test function and libc in line
+with method used by powerpc. Dynamic linking and using a qemu binary
+which understands sysroot resolves all test failures with builtins
 
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
- gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ----
- 1 file changed, 4 deletions(-)
+ gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 1 -
+ 1 file changed, 1 deletion(-)
 
 diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index 363ce07..56b1a9a 100644
+index 4103d43748d..d7c9b281d01 100644
 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
 +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-@@ -48,14 +48,10 @@ if { [istarget *-*-eabi*]
-    lappend additional_flags "-Wl,--allow-multiple-definition"
- }
+@@ -50,7 +50,6 @@ if { [istarget *-*-eabi*]
  
--<<<<<<< HEAD
--=======
  if [istarget "microblaze*-*-linux*"] {
     lappend additional_flags "-Wl,-zmuldefs"
 -   lappend additional_flags "-fPIC"
  }
  
-->>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic
  foreach src [lsort [find $srcdir/$subdir *.c]] {
-     if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
-        c-torture-execute [list $src \
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
index 18fd6dec..c21492e8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
@@ -1,8 +1,8 @@
-From a7dfb5f158f16f88b30aabe903c4fb088889eeef Mon Sep 17 00:00:00 2001
+From 802078fa3e76ea7fdb29f3baf1d4d9baae42bc0b Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 15:50:35 +0530
-Subject: [PATCH 05/63] [Patch, testsuite]: Add MicroBlaze to target-supports
- for atomic buil. .tin tests
+Subject: [PATCH 05/58] [Patch, testsuite]: Add MicroBlaze to target-supports
+ for atomic builtin tests
 
 MicroBlaze added to supported targets for atomic builtin tests.
 
@@ -19,10 +19,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index cda0f3d..0a69659e 100644
+index 13761491e63..d2f65dac32c 100644
 --- a/gcc/testsuite/lib/target-supports.exp
 +++ b/gcc/testsuite/lib/target-supports.exp
-@@ -6829,6 +6829,7 @@ proc check_effective_target_sync_int_long { } {
+@@ -7581,6 +7581,7 @@ proc check_effective_target_sync_int_long { } {
                  && [check_effective_target_arm_acq_rel])
              || [istarget bfin*-*linux*]
              || [istarget hppa*-*linux*]
@@ -31,5 +31,5 @@ index cda0f3d..0a69659e 100644
              || [istarget powerpc*-*-*]
              || [istarget crisv32-*-*] || [istarget cris-*-*]
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch
deleted file mode 100644
index b428d121..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 7f0a129701ce9809d79ea4618f3293062bd24bbf Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sat, 26 Aug 2017 19:21:18 -0700
-Subject: [PATCH] Testsuite - explicitly add -fivopts for tests that depend on
- it
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com>
-Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
-Upstream-Status: Pending
----
- gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C   | 2 +-
- gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C   | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-2.c     | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-4.c     | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-5.c     | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c  | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/pr19590.c    | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +-
- 8 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-index 438db88204..ede883eb28 100644
---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-@@ -1,5 +1,5 @@
- /* { dg-do compile { target { i?86-*-* x86_64-*-*  } } } */
--/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
-+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */
- 
- void test (int *b, int *e, int stride)
-   {
-diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-index eb72581390..02f3ea4a7d 100644
---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-@@ -1,5 +1,5 @@
- // { dg-do compile }
--// { dg-options "-O2 -fdump-tree-ivopts-details" }
-+// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" }
- 
- class MinimalVec3
- {
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-index bda2516735..22c8a5dcff 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-@@ -1,7 +1,7 @@
- /* A test for strength reduction and induction variable elimination.  */
- 
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
- /* { dg-require-effective-target size32plus } */
- 
- /* Size of this structure should be sufficiently weird so that no memory
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-index f0770abdbb..65d74c8e62 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-@@ -1,7 +1,7 @@
- /* A test for strength reduction and induction variable elimination.  */
- 
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
- /* { dg-require-effective-target size32plus } */
- 
- /* Size of this structure should be sufficiently weird so that no memory
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-index 5f42857fe1..9bc86ee0d2 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-@@ -1,7 +1,7 @@
- /* A test for induction variable merging.  */
- 
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
- 
- void foo(long);
- 
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-index 3c8ee06016..db192a657f 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-O2 -Wunsafe-loop-optimizations" } */
-+/* { dg-options "-O2 -fivopts -Wunsafe-loop-optimizations" } */
- extern void g(void);
- 
- void
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-index 2c6cfc6f83..648e6e67e8 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-O2 -fdump-tree-ivopts" } */
-+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */
- 
- void vnum_test8(int *data) 
- { 
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-index e911bfcd52..5d3e7e0801 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-Os -fdump-tree-optimized" } */
-+/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */
- 
- /* Slightly changed testcase from PR middle-end/40815.  */
- void bar(char*, char*, int);
--- 
-2.14.2
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch
index e4a86dc4..9c8cce92 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch
@@ -1,8 +1,9 @@
-From e23b1a424cfd852f7a33f29c0b80d867ca533c3b Mon Sep 17 00:00:00 2001
+From 8c24cb4f95f46793ac7500a5d6181d93f2b0d2c5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 11 Jan 2017 16:20:01 +0530
-Subject: [PATCH 06/63] [Patch, testsuite]: Update MicroBlaze strings test for
- new scan-assembly output resulting in use of $LC label
+Subject: [PATCH 06/58] [Patch, testsuite]: Update MicroBlaze strings test
+
+for new scan-assembly output resulting in use of $LC label
 
 ChangeLog/testsuite
 
@@ -17,7 +18,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/testsuite/gcc.target/microblaze/others/strings1.c b/gcc/testsuite/gcc.target/microblaze/others/strings1.c
-index 7a63faf..0403b7b 100644
+index 7a63faf79f2..0403b7bdca9 100644
 --- a/gcc/testsuite/gcc.target/microblaze/others/strings1.c
 +++ b/gcc/testsuite/gcc.target/microblaze/others/strings1.c
 @@ -1,13 +1,15 @@
@@ -39,5 +40,5 @@ index 7a63faf..0403b7b 100644
      somefunc (string2);
  }
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
index 8c43de05..4d1e2017 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
@@ -1,9 +1,11 @@
-From c210044f15df2433438b6b74e5c2bcf79458c2e4 Mon Sep 17 00:00:00 2001
+From 38ece4b2dc5d34c1b88b6ea8dd8e62a0986f8f6c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:14:15 +0530
-Subject: [PATCH 07/63] [Patch, testsuite]: Allow MicroBlaze .weakext pattern
- in regex match Extend regex pattern to include optional ext at the end of
- .weak to match the MicroBlaze weak label .weakext
+Subject: [PATCH 07/58] [Patch, testsuite]: Allow MicroBlaze .weakext pattern
+ in regex match
+
+Extend regex pattern to include optional ext at the end of
+.weak to match the MicroBlaze weak label .weakext
 
 ChangeLog/testsuite
 
@@ -25,7 +27,7 @@ Conflicts:
  3 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C
-index 0cc7d3e..f284cd9 100644
+index 0cc7d3e79d0..f284cd9255c 100644
 --- a/gcc/testsuite/g++.dg/abi/rtti3.C
 +++ b/gcc/testsuite/g++.dg/abi/rtti3.C
 @@ -3,8 +3,8 @@
@@ -40,7 +42,7 @@ index 0cc7d3e..f284cd9 100644
  // { dg-final { scan-assembler-not ".weak_definition\[ \t\]_?_ZTIPP1A" { target { *-*-darwin* } } } }
  
 diff --git a/gcc/testsuite/g++.dg/abi/thunk3.C b/gcc/testsuite/g++.dg/abi/thunk3.C
-index f2347f7..dcec8a7 100644
+index f2347f79ecd..dcec8a771a1 100644
 --- a/gcc/testsuite/g++.dg/abi/thunk3.C
 +++ b/gcc/testsuite/g++.dg/abi/thunk3.C
 @@ -1,5 +1,5 @@
@@ -51,7 +53,7 @@ index f2347f7..dcec8a7 100644
  
  struct Base 
 diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C
-index 6e8f124..d1d34fe 100644
+index 6e8f124bc5e..d1d34fe1e4a 100644
 --- a/gcc/testsuite/g++.dg/abi/thunk4.C
 +++ b/gcc/testsuite/g++.dg/abi/thunk4.C
 @@ -1,6 +1,6 @@
@@ -63,5 +65,5 @@ index 6e8f124..d1d34fe 100644
  
  struct Base 
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
index d02be316..f96d7d57 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
@@ -1,10 +1,11 @@
-From 283d8576d2599b3c38814e7c70e3f36ed51df9da Mon Sep 17 00:00:00 2001
+From bc5f423bcfa24aa8c15548379bfc6b3f49e57c15 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:34:27 +0530
-Subject: [PATCH 08/63] [Patch, testsuite]: Add MicroBlaze to
- check_profiling_available Testsuite, add microblaze*-*-* target in
- check_profiling_available inline with other archs setting
- profiling_available_saved to 0
+Subject: [PATCH 08/58] [Patch, testsuite]: Add MicroBlaze to
+ check_profiling_available
+
+Testsuite, add microblaze*-*-* target in check_profiling_available
+inline with other archs setting profiling_available_saved to 0
 
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
@@ -12,10 +13,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index 0a69659e..d47819c 100644
+index d2f65dac32c..d949fbd8464 100644
 --- a/gcc/testsuite/lib/target-supports.exp
 +++ b/gcc/testsuite/lib/target-supports.exp
-@@ -678,6 +678,7 @@ proc check_profiling_available { test_what } {
+@@ -707,6 +707,7 @@ proc check_profiling_available { test_what } {
              || [istarget m68k-*-elf]
              || [istarget m68k-*-uclinux*]
              || [istarget mips*-*-elf*]
@@ -24,5 +25,5 @@ index 0a69659e..d47819c 100644
              || [istarget mn10300-*-elf*]
              || [istarget moxie-*-elf*]
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch
index ae24c080..45d93cee 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch
@@ -1,11 +1,12 @@
-From 1905061b279e6fe5fd9861fc490fd4075edac4a8 Mon Sep 17 00:00:00 2001
+From eeeb8ecda7cb71c033c850ce36162c92c7d0b781 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:41:43 +0530
-Subject: [PATCH 09/63] [Patch, microblaze]: Fix atomic side effects. In
- atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions
- during optimization. Previously, the outputs were considered unused; this
- generated assembly code with undefined side effects after invocation of the
- atomic.
+Subject: [PATCH 09/58] [Patch, microblaze]: Fix atomic side effects.
+
+In atomic_compare_and_swapsi, add side effects to prevent incorrect
+assumptions during optimization. Previously, the outputs were
+considered unused; this generated assembly code with
+undefined side effects after invocation of the atomic.
 
 Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
@@ -18,7 +19,7 @@ Conflicts:
  2 files changed, 16 insertions(+), 8 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 183afff..7a40c53 100644
+index 7049acd1dcd..eba2776ae56 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -43,6 +43,9 @@
@@ -32,7 +33,7 @@ index 183afff..7a40c53 100644
  
  (define_c_enum "unspec" [
 diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
-index 6f16ca6..bebab5c 100644
+index 76f530b9d3b..24cd67e1fdb 100644
 --- a/gcc/config/microblaze/sync.md
 +++ b/gcc/config/microblaze/sync.md
 @@ -18,14 +18,19 @@
@@ -64,5 +65,5 @@ index 6f16ca6..bebab5c 100644
    ""
    {
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch
index 07a43177..48f77215 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch
@@ -1,9 +1,11 @@
-From 65bc1969bd652df4bf9d01d30547a947da293550 Mon Sep 17 00:00:00 2001
+From 834448fc3493be56cc6a4f6b504569142f7f6070 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:45:45 +0530
-Subject: [PATCH 10/63] [Patch, microblaze]: Fix atomic boolean return value.
- In atomic_compare_and_swapsi, fix boolean return value. Previously, it
- contained zero if successful and non-zero if unsuccessful.
+Subject: [PATCH 10/58] [Patch, microblaze]: Fix atomic boolean return value.
+
+In atomic_compare_and_swapsi, fix boolean return value.
+Previously, it contained zero if successful and non-zero
+if unsuccessful.
 
 Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
@@ -12,7 +14,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 4 insertions(+), 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
-index bebab5c..72eac09 100644
+index 24cd67e1fdb..76c3616c992 100644
 --- a/gcc/config/microblaze/sync.md
 +++ b/gcc/config/microblaze/sync.md
 @@ -34,15 +34,16 @@
@@ -36,5 +38,5 @@ index bebab5c..72eac09 100644
    }
  )
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
index b9ba239f..e60e6f2f 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
@@ -1,13 +1,14 @@
-From 4e4409f10b450ec9254e69445ffeb8d116906d16 Mon Sep 17 00:00:00 2001
+From 19457459592123c41c3ce9e084e165525e4d7bb0 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:50:17 +0530
-Subject: [PATCH 11/63] [Patch, microblaze]: Fix the Microblaze crash with
- msmall-divides flag Compiler is crashing when we use msmall-divides and
- mxl-barrel-shift flag. This is because when use above flags
- microblaze_expand_divide function will be called for division operation. In
- microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't
- have subreg register due to this compiler was crashing. Changed the logic to
- avoid sub_reg call
+Subject: [PATCH 11/58] [Patch, microblaze]: Fix the Microblaze crash with
+ msmall-divides flag
+
+Compiler is crashing when we use msmall-divides and mxl-barrel-shift flag.
+This is because when use above flags microblaze_expand_divide function will be
+called for division operation. In microblaze_expand_divide function we are
+using sub_reg but MicroBlaze doesn't have subreg register due to this compiler
+was crashing. Changed the logic to avoid sub_reg call
 
 Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -15,10 +16,10 @@ Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 55c1bec..ae45038 100644
+index a0f81b71391..0186171c04c 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -3715,8 +3715,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3709,8 +3709,7 @@ microblaze_expand_divide (rtx operands[])
    mem_rtx = gen_rtx_MEM (QImode,
                              gen_rtx_PLUS (Pmode, regt1, div_table_rtx));
  
@@ -29,5 +30,5 @@ index 55c1bec..ae45038 100644
    JUMP_LABEL (jump) = div_end_label;
    LABEL_NUSES (div_end_label) = 1; 
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
index fc47bae6..b9e39928 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
@@ -1,10 +1,11 @@
-From 6dbeb53f0185dd587ece39d624d193768633a7ab Mon Sep 17 00:00:00 2001
+From 9da28a01ffb778fc5cb5df27332cef21f890a63f Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 16:52:56 +0530
-Subject: [PATCH 12/63] [Patch, microblaze]: Added ashrsi3_with_size_opt Added
- ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os
- optimization is used. lshrsi3_with_size_opt is being removed as it has
- conflicts with unsigned int variables
+Subject: [PATCH 12/58] [Patch, microblaze]: Added ashrsi3_with_size_opt
+
+Added ashrsi3_with_size_opt pattern to optimize the sra instructions
+when the -Os optimization is used. lshrsi3_with_size_opt is
+being removed as it has conflicts with unsigned int variables
 
 Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
 ---
@@ -12,7 +13,7 @@ Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
  1 file changed, 21 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 7a40c53..3d2636e 100644
+index eba2776ae56..187ad522dcc 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1508,6 +1508,27 @@
@@ -44,5 +45,5 @@ index 7a40c53..3d2636e 100644
    [(set (match_operand:SI 0 "register_operand" "=&d")
         (ashiftrt:SI (match_operand:SI 1 "register_operand"  "d")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch
deleted file mode 100644
index 3b4b4c70..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 53ab5a3fec283aeb9d2efeb632d423b774192e65 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 12 Jan 2017 17:50:03 +0530
-Subject: [PATCH 13/63] [Patch, microblaze]: Fixed missing save of r18 in
- fast_interrupt. Register 18 is used as a clobber register, and must be stored
- when entering a fast_interrupt. Before this fix, register 18 was only saved
- if it was used directly in the interrupt function.
-
-However, if the fast_interrupt function called a function that used
-r18, the register would not be saved, and thus be mangled
-upon returning from the interrupt.
-
-Changelog
-
-2014-02-27  Klaus Petersen <klauspetersen@gmail.com>
-
- * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in
-   microblaze_must_save_register.
-
-Signed-off-by: Klaus Petersen <klauspetersen@gmail.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gcc/config/microblaze/microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index ae45038..c834b49 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -2043,7 +2043,7 @@ microblaze_must_save_register (int regno)
-     {
-       if (df_regs_ever_live_p (regno) 
-          || regno == MB_ABI_MSR_SAVE_REG
--         || (interrupt_handler
-+         || ((interrupt_handler || fast_interrupt)
-               && (regno == MB_ABI_ASM_TEMP_REGNUM
-                  || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM)))
-        return 1;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch
index 889a1e69..36af2652 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch
@@ -1,15 +1,15 @@
-From cbf1854e3569122ee1143e6716ff68275c26aced Mon Sep 17 00:00:00 2001
+From 07a5c8b22a1cef99b2d4570ea080c503260161e4 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 10:57:19 +0530
-Subject: [PATCH 14/63] [Patch, microblaze]: Use bralid for profiler calls
- Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+Subject: [PATCH 13/58] [Patch, microblaze]: Use bralid for profiler calls
 
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
  gcc/config/microblaze/microblaze.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index fa0806e..0a435b8 100644
+index dc112f5301f..8aa3f155790 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -486,7 +486,7 @@ typedef struct microblaze_args
@@ -22,5 +22,5 @@ index fa0806e..0a435b8 100644
   }
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Disable-fivopts-by-default.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch
index 0ada80eb..51563ecb 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Disable-fivopts-by-default.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch
@@ -1,8 +1,9 @@
-From 604cae83ce9d2942568178966f69614acbbcbefd Mon Sep 17 00:00:00 2001
+From 616f16089f0b01ab02008d7291df0972a99782e0 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 11:10:21 +0530
-Subject: [PATCH 15/63] [Patch, microblaze]: Disable fivopts by default Turn
- off ivopts by default. Interferes with cse.
+Subject: [PATCH 14/58] [Patch, microblaze]: Disable fivopts by default
+
+Turn off ivopts by default. Interferes with cse.
 
 Changelog
 
@@ -18,7 +19,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index c30bdef..9b6ef21 100644
+index 4391f939626..0b9d5a1b453 100644
 --- a/gcc/common/config/microblaze/microblaze-common.c
 +++ b/gcc/common/config/microblaze/microblaze-common.c
 @@ -24,6 +24,15 @@
@@ -38,5 +39,5 @@ index c30bdef..9b6ef21 100644
  #define TARGET_DEFAULT_TARGET_FLAGS    TARGET_DEFAULT
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch
index 87bc1668..e7fb9393 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Removed-moddi3-routinue.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch
@@ -1,28 +1,29 @@
-From 14ddb3217fbb84c48903124ec6a3614b4707630d Mon Sep 17 00:00:00 2001
+From c2a6652176751bc95e2f990179e90cfe58026feb Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Thu, 12 Jan 2017 17:36:16 +0530
-Subject: [PATCH 16/63] [Patch, microblaze]: Removed moddi3 routinue Using the
- default moddi3 function as the existing implementation has many bugs
+Subject: [PATCH 15/58] [Patch, microblaze]: Removed moddi3 routinue
+
+Using the default moddi3 function as the existing implementation has many bugs
 
 Signed-off-by:Nagaraju <nmekala@xilix.com>
 
 Conflicts:
         libgcc/config/microblaze/moddi3.S
 ---
- libgcc/config/microblaze/moddi3.S     | 121 ----------------------------------
+ libgcc/config/microblaze/moddi3.S     | 121 --------------------------
  libgcc/config/microblaze/t-microblaze |   3 +-
  2 files changed, 1 insertion(+), 123 deletions(-)
  delete mode 100644 libgcc/config/microblaze/moddi3.S
 
 diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S
 deleted file mode 100644
-index abfe4fc..0000000
+index d0e24fdb89d..00000000000
 --- a/libgcc/config/microblaze/moddi3.S
 +++ /dev/null
 @@ -1,121 +0,0 @@
 -###################################
 -# 
--#  Copyright (C) 2009-2019 Free Software Foundation, Inc.
+-#  Copyright (C) 2009-2020 Free Software Foundation, Inc.
 -#
 -#  Contributed by Michael Eager <eager@eagercon.com>.
 -#
@@ -142,7 +143,7 @@ index abfe4fc..0000000
 -        .end __moddi3
 -       
 diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze
-index 96959f0..8d954a4 100644
+index 96959f0292b..8d954a49575 100644
 --- a/libgcc/config/microblaze/t-microblaze
 +++ b/libgcc/config/microblaze/t-microblaze
 @@ -1,8 +1,7 @@
@@ -156,5 +157,5 @@ index 96959f0..8d954a4 100644
          $(srcdir)/config/microblaze/muldi3_hard.S \
          $(srcdir)/config/microblaze/mulsi3.S \
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch
index ca1c2d1c..13c3ccd9 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch
@@ -1,8 +1,9 @@
-From 032e50c1b267306338cff4d136db88f08350de72 Mon Sep 17 00:00:00 2001
+From 9a4253a92a5e1811693ea1707b5fc272908ec556 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 14:41:58 +0530
-Subject: [PATCH 17/63] [Patch, microblaze]: Add INIT_PRIORITY support Added
- TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.
+Subject: [PATCH 16/58] [Patch, microblaze]: Add INIT_PRIORITY support
+
+Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.
 
 These macros allows users to control the order of initialization
 of objects defined at namespace scope with the init_priority
@@ -22,14 +23,14 @@ Changelog
 Signed-off-by:nagaraju <nmekala@xilix.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
- gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++++++++++
+ gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++
  1 file changed, 53 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index c834b49..c54b96b 100644
+index 0186171c04c..9eae5515c60 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2642,6 +2642,53 @@ print_operand_address (FILE * file, rtx addr)
+@@ -2634,6 +2634,53 @@ print_operand_address (FILE * file, rtx addr)
      }
  }
  
@@ -83,7 +84,7 @@ index c834b49..c54b96b 100644
  /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol
     is used, so that we don't emit an .extern for it in 
     microblaze_asm_file_end.  */
-@@ -3981,6 +4028,12 @@ microblaze_starting_frame_offset (void)
+@@ -3975,6 +4022,12 @@ microblaze_starting_frame_offset (void)
  #undef TARGET_ATTRIBUTE_TABLE
  #define TARGET_ATTRIBUTE_TABLE          microblaze_attribute_table
  
@@ -97,5 +98,5 @@ index c834b49..c54b96b 100644
  #define TARGET_IN_SMALL_DATA_P          microblaze_elf_in_small_data_p
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch
index de35f286..cfc06f74 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Add-optimized-lshrsi3.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch
@@ -1,9 +1,11 @@
-From 6db9d068e32a424ac04c27e963d1e58cb3ef8bdf Mon Sep 17 00:00:00 2001
+From 27c27a8876152bac78059a1b2d5a6f0ac9b8cee2 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 15:23:57 +0530
-Subject: [PATCH 18/63] [Patch, microblaze]: Add optimized lshrsi3 When barrel
- shifter is not present, the immediate value is greater than #5 and
- optimization is -OS, the compiler will generate shift operation using loop.
+Subject: [PATCH 17/58] [Patch, microblaze]: Add optimized lshrsi3
+
+When barrel shifter is not present, the immediate value
+is greater than #5 and optimization is -OS, the
+compiler will generate shift operation using loop.
 
 Changelog
 
@@ -20,13 +22,13 @@ ChangeLog/testsuite
 Signed-off-by:Nagaraju <nmekala@xilix.com>
 Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
 ---
- gcc/config/microblaze/microblaze.md                 | 21 +++++++++++++++++++++
- .../gcc.target/microblaze/others/lshrsi_Os_1.c      | 13 +++++++++++++
+ gcc/config/microblaze/microblaze.md           | 21 +++++++++++++++++++
+ .../microblaze/others/lshrsi_Os_1.c           | 13 ++++++++++++
  2 files changed, 34 insertions(+)
  create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 3d2636e..aa2eda3 100644
+index 187ad522dcc..8f9baec826b 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1618,6 +1618,27 @@
@@ -59,7 +61,7 @@ index 3d2636e..aa2eda3 100644
         (lshiftrt:SI (match_operand:SI 1 "register_operand"  "d")
 diff --git a/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c
 new file mode 100644
-index 0000000..32a3be7
+index 00000000000..32a3be7c76a
 --- /dev/null
 +++ b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c
 @@ -0,0 +1,13 @@
@@ -77,5 +79,5 @@ index 0000000..32a3be7
 +/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */
 +/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
index b60a4e95..1f8decc7 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
@@ -1,10 +1,11 @@
-From 372bbc75146166df9b82ca5e8f236971b7cef16e Mon Sep 17 00:00:00 2001
+From 59273a71f1f180456d87eb4a1a5f95fcc6d17003 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 16:42:44 +0530
-Subject: [PATCH 20/63] [Patch, microblaze]: Reducing Stack space for arguments
- Currently in Microblaze target stack space for arguments in register is being
- allocated even if there are no arguments in the function. This patch will
- optimize the extra 24 bytes that are being allocated.
+Subject: [PATCH 18/58] [Patch, microblaze]: Reducing Stack space for arguments
+
+Currently in Microblaze target stack space for arguments in register is being
+allocated even if there are no arguments in the function.
+This patch will optimize the extra 24 bytes that are being allocated.
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
               :Ajit Agarwal  <ajitkum@xilinx.com>
@@ -17,12 +18,12 @@ ChangeLog:
     *microblaze.c (REG_PARM_STACK_SPACE): Modify
 ---
  gcc/config/microblaze/microblaze-protos.h |   1 +
- gcc/config/microblaze/microblaze.c        | 134 +++++++++++++++++++++++++++++-
+ gcc/config/microblaze/microblaze.c        | 132 +++++++++++++++++++++-
  gcc/config/microblaze/microblaze.h        |   4 +-
- 3 files changed, 136 insertions(+), 3 deletions(-)
+ 3 files changed, 134 insertions(+), 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 1f5ca80..6647cbc 100644
+index 982b2abd2d4..96f7bb67f6c 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -59,6 +59,7 @@ extern int symbol_mentioned_p (rtx);
@@ -34,17 +35,16 @@ index 1f5ca80..6647cbc 100644
  
  /* Declare functions in microblaze-c.c.  */
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index c54b96b..0ce9d13 100644
+index 9eae5515c60..a4bdf66f045 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2065,6 +2065,138 @@ microblaze_must_save_register (int regno)
+@@ -2057,6 +2057,136 @@ microblaze_must_save_register (int regno)
    return 0;
  }
  
 +static bool
 +microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type)
 +{
-+  enum machine_mode mode;
 +  int unsignedp;
 +  rtx entry_parm;
 +
@@ -65,37 +65,36 @@ index c54b96b..0ce9d13 100644
 +             || microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type)));
 +
 +  /* Handle transparent aggregates.  */
-+ if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE)
++  if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE)
 +     && TYPE_TRANSPARENT_AGGR (type))
 +  type = TREE_TYPE (first_field (type));
 +
 +  /* See if this arg was passed by invisible reference.  */
-+ if (pass_by_reference (get_cumulative_args (args_so_far),
-+                        TYPE_MODE (type), type, true))
-+    type = build_pointer_type (type);
++  function_arg_info arg (type, /*named=*/true);
++  apply_pass_by_reference_rules (get_cumulative_args (args_so_far), arg);
 +
-+    /* Find mode as it is passed by the ABI.  */
-+    unsignedp = TYPE_UNSIGNED (type);
-+    mode = promote_mode (type, TYPE_MODE (type), &unsignedp);
++  /* Find mode as it is passed by the ABI.  */
++  unsignedp = TYPE_UNSIGNED (type);
++  arg.mode = promote_mode (arg.type, arg.mode, &unsignedp);
 +
-+/* If there is no incoming register, we need a stack.  */
-+ entry_parm = microblaze_function_arg (args_so_far, mode, type, true);
-+ if (entry_parm == NULL)
++  /* If there is no incoming register, we need a stack.  */
++  entry_parm = microblaze_function_arg (args_so_far, arg);
++  if (entry_parm == NULL)
 +    return true;
 +
-+ /* Likewise if we need to pass both in registers and on the stack.  */
-+ if (GET_CODE (entry_parm) == PARALLEL
++  /* Likewise if we need to pass both in registers and on the stack.  */
++  if (GET_CODE (entry_parm) == PARALLEL
 +     && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX)
 +   return true;
 +
-+ /* Also true if we're partially in registers and partially not.  */
-+  if (function_arg_partial_bytes (args_so_far, mode, type, true) != 0)
++  /* Also true if we're partially in registers and partially not.  */
++  if (function_arg_partial_bytes (args_so_far, arg) != 0)
 +     return true;
 +
-+ /* Update info on where next arg arrives in registers.  */
-+ microblaze_function_arg_advance (args_so_far, mode, type, true);
-+ return false;
-+ }
++  /* Update info on where next arg arrives in registers.  */
++  microblaze_function_arg_advance (args_so_far, arg);
++  return false;
++}
 +
 +static bool
 +microblaze_function_parms_need_stack (tree fun, bool incoming)
@@ -176,7 +175,7 @@ index c54b96b..0ce9d13 100644
  /* Return the bytes needed to compute the frame pointer from the current
     stack pointer.
  
-@@ -3411,7 +3543,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3403,7 +3533,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
    emit_insn (gen_indirect_jump (temp2));
  
    /* Run just enough of rest_of_compilation.  This sequence was
@@ -184,9 +183,9 @@ index c54b96b..0ce9d13 100644
 +     "borrowed" from microblaze.c.  */
    insn = get_insns ();
    shorten_branches (insn);
-   final_start_function (insn, file, 1);
+   assemble_start_function (thunk_fndecl, fnname);
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 0a435b8..346e47b 100644
+index 8aa3f155790..1e155e4041c 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -434,9 +434,9 @@ extern struct microblaze_frame_info current_frame_info;
@@ -202,5 +201,5 @@ index 0a435b8..346e47b 100644
  #define STACK_BOUNDARY                         32
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch
index c79f9552..b78a9814 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Add-cbranchsi4_reg.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch
@@ -1,10 +1,11 @@
-From 1c226901aec38e2e824177418dcd82b6cd49ffca Mon Sep 17 00:00:00 2001
+From f43cb8572131074c7ce43a1d39c7ba6c85611e18 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 17:04:37 +0530
-Subject: [PATCH 21/63] [Patch, microblaze]: Add cbranchsi4_reg This patch
- optimizes the generation of  pcmpne/pcmpeq instruction if the compare
- instruction has no immediate values.For the immediate values the xor
- instruction is generated
+Subject: [PATCH 19/58] [Patch, microblaze]: Add cbranchsi4_reg
+
+This patch optimizes the generation of  pcmpne/pcmpeq instruction if the
+compare instruction has no immediate values.For the immediate values the
+xor instruction is generated
 
 Signed-off-by: Nagaraju Mekala <nmekala@xilix.com>
 Signed-off-by: Ajit Agarwal  <ajitkum@xilinx.com>
@@ -20,18 +21,17 @@ Conflicts:
 
         gcc/config/microblaze/microblaze-protos.h
 ---
- gcc/config/microblaze/microblaze-protos.h                 |  2 +-
- gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c           |  2 +-
- gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c           |  2 +-
- gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c           |  2 +-
- gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c           |  2 +-
- gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c          | 14 +++++++-------
- gcc/testsuite/gcc.target/microblaze/isa/vanilla.c         | 12 ++++++------
- gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c |  2 +-
- 8 files changed, 19 insertions(+), 19 deletions(-)
+ gcc/config/microblaze/microblaze-protos.h         |  2 +-
+ gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c   |  2 +-
+ gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c   |  2 +-
+ gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c   |  2 +-
+ gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c   |  2 +-
+ gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c  | 14 +++++++-------
+ gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 12 ++++++------
+ 7 files changed, 18 insertions(+), 18 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 6647cbc..bdc9b69 100644
+index 96f7bb67f6c..76ffc682df2 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *);
@@ -44,7 +44,7 @@ index 6647cbc..bdc9b69 100644
  extern void microblaze_expand_conditional_branch_sf (rtx *); 
  extern int microblaze_can_use_return_insn (void);
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
-index 4041a24..ccc6a46 100644
+index 4041a241391..ccc6a461cd9 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
 @@ -6,5 +6,5 @@ void float_func ()
@@ -55,7 +55,7 @@ index 4041a24..ccc6a46 100644
 +        f2 = f3;
  }
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
-index 3902b83..1dd5fe6 100644
+index 3902b839db9..1dd5fe6c539 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
 @@ -6,5 +6,5 @@ void float_func ()
@@ -66,7 +66,7 @@ index 3902b83..1dd5fe6 100644
 +        f2 = f3;
  }
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
-index 8555974..d6f80fb 100644
+index 8555974dda5..d6f80fb0ec3 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
 @@ -6,5 +6,5 @@ void float_func ()
@@ -77,7 +77,7 @@ index 8555974..d6f80fb 100644
 +        f1 = f2 + f3;
  }
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
-index 79cc5f9..d117724 100644
+index 79cc5f9dd8e..d1177249552 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
 @@ -5,5 +5,5 @@ void float_func(float f1, float f2, float f3)
@@ -88,7 +88,7 @@ index 79cc5f9..d117724 100644
 +        f2 = f3;
  }
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
-index ebfb170..7582297 100644
+index ebfb170ecee..75822977ef8 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
 @@ -5,17 +5,17 @@ volatile float f1, f2, f3;
@@ -117,7 +117,7 @@ index ebfb170..7582297 100644
      
  }
 diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
-index 1d6ba80..532c035 100644
+index 1d6ba807b12..532c035adfd 100644
 --- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
 +++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
 @@ -74,16 +74,16 @@ void float_cmp_func ()
@@ -143,17 +143,6 @@ index 1d6ba80..532c035 100644
 +        f1 = f3;
      
  }
-diff --git a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c
-index fdcde1f..580b4db 100644
---- a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c
-+++ b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c
-@@ -5,4 +5,4 @@ void trap ()
-   __builtin_trap ();
- }
- 
--/* { dg-final { scan-assembler "brki\tr0,-1" } } */
-\ No newline at end of file
-+/* { dg-final { scan-assembler "bri\t0" } } */
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch
deleted file mode 100644
index dc9b61cf..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 614bacc058b94c7b12cd40fde1b19b4709870f3b Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 15:42:15 +0530
-Subject: [PATCH 19/63] [Patch, microblaze]: Modified trap instruction The
- instruction was wrongly written to brki r0,-1 it should be bri r0. Modified
- with the correct instruction
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-              :Ajit Agarwal  <ajitkum@xilinx.com>
----
- gcc/config/microblaze/microblaze.md | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index aa2eda3..3c80760 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -2348,7 +2348,7 @@
- (define_insn "trap"
-   [(trap_if (const_int 1) (const_int 0))]
-   ""
--  "brki\tr0,-1"
-+  "bri\t0"
-  [(set_attr "type" "trap")]
- )
- 
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
index c3822d06..cc1c3d7e 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
@@ -1,19 +1,22 @@
-From 791d65feae4f3cab47833579bc6f523e54194cbd Mon Sep 17 00:00:00 2001
+From 1bbf48097cf2da98e03139b499a5a74bc68e6abc Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 17:11:04 +0530
-Subject: [PATCH 22/63] [Patch,microblaze]: Inline Expansion of fsqrt builtin.
- The changes are made in the patch for the inline expansion of the fsqrt
- builtin with fqrt instruction. The sqrt math function takes double as
- argument and return double as argument. The pattern is selected while
- expanding the unary op through expand_unop which passes DFmode and the DFmode
- pattern was not there returning zero. Thus the sqrt math function is not
- inlined and expanded. The pattern with DFmode argument is added. Also the
- source and destination argument is not same the DF through two different
- consecutive registers with lower 32 bit is the argument passed to sqrt and
- the higher 32 bit is zero. If the source and destinations are different the
- DFmode 64 bits registers is not set properly giving the problem in runtime.
- Such changes are taken care in the implementation of the pattern for DFmode
- for inline expansion of the sqrt.
+Subject: [PATCH 20/58] [Patch,microblaze]: Inline Expansion of fsqrt builtin.
+
+The changes are made in the patch for the inline expansion of
+the fsqrt builtin with fqrt instruction. The sqrt math function
+takes double as argument and return double as argument. The
+pattern is selected while expanding the unary op through
+expand_unop which passes DFmode and the DFmode pattern was
+not there returning zero. Thus the sqrt math function is not
+inlined and expanded. The pattern with DFmode argument is added.
+Also the source and destination argument is not same the DF
+through two different consecutive registers with lower 32 bit
+is the argument passed to sqrt and the higher 32 bit is zero.
+If the source and destinations are different the DFmode 64 bits
+registers is not set properly giving the problem in runtime. Such
+changes are taken care in the implementation of the pattern for
+DFmode for inline expansion of the sqrt.
 
 ChangeLog:
 2015-06-16  Ajit Agarwal  <ajitkum@xilinx.com>
@@ -29,7 +32,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
  1 file changed, 14 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 3c80760..1fb5582 100644
+index 8f9baec826b..986d9c3aa25 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -451,6 +451,20 @@
@@ -54,5 +57,5 @@ index 3c80760..1fb5582 100644
    [(set (match_operand:SI 0 "register_operand" "=d")
          (fix:SI (match_operand:SF 1 "register_operand" "d")))]
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch
index a314170f..b4d03172 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch
@@ -1,8 +1,8 @@
-From 2c4a1d46e4f1b2342f899d6741d09dbf7cc87aa2 Mon Sep 17 00:00:00 2001
+From fe7962c6cc54a5d5f80db90ccc06b8603ddeb74f Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 17:33:31 +0530
-Subject: [PATCH 23/63] [Patch] OPT: Update heuristics for loop-invariant for
- address arithme. .tic.
+Subject: [PATCH 21/58] [Patch] OPT: Update heuristics for loop-invariant for
+ address arithmetic
 
 The changes are made in the patch to update the heuristics
 for loop invariant for address arithmetic. The heuristics is
@@ -26,7 +26,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
  1 file changed, 2 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
-index b880ead..fd7a019 100644
+index 37ae6549e56..f6385d6cf43 100644
 --- a/gcc/loop-invariant.c
 +++ b/gcc/loop-invariant.c
 @@ -1465,10 +1465,8 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
@@ -43,5 +43,5 @@ index b880ead..fd7a019 100644
    else if (ret < 0)
      return -1;
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
index a786ba09..2e5afed8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
@@ -1,14 +1,17 @@
-From c2b64f2f7a06231d8da0a53c6761939583ac56da Mon Sep 17 00:00:00 2001
+From b066cb189302814fcd91b38f2f9da830a2c5b8fe Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 18:07:24 +0530
-Subject: [PATCH 24/63] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3'
- insn definitions Change adddi3 to handle DI immediates as the second operand,
- this requires modification to the output template however reduces the need to
- specify seperate templates for 16-bit positive/negative immediate operands.
- The use of 32-bit immediates for the addi and addic instructions is handled
- by the assembler, which will emit the imm instructions when required. This
- conveniently handles the optimizable cases where the immediate constant value
- does not need the higher half words of the operands upper/lower words.
+Subject: [PATCH 22/58] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3'
+ insn definitions
+
+Change adddi3 to handle DI immediates as the second operand, this
+requires modification to the output template however reduces the need to
+specify seperate templates for 16-bit positive/negative immediate
+operands. The use of 32-bit immediates for the addi and addic
+instructions is handled by the assembler, which will emit the imm
+instructions when required. This conveniently handles the optimizable
+cases where the immediate constant value does not need the higher half
+words of the operands upper/lower words.
 
 Change the constraints of the subdi3 instruction definition such that it
 does not match the second operand as an immediate value. This is because
@@ -23,7 +26,7 @@ Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
  1 file changed, 6 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 1fb5582..216219b 100644
+index 986d9c3aa25..efd2c34e0b7 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -502,17 +502,16 @@
@@ -59,5 +62,5 @@ index 1fb5582..216219b 100644
    "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1"
    [(set_attr "type"    "darith")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
index 98310b36..fa16749e 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
@@ -1,11 +1,13 @@
-From c7e5c253b1e7800bc5ec8cc69850118ed938e22f Mon Sep 17 00:00:00 2001
+From 98018d020d9fbae38ea19627dec64d03d7f21fac Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 18:18:41 +0530
-Subject: [PATCH 25/63] [Patch, microblaze]: Update ashlsi3 & movsf patterns
- This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand
- of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal
- patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our
- instruction doesn't support so using gen_int_mode function
+Subject: [PATCH 23/58] [Patch, microblaze]: Update ashlsi3 & movsf patterns
+
+This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in
+print_operand of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay
+and movsf_internal patterns beacuse HOST_WIDE_INT_PRINT_HEX
+is generating 64-bit value which our instruction doesn't support
+so using gen_int_mode function
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
               :Ajit Agarwal  <ajitkum@xilinx.com>
@@ -22,25 +24,11 @@ ChangeLog:
      updated the 'F' case to use "unsinged int" instead
      of HOST_WIDE_INT_PRINT_HEX
 ---
- gcc/config/microblaze/microblaze.c  |  2 +-
  gcc/config/microblaze/microblaze.md | 10 ++++++++--
- 2 files changed, 9 insertions(+), 3 deletions(-)
+ 1 file changed, 8 insertions(+), 2 deletions(-)
 
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 0ce9d13..7669668 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -2608,7 +2608,7 @@ print_operand (FILE * file, rtx op, int letter)
-          unsigned long value_long;
-          REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op),
-                                       value_long);
--         fprintf (file, HOST_WIDE_INT_PRINT_HEX, value_long);
-+         fprintf (file, "0x%08x", (unsigned int) value_long);
-        }
-       else
-        {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 216219b..4bc209c 100644
+index efd2c34e0b7..be8bbda2bfb 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1368,7 +1368,10 @@
@@ -68,5 +56,5 @@ index 216219b..4bc209c 100644
    [(set_attr "type"    "no_delay_arith")
     (set_attr "mode"    "SI")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
index ba80ce45..8e0eda3c 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
@@ -1,9 +1,10 @@
-From c3b633b0ee8d228a7d70a02b574822aba9a0fd93 Mon Sep 17 00:00:00 2001
+From 3f98e90620e0ae6d76a1ba18e97389feb095c3e4 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 17 Jan 2017 19:50:34 +0530
-Subject: [PATCH 26/63] [Patch, microblaze]: 8-stage pipeline for microblaze
- This patch adds the support for the 8-stage pipeline. The new 8-stage
- pipeline reduces the latencies of float & integer division drastically
+Subject: [PATCH 24/58] [Patch, microblaze]: 8-stage pipeline for microblaze
+
+This patch adds the support for the 8-stage pipeline. The new 8-stage
+pipeline reduces the latencies of float & integer division drastically
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 
@@ -21,17 +22,36 @@ ChangeLog:
   *microblaze.opt (mxl-frequency): New
          New flag added for 8-stage pipeline
 ---
- gcc/config/microblaze/microblaze.c   | 13 ++++++
+ gcc/config/microblaze/microblaze.c   | 18 ++++++-
  gcc/config/microblaze/microblaze.h   |  3 +-
- gcc/config/microblaze/microblaze.md  | 79 +++++++++++++++++++++++++++++++++++-
+ gcc/config/microblaze/microblaze.md  | 79 +++++++++++++++++++++++++++-
  gcc/config/microblaze/microblaze.opt |  4 ++
- 4 files changed, 96 insertions(+), 3 deletions(-)
+ 4 files changed, 100 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 7669668..ae7d5dd 100644
+index a4bdf66f045..a3996119bd7 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -1848,6 +1848,19 @@ microblaze_option_override (void)
+@@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay;
+ /* Set to one if the targeted core has the CLZ insn.  */
+ int microblaze_has_clz = 0;
+ 
++/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */
++int microblaze_has_bitfield = 0;
++
+ /* Which CPU pipeline do we use. We haven't really standardized on a CPU 
+    version having only a particular type of pipeline. There can still be 
+    options on the CPU to scale pipeline features up or down. :( 
+@@ -1739,7 +1742,7 @@ microblaze_option_override (void)
+   register int i, start;
+   register int regno;
+   register machine_mode mode;
+-  int ver;
++  int ver,ver_int;
+ 
+   microblaze_section_threshold = (global_options_set.x_g_switch_value
+                                  ? g_switch_value
+@@ -1840,6 +1843,19 @@ microblaze_option_override (void)
                    "%<-mcpu=v8.30.a%>");
          TARGET_REORDER = 0;
      }
@@ -52,7 +72,7 @@ index 7669668..ae7d5dd 100644
    if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
      error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>");
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 346e47b..bf7f3b4 100644
+index 1e155e4041c..8b0db2c1718 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -27,7 +27,8 @@
@@ -66,7 +86,7 @@ index 346e47b..bf7f3b4 100644
  
  #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4bc209c..b7c16ac 100644
+index be8bbda2bfb..c407a81c51e 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -35,6 +35,7 @@
@@ -177,7 +197,7 @@ index 4bc209c..b7c16ac 100644
    (set_attr "length"    "4")])
  
 diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt
-index 2e46941..d23f376 100644
+index 725c2fab52a..a29c6f8df90 100644
 --- a/gcc/config/microblaze/microblaze.opt
 +++ b/gcc/config/microblaze/microblaze.opt
 @@ -133,3 +133,7 @@ Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE).
@@ -189,5 +209,5 @@ index 2e46941..d23f376 100644
 +Target Mask(AREA_OPTIMIZED_2)
 +Use 8 stage pipeline (frequency optimization)
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch
index 330b5494..f1b793f3 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch
@@ -1,8 +1,8 @@
-From 650cbdea7bc810e2bd0ebc5eb5647ed513498670 Mon Sep 17 00:00:00 2001
+From eca67041b3d6e20663313732df0038d75fd2da8d Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 11:08:40 +0530
-Subject: [PATCH 27/63] [Patch,rtl Optimization]: Better register pressure
- estimate for loop . .invariant code motion
+Subject: [PATCH 25/58] [Patch,rtl Optimization]: Better register pressure
+ estimate for loop invariant code motion
 
 Calculate the loop liveness used for regs for calculating the register pressure
 in the cost estimation.  Loop liveness is based on the following properties.
@@ -36,15 +36,15 @@ ChangeLog:
 
 Signed-off-by:Ajit Agarwal ajitkum@xilinx.com.
 ---
- gcc/cfgloopanal.c    |  4 +++-
- gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++++++++-------------
+ gcc/cfgloopanal.c    |  4 ++-
+ gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++-----------
  2 files changed, 50 insertions(+), 17 deletions(-)
 
 diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c
-index 6dbe96f..ec5cba2 100644
+index 0b33e8272a7..7be8606e4f0 100644
 --- a/gcc/cfgloopanal.c
 +++ b/gcc/cfgloopanal.c
-@@ -411,7 +411,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed,
+@@ -418,7 +418,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed,
    if (regs_needed + target_res_regs <= available_regs)
      return 0;
  
@@ -56,7 +56,7 @@ index 6dbe96f..ec5cba2 100644
         them.  */
      cost = target_reg_cost [speed] * n_new;
 diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
-index fd7a019..ad54297 100644
+index f6385d6cf43..8596b5c984d 100644
 --- a/gcc/loop-invariant.c
 +++ b/gcc/loop-invariant.c
 @@ -1519,7 +1519,7 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
@@ -138,5 +138,5 @@ index fd7a019..ad54297 100644
  
    if (! flag_ira_loop_pressure)
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch
index b5ee2c8c..cbc1b7b8 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch
@@ -1,11 +1,13 @@
-From 8f8c6cd35a2cf79449c0155fa865a665d730e541 Mon Sep 17 00:00:00 2001
+From 711652dd187e5b8d7aa12ecc9f569f10b1521bd1 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 11:25:48 +0530
-Subject: [PATCH 28/63] [Patch, microblaze]: Correct the const high double
- immediate value With this patch the loading of the DI mode immediate values
- will be using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE
- functions, as CONST_DOUBLE_HIGH was returning the sign extension value even
- of the unsigned long long constants also
+Subject: [PATCH 26/58] [Patch, microblaze]: Correct the const high double
+ immediate value
+
+With this patch the loading of the DI mode immediate values will be
+using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE
+functions, as CONST_DOUBLE_HIGH was returning the sign extension value
+even of the unsigned long long constants also
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
                Ajit Agarwal  <ajitkum@xilinx.com>
@@ -18,16 +20,16 @@ ChangeLog:
         REAL_VALUE_TO_TARGET_DOUBLE
  *long.c (new): Added new testcase
 ---
- gcc/config/microblaze/microblaze.c         |  8 ++++++--
+ gcc/config/microblaze/microblaze.c         |  6 ++++--
  gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++
- 2 files changed, 16 insertions(+), 2 deletions(-)
+ 2 files changed, 14 insertions(+), 2 deletions(-)
  create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index ae7d5dd..002d7a5 100644
+index a3996119bd7..73d0e010cda 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2594,14 +2594,18 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2587,14 +2587,16 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -40,17 +42,15 @@ index ae7d5dd..002d7a5 100644
             {
 -             val[0] = CONST_DOUBLE_HIGH (op);
 -             val[1] = CONST_DOUBLE_LOW (op);
-+             REAL_VALUE_TYPE rv;
-+             REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
-+             REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
-+             val[1] = l[WORDS_BIG_ENDIAN == 0];
-+             val[0] = l[WORDS_BIG_ENDIAN != 0];
++              REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
++              val[1] = l[WORDS_BIG_ENDIAN == 0];
++              val[0] = l[WORDS_BIG_ENDIAN != 0];
             }
         }
        else if (code == CONST_INT)
 diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c
 new file mode 100644
-index 0000000..4d45186
+index 00000000000..4d4518619d1
 --- /dev/null
 +++ b/gcc/testsuite/gcc.target/microblaze/long.c
 @@ -0,0 +1,10 @@
@@ -65,5 +65,5 @@ index 0000000..4d45186
 +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */
 +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
index cbfc98de..3869db15 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
@@ -1,11 +1,12 @@
-From 30402c3bcfeb8a93656957b22558997b65d69cb8 Mon Sep 17 00:00:00 2001
+From ea79d97f430d554921d94d30cb8db851cce6664b Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 11:49:58 +0530
-Subject: [PATCH 29/63] [Fix, microblaze]: Fix internal compiler error with
- msmall-divides This patch will fix the internal error
- microblaze_expand_divide function which comes because of rtx PLUS where the
- mem_rtx is of type SI and the operand is of type QImode. This patch modifies
- the mem_rtx as QImode and Plus as QImode to fix the error.
+Subject: [PATCH 27/58] [Fix, microblaze]: Fix internal compiler error with
+ msmall-divides
+
+This patch will fix the internal error microblaze_expand_divide function which comes because
+of rtx PLUS where the mem_rtx is of type SI and the operand is of type QImode.
+This patch modifies the mem_rtx as QImode and Plus as QImode to fix the error.
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
                Ajit Agarwal  <ajitkum@xilinx.com>
@@ -19,10 +20,10 @@ ChangeLog:
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 002d7a5..c662952 100644
+index 73d0e010cda..f7c29ef28f5 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -3909,7 +3909,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3902,7 +3902,7 @@ microblaze_expand_divide (rtx operands[])
    emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4)));
    emit_insn (gen_addsi3 (regt1, regt1, operands[2]));
    mem_rtx = gen_rtx_MEM (QImode,
@@ -32,5 +33,5 @@ index 002d7a5..c662952 100644
    insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
    jump = emit_jump_insn_after (gen_jump (div_end_label), insn); 
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
index fce06359..3f9dd69b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
@@ -1,8 +1,8 @@
-From 5ac80cf926c4dc96cbfd189f02c9250865b52dd3 Mon Sep 17 00:00:00 2001
+From fa067a4b7b65aae3671bb02d77c580c9e35fc384 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 12:03:39 +0530
-Subject: [PATCH 30/63] [patch,microblaze]: Fix the calculation of high word in
- a long long 6. .4-bit
+Subject: [PATCH 28/58] [patch,microblaze]: Fix the calculation of high word in
+ a long long 64-bit
 
 This patch will change the calculation of high word in a long long 64-bit.
 Earlier to this patch the high word of long long word (0xF0000000ULL) is
@@ -27,10 +27,10 @@ ChangeLog:
  1 file changed, 3 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index c662952..8013a2c 100644
+index f7c29ef28f5..0a73a6c32b4 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2612,9 +2612,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2603,9 +2603,6 @@ print_operand (FILE * file, rtx op, int letter)
          {
           val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32;
           val[1] = INTVAL (op) & 0x00000000ffffffffLL;
@@ -41,5 +41,5 @@ index c662952..8013a2c 100644
        fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]);
      }
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Patch-microblaze-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch
index cbf64d97..dfdb479c 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Patch-microblaze-Add-new-bit-field-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch
@@ -1,13 +1,15 @@
-From 45deb5bd3ae8c3db360ef181c9873e37d2288848 Mon Sep 17 00:00:00 2001
+From 341bf8ad4e55693d00d4d8c916f4c347e7186dd4 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 12:14:51 +0530
-Subject: [PATCH 31/63] [Patch, microblaze]: Add new bit-field instructions
- This patches adds new bsefi and bsifi instructions. BSEFI- The instruction
- shall extract a bit field from a register and place it right-adjusted in the
- destination register. The other bits in the destination register shall be set
- to zero BSIFI- The instruction shall insert a right-adjusted bit field from a
- register at another position in the destination register. The rest of the
- bits in the destination register shall be unchanged
+Subject: [PATCH 29/58] [Patch, microblaze]: Add new bit-field instructions
+
+This patches adds new bsefi and bsifi instructions.
+BSEFI- The instruction shall extract a bit field from a
+register and place it right-adjusted in the destination register.
+The other bits in the destination register shall be set to zero
+BSIFI- The instruction shall insert a right-adjusted bit field
+from a register at another position in the destination register.
+The rest of the bits in the destination register shall be unchanged
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 
@@ -16,11 +18,32 @@ ChangeLog:
 
   *microblaze.md (Update): Added new patterns
 ---
- gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 73 insertions(+)
+ gcc/config/microblaze/microblaze.h  |  2 +
+ gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++
+ 2 files changed, 75 insertions(+)
 
+diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
+index 8b0db2c1718..b5b7b22cec9 100644
+--- a/gcc/config/microblaze/microblaze.h
++++ b/gcc/config/microblaze/microblaze.h
+@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[];
+ 
+ extern int microblaze_no_unsafe_delay;
+ extern int microblaze_has_clz;
++extern int microblaze_has_bitfield;
+ extern enum pipeline_type microblaze_pipe;
+ 
+ #define OBJECT_FORMAT_ELF
+@@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe;
+ 
+ /* Do we have CLZ?  */
+ #define TARGET_HAS_CLZ      (TARGET_PATTERN_COMPARE && microblaze_has_clz)
++#define TARGET_HAS_BITFIELD      (TARGET_BARREL_SHIFT && microblaze_has_bitfield)
+ 
+ /* The default is to support PIC.  */
+ #define TARGET_SUPPORTS_PIC 1
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index b7c16ac..67b298a 100644
+index c407a81c51e..fa6aabdb9d4 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -982,6 +982,8 @@
@@ -116,5 +139,5 @@ index b7c16ac..67b298a 100644
 +
  (include "sync.md")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
index 86df58b3..bb773239 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
@@ -1,21 +1,23 @@
-From bc95cc12b2c4d96ea709eefc4b99181b8c40b19c Mon Sep 17 00:00:00 2001
+From df38540af411564f428079335c8d1e695dc1d723 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 18 Jan 2017 12:42:10 +0530
-Subject: [PATCH 32/63] [Patch, microblaze]: Fix bug in MB version calculation
- This patch fixes the bug in microblaze_version_to_int function. Earlier the
- conversion of vXX.YY.Z to int has a bug which is fixed now.
+Subject: [PATCH 30/58] [Patch, microblaze]: Fix bug in MB version calculation
+
+This patch fixes the bug in microblaze_version_to_int function.
+Earlier the conversion of vXX.YY.Z to int has a bug which is
+fixed now.
 
 Signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com>
                 Nagaraju Mekala <nmekala@xilix.com>
 ---
- gcc/config/microblaze/microblaze.c | 147 ++++++++++++++++++-------------------
- 1 file changed, 70 insertions(+), 77 deletions(-)
+ gcc/config/microblaze/microblaze.c | 145 ++++++++++++++---------------
+ 1 file changed, 69 insertions(+), 76 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 8013a2c..3f68ef0 100644
+index 0a73a6c32b4..4b5699671e8 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -239,6 +239,63 @@ section *sdata2_section;
+@@ -242,6 +242,63 @@ section *sdata2_section;
  #define TARGET_HAVE_TLS true
  #endif
  
@@ -79,7 +81,7 @@ index 8013a2c..3f68ef0 100644
  /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant.  */
  static bool
  microblaze_const_double_ok (rtx op, machine_mode mode)
-@@ -1338,8 +1395,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
+@@ -1341,8 +1398,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
        {
         if (TARGET_BARREL_SHIFT)
           {
@@ -89,7 +91,7 @@ index 8013a2c..3f68ef0 100644
               *total = COSTS_N_INSNS (1);
             else
               *total = COSTS_N_INSNS (2);
-@@ -1400,8 +1456,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
+@@ -1403,8 +1459,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
           }
         else if (!TARGET_SOFT_MUL)
           {
@@ -99,7 +101,7 @@ index 8013a2c..3f68ef0 100644
               *total = COSTS_N_INSNS (1);
             else
               *total = COSTS_N_INSNS (3);
-@@ -1682,72 +1737,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
+@@ -1677,65 +1732,6 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
    return 0;
  }
  
@@ -165,15 +167,7 @@ index 8013a2c..3f68ef0 100644
  static void
  microblaze_option_override (void)
  {
-   register int i, start;
-   register int regno;
-   register machine_mode mode;
--  int ver;
-+  int ver,ver_int;
- 
-   microblaze_section_threshold = (global_options_set.x_g_switch_value
-                                  ? g_switch_value
-@@ -1768,13 +1764,13 @@ microblaze_option_override (void)
+@@ -1763,13 +1759,13 @@ microblaze_option_override (void)
    /* Check the MicroBlaze CPU version for any special action to be done.  */
    if (microblaze_select_cpu == NULL)
      microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU;
@@ -190,7 +184,7 @@ index 8013a2c..3f68ef0 100644
    if (ver < 0)
      {
        /* No hardware exceptions in earlier versions. So no worries.  */
-@@ -1785,8 +1781,7 @@ microblaze_option_override (void)
+@@ -1780,8 +1776,7 @@ microblaze_option_override (void)
        microblaze_pipe = MICROBLAZE_PIPE_3;
      }
    else if (ver == 0
@@ -200,7 +194,7 @@ index 8013a2c..3f68ef0 100644
      {
  #if 0
        microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY);
-@@ -1803,11 +1798,9 @@ microblaze_option_override (void)
+@@ -1798,11 +1793,9 @@ microblaze_option_override (void)
  #endif
        microblaze_no_unsafe_delay = 0;
        microblaze_pipe = MICROBLAZE_PIPE_5;
@@ -215,7 +209,7 @@ index 8013a2c..3f68ef0 100644
         {
           /* Pattern compares are to be turned on by default only when 
              compiling for MB v5.00.'z'.  */
-@@ -1815,7 +1808,7 @@ microblaze_option_override (void)
+@@ -1810,7 +1803,7 @@ microblaze_option_override (void)
         }
      }
  
@@ -224,7 +218,7 @@ index 8013a2c..3f68ef0 100644
    if (ver < 0)
      {
        if (TARGET_MULTIPLY_HIGH)
-@@ -1824,7 +1817,7 @@ microblaze_option_override (void)
+@@ -1819,7 +1812,7 @@ microblaze_option_override (void)
                  "%<-mcpu=v6.00.a%> or greater");
      }
  
@@ -233,7 +227,7 @@ index 8013a2c..3f68ef0 100644
    microblaze_has_clz = 1;
    if (ver < 0)
      {
-@@ -1833,7 +1826,7 @@ microblaze_option_override (void)
+@@ -1828,7 +1821,7 @@ microblaze_option_override (void)
      }
  
    /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified.  */
@@ -243,5 +237,5 @@ index 8013a2c..3f68ef0 100644
      {
          if (TARGET_REORDER == 1)
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch
index 91ac0d02..0c80cf81 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixing-the-issue-with-the-builtin_alloc.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch
@@ -1,9 +1,10 @@
-From e672184af6a43b773131181270c7a8c5c5273bd8 Mon Sep 17 00:00:00 2001
+From 87da245d89fffe6a025037b4a53f66dafa7e1f84 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 23 Feb 2017 17:09:04 +0530
-Subject: [PATCH 35/63] Fixing the issue with the builtin_alloc. register r18
- was not properly handling the stack pattern which was resolved by using free
- available register
+Subject: [PATCH 31/58] Fixing the issue with the builtin_alloc.
+
+register r18 was not properly handling the stack pattern
+which was resolved by using free available register
 
 signed-off-by:nagaraju mekala <nmekala@xilinx.com>
 ---
@@ -11,7 +12,7 @@ signed-off-by:nagaraju mekala <nmekala@xilinx.com>
  1 file changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 67b298a..7bae957 100644
+index fa6aabdb9d4..9de46d0ce24 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2078,10 +2078,10 @@
@@ -40,5 +41,5 @@ index 67b298a..7bae957 100644
    }
  )
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
index ba0f8e80..458af563 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
@@ -1,15 +1,15 @@
-From f436198b817f33d56aaddb88ff629378498de489 Mon Sep 17 00:00:00 2001
+From 3e8779308d1901b273b2b360bea719aa72d24ab9 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 19 Feb 2018 18:06:16 +0530
-Subject: [PATCH 37/63] [Patch,Microblaze]: update in constraints for bitfield
+Subject: [PATCH 32/58] [Patch,Microblaze]: update in constraints for bitfield
  insert and extract instructions.
 
 ---
- gcc/config/microblaze/microblaze.md | 43 ++++++-------------------------------
+ gcc/config/microblaze/microblaze.md | 43 +++++------------------------
  1 file changed, 7 insertions(+), 36 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 7bae957..6101387 100644
+index 9de46d0ce24..fe94807182b 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2492,33 +2492,17 @@
@@ -76,5 +76,5 @@ index 7bae957..6101387 100644
  (define_insn "insv_32"
    [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch
deleted file mode 100644
index 68f70ae8..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 51da0572e0650378e422030b26d1258c8fc76df6 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 18 Jan 2017 13:57:48 +0530
-Subject: [PATCH 33/63] Fixing the bug in the bit-field instruction. Bit field
- instruction should be generated only if mcpu >10.0
-
----
- gcc/config/microblaze/microblaze.c | 3 +++
- gcc/config/microblaze/microblaze.h | 2 ++
- 2 files changed, 5 insertions(+)
-
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 3f68ef0..a37f08eea 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay;
- /* Set to one if the targeted core has the CLZ insn.  */
- int microblaze_has_clz = 0;
- 
-+/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */
-+int microblaze_has_bitfield = 0;
-+
- /* Which CPU pipeline do we use. We haven't really standardized on a CPU 
-    version having only a particular type of pipeline. There can still be 
-    options on the CPU to scale pipeline features up or down. :( 
-diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index bf7f3b4..1d05e6e 100644
---- a/gcc/config/microblaze/microblaze.h
-+++ b/gcc/config/microblaze/microblaze.h
-@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[];
- 
- extern int microblaze_no_unsafe_delay;
- extern int microblaze_has_clz;
-+extern int microblaze_has_bitfield;
- extern enum pipeline_type microblaze_pipe;
- 
- #define OBJECT_FORMAT_ELF
-@@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe;
- 
- /* Do we have CLZ?  */
- #define TARGET_HAS_CLZ      (TARGET_PATTERN_COMPARE && microblaze_has_clz)
-+#define TARGET_HAS_BITFIELD      (TARGET_BARREL_SHIFT && microblaze_has_bitfield)
- 
- /* The default is to support PIC.  */
- #define TARGET_SUPPORTS_PIC 1
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
index 2b90880f..32433470 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
@@ -1,7 +1,7 @@
-From 89aa1907ab0abad38e394f46f7e5f577bdb26498 Mon Sep 17 00:00:00 2001
+From eb90da1d616dfb7481b3f7c74a2be40e921a24f2 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 4 Jun 2018 10:10:18 +0530
-Subject: [PATCH 38/63] [Patch,Microblaze] : Removed fsqrt generation for
+Subject: [PATCH 33/58] [Patch,Microblaze] : Removed fsqrt generation for
  double values.
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 38/63] [Patch,Microblaze] : Removed fsqrt generation for
  1 file changed, 14 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 6101387..eb01221 100644
+index fe94807182b..a527da70f8a 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -526,20 +526,6 @@
@@ -34,5 +34,5 @@ index 6101387..eb01221 100644
    [(set (match_operand:SI 0 "register_operand" "=d")
          (fix:SI (match_operand:SF 1 "register_operand" "d")))]
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Intial-commit-of-64-bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch
index f524cba2..acf14b23 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Intial-commit-of-64-bit-Microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch
@@ -1,21 +1,37 @@
-From 68359cc8e82f63d01a77c39c68e782e6757cd71e Mon Sep 17 00:00:00 2001
+From 9600049313b095d6d7d8ea46a7ab783fabae71a2 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 3 Apr 2018 16:48:39 +0530
-Subject: [PATCH 39/63] Intial commit of 64-bit Microblaze
+Subject: [PATCH 34/58] Intial commit of 64-bit Microblaze
 
-Conflicts:
-        gcc/config/microblaze/microblaze.opt
+Added load store pattern movdi and also adding missing files
 ---
+ gcc/config/microblaze/constraints.md      |   5 +
  gcc/config/microblaze/microblaze-protos.h |   1 +
- gcc/config/microblaze/microblaze.c        | 109 +++++++--
+ gcc/config/microblaze/microblaze.c        | 109 ++++--
  gcc/config/microblaze/microblaze.h        |   4 +-
- gcc/config/microblaze/microblaze.md       | 370 +++++++++++++++++++++++++++++-
+ gcc/config/microblaze/microblaze.md       | 394 +++++++++++++++++++++-
  gcc/config/microblaze/microblaze.opt      |   7 +-
  gcc/config/microblaze/t-microblaze        |   7 +-
- 6 files changed, 460 insertions(+), 38 deletions(-)
+ 7 files changed, 490 insertions(+), 37 deletions(-)
 
+diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
+index b9fc6e3fae2..f636b035280 100644
+--- a/gcc/config/microblaze/constraints.md
++++ b/gcc/config/microblaze/constraints.md
+@@ -52,6 +52,11 @@
+   (and (match_code "const_int")
+        (match_test "ival > 0 && ival < 0x10000")))
+ 
++(define_constraint "K"
++  "A constant in the range 0xffffff8000000000L  to 0x0000007fffffffffL (inclusive)."
++  (and (match_code "const_int")
++       (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL")))
++
+ ;; Define floating point constraints
+ 
+ (define_constraint "G"
 diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index bdc9b69..7d6c189 100644
+index 76ffc682df2..b8a3321dbdf 100644
 --- a/gcc/config/microblaze/microblaze-protos.h
 +++ b/gcc/config/microblaze/microblaze-protos.h
 @@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *);
@@ -27,10 +43,10 @@ index bdc9b69..7d6c189 100644
  extern void print_operand (FILE *, rtx, int);
  extern void print_operand_address (FILE *, rtx);
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 71640e5..f740f5c 100644
+index 4b5699671e8..8a3ccae558a 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -3570,11 +3570,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3562,11 +3562,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
    op0 = operands[0];
    op1 = operands[1];
  
@@ -45,7 +61,7 @@ index 71640e5..f740f5c 100644
        emit_move_insn (op0, temp);
        return true;
      }
-@@ -3639,12 +3639,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3631,12 +3631,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
                   && (flag_pic == 2 || microblaze_tls_symbol_p (p0)
                       || !SMALL_INT (p1)))))
         {
@@ -60,7 +76,7 @@ index 71640e5..f740f5c 100644
           return true;
         }
      }
-@@ -3775,7 +3775,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3767,7 +3767,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
    rtx cmp_op0 = operands[1];
    rtx cmp_op1 = operands[2];
    rtx label1 = operands[3];
@@ -69,7 +85,7 @@ index 71640e5..f740f5c 100644
    rtx condition;
  
    gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));
-@@ -3784,23 +3784,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3776,23 +3776,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
    if (cmp_op1 == const0_rtx)
      {
        comp_reg = cmp_op0;
@@ -112,7 +128,7 @@ index 71640e5..f740f5c 100644
      }
  }
  
-@@ -3811,7 +3824,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3803,7 +3816,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
    rtx cmp_op0 = operands[1];
    rtx cmp_op1 = operands[2];
    rtx label1 = operands[3];
@@ -121,7 +137,7 @@ index 71640e5..f740f5c 100644
    rtx condition;
  
    gcc_assert ((GET_CODE (cmp_op0) == REG)
-@@ -3822,30 +3835,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3814,30 +3827,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code),
@@ -197,7 +213,7 @@ index 71640e5..f740f5c 100644
      }
  }
  
-@@ -3862,6 +3908,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3854,6 +3900,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
    emit_jump_insn (gen_condjump (condition, operands[3]));
  }
  
@@ -218,7 +234,7 @@ index 71640e5..f740f5c 100644
  
  static bool
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 1d05e6e..2ca44f5 100644
+index b5b7b22cec9..4931895e650 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe;
@@ -247,7 +263,7 @@ index 1d05e6e..2ca44f5 100644
  #define FLOAT_TYPE_SIZE         32
  #define DOUBLE_TYPE_SIZE        64
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index eb01221..dbb592e 100644
+index a527da70f8a..bcf2b9244f8 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -497,7 +497,6 @@
@@ -440,15 +456,39 @@ index eb01221..dbb592e 100644
  ;; Those for integer source operand are ordered
  ;; widest source type first.
  
-@@ -1011,7 +1122,6 @@
+@@ -1011,6 +1122,31 @@
  )
  
  
--
++(define_insn "*movdi_internal_64"
++  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
++       (match_operand:DI 1 "general_operand"      " d,K,J,R,o,d,d"))]
++  "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)"
++  { 
++    switch (which_alternative)
++    {
++      case 0:
++        return "addlk\t%0,%1";
++      case 1:
++       return "addlik\t%0,r0,%1";
++      case 2:
++         return "addlk\t%0,r0,r0";
++      case 3:
++      case 4:
++         return "lli\t%0,%1";
++      case 5:
++      case 6:
++        return "sli\t%1,%0";
++    }
++    return "unreachable";
++  }
++  [(set_attr "type"    "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store")
++  (set_attr "mode"     "DI")
++  (set_attr "length"   "8,8,8,8,12,8,12")])
+ 
  (define_insn "*movdi_internal"
    [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
-        (match_operand:DI 1 "general_operand"      " d,i,J,R,o,d,d"))]
-@@ -1423,6 +1533,36 @@
+@@ -1423,6 +1559,36 @@
    (set_attr "length"   "4,4")]
  )
  
@@ -485,7 +525,7 @@ index eb01221..dbb592e 100644
  ;; The following patterns apply when there is no barrel shifter present
  
  (define_insn "*ashlsi3_with_mul_delay"
-@@ -1548,6 +1688,36 @@
+@@ -1548,6 +1714,36 @@
  ;;----------------------------------------------------------------
  ;; 32-bit right shifts
  ;;----------------------------------------------------------------
@@ -522,7 +562,7 @@ index eb01221..dbb592e 100644
  (define_expand "ashrsi3"
    [(set (match_operand:SI 0 "register_operand" "=&d")
         (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -1657,6 +1827,36 @@
+@@ -1657,6 +1853,36 @@
  ;;----------------------------------------------------------------
  ;; 32-bit right shifts (logical)
  ;;----------------------------------------------------------------
@@ -559,7 +599,7 @@ index eb01221..dbb592e 100644
  
  (define_expand "lshrsi3"
    [(set (match_operand:SI 0 "register_operand" "=&d")
-@@ -1803,6 +2003,8 @@
+@@ -1803,6 +2029,8 @@
    (set_attr "length"   "4")]
  )              
  
@@ -568,7 +608,7 @@ index eb01221..dbb592e 100644
  ;;----------------------------------------------------------------
  ;; Setting a register from an floating point comparison. 
  ;;----------------------------------------------------------------
-@@ -1818,6 +2020,18 @@
+@@ -1818,6 +2046,18 @@
     (set_attr "length"    "4")]
  )
  
@@ -587,7 +627,7 @@ index eb01221..dbb592e 100644
  ;;----------------------------------------------------------------
  ;; Conditional branches
  ;;----------------------------------------------------------------
-@@ -1930,6 +2144,115 @@
+@@ -1930,6 +2170,115 @@
     (set_attr "length"   "12")]
  )
  
@@ -703,7 +743,7 @@ index eb01221..dbb592e 100644
  ;;----------------------------------------------------------------
  ;; Unconditional branches
  ;;----------------------------------------------------------------
-@@ -2478,17 +2801,33 @@
+@@ -2478,17 +2827,33 @@
    DONE;
  }")
  
@@ -742,7 +782,7 @@ index eb01221..dbb592e 100644
    [(set (match_operand:SI 0 "register_operand" "=r")
         (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
                          (match_operand:SI 2 "immediate_operand" "I")
-@@ -2505,8 +2844,21 @@
+@@ -2505,8 +2870,21 @@
                          (match_operand:SI 2 "immediate_operand" "I"))
         (match_operand:SI 3 "register_operand" "r"))]
   "TARGET_HAS_BITFIELD"
@@ -767,7 +807,7 @@ index eb01221..dbb592e 100644
  (define_insn "insv_32"
    [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
 diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt
-index d23f376..f316e27 100644
+index a29c6f8df90..bbe48b06da6 100644
 --- a/gcc/config/microblaze/microblaze.opt
 +++ b/gcc/config/microblaze/microblaze.opt
 @@ -136,4 +136,9 @@ Target
@@ -782,7 +822,7 @@ index d23f376..f316e27 100644
 +MicroBlaze 64-bit mode.
 +
 diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 41fa9a9..e9a1921 100644
+index 41fa9a92081..7671f63c5b5 100644
 --- a/gcc/config/microblaze/t-microblaze
 +++ b/gcc/config/microblaze/t-microblaze
 @@ -1,8 +1,11 @@
@@ -794,11 +834,11 @@ index 41fa9a9..e9a1921 100644
  MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian
 +MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64
  MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian
-+MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
-+MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
++#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
++#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
  
  # Extra files
  microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch
deleted file mode 100644
index 04326205..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 132b913b721f66c5db17f62dd5559bbca11bb875 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 18 Jan 2017 20:57:10 +0530
-Subject: [PATCH 34/63] [Patch, microblaze]: Macros used in Xilinx internal
- patches has been removed in gcc 6.2 version so modified the code accordingly.
-
----
- gcc/config/microblaze/microblaze.c | 8 +++-----
- 1 file changed, 3 insertions(+), 5 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index a37f08eea..71640e5 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -2597,11 +2597,9 @@ print_operand (FILE * file, rtx op, int letter)
-            REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
-          else
-            {
--             REAL_VALUE_TYPE rv;
--             REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
--             REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
--             val[1] = l[WORDS_BIG_ENDIAN == 0];
--             val[0] = l[WORDS_BIG_ENDIAN != 0];
-+              REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
-+              val[1] = l[WORDS_BIG_ENDIAN == 0];
-+              val[0] = l[WORDS_BIG_ENDIAN != 0];
-            }
-        }
-       else if (code == CONST_INT)
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Intial-commit-for-64bit-MB-sources.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch
index b022eb77..e7872d54 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Intial-commit-for-64bit-MB-sources.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch
@@ -1,25 +1,25 @@
-From 7c68b1c9771f09f7cc53410248e8432c562d24bf Mon Sep 17 00:00:00 2001
+From 8660e76d664ee4b42a83a4c15344b072d3c879df Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 27 Jul 2018 15:23:41 +0530
-Subject: [PATCH 41/63] Intial commit for 64bit-MB sources. Need to cleanup the
- code later.
+Subject: [PATCH 35/58] Intial commit for 64bit-MB sources.
 
+Need to cleanup the code later.
 ---
  gcc/config/microblaze/constraints.md    |   2 +-
  gcc/config/microblaze/microblaze-c.c    |   6 +
- gcc/config/microblaze/microblaze.c      | 218 ++++++++----
- gcc/config/microblaze/microblaze.h      |  63 ++--
- gcc/config/microblaze/microblaze.md     | 606 ++++++++++++++++++++++++--------
+ gcc/config/microblaze/microblaze.c      | 218 ++++++---
+ gcc/config/microblaze/microblaze.h      |  63 ++-
+ gcc/config/microblaze/microblaze.md     | 606 ++++++++++++++++++------
  gcc/config/microblaze/t-microblaze      |   7 +-
  libgcc/config/microblaze/crti.S         |   4 +-
  libgcc/config/microblaze/crtn.S         |   4 +-
- libgcc/config/microblaze/divdi3.S       |  98 ++++++
- libgcc/config/microblaze/divdi3_table.c |  62 ++++
- libgcc/config/microblaze/moddi3.S       |  97 +++++
- libgcc/config/microblaze/muldi3.S       |  73 ++++
+ libgcc/config/microblaze/divdi3.S       |  98 ++++
+ libgcc/config/microblaze/divdi3_table.c |  62 +++
+ libgcc/config/microblaze/moddi3.S       |  97 ++++
+ libgcc/config/microblaze/muldi3.S       |  73 +++
  libgcc/config/microblaze/t-microblaze   |  11 +-
- libgcc/config/microblaze/udivdi3.S      | 107 ++++++
- libgcc/config/microblaze/umoddi3.S      | 110 ++++++
+ libgcc/config/microblaze/udivdi3.S      | 107 +++++
+ libgcc/config/microblaze/umoddi3.S      | 110 +++++
  15 files changed, 1232 insertions(+), 236 deletions(-)
  create mode 100644 libgcc/config/microblaze/divdi3.S
  create mode 100644 libgcc/config/microblaze/divdi3_table.c
@@ -29,7 +29,7 @@ Subject: [PATCH 41/63] Intial commit for 64bit-MB sources. Need to cleanup the
  create mode 100644 libgcc/config/microblaze/umoddi3.S
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 69bcb24..2fce91e 100644
+index f636b035280..c2b0a21c53b 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -55,7 +55,7 @@
@@ -42,7 +42,7 @@ index 69bcb24..2fce91e 100644
  ;; Define floating point constraints
  
 diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c
-index cd21319..d2b0c76 100644
+index d8c88e510e5..dbcd21fc6ee 100644
 --- a/gcc/config/microblaze/microblaze-c.c
 +++ b/gcc/config/microblaze/microblaze-c.c
 @@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile)
@@ -57,7 +57,7 @@ index cd21319..d2b0c76 100644
 +    }
  }  
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index f740f5c..d5ff7af 100644
+index 8a3ccae558a..3ecda553fe6 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
 @@ -383,10 +383,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED)
@@ -118,7 +118,7 @@ index f740f5c..d5ff7af 100644
  
    /* Mop up any left-over bytes.  */
    if (leftover)
-@@ -1634,14 +1642,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v,
+@@ -1633,14 +1641,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v,
        break;
  
      case E_DFmode:
@@ -141,7 +141,7 @@ index f740f5c..d5ff7af 100644
        break;
  
      case E_QImode:
-@@ -2295,7 +2309,7 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2285,7 +2299,7 @@ compute_frame_size (HOST_WIDE_INT size)
  
           if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM)
             /* Don't account for link register. It is accounted specially below.  */
@@ -150,7 +150,7 @@ index f740f5c..d5ff7af 100644
  
           mask |= (1L << (regno - GP_REG_FIRST));
         }
-@@ -2564,7 +2578,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2554,7 +2568,7 @@ print_operand (FILE * file, rtx op, int letter)
  
        if ((letter == 'M' && !WORDS_BIG_ENDIAN)
           || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D')
@@ -159,7 +159,7 @@ index f740f5c..d5ff7af 100644
  
        fprintf (file, "%s", reg_names[regnum]);
      }
-@@ -2590,6 +2604,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2580,6 +2594,7 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -167,7 +167,7 @@ index f740f5c..d5ff7af 100644
        long l[2];
        if (code == CONST_DOUBLE)
         {
-@@ -2602,12 +2617,12 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2592,12 +2607,12 @@ print_operand (FILE * file, rtx op, int letter)
                val[0] = l[WORDS_BIG_ENDIAN != 0];
             }
         }
@@ -184,7 +184,7 @@ index f740f5c..d5ff7af 100644
      }
    else if (code == CONST_DOUBLE)
      {
-@@ -2801,7 +2816,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
+@@ -2791,7 +2806,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
  
      switch_to_section (get_section (section, 0, NULL));
      assemble_align (POINTER_SIZE);
@@ -196,7 +196,7 @@ index f740f5c..d5ff7af 100644
      output_addr_const (asm_out_file, symbol);
      fputs ("\n", asm_out_file);
  }
-@@ -2824,7 +2842,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
+@@ -2814,7 +2832,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
  
      switch_to_section (get_section (section, 0, NULL));
      assemble_align (POINTER_SIZE);
@@ -208,7 +208,7 @@ index f740f5c..d5ff7af 100644
      output_addr_const (asm_out_file, symbol);
      fputs ("\n", asm_out_file);
  }
-@@ -2890,7 +2911,7 @@ save_restore_insns (int prologue)
+@@ -2880,7 +2901,7 @@ save_restore_insns (int prologue)
    /* For interrupt_handlers, need to save/restore the MSR.  */
    if (microblaze_is_interrupt_variant ())
      {
@@ -217,7 +217,7 @@ index f740f5c..d5ff7af 100644
                                  gen_rtx_PLUS (Pmode, base_reg_rtx,
                                                GEN_INT (current_frame_info.
                                                         gp_offset -
-@@ -2898,8 +2919,8 @@ save_restore_insns (int prologue)
+@@ -2888,8 +2909,8 @@ save_restore_insns (int prologue)
  
        /* Do not optimize in flow analysis.  */
        MEM_VOLATILE_P (isr_mem_rtx) = 1;
@@ -228,7 +228,7 @@ index f740f5c..d5ff7af 100644
      }
  
    if (microblaze_is_interrupt_variant () && !prologue)
-@@ -2907,8 +2928,8 @@ save_restore_insns (int prologue)
+@@ -2897,8 +2918,8 @@ save_restore_insns (int prologue)
        emit_move_insn (isr_reg_rtx, isr_mem_rtx);
        emit_move_insn (isr_msr_rtx, isr_reg_rtx);
        /* Do not optimize in flow analysis.  */
@@ -239,7 +239,7 @@ index f740f5c..d5ff7af 100644
      }
  
    for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-@@ -2919,9 +2940,9 @@ save_restore_insns (int prologue)
+@@ -2909,9 +2930,9 @@ save_restore_insns (int prologue)
             /* Don't handle here. Already handled as the first register.  */
             continue;
  
@@ -251,7 +251,7 @@ index f740f5c..d5ff7af 100644
           if (microblaze_is_interrupt_variant () || save_volatiles)
             /* Do not optimize in flow analysis.  */
             MEM_VOLATILE_P (mem_rtx) = 1;
-@@ -2936,7 +2957,7 @@ save_restore_insns (int prologue)
+@@ -2926,7 +2947,7 @@ save_restore_insns (int prologue)
               insn = emit_move_insn (reg_rtx, mem_rtx);
             }
  
@@ -260,7 +260,7 @@ index f740f5c..d5ff7af 100644
         }
      }
  
-@@ -2946,8 +2967,8 @@ save_restore_insns (int prologue)
+@@ -2936,8 +2957,8 @@ save_restore_insns (int prologue)
        emit_move_insn (isr_mem_rtx, isr_reg_rtx);
  
        /* Do not optimize in flow analysis.  */
@@ -271,7 +271,7 @@ index f740f5c..d5ff7af 100644
      }
  
    /* Done saving and restoring */
-@@ -3037,7 +3058,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
+@@ -3027,7 +3048,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
  
    switch_to_section (s);
    assemble_align (POINTER_SIZE);
@@ -283,7 +283,7 @@ index f740f5c..d5ff7af 100644
    output_addr_const (asm_out_file, symbol);
    fputs ("\n", asm_out_file);
  }
-@@ -3182,10 +3206,10 @@ microblaze_expand_prologue (void)
+@@ -3171,10 +3195,10 @@ microblaze_expand_prologue (void)
         {
           if (offset != 0)
             ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
@@ -297,7 +297,7 @@ index f740f5c..d5ff7af 100644
         }
      }
  
-@@ -3194,15 +3218,23 @@ microblaze_expand_prologue (void)
+@@ -3183,15 +3207,23 @@ microblaze_expand_prologue (void)
        rtx fsiz_rtx = GEN_INT (fsiz);
  
        rtx_insn *insn = NULL;
@@ -323,7 +323,7 @@ index f740f5c..d5ff7af 100644
                                  gen_rtx_PLUS (Pmode, stack_pointer_rtx,
                                                const0_rtx));
  
-@@ -3210,7 +3242,7 @@ microblaze_expand_prologue (void)
+@@ -3199,7 +3231,7 @@ microblaze_expand_prologue (void)
             /* Do not optimize in flow analysis.  */
             MEM_VOLATILE_P (mem_rtx) = 1;
  
@@ -332,7 +332,7 @@ index f740f5c..d5ff7af 100644
           insn = emit_move_insn (mem_rtx, reg_rtx);
           RTX_FRAME_RELATED_P (insn) = 1;
         }
-@@ -3320,12 +3352,12 @@ microblaze_expand_epilogue (void)
+@@ -3309,12 +3341,12 @@ microblaze_expand_epilogue (void)
        if (!crtl->is_leaf || interrupt_handler)
         {
           mem_rtx =
@@ -347,7 +347,7 @@ index f740f5c..d5ff7af 100644
           emit_move_insn (reg_rtx, mem_rtx);
         }
  
-@@ -3341,15 +3373,25 @@ microblaze_expand_epilogue (void)
+@@ -3330,15 +3362,25 @@ microblaze_expand_epilogue (void)
        /* _restore_ registers for epilogue.  */
        save_restore_insns (0);
        emit_insn (gen_blockage ());
@@ -377,7 +377,7 @@ index f740f5c..d5ff7af 100644
    emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
                                                     MB_ABI_SUB_RETURN_ADDR_REGNUM)));
  }
-@@ -3515,9 +3557,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3505,9 +3547,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
    else
      this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM);
  
@@ -394,7 +394,7 @@ index f740f5c..d5ff7af 100644
  
    /* Apply the offset from the vtable, if required.  */
    if (vcall_offset)
-@@ -3530,7 +3577,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3520,7 +3567,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
      rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx);
      emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc));
  
@@ -406,7 +406,7 @@ index f740f5c..d5ff7af 100644
    }
  
    /* Generate a tail call to the target function.  */
-@@ -3704,7 +3754,7 @@ microblaze_eh_return (rtx op0)
+@@ -3696,7 +3746,7 @@ microblaze_eh_return (rtx op0)
  /* Queue an .ident string in the queue of top-level asm statements.
     If the string size is below the threshold, put it into .sdata2.
     If the front-end is done, we must be being called from toplev.c.
@@ -415,7 +415,7 @@ index f740f5c..d5ff7af 100644
  void 
  microblaze_asm_output_ident (const char *string)
  {
-@@ -3759,9 +3809,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+@@ -3751,9 +3801,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
    emit_block_move (m_tramp, assemble_trampoline_template (),
                    GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL);
  
@@ -427,7 +427,7 @@ index f740f5c..d5ff7af 100644
    emit_move_insn (mem, fnaddr);
  }
  
-@@ -3785,7 +3835,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3777,7 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -436,7 +436,7 @@ index f740f5c..d5ff7af 100644
          emit_jump_insn (gen_condjump (condition, label1));
        else
          emit_jump_insn (gen_long_condjump (condition, label1));
-@@ -3904,7 +3954,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3896,7 +3946,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
    rtx comp_reg = gen_reg_rtx (SImode);
  
    emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
@@ -445,7 +445,7 @@ index f740f5c..d5ff7af 100644
    emit_jump_insn (gen_condjump (condition, operands[3]));
  }
  
-@@ -3914,10 +3964,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3906,10 +3956,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
    rtx condition;
    rtx cmp_op0 = XEXP (operands[0], 0);
    rtx cmp_op1 = XEXP (operands[0], 1);
@@ -458,7 +458,7 @@ index f740f5c..d5ff7af 100644
    emit_jump_insn (gen_long_condjump (condition, operands[3]));
  }
  
-@@ -3938,8 +3988,8 @@ microblaze_expand_divide (rtx operands[])
+@@ -3930,8 +3980,8 @@ microblaze_expand_divide (rtx operands[])
  {
    /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15).  */
  
@@ -469,7 +469,7 @@ index f740f5c..d5ff7af 100644
    rtx regqi = gen_reg_rtx (QImode);
    rtx_code_label *div_label = gen_label_rtx ();
    rtx_code_label *div_end_label = gen_label_rtx ();
-@@ -3947,17 +3997,31 @@ microblaze_expand_divide (rtx operands[])
+@@ -3939,17 +3989,31 @@ microblaze_expand_divide (rtx operands[])
    rtx mem_rtx;
    rtx ret;
    rtx_insn *jump, *cjump, *insn;
@@ -508,7 +508,7 @@ index f740f5c..d5ff7af 100644
    mem_rtx = gen_rtx_MEM (QImode,
                              gen_rtx_PLUS (QImode, regt1, div_table_rtx));
  
-@@ -4104,7 +4168,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -4096,7 +4160,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
                {
                  insn =
                    emit_insn_before (gen_iprefetch
@@ -517,7 +517,7 @@ index f740f5c..d5ff7af 100644
                                      before_4);
                  recog_memoized (insn);
                  INSN_LOCATION (insn) = INSN_LOCATION (before_4);
-@@ -4114,7 +4178,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -4106,7 +4170,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
             }
         }
  }
@@ -546,7 +546,7 @@ index f740f5c..d5ff7af 100644
  /* Insert instruction prefetch instruction at the fall
     through path of the function call.  */
  
-@@ -4267,6 +4351,17 @@ microblaze_starting_frame_offset (void)
+@@ -4259,6 +4343,17 @@ microblaze_starting_frame_offset (void)
  #undef TARGET_LRA_P
  #define TARGET_LRA_P hook_bool_void_false
  
@@ -564,7 +564,7 @@ index f740f5c..d5ff7af 100644
  #undef TARGET_FRAME_POINTER_REQUIRED
  #define TARGET_FRAME_POINTER_REQUIRED  microblaze_frame_pointer_required
  
-@@ -4276,6 +4371,9 @@ microblaze_starting_frame_offset (void)
+@@ -4268,6 +4363,9 @@ microblaze_starting_frame_offset (void)
  #undef  TARGET_TRAMPOLINE_INIT
  #define TARGET_TRAMPOLINE_INIT         microblaze_trampoline_init
  
@@ -575,7 +575,7 @@ index f740f5c..d5ff7af 100644
  #define TARGET_PROMOTE_FUNCTION_MODE   default_promote_function_mode_always_promote
  
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 2ca44f5..a23fd4e 100644
+index 4931895e650..1f6e2059545 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe;
@@ -744,7 +744,7 @@ index 2ca44f5..a23fd4e 100644
  /* Default to -G 8 */
  #ifndef MICROBLAZE_DEFAULT_GVALUE
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index eb52957..77627a7 100644
+index bcf2b9244f8..bef750c026a 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -26,6 +26,7 @@
@@ -1797,7 +1797,7 @@ index eb52957..77627a7 100644
                           operands[2], operands[3]));
    DONE;
 diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 7671f63..9fc80b1 100644
+index 7671f63c5b5..9fc80b142ce 100644
 --- a/gcc/config/microblaze/t-microblaze
 +++ b/gcc/config/microblaze/t-microblaze
 @@ -2,10 +2,11 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en
@@ -1816,7 +1816,7 @@ index 7671f63..9fc80b1 100644
  # Extra files
  microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
-index ee380ee..1811327 100644
+index d0146083db6..005825f1ec5 100644
 --- a/libgcc/config/microblaze/crti.S
 +++ b/libgcc/config/microblaze/crti.S
 @@ -40,7 +40,7 @@
@@ -1836,7 +1836,7 @@ index ee380ee..1811327 100644
 +    addik   r1, r1, -16
      sw      r15, r0, r1
 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
-index 00d398a..60a4648 100644
+index 2fff5ac04c7..5705eff9a4a 100644
 --- a/libgcc/config/microblaze/crtn.S
 +++ b/libgcc/config/microblaze/crtn.S
 @@ -33,9 +33,9 @@
@@ -1853,7 +1853,7 @@ index 00d398a..60a4648 100644
 +    addik   r1, r1, 16   
 diff --git a/libgcc/config/microblaze/divdi3.S b/libgcc/config/microblaze/divdi3.S
 new file mode 100644
-index 0000000..d37bf51
+index 00000000000..d37bf5165c6
 --- /dev/null
 +++ b/libgcc/config/microblaze/divdi3.S
 @@ -0,0 +1,98 @@
@@ -1957,7 +1957,7 @@ index 0000000..d37bf51
 +#endif
 diff --git a/libgcc/config/microblaze/divdi3_table.c b/libgcc/config/microblaze/divdi3_table.c
 new file mode 100644
-index 0000000..8096259
+index 00000000000..80962597ea5
 --- /dev/null
 +++ b/libgcc/config/microblaze/divdi3_table.c
 @@ -0,0 +1,62 @@
@@ -2025,7 +2025,7 @@ index 0000000..8096259
 +
 diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S
 new file mode 100644
-index 0000000..5d3f7c0
+index 00000000000..5d3f7c03fc8
 --- /dev/null
 +++ b/libgcc/config/microblaze/moddi3.S
 @@ -0,0 +1,97 @@
@@ -2128,7 +2128,7 @@ index 0000000..5d3f7c0
 +#endif
 diff --git a/libgcc/config/microblaze/muldi3.S b/libgcc/config/microblaze/muldi3.S
 new file mode 100644
-index 0000000..5677841
+index 00000000000..567784197d3
 --- /dev/null
 +++ b/libgcc/config/microblaze/muldi3.S
 @@ -0,0 +1,73 @@
@@ -2206,7 +2206,7 @@ index 0000000..5677841
 +       .size   __muldi3, . - __muldi3
 +#endif
 diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze
-index 8d954a4..35021b2 100644
+index 8d954a49575..35021b24b7d 100644
 --- a/libgcc/config/microblaze/t-microblaze
 +++ b/libgcc/config/microblaze/t-microblaze
 @@ -1,11 +1,16 @@
@@ -2231,7 +2231,7 @@ index 8d954a4..35021b2 100644
 +        $(srcdir)/config/microblaze/divsi3_table.c \
 diff --git a/libgcc/config/microblaze/udivdi3.S b/libgcc/config/microblaze/udivdi3.S
 new file mode 100644
-index 0000000..c210fbc
+index 00000000000..c210fbc7128
 --- /dev/null
 +++ b/libgcc/config/microblaze/udivdi3.S
 @@ -0,0 +1,107 @@
@@ -2344,7 +2344,7 @@ index 0000000..c210fbc
 +#endif
 diff --git a/libgcc/config/microblaze/umoddi3.S b/libgcc/config/microblaze/umoddi3.S
 new file mode 100644
-index 0000000..7f5cd23
+index 00000000000..7f5cd23f9a1
 --- /dev/null
 +++ b/libgcc/config/microblaze/umoddi3.S
 @@ -0,0 +1,110 @@
@@ -2459,5 +2459,5 @@ index 0000000..7f5cd23
 +       .size   __umoddi3, . - __umoddi3
 +#endif
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch
deleted file mode 100644
index 7079789f..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From ac30efb4a5f5b6d289fdd27b268c2095d60dcb42 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 2 Mar 2017 19:02:31 +0530
-Subject: [PATCH 36/63] [Patch,Microblaze]:reverting the cost check before
- propagating constants.
-
----
- gcc/cprop.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/gcc/cprop.c b/gcc/cprop.c
-index 65c0130..42bcc81 100644
---- a/gcc/cprop.c
-+++ b/gcc/cprop.c
-@@ -733,6 +733,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-   int success = 0;
-   rtx set = single_set (insn);
- 
-+#if 0
-   bool check_rtx_costs = true;
-   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
-   int old_cost = set ? set_rtx_cost (set, speed) : 0;
-@@ -744,6 +745,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-          && (GET_CODE (XEXP (note, 0)) == CONST
-              || CONSTANT_P (XEXP (note, 0)))))
-     check_rtx_costs = false;
-+#endif
- 
-   /* Usually we substitute easy stuff, so we won't copy everything.
-      We however need to take care to not duplicate non-trivial CONST
-@@ -752,6 +754,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
- 
-   validate_replace_src_group (from, to, insn);
- 
-+#if 0
-   /* If TO is a constant, check the cost of the set after propagation
-      to the cost of the set before the propagation.  If the cost is
-      higher, then do not replace FROM with TO.  */
-@@ -764,6 +767,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-       return false;
-     }
- 
-+#endif
- 
-   if (num_changes_pending () && apply_change_group ())
-     success = 1;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-re-arrangement-of-the-compare-branches.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch
index 3afb7629..63290129 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-re-arrangement-of-the-compare-branches.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch
@@ -1,18 +1,18 @@
-From 31062878a2c1773a1fc94242ad29e6d03e4828b1 Mon Sep 17 00:00:00 2001
+From e259b63769bf3cc437a665059add98d9480d942c Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 3 Aug 2018 15:41:39 +0530
-Subject: [PATCH 42/63] re-arrangement of the compare branches
+Subject: [PATCH 36/58] re-arrangement of the compare branches
 
 ---
- gcc/config/microblaze/microblaze.c  |  28 ++-----
- gcc/config/microblaze/microblaze.md | 141 +++++++++++++++++-------------------
+ gcc/config/microblaze/microblaze.c  |  28 ++----
+ gcc/config/microblaze/microblaze.md | 141 +++++++++++++---------------
  2 files changed, 73 insertions(+), 96 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index d5ff7af..dd46d93 100644
+index 3ecda553fe6..cba5d86225c 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -3835,11 +3835,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3827,11 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
      {
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -25,7 +25,7 @@ index d5ff7af..dd46d93 100644
      }
  
    else if (code == EQ || code == NE)
-@@ -3850,10 +3846,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3842,10 +3838,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
        else
          emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1));
        condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -37,7 +37,7 @@ index d5ff7af..dd46d93 100644
      }
    else
      {
-@@ -3886,10 +3879,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3878,10 +3871,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
        comp_reg = cmp_op0;
        condition = gen_rtx_fmt_ee (signed_condition (code),
                                    mode, comp_reg, const0_rtx);
@@ -49,7 +49,7 @@ index d5ff7af..dd46d93 100644
      }
    else if (code == EQ)
      {
-@@ -3904,10 +3894,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3896,10 +3886,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
                                             cmp_op1));
         }
        condition = gen_rtx_EQ (mode, comp_reg, const0_rtx);
@@ -61,7 +61,7 @@ index d5ff7af..dd46d93 100644
   
      }
    else if (code == NE)
-@@ -3923,10 +3910,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3915,10 +3902,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
                                             cmp_op1));
         }
        condition = gen_rtx_NE (mode, comp_reg, const0_rtx);
@@ -73,7 +73,7 @@ index d5ff7af..dd46d93 100644
      }
    else
      {
-@@ -3968,7 +3952,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3960,7 +3944,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
  
    emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
    condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx);
@@ -83,7 +83,7 @@ index d5ff7af..dd46d93 100644
  
  /* Implement TARGET_FRAME_POINTER_REQUIRED.  */
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 77627a7..edb7aab 100644
+index bef750c026a..29ebbfc0c03 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2270,7 +2270,27 @@ else
@@ -264,5 +264,5 @@ index 77627a7..edb7aab 100644
  ;; Unconditional branches
  ;;----------------------------------------------------------------
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch
index f4074899..9be04781 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch
@@ -1,7 +1,7 @@
-From 7ab47599c2bec80d622883b3e220827dce89c598 Mon Sep 17 00:00:00 2001
+From 589c4453ab01570d47e6e37e4e546d65398cf58e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 8 Aug 2018 17:37:26 +0530
-Subject: [PATCH 43/63] [Patch,Microblaze] :  previous commit broke the
+Subject: [PATCH 37/58] [Patch,Microblaze] :  previous commit broke the
  handling of SI Branch compare for Microblaze 32-bit..
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 43/63] [Patch,Microblaze] :  previous commit broke the
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index edb7aab..fb22edb 100644
+index 29ebbfc0c03..1a8853056d7 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2226,8 +2226,8 @@ else
@@ -24,5 +24,5 @@ index edb7aab..fb22edb 100644
                        (pc)))]
    ""
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch
index ad287e57..464b5a6d 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch
@@ -1,7 +1,7 @@
-From 23622921a153258de469ff10db4926b83ff0c432 Mon Sep 17 00:00:00 2001
+From cfc6628cdf81a7ab268d2699c9bbc465865681c5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:43:48 +0530
-Subject: [PATCH 44/63] [Patch, Microblaze] : Support of multilibs with m64 ...
+Subject: [PATCH 38/58] [Patch, Microblaze] : Support of multilibs with m64 ...
 
 ---
  gcc/config/microblaze/microblaze-c.c  |  1 +
@@ -10,7 +10,7 @@ Subject: [PATCH 44/63] [Patch, Microblaze] : Support of multilibs with m64 ...
  3 files changed, 10 insertions(+), 17 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c
-index d2b0c76..6670091 100644
+index dbcd21fc6ee..db543edcbe5 100644
 --- a/gcc/config/microblaze/microblaze-c.c
 +++ b/gcc/config/microblaze/microblaze-c.c
 @@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile)
@@ -22,7 +22,7 @@ index d2b0c76..6670091 100644
        builtin_define ("__microblaze64__");
        builtin_define ("__MICROBLAZE64__");
 diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 9fc80b1..35ab9654 100644
+index 9fc80b142ce..35ab9654052 100644
 --- a/gcc/config/microblaze/t-microblaze
 +++ b/gcc/config/microblaze/t-microblaze
 @@ -1,12 +1,9 @@
@@ -45,7 +45,7 @@ index 9fc80b1..35ab9654 100644
  # Extra files
  microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
 diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze
-index 35021b2..8d954a4 100644
+index 35021b24b7d..8d954a49575 100644
 --- a/libgcc/config/microblaze/t-microblaze
 +++ b/libgcc/config/microblaze/t-microblaze
 @@ -1,16 +1,11 @@
@@ -69,5 +69,5 @@ index 35021b2..8d954a4 100644
 -        $(srcdir)/config/microblaze/divsi3_table.c \
 +        $(srcdir)/config/microblaze/divsi3_table.c
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fixed-issues-like.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch
index 3f5f7827..c9d4b8c7 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fixed-issues-like.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch
@@ -1,19 +1,21 @@
-From 6e6fcbe5fafcbebaf63ff071ad947966af0c1559 Mon Sep 17 00:00:00 2001
+From 0405777c25bb8110ebfd8ea69c7df062a4c03d6b Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 11 Sep 2018 14:58:00 +0530
-Subject: [PATCH 45/63] Fixed issues like: 1 Interrupt alignment issue 2 Sign
- extension issue
+Subject: [PATCH 39/58] Fix various issues
 
+Fixed issues like:
+1 Interrupt alignment issue
+2 Sign extension issue
 ---
  gcc/config/microblaze/microblaze.c  | 16 ++++++++++------
  gcc/config/microblaze/microblaze.md |  2 +-
  2 files changed, 11 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index dd46d93..bfa667b 100644
+index cba5d86225c..b94902b8fbb 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2317,9 +2317,14 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2307,9 +2307,14 @@ compute_frame_size (HOST_WIDE_INT size)
  
    total_size += gp_reg_size;
  
@@ -30,7 +32,7 @@ index dd46d93..bfa667b 100644
  
    /* No space to be allocated for link register in leaf functions with no other
       stack requirements.  */
-@@ -2604,7 +2609,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2594,7 +2599,6 @@ print_operand (FILE * file, rtx op, int letter)
    else if (letter == 'h' || letter == 'j')
      {
        long val[2];
@@ -38,7 +40,7 @@ index dd46d93..bfa667b 100644
        long l[2];
        if (code == CONST_DOUBLE)
         {
-@@ -2619,10 +2623,10 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2609,10 +2613,10 @@ print_operand (FILE * file, rtx op, int letter)
         }
        else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF)
          {
@@ -53,7 +55,7 @@ index dd46d93..bfa667b 100644
    else if (code == CONST_DOUBLE)
      {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index fb22edb..4a8fbab 100644
+index 1a8853056d7..7cc26e7d786 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1096,7 +1096,7 @@
@@ -66,5 +68,5 @@ index fb22edb..4a8fbab 100644
          }
      } 
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch
deleted file mode 100644
index a973f4cd..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 95615e1bfae642dc4f5f1b03e1ffaea4f16aa99c Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Wed, 4 Apr 2018 16:41:41 +0530
-Subject: [PATCH 40/63] Added load store pattern movdi and also adding missing
- files
-
----
- gcc/config/microblaze/constraints.md |  5 +++++
- gcc/config/microblaze/microblaze.md  | 26 ++++++++++++++++++++++++++
- gcc/config/microblaze/t-microblaze   |  4 ++--
- 3 files changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 5e1d79a..69bcb24 100644
---- a/gcc/config/microblaze/constraints.md
-+++ b/gcc/config/microblaze/constraints.md
-@@ -52,6 +52,11 @@
-   (and (match_code "const_int")
-        (match_test "ival > 0 && ival < 0x10000")))
- 
-+(define_constraint "K"
-+  "A constant in the range 0xffffff8000000000L  to 0x0000007fffffffffL (inclusive)."
-+  (and (match_code "const_int")
-+       (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL")))
-+
- ;; Define floating point constraints
- 
- (define_constraint "G"
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index dbb592e..eb52957 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -1122,6 +1122,32 @@
- )
- 
- 
-+(define_insn "*movdi_internal_64"
-+  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
-+       (match_operand:DI 1 "general_operand"      " d,K,J,R,o,d,d"))]
-+  "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)"
-+  { 
-+    switch (which_alternative)
-+    {
-+      case 0:
-+        return "addlk\t%0,%1";
-+      case 1:
-+       return "addlik\t%0,r0,%1";
-+      case 2:
-+         return "addlk\t%0,r0,r0";
-+      case 3:
-+      case 4:
-+         return "lli\t%0,%1";
-+      case 5:
-+      case 6:
-+        return "sli\t%1,%0";
-+    }
-+    return "unreachable";
-+  }
-+  [(set_attr "type"    "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store")
-+  (set_attr "mode"     "DI")
-+  (set_attr "length"   "8,8,8,8,12,8,12")])
-+
- (define_insn "*movdi_internal"
-   [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
-        (match_operand:DI 1 "general_operand"      " d,i,J,R,o,d,d"))]
-diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index e9a1921..7671f63 100644
---- a/gcc/config/microblaze/t-microblaze
-+++ b/gcc/config/microblaze/t-microblaze
-@@ -4,8 +4,8 @@ MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high
- MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian
- MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64
- MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian
--MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
--MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
-+#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
-+#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
- 
- # Extra files
- microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Fixed-below-issues.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch
index fc2fe3b5..d5fbf703 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Fixed-below-issues.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch
@@ -1,27 +1,24 @@
-From 7c911a5ae8cf4a7496c059374f170f1919c00f6d Mon Sep 17 00:00:00 2001
+From c4d60b379c8d0a5621a0dc2a3a12fb40fe45e83e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 26 Nov 2019 17:26:15 +0530
-Subject: [PATCH 46/63] Fixed below issues:
+Subject: [PATCH 40/58] Fixed below issues:
 
 - Floating point print issues in 64bit mode
 - Dejagnu Jump related issues
 - Added dbl instruction
-
-Conflicts:
-        gcc/config/microblaze/microblaze.md
 ---
- gcc/config/microblaze/microblaze.c  | 12 +++++-
+ gcc/config/microblaze/microblaze.c  | 12 +++-
  gcc/config/microblaze/microblaze.h  |  7 +++
- gcc/config/microblaze/microblaze.md | 86 +++++++++++++++++++++++++++++++------
- libgcc/config/microblaze/crti.S     | 24 ++++++++++-
- libgcc/config/microblaze/crtn.S     | 13 ++++++
+ gcc/config/microblaze/microblaze.md | 86 ++++++++++++++++++++++++-----
+ libgcc/config/microblaze/crti.S     | 24 +++++++-
+ libgcc/config/microblaze/crtn.S     | 13 +++++
  5 files changed, 125 insertions(+), 17 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index bfa667b..220e03d 100644
+index b94902b8fbb..12b1da852dd 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -2613,7 +2613,12 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2603,7 +2603,12 @@ print_operand (FILE * file, rtx op, int letter)
        if (code == CONST_DOUBLE)
         {
           if (GET_MODE (op) == DFmode)
@@ -35,7 +32,7 @@ index bfa667b..220e03d 100644
           else
             {
                REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
-@@ -4014,7 +4019,10 @@ microblaze_expand_divide (rtx operands[])
+@@ -4006,7 +4011,10 @@ microblaze_expand_divide (rtx operands[])
                              gen_rtx_PLUS (QImode, regt1, div_table_rtx));
  
    insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
@@ -48,7 +45,7 @@ index bfa667b..220e03d 100644
    LABEL_NUSES (div_end_label) = 1; 
    emit_barrier ();
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index a23fd4e..7497cfb 100644
+index 1f6e2059545..a36e06316aa 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -888,10 +888,17 @@ do {                                                                       \
@@ -70,7 +67,7 @@ index a23fd4e..7497cfb 100644
  /* We need to group -lm as well, since some Newlib math functions 
     reference __errno!  */
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4a8fbab..65ec32c 100644
+index 7cc26e7d786..013c77651c3 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -527,6 +527,15 @@
@@ -231,7 +228,7 @@ index 4a8fbab..65ec32c 100644
    ""
    "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8"
 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
-index 1811327..a661319 100644
+index 005825f1ec5..b7436c7131f 100644
 --- a/libgcc/config/microblaze/crti.S
 +++ b/libgcc/config/microblaze/crti.S
 @@ -33,11 +33,32 @@
@@ -274,7 +271,7 @@ index 1811327..a661319 100644
      sw      r15, r0, r1
 +#endif
 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
-index 60a4648..d72507b 100644
+index 5705eff9a4a..f1148ffebe4 100644
 --- a/libgcc/config/microblaze/crtn.S
 +++ b/libgcc/config/microblaze/crtn.S
 @@ -29,7 +29,19 @@
@@ -303,5 +300,5 @@ index 60a4648..d72507b 100644
      addik   r1, r1, 16   
 +#endif
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Added-double-arith-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch
index 1b7ac28b..75ee48fa 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Added-double-arith-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch
@@ -1,16 +1,17 @@
-From 0f310964ff1c19cbc3404ec7ceba286d6de315c0 Mon Sep 17 00:00:00 2001
+From 90edf612331af9b7e99105112c2067a3f085daef Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:07:08 +0530
-Subject: [PATCH 47/63] -Added double arith instructions -Fixed prologue stack
- pointer decrement issue
+Subject: [PATCH 41/58] Fix various
 
+-Added double arith instructions
+-Fixed prologue stack pointer decrement issue
 ---
- gcc/config/microblaze/microblaze.md | 78 ++++++++++++++++++++++++++++++++-----
- gcc/config/microblaze/t-microblaze  |  7 ++++
+ gcc/config/microblaze/microblaze.md | 78 +++++++++++++++++++++++++----
+ gcc/config/microblaze/t-microblaze  |  7 +++
  2 files changed, 76 insertions(+), 9 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 65ec32c..c199b27 100644
+index 013c77651c3..645f48f2847 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -527,6 +527,66 @@
@@ -113,7 +114,7 @@ index 65ec32c..c199b27 100644
    (set_attr "mode"     "DI")
    (set_attr "length"   "4,4,4")])
 diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 35ab9654..dfef45c 100644
+index 35ab9654052..dfef45c268e 100644
 --- a/gcc/config/microblaze/t-microblaze
 +++ b/gcc/config/microblaze/t-microblaze
 @@ -1,6 +1,13 @@
@@ -131,5 +132,5 @@ index 35ab9654..dfef45c 100644
  MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high
  MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
index c00b0a2b..2e66625b 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
@@ -1,7 +1,7 @@
-From b63cd2a410b9350fa67ed3ca348dcca349da4e44 Mon Sep 17 00:00:00 2001
+From c7f6fb9d81ce322f71cbef7cc1f5cb2fb8956a27 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 12 Oct 2018 16:07:36 +0530
-Subject: [PATCH 48/63] Fixed the issue in the delay slot with swap
+Subject: [PATCH 42/58] Fixed the issue in the delay slot with swap
  instructions
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 48/63] Fixed the issue in the delay slot with swap
  1 file changed, 6 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index c199b27..d6370d8 100644
+index 645f48f2847..6a1e45a5b66 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -443,6 +443,9 @@
@@ -33,5 +33,5 @@ index c199b27..d6370d8 100644
  
  ;;----------------------------------------------------------------
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
index 7e92df2e..3d532c6a 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
@@ -1,7 +1,7 @@
-From f39f36cb0f0466343ef4ead50261b58595af708c Mon Sep 17 00:00:00 2001
+From 16a9a232ae430e691c13157dd5988f9c5c7dfb71 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:12:43 +0530
-Subject: [PATCH 49/63] Fixed the load store issue with the 32bit arith
+Subject: [PATCH 43/58] Fixed the load store issue with the 32bit arith
  libraries
 
 ---
@@ -13,7 +13,7 @@ Subject: [PATCH 49/63] Fixed the load store issue with the 32bit arith
  5 files changed, 98 insertions(+), 4 deletions(-)
 
 diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
-index 24b94b9..2765e42 100644
+index bb047094e2f..104243e35fe 100644
 --- a/libgcc/config/microblaze/divsi3.S
 +++ b/libgcc/config/microblaze/divsi3.S
 @@ -41,6 +41,17 @@
@@ -70,7 +70,7 @@ index 24b94b9..2765e42 100644
         .size   __divsi3, . - __divsi3
  
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index 87372f5..7e61453 100644
+index 9692ff310ff..9500d64bdc0 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -41,6 +41,17 @@
@@ -128,7 +128,7 @@ index 87372f5..7e61453 100644
         .size   __modsi3, . - __modsi3
  
 diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
-index 8c3f788..e28c69a 100644
+index cb3b6b8321f..2044399db4a 100644
 --- a/libgcc/config/microblaze/mulsi3.S
 +++ b/libgcc/config/microblaze/mulsi3.S
 @@ -41,6 +41,9 @@
@@ -142,7 +142,7 @@ index 8c3f788..e28c69a 100644
         .frame  r1,0,r15
         add     r3,r0,r0
 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
-index 5d726ad..b1e44b6 100644
+index ee2bdd0950d..d2332bcfe62 100644
 --- a/libgcc/config/microblaze/udivsi3.S
 +++ b/libgcc/config/microblaze/udivsi3.S
 @@ -41,6 +41,16 @@
@@ -197,7 +197,7 @@ index 5d726ad..b1e44b6 100644
          .end __udivsi3
         .size   __udivsi3, . - __udivsi3
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index b29d7e1..8804b99 100644
+index 12c082f6417..30bd8c20b58 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -41,6 +41,16 @@
@@ -252,5 +252,5 @@ index b29d7e1..8804b99 100644
  .end __umodsi3
         .size   __umodsi3, . - __umodsi3
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch
index ba717327..d34c103d 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch
@@ -1,14 +1,14 @@
-From 51886f40b6bccea22277f8dcc971706d7c24bdd0 Mon Sep 17 00:00:00 2001
+From b3766742c4e1d401d4f7cdc55a90262681689a20 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Oct 2018 12:00:10 +0530
-Subject: [PATCH 50/63] extending the Dwarf support to 64bit Microblaze
+Subject: [PATCH 44/58] extending the Dwarf support to 64bit Microblaze
 
 ---
  gcc/config/microblaze/microblaze.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 7497cfb..bd5e216 100644
+index a36e06316aa..8504a841406 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe;
@@ -21,5 +21,5 @@ index 7497cfb..bd5e216 100644
  /* Target machine storage layout */
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch
index a0758b31..a69c71dd 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-fixing-the-typo-errors-in-umodsi3-file.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch
@@ -1,14 +1,14 @@
-From a8978d71c8b5adfa59430443611bd785a4d54ef9 Mon Sep 17 00:00:00 2001
+From bdc9429b5f2300e39ecdf1db63f4d35f8e18a932 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 16 Oct 2018 07:55:46 +0530
-Subject: [PATCH 51/63] fixing the typo errors in umodsi3 file
+Subject: [PATCH 45/58] fixing the typo errors in umodsi3 file
 
 ---
  libgcc/config/microblaze/umodsi3.S | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index 8804b99..1b3070e 100644
+index 30bd8c20b58..2dd72aef68e 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -47,9 +47,9 @@ __umodsi3:
@@ -25,5 +25,5 @@ index 8804b99..1b3070e 100644
  __umodsi3:
         .frame  r1,0,r15        
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch
index d0b534bc..a5f7afb6 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch
@@ -1,14 +1,14 @@
-From 328bd339c292b63d2068a132a245bdc037815d6b Mon Sep 17 00:00:00 2001
+From 2226c8b836bdc9d0e2a281d971288e4bcb50d503 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 17 Oct 2018 16:56:14 +0530
-Subject: [PATCH 52/63] fixing the 32bit LTO related issue9(1014024)
+Subject: [PATCH 46/58] fixing the 32bit LTO related issue9(1014024)
 
 ---
  gcc/config/microblaze/microblaze.h | 24 ++++++++++++++----------
  1 file changed, 14 insertions(+), 10 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index bd5e216..ab541f7 100644
+index 8504a841406..0c493b6f6e4 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe;
@@ -64,5 +64,5 @@ index bd5e216..ab541f7 100644
  #define REGNO_OK_FOR_BASE_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
  
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
index f8ac364c..42296396 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
@@ -1,7 +1,7 @@
-From 3f65f0432d42f4d469fbb10828f1683cd30a5d84 Mon Sep 17 00:00:00 2001
+From 8ed304d49f66bc36b39dac8e804a7cdeda642739 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 19 Oct 2018 14:26:25 +0530
-Subject: [PATCH 53/63] Fixed the missing stack adjustment in prologue of
+Subject: [PATCH 47/58] Fixed the missing stack adjustment in prologue of
  modsi3 function
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 53/63] Fixed the missing stack adjustment in prologue of
  1 file changed, 1 insertion(+)
 
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index 7e61453..b0e6cad 100644
+index 9500d64bdc0..4dbb25900d9 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -119,6 +119,7 @@ $LaRETURN_HERE:
@@ -21,5 +21,5 @@ index 7e61453..b0e6cad 100644
          .end __modsi3
         .size   __modsi3, . - __modsi3
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
index 0e704506..92fa9e57 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
@@ -1,7 +1,7 @@
-From 0dbb2b7bfe466c18d54aec680208fd1459619bc1 Mon Sep 17 00:00:00 2001
+From d12f2da2ae7fa7946aef94c161730c7b851c086a Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 24 Oct 2018 18:31:04 +0530
-Subject: [PATCH 54/63] [Patch,Microblaze] : corrected SPN for dlong
+Subject: [PATCH 48/58] [Patch,Microblaze] : corrected SPN for dlong
  instruction mapping.
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 54/63] [Patch,Microblaze] : corrected SPN for dlong
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index d6370d8..6b6b7c6 100644
+index 6a1e45a5b66..53dbe4e4060 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -602,9 +602,9 @@
@@ -25,5 +25,5 @@ index d6370d8..6b6b7c6 100644
    "dlong\t%0,%1"
    [(set_attr "type"     "fcvt")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch
index 28554722..346157ce 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From a56b23ae244eee1da6d6595d3a6477085d77271e Mon Sep 17 00:00:00 2001
+From dfe4f5aa180a7b4c15b4b586b253541aa9d29e52 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:55:08 +0530
-Subject: [PATCH 55/63] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 49/58] fixing the long & long long mingw toolchain issue
 
 ---
  gcc/config/microblaze/constraints.md | 2 +-
@@ -9,7 +9,7 @@ Subject: [PATCH 55/63] fixing the long & long long mingw toolchain issue
  2 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 2fce91e..9a5aa6b 100644
+index c2b0a21c53b..4a6cf419671 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -55,7 +55,7 @@
@@ -22,7 +22,7 @@ index 2fce91e..9a5aa6b 100644
  ;; Define floating point constraints
  
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 6b6b7c6..a1dc41f 100644
+index 53dbe4e4060..5d277014e42 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -648,8 +648,8 @@
@@ -55,5 +55,5 @@ index 6b6b7c6..a1dc41f 100644
          else   
           return "addlik\t%0,r0,%1";
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch
index a419216c..360bdb51 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch
@@ -1,14 +1,14 @@
-From e13b1b70972511a642512cbc7093ed21e5a9e141 Mon Sep 17 00:00:00 2001
+From b21e115bc1af625b2ae1acb893027af6af3c2d16 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Thu, 14 Mar 2019 18:11:04 +0530
-Subject: [PATCH 56/63] Fix the MB-64 bug of handling QI objects
+Subject: [PATCH 50/58] Fix the MB-64 bug of handling QI objects
 
 ---
  gcc/config/microblaze/microblaze.md | 14 +++++++-------
  1 file changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index a1dc41f..bb96e2d 100644
+index 5d277014e42..a1363935c42 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -2347,11 +2347,11 @@ else
@@ -43,5 +43,5 @@ index a1dc41f..bb96e2d 100644
    "TARGET_MB_64"
    {
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch
index 940009de..6b7bb2a1 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch
@@ -1,15 +1,17 @@
-From 1387d4fedb397f78b08ad33204a3fcf2bd63f183 Mon Sep 17 00:00:00 2001
+From ed17f79b22769e5a256e3990715e32e943bfd929 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Fri, 29 Mar 2019 12:08:39 +0530
-Subject: [PATCH 57/63] [Patch,Microblaze] : We will check the possibility of
- peephole2 optimization,if we can then we will fix the compiler issue.
+Subject: [PATCH 51/58] [Patch,Microblaze] : Check the possibiity of peephole2
+ opt
 
+We will check the possibility of peephole2
+optimization,if we can then we will fix the compiler issue.
 ---
- gcc/config/microblaze/microblaze.md | 63 ++++++++++++++++++++++---------------
+ gcc/config/microblaze/microblaze.md | 63 +++++++++++++++++------------
  1 file changed, 38 insertions(+), 25 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index bb96e2d..830ef77 100644
+index a1363935c42..626eade9468 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -882,31 +882,44 @@
@@ -83,5 +85,5 @@ index bb96e2d..830ef77 100644
  ;;----------------------------------------------------------------
  ;; Negation and one's complement
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
index 1548faad..45505cf1 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
@@ -1,19 +1,19 @@
-From 80919b0f43b275e70521e4f85cd28bcd0ece3b80 Mon Sep 17 00:00:00 2001
+From d845981b381b0174d97dda8a78d82cf8fcae7ca1 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 17 Apr 2019 12:36:16 +0530
-Subject: [PATCH 60/61] [Patch,MicroBlaze]: fixed typos in mul,div and mod
+Subject: [PATCH 52/58] [Patch,MicroBlaze]: fixed typos in mul,div and mod
  assembly files.
 
 ---
- libgcc/config/microblaze/divsi3.S  | 47 ++++++++++++++++++++++++++----
- libgcc/config/microblaze/modsi3.S  | 40 +++++++++++++++++++++++---
- libgcc/config/microblaze/mulsi3.S  | 33 +++++++++++++++++++++-
- libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++----
- libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++---
+ libgcc/config/microblaze/divsi3.S  | 47 ++++++++++++++++++++----
+ libgcc/config/microblaze/modsi3.S  | 40 ++++++++++++++++++---
+ libgcc/config/microblaze/mulsi3.S  | 33 ++++++++++++++++-
+ libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++---
+ libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++---
  5 files changed, 212 insertions(+), 20 deletions(-)
 
 diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
-index 7e7d875..cfb4c05 100644
+index 104243e35fe..5755e29fbb6 100644
 --- a/libgcc/config/microblaze/divsi3.S
 +++ b/libgcc/config/microblaze/divsi3.S
 @@ -46,7 +46,7 @@
@@ -107,7 +107,7 @@ index 7e7d875..cfb4c05 100644
  $LaDiv_By_Zero:
  $LaResult_Is_Zero:
 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index 46ff34a..49618dd 100644
+index 4dbb25900d9..b6129f5e822 100644
 --- a/libgcc/config/microblaze/modsi3.S
 +++ b/libgcc/config/microblaze/modsi3.S
 @@ -62,40 +62,72 @@ __modsi3:
@@ -196,7 +196,7 @@ index 46ff34a..49618dd 100644
         nop
  #else
 diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
-index 31a73c2..39951be 100644
+index 2044399db4a..95709d5bb01 100644
 --- a/libgcc/config/microblaze/mulsi3.S
 +++ b/libgcc/config/microblaze/mulsi3.S
 @@ -43,7 +43,37 @@
@@ -246,7 +246,7 @@ index 31a73c2..39951be 100644
         .end __mulsi3
         .size   __mulsi3, . - __mulsi3
 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
-index 94adb6a..d4fe285 100644
+index d2332bcfe62..687d5588801 100644
 --- a/libgcc/config/microblaze/udivsi3.S
 +++ b/libgcc/config/microblaze/udivsi3.S
 @@ -59,52 +59,96 @@ __udivsi3:
@@ -360,7 +360,7 @@ index 94adb6a..d4fe285 100644
         NOP
  #else
 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index 9bf65c3..3bd5d48 100644
+index 2dd72aef68e..59646ce437f 100644
 --- a/libgcc/config/microblaze/umodsi3.S
 +++ b/libgcc/config/microblaze/umodsi3.S
 @@ -46,7 +46,7 @@
@@ -462,5 +462,5 @@ index 9bf65c3..3bd5d48 100644
  $LaRETURN_HERE:
  # Restore values of CSRs and that of r3 and the divisor and the dividend
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Author-Nagaraju-nmekala-xilinx.com.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch
index 9f878669..8dce8476 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Author-Nagaraju-nmekala-xilinx.com.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch
@@ -1,25 +1,24 @@
-From f0332f119c3cbe95886dae77c4b5a9b9907b4b17 Mon Sep 17 00:00:00 2001
+From e3b95d5646d4197bff81105c12bcbc5e7dba1725 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Thu, 18 Apr 2019 16:00:37 +0530
-Subject: [PATCH 60/63] Author: Nagaraju <nmekala@xilinx.com> Date:   Wed Apr
- 17 14:11:00 2019 +0530
+Subject: [PATCH 53/58] [Patch, microblaze]: MB-64 removal of barrel-shift
+ instructions from default
 
-    [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default
-    By default MB-64 is generatting barrel-shift instructions. It has been
-    removed from default. Barrel-shift instructions will be generated only if
-    barrel-shifter is enabled. Similarly to double instructions as well.
+By default MB-64 is generatting barrel-shift instructions. It has been
+removed from default. Barrel-shift instructions will be generated only if
+barrel-shifter is enabled. Similarly to double instructions as well.
 
-    Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  gcc/config/microblaze/microblaze.c  |   2 +-
- gcc/config/microblaze/microblaze.md | 269 +++++++++++++++++++++++++++++++++---
+ gcc/config/microblaze/microblaze.md | 269 ++++++++++++++++++++++++++--
  2 files changed, 252 insertions(+), 19 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 220e03d..5c09452 100644
+index 12b1da852dd..5b4c21af365 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -4008,7 +4008,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -4000,7 +4000,7 @@ microblaze_expand_divide (rtx operands[])
    emit_insn (gen_rtx_CLOBBER (Pmode, reg18));
  
    if (TARGET_MB_64) {
@@ -29,7 +28,7 @@ index 220e03d..5c09452 100644
      }
    else  {
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 830ef77..3e7c647 100644
+index 626eade9468..6cc62666269 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -547,7 +547,7 @@
@@ -475,5 +474,5 @@ index 830ef77..3e7c647 100644
    [(set_attr "type"    "arith")
    (set_attr "mode"     "DI")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
index d3ed669c..70e05117 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
@@ -1,7 +1,7 @@
-From 11766e4f7aaad3f217944079335c71525b72201c Mon Sep 17 00:00:00 2001
+From 6bdb6f300593c4a633a8ec485ac2744a97b51460 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Wed, 8 May 2019 14:12:03 +0530
-Subject: [PATCH 61/63] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
+Subject: [PATCH 54/58] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
  disable fivopts by default
 
 Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default.
@@ -15,7 +15,7 @@ Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
  1 file changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index 9b6ef21..3cae2a6 100644
+index 0b9d5a1b453..cf2db8afe36 100644
 --- a/gcc/common/config/microblaze/microblaze-common.c
 +++ b/gcc/common/config/microblaze/microblaze-common.c
 @@ -27,13 +27,15 @@
@@ -37,5 +37,5 @@ index 9b6ef21..3cae2a6 100644
 +#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table
  struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch
index ca1a2b9f..4ab3cec9 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch
@@ -1,14 +1,14 @@
-From bb65903ab6293a47d154764a585f6c53b5fcf853 Mon Sep 17 00:00:00 2001
+From 3198a31122bb0436d298d29e986bb69bc3c526a9 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:16:53 +0530
-Subject: [PATCH 62/63] Added new MB-64 single register arithmetic instructions
+Subject: [PATCH 55/58] Added new MB-64 single register arithmetic instructions
 
 ---
- gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++++++++++
+ gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++
  1 file changed, 56 insertions(+)
 
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 3e7c647..4d40cc5 100644
+index 6cc62666269..696be7b300f 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -654,6 +654,18 @@
@@ -103,5 +103,5 @@ index 3e7c647..4d40cc5 100644
    [(set (match_operand:DI 0 "register_operand" "=d,d")
         (xor:DI (match_operand:DI 1 "arith_operand" "%d,d")
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch
deleted file mode 100644
index c009c92d..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch
+++ /dev/null
@@ -1,16 +0,0 @@
-diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 740b8d9..4bda9c2 100644
---- a/gcc/config/microblaze/microblaze.h
-+++ b/gcc/config/microblaze/microblaze.h
-@@ -114,8 +114,9 @@ extern enum pipeline_type microblaze_pipe;
-   %{m64:-EL --oformat=elf64-microblazeel} \
-   %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
-   %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
--  %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \
--  %{!T*: -dT xilinx.ld%s}"
-+  %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0}"
-+
-+//  %{!T*: -dT xilinx.ld%s}"
- 
- /* Specs for the compiler proper  */
- 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
index edf6a0f3..afe3ae96 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
@@ -1,7 +1,7 @@
-From d4b23a1dd0564bcf67b5b88a68d62eb49bdab15d Mon Sep 17 00:00:00 2001
+From 1dadde6d9a49010a495529c9b5ea6c2bb75cc5f1 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:55:22 +0530
-Subject: [PATCH 63/63] [Patch,MicroBlaze] : Added support for 64 bit Immediate
+Subject: [PATCH 56/58] [Patch,MicroBlaze] : Added support for 64 bit Immediate
  values.
 
 ---
@@ -10,7 +10,7 @@ Subject: [PATCH 63/63] [Patch,MicroBlaze] : Added support for 64 bit Immediate
  2 files changed, 3 insertions(+), 4 deletions(-)
 
 diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 9a5aa6b..e87a90f 100644
+index 4a6cf419671..2432b480a2c 100644
 --- a/gcc/config/microblaze/constraints.md
 +++ b/gcc/config/microblaze/constraints.md
 @@ -53,9 +53,9 @@
@@ -26,7 +26,7 @@ index 9a5aa6b..e87a90f 100644
  ;; Define floating point constraints
  
 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 4d40cc5..6e74503 100644
+index 696be7b300f..f0a9701ab18 100644
 --- a/gcc/config/microblaze/microblaze.md
 +++ b/gcc/config/microblaze/microblaze.md
 @@ -1334,8 +1334,7 @@
@@ -40,5 +40,5 @@ index 4d40cc5..6e74503 100644
     addlk\t%0,r0,r0\t
     addlik\t%0,r0,%1\t #N1 %X1
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch
deleted file mode 100644
index ff524770..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From f30b99b5b8d3f2a8d8e4973cd155a4b9f1849039 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 14 Mar 2019 18:08:06 +0530
-Subject: [PATCH 56/57] fix the lto-wrapper issue on windows
-
----
- libiberty/simple-object.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/libiberty/simple-object.c b/libiberty/simple-object.c
-index 42aa6ac..d2465c6 100644
---- a/libiberty/simple-object.c
-+++ b/libiberty/simple-object.c
-@@ -44,6 +44,10 @@ Boston, MA 02110-1301, USA.  */
- #define SEEK_SET 0
- #endif
- 
-+#ifndef O_BINARY
-+#define O_BINARY 0
-+#endif
-+
- #include "simple-object-common.h"
- 
- /* The known object file formats.  */
-@@ -326,7 +330,7 @@ simple_object_copy_lto_debug_sections (simple_object_read *sobj,
-       return errmsg;
-     }
- 
--  outfd = creat (dest, 00777);
-+  outfd = open (dest, O_CREAT|O_WRONLY|O_TRUNC|O_BINARY, 00777);
-   if (outfd == -1)
-     {
-       *err = errno;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch
deleted file mode 100644
index a5a2039d..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 6c58973f1cc1e37773aeab583aa3ac6331489106 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 14 Mar 2019 18:11:04 +0530
-Subject: [PATCH 57/57] Fix the MB-64 bug of handling QI objects
-
----
- gcc/config/microblaze/microblaze.md | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index e03b835..88aee9e 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -2345,11 +2345,11 @@ else
- 
- (define_insn "branch_zero_64"
-   [(set (pc)
--       (if_then_else (match_operator:SI 0 "ordered_comparison_operator"
-+       (if_then_else (match_operator 0 "ordered_comparison_operator"
-                                 [(match_operand:SI 1 "register_operand" "d")
-                                   (const_int 0)])
--                      (match_operand:SI 2 "pc_or_label_operand" "")
--                      (match_operand:SI 3 "pc_or_label_operand" "")))
-+                      (match_operand 2 "pc_or_label_operand" "")
-+                      (match_operand 3 "pc_or_label_operand" "")))
-   ]
-   "TARGET_MB_64"
-   {
-@@ -2365,11 +2365,11 @@ else
- 
- (define_insn "long_branch_zero"
-   [(set (pc)
--       (if_then_else (match_operator 0 "ordered_comparison_operator"
--                                [(match_operand 1 "register_operand" "d")
-+       (if_then_else (match_operator:DI 0 "ordered_comparison_operator"
-+                                [(match_operand:DI 1 "register_operand" "d")
-                                   (const_int 0)])
--                      (match_operand 2 "pc_or_label_operand" "")
--                      (match_operand 3 "pc_or_label_operand" "")))
-+                      (match_operand:DI 2 "pc_or_label_operand" "")
-+                      (match_operand:DI 3 "pc_or_label_operand" "")))
-   ]
-   "TARGET_MB_64"
-   {
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
index 41c90353..ebd707c9 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
@@ -1,23 +1,32 @@
-From 5f54efe1e7d9604b45ddddd510ce439477d0e94f Mon Sep 17 00:00:00 2001
+From ab73daf6bf1bc652e9557386cba5eb237af66350 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Thu, 9 Jan 2020 12:30:41 +0530
-Subject: [PATCH] [Patch, microblaze]: Fix Compiler crash with
+Subject: [PATCH 57/58] [Patch, microblaze]: Fix Compiler crash with
  -freg-struct-return This patch fixes a bug in MB GCC regarding the passing
  struct values in registers. Currently we are only handling SImode With this
  patch all other modes are handled properly
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 
+ChangeLog:
+2020-01-09 Nagaraju Mekala <nmekala@xilix.com>
+
+        * gcc/config/microblaze/microblaze.h
+        (LIBCALL_Value): Remove macro
+        (PROMOTE_MODE): Remove macro
+        * gcc/config/microblaze/microblaze.c
+        (TARGET_LIBCALL_Value): Added new macro
+        (microblaze_function_value): Updated the return Value
 ---
  gcc/config/microblaze/microblaze.c | 11 ++++++++++-
  gcc/config/microblaze/microblaze.h | 19 -------------------
  2 files changed, 10 insertions(+), 20 deletions(-)
 
 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 5c09452..beccd12 100644
+index 5b4c21af365..31869982d27 100644
 --- a/gcc/config/microblaze/microblaze.c
 +++ b/gcc/config/microblaze/microblaze.c
-@@ -4046,7 +4046,16 @@ microblaze_function_value (const_tree valtype,
+@@ -4038,7 +4038,16 @@ microblaze_function_value (const_tree valtype,
                            const_tree func ATTRIBUTE_UNUSED,
                            bool outgoing ATTRIBUTE_UNUSED)
  {
@@ -36,7 +45,7 @@ index 5c09452..beccd12 100644
  
  /* Implement TARGET_SCHED_ADJUST_COST.  */
 diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index ab541f7..100e7b2 100644
+index 0c493b6f6e4..5eb95c2600a 100644
 --- a/gcc/config/microblaze/microblaze.h
 +++ b/gcc/config/microblaze/microblaze.h
 @@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe;
@@ -73,5 +82,5 @@ index ab541f7..100e7b2 100644
     On the MicroBlaze, R2 R3 are the only register thus used.
     Currently, R2 are only implemented  here (C has no complex type)  */
 -- 
-1.8.3.1
+2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
deleted file mode 100644
index 8bc47a43..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From bcbfd9f69d858306a080aa7213e96ca6eca66106 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Fri, 29 Mar 2019 12:08:39 +0530
-Subject: [PATCH 58/61] [Patch,Microblaze] : We will check the possibility of
- peephole2 optimization,if we can then we will fix the compiler issue.
-
----
- gcc/config/microblaze/microblaze.md | 63 ++++++++++++++++++++++---------------
- 1 file changed, 38 insertions(+), 25 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 88aee9e..8bd175f 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -880,31 +880,44 @@
-   (set_attr "mode"     "SI")
-   (set_attr "length"   "4")])
- 
--(define_peephole2
--  [(set (match_operand:SI 0 "register_operand")
--        (fix:SI (match_operand:SF 1 "register_operand")))
--   (set (pc)
--        (if_then_else (match_operator 2 "ordered_comparison_operator"
--                       [(match_operand:SI 3 "register_operand")
--                        (match_operand:SI 4 "arith_operand")])
--                      (label_ref (match_operand 5))
--                      (pc)))]
--   "TARGET_HARD_FLOAT && !TARGET_MB_64"
--   [(set (match_dup 1) (match_dup 3))]
--
--  {
--    rtx condition;
--    rtx cmp_op0 = operands[3];
--    rtx cmp_op1 = operands[4];
--    rtx comp_reg =  gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
--
--    emit_insn (gen_cstoresf4 (comp_reg, operands[2],
--                              gen_rtx_REG (SFmode, REGNO (cmp_op0)),
--                              gen_rtx_REG (SFmode, REGNO (cmp_op1))));
--    condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
--    emit_jump_insn (gen_condjump (condition, operands[5]));
--  }
--)
-+;; peephole2 optimization will be done only if fint and if-then-else
-+;; are dependent.added condition for the same.
-+;; if they are dependent then gcc is giving "flow control insn inside a basic block" 
-+;; testcase:
-+;;        volatile float vec = 1.0;
-+;;        volatile int ci = 2;
-+;;        register int cj = (int)(vec);
-+;;//        ci=cj;
-+;;//      if (ci <0) {
-+;;        if (cj < 0) {
-+;;                ci = 0;
-+;;        }
-+;; commenting for now.we will check the possibility of this optimization later
-+
-+;;(define_peephole2
-+;;  [(set (match_operand:SI 0 "register_operand")
-+;;        (fix:SI (match_operand:SF 1 "register_operand")))
-+;;   (set (pc)
-+;;        (if_then_else (match_operator 2 "ordered_comparison_operator"
-+;;                       [(match_operand:SI 3 "register_operand")
-+;;                        (match_operand:SI 4 "arith_operand")])
-+;;                      (label_ref (match_operand 5))
-+;;                      (pc)))]
-+;;   "TARGET_HARD_FLOAT && !TARGET_MB_64 && ((REGNO (operands[0])) == (REGNO (operands[3])))"
-+;;  [(set (match_dup 1) (match_dup 3))]
-+;;  {
-+;;    rtx condition;
-+;;    rtx cmp_op0 = operands[3];
-+;;    rtx cmp_op1 = operands[4];
-+;;    rtx comp_reg =  gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
-+;;
-+;;    emit_insn (gen_cstoresf4 (comp_reg, operands[2],
-+;;                              gen_rtx_REG (SFmode, REGNO (cmp_op0)),
-+;;                              gen_rtx_REG (SFmode, REGNO (cmp_op1))));
-+;;    condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
-+;;    emit_jump_insn (gen_condjump (condition, operands[5]));
-+;;  }
-+;;)
- 
- ;;----------------------------------------------------------------
- ;; Negation and one's complement
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch
deleted file mode 100644
index 69b49898..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 8e7d7f3d2e103c34bbb28afe1338107b9fd824f0 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 16 Apr 2019 17:20:24 +0530
-Subject: [PATCH 58/63] Reverting the patch as kernel boot is not working with
- this patch CR-1026413 Revert "[Patch,Microblaze]:reverting the cost check
- before propagating constants."
-
-This reverts commit 7156e379a67fa47a5fb9ede1448c0d528dbda65b.
----
- gcc/cprop.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/gcc/cprop.c b/gcc/cprop.c
-index 42bcc81..65c0130 100644
---- a/gcc/cprop.c
-+++ b/gcc/cprop.c
-@@ -733,7 +733,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-   int success = 0;
-   rtx set = single_set (insn);
- 
--#if 0
-   bool check_rtx_costs = true;
-   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
-   int old_cost = set ? set_rtx_cost (set, speed) : 0;
-@@ -745,7 +744,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-          && (GET_CODE (XEXP (note, 0)) == CONST
-              || CONSTANT_P (XEXP (note, 0)))))
-     check_rtx_costs = false;
--#endif
- 
-   /* Usually we substitute easy stuff, so we won't copy everything.
-      We however need to take care to not duplicate non-trivial CONST
-@@ -754,7 +752,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
- 
-   validate_replace_src_group (from, to, insn);
- 
--#if 0
-   /* If TO is a constant, check the cost of the set after propagation
-      to the cost of the set before the propagation.  If the cost is
-      higher, then do not replace FROM with TO.  */
-@@ -767,7 +764,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-       return false;
-     }
- 
--#endif
- 
-   if (num_changes_pending () && apply_change_group ())
-     success = 1;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch
new file mode 100644
index 00000000..e3c4b87b
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch
@@ -0,0 +1,29 @@
+From dd73d8ba32c0c24f17a54538b9bb54beb5d8d4e0 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 13 Aug 2020 16:28:57 -0500
+Subject: [PATCH 58/58] microblaze: Avoid UINTPTR_TYPE macro redefinition
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ gcc/config/microblaze/microblaze.h | 5 -----
+ 1 file changed, 5 deletions(-)
+
+diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
+index 5eb95c2600a..4cb98bac849 100644
+--- a/gcc/config/microblaze/microblaze.h
++++ b/gcc/config/microblaze/microblaze.h
+@@ -246,11 +246,6 @@ extern enum pipeline_type microblaze_pipe;
+ #undef PTRDIFF_TYPE
+ #define PTRDIFF_TYPE (TARGET_MB_64 ? "long int" : "int")
+ 
+-/*#undef INTPTR_TYPE
+-#define INTPTR_TYPE (TARGET_MB_64 ? "long int" : "int")*/
+-#undef UINTPTR_TYPE
+-#define UINTPTR_TYPE (TARGET_MB_64 ? "long unsigned int" : "unsigned int")
+-
+ #define DATA_ALIGNMENT(TYPE, ALIGN)                                    \
+   ((((ALIGN) < BITS_PER_WORD)                                          \
+     && (TREE_CODE (TYPE) == ARRAY_TYPE                                 \
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
deleted file mode 100644
index 2e570330..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
+++ /dev/null
@@ -1,466 +0,0 @@
-From e1a10a708f209704a3921cf66dd3ff4d0814befc Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Apr 2019 12:36:16 +0530
-Subject: [PATCH 59/63] [Patch,MicroBlaze]: fixed typos in mul,div and mod
- assembly files.
-
----
- libgcc/config/microblaze/divsi3.S  | 47 ++++++++++++++++++++++++++----
- libgcc/config/microblaze/modsi3.S  | 40 +++++++++++++++++++++++---
- libgcc/config/microblaze/mulsi3.S  | 33 +++++++++++++++++++++-
- libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++----
- libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++---
- 5 files changed, 212 insertions(+), 20 deletions(-)
-
-diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
-index 2765e42..bd56522 100644
---- a/libgcc/config/microblaze/divsi3.S
-+++ b/libgcc/config/microblaze/divsi3.S
-@@ -46,7 +46,7 @@
- __divsi3:
-        .frame  r1,0,r15        
- 
--       ADDIK   r1,r1,-32
-+       ADDLIK   r1,r1,-32
-        SLI     r28,r1,0
-        SLI     r29,r1,8
-        SLI     r30,r1,16
-@@ -61,13 +61,23 @@ __divsi3:
-        SWI     r30,r1,8
-        SWI     r31,r1,12
- #endif
--       BEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
--       BEQI    r5,$LaResult_Is_Zero    # Result is Zero 
--       BGEID   r5,$LaR5_Pos 
-+#ifdef __arch64__
-+       BEAEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
-+       BEAEQI    r5,$LaResult_Is_Zero    # Result is Zero
-+       BEAGEID   r5,$LaR5_Pos
-+#else
-+        BEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
-+        BEQI    r5,$LaResult_Is_Zero    # Result is Zero
-+        BGEID   r5,$LaR5_Pos
-+#endif
-        XOR     r28,r5,r6               # Get the sign of the result
-        RSUBI   r5,r5,0                 # Make r5 positive
- $LaR5_Pos:
--       BGEI    r6,$LaR6_Pos
-+#ifdef __arch64__
-+       BEAGEI    r6,$LaR6_Pos
-+#else
-+        BGEI    r6,$LaR6_Pos
-+#endif
-        RSUBI   r6,r6,0                 # Make r6 positive
- $LaR6_Pos:
-        ADDIK   r30,r0,0                # Clear mod
-@@ -76,26 +86,51 @@ $LaR6_Pos:
- 
-         # First part try to find the first '1' in the r5
- $LaDIV0: 
--        BLTI    r5,$LaDIV2              # This traps r5 == 0x80000000 
-+#ifdef __arch64__
-+        BEALTI    r5,$LaDIV2              # This traps r5 == 0x80000000
-+#else
-+        BLTI    r5,$LaDIV2              # This traps r5 == 0x80000000
-+#endif
- $LaDIV1:
-        ADD     r5,r5,r5                # left shift logical r5
-+#ifdef __arch64__
-+        BEAGTID   r5,$LaDIV1
-+#else
-        BGTID   r5,$LaDIV1       
-+#endif
-        ADDIK   r29,r29,-1
- $LaDIV2:
-        ADD     r5,r5,r5                # left shift logical  r5 get the '1' into the Carry
-        ADDC    r30,r30,r30             # Move that bit into the Mod register
-        RSUB    r31,r6,r30              # Try to subtract (r30 a r6)
-+#ifdef __arch64__
-+        BEALTI    r31,$LaMOD_TOO_SMALL
-+#else
-        BLTI    r31,$LaMOD_TOO_SMALL
-+#endif
-        OR      r30,r0,r31              # Move the r31 to mod since the result was positive
-        ADDIK   r3,r3,1
- $LaMOD_TOO_SMALL:
-        ADDIK   r29,r29,-1
-+#ifdef __arch64__
-+        BEAEQi    r29,$LaLOOP_END
-+#else
-        BEQi    r29,$LaLOOP_END
-+#endif
-        ADD     r3,r3,r3                # Shift in the '1' into div
-+#ifdef __arch64__
-+        BREAI     $LaDIV2                 # Div2
-+#else
-        BRI     $LaDIV2                 # Div2
-+#endif
- $LaLOOP_END:
-+#ifdef __arch64__
-+        BEAGEI    r28,$LaRETURN_HERE
-+        BREAID    $LaRETURN_HERE
-+#else
-        BGEI    r28,$LaRETURN_HERE
-        BRID    $LaRETURN_HERE
-+#endif
-        RSUBI   r3,r3,0                 # Negate the result
- $LaDiv_By_Zero:
- $LaResult_Is_Zero:
-diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
-index b0e6cad..3632fad 100644
---- a/libgcc/config/microblaze/modsi3.S
-+++ b/libgcc/config/microblaze/modsi3.S
-@@ -62,40 +62,72 @@ __modsi3:
-        swi     r31,r1,12
- #endif
- 
-+#ifdef __arch64__
-+        BEAEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
-+        BEAEQI    r5,$LaResult_Is_Zero    # Result is Zero
-+        BEAGEId   r5,$LaR5_Pos
-+#else
-        BEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
-        BEQI    r5,$LaResult_Is_Zero    # Result is Zero 
-        BGEId   r5,$LaR5_Pos 
-+#endif
-        ADD     r28,r5,r0               # Get the sign of the result [ Depends only on the first arg]
-        RSUBI   r5,r5,0                 # Make r5 positive
- $LaR5_Pos:
--       BGEI    r6,$LaR6_Pos
-+#ifdef __arch64__
-+       BEAGEI  r6,$LaR6_Pos
-+#else
-+        BGEI    r6,$LaR6_Pos
-+#endif
-        RSUBI   r6,r6,0     # Make r6 positive
- $LaR6_Pos:
-        ADDIK   r3,r0,0      # Clear mod
-        ADDIK   r30,r0,0     # clear div
--       BLTId   r5,$LaDIV2   # If r5 is still negative (0x80000000), skip
-+#ifdef __arch64__
-+       BEALTId r5,$LaDIV2   # If r5 is still negative (0x80000000), skip
-                             # the first bit search.
-+#else
-+        BLTId   r5,$LaDIV2   # If r5 is still negative (0x80000000), skip
-+                             # the first bit search.
-+#endif
-        ADDIK   r29,r0,32    # Initialize the loop count
-    # First part try to find the first '1' in the r5
- $LaDIV1:
-        ADD     r5,r5,r5         # left shift logical r5
--       BGEID   r5,$LaDIV1       #
-+#ifdef __arch64__
-+       BEAGEID r5,$LaDIV1       #
-+#else
-+        BGEID   r5,$LaDIV1       #
-+#endif
-        ADDIK   r29,r29,-1
- $LaDIV2:
-        ADD     r5,r5,r5         # left shift logical  r5 get the '1' into the Carry
-        ADDC    r3,r3,r3         # Move that bit into the Mod register
-        rSUB    r31,r6,r3        # Try to subtract (r30 a r6)
-+#ifdef __arch64__
-+        BEALTi    r31,$LaMOD_TOO_SMALL
-+#else
-        BLTi    r31,$LaMOD_TOO_SMALL
-+#endif
-        OR      r3,r0,r31       # Move the r31 to mod since the result was positive
-        ADDIK   r30,r30,1
- $LaMOD_TOO_SMALL:
-        ADDIK   r29,r29,-1
-+#ifdef __arch64__
-+        BEAEQi    r29,$LaLOOP_END
-+        ADD     r30,r30,r30         # Shift in the '1' into div
-+        BREAI     $LaDIV2          # Div2
-+$LaLOOP_END:
-+        BEAGEI    r28,$LaRETURN_HERE
-+        BREAId    $LaRETURN_HERE
-+#else
-        BEQi    r29,$LaLOOP_END
-        ADD     r30,r30,r30         # Shift in the '1' into div
-        BRI     $LaDIV2          # Div2
- $LaLOOP_END:
-        BGEI    r28,$LaRETURN_HERE
-        BRId    $LaRETURN_HERE
-+#endif
-        rsubi   r3,r3,0 # Negate the result
- $LaDiv_By_Zero:
- $LaResult_Is_Zero:
-@@ -108,7 +140,7 @@ $LaRETURN_HERE:
-        lli     r29,r1,8
-        lli     r30,r1,16
-        lli     r31,r1,24
--       addik   r1,r1,32
-+       addlik  r1,r1,32
-        rtsd    r15,8
-        nop
- #else
-diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
-index e28c69a..991dbcd 100644
---- a/libgcc/config/microblaze/mulsi3.S
-+++ b/libgcc/config/microblaze/mulsi3.S
-@@ -43,7 +43,37 @@
-        .type   __mulsi3,@function
- #ifdef __arch64__
-         .align 3
--#endif
-+__mulsi3:
-+        .frame  r1,0,r15
-+        add     r3,r0,r0
-+        BEAEQI    r5,$L_Result_Is_Zero      # Multiply by Zero
-+        BEAEQI    r6,$L_Result_Is_Zero      # Multiply by Zero
-+        BEAGEId   r5,$L_R5_Pos
-+        XOR     r4,r5,r6                  # Get the sign of the result
-+        RSUBI   r5,r5,0                   # Make r5 positive
-+$L_R5_Pos:
-+        BEAGEI    r6,$L_R6_Pos
-+        RSUBI   r6,r6,0                   # Make r6 positive
-+$L_R6_Pos:
-+        breai     $L1
-+$L2:
-+        add     r5,r5,r5
-+$L1:
-+        srl     r6,r6
-+        addc    r7,r0,r0
-+        beaeqi    r7,$L2
-+        beaneid   r6,$L2
-+        add     r3,r3,r5
-+        bealti    r4,$L_NegateResult
-+        rtsd    r15,8
-+        nop
-+$L_NegateResult:
-+        rtsd    r15,8
-+        rsub    r3,r3,r0
-+$L_Result_Is_Zero:
-+        rtsd    r15,8
-+        addi    r3,r0,0
-+#else
- __mulsi3:
-        .frame  r1,0,r15
-        add     r3,r0,r0
-@@ -74,5 +104,6 @@ $L_NegateResult:
- $L_Result_Is_Zero:
-        rtsd    r15,8
-        addi    r3,r0,0
-+#endif
-        .end __mulsi3
-        .size   __mulsi3, . - __mulsi3
-diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
-index b1e44b6..42b086e 100644
---- a/libgcc/config/microblaze/udivsi3.S
-+++ b/libgcc/config/microblaze/udivsi3.S
-@@ -59,52 +59,96 @@ __udivsi3:
-        SWI     r30,r1,4
-        SWI     r31,r1,8
- #endif
-+#ifdef __arch64__
-+        BEAEQI    r6,$LaDiv_By_Zero           # Div_by_Zero   # Division Error
-+        BEAEQID   r5,$LaResult_Is_Zero        # Result is Zero
-+#else
-        BEQI    r6,$LaDiv_By_Zero           # Div_by_Zero   # Division Error
-        BEQID   r5,$LaResult_Is_Zero        # Result is Zero 
-+#endif
-        ADDIK   r30,r0,0                    # Clear mod
-        ADDIK   r29,r0,32                   # Initialize the loop count
- 
-         # Check if r6 and r5 are equal # if yes, return 1
-        RSUB    r18,r5,r6
-+#ifdef __arch64__
-+        BEAEQID   r18,$LaRETURN_HERE
-+#else
-        BEQID   r18,$LaRETURN_HERE
-+#endif
-        ADDIK   r3,r0,1
- 
-         # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
-        XOR     r18,r5,r6
--       BGEID   r18,16
-+#ifdef __arch64__
-+       BEAGEID r18,16
-+#else
-+        BGEID   r18,16
-+#endif
-        ADD     r3,r0,r0                    # We would anyways clear r3
-+#ifdef __arch64__
-+        BEALTI    r6,$LaRETURN_HERE           # r6[bit 31 = 1] hence is greater
-+        BREAI     $LCheckr6
-+        RSUB    r18,r6,r5                   # MICROBLAZEcmp
-+        BEALTI    r18,$LaRETURN_HERE
-+#else
-        BLTI    r6,$LaRETURN_HERE           # r6[bit 31 = 1] hence is greater
-        BRI     $LCheckr6
-        RSUB    r18,r6,r5                   # MICROBLAZEcmp
-        BLTI    r18,$LaRETURN_HERE
--
-+#endif
-         # If r6 [bit 31] is set, then return result as 1
- $LCheckr6:
--       BGTI    r6,$LaDIV0
--       BRID    $LaRETURN_HERE
-+#ifdef __arch64__
-+       BEAGTI  r6,$LaDIV0
-+       BREAID  $LaRETURN_HERE
-+#else
-+        BGTI    r6,$LaDIV0
-+        BRID    $LaRETURN_HERE
-+#endif
-        ADDIK   r3,r0,1
- 
-         # First part try to find the first '1' in the r5
- $LaDIV0:
-+#ifdef __arch64__
-+        BEALTI    r5,$LaDIV2
-+#else
-        BLTI    r5,$LaDIV2      
-+#endif
- $LaDIV1:
-        ADD     r5,r5,r5                    # left shift logical r5
-+#ifdef __arch64__
-+        BEAGTID   r5,$LaDIV1
-+#else
-        BGTID   r5,$LaDIV1       
-+#endif
-        ADDIK   r29,r29,-1
- $LaDIV2:
-        ADD     r5,r5,r5                    # left shift logical  r5 get the '1' into the Carry
-        ADDC    r30,r30,r30                 # Move that bit into the Mod register
-        RSUB    r31,r6,r30                  # Try to subtract (r30 a r6)
-+#ifdef __arch64__
-+        BEALTI    r31,$LaMOD_TOO_SMALL
-+#else
-        BLTI    r31,$LaMOD_TOO_SMALL
-+#endif
-        OR      r30,r0,r31                  # Move the r31 to mod since the result was positive
-        ADDIK   r3,r3,1
- $LaMOD_TOO_SMALL:
-        ADDIK   r29,r29,-1
-+#ifdef __arch64__
-+        BEAEQi    r29,$LaLOOP_END
-+        ADD     r3,r3,r3 # Shift in the '1' into div
-+        BREAI     $LaDIV2   # Div2
-+$LaLOOP_END:
-+        BREAI     $LaRETURN_HERE
-+#else
-        BEQi    r29,$LaLOOP_END
-        ADD     r3,r3,r3 # Shift in the '1' into div
-        BRI     $LaDIV2   # Div2
- $LaLOOP_END:
-        BRI     $LaRETURN_HERE
-+#endif
- $LaDiv_By_Zero:
- $LaResult_Is_Zero:
-        OR      r3,r0,r0 # set result to 0
-@@ -115,7 +159,7 @@ $LaRETURN_HERE:
-        LLI     r29,r1,0
-        LLI     r30,r1,8
-        LLI     r31,r1,16
--       ADDIK   r1,r1,24
-+       ADDLIK   r1,r1,24
-        RTSD    r15,8
-        NOP
- #else
-diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
-index 1b3070e..91430a6 100644
---- a/libgcc/config/microblaze/umodsi3.S
-+++ b/libgcc/config/microblaze/umodsi3.S
-@@ -46,7 +46,7 @@
- __umodsi3:
-        .frame  r1,0,r15        
- 
--       addik   r1,r1,-24
-+       addlik  r1,r1,-24
-        sli     r29,r1,0
-        sli     r30,r1,8
-        sli     r31,r1,16
-@@ -59,27 +59,77 @@ __umodsi3:
-        swi     r30,r1,4
-        swi     r31,r1,8
- #endif
-+#ifdef __arch64__
-+        BEAEQI    r6,$LaDiv_By_Zero         # Div_by_Zero   # Division Error
-+        BEAEQId   r5,$LaResult_Is_Zero     # Result is Zero
-+#else
-        BEQI    r6,$LaDiv_By_Zero         # Div_by_Zero   # Division Error
-        BEQId   r5,$LaResult_Is_Zero     # Result is Zero 
-+#endif
-        ADDIK   r3,r0,0                  # Clear div
-        ADDIK   r30,r0,0        # clear mod
-        ADDIK   r29,r0,32       # Initialize the loop count
- 
- # Check if r6 and r5 are equal # if yes, return 0
-        rsub    r18,r5,r6
--       beqi    r18,$LaRETURN_HERE
- 
-+#ifdef __arch64__
-+       beaeqi    r18,$LaRETURN_HERE
-+#else
-+       beqi    r18,$LaRETURN_HERE
-+#endif
- # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5
-        xor     r18,r5,r6
-+#ifdef __arch64__
-+        beageid   r18,16
-+        addik   r3,r5,0
-+        bealti    r6,$LaRETURN_HERE
-+        breai     $LCheckr6
-+        rsub    r18,r5,r6 # MICROBLAZEcmp
-+        beagti    r18,$LaRETURN_HERE
-+#else
-        bgeid   r18,16
-        addik   r3,r5,0
-        blti    r6,$LaRETURN_HERE
-        bri     $LCheckr6
-        rsub    r18,r5,r6 # MICROBLAZEcmp
-        bgti    r18,$LaRETURN_HERE
--
-+#endif
- # If r6 [bit 31] is set, then return result as r5-r6
- $LCheckr6:
-+#ifdef __arch64__
-+        beagtid   r6,$LaDIV0
-+        addik   r3,r0,0
-+        addik   r18,r0,0x7fffffff
-+        and     r5,r5,r18
-+        and     r6,r6,r18
-+        breaid    $LaRETURN_HERE
-+        rsub    r3,r6,r5
-+# First part: try to find the first '1' in the r5
-+$LaDIV0:
-+        BEALTI    r5,$LaDIV2
-+$LaDIV1:
-+        ADD     r5,r5,r5     # left shift logical r5
-+        BEAGEID   r5,$LaDIV1   #
-+        ADDIK   r29,r29,-1
-+$LaDIV2:
-+        ADD     r5,r5,r5     # left shift logical  r5 get the '1' into the Carry
-+        ADDC    r3,r3,r3     # Move that bit into the Mod register
-+        rSUB    r31,r6,r3    # Try to subtract (r3 a r6)
-+        BEALTi    r31,$LaMOD_TOO_SMALL
-+        OR      r3,r0,r31    # Move the r31 to mod since the result was positive
-+        ADDIK   r30,r30,1
-+$LaMOD_TOO_SMALL:
-+        ADDIK   r29,r29,-1
-+        BEAEQi    r29,$LaLOOP_END
-+        ADD     r30,r30,r30 # Shift in the '1' into div
-+        BREAI     $LaDIV2     # Div2
-+$LaLOOP_END:
-+        BREAI     $LaRETURN_HERE
-+$LaDiv_By_Zero:
-+$LaResult_Is_Zero:
-+        or      r3,r0,r0   # set result to 0
-+#else
-        bgtid   r6,$LaDIV0
-        addik   r3,r0,0
-        addik   r18,r0,0x7fffffff
-@@ -111,7 +161,7 @@ $LaLOOP_END:
- $LaDiv_By_Zero:
- $LaResult_Is_Zero:
-        or      r3,r0,r0   # set result to 0
--
-+#endif
- #ifdef __arch64__
- $LaRETURN_HERE:
- # Restore values of CSRs and that of r3 and the divisor and the dividend
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch
deleted file mode 100644
index be4dfad5..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 2f22090a7e8216f7a9f7e958b77ac83006a7ce89 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 16 Apr 2019 17:20:24 +0530
-Subject: [PATCH 59/61] Reverting the patch as kernel boot is not working with
- this patch CR-1026413 Revert "[Patch,Microblaze]:reverting the cost check
- before propagating constants."
-
-This reverts commit 7156e379a67fa47a5fb9ede1448c0d528dbda65b.
----
- gcc/cprop.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/gcc/cprop.c b/gcc/cprop.c
-index deb706b..e4df509 100644
---- a/gcc/cprop.c
-+++ b/gcc/cprop.c
-@@ -733,7 +733,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-   int success = 0;
-   rtx set = single_set (insn);
- 
--#if 0
-   bool check_rtx_costs = true;
-   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
-   int old_cost = set ? set_rtx_cost (set, speed) : 0;
-@@ -745,7 +744,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-          && (GET_CODE (XEXP (note, 0)) == CONST
-              || CONSTANT_P (XEXP (note, 0)))))
-     check_rtx_costs = false;
--#endif
- 
-   /* Usually we substitute easy stuff, so we won't copy everything.
-      We however need to take care to not duplicate non-trivial CONST
-@@ -754,7 +752,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
- 
-   validate_replace_src_group (from, to, insn);
- 
--#if 0
-   /* If TO is a constant, check the cost of the set after propagation
-      to the cost of the set before the propagation.  If the cost is
-      higher, then do not replace FROM with TO.  */
-@@ -767,7 +764,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
-       return false;
-     }
- 
--#endif
- 
-   if (num_changes_pending () && apply_change_group ())
-     success = 1;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch
deleted file mode 100644
index 690bc727..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch
+++ /dev/null
@@ -1,479 +0,0 @@
-From e1b8cfe6c0b4a0bd90ecbd3e85ae7114df21b6cc Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 18 Apr 2019 16:00:37 +0530
-Subject: [PATCH 61/62] Author: Nagaraju <nmekala@xilinx.com> Date:   Wed Apr
- 17 14:11:00 2019 +0530
-
-    [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default
-    By default MB-64 is generatting barrel-shift instructions. It has been
-    removed from default. Barrel-shift instructions will be generated only if
-    barrel-shifter is enabled. Similarly to double instructions as well.
-
-    Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
----
- gcc/config/microblaze/microblaze.c  |   2 +-
- gcc/config/microblaze/microblaze.md | 269 +++++++++++++++++++++++++++++++++---
- 2 files changed, 252 insertions(+), 19 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 33d183e..c321b03 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -3868,7 +3868,7 @@ microblaze_expand_divide (rtx operands[])
-   emit_insn (gen_rtx_CLOBBER (Pmode, reg18));
- 
-   if (TARGET_MB_64) {
--      emit_insn (gen_ashldi3_long (regt1, operands[1], GEN_INT(4)));
-+      emit_insn (gen_ashldi3 (regt1, operands[1], GEN_INT(4)));
-       emit_insn (gen_adddi3 (regt1, regt1, operands[2]));
-     }
-   else  {
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 8bd175f..b5b60fb 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -545,7 +545,7 @@
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (plus:DF (match_operand:DF 1 "register_operand" "d")
-                  (match_operand:DF 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "dadd\t%0,%1,%2"
-   [(set_attr "type"     "fadd")
-   (set_attr "mode"      "DF")
-@@ -555,7 +555,7 @@
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (minus:DF (match_operand:DF 1 "register_operand" "d")
-                   (match_operand:DF 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "drsub\t%0,%2,%1"
-   [(set_attr "type"     "frsub")
-   (set_attr "mode"      "DF")
-@@ -565,7 +565,7 @@
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (mult:DF (match_operand:DF 1 "register_operand" "d")
-                  (match_operand:DF 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "dmul\t%0,%1,%2"
-   [(set_attr "type"     "fmul")
-   (set_attr "mode"      "DF")
-@@ -575,7 +575,7 @@
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (div:DF (match_operand:DF 1 "register_operand" "d")
-                 (match_operand:DF 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "ddiv\t%0,%2,%1"
-   [(set_attr "type"     "fdiv")
-   (set_attr "mode"      "DF")
-@@ -585,7 +585,7 @@
- (define_insn "sqrtdf2"
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (sqrt:DF (match_operand:DF 1 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "dsqrt\t%0,%1"
-   [(set_attr "type"     "fsqrt")
-   (set_attr "mode"      "DF")
-@@ -594,7 +594,7 @@
- (define_insn "floatdidf2"
-   [(set (match_operand:DF 0 "register_operand" "=d")
-         (float:DF (match_operand:DI 1 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "dbl\t%0,%1"
-   [(set_attr "type"     "fcvt")
-   (set_attr "mode"      "DF")
-@@ -603,7 +603,7 @@
- (define_insn "fix_truncdfdi2"
-   [(set (match_operand:DI 0 "register_operand" "=d")
-         (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "d"))))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
-   "dlong\t%0,%1"
-   [(set_attr "type"     "fcvt")
-   (set_attr "mode"      "DI")
-@@ -1299,6 +1299,34 @@
-   (set_attr "mode"     "DI")
-   (set_attr "length"   "4")])
- 
-+(define_insn "*movdi_internal2_bshift"
-+  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,   d,d,R,m")
-+       (match_operand:DI 1 "move_src_operand"         " d,I,Mnis,R,m,dJ,dJ"))]
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-+  {
-+    switch (which_alternative)
-+    {
-+      case 0:
-+        return "addlk\t%0,%1,r0";
-+     case 1:
-+     case 2:
-+        if (GET_CODE (operands[1]) == CONST_INT &&
-+           (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888))
-+         return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
-+        else
-+         return "addlik\t%0,r0,%1";
-+     case 3:
-+     case 4:
-+       return "ll%i1\t%0,%1";
-+     case 5:
-+     case 6:
-+       return "sl%i0\t%z1,%0";
-+     }
-+   }
-+  [(set_attr "type"    "load,no_delay_load,no_delay_load,no_delay_load,no_delay_load,no_delay_store,no_delay_store")
-+  (set_attr "mode"     "DI")
-+  (set_attr "length"   "4,4,12,4,8,4,8")])
-+
- (define_insn "*movdi_internal2"
-   [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,   d,d,R,m")
-        (match_operand:DI 1 "move_src_operand"         " d,I,Mnis,R,m,dJ,dJ"))]
-@@ -1312,7 +1340,15 @@
-      case 2:
-         if (GET_CODE (operands[1]) == CONST_INT && 
-            (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888))
--         return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
-+          {
-+            operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+            output_asm_insn ("addlik\t%0,r0,%h1", operands);
-+            output_asm_insn ("addlik\t%2,r0,32", operands);
-+            output_asm_insn ("addlik\t%2,%2,-1", operands);
-+            output_asm_insn ("beaneid\t%2,.-8", operands);
-+            output_asm_insn ("addlk\t%0,%0,%0", operands);
-+            return "addlik\t%0,%0,%j1 #li => la";
-+          }
-         else   
-          return "addlik\t%0,r0,%1";
-      case 3:
-@@ -1386,7 +1422,7 @@
- (define_insn "movdi_long_int"
-   [(set (match_operand:DI 0 "nonimmediate_operand" "=d")
-        (match_operand:DI 1 "general_operand"      "i"))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-   "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
-   [(set_attr "type"    "no_delay_arith")
-   (set_attr "mode"     "DI")
-@@ -1653,6 +1689,33 @@
- ;; movdf_internal
- ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT
- ;;
-+(define_insn "*movdf_internal_64_bshift"
-+  [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m")
-+        (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))]
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-+  {
-+    switch (which_alternative)
-+    {
-+      case 0:
-+       return "addlk\t%0,%1,r0";
-+      case 1:
-+       return "addlk\t%0,r0,r0";
-+      case 2:
-+      case 4:
-+          return "ll%i1\t%0,%1";
-+      case 3:
-+      {
-+       return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo";
-+      }
-+      case 5:
-+       return "sl%i0\t%1,%0";
-+    }
-+    gcc_unreachable ();
-+  }
-+  [(set_attr "type"     "no_delay_move,no_delay_move,no_delay_load,no_delay_load,no_delay_load,no_delay_store")
-+  (set_attr "mode"      "DF")
-+  (set_attr "length"    "4,4,4,16,4,4")])
-+
- (define_insn "*movdf_internal_64"
-   [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m")
-         (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))]
-@@ -1669,7 +1732,13 @@
-           return "ll%i1\t%0,%1";
-       case 3:
-       {
--       return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo";
-+       operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+       output_asm_insn ("addlik\t%0,r0,%h1", operands);
-+       output_asm_insn ("addlik\t%2,r0,32", operands);
-+       output_asm_insn ("addlik\t%2,%2,-1", operands);
-+       output_asm_insn ("beaneid\t%2,.-8", operands);
-+       output_asm_insn ("addlk\t%0,%0,%0", operands);
-+       return "addlik\t%0,%0,%j1 #li => la";
-       }
-       case 5:
-        return "sl%i0\t%1,%0";
-@@ -1789,11 +1858,21 @@
- "TARGET_MB_64"
- {
- ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
--if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
-+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT)
-   {
-     emit_insn(gen_ashldi3_long (operands[0], operands[1],operands[2]));
-     DONE;
-   }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2]))
-+  {
-+    emit_insn(gen_ashldi3_const (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 &&  GET_CODE (operands[2]) == REG)
-+  {
-+    emit_insn(gen_ashldi3_reg (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
- else
-   FAIL;
- }    
-@@ -1803,7 +1882,7 @@ else
-   [(set (match_operand:DI 0 "register_operand" "=d,d")
-        (ashift:DI (match_operand:DI 1 "register_operand" "d,d")
-                    (match_operand:DI 2 "arith_operand"    "I,d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-   "@
-   bsllli\t%0,%1,%2
-   bslll\t%0,%1,%2"
-@@ -1811,6 +1890,51 @@ else
-   (set_attr "mode"     "DI,DI")
-   (set_attr "length"   "4,4")]
- )
-+
-+(define_insn "ashldi3_const"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (ashift:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "immediate_operand" "I")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+
-+    output_asm_insn ("orli\t%3,r0,%2", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1]))
-+        output_asm_insn ("addlk\t%0,%1,r0", operands);
-+
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "addlk\t%0,%0,%0";
-+  }
-+  [(set_attr "type"    "multi")
-+   (set_attr "mode"    "DI")
-+   (set_attr "length"  "20")]
-+)
-+
-+(define_insn "ashldi3_reg"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (ashift:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "register_operand" "d")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+    output_asm_insn ("andli\t%3,%2,31", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1])) 
-+      output_asm_insn ("addlk\t%0,r0,%1", operands);
-+    /* Exit the loop if zero shift. */
-+    output_asm_insn ("beaeqid\t%3,.+24", operands);
-+    /* Emit the loop.  */
-+    output_asm_insn ("addlk\t%0,%0,r0", operands);
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "addlk\t%0,%0,%0";
-+  }
-+  [(set_attr "type"    "multi")
-+  (set_attr "mode"     "DI")
-+  (set_attr "length"   "28")]
-+)
-+
- ;; The following patterns apply when there is no barrel shifter present
- 
- (define_insn "*ashlsi3_with_mul_delay"
-@@ -1944,11 +2068,21 @@ else
- "TARGET_MB_64"
- {
- ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
--if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
-+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT)
-   {
-     emit_insn(gen_ashrdi3_long (operands[0], operands[1],operands[2]));
-     DONE;
-   }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2]))
-+  {
-+    emit_insn(gen_ashrdi3_const (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 &&  GET_CODE (operands[2]) == REG)
-+  {
-+    emit_insn(gen_ashrdi3_reg (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
- else
-   FAIL;
- }    
-@@ -1958,7 +2092,7 @@ else
-   [(set (match_operand:DI 0 "register_operand" "=d,d")
-        (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d")
-                    (match_operand:DI 2 "arith_operand"    "I,d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-   "@
-    bslrai\t%0,%1,%2
-    bslra\t%0,%1,%2"
-@@ -1966,6 +2100,51 @@ else
-   (set_attr "mode"     "DI,DI")
-   (set_attr "length"   "4,4")]
-   )
-+
-+(define_insn "ashrdi3_const"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (ashiftrt:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "immediate_operand" "I")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+
-+    output_asm_insn ("orli\t%3,r0,%2", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1]))
-+        output_asm_insn ("addlk\t%0,%1,r0", operands);
-+
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "srla\t%0,%0";
-+  }
-+  [(set_attr "type"    "arith")
-+  (set_attr "mode"    "DI")
-+  (set_attr "length"  "20")]
-+)
-+
-+(define_insn "ashrdi3_reg"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (ashiftrt:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "register_operand" "d")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+    output_asm_insn ("andli\t%3,%2,31", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1])) 
-+      output_asm_insn ("addlk\t%0,r0,%1", operands);
-+    /* Exit the loop if zero shift. */
-+    output_asm_insn ("beaeqid\t%3,.+24", operands);
-+    /* Emit the loop.  */
-+    output_asm_insn ("addlk\t%0,%0,r0", operands);
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "srla\t%0,%0";
-+  }
-+  [(set_attr "type"    "multi")
-+  (set_attr "mode"     "DI")
-+  (set_attr "length"   "28")]
-+)
-+
- (define_expand "ashrsi3"
-   [(set (match_operand:SI 0 "register_operand" "=&d")
-        (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -2083,11 +2262,21 @@ else
- "TARGET_MB_64"
- {
- ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
--if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
-+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT)
-   {
-     emit_insn(gen_lshrdi3_long (operands[0], operands[1],operands[2]));
-     DONE;
-   }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2]))
-+  {
-+    emit_insn(gen_lshrdi3_const (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
-+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 &&  GET_CODE (operands[2]) == REG)
-+  {
-+    emit_insn(gen_lshrdi3_reg (operands[0], operands[1],operands[2]));
-+    DONE;
-+  }
- else
-   FAIL;
- }    
-@@ -2097,7 +2286,7 @@ else
-   [(set (match_operand:DI 0 "register_operand" "=d,d")
-        (lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d")
-                    (match_operand:DI 2 "arith_operand"    "I,d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_BARREL_SHIFT"
-   "@
-    bslrli\t%0,%1,%2
-    bslrl\t%0,%1,%2"
-@@ -2106,6 +2295,50 @@ else
-   (set_attr "length"   "4,4")]
-   )
- 
-+(define_insn "lshrdi3_const"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (lshiftrt:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "immediate_operand" "I")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+
-+    output_asm_insn ("orli\t%3,r0,%2", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1]))
-+        output_asm_insn ("addlk\t%0,%1,r0", operands);
-+
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "srll\t%0,%0";
-+  }
-+  [(set_attr "type"    "multi")
-+  (set_attr "mode"    "DI")
-+  (set_attr "length"  "20")]
-+)
-+
-+(define_insn "lshrdi3_reg"
-+  [(set (match_operand:DI 0 "register_operand" "=&d")
-+       (lshiftrt:DI (match_operand:DI 1 "register_operand"  "d")
-+                   (match_operand:DI 2 "register_operand" "d")))]
-+  "TARGET_MB_64"
-+  {
-+    operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM);
-+    output_asm_insn ("andli\t%3,%2,31", operands);
-+    if (REGNO (operands[0]) != REGNO (operands[1]))
-+      output_asm_insn ("addlk\t%0,r0,%1", operands);
-+    /* Exit the loop if zero shift. */
-+    output_asm_insn ("beaeqid\t%3,.+24", operands);
-+    /* Emit the loop.  */
-+    output_asm_insn ("addlk\t%0,%0,r0", operands);
-+    output_asm_insn ("addlik\t%3,%3,-1", operands);
-+    output_asm_insn ("beaneid\t%3,.-8", operands);
-+    return "srll\t%0,%0";
-+  }
-+  [(set_attr "type"    "multi")
-+  (set_attr "mode"     "SI")
-+  (set_attr "length"   "28")]
-+)
-+
- (define_expand "lshrsi3"
-   [(set (match_operand:SI 0 "register_operand" "=&d")
-        (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -2233,7 +2466,7 @@ else
-        (eq:DI 
-               (match_operand:DI 1 "register_operand" "d")
-               (match_operand:DI 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_PATTERN_COMPARE"
-   "pcmpleq\t%0,%1,%2"
-   [(set_attr "type"    "arith")
-    (set_attr "mode"    "DI")
-@@ -2245,7 +2478,7 @@ else
-        (ne:DI 
-               (match_operand:DI 1 "register_operand" "d")
-               (match_operand:DI 2 "register_operand" "d")))]
--  "TARGET_MB_64"
-+  "TARGET_MB_64 && TARGET_PATTERN_COMPARE"
-   "pcmplne\t%0,%1,%2"
-   [(set_attr "type"    "arith")
-   (set_attr "mode"     "DI")
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
deleted file mode 100644
index e7dfa89c..00000000
--- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 612e6579116e6714417ea21e6c13b0968bb6aac2 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Wed, 8 May 2019 14:12:03 +0530
-Subject: [PATCH 62/62] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
- disable fivopts by default
-
-Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default.
-
- * gcc/common/config/microblaze/microblaze-common.c
-   (microblaze_option_optimization_table): Disable fivopts by default.
-
-Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
----
- gcc/common/config/microblaze/microblaze-common.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index fe45f2e..2873d4b 100644
---- a/gcc/common/config/microblaze/microblaze-common.c
-+++ b/gcc/common/config/microblaze/microblaze-common.c
-@@ -27,13 +27,15 @@
- /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
- static const struct default_options microblaze_option_optimization_table[] =
-   {
--    /* Turn off ivopts by default. It messes up cse. */
-+    /* Turn off ivopts by default. It messes up cse. 
-+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, */
-     { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 },
--    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
-     { OPT_LEVELS_NONE, 0, NULL, 0 }
-   };
- 
- #undef TARGET_DEFAULT_TARGET_FLAGS
- #define TARGET_DEFAULT_TARGET_FLAGS    TARGET_DEFAULT
- 
-+#undef TARGET_OPTION_OPTIMIZATION_TABLE
-+#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table
- struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
--- 
-2.7.4
-
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
index 2f80661a..79b895fc 100644
--- a/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
@@ -1,69 +1,63 @@
 # Add MicroBlaze Patches (only when using MicroBlaze)
-FILESEXTRAPATHS_append_microblaze := ":${THISDIR}/gcc-9"
+FILESEXTRAPATHS_append_microblaze := ":${THISDIR}/gcc-10"
+
 SRC_URI_append_microblaze = " \
-        file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \
-        file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \
-        file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \
-        file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \
-        file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \
-        file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \
-        file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \
-        file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \
-        file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \
-        file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \
-        file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \
-        file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \
-        file://0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch \
-        file://0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch \
-        file://0015-Patch-microblaze-Disable-fivopts-by-default.patch \
-        file://0016-Patch-microblaze-Removed-moddi3-routinue.patch \
-        file://0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch \
-        file://0018-Patch-microblaze-Add-optimized-lshrsi3.patch \
-        file://0019-Patch-microblaze-Modified-trap-instruction.patch \
-        file://0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \
-        file://0021-Patch-microblaze-Add-cbranchsi4_reg.patch \
-        file://0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \
-        file://0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \
-        file://0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \
-        file://0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \
-        file://0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \
-        file://0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch \
-        file://0028-Patch-microblaze-Correct-the-const-high-double-immed.patch \
-        file://0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \
-        file://0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \
-        file://0031-Patch-microblaze-Add-new-bit-field-instructions.patch \
-        file://0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \
-        file://0033-Fixing-the-bug-in-the-bit-field-instruction.patch \
-        file://0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch \
-        file://0035-Fixing-the-issue-with-the-builtin_alloc.patch \
-        file://0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch \
-        file://0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \
-        file://0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \
-        file://0039-Intial-commit-of-64-bit-Microblaze.patch \
-        file://0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch \
-        file://0041-Intial-commit-for-64bit-MB-sources.patch \
-        file://0042-re-arrangement-of-the-compare-branches.patch \
-        file://0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch \
-        file://0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch \
-        file://0045-Fixed-issues-like.patch \
-        file://0046-Fixed-below-issues.patch \
-        file://0047-Added-double-arith-instructions.patch \
-        file://0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
-        file://0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
-        file://0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
-        file://0051-fixing-the-typo-errors-in-umodsi3-file.patch \
-        file://0052-fixing-the-32bit-LTO-related-issue9-1014024.patch \
-        file://0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
-        file://0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \
-        file://0055-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-        file://0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
-        file://0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \
-        file://0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch \
-        file://0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \
-        file://0060-Author-Nagaraju-nmekala-xilinx.com.patch \
-        file://0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \
-        file://0062-Added-new-MB-64-single-register-arithmetic-instructi.patch \
-        file://0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \
-        file://0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \
-        file://0065-microblaze-multilib-hack.patch \
+    file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \
+    file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \
+    file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \
+    file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \
+    file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \
+    file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \
+    file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \
+    file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \
+    file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \
+    file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \
+    file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \
+    file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \
+    file://0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch \
+    file://0014-Patch-microblaze-Disable-fivopts-by-default.patch \
+    file://0015-Patch-microblaze-Removed-moddi3-routinue.patch \
+    file://0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch \
+    file://0017-Patch-microblaze-Add-optimized-lshrsi3.patch \
+    file://0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \
+    file://0019-Patch-microblaze-Add-cbranchsi4_reg.patch \
+    file://0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \
+    file://0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \
+    file://0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \
+    file://0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \
+    file://0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \
+    file://0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch \
+    file://0026-Patch-microblaze-Correct-the-const-high-double-immed.patch \
+    file://0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \
+    file://0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \
+    file://0029-Patch-microblaze-Add-new-bit-field-instructions.patch \
+    file://0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \
+    file://0031-Fixing-the-issue-with-the-builtin_alloc.patch \
+    file://0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \
+    file://0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \
+    file://0034-Intial-commit-of-64-bit-Microblaze.patch \
+    file://0035-Intial-commit-for-64bit-MB-sources.patch \
+    file://0036-re-arrangement-of-the-compare-branches.patch \
+    file://0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch \
+    file://0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch \
+    file://0039-Fix-various-issues.patch \
+    file://0040-Fixed-below-issues.patch \
+    file://0041-Fix-various.patch \
+    file://0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
+    file://0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
+    file://0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
+    file://0045-fixing-the-typo-errors-in-umodsi3-file.patch \
+    file://0046-fixing-the-32bit-LTO-related-issue9-1014024.patch \
+    file://0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
+    file://0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \
+    file://0049-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+    file://0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
+    file://0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch \
+    file://0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \
+    file://0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch \
+    file://0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \
+    file://0055-Added-new-MB-64-single-register-arithmetic-instructi.patch \
+    file://0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \
+    file://0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \
+    file://0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch \
 "
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
index 4db9957c..906ef4db 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
+++ b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
@@ -5,43 +5,35 @@ LTTNGUST_microblaze = ""
 FILESEXTRAPATHS_append := ":${THISDIR}/gdb"
 
 SRC_URI_append_microblaze = " \
-        file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
-        file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
-        file://0004-Fix-relaxation-of-assembler-resolved-references.patch \
-        file://0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \
-        file://0006-upstream-change-to-garbage-collection-sweep-causes-m.patch \
-        file://0007-Fix-bug-in-TLSTPREL-Relocation.patch \
-        file://0008-Added-Address-extension-instructions.patch \
-        file://0009-fixing-the-MAX_OPCODES-to-correct-value.patch \
-        file://0010-Add-new-bit-field-instructions.patch \
-        file://0011-fixing-the-imm-bug.patch \
-        file://0015-intial-commit-of-MB-64-bit.patch \
-        file://0016-MB-X-initial-commit.patch \
-        file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
-        file://0018-Added-relocations-for-MB-X.patch \
-        file://0019-Fixed-MB-x-relocation-issues.patch \
-        file://0020-Fixing-the-branch-related-issues.patch \
-        file://0021-Fixed-address-computation-issues-with-64bit-address.patch \
-        file://0022-Adding-new-relocation-to-support-64bit-rodata.patch \
-        file://0023-fixing-the-.bss-relocation-issue.patch \
-        file://0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
-        file://0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch \
-        file://0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch \
-        file://0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
-        file://0029-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-        file://0030-Added-support-to-new-arithmetic-single-register-inst.patch \
-        file://0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
-        file://0032-Add-initial-port-of-linux-gdbserver.patch \
-        file://0033-Initial-port-of-core-reading-support.patch \
-        file://0034-Fix-debug-message-when-register-is-unavailable.patch \
-        file://0035-revert-master-rebase-changes-to-gdbserver.patch \
-        file://0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch \
-        file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
-        file://0038-Initial-support-for-native-gdb.patch \
-        file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
-        file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
-        file://0041-patch-MicroBlaze-porting-GDB-for-linux.patch \
-        file://0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \
-        file://0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \
-        file://0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch \
+    file://0001-sim-Allow-microblaze-architecture.patch \
+    file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
+    file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \
+    file://0005-Fix-relaxation-of-assembler-resolved-references.patch \
+    file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \
+    file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \
+    file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \
+    file://0009-Added-Address-extension-instructions.patch \
+    file://0010-Add-new-bit-field-instructions.patch \
+    file://0011-fixing-the-imm-bug.patch \
+    file://0015-intial-commit-of-MB-64-bit.patch \
+    file://0016-MB-X-initial-commit.patch \
+    file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
+    file://0018-Added-relocations-for-MB-X.patch \
+    file://0019-Update-MB-x.patch \
+    file://0020-Various-fixes.patch \
+    file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
+    file://0022-fixing-the-.bss-relocation-issue.patch \
+    file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
+    file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
+    file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+    file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \
+    file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
+    file://0033-Fix-various-compile-warnings.patch \
+    file://0034-Add-initial-port-of-linux-gdbserver.patch \
+    file://0035-Initial-port-of-core-reading-support.patch \
+    file://0036-Fix-debug-message-when-register-is-unavailable.patch \
+    file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
+    file://0038-Initial-support-for-native-gdb.patch \
+    file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
+    file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
         "
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch
new file mode 100644
index 00000000..6f054720
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch
@@ -0,0 +1,40 @@
+From d23be47051b4410e2e74c6db6bf9a1a9f7195f6d Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 6 Aug 2020 15:37:52 -0500
+Subject: [PATCH 01/40] sim: Allow microblaze* architecture
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ sim/configure     | 2 +-
+ sim/configure.tgt | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sim/configure b/sim/configure
+index 72f95cd5c7a..9e28cc78687 100755
+--- a/sim/configure
++++ b/sim/configure
+@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
+ 
+ 
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+ 
+   sim_arch=microblaze
+   subdirs="$subdirs microblaze"
+diff --git a/sim/configure.tgt b/sim/configure.tgt
+index 8a8e03d96f4..f6743fe8d41 100644
+--- a/sim/configure.tgt
++++ b/sim/configure.tgt
+@@ -59,7 +59,7 @@ case "${target}" in
+    mcore-*-*)
+        SIM_ARCH(mcore)
+        ;;
+-   microblaze-*-*)
++   microblaze*-*-*)
+        SIM_ARCH(microblaze)
+        ;;
+    mips*-*-*)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index 4b85d7c9..6967a3d7 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From f1cb2126c751d6c2526ea969918d5b51dd5b851f Mon Sep 17 00:00:00 2001
+From d7a3a238edac153f391a65ae45215a117d25bc48 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
 
 Added two new instructions, wdc.ext.clear and wdc.ext.flush,
 to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 62ee3c9a4d..865151f95b 100644
+index 62ee3c9a4d1..865151f95b0 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@ index 62ee3c9a4d..865151f95b 100644
    {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
    {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5a2d3b0c8b..42f3dd3be5 100644
+index 5a2d3b0c8bb..42f3dd3be53 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
index 53415370..78e10261 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,7 +1,7 @@
-From 68fe2e975f229cce08029b3a5afb06132f1cb31c Mon Sep 17 00:00:00 2001
+From 2e87167d8c5d40d8dfbd8d879d78ab0bd6f3bdfd Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 03/43] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index a13e81ebb8..1824ba6e5b 100644
+index b622ffcee2a..26b180f1490 100644
 --- a/bfd/elf-eh-frame.c
 +++ b/bfd/elf-eh-frame.c
 @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch
index 7ba07a0c..d851c589 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-relaxation-of-assembler-resolved-references.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch
@@ -1,17 +1,17 @@
-From 1ea25f31c38e606603bf406efebfb6cfc26aec38 Mon Sep 17 00:00:00 2001
+From 210bb23010e2c3e65f5f54c220d27da0590bab06 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 04/43] Fix relaxation of assembler resolved references
+Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
 
 ---
- bfd/elf32-microblaze.c     | 38 ++++++++++++++++++++++++++++++++++++++
- 2 files changed, 39 insertions(+)
+ bfd/elf32-microblaze.c     | 41 ++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 42 insertions(+)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index e3c8027248..359484dd5e 100644
+index c187d83ee04..dfd82438e35 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1973,6 +1973,47 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
@@ -44,9 +44,12 @@ index e3c8027248..359484dd5e 100644
 +                          elf_section_data (o)->this_hdr.contents = ocontents;
 +                        }
 +                    }
-+                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+                                                    + isym->st_value, sec);
 +                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++                  if (val != irelscan->r_addend) {
++                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++                  }
++                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                                                    + isym->st_value, 0, sec);
 +                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
 +                                                     irelscan->r_addend);
 +              }
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
index 18646195..eea29059 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
@@ -1,10 +1,12 @@
-From 62859c17077c559ad5e5db1cfbb496d5e8c3da68 Mon Sep 17 00:00:00 2001
+From d2aee40b9753b783853bf38d36d9b6e50d16cc20 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 05/43] [LOCAL]: Fixup debug_loc sections after linker
- relaxation Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing reloc
- info from the assembler to the linker when the linker manages to fully
- resolve a local symbol reference.
+Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
+ relaxation
+
+Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
+reloc info from the assembler to the linker when the linker
+manages to fully resolve a local symbol reference.
 
 This is a workaround for design flaws in the assembler to
 linker interface with regards to linker relaxation.
@@ -12,44 +14,37 @@ linker interface with regards to linker relaxation.
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
 ---
- bfd/bfd-in2.h              |  9 +++++--
- bfd/elf32-microblaze.c     | 53 ++++++++++++++++++++++++++++----------
+ bfd/bfd-in2.h              |  5 +++++
+ bfd/elf32-microblaze.c     | 39 +++++++++++++++++++++++++++++++-------
  bfd/libbfd.h               |  1 +
- bfd/reloc.c                |  6 +++++
- include/elf/microblaze.h   |  2 ++
- 7 files changed, 64 insertions(+), 16 deletions(-)
+ bfd/reloc.c                |  6 ++++++
+ include/elf/microblaze.h   |  1 +
+ 7 files changed, 52 insertions(+), 7 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index e25da50aaf..721531886a 100644
+index 6f3e41da376..52c81b10b6d 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5866,10 +5866,15 @@ value relative to the read-write small data area anchor  */
+@@ -5363,6 +5363,11 @@ value relative to the read-write small data area anchor  */
  expressions of the form "Symbol Op Symbol"  */
    BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
  
--/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 32 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
--  BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
 +  BFD_RELOC_MICROBLAZE_32_NONE,
 +
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
- 
  /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 359484dd5e..1c69c269c7 100644
+index dfd82438e35..cbba704e691 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
           FALSE),               /* PC relative offset?  */
  
--   /* This reloc does nothing. Used for relaxation.  */
 +   HOWTO (R_MICROBLAZE_32_NONE,   /* Type.  */
 +          0,         /* Rightshift.  */
 +          2,            /* Size (0 = byte, 1 = short, 2 = long).  */
@@ -64,10 +59,9 @@ index 359484dd5e..1c69c269c7 100644
 +          0,         /* Dest Mask.  */
 +          FALSE),       /* PC relative offset?  */
 +
-+   /* This reloc does nothing.  Used for relaxation.  */
+    /* This reloc does nothing. Used for relaxation.  */
     HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
           0,                    /* Rightshift.  */
-          3,                    /* Size (0 = byte, 1 = short, 2 = long).  */
 @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
      case BFD_RELOC_NONE:
        microblaze_reloc = R_MICROBLAZE_NONE;
@@ -78,7 +72,7 @@ index 359484dd5e..1c69c269c7 100644
      case BFD_RELOC_MICROBLAZE_64_NONE:
        microblaze_reloc = R_MICROBLAZE_64_NONE;
        break;
-@@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1918,14 +1935,22 @@ microblaze_elf_relax_section (bfd *abfd,
                 }
               break;
             case R_MICROBLAZE_NONE:
@@ -86,7 +80,9 @@ index 359484dd5e..1c69c269c7 100644
               {
                 /* This was a PC-relative instruction that was
                    completely resolved.  */
-@@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd,
+                int sfix, efix;
++               unsigned int val;
+                bfd_vma target_address;
                 target_address = irel->r_addend + irel->r_offset;
                 sfix = calc_fixup (irel->r_offset, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
@@ -99,20 +95,12 @@ index 359484dd5e..1c69c269c7 100644
                 irel->r_addend -= (efix - sfix);
                 /* Should use HOWTO.  */
                 microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-                                                   irel->r_addend);
--             }
--             break;
-+               }
-+               break;
-            case R_MICROBLAZE_64_NONE:
-              {
-                /* This was a PC-relative 64-bit instruction that was
-@@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1973,12 +1998,16 @@ microblaze_elf_relax_section (bfd *abfd,
           irelscanend = irelocs + o->reloc_count;
           for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
             {
 -              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+             if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
                  {
                    unsigned int val;
  
@@ -125,22 +113,12 @@ index 359484dd5e..1c69c269c7 100644
                    /* This was a PC-relative instruction that was completely resolved.  */
                    if (ocontents == NULL)
                      {
-@@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd,
-                                                          (file_ptr) 0,
-                                                          o->rawsize))
-                               goto error_return;
--                          elf_section_data (o)->this_hdr.contents = ocontents;
--                        }
--                    }
--                 irelscan->r_addend -= calc_fixup (irelscan->r_addend
--                                                    + isym->st_value, sec);
-+                         elf_section_data (o)->this_hdr.contents = ocontents;
-+                       }
-+                   }
-                   val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
+@@ -2006,14 +2035,10 @@ microblaze_elf_relax_section (bfd *abfd,
+                   if (val != irelscan->r_addend) {
+                     fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
+                   }
+-                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
+-                                                    + isym->st_value, 0, sec);
 +                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
@@ -151,20 +129,20 @@ index 359484dd5e..1c69c269c7 100644
               if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
                 {
                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2073,7 +2098,7 @@ microblaze_elf_relax_section (bfd *abfd,
                               elf_section_data (o)->this_hdr.contents = ocontents;
                             }
                         }
 -                     irelscan->r_addend -= calc_fixup (irel->r_addend
-+              irelscan->r_addend -= calc_fixup (irelscan->r_addend
++                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
                                                         + isym->st_value,
                                                         0,
                                                         sec);
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 36284d71a9..feb9fada1e 100644
+index 44cefbd66d4..a01891f3423 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2903,6 +2903,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_ROSDA",
    "BFD_RELOC_MICROBLAZE_32_RWSDA",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
@@ -173,10 +151,10 @@ index 36284d71a9..feb9fada1e 100644
    "BFD_RELOC_MICROBLAZE_64_GOTPC",
    "BFD_RELOC_MICROBLAZE_64_GOT",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index e6446a7809..87753ae4f0 100644
+index b00b79f3190..78f13180c71 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6795,6 +6795,12 @@ ENUM
+@@ -6806,6 +6806,12 @@ ENUM
  ENUMDOC
    This is a 32 bit reloc for the microblaze to handle
    expressions of the form "Symbol Op Symbol"
@@ -190,15 +168,14 @@ index e6446a7809..87753ae4f0 100644
    BFD_RELOC_MICROBLAZE_64_NONE
  ENUMDOC
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 830b5ad446..6ee0966444 100644
+index 830b5ad4461..0dba2c0f44f 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
-@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
    RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
    RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
 +  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
-+   
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
  /* Global base address names.  */
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 35d44be4..09a17eda 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From 72fe91edf03a0270ecd9df795f1a1eaded3b7d15 Mon Sep 17 00:00:00 2001
+From df187bca3d19a3e5c36182929e7e14bc6a49aad5 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 06/43] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
  regression
 
 Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -23,10 +23,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 deletion(-)
 
 diff --git a/bfd/elflink.c b/bfd/elflink.c
-index e50c0e4b38..09d43e3ca5 100644
+index 7078a2fb6f4..7926fdf63be 100644
 --- a/bfd/elflink.c
 +++ b/bfd/elflink.c
-@@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
+@@ -6274,7 +6274,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
  
        inf = (struct elf_gc_sweep_symbol_info *) data;
        (*inf->hide_symbol) (inf->info, h, TRUE);
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch
index a5cc8114..c37a5aed 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 2ea146401a9aed9e3b6cc07e1b6c0f81e5a0527c Mon Sep 17 00:00:00 2001
+From 0f1d7bd04916af6172780335dc6abc11d45564f2 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 07/43] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
 
 Fixed the problem related to the fixup/relocations TLSTPREL.
 When the fixup is applied the addend is not added at the correct offset
@@ -13,7 +13,7 @@ big & little-endian compilers
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 1c69c269c7..d19a6dca84 100644
+index cbba704e691..cc4c0568c68 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch
index 933e51e1..c9903a40 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-Address-extension-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From a4b50cb6f4b8d2f4e7d3b28bbc2f8110277e441d Mon Sep 17 00:00:00 2001
+From c0bb923f0978d5767048274cd778c8cbcef184ec Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 08/43] Added Address extension instructions
+Subject: [PATCH 09/40] Added Address extension instructions
 
 This patch adds the support of new instructions which are required
 for supporting Address extension feature.
@@ -13,17 +13,27 @@ ChangeLog:
 
   *microblaze-opc.h (op_code_struct): Update
      Added new instructions
+     Set MAX_OPCODES to matching value
   *microblaze-opcm.h (microblaze_instr): Update
      Added new instructions
 ---
- opcodes/microblaze-opc.h  | 11 +++++++++++
- opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 16 insertions(+), 5 deletions(-)
+ opcodes/microblaze-opc.h  | 19 +++++++++++++++----
+ opcodes/microblaze-opcm.h | 12 ++++++------
+ 2 files changed, 21 insertions(+), 10 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 865151f95b..330f1040e7 100644
+index 865151f95b0..d9a84e575e8 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+ 
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+ 
+ struct op_code_struct
+ {
 @@ -178,8 +178,11 @@ struct op_code_struct
    {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
    {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -61,6 +71,20 @@ index 865151f95b..330f1040e7 100644
    {"lbui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst },
    {"lhui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst },
    {"lwi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst },
+@@ -258,10 +267,10 @@ struct op_code_struct
+   {"smi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
+   {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
+   {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
+-  {"fadd",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
++  {"fadd",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, mbi_fadd, arithmetic_inst },
+   {"frsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
+-  {"fmul",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
+-  {"fdiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
++  {"fmul",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, mbi_fmul, arithmetic_inst },
++  {"fdiv",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, mbi_fdiv, arithmetic_inst },
+   {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
+   {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
+   {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
 @@ -405,6 +414,8 @@ struct op_code_struct
    {"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
    {"mbar",      INST_TYPE_IMM5,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN,   mbar,      special_inst },
@@ -71,10 +95,10 @@ index 865151f95b..330f1040e7 100644
    {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
    {"", 0, 0, 0, 0, 0, 0, 0, 0},
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 42f3dd3be5..1c39dbf50b 100644
+index 42f3dd3be53..8be6e97a1d5 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
-@@ -33,13 +33,13 @@ enum microblaze_instr
+@@ -33,14 +33,14 @@ enum microblaze_instr
    /* 'or/and/xor' are C++ keywords.  */
    microblaze_or, microblaze_and, microblaze_xor,
    andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
@@ -88,11 +112,13 @@ index 42f3dd3be5..1c39dbf50b 100644
    brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
 -  bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh,
 -  shr, sw, swr, swx, lbui, lhui, lwi,
+-  sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
 +  bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
-   sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
++  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
+   tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
deleted file mode 100644
index 8b51a7a7..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 9c7c893866ab6b63942b86be6134c34b96272306 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Thu, 28 Jan 2016 14:07:34 +0530
-Subject: [PATCH 09/43] fixing the MAX_OPCODES to correct value
-
----
- opcodes/microblaze-opc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 330f1040e7..2a6b841232 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
- 
- struct op_code_struct
- {
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch
index 11d45a23..f94410d5 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 55acba095458b872b500e978af946733a9f33021 Mon Sep 17 00:00:00 2001
+From 32058fa03c18d710b3029108e967be687d00516c Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/43] Add new bit-field instructions
+Subject: [PATCH 10/40] Add new bit-field instructions
 
 This patches adds new bsefi and bsifi instructions.
 BSEFI- The instruction shall extract a bit field from a
@@ -13,47 +13,48 @@ The rest of the bits in the destination register shall be unchanged
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
- opcodes/microblaze-dis.c   | 16 +++++++++
+ opcodes/microblaze-dis.c   | 17 +++++++++
  opcodes/microblaze-opc.h   | 12 ++++++-
  opcodes/microblaze-opcm.h  |  6 +++-
- 4 files changed, 102 insertions(+), 3 deletions(-)
+ 4 files changed, 103 insertions(+), 3 deletions(-)
 
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f691740dfd..f8aaf27873 100644
+index 2b3aa8e0786..356f1da22ed 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -73,6 +73,18 @@ get_field_imm5_mbar (long instr)
-   return(strdup(tmpstr));
+@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm5width (long instr)
++get_field_imm5width (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
 +  if (instr & 0x00004000)
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
 + else
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+  return (strdup (tmpstr));
++    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++  return p;
 +}
 +
  static char *
- get_field_rfsl (long instr)
+ get_field_rfsl (struct string_buf *buf, long instr)
  {
-@@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         /* For mbar 16 or sleep insn.  */
-         case INST_TYPE_NONE:
-           break;
+@@ -426,6 +438,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+        case INST_TYPE_NONE:
+          break;
+          /* For tuqula instruction */
 +        /* For bit field insns.  */
-+           case INST_TYPE_RD_R1_IMM5_IMM5:
-+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
-+            break;
-        /* For tuqula instruction */
++       case INST_TYPE_RD_R1_IMM5_IMM5:
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++         break;
++       /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
+          print_func (stream, "\t%s", get_field_rd (&buf, inst));
+          break;
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 2a6b841232..ce8ac351b5 100644
+index d9a84e575e8..d3b234e1fcd 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -59,6 +59,9 @@
@@ -104,7 +105,7 @@ index 2a6b841232..ce8ac351b5 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 1c39dbf50b..28662694cd 100644
+index 8be6e97a1d5..c3b2b8f0f6e 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -29,7 +29,7 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch
index b6f2920a..3f3c8141 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch
@@ -1,15 +1,15 @@
-From f42a99be023e3f933c0a228ac8e08d59c59ec8d7 Mon Sep 17 00:00:00 2001
+From 121b64d9dafd3119925a7e95a09fa9f388e53922 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/43] fixing the imm bug. with relax option imm -1 is also
- getting removed this is corrected now.
+Subject: [PATCH 11/40] fixing the imm bug.
 
+with relax option imm -1 is also getting removed this is corrected now.
 ---
  bfd/elf32-microblaze.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d19a6dca84..d001437b3f 100644
+index cc4c0568c68..cb7271f5017 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd,
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch
index 96cab28a..bda74adc 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch
@@ -1,7 +1,7 @@
-From b42fae987795bb210476dcaa5e086f42602208f8 Mon Sep 17 00:00:00 2001
+From 48e5b2505d97ca936e9946c3945c72bdcfc1743e Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/43] intial commit of MB 64-bit
+Subject: [PATCH 15/40] intial commit of MB 64-bit
 
 ---
  bfd/Makefile.am                    |    2 +
@@ -9,69 +9,77 @@ Subject: [PATCH 15/43] intial commit of MB 64-bit
  bfd/config.bfd                     |    4 +
  bfd/configure                      |    2 +
  bfd/configure.ac                   |    2 +
- bfd/cpu-microblaze.c               |   52 +-
- bfd/elf64-microblaze.c             | 3584 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c               |   55 +-
+ bfd/doc/Makefile.in                |    1 +
+ bfd/elf64-microblaze.c             | 3560 ++++++++++++++++++++++++++++
  bfd/targets.c                      |    6 +
  include/elf/common.h               |    1 +
- opcodes/microblaze-dis.c           |   39 +-
+ ld/Makefile.am                     |    4 +
+ ld/Makefile.in                     |    7 +
+ ld/configure.tgt                   |    3 +
+ ld/emulparams/elf64microblaze.sh   |   23 +
+ ld/emulparams/elf64microblazeel.sh |   23 +
+ opcodes/microblaze-dis.c           |   43 +-
  opcodes/microblaze-opc.h           |  162 +-
  opcodes/microblaze-opcm.h          |   20 +-
- 19 files changed, 4181 insertions(+), 41 deletions(-)
+ 20 files changed, 4156 insertions(+), 43 deletions(-)
  create mode 100644 bfd/elf64-microblaze.c
+ create mode 100644 ld/emulparams/elf64microblaze.sh
+ create mode 100644 ld/emulparams/elf64microblazeel.sh
 
 diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index a9191555ad..c5fd250812 100644
+index e5bd28f03f5..35ecb83a1a1 100644
 --- a/bfd/Makefile.am
 +++ b/bfd/Makefile.am
-@@ -570,6 +570,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -558,6 +558,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -597,6 +598,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
 diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index 896df52042..fd457cba1e 100644
+index 15334f10c55..89a2470ec8f 100644
 --- a/bfd/Makefile.in
 +++ b/bfd/Makefile.in
-@@ -995,6 +995,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
+@@ -984,6 +984,7 @@ BFD64_BACKENDS = \
+        elf64-ia64.lo \
+        elf64-ia64-vms.lo \
+        elfxx-ia64.lo \
 +       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
+        elfn32-mips.lo \
+        elf64-mips.lo \
+        elfxx-mips.lo \
+@@ -1023,6 +1024,7 @@ BFD64_BACKENDS_CFILES = \
+        elf64-gen.c \
+        elf64-hppa.c \
+        elf64-ia64-vms.c \
 +       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
-@@ -1494,6 +1496,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
+        elf64-mips.c \
+        elf64-mmix.c \
+        elf64-nfp.c \
+@@ -1504,6 +1506,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index f13812b7c7..a98c220db5 100644
+index 0a96927e0ed..1fcae568c36 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
-@@ -850,11 +850,15 @@ case "${targ}" in
+@@ -842,11 +842,15 @@ case "${targ}" in
    microblazeel*-*)
      targ_defvec=microblaze_elf32_le_vec
      targ_selvecs=microblaze_elf32_vec
@@ -88,36 +96,36 @@ index f13812b7c7..a98c220db5 100644
  
  #ifdef BFD64
 diff --git a/bfd/configure b/bfd/configure
-index 8d6c94aef2..3defb1f784 100755
+index abd7b2a83e5..731c059eba0 100755
 --- a/bfd/configure
 +++ b/bfd/configure
-@@ -14847,6 +14847,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -14804,6 +14804,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/configure.ac b/bfd/configure.ac
-index 5f02c41520..d3010b47dc 100644
+index 7eee83ae4d4..b87f6183b98 100644
 --- a/bfd/configure.ac
 +++ b/bfd/configure.ac
-@@ -615,6 +615,8 @@ do
-     rx_elf32_linux_le_vec)      tb="$tb elf32-rx.lo elf32.lo $elf" ;;
-     s390_elf32_vec)             tb="$tb elf32-s390.lo elf32.lo $elf" ;;
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+@@ -540,6 +540,8 @@ do
+     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
+     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 9bc2eb3de9..c91ba46f75 100644
+index 4e05d73f01b..4b48b310c6a 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,24 @@
+@@ -23,7 +23,25 @@
  #include "bfd.h"
  #include "libbfd.h"
  
@@ -138,15 +146,16 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
  {
-   32,                          /* 32 bits in a word.  */
-   32,                          /* 32 bits in an address.  */
-@@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch =
-   bfd_default_scan,            /* String to architecture conversion.  */
+   32,                          /* Bits in a word.  */
+   32,                          /* Bits in an address.  */
+@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
    bfd_arch_default_fill,       /* Default fill.  */
-   NULL                         /* Next in list.  */
+   NULL,                                /* Next in list.  */
+   0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#else
 +{
@@ -162,7 +171,8 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +},
 +{
 +  64,                          /* 32 bits in a word.  */
@@ -177,16 +187,29 @@ index 9bc2eb3de9..c91ba46f75 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  NULL                         /* Next in list.  */
++  NULL,                                /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#endif
  };
+diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
+index 0115dfc406c..d75411d2af7 100644
+--- a/bfd/doc/Makefile.in
++++ b/bfd/doc/Makefile.in
+@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
+ prefix = @prefix@
+ program_transform_name = @program_transform_name@
+ psdir = @psdir@
++runstatedir = @runstatedir@
+ sbindir = @sbindir@
+ sharedstatedir = @sharedstatedir@
+ srcdir = @srcdir@
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
 new file mode 100644
-index 0000000000..0f43ae6ea8
+index 00000000000..fa4b95e47e0
 --- /dev/null
 +++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3584 @@
+@@ -0,0 +1,3560 @@
 +/* Xilinx MicroBlaze-specific support for 32-bit ELF
 +
 +   Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -844,7 +867,7 @@ index 0000000000..0f43ae6ea8
 +
 +/* Set the howto pointer for a RCE ELF reloc.  */
 +
-+static void
++static bfd_boolean
 +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
 +                             arelent * cache_ptr,
 +                             Elf_Internal_Rela * dst)
@@ -858,13 +881,14 @@ index 0000000000..0f43ae6ea8
 +  r_type = ELF64_R_TYPE (dst->r_info);
 +  if (r_type >= R_MICROBLAZE_max)
 +    {
-+      (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"),
++      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
 +                            abfd, r_type);
 +      bfd_set_error (bfd_error_bad_value);
-+      r_type = R_MICROBLAZE_NONE;
++      return FALSE;
 +    }
 +
 +  cache_ptr->howto = microblaze_elf_howto_table [r_type];
++ return TRUE;
 +}
 +
 +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
@@ -1263,7 +1287,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata2") == 0
 +                       || strcmp (name, ".sbss2") == 0)
@@ -1292,7 +1316,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1308,7 +1332,7 @@ index 0000000000..0f43ae6ea8
 +               /* Only relocate if the symbol is defined.  */
 +               if (sec)
 +                 {
-+                   name = bfd_get_section_name (sec->owner, sec);
++                   name = bfd_section_name (sec);
 +
 +                   if (strcmp (name, ".sdata") == 0
 +                       || strcmp (name, ".sbss") == 0)
@@ -1337,7 +1361,7 @@ index 0000000000..0f43ae6ea8
 +                                              bfd_get_filename (input_bfd),
 +                                              sym_name,
 +                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_get_section_name (sec->owner, sec));
++                                              bfd_section_name (sec));
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1399,6 +1423,7 @@ index 0000000000..0f43ae6ea8
 +             goto dogot;
 +           case (int) R_MICROBLAZE_TLSLD:
 +             tls_type = (TLS_TLS | TLS_LD);
++              /* Fall through. */
 +           dogot:
 +           case (int) R_MICROBLAZE_GOT_64:
 +             {
@@ -1699,7 +1724,7 @@ index 0000000000..0f43ae6ea8
 +                         {
 +                           BFD_FAIL ();
 +                           (*_bfd_error_handler)
-+                             (_("%B: probably compiled without -fPIC?"),
++                             (_("%pB: probably compiled without -fPIC?"),
 +                              input_bfd);
 +                           bfd_set_error (bfd_error_bad_value);
 +                           return FALSE;
@@ -1753,7 +1778,7 @@ index 0000000000..0f43ae6ea8
 +             name = (bfd_elf_string_from_elf_section
 +                     (input_bfd, symtab_hdr->sh_link, sym->st_name));
 +             if (name == NULL || *name == '\0')
-+               name = bfd_section_name (input_bfd, sec);
++               name = bfd_section_name (sec);
 +           }
 +
 +         if (errmsg != NULL)
@@ -1798,21 +1823,6 @@ index 0000000000..0f43ae6ea8
 +  return ret;
 +}
 +
-+/* Merge backend specific data from an object file to the output
-+   object file when linking.
-+
-+   Note: We only use this hook to catch endian mismatches.  */
-+static bfd_boolean
-+microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
-+{
-+  /* Check if we have the same endianess.  */
-+  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
-+    return FALSE;
-+
-+  return TRUE;
-+}
-+
-+
 +/* Calculate fixup value for reference.  */
 +
 +static int
@@ -2129,7 +2139,7 @@ index 0000000000..0f43ae6ea8
 +          irelscanend = irelocs + o->reloc_count;
 +          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
 +            {
-+              if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
 +                {
 +                  unsigned int val;
 +
@@ -2488,17 +2498,6 @@ index 0000000000..0f43ae6ea8
 +  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
 +}
 +
-+/* Update the got entry reference counts for the section being removed.  */
-+
-+static bfd_boolean
-+microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
-+                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
-+                             asection * sec ATTRIBUTE_UNUSED,
-+                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
-+{
-+  return TRUE;
-+}
-+
 +/* PIC support.  */
 +
 +#define PLT_ENTRY_SIZE 16
@@ -2531,13 +2530,13 @@ index 0000000000..0f43ae6ea8
 +  if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL)
 +    htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got");
 +  if (htab->srelgot == NULL
-+      || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC
++      || ! bfd_set_section_flags (htab->srelgot, SEC_ALLOC
 +                                  | SEC_LOAD
 +                                  | SEC_HAS_CONTENTS
 +                                  | SEC_IN_MEMORY
 +                                  | SEC_LINKER_CREATED
 +                                  | SEC_READONLY)
-+      || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
++      || ! bfd_set_section_alignment (htab->srelgot, 2))
 +    return FALSE;
 +  return TRUE;
 +}
@@ -2618,7 +2617,7 @@ index 0000000000..0f43ae6ea8
 +
 +         /* PR15323, ref flags aren't set for references in the same
 +            object.  */
-+         h->root.non_ir_ref = 1;
++         h->root.non_ir_ref_regular = 1;
 +       }
 +
 +      switch (r_type)
@@ -2654,6 +2653,7 @@ index 0000000000..0f43ae6ea8
 +          tls_type |= (TLS_TLS | TLS_LD);
 +        dogottls:
 +          sec->has_tls_reloc = 1;
++          /* Fall through. */
 +        case R_MICROBLAZE_GOT_64:
 +          if (htab->sgot == NULL)
 +            {
@@ -2927,12 +2927,12 @@ index 0000000000..0f43ae6ea8
 +  /* If this is a weak symbol, and there is a real definition, the
 +     processor independent code will have arranged for us to see the
 +     real definition first, and we can just use the same value.  */
-+  if (h->u.weakdef != NULL)
++  if (h->is_weakalias)
 +    {
-+      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
-+                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
-+      h->root.u.def.section = h->u.weakdef->root.u.def.section;
-+      h->root.u.def.value = h->u.weakdef->root.u.def.value;
++      struct elf_link_hash_entry *def = weakdef (h);
++      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
++      h->root.u.def.section = def->root.u.def.section;
++      h->root.u.def.value = def->root.u.def.value;
 +      return TRUE;
 +    }
 +
@@ -3004,9 +3004,9 @@ index 0000000000..0f43ae6ea8
 +  sdynbss = htab->sdynbss;
 +  /* Apply the required alignment.  */
 +  sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss))
++  if (power_of_two > bfd_section_alignment (sdynbss))
 +    {
-+      if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two))
++      if (! bfd_set_section_alignment (sdynbss, power_of_two))
 +       return FALSE;
 +    }
 +
@@ -3353,7 +3353,7 @@ index 0000000000..0f43ae6ea8
 +
 +      /* It's OK to base decisions on the section name, because none
 +         of the dynobj section names depend upon the input files.  */
-+      name = bfd_get_section_name (dynobj, s);
++      name = bfd_section_name (s);
 +
 +      if (strncmp (name, ".rela", 5) == 0)
 +        {
@@ -3721,7 +3721,7 @@ index 0000000000..0f43ae6ea8
 +        put into .sbss.  */
 +      *secp = bfd_make_section_old_way (abfd, ".sbss");
 +      if (*secp == NULL
-+          || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON))
++          || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
 +        return FALSE;
 +
 +      *valp = sym->st_size;
@@ -3748,11 +3748,10 @@ index 0000000000..0f43ae6ea8
 +#define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
 +#define elf_backend_relocate_section           microblaze_elf_relocate_section
 +#define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
 +#define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
 +
 +#define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
-+#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
 +#define elf_backend_check_relocs                microblaze_elf_check_relocs
 +#define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
 +#define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
@@ -3772,10 +3771,10 @@ index 0000000000..0f43ae6ea8
 +
 +#include "elf64-target.h"
 diff --git a/bfd/targets.c b/bfd/targets.c
-index 158168cb3b..ef567a30c8 100644
+index fb0c669e7f7..97b0e473e16 100644
 --- a/bfd/targets.c
 +++ b/bfd/targets.c
-@@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec;
+@@ -779,6 +779,8 @@ extern const bfd_target mep_elf32_le_vec;
  extern const bfd_target metag_elf32_vec;
  extern const bfd_target microblaze_elf32_vec;
  extern const bfd_target microblaze_elf32_le_vec;
@@ -3784,7 +3783,7 @@ index 158168cb3b..ef567a30c8 100644
  extern const bfd_target mips_ecoff_be_vec;
  extern const bfd_target mips_ecoff_le_vec;
  extern const bfd_target mips_ecoff_bele_vec;
-@@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] =
+@@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] =
  
         &metag_elf32_vec,
  
@@ -3796,7 +3795,7 @@ index 158168cb3b..ef567a30c8 100644
  
         &mips_ecoff_be_vec,
 diff --git a/include/elf/common.h b/include/elf/common.h
-index e8faf67be3..ca89da1631 100644
+index 75c4fb7e9d7..1584e1c87d0 100644
 --- a/include/elf/common.h
 +++ b/include/elf/common.h
 @@ -339,6 +339,7 @@
@@ -3808,101 +3807,105 @@ index e8faf67be3..ca89da1631 100644
  #define EM_CSKY                252     /* C-SKY processor family.  */
  
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f8aaf27873..20ea6a885a 100644
+index 356f1da22ed..437f536e96a 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
 @@ -33,6 +33,7 @@
- #define get_field_r1(instr)        get_field (instr, RA_MASK, RA_LOW)
- #define get_field_r2(instr)        get_field (instr, RB_MASK, RB_LOW)
+ #define get_field_r1(buf, instr)   get_field (buf, instr, RA_MASK, RA_LOW)
+ #define get_field_r2(buf, instr)   get_field (buf, instr, RB_MASK, RB_LOW)
  #define get_int_field_imm(instr)   ((instr & IMM_MASK) >> IMM_LOW)
 +#define get_int_field_imml(instr)  ((instr & IMML_MASK) >> IMM_LOW)
  #define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
  
- 
-@@ -56,11 +57,20 @@ get_field_imm (long instr)
+ #define NUM_STRBUFS 3
+@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5 (long instr)
-+get_field_imml (long instr)
+-get_field_imm5 (struct string_buf *buf, long instr)
++get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  return p;
 +}
 +
 +static char *
-+get_field_imms (long instr)
++get_field_imms (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
+   return p;
  }
  
-@@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr)
+@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
  }
  
  static char *
--get_field_imm5width (long instr)
-+get_field_immw (long instr)
+-get_field_imm5width (struct string_buf *buf, long instr)
++get_field_immw (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
    if (instr & 0x00004000)
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
   else
--    sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+    sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
-   return (strdup (tmpstr));
+-    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
++    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
+   return p;
  }
  
-@@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+@@ -306,9 +316,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
 -       case INST_TYPE_RD_R1_IMM5:
 +       case INST_TYPE_RD_R1_IMML:
-+         print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
-+                  get_field_r1(inst), get_field_imm (inst));
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+-                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
++                  get_field_r1(&buf, inst), get_field_imm (&buf, inst));
 +          /* TODO: Also print symbol */
++          break;
 +       case INST_TYPE_RD_R1_IMMS:
-          print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
--                  get_field_r1(inst), get_field_imm5 (inst));
-+                  get_field_r1(inst), get_field_imms (inst));
++         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++                  get_field_r1(&buf, inst), get_field_imms (&buf, inst));
           break;
         case INST_TYPE_RD_RFSL:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
-@@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+@@ -412,9 +427,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+                }
             }
           break;
+-       case INST_TYPE_RD_R2:
+-         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+-                     get_field_r2 (&buf, inst));
 +        case INST_TYPE_IMML:
-+         print_func (stream, "\t%s", get_field_imml (inst));
++         print_func (stream, "\t%s", get_field_imml (&buf, inst));
 +          /* TODO: Also print symbol */
 +         break;
-         case INST_TYPE_RD_R2:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
++        case INST_TYPE_RD_R2:
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
           break;
-@@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-         case INST_TYPE_NONE:
-           break;
+        case INST_TYPE_R2:
+          print_func (stream, "\t%s", get_field_r2 (&buf, inst));
+@@ -439,8 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          break;
+          /* For tuqula instruction */
          /* For bit field insns.  */
--           case INST_TYPE_RD_R1_IMM5_IMM5:
--          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst));
--            break;
+-       case INST_TYPE_RD_R1_IMM5_IMM5:
+-         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
 +       case INST_TYPE_RD_R1_IMMW_IMMS:
-+         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst),
-+                  get_field_immw (inst), get_field_imms (inst));
-+         break;
++         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
++                  get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+          break;
         /* For tuqula instruction */
         case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (inst));
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index ce8ac351b5..985834b8df 100644
+index d3b234e1fcd..28dc991c430 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -40,7 +40,7 @@
@@ -4130,7 +4133,7 @@ index ce8ac351b5..985834b8df 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 28662694cd..076dbcd0b3 100644
+index c3b2b8f0f6e..ad475a4af15 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -25,6 +25,7 @@
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch
index d4441443..8bf07398 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch
@@ -1,31 +1,31 @@
-From 92419bfa472c29b96ff85a9769b9301539867364 Mon Sep 17 00:00:00 2001
+From f82b24b2685d0cde8f8fdd0a1dcffe7b76b2027c Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
 
 ---
  bfd/bfd-in2.h              |  10 +++
- bfd/elf32-microblaze.c     |  65 +++++++++++++++-
- bfd/elf64-microblaze.c     |  61 ++++++++++++++-
+ bfd/elf32-microblaze.c     |  63 +++++++++++++++++-
+ bfd/elf64-microblaze.c     |  59 +++++++++++++++++
  bfd/libbfd.h               |   2 +
- bfd/reloc.c                |  12 +++
+ bfd/reloc.c                |  12 ++++
  include/elf/microblaze.h   |   2 +
  opcodes/microblaze-opc.h   |   4 +-
  opcodes/microblaze-opcm.h  |   4 +-
- 9 files changed, 277 insertions(+), 35 deletions(-)
+ 9 files changed, 243 insertions(+), 40 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 721531886a..4f777059d8 100644
+index 52c81b10b6d..c6738960bb2 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5876,11 +5876,21 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64_NONE,
+@@ -5373,11 +5373,21 @@ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64_NONE,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64,
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
@@ -41,7 +41,7 @@ index 721531886a..4f777059d8 100644
  value in two words (with an imm instruction).  The relocation is
  GOT offset  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index d001437b3f..035e71f311 100644
+index cb7271f5017..a31b407cfbf 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -67,7 +67,7 @@ index d001437b3f..035e71f311 100644
           0,                    /* Rightshift.  */
 @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
           0x0000ffff,           /* Dest Mask.  */
-          TRUE),                /* PC relative offset?  */
+          TRUE),                /* PC relative offset?  */
  
 +   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
 +   HOWTO (R_MICROBLAZE_GPC_64,         /* Type.  */
@@ -103,15 +103,6 @@ index d001437b3f..035e71f311 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
 @@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
@@ -119,7 +110,7 @@ index d001437b3f..035e71f311 100644
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -141,21 +132,21 @@ index d001437b3f..035e71f311 100644
             case R_MICROBLAZE_NONE:
             case R_MICROBLAZE_32_NONE:
               {
-@@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2038,9 +2095,9 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
 -             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
 -               {
 -                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
-+                {
++             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++               {
 +                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
  
                   /* Look at the reloc only if the value has been resolved.  */
                   if (isym->st_shndx == shndx
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 0f43ae6ea8..56a45f2a05 100644
+index fa4b95e47e0..d55700fc513 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -218,7 +209,7 @@ index 0f43ae6ea8..56a45f2a05 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               break; /* Do nothing.  */
  
             case (int) R_MICROBLAZE_GOTPC_64:
@@ -226,23 +217,14 @@ index 0f43ae6ea8..56a45f2a05 100644
               relocation = htab->sgotplt->output_section->vma
                 + htab->sgotplt->output_offset;
               relocation -= (input_section->output_section->vma
-@@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -265,10 +247,10 @@ index 0f43ae6ea8..56a45f2a05 100644
             case R_MICROBLAZE_32_NONE:
               {
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index feb9fada1e..450653f2d8 100644
+index a01891f3423..4e71991273e 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -279,10 +261,10 @@ index feb9fada1e..450653f2d8 100644
    "BFD_RELOC_MICROBLAZE_64_PLT",
    "BFD_RELOC_MICROBLAZE_64_GOTOFF",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 87753ae4f0..ccf29f54cf 100644
+index 78f13180c71..8b3cc604738 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,12 +6803,24 @@ ENUMDOC
+@@ -6814,12 +6814,24 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -308,7 +290,7 @@ index 87753ae4f0..ccf29f54cf 100644
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 6ee0966444..16b2736577 100644
+index 0dba2c0f44f..030eb99a1a0 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
 @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -317,11 +299,11 @@ index 6ee0966444..16b2736577 100644
    RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
 +  RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
 +  RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35)    /* GOT entry offset.  */
-    
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
+ /* Global base address names.  */
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 985834b8df..9b6264b61c 100644
+index 28dc991c430..46263bc7e16 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -538,8 +538,8 @@ struct op_code_struct
@@ -336,7 +318,7 @@ index 985834b8df..9b6264b61c 100644
    {"dadd",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
    {"drsub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 076dbcd0b3..5f2e190d23 100644
+index ad475a4af15..ee01cdb7d9b 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -40,8 +40,8 @@ enum microblaze_instr
@@ -344,9 +326,9 @@ index 076dbcd0b3..5f2e190d23 100644
    brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
    bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
 -  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
--  sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+-  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+  sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
++  sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
    tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index 26938396..eaf24505 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,15 +1,16 @@
-From 4010e83aa48f0415e4478d70871aa87cb204d350 Mon Sep 17 00:00:00 2001
+From b6ec3e2295ba33d2c8f48500d75a147ffd84a656 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/43] [Patch,Microblaze] : negl instruction is overriding
- rsubl,fixed it by changing the instruction order...
+Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
+ rsubl
 
+fixed it by changing the instruction order...
 ---
  opcodes/microblaze-opc.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 9b6264b61c..824afc0ab0 100644
+index 46263bc7e16..f4ee8f43372 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -275,9 +275,7 @@ struct op_code_struct
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch
index 93ec10fd..742f9e34 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch
@@ -1,47 +1,47 @@
-From b625d19f8b86dd81c32f21793cc3e038ca275e57 Mon Sep 17 00:00:00 2001
+From 982f37caabea84cee52426844e73365f0cb93f3d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/43] Added relocations for MB-X
+Subject: [PATCH 18/40] Added relocations for MB-X
 
 ---
- bfd/bfd-in2.h              | 11 +++--
- bfd/libbfd.h               |  4 +-
- bfd/reloc.c                | 26 ++++++-----
- 4 files changed, 62 insertions(+), 69 deletions(-)
+ bfd/bfd-in2.h              | 11 +++++---
+ bfd/libbfd.h               |  4 +--
+ bfd/reloc.c                | 26 +++++++++---------
+ 4 files changed, 63 insertions(+), 32 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 4f777059d8..de46e78902 100644
+index c6738960bb2..3899352b1d5 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5872,15 +5872,20 @@ done here - only used for relaxing  */
+@@ -5369,15 +5369,20 @@ done here - only used for relaxing  */
    BFD_RELOC_MICROBLAZE_32_NONE,
  
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-- *  +value in two words (with an imm instruction).  No relocation is
-+ *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
--    BFD_RELOC_MICROBLAZE_64_NONE,
-+    BFD_RELOC_MICROBLAZE_64_PCREL,
+-value in two words (with an imm instruction).  No relocation is
++value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+-  BFD_RELOC_MICROBLAZE_64_NONE,
++  BFD_RELOC_MICROBLAZE_64_PCREL,
  
 -/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 64 bit reloc that stores the 32 bit relative
-  *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
++value in two words (with an imm instruction).  No relocation is
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_64_NONE,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
  PC-relative GOT offset  */
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 450653f2d8..d87a183d5e 100644
+index 4e71991273e..46be3891390 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
-@@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+@@ -2905,14 +2905,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
    "BFD_RELOC_MICROBLAZE_32_NONE",
    "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -59,10 +59,10 @@ index 450653f2d8..d87a183d5e 100644
    "BFD_RELOC_MICROBLAZE_64_TLSGD",
    "BFD_RELOC_MICROBLAZE_64_TLSLD",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index ccf29f54cf..861f2d48c0 100644
+index 8b3cc604738..98a156f061f 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
-@@ -6803,24 +6803,12 @@ ENUMDOC
+@@ -6814,24 +6814,12 @@ ENUMDOC
    done here - only used for relaxing
  ENUM
    BFD_RELOC_MICROBLAZE_64_NONE
@@ -87,7 +87,7 @@ index ccf29f54cf..861f2d48c0 100644
  ENUMDOC
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
-@@ -6906,6 +6894,20 @@ ENUMDOC
+@@ -6917,6 +6905,20 @@ ENUMDOC
    value in two words (with an imm instruction).  The relocation is
    relative offset from start of TEXT.
  
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch
index 4a35a597..fc5c9464 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixed-MB-x-relocation-issues.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch
@@ -1,26 +1,27 @@
-From f190b9380c325b48697755328f4193791a758e55 Mon Sep 17 00:00:00 2001
+From 0bb779328b8564b008a6134826f043b4326f4904 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/43] -Fixed MB-x relocation issues -Added imml for required
- MB-x instructions
+Subject: [PATCH 19/40] Update MB-x
 
+-Fixed MB-x relocation issues
+-Added imml for required MB-x instructions
 ---
- bfd/elf64-microblaze.c     |  68 ++++++++++++++---
- 3 files changed, 167 insertions(+), 55 deletions(-)
+ bfd/elf64-microblaze.c     |  68 ++++++++++--
+ 3 files changed, 209 insertions(+), 82 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 56a45f2a05..54a2461037 100644
+index d55700fc513..f8f52870639 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                           relocation -= (input_section->output_section->vma
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -31,7 +32,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
@@ -41,7 +42,7 @@ index 56a45f2a05..54a2461037 100644
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                         {
 +                           if (!input_section->output_section->vma &&
-+                                !input_section->output_offset && !offset)      
++                                !input_section->output_offset && !offset)
 +                             relocation -= (input_section->output_section->vma
 +                                            + input_section->output_offset
 +                                            + offset);
@@ -51,9 +52,9 @@ index 56a45f2a05..54a2461037 100644
 +                                            + offset + INST_WORD_SIZE);
 +                         }
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -64,7 +65,7 @@ index 56a45f2a05..54a2461037 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1690,9 +1716,19 @@ static void
+@@ -1677,9 +1703,19 @@ static void
  microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -87,7 +88,7 @@ index 56a45f2a05..54a2461037 100644
  }
  
  /* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch
deleted file mode 100644
index 2e790dc1..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 534688ca48be148ade9bb1daf77c41c4b221ac0e Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Sun, 30 Sep 2018 17:06:58 +0530
-Subject: [PATCH 20/43] Fixing the branch related issues
-
----
- bfd/elf64-microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 54a2461037..e9b3cf3a86 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd,
- 
-          /* PR15323, ref flags aren't set for references in the same
-             object.  */
--         h->root.non_ir_ref = 1;
-+         h->root.non_ir_ref_regular = 1;
-        }
- 
-       switch (r_type)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch
index dffdbd3a..eb0bc982 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0021-Fixed-address-computation-issues-with-64bit-address.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch
@@ -1,9 +1,10 @@
-From a19471b62a23803a062693a61c783efc05e2cd33 Mon Sep 17 00:00:00 2001
+From 188a60b441711f663f07dc3c3902c8c5d590eb6c Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
- Fixed imml dissassamble issue
+Subject: [PATCH 20/40] Various fixes
 
+- Fixed address computation issues with 64bit address
+- Fixed imml dissassamble issue
 ---
  bfd/bfd-in2.h              |  5 +++
  bfd/elf64-microblaze.c     | 14 ++++----
@@ -11,23 +12,23 @@ Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address -
  4 files changed, 79 insertions(+), 16 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index de46e78902..33c9cb62d9 100644
+index 3899352b1d5..91761bf6964 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5881,6 +5881,11 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
+@@ -5378,6 +5378,11 @@ value in two words (with an imml instruction).  No relocation is
+ done here - only used for relaxing  */
+   BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
++value in two words (with an imml instruction).  No relocation is
++done here - only used for relaxing  */
 +    BFD_RELOC_MICROBLAZE_EA64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
-  *  +value in two words (with an imm instruction).  No relocation is
-  *   +done here - only used for relaxing  */
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index e9b3cf3a86..40f10aac6d 100644
+index f8f52870639..17e58748a0b 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -70,7 +71,7 @@ index e9b3cf3a86..40f10aac6d 100644
        microblaze_reloc = R_MICROBLAZE_IMML_64;
        break;
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
                 efix = calc_fixup (target_address, 0, sec);
  
              /* Validate the in-band val.  */
@@ -80,16 +81,16 @@ index e9b3cf3a86..40f10aac6d 100644
                 fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
              }
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 20ea6a885a..f679a43606 100644
+index 437f536e96a..24ede714858 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -61,7 +61,7 @@ get_field_imml (long instr)
+@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
  {
-   char tmpstr[25];
+   char *p = strbuf (buf);
  
--  sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
-   return (strdup (tmpstr));
+-  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
++  sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
+   return p;
  }
  
 -- 
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index e79b6626..0d212ccc 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0022-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,17 +1,17 @@
-From 2aa455f838644cd804ec93aeea0d30bb265e91df Mon Sep 17 00:00:00 2001
+From a485fdf959afb6cd079f482eeea9d3186e6393f8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
 
 ---
  bfd/elf64-microblaze.c     | 11 +++++++--
  2 files changed, 54 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 40f10aac6d..4d9b90647f 100644
+index 17e58748a0b..b62c47e8514 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
             case (int) R_MICROBLAZE_64_PCREL :
             case (int) R_MICROBLAZE_64:
             case (int) R_MICROBLAZE_32:
@@ -19,16 +19,16 @@ index 40f10aac6d..4d9b90647f 100644
               {
                 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
                    from removed linkonce sections, or sections discarded by
-@@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+                    if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
 +                   else if (r_type == R_MICROBLAZE_IMML_64)
 +                     bfd_put_64 (input_bfd, relocation, contents + offset);
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                       }
                     else
                       {
@@ -37,7 +37,7 @@ index 40f10aac6d..4d9b90647f 100644
                           {
                             outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
                             outrel.r_addend = relocation + addend;
-@@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
                     if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -46,7 +46,7 @@ index 40f10aac6d..4d9b90647f 100644
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
@@ -56,7 +56,7 @@ index 40f10aac6d..4d9b90647f 100644
                  {
                   isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
  
-@@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
          case R_MICROBLAZE_64:
          case R_MICROBLAZE_64_PCREL:
          case R_MICROBLAZE_32:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch
index d1ec5dbf..aa512b87 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 3f031961082caec9e172ff0224a51c08ab6e19c3 Mon Sep 17 00:00:00 2001
+From 24f96f4e86895b41aae21f775599a857939d002f Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 23/43] fixing the .bss relocation issue
+Subject: [PATCH 22/40] fixing the .bss relocation issue
 
 ---
  bfd/elf64-microblaze.c | 18 ++++++++++++------
  1 file changed, 12 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 4d9b90647f..184b7d560d 100644
+index b62c47e8514..cb3b40b574c 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                              + offset + INST_WORD_SIZE);
                           }
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
  
@@ -38,7 +38,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr &= ~0x00ffffff;
          instr |= (val & 0xffffff);
-@@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@ index 4d9b90647f..184b7d560d 100644
        {
          instr_hi &= ~0x00ffffff;
          instr_hi |= (val >> 16) & 0xffffff;
-@@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
@@ -59,7 +59,7 @@ index 4d9b90647f..184b7d560d 100644
            immediate |= (instr_lo & 0x0000ffff);
                       offset = calc_fixup (irelscan->r_addend, 0, sec);
                       immediate -= offset;
-@@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index d0ca677c..c645781e 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From 50bd636604305329b302b9fbbb692795d26f5fa5 Mon Sep 17 00:00:00 2001
+From cd5868dca5b4a728e6418459d871f5c9ca68253e Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  It was adjusting only lower 16bits.
 
 ---
@@ -10,10 +10,10 @@ Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 035e71f311..2d8c062a42 100644
+index a31b407cfbf..04816a4a187 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2023,8 +2023,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
@@ -25,10 +25,10 @@ index 035e71f311..2d8c062a42 100644
               break;
             }
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 184b7d560d..ef6a87062b 100644
+index cb3b40b574c..b002b414d64 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
deleted file mode 100644
index fba32c08..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From b8c4b1fa22137d18d4ada7e350948035705f402f Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 2 Dec 2018 14:49:14 +0530
-Subject: [PATCH 25/43] [Patch,MicroBlaze]: fixed Build issue which are due to
- conflicts in patches.
-
----
- bfd/elf32-microblaze.c     |  1 +
- bfd/elf64-microblaze.c     | 12 ++++++------
- 3 files changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 2d8c062a42..6a795c5069 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                /* This was a PC-relative instruction that was
-                   completely resolved.  */
-                int sfix, efix;
-+               unsigned int val;
-                bfd_vma target_address;
-                target_address = irel->r_addend + irel->r_offset;
-                sfix = calc_fixup (irel->r_offset, 0, sec);
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index ef6a87062b..bed534e7dd 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-   /* If this is a weak symbol, and there is a real definition, the
-      processor independent code will have arranged for us to see the
-      real definition first, and we can just use the same value.  */
--  if (h->u.weakdef != NULL)
-+  if (h->is_weakalias)
-     {
--      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
--                 || h->u.weakdef->root.type == bfd_link_hash_defweak);
--      h->root.u.def.section = h->u.weakdef->root.u.def.section;
--      h->root.u.def.value = h->u.weakdef->root.u.def.value;
-+      struct elf_link_hash_entry *def = weakdef (h);
-+      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
-+      h->root.u.def.section = def->root.u.def.section;
-+      h->root.u.def.value = def->root.u.def.value;
-       return TRUE;
--    }
-+    }  
- 
-   /* This is a reference to a symbol defined by a dynamic object which
-      is not a function.  */
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
index 0fd14f6d..f5bf917a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
@@ -1,26 +1,27 @@
-From 282a60ab92e6705853dac30fd38aaf298d7f02b0 Mon Sep 17 00:00:00 2001
+From 25a67af22ad040f87b3c14185c338828d4e26908 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing
+Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
  build error for windows builds.commenting for now.
 
 ---
- bfd/elf-attrs.c | 2 ++
- 1 file changed, 2 insertions(+)
+ bfd/elf-attrs.c | 3 +++
+ 1 file changed, 3 insertions(+)
 
 diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index bfe135e7fb..feb5cb37f5 100644
+index bfe135e7fbb..abf267ad42e 100644
 --- a/bfd/elf-attrs.c
 +++ b/bfd/elf-attrs.c
-@@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+@@ -440,6 +440,8 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
    /* PR 17512: file: 2844a11d.  */
    if (hdr->sh_size == 0)
      return;
++
 +  #if 0
    if (hdr->sh_size > bfd_get_file_size (abfd))
      {
        /* xgettext:c-format */
-@@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+@@ -448,6 +450,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
        bfd_set_error (bfd_error_invalid_operation);
        return;
      }
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
deleted file mode 100644
index 38245cbd..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 212c40ed034096069f3ab0dac74ccfb79063b84c Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 26 Feb 2019 17:31:41 +0530
-Subject: [PATCH 26/43] [Patch,Microblaze] : changes of "PR22458, failure to
- choose a matching ELF target"     is causing "Multiple Prevailing definition
- errors",added check for best_match elf.
-
----
- bfd/format.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/bfd/format.c b/bfd/format.c
-index 97a92291a8..3a74cc49d2 100644
---- a/bfd/format.c
-+++ b/bfd/format.c
-@@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching)
- 
-       /* Don't check the default target twice.  */
-       if (*target == &binary_vec
-+#if !BFD_SUPPORTS_PLUGINS
-          || (!abfd->target_defaulted && *target == save_targ))
-+#else
-+         || (!abfd->target_defaulted && *target == save_targ)
-+         || (*target)->match_priority > best_match)
-+#endif
-        continue;
- 
-       /* If we already tried a match, the bfd is modified and may
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
index 0da9e7b4..f5ddce41 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,14 +1,14 @@
-From fcb9c923a78a6a6141626f4c2a82579cfc4e43d6 Mon Sep 17 00:00:00 2001
+From b9e89f0698fd0e3b0e965986681f9fd90d3dc313 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
 
 ---
  opcodes/microblaze-opc.h   |  4 ++--
  2 files changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 824afc0ab0..d59ee0a95f 100644
+index f4ee8f43372..c8c2addc351 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0030-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch
index 79d7f4fe..bf05816d 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0030-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,47 +1,55 @@
-From f36d3bdd09f5c9987199f08ea3dd98bf45a9e18e Mon Sep 17 00:00:00 2001
+From efc3fd518cdb7e8bf82ac27b98b946001f83a2bf Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 30/43] Added support to new arithmetic single register
+Subject: [PATCH 27/40] Added support to new arithmetic single register
  instructions
 
 ---
- opcodes/microblaze-dis.c   |  12 +++
- opcodes/microblaze-opc.h   |  43 ++++++++++-
+ opcodes/microblaze-dis.c   |  13 +++-
+ opcodes/microblaze-opc.h   |  45 +++++++++++-
  opcodes/microblaze-opcm.h  |   5 +-
- 4 files changed, 201 insertions(+), 6 deletions(-)
+ 4 files changed, 201 insertions(+), 7 deletions(-)
 
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f679a43606..e5e880cb1c 100644
+index 24ede714858..e93d9b890ba 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -114,6 +114,15 @@ get_field_imm15 (long instr)
-   return (strdup (tmpstr));
+@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+   return p;
  }
  
 +static char *
-+get_field_imm16 (long instr)
++get_field_imm16 (struct string_buf *buf, long instr)
 +{
-+  char tmpstr[25];
++  char *p = strbuf (buf);
 +
-+  sprintf (tmpstr, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
-+  return (strdup (tmpstr));
++  sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
++  return p;
 +}
 +
  static char *
- get_field_special (long instr, struct op_code_struct * op)
- {
-@@ -419,6 +428,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-        case INST_TYPE_RD_IMM15:
-          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
+ get_field_special (struct string_buf *buf, long instr,
+                   struct op_code_struct *op)
+@@ -448,6 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+                      get_field_imm15 (&buf, inst));
           break;
 +       case INST_TYPE_RD_IMML:
-+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm16 (inst));
-+          break;
-         /* For mbar insn.  */
-         case INST_TYPE_IMM5:
-           print_func (stream, "\t%s", get_field_imm5_mbar (inst));
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++         break;
+          /* For mbar insn.  */
+        case INST_TYPE_IMM5:
+          print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
+@@ -455,7 +467,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          /* For mbar 16 or sleep insn.  */
+        case INST_TYPE_NONE:
+          break;
+-         /* For tuqula instruction */
+         /* For bit field insns.  */
+        case INST_TYPE_RD_R1_IMMW_IMMS:
+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d59ee0a95f..0774f70e08 100644
+index c8c2addc351..eaf4a1bd9f9 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -69,6 +69,7 @@
@@ -94,7 +102,7 @@ index d59ee0a95f..0774f70e08 100644
  /* New Mask for msrset, msrclr insns.  */
  #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
  /* Mask for mbar insn.  */
-@@ -114,7 +143,7 @@
+@@ -114,13 +143,13 @@
  #define DELAY_SLOT 1
  #define NO_DELAY_SLOT 0
  
@@ -103,6 +111,13 @@ index d59ee0a95f..0774f70e08 100644
  
  struct op_code_struct
  {
+   const char * name;
+   short inst_type;            /* Registers and immediate values involved.  */
+-  short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
++  int inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
+   short delay_slots;          /* Info about delay slots needed after this instr. */
+   short immval_mask;
+   unsigned long bit_sequence; /* All the fixed bits for the op are set and
 @@ -444,13 +473,21 @@ struct op_code_struct
    {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
    {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -140,7 +155,7 @@ index d59ee0a95f..0774f70e08 100644
    {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
    {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5f2e190d23..4d2ee2dd0d 100644
+index ee01cdb7d9b..31726c9b01a 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -61,7 +61,9 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
index 0be07120..01d615da 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -1,15 +1,15 @@
-From a15e73a33b3f395f2096e252b655775ed8424c14 Mon Sep 17 00:00:00 2001
+From 953a4eb8152c0aca3e36ccc22a8950c9e68965b5 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 31/43] [Patch,MicroBlaze] : double imml generation for 64 bit
+Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
  values.
 
 ---
  opcodes/microblaze-opc.h   |   4 +-
- 2 files changed, 263 insertions(+), 63 deletions(-)
+ 2 files changed, 264 insertions(+), 64 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 0774f70e08..bd9d91cd57 100644
+index eaf4a1bd9f9..79c3cf0d1a1 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
@@ -18,7 +18,7 @@ index 0774f70e08..bd9d91cd57 100644
  
 -#define MIN_IMML  ((long long) 0xffffff8000000000L)
 -#define MAX_IMML  ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) -9223372036854775808)
++#define MIN_IMML  ((long long) -9223372036854775807)
 +#define MAX_IMML  ((long long) 9223372036854775807)
  
  #endif /* MICROBLAZE_OPC */
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch
new file mode 100644
index 00000000..4172595b
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch
@@ -0,0 +1,60 @@
+From c59684852ecd37d6f82363f2cf0e1de1f770aab7 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Fri, 17 Jul 2020 09:20:54 -0500
+Subject: [PATCH 33/40] Fix various compile warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ bfd/elf64-microblaze.c     |  9 +++++----
+ 2 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index b002b414d64..8308f1ebd09 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ /* Set the howto pointer for a RCE ELF reloc.  */
+ 
+ static bfd_boolean
+-microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
+                              arelent * cache_ptr,
+                              Elf_Internal_Rela * dst)
+ {
+@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
+   r_type = ELF64_R_TYPE (dst->r_info);
+   if (r_type >= R_MICROBLAZE_max)
+     {
+-      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
++      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
+                             abfd, r_type);
+       bfd_set_error (bfd_error_bad_value);
+       return FALSE;
+     }
+ 
+   cache_ptr->howto = microblaze_elf_howto_table [r_type];
+- return TRUE;
++  return TRUE;
+ }
+ 
+ /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
+@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                        else
+                          {
+                            BFD_FAIL ();
+-                           (*_bfd_error_handler)
++                           _bfd_error_handler
+                              (_("%pB: probably compiled without -fPIC?"),
+                               input_bfd);
+                            bfd_set_error (bfd_error_bad_value);
+@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+           goto dogottls;
+         case R_MICROBLAZE_TLSLD:
+           tls_type |= (TLS_TLS | TLS_LD);
++          /* Fall through. */
+         dogottls:
+           sec->has_tls_reloc = 1;
+           /* Fall through. */
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch
index 7ac89d2d..ff1c606c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch
@@ -1,7 +1,7 @@
-From c347f9727cc86bb0174dc001446c0670e7306692 Mon Sep 17 00:00:00 2001
+From c5eee33cd39dbb9c44bdad2025a5c848139c55f2 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 32/43] Add initial port of linux gdbserver add
+Subject: [PATCH 34/40] Add initial port of linux gdbserver add
  gdb_proc_service_h to gdbserver microblaze-linux
 
 gdbserver needs to initialise the microblaze registers
@@ -21,17 +21,21 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
  gdb/configure.host                   |   3 +
+ gdb/features/microblaze-linux.xml    |  12 ++
+ gdb/gdbserver/Makefile.in            |   4 +
+ gdb/gdbserver/configure.srv          |   8 ++
  gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
  gdb/microblaze-linux-tdep.c          |  29 +++-
  gdb/microblaze-tdep.c                |  35 ++++-
  gdb/microblaze-tdep.h                |   4 +-
  gdb/regformats/reg-microblaze.dat    |  41 ++++++
- 6 files changed, 298 insertions(+), 3 deletions(-)
+ 9 files changed, 322 insertions(+), 3 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
  create mode 100644 gdb/gdbserver/linux-microblaze-low.c
  create mode 100644 gdb/regformats/reg-microblaze.dat
 
 diff --git a/gdb/configure.host b/gdb/configure.host
-index c87f997abc..de8d6b00f3 100644
+index ce528237291..cf1a08e8b28 100644
 --- a/gdb/configure.host
 +++ b/gdb/configure.host
 @@ -65,6 +65,7 @@ hppa*)                        gdb_host_cpu=pa ;;
@@ -51,9 +55,75 @@ index c87f997abc..de8d6b00f3 100644
  powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
                         gdb_host=aix ;;
  powerpc*-*-freebsd*)   gdb_host=fbsd ;;
+diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+new file mode 100644
+index 00000000000..8983e66eb3d
+--- /dev/null
++++ b/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++  <osabi>GNU/Linux</osabi>
++  <xi:include href="microblaze-core.xml"/>
++</target>
+diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
+index 16a9f2fd380..fb4762a22d5 100644
+--- a/gdb/gdbserver/Makefile.in
++++ b/gdb/gdbserver/Makefile.in
+@@ -172,6 +172,7 @@ SFILES = \
+        $(srcdir)/linux-low.c \
+        $(srcdir)/linux-m32r-low.c \
+        $(srcdir)/linux-m68k-low.c \
++       $(srcdir)/linux-microblaze-low.c \
+        $(srcdir)/linux-mips-low.c \
+        $(srcdir)/linux-nios2-low.c \
+        $(srcdir)/linux-ppc-low.c \
+@@ -231,6 +232,7 @@ SFILES = \
+        $(srcdir)/nat/linux-namespaces.c \
+        $(srcdir)/nat/linux-osdata.c \
+        $(srcdir)/nat/linux-personality.c \
++       $(srcdir)/nat/microblaze-linux.c \
+        $(srcdir)/nat/mips-linux-watch.c \
+        $(srcdir)/nat/ppc-linux.c \
+        $(srcdir)/nat/fork-inferior.c \
+@@ -657,6 +659,8 @@ gdbsupport/%.o: ../gdbsupport/%.c
+ 
+ %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
+        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+ 
+ #
+ # Dependency tracking.
+diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
+index 1a4ab8e3361..e0d2b2fe04a 100644
+--- a/gdb/gdbserver/configure.srv
++++ b/gdb/gdbserver/configure.srv
+@@ -184,6 +184,14 @@ case "${target}" in
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+                        ;;
++  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
++                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_xmlfiles="microblaze-linux.xml"
++                       srv_linux_regsets=yes
++                       srv_linux_usrregs=yes
++                       srv_linux_thread_db=yes
++                       ;;
+   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
+                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+                        srv_regobj="${srv_regobj} powerpc-vsx32l.o"
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
 new file mode 100644
-index 0000000000..cba5d6fc58
+index 00000000000..cba5d6fc585
 --- /dev/null
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -0,0 +1,189 @@
@@ -247,7 +317,7 @@ index 0000000000..cba5d6fc58
 +  microblaze_supply_ptrace_register,
 +};
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 4e5f60cd4e..7ab650a1cc 100644
+index 3bb9b5682ac..42c219d32f3 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
 @@ -37,6 +37,22 @@
@@ -273,17 +343,14 @@ index 4e5f60cd4e..7ab650a1cc 100644
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
                                            struct bp_target_info *bp_tgt)
-@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
- 
+@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    /* Determine appropriate breakpoint contents and size for this address.  */
    bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
  
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
    val = target_read_memory (addr, old_contents, bplen);
  
    /* If our breakpoint is no longer at the address, this means that the
@@ -296,10 +363,8 @@ index 4e5f60cd4e..7ab650a1cc 100644
 +      microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
  
-+  do_cleanups (cleanup);
    return val;
  }
- 
 @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    /* Trampolines.  */
    tramp_frame_prepend_unwinder (gdbarch,
@@ -312,7 +377,7 @@ index 4e5f60cd4e..7ab650a1cc 100644
  
  void
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 1248acbdc9..730a2b281f 100644
+index 17871229c80..0168e4881ed 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
@@ -329,7 +394,6 @@ index 1248acbdc9..730a2b281f 100644
 +  int val;
 +  int bplen;
 +  gdb_byte old_contents[BREAKPOINT_MAX];
-+  struct cleanup *cleanup;
 +
 +  /* Determine appropriate breakpoint contents and size for this address.  */
 +  bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
@@ -337,7 +401,9 @@ index 1248acbdc9..730a2b281f 100644
 +    error (_("Software breakpoints not implemented for this target."));
 +
 +  /* Make sure we see the memory breakpoints.  */
-+  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore restore_memory
++    = make_scoped_restore_show_memory_breakpoints (1);
++
 +  val = target_read_memory (addr, old_contents, bplen);
 +
 +  /* If our breakpoint is no longer at the address, this means that the
@@ -349,7 +415,6 @@ index 1248acbdc9..730a2b281f 100644
 +    microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
 +  }
 +
-+  do_cleanups (cleanup);
 +  return val;
 +}
  
@@ -370,7 +435,7 @@ index 1248acbdc9..730a2b281f 100644
 +
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index a0048148e4..63aab84ef6 100644
+index 4fbdf9933f0..db0772643dc 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -117,6 +117,8 @@ struct microblaze_frame_cache
@@ -385,7 +450,7 @@ index a0048148e4..63aab84ef6 100644
  #endif /* microblaze-tdep.h */
 diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
 new file mode 100644
-index 0000000000..bd8a438442
+index 00000000000..bd8a4384424
 --- /dev/null
 +++ b/gdb/regformats/reg-microblaze.dat
 @@ -0,0 +1,41 @@
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch
index e60893ef..171a0bf4 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Initial-port-of-core-reading-support.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch
@@ -1,22 +1,22 @@
-From a9d58bc9edc348ed15d62598f2a0d0862aaf4e61 Mon Sep 17 00:00:00 2001
+From f8cbcd1ef78f6ce9ae8d3382bf2bb0d1e770d201 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 33/43] Initial port of core reading support Added support for
+Subject: [PATCH 35/40] Initial port of core reading support Added support for
  reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
  information for rebuilding ".reg" sections of core dumps at run time.
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
- bfd/elf32-microblaze.c      | 84 ++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c      | 84 +++++++++++++++++++++++++++++++++++++
  gdb/configure.tgt           |  2 +-
- gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
- gdb/microblaze-tdep.c       | 90 +++++++++++++++++++++++++++++++++++++
- gdb/microblaze-tdep.h       | 27 +++++++++++
- 5 files changed, 259 insertions(+), 1 deletion(-)
+ gdb/microblaze-linux-tdep.c | 17 +++++++-
+ gdb/microblaze-tdep.c       | 48 +++++++++++++++++++++
+ gdb/microblaze-tdep.h       | 27 ++++++++++++
+ 5 files changed, 176 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 6a795c5069..c280431df6 100644
+index 04816a4a187..cb7a98d307e 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
@@ -107,7 +107,7 @@ index 6a795c5069..c280431df6 100644
  /* ELF linker hash entry.  */
  
  struct elf32_mb_link_hash_entry
-@@ -3672,4 +3753,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+@@ -3673,4 +3754,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
  #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
  #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
  
@@ -116,10 +116,10 @@ index 6a795c5069..c280431df6 100644
 +
  #include "elf32-target.h"
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 27f122ad04..622bd486b3 100644
+index caa42be1c01..f0386568460 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -397,7 +397,7 @@ mep-*-*)
+@@ -400,7 +400,7 @@ mep-*-*)
  
  microblaze*-linux-*|microblaze*-*-linux*)
         # Target: Xilinx MicroBlaze running Linux
@@ -129,65 +129,34 @@ index 27f122ad04..622bd486b3 100644
         gdb_sim=../sim/microblaze/libsim.a
         ;;
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 7ab650a1cc..e2225d778a 100644
+index 42c219d32f3..0afb6efeba3 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
-@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
+@@ -36,6 +36,7 @@
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
+ 
+ static int microblaze_debug_flag = 0;
+ 
+@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
    microblaze_linux_sighandler_cache_init
  };
  
-+const struct microblaze_gregset microblaze_linux_core_gregset;
-+
-+static void
-+microblaze_linux_supply_core_gregset (const struct regset *regset,
-+                                   struct regcache *regcache,
-+                                   int regnum, const void *gregs, size_t len)
-+{
-+  microblaze_supply_gregset (&microblaze_linux_core_gregset, regcache,
-+                             regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_gregset (const struct regset *regset,
-+                                    const struct regcache *regcache,
-+                                    int regnum, void *gregs, size_t len)
-+{
-+  microblaze_collect_gregset (&microblaze_linux_core_gregset, regcache,
-+                              regnum, gregs);
-+}
-+
-+static void
-+microblaze_linux_supply_core_fpregset (const struct regset *regset,
-+                                    struct regcache *regcache,
-+                                    int regnum, const void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_supply_fpregset (regcache, regnum, fpregs);
-+}
-+
-+static void
-+microblaze_linux_collect_core_fpregset (const struct regset *regset,
-+                                     const struct regcache *regcache,
-+                                     int regnum, void *fpregs, size_t len)
-+{
-+  /* FIXME.  */
-+  microblaze_collect_fpregset (regcache, regnum, fpregs);
-+}
- 
+-
  static void
  microblaze_linux_init_abi (struct gdbarch_info info,
                            struct gdbarch *gdbarch)
  {
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
-+                                microblaze_linux_collect_core_gregset);
 +  tdep->sizeof_gregset = 200;
 +
    linux_init_abi (info, gdbarch);
  
    set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    tramp_frame_prepend_unwinder (gdbarch,
                                 &microblaze_linux_sighandler_tramp_frame);
  
@@ -202,109 +171,50 @@ index 7ab650a1cc..e2225d778a 100644
 +  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
 +  set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 +
-+  set_gdbarch_regset_from_core_section (gdbarch,
-+                                       microblaze_regset_from_core_section);
-+
    /* Enable TLS support.  */
    set_gdbarch_fetch_tls_load_module_address (gdbarch,
                                               svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 730a2b281f..49713ea9b1 100644
+index 0168e4881ed..98944f38d2a 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
-@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
- 
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
-+static CORE_ADDR
-+microblaze_store_arguments (struct regcache *regcache, int nargs,
-+                           struct value **args, CORE_ADDR sp,
-+                           int struct_return, CORE_ADDR struct_addr)
-+{
-+  error (_("store_arguments not implemented"));
-+  return sp;
-+}
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-                                    struct bp_target_info *bp_tgt)
-@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame,
-   return cache->base;
- }
- 
-+static const struct frame_unwind *
-+microblaze_frame_sniffer (struct frame_info *next_frame)
-+{
-+  return &microblaze_frame_unwind;
-+}
-+
- static const struct frame_base microblaze_frame_base =
- {
-   &microblaze_frame_unwind,
-@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
                                    tdesc_microblaze_with_stack_protect);
  }
  
 +void
-+microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++microblaze_supply_gregset (const struct regset *regset,
 +                        struct regcache *regcache,
 +                        int regnum, const void *gregs)
 +{
-+  unsigned int *regs = gregs;
++  const unsigned int *regs = (const unsigned int *)gregs;
 +  if (regnum >= 0)
-+    regcache_raw_supply (regcache, regnum, regs + regnum);
++    regcache->raw_supply (regnum, regs + regnum);
 +
 +  if (regnum == -1) {
 +    int i;
 +
 +    for (i = 0; i < 50; i++) {
-+      regcache_raw_supply (regcache, i, regs + i);
++      regcache->raw_supply (i, regs + i);
 +    }
 +  }
 +}
 +
 +
-+void
-+microblaze_collect_gregset (const struct microblaze_gregset *gregset,
-+                         const struct regcache *regcache,
-+                         int regnum, void *gregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_supply_fpregset (struct regcache *regcache,
-+                         int regnum, const void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+void
-+microblaze_collect_fpregset (const struct regcache *regcache,
-+                          int regnum, void *fpregs)
-+{
-+   /* FIXME.  */
-+}
-+
-+
 +/* Return the appropriate register set for the core section identified
 +   by SECT_NAME and SECT_SIZE.  */
 +
-+const struct regset *
-+microblaze_regset_from_core_section (struct gdbarch *gdbarch,
-+                                     const char *sect_name, size_t sect_size)
++static void
++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
++                                     iterate_over_regset_sections_cb *cb,
++                                     void *cb_data,
++                                     const struct regcache *regcache)
 +{
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
-+
-+  if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
-+    return tdep->gregset;
-+
-+  if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
-+    return tdep->fpregset;
++  cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
 +
-+  microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
-+  return NULL;
++  cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
 +}
 +
 +
@@ -312,7 +222,7 @@ index 730a2b281f..49713ea9b1 100644
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  {
-@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    tdep = XCNEW (struct gdbarch_tdep);
    gdbarch = gdbarch_alloc (&info, tdep);
  
@@ -323,7 +233,7 @@ index 730a2b281f..49713ea9b1 100644
    set_gdbarch_long_double_bit (gdbarch, 128);
  
    set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
    if (tdesc_data != NULL)
      tdesc_use_registers (gdbarch, tdesc, tdesc_data);
@@ -331,14 +241,14 @@ index 730a2b281f..49713ea9b1 100644
 +
 +  /* If we have register sets, enable the generic core file support.  */
 +  if (tdep->gregset) {
-+      set_gdbarch_regset_from_core_section (gdbarch,
-+                                          microblaze_regset_from_core_section);
++    set_gdbarch_iterate_over_regset_sections (gdbarch,
++                                          microblaze_iterate_over_regset_sections);
 +  }
  
    return gdbarch;
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 63aab84ef6..02650f61d9 100644
+index db0772643dc..8f41ba19351 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -22,8 +22,22 @@
@@ -368,10 +278,10 @@ index 63aab84ef6..02650f61d9 100644
  #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
  #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
  
-+extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_supply_gregset (const struct regset *regset,
 +                                    struct regcache *regcache,
 +                                    int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++extern void microblaze_collect_gregset (const struct regset *regset,
 +                                     const struct regcache *regcache,
 +                                     int regnum, void *gregs);
 +extern void microblaze_supply_fpregset (struct regcache *regcache,
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch
deleted file mode 100644
index 0fe5c082..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 6f2d2fd5a214126e2c81dfb0dada3001ba353419 Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Mon, 22 Jul 2013 11:16:05 +1000
-Subject: [PATCH 35/43] revert master-rebase changes to gdbserver
-
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gdb/gdbserver/configure.srv | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index bec72e2b19..153dcb4c71 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,6 +210,13 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
-+  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_linux_regsets=yes
-+                       srv_linux_usrregs=yes
-+                       srv_linux_thread_db=yes
-+                       ;;
-   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
-                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
-                        srv_regobj="${srv_regobj} powerpc-cell32l.o"
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0034-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch
index f0ec43b1..f0c182d3 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0034-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,7 +1,7 @@
-From 9e42c672613131b25da90e58aefd2d39e497c3f6 Mon Sep 17 00:00:00 2001
+From 41fd9d3645d610ff65171e9a44427711232cb4b8 Mon Sep 17 00:00:00 2001
 From: Nathan Rossi <nathan.rossi@petalogix.com>
 Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 34/43] Fix debug message when register is unavailable
+Subject: [PATCH 36/40] Fix debug message when register is unavailable
 
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
  1 file changed, 10 insertions(+), 3 deletions(-)
 
 diff --git a/gdb/frame.c b/gdb/frame.c
-index d8b5f819f1..49706dc97c 100644
+index c746a6a231e..571722c7351 100644
 --- a/gdb/frame.c
 +++ b/gdb/frame.c
-@@ -1227,12 +1227,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
+@@ -1255,12 +1255,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
           else
             {
               int i;
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
deleted file mode 100644
index 111d8059..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From a21f56098eb41e20ba2e6995e6dc72acdea045a0 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 30 Apr 2018 17:09:55 +0530
-Subject: [PATCH 36/43] revert master-rebase changes to gdbserver , previous
- commit typo's
-
----
- gdb/gdbserver/Makefile.in | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index f5fc55034e..73ca5fd7c5 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -169,6 +169,7 @@ SFILES = \
-        $(srcdir)/linux-low.c \
-        $(srcdir)/linux-m32r-low.c \
-        $(srcdir)/linux-m68k-low.c \
-+        $(srcdir)/linux-microblaze-low.c \
-        $(srcdir)/linux-mips-low.c \
-        $(srcdir)/linux-nios2-low.c \
-        $(srcdir)/linux-ppc-low.c \
-@@ -226,6 +227,7 @@ SFILES = \
-        $(srcdir)/nat/linux-osdata.c \
-        $(srcdir)/nat/linux-personality.c \
-        $(srcdir)/nat/mips-linux-watch.c \
-+        $(srcdir)/nat/microblaze-linux.c \
-        $(srcdir)/nat/ppc-linux.c \
-        $(srcdir)/nat/fork-inferior.c \
-        $(srcdir)/target/waitstatus.c
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index 16b891bd..1e0bffbe 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 62bda7ae7bf0880201c4872c54e5b530b2fec27b Mon Sep 17 00:00:00 2001
+From 7b22823ae82445f52384e6c0bd85431294868eb7 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/43] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
  configure.tgt
 
 For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -16,10 +16,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 622bd486b3..989523735b 100644
+index f0386568460..ae238c17cd5 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
-@@ -405,6 +405,7 @@ microblaze*-*-*)
+@@ -408,6 +408,7 @@ microblaze*-*-*)
         # Target: Xilinx MicroBlaze running standalone
         gdb_target_obs="microblaze-tdep.o"
         gdb_sim=../sim/microblaze/libsim.a
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch
index ca37355c..afde3ce8 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch
@@ -1,62 +1,43 @@
-From fef2dfc9c55d19be25262175a4fa4921167a30b7 Mon Sep 17 00:00:00 2001
+From a06b9c4860af1f8f18ccb7c0653c76c623636034 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@petalogix.com>
 Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/43] Initial support for native gdb
+Subject: [PATCH 38/40] Initial support for native gdb
 
 microblaze: Follow PPC method of getting setting registers
 using PTRACE PEEK/POKE
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
-
-Conflicts:
-        gdb/Makefile.in
 ---
- gdb/Makefile.in                |   4 +-
+ gdb/Makefile.in                |   2 +
  gdb/config/microblaze/linux.mh |   9 +
  gdb/microblaze-linux-nat.c     | 431 +++++++++++++++++++++++++++++++++
- 3 files changed, 443 insertions(+), 1 deletion(-)
+ 3 files changed, 442 insertions(+)
  create mode 100644 gdb/config/microblaze/linux.mh
  create mode 100644 gdb/microblaze-linux-nat.c
 
 diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 5614cc3386..d620580498 100644
+index c3e074b21fe..cbcd8f43326 100644
 --- a/gdb/Makefile.in
 +++ b/gdb/Makefile.in
-@@ -1316,6 +1316,7 @@ HFILES_NO_SRCDIR = \
+@@ -1337,6 +1337,7 @@ HFILES_NO_SRCDIR = \
         memory-map.h \
         memrange.h \
         microblaze-tdep.h \
-+        microblaze-linux-tdep.h \
++       microblaze-linux-tdep.h \
         mips-linux-tdep.h \
         mips-nbsd-tdep.h \
         mips-tdep.h \
-@@ -1349,6 +1350,7 @@ HFILES_NO_SRCDIR = \
-        prologue-value.h \
-        psympriv.h \
-        psymtab.h \
-+        ia64-hpux-tdep.h \
-        ravenscar-thread.h \
-        record.h \
-        record-full.h \
-@@ -2263,6 +2265,7 @@ ALLDEPFILES = \
+@@ -2261,6 +2262,7 @@ ALLDEPFILES = \
         m68k-tdep.c \
         microblaze-linux-tdep.c \
         microblaze-tdep.c \
-+        microblaze-linux-nat.c \ 
++       microblaze-linux-nat.c \
         mingw-hdep.c \
         mips-fbsd-nat.c \
         mips-fbsd-tdep.c \
-@@ -2365,7 +2368,6 @@ ALLDEPFILES = \
-        xtensa-linux-tdep.c \
-        xtensa-tdep.c \
-        xtensa-xtregs.c \
--       common/mingw-strerror.c \
-        common/posix-strerror.c
- 
- # Some files need explicit build rules (due to -Werror problems) or due
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
 new file mode 100644
-index 0000000000..a4eaf540e1
+index 00000000000..a4eaf540e1d
 --- /dev/null
 +++ b/gdb/config/microblaze/linux.mh
 @@ -0,0 +1,9 @@
@@ -71,7 +52,7 @@ index 0000000000..a4eaf540e1
 +LOADLIBES = -ldl $(RDYNAMIC)
 diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
 new file mode 100644
-index 0000000000..e9b8c9c522
+index 00000000000..e9b8c9c5221
 --- /dev/null
 +++ b/gdb/microblaze-linux-nat.c
 @@ -0,0 +1,431 @@
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch
index b8fb68bc..fb4b35e5 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch
@@ -1,20 +1,19 @@
-From e3e7d58035fb75b6cf33689352c6e22309c6dbde Mon Sep 17 00:00:00 2001
+From f13ffe15c10e5d4b5c87761ae9735144d4c8da17 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/43] Fixing the issues related to GDB-7.12 added all the
- required function which are new in 7.12 and removed few deprecated functions
- from 7.6
+Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
 
+added all the required function which are new in 7.12 and removed
+few deprecated functions from 7.6
 ---
  gdb/config/microblaze/linux.mh       |  4 +-
  gdb/gdbserver/configure.srv          |  3 +-
  gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-linux-tdep.c          | 68 +++++++++++++++++--
  gdb/microblaze-tdep.h                |  1 +
- 5 files changed, 153 insertions(+), 20 deletions(-)
+ 4 files changed, 89 insertions(+), 16 deletions(-)
 
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1..74a53b854a 100644
+index a4eaf540e1d..74a53b854a4 100644
 --- a/gdb/config/microblaze/linux.mh
 +++ b/gdb/config/microblaze/linux.mh
 @@ -1,9 +1,11 @@
@@ -31,21 +30,21 @@ index a4eaf540e1..74a53b854a 100644
  
  LOADLIBES = -ldl $(RDYNAMIC)
 diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index 153dcb4c71..201b7ae190 100644
+index e0d2b2fe04a..26db2dd2461 100644
 --- a/gdb/gdbserver/configure.srv
 +++ b/gdb/gdbserver/configure.srv
-@@ -211,8 +211,7 @@ case "${target}" in
+@@ -185,8 +185,7 @@ case "${target}" in
                         srv_linux_thread_db=yes
                         ;;
-   microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
+   microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
 -                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
 -                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
 +                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+                        srv_xmlfiles="microblaze-linux.xml"
                         srv_linux_regsets=yes
                         srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
 diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc58..a2733f3c21 100644
+index cba5d6fc585..a2733f3c21c 100644
 --- a/gdb/gdbserver/linux-microblaze-low.c
 +++ b/gdb/gdbserver/linux-microblaze-low.c
 @@ -39,10 +39,11 @@ static int microblaze_regmap[] =
@@ -200,100 +199,8 @@ index cba5d6fc58..a2733f3c21 100644
 +{
 +  init_registers_microblaze ();
 +}
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e2225d778a..011e513941 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -29,13 +29,76 @@
- #include "regcache.h"
- #include "value.h"
- #include "osabi.h"
--#include "regset.h"
- #include "solib-svr4.h"
- #include "microblaze-tdep.h"
- #include "trad-frame.h"
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
-+
-+#include "gdb_assert.h"
-+
-+#ifndef REGSET_H
-+#define REGSET_H 1
-+
-+struct gdbarch;
-+struct regcache;
-+
-+/* Data structure for the supported register notes in a core file.  */
-+struct core_regset_section
-+{
-+  const char *sect_name;
-+  int size;
-+  const char *human_name;
-+};
-+
-+/* Data structure describing a register set.  */
-+
-+typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
-+                                    int, const void *, size_t);
-+typedef void (collect_regset_ftype) (const struct regset *,
-+                                     const struct regcache *,
-+                                     int, void *, size_t);
-+
-+struct regset
-+{
-+  /* Data pointer for private use by the methods below, presumably
-+     providing some sort of description of the register set.  */
-+  const void *descr;
-+
-+  /* Function supplying values in a register set to a register cache.  */
-+  supply_regset_ftype *supply_regset;
-+
-+  /* Function collecting values in a register set from a register cache.  */
-+  collect_regset_ftype *collect_regset;
-+
-+  /* Architecture associated with the register set.  */
-+  struct gdbarch *arch;
-+};
-+
-+#endif
-+
-+/* Allocate a fresh 'struct regset' whose supply_regset function is
-+   SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
-+   If the regset has no collect_regset function, pass NULL for
-+   COLLECT_REGSET.
-+
-+   The object returned is allocated on ARCH's obstack.  */
-+
-+struct regset *
-+regset_alloc (struct gdbarch *arch,
-+              supply_regset_ftype *supply_regset,
-+              collect_regset_ftype *collect_regset)
-+{
-+  struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
-+
-+  regset->arch = arch;
-+  regset->supply_regset = supply_regset;
-+  regset->collect_regset = collect_regset;
-+
-+  return regset;
-+}
- 
- static int microblaze_debug_flag = 0;
- 
-@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
- 
--  set_gdbarch_regset_from_core_section (gdbarch,
--                                       microblaze_regset_from_core_section);
--
-   /* Enable TLS support.  */
-   set_gdbarch_fetch_tls_load_module_address (gdbarch,
-                                              svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 02650f61d9..3777cbb6a8 100644
+index 8f41ba19351..d2112dc07e1 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -24,6 +24,7 @@
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
index e89d4049..7ac8f07f 100644
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
@@ -1,35 +1,31 @@
-From ecaa548038df1ebf653ef3c3429e49c207461b19 Mon Sep 17 00:00:00 2001
+From 4e5a4e94cb1dd61646230100f883bd27a39cd896 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/43] [Patch, microblaze]: Adding 64 bit MB support Added new
- architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju
- Mekala <nmekala@xilix.com>
+Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
 
-Merged on top of binutils work.
+Added new architecture to Microblaze 64-bit support to GDB
 
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
 ---
  bfd/archures.c                                |   2 +
  bfd/bfd-in2.h                                 |   2 +
- bfd/cpu-microblaze.c                          |  12 +-
- bfd/elf32-microblaze.c                        |  93 +-------
- gdb/Makefile.in                               |   2 +-
+ bfd/cpu-microblaze.c                          |  16 +-
+ bfd/elf32-microblaze.c                        |   9 +
  gdb/features/Makefile                         |   3 +
  gdb/features/microblaze-core.xml              |   6 +-
- gdb/features/microblaze-stack-protect.xml     |   4 +-
- gdb/features/microblaze-with-stack-protect.c  |   8 +-
+ gdb/features/microblaze-with-stack-protect.c  |   4 +-
  gdb/features/microblaze.c                     |   6 +-
- gdb/features/microblaze64-core.xml            |  69 ++++++
- gdb/features/microblaze64-stack-protect.xml   |  12 +
- .../microblaze64-with-stack-protect.c         |  79 +++++++
- .../microblaze64-with-stack-protect.xml       |  12 +
- gdb/features/microblaze64.c                   |  77 +++++++
- gdb/features/microblaze64.xml                 |  11 +
- gdb/microblaze-tdep.c                         | 207 ++++++++++++++++--
- gdb/microblaze-tdep.h                         |   8 +-
+ gdb/features/microblaze64-core.xml            |  69 +++++++
+ gdb/features/microblaze64-stack-protect.xml   |  12 ++
+ .../microblaze64-with-stack-protect.c         |  79 ++++++++
+ .../microblaze64-with-stack-protect.xml       |  12 ++
+ gdb/features/microblaze64.c                   |  77 ++++++++
+ gdb/features/microblaze64.xml                 |  11 ++
+ gdb/microblaze-linux-tdep.c                   |  29 ++-
+ gdb/microblaze-tdep.c                         | 176 ++++++++++++++++--
+ gdb/microblaze-tdep.h                         |   9 +-
  .../microblaze-with-stack-protect.dat         |   4 +-
- opcodes/microblaze-opc.h                      |   1 -
- 22 files changed, 504 insertions(+), 134 deletions(-)
+ 20 files changed, 504 insertions(+), 40 deletions(-)
  create mode 100644 gdb/features/microblaze64-core.xml
  create mode 100644 gdb/features/microblaze64-stack-protect.xml
  create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -38,10 +34,10 @@ Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
  create mode 100644 gdb/features/microblaze64.xml
 
 diff --git a/bfd/archures.c b/bfd/archures.c
-index 647cf0d8d4..3fdf7c3c0e 100644
+index 7866c6095b5..abc1541afe6 100644
 --- a/bfd/archures.c
 +++ b/bfd/archures.c
-@@ -512,6 +512,8 @@ DESCRIPTION
+@@ -513,6 +513,8 @@ DESCRIPTION
  .  bfd_arch_lm32,      {* Lattice Mico32.  *}
  .#define bfd_mach_lm32         1
  .  bfd_arch_microblaze,{* Xilinx MicroBlaze.  *}
@@ -51,10 +47,10 @@ index 647cf0d8d4..3fdf7c3c0e 100644
  .  bfd_arch_tilegx,    {* Tilera TILE-Gx.  *}
  .#define bfd_mach_tilepro      1
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 33c9cb62d9..db624c62b9 100644
+index 91761bf6964..cc34ce0d8c3 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -2411,6 +2411,8 @@ enum bfd_architecture
+@@ -1896,6 +1896,8 @@ enum bfd_architecture
    bfd_arch_lm32,      /* Lattice Mico32.  */
  #define bfd_mach_lm32          1
    bfd_arch_microblaze,/* Xilinx MicroBlaze.  */
@@ -64,7 +60,7 @@ index 33c9cb62d9..db624c62b9 100644
    bfd_arch_tilegx,    /* Tilera TILE-Gx.  */
  #define bfd_mach_tilepro       1
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index c91ba46f75..8e7bcead28 100644
+index 4b48b310c6a..a32c4a33d75 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
 @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
@@ -78,16 +74,23 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   32,                          /* 32 bits in an address.  */
-   8,                           /* 8 bits in a byte.  */
-   bfd_arch_microblaze,         /* Architecture.  */
+@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   0 /* Maximum offset of a reloc from the start of an insn.  */
+ },
+ {
+-  32,                          /* Bits in a word.  */
+-  32,                          /* Bits in an address.  */
+-  8,                           /* Bits in a byte.  */
++  32,                          /* 32 bits in a word.  */
++  32,                          /* 32 bits in an address.  */
++  8,                           /* 8 bits in a byte.  */
+   bfd_arch_microblaze,         /* Architecture number.  */
 -  0,                           /* Machine number - 0 for now.  */
 +  bfd_mach_microblaze,         /* 32 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -62,7 +62,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    32,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
    bfd_arch_microblaze,                 /* Architecture.  */
@@ -96,110 +99,20 @@ index c91ba46f75..8e7bcead28 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -76,8 +76,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   64,                          /* 32 bits in a word.  */
+@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    64,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
--  bfd_arch_microblaze,                 /* Architecture.  */
+   bfd_arch_microblaze,                 /* Architecture.  */
 -  0,                           /* Machine number - 0 for now.  */
-+  bfd_arch_microblaze,         /* Architecture.  */
 +  bfd_mach_microblaze64,       /* 64 bit Machine */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index c280431df6..f9996eae12 100644
+index cb7a98d307e..e4a70150190 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
-@@ -767,87 +767,6 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
-   return _bfd_elf_is_local_label_name (abfd, name);
- }
- 
--/* Support for core dump NOTE sections.  */
--static bfd_boolean
--microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
--{
--  int offset;
--  unsigned int size;
--
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 228:         /* Linux/MicroBlaze */
--        /* pr_cursig */
--        elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
--
--        /* pr_pid */
--        elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
--
--        /* pr_reg */
--        offset = 72;
--        size = 50 * 4;
--
--        break;
--    }
--
--  /* Make a ".reg/999" section.  */
--  return _bfd_elfcore_make_pseudosection (abfd, ".reg",
--                                          size, note->descpos + offset);
--}
--
--static bfd_boolean
--microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
--{
--  switch (note->descsz)
--    {
--      default:
--        return FALSE;
--
--      case 128:         /* Linux/MicroBlaze elf_prpsinfo */
--        elf_tdata (abfd)->core->program
--         = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
--        elf_tdata (abfd)->core->command
--         = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
--    }
--
--  /* Note that for some reason, a spurious space is tacked
--     onto the end of the args in some (at least one anyway)
--     implementations, so strip it off if it exists.  */
--
--  {
--    char *command = elf_tdata (abfd)->core->command;
--    int n = strlen (command);
--
--    if (0 < n && command[n - 1] == ' ')
--      command[n - 1] = '\0';
--  }
--
--  return TRUE;
--}
--
--/* The microblaze linker (like many others) needs to keep track of
--   the number of relocs that it decides to copy as dynamic relocs in
--   check_relocs for each symbol. This is so that it can later discard
--   them if they are found to be unnecessary.  We store the information
--   in a field extending the regular ELF linker hash table.  */
--
--struct elf32_mb_dyn_relocs
--{
--  struct elf32_mb_dyn_relocs *next;
--
--  /* The input section of the reloc.  */
--  asection *sec;
--
--  /* Total number of relocs copied for the input section.  */
--  bfd_size_type count;
--
--  /* Number of pc-relative relocs copied for the input section.  */
--  bfd_size_type pc_count;
--};
--
- /* ELF linker hash entry.  */
- 
- struct elf32_mb_link_hash_entry
-@@ -3683,6 +3602,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
+@@ -3684,6 +3684,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
    return TRUE;
  }
  
@@ -214,44 +127,28 @@ index c280431df6..f9996eae12 100644
  /* Hook called by the linker routine which adds symbols from an object
     file.  We use it to put .comm items in .sbss, and not .bss.  */
  
-@@ -3752,8 +3679,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define elf_backend_finish_dynamic_symbol      microblaze_elf_finish_dynamic_symbol
- #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
- #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
--
--#define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
--#define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
+@@ -3756,5 +3764,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+ 
+ #define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
+ #define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
 +#define elf_backend_object_p                   elf_microblaze_object_p
  
  #include "elf32-target.h"
-diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index d620580498..69b003f8cb 100644
---- a/gdb/Makefile.in
-+++ b/gdb/Makefile.in
-@@ -2265,7 +2265,7 @@ ALLDEPFILES = \
-        m68k-tdep.c \
-        microblaze-linux-tdep.c \
-        microblaze-tdep.c \
--        microblaze-linux-nat.c \ 
-+       microblaze-linux-nat.c \
-        mingw-hdep.c \
-        mips-fbsd-nat.c \
-        mips-fbsd-tdep.c \
 diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index 3d84ca09a1..fdeec19753 100644
+index 9a98b0542c4..438e0c5a3fe 100644
 --- a/gdb/features/Makefile
 +++ b/gdb/features/Makefile
-@@ -64,6 +64,7 @@ WHICH = aarch64 \
-        i386/x32-avx-avx512-linux \
+@@ -48,6 +48,7 @@ WHICH = arm/arm-with-iwmmxt arm/arm-with-vfpv2 arm/arm-with-vfpv3 \
+        arm/arm-with-neon \
         mips-linux mips-dsp-linux \
         microblaze-with-stack-protect \
 +       microblaze64-with-stack-protect \
         mips64-linux mips64-dsp-linux \
         nios2-linux \
         rs6000/powerpc-32 \
-@@ -135,7 +136,9 @@ XMLTOC = \
-        arm/arm-with-vfpv2.xml \
-        arm/arm-with-vfpv3.xml \
+@@ -111,7 +112,9 @@ XMLTOC = \
+        arc-v2.xml \
+        arc-arcompact.xml \
         microblaze-with-stack-protect.xml \
 +       microblaze64-with-stack-protect.xml \
         microblaze.xml \
@@ -260,7 +157,7 @@ index 3d84ca09a1..fdeec19753 100644
         mips-linux.xml \
         mips64-dsp-linux.xml \
 diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 88c93e5d66..5bc3e49f84 100644
+index f272650a41b..d1f2282fd1e 100644
 --- a/gdb/features/microblaze-core.xml
 +++ b/gdb/features/microblaze-core.xml
 @@ -8,7 +8,7 @@
@@ -285,24 +182,11 @@ index 88c93e5d66..5bc3e49f84 100644
    <reg name="rtlbsx" bitsize="32"/>
    <reg name="rtlblo" bitsize="32"/>
    <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index 870c148bb0..a7f27b903c 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="rslr" bitsize="32"/>
--  <reg name="rshr" bitsize="32"/>
-+  <reg name="slr" bitsize="32"/>
-+  <reg name="shr" bitsize="32"/>
++  <reg name="rslr" bitsize="32"/>
++  <reg name="rshr" bitsize="32"/>
  </feature>
 diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa19887..609934e2b4 100644
+index b39aa198874..ab162fd2588 100644
 --- a/gdb/features/microblaze-with-stack-protect.c
 +++ b/gdb/features/microblaze-with-stack-protect.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
@@ -323,19 +207,8 @@ index b39aa19887..609934e2b4 100644
    tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
 diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc0770..ceb98ca8b8 100644
+index 6c86fc07700..7919ac96e62 100644
 --- a/gdb/features/microblaze.c
 +++ b/gdb/features/microblaze.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
@@ -360,14 +233,14 @@ index 6c86fc0770..ceb98ca8b8 100644
    tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
  
    tdesc_microblaze = result;
  }
 diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
 new file mode 100644
-index 0000000000..96e99e2fb2
+index 00000000000..b9adadfade6
 --- /dev/null
 +++ b/gdb/features/microblaze64-core.xml
 @@ -0,0 +1,69 @@
@@ -437,12 +310,12 @@ index 0000000000..96e99e2fb2
 +  <reg name="rtlbsx" bitsize="32"/>
 +  <reg name="rtlblo" bitsize="32"/>
 +  <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
 new file mode 100644
-index 0000000000..1bbf5fc3ce
+index 00000000000..9d7ea8b9fd7
 --- /dev/null
 +++ b/gdb/features/microblaze64-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -455,12 +328,12 @@ index 0000000000..1bbf5fc3ce
 +
 +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
 +<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+  <reg name="slr" bitsize="64"/>
-+  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
 new file mode 100644
-index 0000000000..f448c9a749
+index 00000000000..249cb534daa
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.c
 @@ -0,0 +1,79 @@
@@ -538,14 +411,14 @@ index 0000000000..f448c9a749
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
 +
 +  feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64_with_stack_protect = result;
 +}
 diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
 new file mode 100644
-index 0000000000..0e9f01611f
+index 00000000000..0e9f01611f3
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -563,7 +436,7 @@ index 0000000000..0e9f01611f
 +</target>
 diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
 new file mode 100644
-index 0000000000..1aa37c4512
+index 00000000000..5d3e2c8cd91
 --- /dev/null
 +++ b/gdb/features/microblaze64.c
 @@ -0,0 +1,77 @@
@@ -639,14 +512,14 @@ index 0000000000..1aa37c4512
 +  tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64 = result;
 +}
 diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
 new file mode 100644
-index 0000000000..515d18e65c
+index 00000000000..515d18e65cf
 --- /dev/null
 +++ b/gdb/features/microblaze64.xml
 @@ -0,0 +1,11 @@
@@ -661,8 +534,55 @@ index 0000000000..515d18e65c
 +<target>
 +  <xi:include href="microblaze64-core.xml"/>
 +</target>
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index 0afb6efeba3..48459a76991 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ 
+   /* BFD target for core files.  */
+   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    }
+   else
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    }
++
++  switch (info.bfd_arch_info->mach)
++    {
++    case bfd_mach_microblaze64:
++      set_gdbarch_ptr_bit (gdbarch, 64);
++    break;
++    }
+ 
+ 
+   /* Shared library handling.  */
+@@ -176,6 +197,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ void
+ _initialize_microblaze_linux_tdep (void)
+ {
+-  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
++                         microblaze_linux_init_abi);
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
+                          microblaze_linux_init_abi);
+ }
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 49713ea9b1..0605283c9e 100644
+index 98944f38d2a..5c0d6dd48ae 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -40,7 +40,9 @@
@@ -675,57 +595,34 @@ index 49713ea9b1..0605283c9e 100644
  
  /* Instruction macros used for analyzing the prologue.  */
  /* This set of instruction macros need to be changed whenever the
-@@ -75,12 +77,13 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "rslr", "rshr"
-+  "slr", "shr"
+@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
  };
  
  #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
- 
+-
++
  static unsigned int microblaze_debug_flag = 0;
-+int reg_size = 4;
++int MICROBLAZE_REGISTER_SIZE = 4;
  
  static void ATTRIBUTE_PRINTF (1, 2)
  microblaze_debug (const char *fmt, ...)
-@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs,
-   error (_("store_arguments not implemented"));
-   return sp;
- }
+@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
 +#if 0
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
                                     struct bp_target_info *bp_tgt)
-@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   int val;
-   int bplen;
-   gdb_byte old_contents[BREAKPOINT_MAX];
--  struct cleanup *cleanup;
-+  //struct cleanup *cleanup;
+@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
  
-   /* Determine appropriate breakpoint contents and size for this address.  */
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-     error (_("Software breakpoints not implemented for this target."));
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  scoped_restore 
-+    cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    return val;
  }
- 
 +#endif
+ 
  /* Allocate and initialize a frame cache.  */
  
- static struct microblaze_frame_cache *
-@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
                                  gdb_byte *valbuf)
  {
    gdb_byte buf[8];
@@ -733,19 +630,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF.  */
    switch (TYPE_LENGTH (type))
      {
-       case 1:  /* return last byte in the register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
-+       memcpy(valbuf, buf + reg_size - 1, 1);
-        return;
-       case 2:  /* return last 2 bytes in register.  */
-        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
--       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
-+       memcpy(valbuf, buf + reg_size - 2, 2);
-        return;
-       case 4:  /* for sizes 4 or 8, copy the required length.  */
-       case 8:
-@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
    return (TYPE_LENGTH (type) == 16);
  }
  
@@ -857,16 +742,14 @@ index 49713ea9b1..0605283c9e 100644
 +}
 +#endif
 +
-+static void
-+microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
-+{
-+  regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
-+}
-+
  static int dwarf2_to_reg_map[78] =
  { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
    4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
-@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+   return -1;
+ }
+ 
++#if 0
  static void
  microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
  {
@@ -882,46 +765,27 @@ index 49713ea9b1..0605283c9e 100644
 -                                  tdesc_microblaze_with_stack_protect);
 +                                  tdesc_microblaze64_with_stack_protect);
  }
++#endif
  
  void
-@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ microblaze_supply_gregset (const struct regset *regset,
                          struct regcache *regcache,
                          int regnum, const void *gregs)
  {
--  unsigned int *regs = gregs;
+-  const unsigned int *regs = (const unsigned int *)gregs;
 +  const gdb_byte *regs = (const gdb_byte *) gregs;
    if (regnum >= 0)
--    regcache_raw_supply (regcache, regnum, regs + regnum);
-+    regcache->raw_supply (regnum, regs + regnum);
- 
-   if (regnum == -1) {
-     int i;
+     regcache->raw_supply (regnum, regs + regnum);
  
-     for (i = 0; i < 50; i++) {
--      regcache_raw_supply (regcache, i, regs + i);
-+      regcache->raw_supply (regnum, regs + i);
-     }
-   }
+@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
  }
-@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- }
- 
  
-+static void
-+make_regs (struct gdbarch *arch)
-+{
-+  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-+  int mach = gdbarch_bfd_arch_info (arch)->mach;
-+  
-+  if (mach == bfd_mach_microblaze64)
-+    {
-+      set_gdbarch_ptr_bit (arch, 64);
-+    }
-+}
  
+-
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    if (arches != NULL)
      return arches->gdbarch;
    if (tdesc == NULL)
@@ -931,7 +795,7 @@ index 49713ea9b1..0605283c9e 100644
 +      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) 
 +        {
 +         tdesc = tdesc_microblaze64;
-+          reg_size = 8;
++          MICROBLAZE_REGISTER_SIZE = 8;
 +       }
 +      else
 +       tdesc = tdesc_microblaze;
@@ -939,7 +803,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Check any target description for validity.  */
    if (tdesc_has_registers (tdesc))
      {
-@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        int valid_p;
        int i;
  
@@ -980,7 +844,7 @@ index 49713ea9b1..0605283c9e 100644
          }
  
        if (!valid_p)
-@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            tdesc_data_cleanup (tdesc_data);
            return NULL;
          }
@@ -988,7 +852,7 @@ index 49713ea9b1..0605283c9e 100644
      }
  
    /* Allocate space for the new architecture.  */
-@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    /* Register numbers of various important registers.  */
    set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); 
    set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); 
@@ -1006,7 +870,7 @@ index 49713ea9b1..0605283c9e 100644
    /* Map Dwarf2 registers to GDB registers.  */
    set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
  
-@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
                                        microblaze_breakpoint::kind_from_pc);
    set_gdbarch_sw_breakpoint_from_kind (gdbarch,
                                        microblaze_breakpoint::bp_from_kind);
@@ -1024,21 +888,7 @@ index 49713ea9b1..0605283c9e 100644
  
    frame_base_set_default (gdbarch, &microblaze_frame_base);
  
-@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-     tdesc_use_registers (gdbarch, tdesc, tdesc_data);
-   //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
- 
--  /* If we have register sets, enable the generic core file support.  */
-+  /* If we have register sets, enable the generic core file support.  
-   if (tdep->gregset) {
-       set_gdbarch_regset_from_core_section (gdbarch,
-                                           microblaze_regset_from_core_section);
--  }
-+  }*/
- 
-   return gdbarch;
- }
-@@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void)
+@@ -840,6 +980,8 @@ _initialize_microblaze_tdep (void)
  
    initialize_tdesc_microblaze_with_stack_protect ();
    initialize_tdesc_microblaze ();
@@ -1048,7 +898,7 @@ index 49713ea9b1..0605283c9e 100644
    add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
                              &microblaze_debug_flag, _("\
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 3777cbb6a8..55f5dd1962 100644
+index d2112dc07e1..bd03e969b9b 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -27,7 +27,7 @@ struct microblaze_gregset
@@ -1072,17 +922,18 @@ index 3777cbb6a8..55f5dd1962 100644
  };
  
  struct microblaze_frame_cache
-@@ -128,7 +128,7 @@ struct microblaze_frame_cache
+@@ -128,7 +128,8 @@ struct microblaze_frame_cache
    struct trad_frame_saved_reg *saved_regs;
  };
  /* All registers are 32 bits.  */
 -#define MICROBLAZE_REGISTER_SIZE 4
-+//#define MICROBLAZE_REGISTER_SIZE 8
++extern int microblaze_reg_size;
++#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
  
  /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
     Only used for native debugging.  */
 diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd..450e321d49 100644
+index 8040a7b3fd0..450e321d49e 100644
 --- a/gdb/regformats/microblaze-with-stack-protect.dat
 +++ b/gdb/regformats/microblaze-with-stack-protect.dat
 @@ -60,5 +60,5 @@ expedite:r1,rpc
@@ -1093,18 +944,6 @@ index 8040a7b3fd..450e321d49 100644
 -32:rshr
 +32:slr
 +32:shr
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index bd9d91cd57..12d4456bc2 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -134,7 +134,6 @@
- #define ORLI_MASK 0xA0000000
- #define XORLI_MASK 0xA8000000
- 
--
- /* New Mask for msrset, msrclr insns.  */
- #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
- /* Mask for mbar insn.  */
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
deleted file mode 100644
index 7d63e63e..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 3f830717572e074a21840549b48265ec00d67bd1 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 12 Dec 2019 14:56:17 +0530
-Subject: [PATCH 41/43] [patch,MicroBlaze] : porting GDB for linux
-
----
- gdb/features/microblaze-linux.xml | 12 ++++++++++
- gdb/gdbserver/Makefile.in         |  2 ++
- gdb/gdbserver/configure.srv       |  3 ++-
- gdb/microblaze-linux-tdep.c       | 39 ++++++++++++++++++++++++-------
- 4 files changed, 47 insertions(+), 9 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
-
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
-new file mode 100644
-index 0000000000..8983e66eb3
---- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
-+
-+     Copying and distribution of this file, with or without modification,
-+     are permitted in any medium without royalty provided the copyright
-+     notice and this notice are preserved.  -->
-+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+  <osabi>GNU/Linux</osabi>
-+  <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 73ca5fd7c5..f5d8663ec8 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -639,6 +639,8 @@ common/%.o: ../common/%.c
- 
- %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
-        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
- 
- #
- # Dependency tracking.
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index 201b7ae190..e5ed6498a8 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -210,8 +210,9 @@ case "${target}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
--  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
-+  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
-                        srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-+                       srv_xmlfiles="microblaze-linux.xml"
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 011e513941..e3d2a7508d 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -41,7 +41,7 @@
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--
-+int MICROBLAZE_REGISTER_SIZE=4;
- struct gdbarch;
- struct regcache;
- 
-@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
-        va_end (args);
-     }
- }
--
-+#if 0
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
-                                           struct bp_target_info *bp_tgt)
-@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
- 
-   /* Make sure we see the memory breakpoints.  */
--  cleanup = make_show_memory_breakpoints_cleanup (1);
-+  cleanup = make_scoped_restore_show_memory_breakpoints (1);
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   do_cleanups (cleanup);
-   return val;
- }
-+#endif
- 
- static void
- microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
-@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   linux_init_abi (info, gdbarch);
- 
--  set_gdbarch_memory_remove_breakpoint (gdbarch,
--                                       microblaze_linux_memory_remove_breakpoint);
-+//  set_gdbarch_memory_remove_breakpoint (gdbarch,
-+//                                     microblaze_linux_memory_remove_breakpoint);
- 
-   /* Shared library handling.  */
-   set_solib_svr4_fetch_link_map_offsets (gdbarch,
-@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   /* BFD target for core files.  */
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    }
-   else
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    }
- 
-+  switch (info.bfd_arch_info->mach)
-+    {
-+    case bfd_mach_microblaze64:
-+      set_gdbarch_ptr_bit (gdbarch, 64);
-+    break;
-+    }
- 
-   /* Shared library handling.  */
-   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-@@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- void
- _initialize_microblaze_linux_tdep (void)
- {
--  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
-+                         microblaze_linux_init_abi);
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
-                          microblaze_linux_init_abi);
- }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
deleted file mode 100644
index 06e63f3c..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 746453e0f35fd669cfacabfe223b8e7007a99797 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 19 Dec 2019 12:22:04 +0530
-Subject: [PATCH 42/43] Correcting the register names from slr & shr to rslr &
- rshr
-
----
- gdb/features/microblaze-core.xml               | 4 ++--
- gdb/features/microblaze-stack-protect.xml      | 4 ++--
- gdb/features/microblaze-with-stack-protect.c   | 4 ++--
- gdb/features/microblaze.c                      | 4 ++--
- gdb/features/microblaze64-core.xml             | 4 ++--
- gdb/features/microblaze64-stack-protect.xml    | 4 ++--
- gdb/features/microblaze64-with-stack-protect.c | 4 ++--
- gdb/features/microblaze64.c                    | 4 ++--
- gdb/microblaze-tdep.c                          | 2 +-
- 9 files changed, 17 insertions(+), 17 deletions(-)
-
-diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index 5bc3e49f84..6f73f4eb84 100644
---- a/gdb/features/microblaze-core.xml
-+++ b/gdb/features/microblaze-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
-index a7f27b903c..870c148bb0 100644
---- a/gdb/features/microblaze-stack-protect.xml
-+++ b/gdb/features/microblaze-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze.stack-protect">
--  <reg name="slr" bitsize="32"/>
--  <reg name="shr" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
- </feature>
-diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index 609934e2b4..ab162fd258 100644
---- a/gdb/features/microblaze-with-stack-protect.c
-+++ b/gdb/features/microblaze-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
- 
-   tdesc_microblaze_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index ceb98ca8b8..7919ac96e6 100644
---- a/gdb/features/microblaze.c
-+++ b/gdb/features/microblaze.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze = result;
- }
-diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
-index 96e99e2fb2..b9adadfade 100644
---- a/gdb/features/microblaze64-core.xml
-+++ b/gdb/features/microblaze64-core.xml
-@@ -64,6 +64,6 @@
-   <reg name="rtlbsx" bitsize="32"/>
-   <reg name="rtlblo" bitsize="32"/>
-   <reg name="rtlbhi" bitsize="32"/>
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
-index 1bbf5fc3ce..9d7ea8b9fd 100644
---- a/gdb/features/microblaze64-stack-protect.xml
-+++ b/gdb/features/microblaze64-stack-protect.xml
-@@ -7,6 +7,6 @@
- 
- <!DOCTYPE feature SYSTEM "gdb-target.dtd">
- <feature name="org.gnu.gdb.microblaze64.stack-protect">
--  <reg name="slr" bitsize="64"/>
--  <reg name="shr" bitsize="64"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
- </feature>
-diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
-index f448c9a749..249cb534da 100644
---- a/gdb/features/microblaze64-with-stack-protect.c
-+++ b/gdb/features/microblaze64-with-stack-protect.c
-@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void)
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
- 
-   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64_with_stack_protect = result;
- }
-diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
-index 1aa37c4512..5d3e2c8cd9 100644
---- a/gdb/features/microblaze64.c
-+++ b/gdb/features/microblaze64.c
-@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
-   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
-   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
--  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
--  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
- 
-   tdesc_microblaze64 = result;
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 0605283c9e..7a0c2527f4 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -77,7 +77,7 @@ static const char *microblaze_register_names[] =
-   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
-   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
--  "slr", "shr"
-+  "rslr", "rshr"
- };
- 
- #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
deleted file mode 100644
index 0b6cae62..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From 8cb6a265c2108ff7117c07e106604b46238c6ae7 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Fri, 17 Jan 2020 15:45:48 +0530
-Subject: [PATCH 43/43] Removing the header "gdb_assert.h" from MB target file
-
----
- gdb/microblaze-linux-tdep.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index e3d2a7508d..5ef937219c 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -37,7 +37,6 @@
- #include "linux-tdep.h"
- #include "glibc-tdep.h"
- 
--#include "gdb_assert.h"
- 
- #ifndef REGSET_H
- #define REGSET_H 1
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
deleted file mode 100644
index ace6aabd..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch
+++ /dev/null
@@ -1,363 +0,0 @@
-From 8d75e232d3513a184180d797ef20bf53d3543fa7 Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@xilinx.com>
-Date: Mon, 20 Jan 2020 12:48:13 -0800
-Subject: [PATCH] gdb/microblaze-linux-nat.c: Fix target compilation of gdb
-
-Add the nat to the configure file
-
-Remove gdb_assert.h and gdb_string.h.
-
-Adjust include for opcodes as well.
-
-Update to match latest style of components, similar to ppc-linux-nat.c
-
-Update:
-  get_regcache_arch(regcache) to regcache->arch()
-  regcache_raw_supply(regcache, ...) to regcache->raw_supply(...)
-  regcache_raw_collect(regcache, ...) to regcache->raw_collect(...)
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
----
- gdb/configure.nat          |   4 +
- gdb/microblaze-linux-nat.c | 149 +++++++++++++------------------------
- gdb/microblaze-tdep.c      |   3 +-
- 3 files changed, 57 insertions(+), 99 deletions(-)
-
-diff --git a/gdb/configure.nat b/gdb/configure.nat
-index 64ee101d83..f0f6c2f5bc 100644
---- a/gdb/configure.nat
-+++ b/gdb/configure.nat
-@@ -261,6 +261,10 @@ case ${gdb_host} in
-                # Host: Motorola m68k running GNU/Linux.
-                NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o"
-                ;;
-+           microblaze*)
-+               # Host: Microblaze, running Linux
-+               NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o"
-+               ;;
-            mips)
-                # Host: Linux/MIPS
-                NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
-diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
-index e9b8c9c522..e09a86bb3f 100644
---- a/gdb/microblaze-linux-nat.c
-+++ b/gdb/microblaze-linux-nat.c
-@@ -36,11 +36,9 @@
- #include "dwarf2-frame.h"
- #include "osabi.h"
- 
--#include "gdb_assert.h"
--#include "gdb_string.h"
- #include "target-descriptions.h"
--#include "opcodes/microblaze-opcm.h"
--#include "opcodes/microblaze-dis.h"
-+#include "../opcodes/microblaze-opcm.h"
-+#include "../opcodes/microblaze-dis.h"
- 
- #include "linux-nat.h"
- #include "target-descriptions.h"
-@@ -61,34 +59,27 @@
- /* Defines ps_err_e, struct ps_prochandle.  */
- #include "gdb_proc_service.h"
- 
--/* On GNU/Linux, threads are implemented as pseudo-processes, in which
--   case we may be tracing more than one process at a time.  In that
--   case, inferior_ptid will contain the main process ID and the
--   individual thread (process) ID.  get_thread_id () is used to get
--   the thread id if it's available, and the process id otherwise.  */
--
--int
--get_thread_id (ptid_t ptid)
--{
--  int tid = TIDGET (ptid);
--  if (0 == tid)
--    tid = PIDGET (ptid);
--  return tid;
--}
--
--#define GET_THREAD_ID(PTID)    get_thread_id (PTID)
--
- /* Non-zero if our kernel may support the PTRACE_GETREGS and
-    PTRACE_SETREGS requests, for reading and writing the
-    general-purpose registers.  Zero if we've tried one of
-    them and gotten an error.  */
- int have_ptrace_getsetregs = 1;
- 
-+struct microblaze_linux_nat_target final : public linux_nat_target
-+{
-+  /* Add our register access methods.  */
-+  void fetch_registers (struct regcache *, int) override;
-+  void store_registers (struct regcache *, int) override;
-+
-+  const struct target_desc *read_description () override;
-+};
-+
-+static microblaze_linux_nat_target the_microblaze_linux_nat_target;
-+
- static int
- microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- {
-   int u_addr = -1;
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
-      interface, and not the wordsize of the program's ABI.  */
-   int wordsize = sizeof (long);
-@@ -105,18 +96,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
- static void
- fetch_register (struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int bytes_transferred;
--  unsigned int offset;         /* Offset of registers within the u area.  */
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-   {
-     memset (buf, '\0', register_size (gdbarch, regno));   /* Supply zeroes */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-     return;
-   }
- 
-@@ -149,14 +138,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
-   {
-     /* Little-endian values are always found at the left end of the
-        bytes transferred.  */
--    regcache_raw_supply (regcache, regno, buf);
-+    regcache->raw_supply (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values are found at the right end of the bytes
-        transferred.  */
-     size_t padding = (bytes_transferred - register_size (gdbarch, regno));
--    regcache_raw_supply (regcache, regno, buf + padding);
-+    regcache->raw_supply (regno, buf + padding);
-   }
-   else
-     internal_error (__FILE__, __LINE__,
-@@ -175,8 +164,6 @@ fetch_register (struct regcache *regcache, int tid, int regno)
- static int
- fetch_all_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -204,8 +191,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid)
- static void
- fetch_gp_regs (struct regcache *regcache, int tid)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -219,17 +204,29 @@ fetch_gp_regs (struct regcache *regcache, int tid)
-     fetch_register (regcache, tid, i);
- }
- 
-+/* Fetch registers from the child process.  Fetch all registers if
-+   regno == -1, otherwise fetch all general registers or all floating
-+   point registers depending upon the value of regno.  */
-+void
-+microblaze_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
-+{
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
-+
-+  if (regno == -1)
-+    fetch_gp_regs (regcache, tid);
-+  else
-+    fetch_register (regcache, tid, regno);
-+}
- 
- static void
- store_register (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+  struct gdbarch *gdbarch = regcache->arch();
-   /* This isn't really an address.  But ptrace thinks of it as one.  */
-   CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
-   int i;
-   size_t bytes_to_transfer;
--  char buf[MAX_REGISTER_SIZE];
-+  char buf[sizeof(long)];
- 
-   if (regaddr == -1)
-     return;
-@@ -242,13 +239,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
-   {
-     /* Little-endian values always sit at the left end of the buffer.  */
--    regcache_raw_collect (regcache, regno, buf);
-+    regcache->raw_collect (regno, buf);
-   }
-   else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-   {
-     /* Big-endian values sit at the right end of the buffer.  */
-     size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
--    regcache_raw_collect (regcache, regno, buf + padding);
-+    regcache->raw_collect (regno, buf + padding);
-   }
- 
-   for (i = 0; i < bytes_to_transfer; i += sizeof (long))
-@@ -281,8 +278,6 @@ store_register (const struct regcache *regcache, int tid, int regno)
- static int
- store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   gdb_gregset_t gregset;
- 
-   if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
-@@ -319,8 +314,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
- static void
- store_gp_regs (const struct regcache *regcache, int tid, int regno)
- {
--  struct gdbarch *gdbarch = get_regcache_arch (regcache);
--  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-   int i;
- 
-   if (have_ptrace_getsetregs)
-@@ -335,33 +328,10 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno)
- }
- 
- 
--/* Fetch registers from the child process.  Fetch all registers if
--   regno == -1, otherwise fetch all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
--{
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
--
--  if (regno == -1)
--    fetch_gp_regs (regcache, tid);
--  else
--    fetch_register (regcache, tid, regno);
--}
--
--/* Store registers back into the inferior.  Store all registers if
--   regno == -1, otherwise store all general registers or all floating
--   point registers depending upon the value of regno.  */
--
--static void
--microblaze_linux_store_inferior_registers (struct target_ops *ops,
--                                   struct regcache *regcache, int regno)
-+void
-+microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno)
- {
--  /* Get the thread id for the ptrace call.  */
--  int tid = GET_THREAD_ID (inferior_ptid);
-+  pid_t tid = get_ptrace_pid (regcache->ptid ());
- 
-   if (regno >= 0)
-     store_register (regcache, tid, regno);
-@@ -373,59 +343,44 @@ microblaze_linux_store_inferior_registers (struct target_ops *ops,
-    thread debugging.  */
- 
- void
--fill_gregset (const struct regcache *regcache,
--             gdb_gregset_t *gregsetp, int regno)
-+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
- {
--  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
-+  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
- }
- 
- void
--supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
-+fill_gregset (const struct regcache *regcache,
-+             gdb_gregset_t *gregsetp, int regno)
- {
--  microblaze_supply_gregset (NULL, regcache, -1, gregsetp);
-+  microblaze_collect_gregset (NULL, regcache, regno, gregsetp);
- }
- 
- void
--fill_fpregset (const struct regcache *regcache,
--             gdb_fpregset_t *fpregsetp, int regno)
-+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
- {
-   /* FIXME. */
-+  return;
- }
- 
- void
--supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
-+fill_fpregset (const struct regcache *regcache,
-+             gdb_fpregset_t *fpregsetp, int regno)
- {
-   /* FIXME. */
-+  return;
- }
- 
--static const struct target_desc *
--microblaze_linux_read_description (struct target_ops *ops)
-+const struct target_desc *
-+microblaze_linux_nat_target::read_description ()
- {
--  CORE_ADDR microblaze_hwcap = 0;
--
--  if (target_auxv_search (ops, AT_HWCAP, &microblaze_hwcap) != 1)
--    return NULL;
--
-   return NULL;
- }
- 
--
--void _initialize_microblaze_linux_nat (void);
--
- void
- _initialize_microblaze_linux_nat (void)
- {
--  struct target_ops *t;
--
--  /* Fill in the generic GNU/Linux methods.  */
--  t = linux_target ();
--
--  /* Add our register access methods.  */
--  t->to_fetch_registers = microblaze_linux_fetch_inferior_registers;
--  t->to_store_registers = microblaze_linux_store_inferior_registers;
--
--  t->to_read_description = microblaze_linux_read_description;
-+  linux_target = &the_microblaze_linux_nat_target;
- 
-   /* Register the target.  */
--  linux_nat_add_target (t);
-+  add_inf_child_target (linux_target);
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 7a0c2527f4..23deb24d26 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -657,7 +657,7 @@ static std::vector<CORE_ADDR>
- microblaze_software_single_step (struct regcache *regcache)
- {
- //  struct gdbarch *arch = get_frame_arch(frame);
--  struct gdbarch *arch = get_regcache_arch (regcache);
-+  struct gdbarch *arch = regcache->arch();
-   struct address_space *aspace = get_regcache_aspace (regcache);
- //  struct address_space *aspace = get_frame_address_space (frame);
-   struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-@@ -876,7 +876,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
- static void
- make_regs (struct gdbarch *arch)
- {
--  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
-   int mach = gdbarch_bfd_arch_info (arch)->mach;
-   
-   if (mach == bfd_mach_microblaze64)
--- 
-2.17.1
-