summaryrefslogtreecommitdiffstats
path: root/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
diff options
context:
space:
mode:
authorMark Hatle <mark.hatle@kernel.crashing.org>2020-08-13 15:25:54 -0500
committerMark Hatle <mark.hatle@kernel.crashing.org>2020-08-14 11:56:34 -0500
commit276f2a014483170cfbcbf391c6350426e0a19fdc (patch)
treeb68a8b36c7d5df81fa6adff396e1f255715dc0b2 /meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
parent559d46390c65d34c14b56a7f8690b1ac705430ac (diff)
downloadmeta-xilinx-276f2a014483170cfbcbf391c6350426e0a19fdc.tar.gz
meta-microblaze: toolchains
Resync the microblaze toolchain items to match the latest YP master version. binutils and gdb are based on the same patch set, but the release version are based on slightly different sources, thus the patches are a bit different. Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
Diffstat (limited to 'meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch')
-rw-r--r--meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch65
1 files changed, 0 insertions, 65 deletions
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
deleted file mode 100644
index 4b85d7c9..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ /dev/null
@@ -1,65 +0,0 @@
1From f1cb2126c751d6c2526ea969918d5b51dd5b851f Mon Sep 17 00:00:00 2001
2From: David Holsgrove <david.holsgrove@xilinx.com>
3Date: Wed, 8 May 2013 11:03:36 +1000
4Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns
5
6Added two new instructions, wdc.ext.clear and wdc.ext.flush,
7to enable MicroBlaze to flush an external cache, which is
8used with the new coherency support for multiprocessing.
9
10Signed-off-by:nagaraju <nmekala@xilix.com>
11Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
12---
13 opcodes/microblaze-opc.h | 5 ++++-
14 opcodes/microblaze-opcm.h | 4 ++--
15 2 files changed, 6 insertions(+), 3 deletions(-)
16
17diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
18index 62ee3c9a4d..865151f95b 100644
19--- a/opcodes/microblaze-opc.h
20+++ b/opcodes/microblaze-opc.h
21@@ -91,6 +91,7 @@
22 #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */
23 #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */
24 #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */
25+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */
26 #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */
27
28 /* New Mask for msrset, msrclr insns. */
29@@ -101,7 +102,7 @@
30 #define DELAY_SLOT 1
31 #define NO_DELAY_SLOT 0
32
33-#define MAX_OPCODES 289
34+#define MAX_OPCODES 291
35
36 struct op_code_struct
37 {
38@@ -174,7 +175,9 @@ struct op_code_struct
39 {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst },
40 {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst },
41 {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst },
42+ {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
43 {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
44+ {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
45 {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
46 {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
47 {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
48diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
49index 5a2d3b0c8b..42f3dd3be5 100644
50--- a/opcodes/microblaze-opcm.h
51+++ b/opcodes/microblaze-opcm.h
52@@ -33,8 +33,8 @@ enum microblaze_instr
53 /* 'or/and/xor' are C++ keywords. */
54 microblaze_or, microblaze_and, microblaze_xor,
55 andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
56- wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd,
57- brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
58+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br,
59+ brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
60 bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
61 imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
62 brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
63--
642.17.1
65