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authorMark Hatle <mark.hatle@kernel.crashing.org>2020-08-13 15:25:54 -0500
committerMark Hatle <mark.hatle@kernel.crashing.org>2020-08-14 11:56:34 -0500
commit276f2a014483170cfbcbf391c6350426e0a19fdc (patch)
treeb68a8b36c7d5df81fa6adff396e1f255715dc0b2 /meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
parent559d46390c65d34c14b56a7f8690b1ac705430ac (diff)
downloadmeta-xilinx-276f2a014483170cfbcbf391c6350426e0a19fdc.tar.gz
meta-microblaze: toolchains
Resync the microblaze toolchain items to match the latest YP master version. binutils and gdb are based on the same patch set, but the release version are based on slightly different sources, thus the patches are a bit different. Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
Diffstat (limited to 'meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch')
-rw-r--r--meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch202
1 files changed, 73 insertions, 129 deletions
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
index 0c3da95a..06a8f70a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
@@ -1,32 +1,32 @@
1From bcd4263219c9756b9c1c1df64c6fef1311057fac Mon Sep 17 00:00:00 2001 1From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001
2From: Nagaraju Mekala <nmekala@xilix.com> 2From: Nagaraju Mekala <nmekala@xilix.com>
3Date: Sun, 30 Sep 2018 16:31:26 +0530 3Date: Sun, 30 Sep 2018 16:31:26 +0530
4Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed. 4Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
5 5
6--- 6---
7 bfd/bfd-in2.h | 10 +++ 7 bfd/bfd-in2.h | 10 +++
8 bfd/elf32-microblaze.c | 65 +++++++++++++++- 8 bfd/elf32-microblaze.c | 63 +++++++++++++++++-
9 bfd/elf64-microblaze.c | 61 ++++++++++++++- 9 bfd/elf64-microblaze.c | 59 +++++++++++++++++
10 bfd/libbfd.h | 2 + 10 bfd/libbfd.h | 2 +
11 bfd/reloc.c | 12 +++ 11 bfd/reloc.c | 12 ++++
12 gas/config/tc-microblaze.c | 152 ++++++++++++++++++++++++++++++------- 12 gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++----------
13 include/elf/microblaze.h | 2 + 13 include/elf/microblaze.h | 2 +
14 opcodes/microblaze-opc.h | 4 +- 14 opcodes/microblaze-opc.h | 4 +-
15 opcodes/microblaze-opcm.h | 4 +- 15 opcodes/microblaze-opcm.h | 4 +-
16 9 files changed, 277 insertions(+), 35 deletions(-) 16 9 files changed, 243 insertions(+), 40 deletions(-)
17 17
18diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h 18diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
19index 721531886a..4f777059d8 100644 19index 3fdbf8ed755..c55092c9ec7 100644
20--- a/bfd/bfd-in2.h 20--- a/bfd/bfd-in2.h
21+++ b/bfd/bfd-in2.h 21+++ b/bfd/bfd-in2.h
22@@ -5876,11 +5876,21 @@ done here - only used for relaxing */ 22@@ -5438,11 +5438,21 @@ value in two words (with an imm instruction). No relocation is
23 * +done here - only used for relaxing */ 23 done here - only used for relaxing */
24 BFD_RELOC_MICROBLAZE_64_NONE, 24 BFD_RELOC_MICROBLAZE_64_NONE,
25 25
26+/* This is a 64 bit reloc that stores the 32 bit pc relative 26+/* This is a 64 bit reloc that stores the 32 bit pc relative
27+ * +value in two words (with an imml instruction). No relocation is 27+value in two words (with an imml instruction). No relocation is
28+ * +done here - only used for relaxing */ 28+done here - only used for relaxing */
29+ BFD_RELOC_MICROBLAZE_64, 29+ BFD_RELOC_MICROBLAZE_64,
30+ 30+
31 /* This is a 64 bit reloc that stores the 32 bit pc relative 31 /* This is a 64 bit reloc that stores the 32 bit pc relative
32 value in two words (with an imm instruction). The relocation is 32 value in two words (with an imm instruction). The relocation is
@@ -42,7 +42,7 @@ index 721531886a..4f777059d8 100644
42 value in two words (with an imm instruction). The relocation is 42 value in two words (with an imm instruction). The relocation is
43 GOT offset */ 43 GOT offset */
44diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c 44diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
45index d001437b3f..035e71f311 100644 45index cf4a7fdba33..e1a66f57e79 100644
46--- a/bfd/elf32-microblaze.c 46--- a/bfd/elf32-microblaze.c
47+++ b/bfd/elf32-microblaze.c 47+++ b/bfd/elf32-microblaze.c
48@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 48@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -68,7 +68,7 @@ index d001437b3f..035e71f311 100644
68 0, /* Rightshift. */ 68 0, /* Rightshift. */
69@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 69@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
70 0x0000ffff, /* Dest Mask. */ 70 0x0000ffff, /* Dest Mask. */
71 TRUE), /* PC relative offset? */ 71 TRUE), /* PC relative offset? */
72 72
73+ /* A 64 bit GOTPC relocation. Table-entry not really used. */ 73+ /* A 64 bit GOTPC relocation. Table-entry not really used. */
74+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ 74+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */
@@ -104,23 +104,14 @@ index d001437b3f..035e71f311 100644
104 case BFD_RELOC_MICROBLAZE_64_GOT: 104 case BFD_RELOC_MICROBLAZE_64_GOT:
105 microblaze_reloc = R_MICROBLAZE_GOT_64; 105 microblaze_reloc = R_MICROBLAZE_GOT_64;
106 break; 106 break;
107@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, 107@@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd,
108 if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
109 {
110 relocation += addend;
111- if (r_type == R_MICROBLAZE_32)
112+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
113 bfd_put_32 (input_bfd, relocation, contents + offset);
114 else
115 {
116@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
117 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); 108 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
118 } 109 }
119 break; 110 break;
120+ case R_MICROBLAZE_IMML_64: 111+ case R_MICROBLAZE_IMML_64:
121+ { 112+ {
122+ /* This was a PC-relative instruction that was 113+ /* This was a PC-relative instruction that was
123+ completely resolved. */ 114+ completely resolved. */
124+ int sfix, efix; 115+ int sfix, efix;
125+ unsigned int val; 116+ unsigned int val;
126+ bfd_vma target_address; 117+ bfd_vma target_address;
@@ -142,21 +133,21 @@ index d001437b3f..035e71f311 100644
142 case R_MICROBLAZE_NONE: 133 case R_MICROBLAZE_NONE:
143 case R_MICROBLAZE_32_NONE: 134 case R_MICROBLAZE_32_NONE:
144 { 135 {
145@@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd, 136@@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd,
146 microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, 137 microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
147 irelscan->r_addend); 138 irelscan->r_addend);
148 } 139 }
149- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) 140- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
150- { 141- {
151- isym = isymbuf + ELF32_R_SYM (irelscan->r_info); 142- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
152+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) 143+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
153+ { 144+ {
154+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); 145+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
155 146
156 /* Look at the reloc only if the value has been resolved. */ 147 /* Look at the reloc only if the value has been resolved. */
157 if (isym->st_shndx == shndx 148 if (isym->st_shndx == shndx
158diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c 149diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
159index 0f43ae6ea8..56a45f2a05 100644 150index fa4b95e47e0..d55700fc513 100644
160--- a/bfd/elf64-microblaze.c 151--- a/bfd/elf64-microblaze.c
161+++ b/bfd/elf64-microblaze.c 152+++ b/bfd/elf64-microblaze.c
162@@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 153@@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -219,7 +210,7 @@ index 0f43ae6ea8..56a45f2a05 100644
219 case BFD_RELOC_MICROBLAZE_64_GOT: 210 case BFD_RELOC_MICROBLAZE_64_GOT:
220 microblaze_reloc = R_MICROBLAZE_GOT_64; 211 microblaze_reloc = R_MICROBLAZE_GOT_64;
221 break; 212 break;
222@@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, 213@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
223 break; /* Do nothing. */ 214 break; /* Do nothing. */
224 215
225 case (int) R_MICROBLAZE_GOTPC_64: 216 case (int) R_MICROBLAZE_GOTPC_64:
@@ -227,23 +218,14 @@ index 0f43ae6ea8..56a45f2a05 100644
227 relocation = htab->sgotplt->output_section->vma 218 relocation = htab->sgotplt->output_section->vma
228 + htab->sgotplt->output_offset; 219 + htab->sgotplt->output_offset;
229 relocation -= (input_section->output_section->vma 220 relocation -= (input_section->output_section->vma
230@@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, 221@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
231 if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
232 {
233 relocation += addend;
234- if (r_type == R_MICROBLAZE_32)
235+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
236 bfd_put_32 (input_bfd, relocation, contents + offset);
237 else
238 {
239@@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd,
240 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); 222 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
241 } 223 }
242 break; 224 break;
243+ case R_MICROBLAZE_IMML_64: 225+ case R_MICROBLAZE_IMML_64:
244+ { 226+ {
245+ /* This was a PC-relative instruction that was 227+ /* This was a PC-relative instruction that was
246+ completely resolved. */ 228+ completely resolved. */
247+ int sfix, efix; 229+ int sfix, efix;
248+ unsigned int val; 230+ unsigned int val;
249+ bfd_vma target_address; 231+ bfd_vma target_address;
@@ -266,10 +248,10 @@ index 0f43ae6ea8..56a45f2a05 100644
266 case R_MICROBLAZE_32_NONE: 248 case R_MICROBLAZE_32_NONE:
267 { 249 {
268diff --git a/bfd/libbfd.h b/bfd/libbfd.h 250diff --git a/bfd/libbfd.h b/bfd/libbfd.h
269index feb9fada1e..450653f2d8 100644 251index c1551b92405..b4aace6a70d 100644
270--- a/bfd/libbfd.h 252--- a/bfd/libbfd.h
271+++ b/bfd/libbfd.h 253+++ b/bfd/libbfd.h
272@@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", 254@@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
273 "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", 255 "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
274 "BFD_RELOC_MICROBLAZE_32_NONE", 256 "BFD_RELOC_MICROBLAZE_32_NONE",
275 "BFD_RELOC_MICROBLAZE_64_NONE", 257 "BFD_RELOC_MICROBLAZE_64_NONE",
@@ -280,10 +262,10 @@ index feb9fada1e..450653f2d8 100644
280 "BFD_RELOC_MICROBLAZE_64_PLT", 262 "BFD_RELOC_MICROBLAZE_64_PLT",
281 "BFD_RELOC_MICROBLAZE_64_GOTOFF", 263 "BFD_RELOC_MICROBLAZE_64_GOTOFF",
282diff --git a/bfd/reloc.c b/bfd/reloc.c 264diff --git a/bfd/reloc.c b/bfd/reloc.c
283index 87753ae4f0..ccf29f54cf 100644 265index 9b39b419415..0e8a24e9cb0 100644
284--- a/bfd/reloc.c 266--- a/bfd/reloc.c
285+++ b/bfd/reloc.c 267+++ b/bfd/reloc.c
286@@ -6803,12 +6803,24 @@ ENUMDOC 268@@ -6866,12 +6866,24 @@ ENUMDOC
287 done here - only used for relaxing 269 done here - only used for relaxing
288 ENUM 270 ENUM
289 BFD_RELOC_MICROBLAZE_64_NONE 271 BFD_RELOC_MICROBLAZE_64_NONE
@@ -309,7 +291,7 @@ index 87753ae4f0..ccf29f54cf 100644
309 This is a 64 bit reloc that stores the 32 bit pc relative 291 This is a 64 bit reloc that stores the 32 bit pc relative
310 value in two words (with an imm instruction). The relocation is 292 value in two words (with an imm instruction). The relocation is
311diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c 293diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
312index c79434785a..3f90b7c892 100644 294index ffbb843d33e..b8250e4cded 100644
313--- a/gas/config/tc-microblaze.c 295--- a/gas/config/tc-microblaze.c
314+++ b/gas/config/tc-microblaze.c 296+++ b/gas/config/tc-microblaze.c
315@@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; 297@@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -320,16 +302,17 @@ index c79434785a..3f90b7c892 100644
320 302
321 /* Initialize the relax table. */ 303 /* Initialize the relax table. */
322 const relax_typeS md_relax_table[] = 304 const relax_typeS md_relax_table[] =
323@@ -117,6 +118,8 @@ const relax_typeS md_relax_table[] = 305@@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] =
306 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */
324 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ 307 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */
325 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ 308 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */
326 { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ 309- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */
327+// { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ 310+ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */
328+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */ 311+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */
329 }; 312 };
330 313
331 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ 314 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */
332@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] = 315@@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] =
333 {"data32", cons, 4}, /* Same as word. */ 316 {"data32", cons, 4}, /* Same as word. */
334 {"ent", s_func, 0}, /* Treat ent as function entry point. */ 317 {"ent", s_func, 0}, /* Treat ent as function entry point. */
335 {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ 318 {"end", microblaze_s_func, 1}, /* Treat end as function end point. */
@@ -339,7 +322,7 @@ index c79434785a..3f90b7c892 100644
339 {"weakext", microblaze_s_weakext, 0}, 322 {"weakext", microblaze_s_weakext, 0},
340 {"rodata", microblaze_s_rdata, 0}, 323 {"rodata", microblaze_s_rdata, 0},
341 {"sdata2", microblaze_s_rdata, 1}, 324 {"sdata2", microblaze_s_rdata, 1},
342@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] = 325@@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] =
343 {"sbss", microblaze_s_bss, 1}, 326 {"sbss", microblaze_s_bss, 1},
344 {"text", microblaze_s_text, 0}, 327 {"text", microblaze_s_text, 0},
345 {"word", cons, 4}, 328 {"word", cons, 4},
@@ -347,7 +330,7 @@ index c79434785a..3f90b7c892 100644
347 {"frame", s_ignore, 0}, 330 {"frame", s_ignore, 0},
348 {"mask", s_ignore, 0}, /* Emitted by gcc. */ 331 {"mask", s_ignore, 0}, /* Emitted by gcc. */
349 {NULL, NULL, 0} 332 {NULL, NULL, 0}
350@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len) 333@@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len)
351 extern bfd_reloc_code_real_type 334 extern bfd_reloc_code_real_type
352 parse_cons_expression_microblaze (expressionS *exp, int size) 335 parse_cons_expression_microblaze (expressionS *exp, int size)
353 { 336 {
@@ -356,7 +339,7 @@ index c79434785a..3f90b7c892 100644
356 { 339 {
357 /* Handle @GOTOFF et.al. */ 340 /* Handle @GOTOFF et.al. */
358 char *save, *gotfree_copy; 341 char *save, *gotfree_copy;
359@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) 342@@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
360 343
361 static const char * str_microblaze_ro_anchor = "RO"; 344 static const char * str_microblaze_ro_anchor = "RO";
362 static const char * str_microblaze_rw_anchor = "RW"; 345 static const char * str_microblaze_rw_anchor = "RW";
@@ -364,41 +347,7 @@ index c79434785a..3f90b7c892 100644
364 347
365 static bfd_boolean 348 static bfd_boolean
366 check_spl_reg (unsigned * reg) 349 check_spl_reg (unsigned * reg)
367@@ -1174,6 +1180,33 @@ md_assemble (char * str) 350@@ -1926,6 +1931,7 @@ md_assemble (char * str)
368 inst |= (immed << IMM_LOW) & IMM_MASK;
369 }
370 }
371+#if 0 //revisit
372+ else if (streq (name, "lli") || streq (name, "sli"))
373+ {
374+ temp = immed & 0xFFFFFFFFFFFF8000;
375+ if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
376+ {
377+ /* Needs an immediate inst. */
378+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
379+ if (opcode1 == NULL)
380+ {
381+ as_bad (_("unknown opcode \"%s\""), "imml");
382+ return;
383+ }
384+
385+ inst1 = opcode1->bit_sequence;
386+ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
387+ output[0] = INST_BYTE0 (inst1);
388+ output[1] = INST_BYTE1 (inst1);
389+ output[2] = INST_BYTE2 (inst1);
390+ output[3] = INST_BYTE3 (inst1);
391+ output = frag_more (isize);
392+ }
393+ inst |= (reg1 << RD_LOW) & RD_MASK;
394+ inst |= (reg2 << RA_LOW) & RA_MASK;
395+ inst |= (immed << IMM_LOW) & IMM_MASK;
396+ }
397+#endif
398 else
399 {
400 temp = immed & 0xFFFF8000;
401@@ -1926,6 +1959,7 @@ md_assemble (char * str)
402 if (exp.X_op != O_constant) 351 if (exp.X_op != O_constant)
403 { 352 {
404 char *opc = NULL; 353 char *opc = NULL;
@@ -406,7 +355,7 @@ index c79434785a..3f90b7c892 100644
406 relax_substateT subtype; 355 relax_substateT subtype;
407 356
408 if (exp.X_md != 0) 357 if (exp.X_md != 0)
409@@ -1939,7 +1973,7 @@ md_assemble (char * str) 358@@ -1939,7 +1945,7 @@ md_assemble (char * str)
410 subtype, /* PC-relative or not. */ 359 subtype, /* PC-relative or not. */
411 exp.X_add_symbol, 360 exp.X_add_symbol,
412 exp.X_add_number, 361 exp.X_add_number,
@@ -415,7 +364,7 @@ index c79434785a..3f90b7c892 100644
415 immedl = 0L; 364 immedl = 0L;
416 } 365 }
417 else 366 else
418@@ -1977,7 +2011,7 @@ md_assemble (char * str) 367@@ -1977,7 +1983,7 @@ md_assemble (char * str)
419 reg1 = 0; 368 reg1 = 0;
420 } 369 }
421 if (strcmp (op_end, "")) 370 if (strcmp (op_end, ""))
@@ -424,17 +373,17 @@ index c79434785a..3f90b7c892 100644
424 else 373 else
425 as_fatal (_("Error in statement syntax")); 374 as_fatal (_("Error in statement syntax"));
426 375
427@@ -1987,7 +2021,8 @@ md_assemble (char * str) 376@@ -1987,7 +1993,8 @@ md_assemble (char * str)
428 377
429 if (exp.X_op != O_constant) 378 if (exp.X_op != O_constant)
430 { 379 {
431- char *opc = NULL; 380- char *opc = NULL;
432+ //char *opc = NULL; 381+ //char *opc = NULL;
433+ char *opc = str_microblaze_64; 382+ char *opc = strdup(str_microblaze_64);
434 relax_substateT subtype; 383 relax_substateT subtype;
435 384
436 if (exp.X_md != 0) 385 if (exp.X_md != 0)
437@@ -2001,14 +2036,13 @@ md_assemble (char * str) 386@@ -2001,14 +2008,13 @@ md_assemble (char * str)
438 subtype, /* PC-relative or not. */ 387 subtype, /* PC-relative or not. */
439 exp.X_add_symbol, 388 exp.X_add_symbol,
440 exp.X_add_number, 389 exp.X_add_number,
@@ -450,7 +399,7 @@ index c79434785a..3f90b7c892 100644
450 opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); 399 opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
451 if (opcode1 == NULL) 400 if (opcode1 == NULL)
452 { 401 {
453@@ -2187,13 +2221,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 402@@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
454 fragP->fr_fix += INST_WORD_SIZE * 2; 403 fragP->fr_fix += INST_WORD_SIZE * 2;
455 fragP->fr_var = 0; 404 fragP->fr_var = 0;
456 break; 405 break;
@@ -475,7 +424,7 @@ index c79434785a..3f90b7c892 100644
475 fragP->fr_fix += INST_WORD_SIZE * 2; 424 fragP->fr_fix += INST_WORD_SIZE * 2;
476 fragP->fr_var = 0; 425 fragP->fr_var = 0;
477 break; 426 break;
478@@ -2416,22 +2460,38 @@ md_apply_fix (fixS * fixP, 427@@ -2412,22 +2428,38 @@ md_apply_fix (fixS * fixP,
479 case BFD_RELOC_64_PCREL: 428 case BFD_RELOC_64_PCREL:
480 case BFD_RELOC_64: 429 case BFD_RELOC_64:
481 case BFD_RELOC_MICROBLAZE_64_TEXTREL: 430 case BFD_RELOC_MICROBLAZE_64_TEXTREL:
@@ -526,7 +475,7 @@ index c79434785a..3f90b7c892 100644
526 buf[0] = INST_BYTE0 (inst1); 475 buf[0] = INST_BYTE0 (inst1);
527 buf[1] = INST_BYTE1 (inst1); 476 buf[1] = INST_BYTE1 (inst1);
528 buf[2] = INST_BYTE2 (inst1); 477 buf[2] = INST_BYTE2 (inst1);
529@@ -2460,6 +2520,7 @@ md_apply_fix (fixS * fixP, 478@@ -2456,6 +2488,7 @@ md_apply_fix (fixS * fixP,
530 /* Fall through. */ 479 /* Fall through. */
531 480
532 case BFD_RELOC_MICROBLAZE_64_GOTPC: 481 case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -534,7 +483,7 @@ index c79434785a..3f90b7c892 100644
534 case BFD_RELOC_MICROBLAZE_64_GOT: 483 case BFD_RELOC_MICROBLAZE_64_GOT:
535 case BFD_RELOC_MICROBLAZE_64_PLT: 484 case BFD_RELOC_MICROBLAZE_64_PLT:
536 case BFD_RELOC_MICROBLAZE_64_GOTOFF: 485 case BFD_RELOC_MICROBLAZE_64_GOTOFF:
537@@ -2467,12 +2528,16 @@ md_apply_fix (fixS * fixP, 486@@ -2463,12 +2496,16 @@ md_apply_fix (fixS * fixP,
538 /* Add an imm instruction. First save the current instruction. */ 487 /* Add an imm instruction. First save the current instruction. */
539 for (i = 0; i < INST_WORD_SIZE; i++) 488 for (i = 0; i < INST_WORD_SIZE; i++)
540 buf[i + INST_WORD_SIZE] = buf[i]; 489 buf[i + INST_WORD_SIZE] = buf[i];
@@ -555,22 +504,27 @@ index c79434785a..3f90b7c892 100644
555 return; 504 return;
556 } 505 }
557 506
558@@ -2496,6 +2561,8 @@ md_apply_fix (fixS * fixP, 507@@ -2490,7 +2527,7 @@ md_apply_fix (fixS * fixP,
508 {
509 /* This fixup has been resolved. Create a reloc in case the linker
559 moves code around due to relaxing. */ 510 moves code around due to relaxing. */
560 if (fixP->fx_r_type == BFD_RELOC_64_PCREL) 511- if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
561 fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
562+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) 512+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
563+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; 513 fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
564 else if (fixP->fx_r_type == BFD_RELOC_32) 514 else if (fixP->fx_r_type == BFD_RELOC_32)
565 fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; 515 fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
566 else 516@@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP,
567@@ -2539,6 +2606,32 @@ md_estimate_size_before_relax (fragS * fragP,
568 as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); 517 as_bad (_("Absolute PC-relative value in relaxation code. Assembler error....."));
569 abort (); 518 abort ();
570 } 519 }
520- else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
521- !S_IS_WEAK (fragP->fr_symbol))
571+ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type 522+ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
572+ && !S_IS_WEAK (fragP->fr_symbol)) 523+ && !S_IS_WEAK (fragP->fr_symbol))
573+ { 524 {
525- fragP->fr_subtype = DEFINED_PC_OFFSET;
526- /* Don't know now whether we need an imm instruction. */
527- fragP->fr_var = INST_WORD_SIZE;
574+ if (fragP->fr_opcode != NULL) { 528+ if (fragP->fr_opcode != NULL) {
575+ if(streq (fragP->fr_opcode, str_microblaze_64)) 529+ if(streq (fragP->fr_opcode, str_microblaze_64))
576+ { 530+ {
@@ -592,20 +546,10 @@ index c79434785a..3f90b7c892 100644
592+ /* Don't know now whether we need an imm instruction. */ 546+ /* Don't know now whether we need an imm instruction. */
593+ fragP->fr_var = INST_WORD_SIZE; 547+ fragP->fr_var = INST_WORD_SIZE;
594+ } 548+ }
595+ }
596+ #if 0
597 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
598 !S_IS_WEAK (fragP->fr_symbol))
599 {
600@@ -2546,6 +2639,7 @@ md_estimate_size_before_relax (fragS * fragP,
601 /* Don't know now whether we need an imm instruction. */
602 fragP->fr_var = INST_WORD_SIZE;
603 } 549 }
604+#endif
605 else if (S_IS_DEFINED (fragP->fr_symbol) 550 else if (S_IS_DEFINED (fragP->fr_symbol)
606 && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) 551 && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
607 { 552@@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP,
608@@ -2648,6 +2742,7 @@ md_estimate_size_before_relax (fragS * fragP,
609 case TLSLD_OFFSET: 553 case TLSLD_OFFSET:
610 case TLSTPREL_OFFSET: 554 case TLSTPREL_OFFSET:
611 case TLSDTPREL_OFFSET: 555 case TLSDTPREL_OFFSET:
@@ -613,16 +557,16 @@ index c79434785a..3f90b7c892 100644
613 fragP->fr_var = INST_WORD_SIZE*2; 557 fragP->fr_var = INST_WORD_SIZE*2;
614 break; 558 break;
615 case DEFINED_RO_SEGMENT: 559 case DEFINED_RO_SEGMENT:
616@@ -2701,7 +2796,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) 560@@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
617 else 561 else
618 { 562 {
619 /* The case where we are going to resolve things... */ 563 /* The case where we are going to resolve things... */
620- if (fixp->fx_r_type == BFD_RELOC_64_PCREL) 564- if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
621+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) 565+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
622 return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; 566 return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
623 else 567 else
624 return fixp->fx_where + fixp->fx_frag->fr_address; 568 return fixp->fx_where + fixp->fx_frag->fr_address;
625@@ -2734,6 +2829,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) 569@@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
626 case BFD_RELOC_MICROBLAZE_32_RWSDA: 570 case BFD_RELOC_MICROBLAZE_32_RWSDA:
627 case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: 571 case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
628 case BFD_RELOC_MICROBLAZE_64_GOTPC: 572 case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -631,7 +575,7 @@ index c79434785a..3f90b7c892 100644
631 case BFD_RELOC_MICROBLAZE_64_GOT: 575 case BFD_RELOC_MICROBLAZE_64_GOT:
632 case BFD_RELOC_MICROBLAZE_64_PLT: 576 case BFD_RELOC_MICROBLAZE_64_PLT:
633 case BFD_RELOC_MICROBLAZE_64_GOTOFF: 577 case BFD_RELOC_MICROBLAZE_64_GOTOFF:
634@@ -2876,7 +2973,10 @@ cons_fix_new_microblaze (fragS * frag, 578@@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag,
635 r = BFD_RELOC_32; 579 r = BFD_RELOC_32;
636 break; 580 break;
637 case 8: 581 case 8:
@@ -644,7 +588,7 @@ index c79434785a..3f90b7c892 100644
644 default: 588 default:
645 as_bad (_("unsupported BFD relocation size %u"), size); 589 as_bad (_("unsupported BFD relocation size %u"), size);
646diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h 590diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
647index 6ee0966444..16b2736577 100644 591index 55f34f72b0d..8576e55cb8a 100644
648--- a/include/elf/microblaze.h 592--- a/include/elf/microblaze.h
649+++ b/include/elf/microblaze.h 593+++ b/include/elf/microblaze.h
650@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) 594@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -653,11 +597,11 @@ index 6ee0966444..16b2736577 100644
653 RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) 597 RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
654+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) 598+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
655+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ 599+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */
656
657 END_RELOC_NUMBERS (R_MICROBLAZE_max) 600 END_RELOC_NUMBERS (R_MICROBLAZE_max)
658 601
602 /* Global base address names. */
659diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h 603diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
660index 985834b8df..9b6264b61c 100644 604index 61eaa39b3eb..f2139a6839b 100644
661--- a/opcodes/microblaze-opc.h 605--- a/opcodes/microblaze-opc.h
662+++ b/opcodes/microblaze-opc.h 606+++ b/opcodes/microblaze-opc.h
663@@ -538,8 +538,8 @@ struct op_code_struct 607@@ -538,8 +538,8 @@ struct op_code_struct
@@ -672,7 +616,7 @@ index 985834b8df..9b6264b61c 100644
672 {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, 616 {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
673 {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, 617 {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
674diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h 618diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
675index 076dbcd0b3..5f2e190d23 100644 619index 1dcd3dca3d1..ad8b8ce345b 100644
676--- a/opcodes/microblaze-opcm.h 620--- a/opcodes/microblaze-opcm.h
677+++ b/opcodes/microblaze-opcm.h 621+++ b/opcodes/microblaze-opcm.h
678@@ -40,8 +40,8 @@ enum microblaze_instr 622@@ -40,8 +40,8 @@ enum microblaze_instr
@@ -680,9 +624,9 @@ index 076dbcd0b3..5f2e190d23 100644
680 brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, 624 brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
681 bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, 625 bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
682- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, 626- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
683- sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, 627- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
684+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, 628+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
685+ sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, 629+ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
686 fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, 630 fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
687 fint, fsqrt, 631 fint, fsqrt,
688 tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, 632 tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,