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author | Adrian Dudau <adrian.dudau@enea.com> | 2014-06-26 14:29:42 +0200 |
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committer | Adrian Dudau <adrian.dudau@enea.com> | 2014-06-26 14:29:42 +0200 |
commit | 99ac0639fff61cbdcfe58668eb9b0083d624504f (patch) | |
tree | f9142a48899bace9dda4f48c80e9a6f4b123c504 /conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h | |
download | meta-xilinx-99ac0639fff61cbdcfe58668eb9b0083d624504f.tar.gz |
initial commit for Enea Linux 4.0
Migrated from the internal git server on the daisy-enea branch
Signed-off-by: Adrian Dudau <adrian.dudau@enea.com>
Diffstat (limited to 'conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h')
-rw-r--r-- | conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h b/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h new file mode 100644 index 00000000..994a26e6 --- /dev/null +++ b/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h | |||
@@ -0,0 +1,48 @@ | |||
1 | /* Microblaze is microblaze_0 */ | ||
2 | #define XILINX_USE_MSR_INSTR 1 | ||
3 | #define XILINX_PVR 2 | ||
4 | #define XILINX_FSL_NUMBER 0 | ||
5 | #define XILINX_USE_ICACHE 1 | ||
6 | #define XILINX_USE_DCACHE 1 | ||
7 | #define XILINX_DCACHE_BYTE_SIZE 8192 | ||
8 | |||
9 | /* Interrupt controller is interrupt_cntlr */ | ||
10 | #define XILINX_INTC_BASEADDR 0x40100000 | ||
11 | #define XILINX_INTC_NUM_INTR_INPUTS 8 | ||
12 | |||
13 | /* Timer pheriphery is dual_timer_counter */ | ||
14 | #define XILINX_TIMER_BASEADDR 0x40300000 | ||
15 | #define XILINX_TIMER_IRQ 3 | ||
16 | |||
17 | /* System Timer Clock Frequency */ | ||
18 | #define XILINX_CLOCK_FREQ 100000000 | ||
19 | |||
20 | /* Uart console is rs232_uart_1 */ | ||
21 | #define XILINX_UART16550 | ||
22 | #define XILINX_UART16550_BASEADDR 0x40400000 | ||
23 | #define XILINX_UART16550_CLOCK_HZ 100000000 | ||
24 | #define XILINX_UARTLITE_BASEADDR 0x40200000 | ||
25 | #define CONFIG_CONS_INDEX 1 | ||
26 | |||
27 | /* IIC pheriphery is iic_eeprom */ | ||
28 | #define XILINX_IIC_0_BASEADDR 0x40a00000 | ||
29 | #define XILINX_IIC_0_FREQ 100000 | ||
30 | #define XILINX_IIC_0_BIT 0 | ||
31 | |||
32 | /* GPIO doesn't exist */ | ||
33 | |||
34 | /* SDIO doesn't exist */ | ||
35 | |||
36 | /* Main Memory is ddr3_sdram */ | ||
37 | #define XILINX_RAM_START 0x80000000 | ||
38 | #define XILINX_RAM_SIZE 0x40000000 | ||
39 | |||
40 | /* Flash Memory is linear_flash */ | ||
41 | #define XILINX_FLASH_START 0x48000000 | ||
42 | #define XILINX_FLASH_SIZE 0x08000000 | ||
43 | |||
44 | /* Sysace doesn't exist */ | ||
45 | |||
46 | /* Ethernet controller is soft_ethernet_mac */ | ||
47 | #define XILINX_AXIEMAC_BASEADDR 0x50100000 | ||
48 | #define XILINX_AXIDMA_BASEADDR 0x50000000 | ||