diff options
author | Nathan Rossi <nathan@nathanrossi.com> | 2017-11-24 23:28:00 +1000 |
---|---|---|
committer | Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> | 2017-12-06 15:45:16 -0800 |
commit | b86a915ae0129ad699eaa9ce7e4929591e093bf6 (patch) | |
tree | ae59f9f13a5e2d82c48cb1b07555c44647927d50 | |
parent | 78b078f60900248b86155fdfcfd5a775cfa27b9f (diff) | |
download | meta-xilinx-b86a915ae0129ad699eaa9ce7e4929591e093bf6.tar.gz |
kc705-microblazeel: Updates to match v2017.3 bitstream
Update the device tree and machine configuration to match the updated
bitstream.
The bitstream was updated to v10.0 of the MicroBlaze core although
mainline GCC does not currently support v10.0+. Additionally the design
now enables divide-hard feature support. Memory and device addresses are
unchanged.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
5 files changed, 27 insertions, 36 deletions
diff --git a/conf/machine/kc705-microblazeel.conf b/conf/machine/kc705-microblazeel.conf index 39cb3c2b..658b75be 100644 --- a/conf/machine/kc705-microblazeel.conf +++ b/conf/machine/kc705-microblazeel.conf | |||
@@ -7,7 +7,7 @@ require conf/machine/include/tune-microblaze.inc | |||
7 | require conf/machine/include/machine-xilinx-default.inc | 7 | require conf/machine/include/machine-xilinx-default.inc |
8 | require conf/machine/include/machine-xilinx-board.inc | 8 | require conf/machine/include/machine-xilinx-board.inc |
9 | 9 | ||
10 | TUNE_FEATURES_tune-microblaze += "v9.6 barrel-shift pattern-compare multiply-high" | 10 | TUNE_FEATURES_tune-microblaze += "v10.0 barrel-shift reorder pattern-compare multiply-high divide-hard" |
11 | 11 | ||
12 | MACHINE_FEATURES = "" | 12 | MACHINE_FEATURES = "" |
13 | 13 | ||
@@ -18,6 +18,3 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" | |||
18 | 18 | ||
19 | EXTRA_IMAGEDEPENDS += "virtual/bitstream" | 19 | EXTRA_IMAGEDEPENDS += "virtual/bitstream" |
20 | 20 | ||
21 | PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" | ||
22 | PREFERRED_VERSION_u-boot-xlnx ?= "v2016.07-xilinx-v2016.4%" | ||
23 | |||
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts index af60db87..45e488c1 100644 --- a/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts +++ b/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts | |||
@@ -1,11 +1,20 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | /include/ "pl.dtsi" | ||
2 | /include/ "system-conf.dtsi" | 3 | /include/ "system-conf.dtsi" |
3 | / { | 4 | / { |
5 | hard-reset-gpios = <&reset_gpio 0 1>; | ||
6 | aliases { | ||
7 | ethernet0 = &axi_ethernet; | ||
8 | i2c0 = &iic_main; | ||
9 | serial0 = &rs232_uart; | ||
10 | }; | ||
11 | memory { | ||
12 | device_type = "memory"; | ||
13 | reg = <0x80000000 0x40000000>; | ||
14 | }; | ||
4 | }; | 15 | }; |
5 | 16 | ||
6 | &iic_main { | 17 | &iic_main { |
7 | #address-cells = <1>; | ||
8 | #size-cells = <0>; | ||
9 | i2cswitch@74 { | 18 | i2cswitch@74 { |
10 | compatible = "nxp,pca9548"; | 19 | compatible = "nxp,pca9548"; |
11 | #address-cells = <1>; | 20 | #address-cells = <1>; |
@@ -39,13 +48,9 @@ | |||
39 | &axi_ethernet { | 48 | &axi_ethernet { |
40 | phy-handle = <&phy0>; | 49 | phy-handle = <&phy0>; |
41 | axi_ethernet_mdio: mdio { | 50 | axi_ethernet_mdio: mdio { |
42 | #address-cells = <1>; | ||
43 | #size-cells = <0>; | ||
44 | phy0: phy@7 { | 51 | phy0: phy@7 { |
45 | compatible = "marvell,88e1111"; | ||
46 | device_type = "ethernet-phy"; | 52 | device_type = "ethernet-phy"; |
47 | reg = <7>; | 53 | reg = <7>; |
48 | } ; | 54 | }; |
49 | } ; | 55 | }; |
50 | }; | 56 | }; |
51 | |||
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi index 8f064671..43bc2ab7 100644 --- a/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi +++ b/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi | |||
@@ -1,10 +1,3 @@ | |||
1 | /* | ||
2 | * CAUTION: This file is automatically generated by Xilinx. | ||
3 | * Version: HSI 2016.3 | ||
4 | * Today is: Tue Sep 13 19:30:07 2016 | ||
5 | */ | ||
6 | |||
7 | |||
8 | / { | 1 | / { |
9 | #address-cells = <1>; | 2 | #address-cells = <1>; |
10 | #size-cells = <1>; | 3 | #size-cells = <1>; |
@@ -18,18 +11,18 @@ | |||
18 | bus-handle = <&amba_pl>; | 11 | bus-handle = <&amba_pl>; |
19 | clock-frequency = <200000000>; | 12 | clock-frequency = <200000000>; |
20 | clocks = <&clk_cpu>; | 13 | clocks = <&clk_cpu>; |
21 | compatible = "xlnx,microblaze-9.6"; | 14 | compatible = "xlnx,microblaze-10.0"; |
22 | d-cache-baseaddr = <0x0000000080000000>; | 15 | d-cache-baseaddr = <0x0000000080000000>; |
23 | d-cache-highaddr = <0x00000000bfffffff>; | 16 | d-cache-highaddr = <0x00000000bfffffff>; |
24 | d-cache-line-size = <0x20>; | 17 | d-cache-line-size = <0x20>; |
25 | d-cache-size = <0x4000>; | 18 | d-cache-size = <0x4000>; |
26 | device_type = "cpu"; | 19 | device_type = "cpu"; |
27 | i-cache-baseaddr = <0x0000000080000000>; | 20 | i-cache-baseaddr = <0x0000000080000000>; |
28 | i-cache-highaddr = <0x00000000BFFFFFFF>; | 21 | i-cache-highaddr = <0x00000000bfffffff>; |
29 | i-cache-line-size = <0x10>; | 22 | i-cache-line-size = <0x10>; |
30 | i-cache-size = <0x4000>; | 23 | i-cache-size = <0x4000>; |
31 | interrupt-handle = <µblaze_0_axi_intc>; | 24 | interrupt-handle = <µblaze_0_axi_intc>; |
32 | model = "microblaze,9.6"; | 25 | model = "microblaze,10.0"; |
33 | timebase-frequency = <200000000>; | 26 | timebase-frequency = <200000000>; |
34 | xlnx,addr-size = <0x20>; | 27 | xlnx,addr-size = <0x20>; |
35 | xlnx,addr-tag-bits = <0x10>; | 28 | xlnx,addr-tag-bits = <0x10>; |
@@ -63,6 +56,7 @@ | |||
63 | xlnx,debug-interface = <0x0>; | 56 | xlnx,debug-interface = <0x0>; |
64 | xlnx,debug-latency-counters = <0x1>; | 57 | xlnx,debug-latency-counters = <0x1>; |
65 | xlnx,debug-profile-size = <0x0>; | 58 | xlnx,debug-profile-size = <0x0>; |
59 | xlnx,debug-trace-async-reset = <0x0>; | ||
66 | xlnx,debug-trace-size = <0x2000>; | 60 | xlnx,debug-trace-size = <0x2000>; |
67 | xlnx,div-zero-exception = <0x1>; | 61 | xlnx,div-zero-exception = <0x1>; |
68 | xlnx,dp-axi-mon = <0x0>; | 62 | xlnx,dp-axi-mon = <0x0>; |
@@ -106,12 +100,14 @@ | |||
106 | xlnx,num-sync-ff-clk-debug = <0x2>; | 100 | xlnx,num-sync-ff-clk-debug = <0x2>; |
107 | xlnx,num-sync-ff-clk-irq = <0x1>; | 101 | xlnx,num-sync-ff-clk-irq = <0x1>; |
108 | xlnx,num-sync-ff-dbg-clk = <0x1>; | 102 | xlnx,num-sync-ff-dbg-clk = <0x1>; |
103 | xlnx,num-sync-ff-dbg-trace-clk = <0x2>; | ||
109 | xlnx,number-of-pc-brk = <0x1>; | 104 | xlnx,number-of-pc-brk = <0x1>; |
110 | xlnx,number-of-rd-addr-brk = <0x0>; | 105 | xlnx,number-of-rd-addr-brk = <0x0>; |
111 | xlnx,number-of-wr-addr-brk = <0x0>; | 106 | xlnx,number-of-wr-addr-brk = <0x0>; |
112 | xlnx,opcode-0x0-illegal = <0x1>; | 107 | xlnx,opcode-0x0-illegal = <0x1>; |
113 | xlnx,optimization = <0x0>; | 108 | xlnx,optimization = <0x0>; |
114 | xlnx,pc-width = <0x20>; | 109 | xlnx,pc-width = <0x20>; |
110 | xlnx,piaddr-size = <0x20>; | ||
115 | xlnx,pvr = <0x2>; | 111 | xlnx,pvr = <0x2>; |
116 | xlnx,pvr-user1 = <0x00>; | 112 | xlnx,pvr-user1 = <0x00>; |
117 | xlnx,pvr-user2 = <0x00000000>; | 113 | xlnx,pvr-user2 = <0x00000000>; |
@@ -181,11 +177,14 @@ | |||
181 | xlnx = <0x0>; | 177 | xlnx = <0x0>; |
182 | xlnx,axiliteclkrate = <0x0>; | 178 | xlnx,axiliteclkrate = <0x0>; |
183 | xlnx,axisclkrate = <0x0>; | 179 | xlnx,axisclkrate = <0x0>; |
180 | xlnx,clockselection = <0x0>; | ||
184 | xlnx,enableasyncsgmii = <0x0>; | 181 | xlnx,enableasyncsgmii = <0x0>; |
185 | xlnx,gt-type = <0x0>; | 182 | xlnx,gt-type = <0x0>; |
186 | xlnx,gtinex = <0x0>; | 183 | xlnx,gtinex = <0x0>; |
187 | xlnx,gtlocation = <0x0>; | 184 | xlnx,gtlocation = <0x0>; |
188 | xlnx,gtrefclksrc = <0x0>; | 185 | xlnx,gtrefclksrc = <0x0>; |
186 | xlnx,include-dre ; | ||
187 | xlnx,instantiatebitslice0 = <0x0>; | ||
189 | xlnx,phy-type = <0x1>; | 188 | xlnx,phy-type = <0x1>; |
190 | xlnx,phyaddr = <0x1>; | 189 | xlnx,phyaddr = <0x1>; |
191 | xlnx,rable = <0x0>; | 190 | xlnx,rable = <0x0>; |
@@ -193,7 +192,7 @@ | |||
193 | xlnx,rxlane0-placement = <0x0>; | 192 | xlnx,rxlane0-placement = <0x0>; |
194 | xlnx,rxlane1-placement = <0x0>; | 193 | xlnx,rxlane1-placement = <0x0>; |
195 | xlnx,rxmem = <0x1000>; | 194 | xlnx,rxmem = <0x1000>; |
196 | xlnx,rxnibblebitslice0used = <0x1>; | 195 | xlnx,rxnibblebitslice0used = <0x0>; |
197 | xlnx,tx-in-upper-nibble = <0x1>; | 196 | xlnx,tx-in-upper-nibble = <0x1>; |
198 | xlnx,txcsum = <0x0>; | 197 | xlnx,txcsum = <0x0>; |
199 | xlnx,txlane0-placement = <0x0>; | 198 | xlnx,txlane0-placement = <0x0>; |
@@ -214,6 +213,7 @@ | |||
214 | interrupt-parent = <µblaze_0_axi_intc>; | 213 | interrupt-parent = <µblaze_0_axi_intc>; |
215 | interrupts = <3 2 2 2>; | 214 | interrupts = <3 2 2 2>; |
216 | reg = <0x41e00000 0x10000>; | 215 | reg = <0x41e00000 0x10000>; |
216 | xlnx,include-dre ; | ||
217 | }; | 217 | }; |
218 | axi_timer_0: timer@41c00000 { | 218 | axi_timer_0: timer@41c00000 { |
219 | clock-frequency = <200000000>; | 219 | clock-frequency = <200000000>; |
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi index 2a824aec..09b26c6a 100644 --- a/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi +++ b/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi | |||
@@ -5,23 +5,12 @@ | |||
5 | 5 | ||
6 | 6 | ||
7 | / { | 7 | / { |
8 | model = "Xilinx-KC705-AXI-full-2016.3"; | ||
9 | hard-reset-gpios = <&reset_gpio 0 1>; | ||
10 | aliases { | ||
11 | serial0 = &rs232_uart; | ||
12 | ethernet0 = &axi_ethernet; | ||
13 | }; | ||
14 | chosen { | 8 | chosen { |
15 | bootargs = "console=ttyS0,115200 earlyprintk"; | 9 | bootargs = "console=ttyS0,115200 earlyprintk"; |
16 | stdout-path = "serial0:115200ns"; | 10 | stdout-path = "serial0:115200n8"; |
17 | }; | ||
18 | memory { | ||
19 | device_type = "memory"; | ||
20 | reg = <0x80000000 0x40000000>; | ||
21 | }; | 11 | }; |
22 | }; | 12 | }; |
23 | 13 | ||
24 | /include/ "pl.dtsi" | ||
25 | &axi_ethernet { | 14 | &axi_ethernet { |
26 | local-mac-address = [00 0a 35 00 22 01]; | 15 | local-mac-address = [00 0a 35 00 22 01]; |
27 | }; | 16 | }; |
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg index 48ea0a09..bf7f316a 100644 --- a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg +++ b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg | |||
@@ -7,7 +7,7 @@ CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 | |||
7 | CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 | 7 | CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 |
8 | CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2 | 8 | CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2 |
9 | CONFIG_XILINX_MICROBLAZE0_USE_FPU=0 | 9 | CONFIG_XILINX_MICROBLAZE0_USE_FPU=0 |
10 | CONFIG_XILINX_MICROBLAZE0_HW_VER="9.6" | 10 | CONFIG_XILINX_MICROBLAZE0_HW_VER="10.0" |
11 | 11 | ||
12 | # Memory Base Address | 12 | # Memory Base Address |
13 | CONFIG_KERNEL_BASE_ADDR=0x80000000 | 13 | CONFIG_KERNEL_BASE_ADDR=0x80000000 |