1 files changed, 69 insertions, 0 deletions

diff --git a/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0121-ARM-7398-1-l2x0-only-write-to-debug-registers-on-PL3.patch b/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0121-ARM-7398-1-l2x0-only-write-to-debug-registers-on-PL3.patch
new file mode 100644
index 00000000..ffd9e263
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0121-ARM-7398-1-l2x0-only-write-to-debug-registers-on-PL3.patch
@@ -0,0 +1,69 @@
+From a927ce0f8dd30f05ced7a71a5523ca5d82eab5d6 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 20 Apr 2012 17:22:11 +0100
+Subject: [PATCH 121/165] ARM: 7398/1: l2x0: only write to debug registers on
+ PL310
+
+commit ab4d536890853ab6675ede65db40e2c0980cb0ea upstream.
+
+PL310 errata #588369 and #727915 require writes to the debug registers
+of the cache controller to work around known problems. Writing these
+registers on L220 may cause deadlock, so ensure that we only perform
+this operation when we identify a PL310 at probe time.
+
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ arch/arm/mm/cache-l2x0.c |   13 ++++++++-----
+ 1 files changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
+index 971d527..db7bcc0 100644
+--- a/arch/arm/mm/cache-l2x0.c
++++ b/arch/arm/mm/cache-l2x0.c
+@@ -81,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)
+ }
+ 
+ #if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
++static inline void debug_writel(unsigned long val)
++{
++       if (outer_cache.set_debug)
++               outer_cache.set_debug(val);
++}
+ 
+-#define debug_writel(val)      outer_cache.set_debug(val)
+-
+-static void l2x0_set_debug(unsigned long val)
++static void pl310_set_debug(unsigned long val)
+ {
+        writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
+ }
+@@ -94,7 +97,7 @@ static inline void debug_writel(unsigned long val)
+ {
+ }
+ 
+-#define l2x0_set_debug NULL
++#define pl310_set_debug        NULL
+ #endif
+ 
+ #ifdef CONFIG_PL310_ERRATA_588369
+@@ -331,6 +334,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+                /* Unmapped register. */
+                sync_reg_offset = L2X0_DUMMY_REG;
+ #endif
++               outer_cache.set_debug = pl310_set_debug;
+                break;
+        case L2X0_CACHE_ID_PART_L210:
+                ways = (aux >> 13) & 0xf;
+@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+        outer_cache.flush_all = l2x0_flush_all;
+        outer_cache.inv_all = l2x0_inv_all;
+        outer_cache.disable = l2x0_disable;
+-       outer_cache.set_debug = l2x0_set_debug;
+ 
+        printk(KERN_INFO "%s cache controller enabled\n", type);
+        printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
+-- 
+1.7.7.6
+