53 files changed, 5073 insertions, 0 deletions
diff --git a/recipes-bsp/u-boot/u-boot.inc b/recipes-bsp/u-boot/u-boot.inc
new file mode 100644
index 00000000..9a9528ee
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot.inc
@@ -0,0 +1,67 @@
+DESCRIPTION = "U-Boot - the Universal Boot Loader"
+HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome"
+SECTION = "bootloaders"
+PRIORITY = "optional"
+LICENSE = "GPLv2"
+PROVIDES = "virtual/bootloader"
+DEPENDS = "mtd-utils"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+PARALLEL_MAKE=""
+EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
+UBOOT_MACHINE ?= "${MACHINE}_config"
+UBOOT_BINARY ?= "u-boot.bin"
+UBOOT_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.bin"
+UBOOT_SYMLINK ?= "u-boot-${MACHINE}.bin"
+do_configure () {
+        oe_runmake ${UBOOT_MACHINE}
+}
+do_compile () {
+        unset LDFLAGS
+        unset CFLAGS
+        unset CPPFLAGS
+        oe_runmake all
+        oe_runmake tools env
+}
+do_install () {
+        install -d ${D}/boot
+        install ${S}/${UBOOT_BINARY} ${D}/boot/${UBOOT_IMAGE}
+        ln -sf ${UBOOT_IMAGE} ${D}/boot/${UBOOT_BINARY}
+        if [ -e ${WORKDIR}/fw_env.config ] ; then
+            install -d ${D}${base_sbindir}
+                install -d ${D}${sysconfdir}
+                install -m 644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config
+                install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_printenv
+                install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_setenv
+        fi
+}
+FILES_${PN} = "/boot"
+# no gnu_hash in uboot.bin, by design, so skip QA
+INSANE_SKIP_${PN} = True
+PACKAGES += "${PN}-fw-utils"
+FILES_${PN}-fw-utils = "${sysconfdir} ${base_sbindir}"
+# u-boot doesn't use LDFLAGS for fw files, needs to get fixed, but until then:
+INSANE_SKIP_${PN}-fw-utils = True
+do_deploy () {
+        install -d ${DEPLOY_DIR_IMAGE}
+        install ${S}/${UBOOT_BINARY} ${DEPLOY_DIR_IMAGE}/${UBOOT_IMAGE}
+        package_stagefile_shell ${DEPLOY_DIR_IMAGE}/${UBOOT_IMAGE}
+        cd ${DEPLOY_DIR_IMAGE}
+        rm -f ${UBOOT_SYMLINK}
+        ln -sf ${UBOOT_IMAGE} ${UBOOT_SYMLINK}
+        package_stagefile_shell ${DEPLOY_DIR_IMAGE}/${UBOOT_SYMLINK}
+}
+do_deploy[dirs] = "${S}"
+addtask deploy before do_package_stage after do_compile
diff --git a/recipes-bsp/u-boot/u-boot/0001-BeagleBoard-move-ramdisk-parameters.patch b/recipes-bsp/u-boot/u-boot/0001-BeagleBoard-move-ramdisk-parameters.patch
new file mode 100644
index 00000000..5d6e69d2
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0001-BeagleBoard-move-ramdisk-parameters.patch
@@ -0,0 +1,38 @@
+From c8d02f2a8500f06de39681aed60ea5c9894f8087 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Wed, 11 Aug 2010 14:50:38 -0500
+Subject: [PATCH] BeagleBoard: move ramdisk parameters
+This will make it easier to reprogram the ramdisk size.
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ include/configs/omap3_beagle.h |    5 ++---
+ 1 files changed, 2 insertions(+), 3 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 48ad805..4f5c1d4 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -217,7 +217,7 @@
+        "mmcrootfstype=ext3 rootwait\0" \
+        "nandroot=/dev/mtdblock4 rw\0" \
+        "nandrootfstype=jffs2\0" \
+-       "ramroot=/dev/ram0 rw\0" \
+       "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
+        "ramrootfstype=ext2\0" \
+        "mmcargs=setenv bootargs console=${console} " \
+                "${optargs} " \
+@@ -248,8 +248,7 @@
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+-               "root=${ramroot} rw ramdisk_size=65536 " \
+-               "initrd=${rdaddr},64M " \
+               "root=${ramroot} " \
+                "rootfstype=${ramrootfstype}\0" \
+        "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
+        "bootscript=echo Running bootscript from mmc ...; " \
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0001-OMAP-mmc-add-support-for-second-and-third-mmc-chan.patch b/recipes-bsp/u-boot/u-boot/0001-OMAP-mmc-add-support-for-second-and-third-mmc-chan.patch
new file mode 100644
index 00000000..2bda1bcd
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0001-OMAP-mmc-add-support-for-second-and-third-mmc-chan.patch
@@ -0,0 +1,126 @@
+From 7252b81ec10aea48672f66e33cb6962b98fb0782 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 29 Apr 2010 10:28:14 -0700
+Subject: [PATCH] OMAP: mmc: add support for second and third mmc channels
+Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ drivers/mmc/omap3_mmc.c                   |   39 +++++++++++++++++++++++++++-
+ include/asm-arm/arch-omap3/mmc_host_def.h |   15 +++++++++--
+ 2 files changed, 49 insertions(+), 5 deletions(-)
+diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c
+index 96c0e65..bf650ba 100644
+--- a/drivers/mmc/omap3_mmc.c
+++ b/drivers/mmc/omap3_mmc.c
+@@ -52,7 +52,27 @@ const unsigned short mmc_transspeed_val[15][4] = {
+ 
+ mmc_card_data cur_card_data;
+ static block_dev_desc_t mmc_blk_dev;
+-static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE;
+static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
+
+unsigned char mmc_set_dev(int dev)
+{
+       switch (dev) {
+       case 1:
+               mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
+               break;
+       case 2:
+               mmc_base = (hsmmc_t *)OMAP_HSMMC2_BASE;
+               break;
+       case 3:
+               mmc_base = (hsmmc_t *)OMAP_HSMMC3_BASE;
+               break;
+       default:
+               mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
+               return 1;
+       }
+
+       return 0;
+}
+ 
+ block_dev_desc_t *mmc_get_dev(int dev)
+ {
+@@ -62,6 +82,7 @@ block_dev_desc_t *mmc_get_dev(int dev)
+ unsigned char mmc_board_init(void)
+ {
+        t2_t *t2_base = (t2_t *)T2_BASE;
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ 
+ #if defined(CONFIG_TWL4030_POWER)
+        twl4030_power_mmc_init();
+@@ -74,6 +95,17 @@ unsigned char mmc_board_init(void)
+        writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
+                &t2_base->devconf0);
+ 
+       writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL,
+               &t2_base->devconf1);
+
+       writel(readl(&prcm_base->fclken1_core) | 
+               EN_MMC1 | EN_MMC2 | EN_MMC3,
+               &prcm_base->fclken1_core);
+
+       writel(readl(&prcm_base->iclken1_core) | 
+               EN_MMC1 | EN_MMC2 | EN_MMC3,
+               &prcm_base->iclken1_core);
+
+        return 1;
+ }
+ 
+@@ -512,8 +544,11 @@ unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt,
+        return 1;
+ }
+ 
+-int mmc_legacy_init(int verbose)
+int mmc_legacy_init(int dev)
+ {
+       if (mmc_set_dev(dev) != 0)
+               return 1;
+
+        if (configure_mmc(&cur_card_data) != 1)
+                return 1;
+ 
+diff --git a/include/asm-arm/arch-omap3/mmc_host_def.h b/include/asm-arm/arch-omap3/mmc_host_def.h
+index aa751c9..43dd705 100644
+--- a/include/asm-arm/arch-omap3/mmc_host_def.h
+++ b/include/asm-arm/arch-omap3/mmc_host_def.h
+@@ -29,13 +29,20 @@
+ #define T2_BASE                        0x48002000
+ 
+ typedef struct t2 {
+-       unsigned char res1[0x274];
+       unsigned char res1[0x274];      /* 0x000 */
+        unsigned int devconf0;          /* 0x274 */
+-       unsigned char res2[0x2A8];
+       unsigned char res2[0x060];      /* 0x278 */
+       unsigned int devconf1;          /* 0x2D8 */
+       unsigned char res3[0x244];      /* 0x2DC */
+        unsigned int pbias_lite;        /* 0x520 */
+ } t2_t;
+ 
+ #define MMCSDIO1ADPCLKISEL             (1 << 24)
+#define MMCSDIO2ADPCLKISEL             (1 << 6)
+
+#define EN_MMC1                                (1 << 24)
+#define EN_MMC2                                (1 << 25)
+#define EN_MMC3                                (1 << 30)
+ 
+ #define PBIASLITEPWRDNZ0               (1 << 1)
+ #define PBIASSPEEDCTRL0                        (1 << 2)
+@@ -44,7 +51,9 @@ typedef struct t2 {
+ /*
+  * OMAP HSMMC register definitions
+  */
+-#define OMAP_HSMMC_BASE                0x4809C000
+#define OMAP_HSMMC1_BASE       0x4809C000
+#define OMAP_HSMMC2_BASE       0x480B4000
+#define OMAP_HSMMC3_BASE       0x480AD000
+ 
+ typedef struct hsmmc {
+        unsigned char res1[0x10];
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-enable-support-for-second-and-third-m.patch b/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-enable-support-for-second-and-third-m.patch
new file mode 100644
index 00000000..21f1f13e
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-enable-support-for-second-and-third-m.patch
@@ -0,0 +1,56 @@
+From 629a01965677e680ffa1fe76579ace7f69dd45b9 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Fri, 7 May 2010 07:40:26 -0700
+Subject: [PATCH] OMAP3: Beagle: enable support for second and third mmc channels
+Based on 629a01965677e680ffa1fe76579ace7f69dd45b9, but removed BOOTDELAY change.
+---
+ include/configs/omap3_beagle.h |   8 +++++---
+ 1 files changed, 5 insertions(+), 3 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index f2d0f53..74d4159 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -95,6 +95,7 @@
+                                        115200}
+ #define CONFIG_MMC                     1
+ #define CONFIG_OMAP3_MMC               1
+#define CONFIG_SYS_MMC_SET_DEV         1
+ #define CONFIG_DOS_PARTITION           1
+ 
+ /* DDR - I use Micron DDR */
+@@ -186,6 +187,7 @@
+        "vram=12M\0" \
+        "dvimode=1024x768MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+       "mmcdev=1\0" \
+        "mmcroot=/dev/mmcblk0p2 rw\0" \
+        "mmcrootfstype=ext3 rootwait\0" \
+        "nandroot=/dev/mtdblock4 rw\0" \
+@@ -204,10 +206,10 @@
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${nandroot} " \
+                "rootfstype=${nandrootfstype}\0" \
+-       "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
+       "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+        "bootscript=echo Running bootscript from mmc ...; " \
+                "source ${loadaddr}\0" \
+-       "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
+       "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+        "mmcboot=echo Booting from mmc ...; " \
+                "run mmcargs; " \
+                "bootm ${loadaddr}\0" \
+@@ -217,7 +219,7 @@
+                "bootm ${loadaddr}\0" \
+ 
+ #define CONFIG_BOOTCOMMAND \
+-       "if mmc init; then " \
+       "if mmc init ${mmcdev}; then " \
+                "if run loadbootscript; then " \
+                        "run bootscript; " \
+                "else " \
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0001-OMAP3-enable-i2c-bus-switching-for-Beagle-and-Overo.patch b/recipes-bsp/u-boot/u-boot/0001-OMAP3-enable-i2c-bus-switching-for-Beagle-and-Overo.patch
new file mode 100644
index 00000000..c718191a
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0001-OMAP3-enable-i2c-bus-switching-for-Beagle-and-Overo.patch
@@ -0,0 +1,49 @@
+From 9c1581dd7f6057d5d25d6b2dcf8bacef95d526d2 Mon Sep 17 00:00:00 2001
+From: Syed Mohammed Khasim <khasim@ti.com>
+Date: Mon, 18 Jan 2010 18:11:14 +0530
+Subject: [PATCH] Enable I2C bus switching
+OMAP3 supports Multiple I2C channels, this patch allows
+us to use i2c dev <bus no> command to switch between busses.
+Signed-off-by: Syed Mohammed Khasim <khasim@ti.com>
+Acked-by: Heiko Schocher <hs@denx.de>
+(cherry picked from commit 9bb1c3501c8f098dac6e224c99e409ebf92b0ab9)
+---
+ drivers/i2c/omap24xx_i2c.c     |    5 +++++
+ include/configs/omap3_beagle.h |    6 ++++++
+ 2 files changed, 11 insertions(+), 0 deletions(-)
+diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
+index f00468d..0af230d 100644
+--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
+@@ -435,3 +435,8 @@ int i2c_set_bus_num(unsigned int bus)
+ 
+        return 0;
+ }
+
+int i2c_get_bus_num(void)
+{
+       return (int) current_bus;
+}
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ad73a66..1a76004 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -113,6 +113,12 @@
+ /* DDR - I use Micron DDR */
+ #define CONFIG_OMAP3_MICRON_DDR                1
+ 
+/* Enable Multi Bus support for I2C */
+#define CONFIG_I2C_MULTI_BUS           1
+
+/* Probe all devices */
+#define CONFIG_SYS_I2C_NOPROBES                {0x0, 0x0}
+
+ /* USB */
+ #define CONFIG_MUSB_UDC                        1
+ #define CONFIG_USB_OMAP3               1
+-- 
+1.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0002-OMAP3-add-board-revision-detection-for-Overo.patch b/recipes-bsp/u-boot/u-boot/0002-OMAP3-add-board-revision-detection-for-Overo.patch
new file mode 100644
index 00000000..255d7257
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0002-OMAP3-add-board-revision-detection-for-Overo.patch
@@ -0,0 +1,187 @@
+From 59c9245c9a52954c8c084e257bbe55443201614b Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 10 Feb 2010 14:40:56 -0800
+Subject: [PATCH 02/37] OMAP3: add board revision detection for Overo
+---
+ board/overo/overo.c |   90 +++++++++++++++++++++++++++++++++++++++++++++++++++
+ board/overo/overo.h |   43 +++++++++++++++++++++---
+ 2 files changed, 127 insertions(+), 6 deletions(-)
+diff --git a/board/overo/overo.c b/board/overo/overo.c
+index e85be7d..3df1a12 100644
+--- a/board/overo/overo.c
+++ b/board/overo/overo.c
+@@ -61,11 +61,101 @@ int board_init(void)
+ }
+ 
+ /*
+ * Routine: get_sdio2_config
+ * Description: Return information about the wifi module connection
+ *              Returns 0 if the module connects though a level translator
+ *              Returns 1 if the module connects directly
+ */
+int get_sdio2_config(void) {
+       int sdio_direct;
+
+       if (!omap_request_gpio(130) && !omap_request_gpio(139)){
+
+               omap_set_gpio_direction(130, 0);
+               omap_set_gpio_direction(139, 1);
+
+               sdio_direct = 1;
+               omap_set_gpio_dataout(130, 0);
+               if (omap_get_gpio_datain(139) == 0) {
+                       omap_set_gpio_dataout(130, 1);
+                       if (omap_get_gpio_datain(139) == 1)
+                               sdio_direct = 0;
+               }
+
+               omap_free_gpio(130);
+               omap_free_gpio(139);
+       } else {
+               printf("Error: unable to acquire sdio2 clk GPIOs\n");
+               sdio_direct=-1;
+       }
+
+       return sdio_direct;
+}
+
+/*
+ * Routine: get_board_revision
+ * Description: Returns the board revision
+ */
+int get_board_revision(void) {
+       int revision;
+
+       if (!omap_request_gpio(126) && !omap_request_gpio(127) &&
+           !omap_request_gpio(128) && !omap_request_gpio(129)){
+
+               omap_set_gpio_direction(126, 1);
+               omap_set_gpio_direction(127, 1);
+               omap_set_gpio_direction(128, 1);
+               omap_set_gpio_direction(129, 1);
+
+               revision = 0;
+               if (omap_get_gpio_datain(126) == 0)
+                       revision += 1;
+               if (omap_get_gpio_datain(127) == 0)
+                       revision += 2;
+               if (omap_get_gpio_datain(128) == 0)
+                       revision += 4;
+               if (omap_get_gpio_datain(129) == 0)
+                       revision += 8;
+
+               omap_free_gpio(126);
+               omap_free_gpio(127);
+               omap_free_gpio(128);
+               omap_free_gpio(129);
+       } else {
+               printf("Error: unable to acquire board revision GPIOs\n");
+               revision=-1;
+       }
+
+       return revision;
+}
+
+/*
+  * Routine: misc_init_r
+  * Description: Configure board specific parts
+  */
+ int misc_init_r(void)
+ {
+       printf("Board revision: ");
+       switch (get_board_revision()) {
+               case 0:
+               case 1:
+                       switch (get_sdio2_config()) {
+                               case 0:
+                                       printf(" 0\n");
+                                       MUX_OVERO_SDIO2_TRANSCEIVER();
+                                       break;
+                               case 1:
+                                       printf(" 1\n");
+                                       MUX_OVERO_SDIO2_DIRECT();
+                                       break;
+                               default:
+                                       printf(" unknown\n");
+                       }
+                       break;
+               default:
+                       printf(" unsupported\n");
+       }
+
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+ 
+diff --git a/board/overo/overo.h b/board/overo/overo.h
+index 1873523..e120e09 100644
+--- a/board/overo/overo.h
+++ b/board/overo/overo.h
+@@ -206,12 +206,12 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MMC1_DAT1),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT1*/\
+        MUX_VAL(CP(MMC1_DAT2),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT2*/\
+        MUX_VAL(CP(MMC1_DAT3),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT3*/\
+-       MUX_VAL(CP(MMC1_DAT4),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT4*/\
+-       MUX_VAL(CP(MMC1_DAT5),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT5*/\
+-       MUX_VAL(CP(MMC1_DAT6),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT6*/\
+-       MUX_VAL(CP(MMC1_DAT7),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT7*/\
+       MUX_VAL(CP(MMC1_DAT4),          (IEN  | PTU | EN  | M4)) /*GPIO_126*/\
+       MUX_VAL(CP(MMC1_DAT5),          (IEN  | PTU | EN  | M4)) /*GPIO_127*/\
+       MUX_VAL(CP(MMC1_DAT6),          (IEN  | PTU | EN  | M4)) /*GPIO_128*/\
+       MUX_VAL(CP(MMC1_DAT7),          (IEN  | PTU | EN  | M4)) /*GPIO_129*/\
+  /*Wireless LAN */\
+-       MUX_VAL(CP(MMC2_CLK),           (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+       MUX_VAL(CP(MMC2_CLK),           (IEN  | PTU | EN  | M4)) /*GPIO_130*/\
+        MUX_VAL(CP(MMC2_CMD),           (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
+        MUX_VAL(CP(MMC2_DAT0),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
+        MUX_VAL(CP(MMC2_DAT1),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
+@@ -220,7 +220,7 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MMC2_DAT4),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT0*/\
+        MUX_VAL(CP(MMC2_DAT5),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT1*/\
+        MUX_VAL(CP(MMC2_DAT6),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
+-       MUX_VAL(CP(MMC2_DAT7),          (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
+       MUX_VAL(CP(MMC2_DAT7),          (IEN  | PTU | EN  | M4)) /*GPIO_139*/\
+  /*Bluetooth*/\
+        MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M1)) /*UART2_CTS*/\
+        MUX_VAL(CP(MCBSP3_DR),          (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
+@@ -387,5 +387,36 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(SDRC_CKE0),          (IDIS | PTU | EN  | M0)) /*sdrc_cke0*/\
+        MUX_VAL(CP(SDRC_CKE1),          (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
+ 
+#define MUX_OVERO_SDIO2_DIRECT() \
+       MUX_VAL(CP(MMC2_CLK),           (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+       MUX_VAL(CP(MMC2_CMD),           (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
+       MUX_VAL(CP(MMC2_DAT0),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
+       MUX_VAL(CP(MMC2_DAT1),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
+       MUX_VAL(CP(MMC2_DAT2),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
+       MUX_VAL(CP(MMC2_DAT3),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
+       MUX_VAL(CP(MMC2_DAT4),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT4*/\
+       MUX_VAL(CP(MMC2_DAT5),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT5*/\
+       MUX_VAL(CP(MMC2_DAT6),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT6*/\
+       MUX_VAL(CP(MMC2_DAT7),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT7*/\
+       MUX_VAL(CP(MMC1_DAT4),          (IEN  | PTD | EN  | M4)) /*GPIO_126*/\
+       MUX_VAL(CP(MMC1_DAT5),          (IEN  | PTU | EN  | M4)) /*GPIO_127*/\
+       MUX_VAL(CP(MMC1_DAT6),          (IEN  | PTU | EN  | M4)) /*GPIO_128*/\
+       MUX_VAL(CP(MMC1_DAT7),          (IEN  | PTU | EN  | M4)) /*GPIO_129*/
+
+#define MUX_OVERO_SDIO2_TRANSCEIVER() \
+       MUX_VAL(CP(MMC2_CLK),           (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+       MUX_VAL(CP(MMC2_CMD),           (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
+       MUX_VAL(CP(MMC2_DAT0),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
+       MUX_VAL(CP(MMC2_DAT1),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
+       MUX_VAL(CP(MMC2_DAT2),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
+       MUX_VAL(CP(MMC2_DAT3),          (IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
+       MUX_VAL(CP(MMC2_DAT4),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT0*/\
+       MUX_VAL(CP(MMC2_DAT5),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT1*/\
+       MUX_VAL(CP(MMC2_DAT6),          (IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
+       MUX_VAL(CP(MMC2_DAT7),          (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
+       MUX_VAL(CP(MMC1_DAT4),          (IEN  | PTU | EN  | M4)) /*GPIO_126*/\
+       MUX_VAL(CP(MMC1_DAT5),          (IEN  | PTU | EN  | M4)) /*GPIO_127*/\
+       MUX_VAL(CP(MMC1_DAT6),          (IEN  | PTU | EN  | M4)) /*GPIO_128*/\
+       MUX_VAL(CP(MMC1_DAT7),          (IEN  | PTU | EN  | M4)) /*GPIO_129*/
+ 
+ #endif
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0003-OMAP3-update-Beagle-revision-detection-to-recognize-.patch b/recipes-bsp/u-boot/u-boot/0003-OMAP3-update-Beagle-revision-detection-to-recognize-.patch
new file mode 100644
index 00000000..d12ff7a1
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0003-OMAP3-update-Beagle-revision-detection-to-recognize-.patch
@@ -0,0 +1,165 @@
+From 9db5da6e8a0d6fb973b71902525ad3298faa39d9 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 10 Feb 2010 14:51:48 -0800
+Subject: [PATCH 03/37] OMAP3: update Beagle revision detection to recognize C4 boards
+---
+ board/ti/beagle/beagle.c |   77 +++++++++++++++++++++++++++-------------------
+ board/ti/beagle/beagle.h |    7 +++-
+ 2 files changed, 51 insertions(+), 33 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 3b4c9e7..ba16dd7 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -38,7 +38,7 @@
+ #include <asm/mach-types.h>
+ #include "beagle.h"
+ 
+-static int beagle_revision_c;
+static int beagle_revision;
+ 
+ /*
+  * Routine: board_init
+@@ -60,41 +60,38 @@ int board_init(void)
+ /*
+  * Routine: beagle_get_revision
+  * Description: Return the revision of the BeagleBoard this code is running on.
+- *              If it is a revision Ax/Bx board, this function returns 0,
+- *              on a revision C board you will get a 1.
+  */
+ int beagle_get_revision(void)
+ {
+-       return beagle_revision_c;
+       return beagle_revision;
+ }
+ 
+ /*
+  * Routine: beagle_identify
+- * Description: Detect if we are running on a Beagle revision Ax/Bx or
+- *              Cx. This can be done by GPIO_171. If this is low, we are
+- *              running on a revision C board.
+ * Description: Detect if we are running on a Beagle revision Ax/Bx,
+ *             C1/2/3, C4 or D. This can be done by reading
+ *             the level of GPIO173, GPIO172 and GPIO171. This should
+ *             result in
+ *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
+ *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
+ *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
+ *             GPIO173, GPIO172, GPIO171: 0 0 0 => D
+  */
+ void beagle_identify(void)
+ {
+-       beagle_revision_c = 0;
+-       if (!omap_request_gpio(171)) {
+-               unsigned int val;
+-
+-               omap_set_gpio_direction(171, 1);
+-               val = omap_get_gpio_datain(171);
+-               omap_free_gpio(171);
+-
+-               if (val)
+-                       beagle_revision_c = 0;
+-               else
+-                       beagle_revision_c = 1;
+-       }
+-
+-       printf("Board revision ");
+-       if (beagle_revision_c)
+-               printf("C\n");
+-       else
+-               printf("Ax/Bx\n");
+       omap_request_gpio(171);
+       omap_request_gpio(172);
+       omap_request_gpio(173);
+       omap_set_gpio_direction(171, 1);
+       omap_set_gpio_direction(172, 1);
+       omap_set_gpio_direction(173, 1);
+
+       beagle_revision = omap_get_gpio_datain(173) << 2 |
+                         omap_get_gpio_datain(172) << 1 |
+                         omap_get_gpio_datain(171);
+       omap_free_gpio(171);
+       omap_free_gpio(172);
+       omap_free_gpio(173);
+ }
+ 
+ /*
+@@ -106,9 +103,31 @@ int misc_init_r(void)
+        struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
+        struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+ 
+       beagle_identify();
+
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+ 
+       printf("Board revision ");
+       switch (beagle_revision) {
+       case REVISION_AXBX:
+               printf("Ax/Bx\n");
+               break;
+       case REVISION_CX:
+               printf("C1/C2/C3\n");
+               MUX_BEAGLE_C();
+               break;
+       case REVISION_C4:
+               printf("C4\n");
+               MUX_BEAGLE_C();
+               break;
+       case REVISION_D:
+               printf("D\n");
+               break;
+       default:
+               printf("unknown 0x%02x\n", beagle_revision);
+       }
+
+        /* Configure GPIOs to output */
+        writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
+        writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+@@ -120,8 +139,6 @@ int misc_init_r(void)
+        writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+                GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+ 
+-       beagle_identify();
+-
+        dieid_num_r();
+ 
+        return 0;
+@@ -136,8 +153,4 @@ int misc_init_r(void)
+ void set_muxconf_regs(void)
+ {
+        MUX_BEAGLE();
+-
+-       if (beagle_revision_c) {
+-               MUX_BEAGLE_C();
+-       }
+ }
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index 7fe6275..d95fd78 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -34,6 +34,11 @@ const omap3_sysinfo sysinfo = {
+ };
+ 
+ #define BOARD_REVISION_MASK    (0x1 << 11)
+/* BeagleBoard revisions */
+#define REVISION_AXBX  0x7
+#define REVISION_CX    0x6
+#define REVISION_C4    0x5
+#define REVISION_D     0x0
+ 
+ /*
+  * IEN  - Input Enable
+@@ -264,7 +269,7 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(HDQ_SIO),            (IDIS | PTU | EN  | M4)) /*GPIO_170*/\
+        MUX_VAL(CP(MCSPI1_CLK),         (IEN  | PTU | EN  | M4)) /*GPIO_171*/\
+        MUX_VAL(CP(MCSPI1_SIMO),        (IEN  | PTU | EN  | M4)) /*GPIO_172*/\
+-       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTD | DIS | M0)) /*McSPI1_SOMI*/\
+       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTU | EN  | M4)) /*GPIO_173*/\
+        MUX_VAL(CP(MCSPI1_CS0),         (IEN  | PTD | EN  | M0)) /*McSPI1_CS0*/\
+        MUX_VAL(CP(MCSPI1_CS1),         (IDIS | PTD | EN  | M0)) /*McSPI1_CS1*/\
+        MUX_VAL(CP(MCSPI1_CS2),         (IDIS | PTD | DIS | M4)) /*GPIO_176*/\
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0004-OMAP3-Set-VAUX2-to-1.8V-for-EHCI-PHY-on-Beagle-Rev-C.patch b/recipes-bsp/u-boot/u-boot/0004-OMAP3-Set-VAUX2-to-1.8V-for-EHCI-PHY-on-Beagle-Rev-C.patch
new file mode 100644
index 00000000..549b3fbd
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0004-OMAP3-Set-VAUX2-to-1.8V-for-EHCI-PHY-on-Beagle-Rev-C.patch
@@ -0,0 +1,143 @@
+From efc587fb24a5246f5a436a057320687a1b7847c6 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 10 Feb 2010 15:23:19 -0800
+Subject: [PATCH 04/37] OMAP3: Set VAUX2 to 1.8V for EHCI PHY on Beagle Rev C4 boards
+---
+ board/ti/beagle/beagle.c |    5 +++++
+ drivers/power/twl4030.c  |   45 +++++++++++++++++++++++++--------------------
+ include/twl4030.h        |   15 +++++++++++++++
+ 3 files changed, 45 insertions(+), 20 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index ba16dd7..b4ea7e6 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -120,6 +120,11 @@ int misc_init_r(void)
+        case REVISION_C4:
+                printf("C4\n");
+                MUX_BEAGLE_C();
+               /* Set VAUX2 to 1.8V for EHCI PHY */
+               twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+                                       TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                       TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                       TWL4030_PM_RECEIVER_DEV_GRP_P1);
+                break;
+        case REVISION_D:
+                printf("D\n");
+diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
+index eb066cb..f354834 100644
+--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
+@@ -59,57 +59,62 @@ void twl4030_power_reset_init(void)
+        }
+ }
+ 
+-
+-/*
+- * Power Init
+- */
+-#define DEV_GRP_P1             0x20
+-#define VAUX3_VSEL_28          0x03
+-#define DEV_GRP_ALL            0xE0
+-#define VPLL2_VSEL_18          0x05
+-#define VDAC_VSEL_18           0x03
+-
+ void twl4030_power_init(void)
+ {
+        unsigned char byte;
+ 
+        /* set VAUX3 to 2.8V */
+-       byte = DEV_GRP_P1;
+       byte = TWL4030_PM_RECEIVER_DEV_GRP_P1;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VAUX3_DEV_GRP);
+-       byte = VAUX3_VSEL_28;
+       byte = TWL4030_PM_RECEIVER_VAUX3_VSEL_28;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VAUX3_DEDICATED);
+ 
+        /* set VPLL2 to 1.8V */
+-       byte = DEV_GRP_ALL;
+       byte = TWL4030_PM_RECEIVER_DEV_GRP_ALL;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VPLL2_DEV_GRP);
+-       byte = VPLL2_VSEL_18;
+       byte = TWL4030_PM_RECEIVER_VPLL2_VSEL_18;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VPLL2_DEDICATED);
+ 
+        /* set VDAC to 1.8V */
+-       byte = DEV_GRP_P1;
+       byte = TWL4030_PM_RECEIVER_DEV_GRP_P1;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VDAC_DEV_GRP);
+-       byte = VDAC_VSEL_18;
+       byte = TWL4030_PM_RECEIVER_VDAC_VSEL_18;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VDAC_DEDICATED);
+ }
+ 
+-#define VMMC1_VSEL_30          0x02
+-
+ void twl4030_power_mmc_init(void)
+ {
+        unsigned char byte;
+ 
+-       byte = DEV_GRP_P1;
+       byte = TWL4030_PM_RECEIVER_DEV_GRP_P1;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VMMC1_DEV_GRP);
+ 
+        /* 3 Volts */
+-       byte = VMMC1_VSEL_30;
+       byte = TWL4030_PM_RECEIVER_VMMC1_VSEL_30;
+        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
+                             TWL4030_PM_RECEIVER_VMMC1_DEDICATED);
+ }
+
+/*
+ * Generic function to select Device Group and Voltage
+ */
+void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
+                               u8 dev_grp, u8 dev_grp_sel)
+{
+       /* Select the Device Group */
+       twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp_sel,
+                               dev_grp);
+
+       /* Select the Voltage */
+       twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_val,
+                               vsel_reg);
+}
+
+
+diff --git a/include/twl4030.h b/include/twl4030.h
+index 2b2f5ae..cc99403 100644
+--- a/include/twl4030.h
+++ b/include/twl4030.h
+@@ -471,6 +471,21 @@
+ #define TWL4030_USB_PHY_CLK_CTRL_STS                   0xFF
+ 
+ /*
+ * Voltage Selection in PM Receiver Module
+ */
+#define TWL4030_PM_RECEIVER_VAUX2_VSEL_18              0x05
+#define TWL4030_PM_RECEIVER_VAUX3_VSEL_28              0x03
+#define TWL4030_PM_RECEIVER_VPLL2_VSEL_18              0x05
+#define TWL4030_PM_RECEIVER_VDAC_VSEL_18               0x03
+#define TWL4030_PM_RECEIVER_VMMC1_VSEL_30              0x02
+
+/*
+ * Device Selection in PM Receiver Module
+ */
+#define TWL4030_PM_RECEIVER_DEV_GRP_P1                 0x20
+#define TWL4030_PM_RECEIVER_DEV_GRP_ALL                        0xE0
+
+/*
+  * Convience functions to read and write from TWL4030
+  *
+  * chip_no is the i2c address, it must be one of the chip addresses
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0005-OMAP3-add-entry-for-rev-3.1.2-check-and-display-max-.patch b/recipes-bsp/u-boot/u-boot/0005-OMAP3-add-entry-for-rev-3.1.2-check-and-display-max-.patch
new file mode 100644
index 00000000..783fe279
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0005-OMAP3-add-entry-for-rev-3.1.2-check-and-display-max-.patch
@@ -0,0 +1,105 @@
+From 27072274450ea8de1994744782397452b99814cc Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 3 Feb 2010 12:26:30 -0800
+Subject: [PATCH 05/37] OMAP3: add entry for rev 3.1.2, check and display max cpu clock for rev > 3.0
+---
+ cpu/arm_cortexa8/omap3/sys_info.c  |   24 ++++++++++++++++++++++--
+ include/asm-arm/arch-omap3/cpu.h   |    8 +++++++-
+ include/asm-arm/arch-omap3/omap3.h |    3 ++-
+ 3 files changed, 31 insertions(+), 4 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c
+index 08fb32e..e227f67 100644
+--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
+@@ -39,7 +39,10 @@ static char *rev_s[CPU_3XX_MAX_REV] = {
+                                "2.0",
+                                "2.1",
+                                "3.0",
+-                               "3.1"};
+                               "3.1",
+                               "UNKNOWN",
+                               "UNKNOWN",
+                               "3.1.2"};
+ 
+ /*****************************************************************
+  * dieid_num_r(void) - read and set die ID
+@@ -104,6 +107,16 @@ u32 get_cpu_rev(void)
+        }
+ }
+ 
+/*****************************************************************
+ * get_sku_id(void) - read sku_id to get info on max clock rate
+ *****************************************************************/
+u32 get_sku_id(void)
+{
+       struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
+       return (readl(&id_base->sku_id) & SKUID_CLK_MASK);
+}
+
+
+ /****************************************************
+  * is_mem_sdr() - return 1 if mem type in use is SDR
+  ****************************************************/
+@@ -291,9 +304,16 @@ int print_cpuinfo (void)
+                sec_s = "?";
+        }
+ 
+-       printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n",
+       printf("OMAP%s-%s ES%s, CPU-OPP2, L3-165MHz, ",
+                        cpu_s, sec_s, rev_s[get_cpu_rev()]);
+ 
+       printf("Max clock-");
+       if ((get_cpu_rev() >= CPU_3XX_ES31) && (get_sku_id() == SKUID_CLK_720MHZ))
+               printf("720Mhz\n");
+       else    printf("600Mhz\n");
+       
+
+
+        return 0;
+ }
+ #endif /* CONFIG_DISPLAY_CPUINFO */
+diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
+index aa8de32..f769571 100644
+--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/include/asm-arm/arch-omap3/cpu.h
+@@ -72,7 +72,8 @@ struct ctrl_id {
+        u8 res1[0x4];
+        u32 idcode;             /* 0x04 */
+        u32 prod_id;            /* 0x08 */
+-       u8 res2[0x0C];
+       u32 sku_id;             /* 0x0c */
+       u8 res2[0x08];
+        u32 die_id_0;           /* 0x18 */
+        u32 die_id_1;           /* 0x1C */
+        u32 die_id_2;           /* 0x20 */
+@@ -89,6 +90,11 @@ struct ctrl_id {
+ #define HS_DEVICE              0x2
+ #define GP_DEVICE              0x3
+ 
+/* device speed */
+#define SKUID_CLK_MASK         0xf
+#define SKUID_CLK_600MHZ       0x0
+#define SKUID_CLK_720MHZ       0x8
+
+ #define GPMC_BASE              (OMAP34XX_GPMC_BASE)
+ #define GPMC_CONFIG_CS0                0x60
+ #define GPMC_CONFIG_CS0_BASE   (GPMC_BASE + GPMC_CONFIG_CS0)
+diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h
+index 12815f6..1349b8b 100644
+--- a/include/asm-arm/arch-omap3/omap3.h
+++ b/include/asm-arm/arch-omap3/omap3.h
+@@ -176,7 +176,8 @@ struct gpio {
+ #define CPU_3XX_ES21           2
+ #define CPU_3XX_ES30           3
+ #define CPU_3XX_ES31           4
+-#define CPU_3XX_MAX_REV                (CPU_3XX_ES31 + 1)
+#define CPU_3XX_ES312          7
+#define CPU_3XX_MAX_REV                8
+ 
+ #define CPU_3XX_ID_SHIFT       28
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0006-OMAP3-add-mpurate-boot-arg-for-overo-and-beagle.patch b/recipes-bsp/u-boot/u-boot/0006-OMAP3-add-mpurate-boot-arg-for-overo-and-beagle.patch
new file mode 100644
index 00000000..de3b4845
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0006-OMAP3-add-mpurate-boot-arg-for-overo-and-beagle.patch
@@ -0,0 +1,70 @@
+From 1b082bb4a8ba5b7bee727baf3cd048e1785c8abd Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Wed, 3 Feb 2010 14:39:14 -0800
+Subject: [PATCH 06/37] OMAP3: add mpurate boot arg for overo and beagle
+allows one to set the omap clock rate via "setenv mpurate 720" for example
+---
+ include/configs/omap3_beagle.h |    3 +++
+ include/configs/omap3_overo.h  |    3 +++
+ 2 files changed, 6 insertions(+), 0 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 87e3dd0..ce347cd 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -182,6 +182,7 @@
+        "loadaddr=0x82000000\0" \
+        "usbtty=cdc_acm\0" \
+        "console=ttyS2,115200n8\0" \
+       "mpurate=500\0" \
+        "vram=12M\0" \
+        "dvimode=1024x768MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+@@ -190,6 +191,7 @@
+        "nandroot=/dev/mtdblock4 rw\0" \
+        "nandrootfstype=jffs2\0" \
+        "mmcargs=setenv bootargs console=${console} " \
+               "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapfb.debug=y " \
+@@ -197,6 +199,7 @@
+                "root=${mmcroot} " \
+                "rootfstype=${mmcrootfstype}\0" \
+        "nandargs=setenv bootargs console=${console} " \
+               "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapfb.debug=y " \
+diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
+index 0d24758..295cce6 100644
+--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
+@@ -152,6 +152,7 @@
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+        "loadaddr=0x82000000\0" \
+        "console=ttyS2,115200n8\0" \
+       "mpurate=500\0" \
+        "vram=12M\0" \
+        "dvimode=1024x768MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+@@ -160,6 +161,7 @@
+        "nandroot=/dev/mtdblock4 rw\0" \
+        "nandrootfstype=jffs2\0" \
+        "mmcargs=setenv bootargs console=${console} " \
+               "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapfb.debug=y " \
+@@ -167,6 +169,7 @@
+                "root=${mmcroot} " \
+                "rootfstype=${mmcrootfstype}\0" \
+        "nandargs=setenv bootargs console=${console} " \
+               "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapfb.debug=y " \
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0007-OMAP3-detect-expansion-board-type-version-using-eepr.patch b/recipes-bsp/u-boot/u-boot/0007-OMAP3-detect-expansion-board-type-version-using-eepr.patch
new file mode 100644
index 00000000..13da414c
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0007-OMAP3-detect-expansion-board-type-version-using-eepr.patch
@@ -0,0 +1,129 @@
+From 129dccd106ea5862f3ff25c368102bf656472f7f Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Fri, 12 Feb 2010 12:17:48 -0800
+Subject: [PATCH 07/37] OMAP3: detect expansion board type/version using eeprom contents
+---
+ board/overo/overo.c |   92 +++++++++++++++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 92 insertions(+), 0 deletions(-)
+diff --git a/board/overo/overo.c b/board/overo/overo.c
+index 3df1a12..2838a1f 100644
+--- a/board/overo/overo.c
+++ b/board/overo/overo.c
+@@ -39,6 +39,31 @@
+ #include <asm/mach-types.h>
+ #include "overo.h"
+ 
+static struct {
+       unsigned int device_vendor;
+       unsigned char revision;
+       unsigned char content;
+       unsigned char data[6];
+} expansion_config;
+
+#define TWL4030_I2C_BUS                        0
+
+#define EXPANSION_EEPROM_I2C_BUS       2
+#define EXPANSION_EEPROM_I2C_ADDRESS   0x50
+
+#define GUMSTIX_VENDORID               0x0200
+
+#define GUMSTIX_SUMMIT                 0x01000200
+#define GUMSTIX_TOBI                   0x02000200
+#define GUMSTIX_TOBI_DUO               0x03000200
+#define GUMSTIX_PALO35                 0x04000200
+#define GUMSTIX_PALO43                 0x05000200
+#define GUMSTIX_CHESTNUT43             0x06000200
+#define GUMSTIX_PINTO                  0x07000200
+
+#define GUMSTIX_NO_EEPROM              0xfffffffe
+#define GUMSTIX_UNKNOWN                        0xffffffff
+
+ #if defined(CONFIG_CMD_NET)
+ static void setup_net_chip(void);
+ #endif
+@@ -130,6 +155,31 @@ int get_board_revision(void) {
+ }
+ 
+ /*
+ * Routine: get_expansion_id
+ * Description: This function checks for expansion board by checking I2C
+ *             bus 2 for the availability of an AT24C01B serial EEPROM.
+ *             returns the device_vendor field from the EEPROM
+ */
+unsigned int get_expansion_id(void)
+{
+       i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
+
+       /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
+       if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1)
+               return GUMSTIX_NO_EEPROM;
+
+       /* read configuration data */
+       i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
+                sizeof(expansion_config));
+
+       if ( (expansion_config.device_vendor & 0xffff) != GUMSTIX_VENDORID )
+               return GUMSTIX_UNKNOWN;
+       else
+               return expansion_config.device_vendor;
+}
+
+
+/*
+  * Routine: misc_init_r
+  * Description: Configure board specific parts
+  */
+@@ -156,6 +206,48 @@ int misc_init_r(void)
+                        printf(" unsupported\n");
+        }
+ 
+       switch (get_expansion_id()) {
+               case GUMSTIX_SUMMIT:
+                       printf("Recognized Summit expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       setenv("defaultdisplay", "dvi");
+                       break;
+               case GUMSTIX_TOBI:
+                       printf("Recognized Tobi expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       setenv("defaultdisplay", "dvi");
+                       break;
+               case GUMSTIX_TOBI_DUO:
+                       printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       break;
+               case GUMSTIX_PALO35:
+                       printf("Recognized Palo 35 expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       setenv("defaultdisplay", "lcd35");
+                       break;
+               case GUMSTIX_PALO43:
+                       printf("Recognized Palo 43 expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       setenv("defaultdisplay", "lcd43");
+                       break;
+               case GUMSTIX_CHESTNUT43:
+                       printf("Recognized Chestnut 43 expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       setenv("defaultdisplay", "lcd43");
+                       break;
+               case GUMSTIX_PINTO:
+                       printf("Recognized Pinto expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.data);
+                       break;
+               case GUMSTIX_NO_EEPROM:
+                       printf("No EEPROM on expansion board\n");
+                       break;
+               case GUMSTIX_UNKNOWN:
+                       printf("Unrecognized expansion board\n");
+       }
+
+       i2c_set_bus_num(TWL4030_I2C_BUS);
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0008-OMAP3-Overo-enable-config-eeprom-to-set-u-boot-env-v.patch b/recipes-bsp/u-boot/u-boot/0008-OMAP3-Overo-enable-config-eeprom-to-set-u-boot-env-v.patch
new file mode 100644
index 00000000..c7aea042
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0008-OMAP3-Overo-enable-config-eeprom-to-set-u-boot-env-v.patch
@@ -0,0 +1,81 @@
+From 4fb2bbcae8f283c46e762aa93b25cbbd55bab8b6 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 16 Feb 2010 09:58:01 -0800
+Subject: [PATCH 08/37] OMAP3: Overo: enable config eeprom to set u-boot env variable
+---
+ board/overo/overo.c |   21 +++++++++++++--------
+ 1 files changed, 13 insertions(+), 8 deletions(-)
+diff --git a/board/overo/overo.c b/board/overo/overo.c
+index 2838a1f..f6093d2 100644
+--- a/board/overo/overo.c
+++ b/board/overo/overo.c
+@@ -43,7 +43,9 @@ static struct {
+        unsigned int device_vendor;
+        unsigned char revision;
+        unsigned char content;
+-       unsigned char data[6];
+       unsigned char fab_revision[8];
+       unsigned char env_var[16];
+       unsigned char env_setting[64];
+ } expansion_config;
+ 
+ #define TWL4030_I2C_BUS                        0
+@@ -209,36 +211,36 @@ int misc_init_r(void)
+        switch (get_expansion_id()) {
+                case GUMSTIX_SUMMIT:
+                        printf("Recognized Summit expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        setenv("defaultdisplay", "dvi");
+                        break;
+                case GUMSTIX_TOBI:
+                        printf("Recognized Tobi expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        setenv("defaultdisplay", "dvi");
+                        break;
+                case GUMSTIX_TOBI_DUO:
+                        printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        break;
+                case GUMSTIX_PALO35:
+                        printf("Recognized Palo 35 expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        setenv("defaultdisplay", "lcd35");
+                        break;
+                case GUMSTIX_PALO43:
+                        printf("Recognized Palo 43 expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        setenv("defaultdisplay", "lcd43");
+                        break;
+                case GUMSTIX_CHESTNUT43:
+                        printf("Recognized Chestnut 43 expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        setenv("defaultdisplay", "lcd43");
+                        break;
+                case GUMSTIX_PINTO:
+                        printf("Recognized Pinto expansion board (rev %d %s)\n",
+-                               expansion_config.revision, expansion_config.data);
+                               expansion_config.revision, expansion_config.fab_revision);
+                        break;
+                case GUMSTIX_NO_EEPROM:
+                        printf("No EEPROM on expansion board\n");
+@@ -247,6 +249,9 @@ int misc_init_r(void)
+                        printf("Unrecognized expansion board\n");
+        }
+ 
+       if (expansion_config.content == 1)
+               setenv(expansion_config.env_var, expansion_config.env_setting);
+
+        i2c_set_bus_num(TWL4030_I2C_BUS);
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0009-OMAP3-Overo-enable-input-on-MMC1_CLK-and-MMC3_CLK-pi.patch b/recipes-bsp/u-boot/u-boot/0009-OMAP3-Overo-enable-input-on-MMC1_CLK-and-MMC3_CLK-pi.patch
new file mode 100644
index 00000000..b690a6c8
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0009-OMAP3-Overo-enable-input-on-MMC1_CLK-and-MMC3_CLK-pi.patch
@@ -0,0 +1,34 @@
+From 0ddd7f44f04b47d16d33a6b232b288ebdb1c9992 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 16 Feb 2010 10:00:45 -0800
+Subject: [PATCH 09/37] OMAP3: Overo: enable input on MMC1_CLK and MMC3_CLK pinmux
+---
+ board/overo/overo.h |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/board/overo/overo.h b/board/overo/overo.h
+index e120e09..ff936dd 100644
+--- a/board/overo/overo.h
+++ b/board/overo/overo.h
+@@ -200,7 +200,7 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MCBSP2_DR),          (IEN  | PTD | DIS | M0)) /*McBSP2_DR*/\
+        MUX_VAL(CP(MCBSP2_DX),          (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
+  /*Expansion card */\
+-       MUX_VAL(CP(MMC1_CLK),           (IDIS | PTU | EN  | M0)) /*MMC1_CLK*/\
+       MUX_VAL(CP(MMC1_CLK),           (IEN  | PTU | EN  | M0)) /*MMC1_CLK*/\
+        MUX_VAL(CP(MMC1_CMD),           (IEN  | PTU | EN  | M0)) /*MMC1_CMD*/\
+        MUX_VAL(CP(MMC1_DAT0),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT0*/\
+        MUX_VAL(CP(MMC1_DAT1),          (IEN  | PTU | EN  | M0)) /*MMC1_DAT1*/\
+@@ -301,7 +301,7 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(SYS_OFF_MODE),       (IEN  | PTD | DIS | M0)) /*SYS_OFF_MODE*/\
+        MUX_VAL(CP(SYS_CLKOUT1),        (IEN  | PTD | DIS | M0)) /*SYS_CLKOUT1*/\
+        MUX_VAL(CP(SYS_CLKOUT2),        (IEN  | PTU | EN  | M4)) /*GPIO_186*/\
+-       MUX_VAL(CP(ETK_CLK_ES2),        (IDIS | PTU | EN  | M2)) /*MMC3_CLK*/\
+       MUX_VAL(CP(ETK_CLK_ES2),        (IEN  | PTU | EN  | M2)) /*MMC3_CLK*/\
+        MUX_VAL(CP(ETK_CTL_ES2),        (IEN  | PTU | EN  | M2)) /*MMC3_CMD*/\
+        MUX_VAL(CP(ETK_D0_ES2),         (IEN  | PTU | EN  | M4)) /*GPIO_14*/\
+        MUX_VAL(CP(ETK_D1_ES2),         (IEN  | PTD | EN  | M4)) /*GPIO_15 - X_GATE*/\
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0010-OMAP3-Overo-set-CONFIG_SYS_I2C_SPEED-to-400Khz.patch b/recipes-bsp/u-boot/u-boot/0010-OMAP3-Overo-set-CONFIG_SYS_I2C_SPEED-to-400Khz.patch
new file mode 100644
index 00000000..53e12b3e
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0010-OMAP3-Overo-set-CONFIG_SYS_I2C_SPEED-to-400Khz.patch
@@ -0,0 +1,25 @@
+From 405a5a151c8d42f157dc48731f6e607675156774 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 16 Feb 2010 10:03:14 -0800
+Subject: [PATCH 10/37] OMAP3: Overo: set CONFIG_SYS_I2C_SPEED to 400Khz
+---
+ include/configs/omap3_overo.h |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
+index 295cce6..fdbeb67 100644
+--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
+@@ -112,7 +112,7 @@
+ 
+ #define CONFIG_SYS_NO_FLASH
+ #define CONFIG_HARD_I2C                        1
+-#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_SYS_I2C_SPEED           400000
+ #define CONFIG_SYS_I2C_SLAVE           1
+ #define CONFIG_SYS_I2C_BUS             0
+ #define CONFIG_SYS_I2C_BUS_SELECT      1
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0011-OMAP3-trim-excessively-long-delays-in-i2c-driver.patch b/recipes-bsp/u-boot/u-boot/0011-OMAP3-trim-excessively-long-delays-in-i2c-driver.patch
new file mode 100644
index 00000000..6a3a5d93
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0011-OMAP3-trim-excessively-long-delays-in-i2c-driver.patch
@@ -0,0 +1,52 @@
+From 991f54c9da846ab9571c256adf42d8d80d044bdc Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 16 Feb 2010 10:04:30 -0800
+Subject: [PATCH 11/37] OMAP3:  trim excessively long delays in i2c driver
+---
+ drivers/i2c/omap24xx_i2c.c |    8 ++++----
+ 1 files changed, 4 insertions(+), 4 deletions(-)
+diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
+index 30a8b4c..ba47fc4 100644
+--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
+@@ -148,7 +148,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+        if (status & I2C_STAT_XRDY) {
+                /* Important: have to use byte access */
+                writeb (regoffset, &i2c_base->data);
+-               udelay (20000);
+               udelay (2000);
+                if (readw (&i2c_base->stat) & I2C_STAT_NACK) {
+                        i2c_error = 1;
+                }
+@@ -160,7 +160,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+                /* free bus, otherwise we can't use a combined transction */
+                writew (0, &i2c_base->con);
+                while (readw (&i2c_base->stat) || (readw (&i2c_base->con) & I2C_CON_MST)) {
+-                       udelay (10000);
+                       udelay (1000);
+                        /* Have to clear pending interrupt to clear I2C_STAT */
+                        writew (0xFFFF, &i2c_base->stat);
+                }
+@@ -181,7 +181,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+ #else
+                        *value = readw (&i2c_base->data);
+ #endif
+-                       udelay (20000);
+                       udelay (2000);
+                } else {
+                        i2c_error = 1;
+                }
+@@ -190,7 +190,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+                        writew (I2C_CON_EN, &i2c_base->con);
+                        while (readw (&i2c_base->stat)
+                               || (readw (&i2c_base->con) & I2C_CON_MST)) {
+-                               udelay (10000);
+                               udelay (1000);
+                                writew (0xFFFF, &i2c_base->stat);
+                        }
+                }
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0012-OMAP3-Overo-allow-expansion-boards-with-any-vendor-I.patch b/recipes-bsp/u-boot/u-boot/0012-OMAP3-Overo-allow-expansion-boards-with-any-vendor-I.patch
new file mode 100644
index 00000000..b554d254
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0012-OMAP3-Overo-allow-expansion-boards-with-any-vendor-I.patch
@@ -0,0 +1,47 @@
+From ad1a2c047554deae2e1608d025c4f6891cf8f116 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Fri, 26 Feb 2010 12:40:26 -0800
+Subject: [PATCH 12/37] OMAP3: Overo: allow expansion boards with any vendor ID
+---
+ board/overo/overo.c |   10 +++-------
+ 1 files changed, 3 insertions(+), 7 deletions(-)
+diff --git a/board/overo/overo.c b/board/overo/overo.c
+index f6093d2..ec186ec 100644
+--- a/board/overo/overo.c
+++ b/board/overo/overo.c
+@@ -63,8 +63,7 @@ static struct {
+ #define GUMSTIX_CHESTNUT43             0x06000200
+ #define GUMSTIX_PINTO                  0x07000200
+ 
+-#define GUMSTIX_NO_EEPROM              0xfffffffe
+-#define GUMSTIX_UNKNOWN                        0xffffffff
+#define GUMSTIX_NO_EEPROM              0xffffffff
+ 
+ #if defined(CONFIG_CMD_NET)
+ static void setup_net_chip(void);
+@@ -174,10 +173,7 @@ unsigned int get_expansion_id(void)
+        i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
+                 sizeof(expansion_config));
+ 
+-       if ( (expansion_config.device_vendor & 0xffff) != GUMSTIX_VENDORID )
+-               return GUMSTIX_UNKNOWN;
+-       else
+-               return expansion_config.device_vendor;
+       return expansion_config.device_vendor;
+ }
+ 
+ 
+@@ -245,7 +241,7 @@ int misc_init_r(void)
+                case GUMSTIX_NO_EEPROM:
+                        printf("No EEPROM on expansion board\n");
+                        break;
+-               case GUMSTIX_UNKNOWN:
+               default:
+                        printf("Unrecognized expansion board\n");
+        }
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0013-OMAP3-Overo-change-address-of-expansion-eeprom-to-0x.patch b/recipes-bsp/u-boot/u-boot/0013-OMAP3-Overo-change-address-of-expansion-eeprom-to-0x.patch
new file mode 100644
index 00000000..4bbddcbd
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0013-OMAP3-Overo-change-address-of-expansion-eeprom-to-0x.patch
@@ -0,0 +1,25 @@
+From 305e2cb16f4f6e8c7f13120e6a98bb1e999c764f Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Fri, 26 Feb 2010 12:42:30 -0800
+Subject: [PATCH 13/37] OMAP3: Overo: change address of expansion eeprom to 0x51 so as to not conflict with EDID address
+---
+ board/overo/overo.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+diff --git a/board/overo/overo.c b/board/overo/overo.c
+index ec186ec..f96e7ff 100644
+--- a/board/overo/overo.c
+++ b/board/overo/overo.c
+@@ -51,7 +51,7 @@ static struct {
+ #define TWL4030_I2C_BUS                        0
+ 
+ #define EXPANSION_EEPROM_I2C_BUS       2
+-#define EXPANSION_EEPROM_I2C_ADDRESS   0x50
+#define EXPANSION_EEPROM_I2C_ADDRESS   0x51
+ 
+ #define GUMSTIX_VENDORID               0x0200
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0014-OMAP3-board.c-don-t-attempt-to-set-up-second-RAM-ban.patch b/recipes-bsp/u-boot/u-boot/0014-OMAP3-board.c-don-t-attempt-to-set-up-second-RAM-ban.patch
new file mode 100644
index 00000000..2936dffc
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0014-OMAP3-board.c-don-t-attempt-to-set-up-second-RAM-ban.patch
@@ -0,0 +1,49 @@
+From 63de99ce613bbfce792ee46d14b324273e6a0d29 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:04:50 -0700
+Subject: [PATCH 14/37] OMAP3: board.c: don't attempt to set up second RAM bank, assume x-load has already done this
+---
+ cpu/arm_cortexa8/omap3/board.c |   19 +++++++++----------
+ 1 files changed, 9 insertions(+), 10 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
+index 7b78fa4..0126152 100644
+--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
+@@ -232,6 +232,7 @@ void s_init(void)
+ 
+        per_clocks_enable();
+ 
+       /* FIXME: u-boot's sdrc setup is broken */
+        if (!in_sdram)
+                sdrc_init();
+ }
+@@ -281,16 +282,14 @@ int dram_init(void)
+ {
+        DECLARE_GLOBAL_DATA_PTR;
+        unsigned int size0 = 0, size1 = 0;
+-
+-       /*
+-        * If a second bank of DDR is attached to CS1 this is
+-        * where it can be started.  Early init code will init
+-        * memory on CS0.
+-        */
+-       if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
+-               do_sdrc_init(CS1, NOT_EARLY);
+-               make_cs1_contiguous();
+-       }
+       struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE;
+       struct sdrc_actim *sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
+
+       /* x-load sets up the second bank but */
+       /* doesn't test to see if it is there */
+       /* do so now, disable if not present  */
+       if (!mem_ok(CS1))
+               writel(0, &sdrc_base->cs[1].mcfg);
+ 
+        size0 = get_sdr_cs_size(CS0);
+        size1 = get_sdr_cs_size(CS1);
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0015-OMAP3-mem.c-enhance-the-RAM-test.patch b/recipes-bsp/u-boot/u-boot/0015-OMAP3-mem.c-enhance-the-RAM-test.patch
new file mode 100644
index 00000000..ce3c3b85
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0015-OMAP3-mem.c-enhance-the-RAM-test.patch
@@ -0,0 +1,52 @@
+From f2e3d22fb1963d08844edee45f7d7d6beba32152 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:06:49 -0700
+Subject: [PATCH 15/37] OMAP3: mem.c: enhance the RAM test
+---
+ cpu/arm_cortexa8/omap3/mem.c |   28 +++++++++++++++-------------
+ 1 files changed, 15 insertions(+), 13 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c
+index dfb7e4c..b828097 100644
+--- a/cpu/arm_cortexa8/omap3/mem.c
+++ b/cpu/arm_cortexa8/omap3/mem.c
+@@ -106,21 +106,23 @@ void make_cs1_contiguous(void)
+  *******************************************************/
+ u32 mem_ok(u32 cs)
+ {
+-       u32 val1, val2, addr;
+       u32 i, val1, val2, addr, size;
+        u32 pattern = 0x12345678;
+ 
+-       addr = OMAP34XX_SDRC_CS0 + get_sdr_cs_offset(cs);
+-
+-       writel(0x0, addr + 0x400);      /* clear pos A */
+-       writel(pattern, addr);          /* pattern to pos B */
+-       writel(0x0, addr + 4);          /* remove pattern off the bus */
+-       val1 = readl(addr + 0x400);     /* get pos A value */
+-       val2 = readl(addr);             /* get val2 */
+       size = get_sdr_cs_offset(cs);
+       addr = OMAP34XX_SDRC_CS0 + size;
+       
+       for (i = 0; i < size; i+=1024) {
+               writel(pattern - i, addr + i);
+       }
+ 
+-       if ((val1 != 0) || (val2 != pattern))   /* see if pos A val changed */
+-               return 0;
+-       else
+-               return 1;
+       for (i = 0; i < size; i+=1024) {
+               val1 = readl(addr + i);
+               if (val1 != (pattern - i)) {
+                       return 0;
+               }
+       }
+       return 1;
+ }
+ 
+ /********************************************************
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0016-env_nand.c-fail-gracefully-if-no-nand-is-present.patch b/recipes-bsp/u-boot/u-boot/0016-env_nand.c-fail-gracefully-if-no-nand-is-present.patch
new file mode 100644
index 00000000..5e83125e
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0016-env_nand.c-fail-gracefully-if-no-nand-is-present.patch
@@ -0,0 +1,27 @@
+From 794e4aa6a5aa5fbe71b08bfe8f5f5f65078fbc68 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:12:16 -0700
+Subject: [PATCH 16/37] env_nand.c:  fail gracefully if no nand is present
+---
+ common/env_nand.c |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+diff --git a/common/env_nand.c b/common/env_nand.c
+index a15a950..325f112 100644
+--- a/common/env_nand.c
+++ b/common/env_nand.c
+@@ -268,6 +268,10 @@ int readenv (size_t offset, u_char * buf)
+ 
+        u_char *char_ptr;
+ 
+       /* fail if no nand detected */
+       if (nand_info[0].type == 0)
+               return 1;
+
+        blocksize = nand_info[0].erasesize;
+        len = min(blocksize, CONFIG_ENV_SIZE);
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0017-OMAP3-add-definitions-to-support-sysinfo-cpu-and-cpu.patch b/recipes-bsp/u-boot/u-boot/0017-OMAP3-add-definitions-to-support-sysinfo-cpu-and-cpu.patch
new file mode 100644
index 00000000..ad5a2131
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0017-OMAP3-add-definitions-to-support-sysinfo-cpu-and-cpu.patch
@@ -0,0 +1,68 @@
+From 34622e1e89b615c999480ab48ec004c16f8ca2d5 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:15:29 -0700
+Subject: [PATCH 17/37] OMAP3: add definitions to support sysinfo cpu and cpu family detection
+---
+ include/asm-arm/arch-omap3/cpu.h   |    6 ------
+ include/asm-arm/arch-omap3/omap3.h |   29 +++++++++++++++++++++++++++++
+ 2 files changed, 29 insertions(+), 6 deletions(-)
+diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
+index f769571..d9eec7e 100644
+--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/include/asm-arm/arch-omap3/cpu.h
+@@ -60,12 +60,6 @@ struct ctrl {
+ #endif /* __ASSEMBLY__ */
+ #endif /* __KERNEL_STRICT_NAMES */
+ 
+-/* cpu type */
+-#define OMAP3503               0x5c00
+-#define OMAP3515               0x1c00
+-#define OMAP3525               0x4c00
+-#define OMAP3530               0x0c00
+-
+ #ifndef __KERNEL_STRICT_NAMES
+ #ifndef __ASSEMBLY__
+ struct ctrl_id {
+diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h
+index 1349b8b..3957c79 100644
+--- a/include/asm-arm/arch-omap3/omap3.h
+++ b/include/asm-arm/arch-omap3/omap3.h
+@@ -184,4 +184,33 @@ struct gpio {
+ #define WIDTH_8BIT             0x0000
+ #define WIDTH_16BIT            0x1000  /* bit pos for 16 bit in gpmc */
+ 
+/*
+ * Hawkeye values
+ */
+#define HAWKEYE_OMAP34XX       0xb7ae
+#define HAWKEYE_AM35XX         0xb868
+#define HAWKEYE_OMAP36XX       0xb891
+
+#define HAWKEYE_SHIFT          12
+
+/*
+ * Define CPU families
+ */
+#define CPU_OMAP34XX           0x3400  /* OMAP34xx/OMAP35 devices */
+#define CPU_AM35XX             0x3500  /* AM35xx devices          */
+#define CPU_OMAP36XX           0x3600  /* OMAP36xx devices        */
+
+/*
+ * Control status register values corresponding to cpu variants
+ */
+#define OMAP3503               0x5c00
+#define OMAP3515               0x1c00
+#define OMAP3525               0x4c00
+#define OMAP3530               0x0c00
+
+#define AM3505                 0x5c00
+#define AM3517                 0x1c00
+
+#define OMAP3730               0x0c00
+
+ #endif
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0018-OMAP3-sys_info-update-cpu-detection-for-36XX-37XX.patch b/recipes-bsp/u-boot/u-boot/0018-OMAP3-sys_info-update-cpu-detection-for-36XX-37XX.patch
new file mode 100644
index 00000000..65f606b4
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0018-OMAP3-sys_info-update-cpu-detection-for-36XX-37XX.patch
@@ -0,0 +1,196 @@
+From 8480eb0272865078290146031e09eb70baed3f6e Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:17:59 -0700
+Subject: [PATCH 18/37] OMAP3 sys_info: update cpu detection for 36XX/37XX
+---
+ cpu/arm_cortexa8/omap3/sys_info.c |  137 ++++++++++++++++++++++++++++---------
+ 1 files changed, 105 insertions(+), 32 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c
+index e227f67..e32a846 100644
+--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
+@@ -79,32 +79,72 @@ u32 get_cpu_type(void)
+ }
+ 
+ /******************************************
+- * get_cpu_rev(void) - extract version info
+ * get_cpu_id(void) - extract cpu id
+ * returns 0 for ES1.0, cpuid otherwise
+  ******************************************/
+-u32 get_cpu_rev(void)
+u32 get_cpu_id(void)
+ {
+-       u32 cpuid = 0;
+        struct ctrl_id *id_base;
+       u32 cpuid = 0;
+ 
+        /*
+         * On ES1.0 the IDCODE register is not exposed on L4
+         * so using CPU ID to differentiate between ES1.0 and > ES1.0.
+         */
+        __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
+-       if ((cpuid & 0xf) == 0x0)
+-               return CPU_3XX_ES10;
+-       else {
+       if ((cpuid & 0xf) == 0x0) {
+               return 0;
+       } else {
+                /* Decode the IDs on > ES1.0 */
+                id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
+ 
+-               cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf;
+               cpuid = readl(&id_base->idcode);
+       }
+ 
+-               /* Some early ES2.0 seem to report ID 0, fix this */
+-               if(cpuid == 0)
+-                       cpuid = CPU_3XX_ES20;
+       return cpuid;
+}
+ 
+-               return cpuid;
+/******************************************
+ * get_cpu_family(void) - extract cpu info
+ ******************************************/
+u32 get_cpu_family(void)
+{
+       u16 hawkeye;
+       u32 cpu_family;
+       u32 cpuid = get_cpu_id();
+
+       if (cpuid == 0)
+               return CPU_OMAP34XX;
+
+       hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
+       switch(hawkeye) {
+               case HAWKEYE_OMAP34XX:
+                       cpu_family = CPU_OMAP34XX;
+                       break;
+               case HAWKEYE_AM35XX:
+                       cpu_family = CPU_AM35XX;
+                       break;
+               case HAWKEYE_OMAP36XX:
+                       cpu_family = CPU_OMAP36XX;
+                       break;
+               default:
+                       cpu_family = CPU_OMAP34XX;
+        }
+
+       return cpu_family;
+}
+
+/******************************************
+ * get_cpu_rev(void) - extract version info
+ ******************************************/
+u32 get_cpu_rev(void)
+{
+       u32 cpuid = get_cpu_id();
+
+       if (cpuid == 0)
+               return CPU_3XX_ES10;
+       else
+               return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
+ }
+ 
+ /*****************************************************************
+@@ -267,24 +307,57 @@ u32 get_device_type(void)
+  */
+ int print_cpuinfo (void)
+ {
+-       char *cpu_s, *sec_s;
+-
+-       switch (get_cpu_type()) {
+-       case OMAP3503:
+-               cpu_s = "3503";
+-               break;
+-       case OMAP3515:
+-               cpu_s = "3515";
+       char *cpu_family_s, *cpu_s, *sec_s;
+
+       switch(get_cpu_family()) {
+       case CPU_OMAP34XX:
+               cpu_family_s = "OMAP";
+               switch (get_cpu_type()) {
+               case OMAP3503:
+                       cpu_s = "3503";
+                       break;
+               case OMAP3515:
+                       cpu_s = "3515";
+                       break;
+               case OMAP3525:
+                       cpu_s = "3525";
+                       break;
+               case OMAP3530:
+                       cpu_s = "3530";
+                       break;
+               default:
+                       cpu_s = "35XX";
+                       break;
+               }
+                break;
+-       case OMAP3525:
+-               cpu_s = "3525";
+       case CPU_AM35XX:
+               cpu_family_s = "AM";
+               switch (get_cpu_type()) {
+               case AM3505:
+                       cpu_s = "3505";
+                       break;
+               case AM3517:
+                       cpu_s = "3517";
+                       break;
+               default:
+                       cpu_s = "35XX";
+                       break;
+               }
+                break;
+-       case OMAP3530:
+-               cpu_s = "3530";
+       case CPU_OMAP36XX:
+               cpu_family_s = "OMAP";
+               switch (get_cpu_type()) {
+               case OMAP3730:
+                       cpu_s = "3630/3730";
+                       break;
+               default:
+                       cpu_s = "36XX/37XX";
+                       break;
+               }
+                break;
+        default:
+               cpu_family_s = "OMAP";
+                cpu_s = "35XX";
+-               break;
+        }
+ 
+        switch (get_device_type()) {
+@@ -304,16 +377,16 @@ int print_cpuinfo (void)
+                sec_s = "?";
+        }
+ 
+-       printf("OMAP%s-%s ES%s, CPU-OPP2, L3-165MHz, ",
+-                       cpu_s, sec_s, rev_s[get_cpu_rev()]);
+       printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, ",
+                       cpu_family_s, cpu_s, sec_s, rev_s[get_cpu_rev()]);
+ 
+-       printf("Max clock-");
+-       if ((get_cpu_rev() >= CPU_3XX_ES31) && (get_sku_id() == SKUID_CLK_720MHZ))
+-               printf("720Mhz\n");
+-       else    printf("600Mhz\n");
+       if (get_cpu_family() == CPU_OMAP34XX)
+               if ((get_cpu_rev() >= CPU_3XX_ES31) && 
+                   (get_sku_id() == SKUID_CLK_720MHZ))
+                       printf("Max clock-720Mhz\n");
+               else printf("Max clock-600Mhz\n");
+       else printf("\n");
+        
+-
+-
+        return 0;
+ }
+ #endif /* CONFIG_DISPLAY_CPUINFO */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0019-OMAP3-clocks-update-clock-setup-for-36XX-37XX.patch b/recipes-bsp/u-boot/u-boot/0019-OMAP3-clocks-update-clock-setup-for-36XX-37XX.patch
new file mode 100644
index 00000000..e5dbec62
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0019-OMAP3-clocks-update-clock-setup-for-36XX-37XX.patch
@@ -0,0 +1,826 @@
+From 0bf419a0faa8c9dc73d7a84f93d7fcb89be3ea21 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:20:56 -0700
+Subject: [PATCH 19/37] OMAP3: clocks: update clock setup for 36XX/37XX
+---
+ cpu/arm_cortexa8/omap3/clock.c            |  559 +++++++++++++++++++++--------
+ cpu/arm_cortexa8/omap3/lowlevel_init.S    |   69 ++++
+ include/asm-arm/arch-omap3/clocks.h       |   17 +
+ include/asm-arm/arch-omap3/clocks_omap3.h |   27 ++
+ 4 files changed, 525 insertions(+), 147 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c
+index 6330c9e..538a183 100644
+--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/cpu/arm_cortexa8/omap3/clock.c
+@@ -47,17 +47,12 @@ u32 get_osc_clk_speed(void)
+        struct s32ktimer *s32k_base = (struct s32ktimer *)SYNC_32KTIMER_BASE;
+ 
+        val = readl(&prm_base->clksrc_ctrl);
+-
+        if (val & SYSCLKDIV_2)
+                cdiv = 2;
+-       else if (val & SYSCLKDIV_1)
+-               cdiv = 1;
+        else
+-               /*
+-                * Should never reach here! (Assume divider as 1)
+-                */
+                cdiv = 1;
+ 
+
+        /* enable timer2 */
+        val = readl(&prcm_base->clksel_wkup) | CLKSEL_GPT1;
+ 
+@@ -67,7 +62,6 @@ u32 get_osc_clk_speed(void)
+        /* Enable I and F Clocks for GPT1 */
+        val = readl(&prcm_base->iclken_wkup) | EN_GPT1 | EN_32KSYNC;
+        writel(val, &prcm_base->iclken_wkup);
+-
+        val = readl(&prcm_base->fclken_wkup) | EN_GPT1;
+        writel(val, &prcm_base->fclken_wkup);
+ 
+@@ -87,13 +81,10 @@ u32 get_osc_clk_speed(void)
+ 
+        /* wait for 40 cycles */
+        while (readl(&s32k_base->s32k_cr) < (start + 20)) ;
+
+        cend = readl(&gpt1_base->tcrr);         /* get end sys_clk count */
+        cdiff = cend - cstart;                  /* get elapsed ticks */
+-
+-       if (cdiv == 2)
+-       {
+-               cdiff *= 2;
+-       }
+       cdiff *= cdiv;
+ 
+        /* based on number of ticks assign speed */
+        if (cdiff > 19000)
+@@ -135,65 +126,25 @@ void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
+        }
+ }
+ 
+/*
+ * OMAP3530 specific functions
+ */
+
+ /******************************************************************************
+- * prcm_init() - inits clocks for PRCM as defined in clocks.h
+- *               called from SRAM, or Flash (using temp SRAM stack).
+ * Initialize CORE DPLL for OMAP34x/35x
+  *****************************************************************************/
+-void prcm_init(void)
+static void dpll3_init_34xx(u32 sil_index, u32 clk_index)
+ {
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_core_dpll_param();
+        void (*f_lock_pll) (u32, u32, u32, u32);
+        int xip_safe, p0, p1, p2, p3;
+-       u32 osc_clk = 0, sys_clkin_sel;
+-       u32 clk_index, sil_index = 0;
+-       struct prm *prm_base = (struct prm *)PRM_BASE;
+-       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+-       dpll_param *dpll_param_p;
+-
+-       f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
+-                               SRAM_VECT_CODE);
+ 
+        xip_safe = is_running_in_sram();
+ 
+-       /*
+-        * Gauge the input clock speed and find out the sys_clkin_sel
+-        * value corresponding to the input clock.
+-        */
+-       osc_clk = get_osc_clk_speed();
+-       get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
+       /* Moving to the right sysclk and ES rev base */
+       ptr = ptr + (3 * clk_index) + sil_index;
+ 
+-       /* set input crystal speed */
+-       sr32(&prm_base->clksel, 0, 3, sys_clkin_sel);
+-
+-       /* If the input clock is greater than 19.2M always divide/2 */
+-       if (sys_clkin_sel > 2) {
+-               /* input clock divider */
+-               sr32(&prm_base->clksrc_ctrl, 6, 2, 2);
+-               clk_index = sys_clkin_sel / 2;
+-       } else {
+-               /* input clock divider */
+-               sr32(&prm_base->clksrc_ctrl, 6, 2, 1);
+-               clk_index = sys_clkin_sel;
+-       }
+-
+-       /*
+-        * The DPLL tables are defined according to sysclk value and
+-        * silicon revision. The clk_index value will be used to get
+-        * the values for that input sysclk from the DPLL param table
+-        * and sil_index will get the values for that SysClk for the
+-        * appropriate silicon rev.
+-        */
+-       if (get_cpu_rev())
+-               sil_index = 1;
+-
+-       /* Unlock MPU DPLL (slows things down, and needed later) */
+-       sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
+-       wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu, LDELAY);
+-
+-       /* Getting the base address of Core DPLL param table */
+-       dpll_param_p = (dpll_param *) get_core_dpll_param();
+-
+-       /* Moving it to the right sysclk and ES rev base */
+-       dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
+        if (xip_safe) {
+                /*
+                 * CORE DPLL
+@@ -208,34 +159,38 @@ void prcm_init(void)
+                 * work. write another value and then default value.
+                 */
+ 
+-               /* m3x2 */
+-               sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2 + 1);
+-               /* m3x2 */
+               /* CM_CLKSEL1_EMU[DIV_DPLL3] */
+               sr32(&prcm_base->clksel1_emu, 16, 5, (CORE_M3X2 + 1)) ;
+                sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2);
+-               /* Set M2 */
+-               sr32(&prcm_base->clksel1_pll, 27, 2, dpll_param_p->m2);
+-               /* Set M */
+-               sr32(&prcm_base->clksel1_pll, 16, 11, dpll_param_p->m);
+-               /* Set N */
+-               sr32(&prcm_base->clksel1_pll, 8, 7, dpll_param_p->n);
+-               /* 96M Src */
+
+               /* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
+               sr32(&prcm_base->clksel1_pll, 27, 5, ptr->m2);
+
+               /* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
+               sr32(&prcm_base->clksel1_pll, 16, 11, ptr->m);
+
+               /* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
+               sr32(&prcm_base->clksel1_pll, 8, 7, ptr->n);
+
+               /* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
+                sr32(&prcm_base->clksel1_pll, 6, 1, 0);
+-               /* ssi */
+
+               /* SSI */
+                sr32(&prcm_base->clksel_core, 8, 4, CORE_SSI_DIV);
+-               /* fsusb */
+               /* FSUSB */
+                sr32(&prcm_base->clksel_core, 4, 2, CORE_FUSB_DIV);
+-               /* l4 */
+               /* L4 */
+                sr32(&prcm_base->clksel_core, 2, 2, CORE_L4_DIV);
+-               /* l3 */
+               /* L3 */
+                sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
+-               /* gfx */
+-               sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV);
+-               /* reset mgr */
+               /* GFX */
+               sr32(&prcm_base->clksel_gfx,  0, 3, GFX_DIV);
+               /* RESET MGR */
+                sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
+-               /* FREQSEL */
+-               sr32(&prcm_base->clken_pll, 4, 4, dpll_param_p->fsel);
+-               /* lock mode */
+-               sr32(&prcm_base->clken_pll, 0, 3, PLL_LOCK);
+               /* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
+               sr32(&prcm_base->clken_pll,   4, 4, ptr->fsel);
+               /* LOCK MODE */
+               sr32(&prcm_base->clken_pll,   0, 3, PLL_LOCK);
+ 
+                wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen,
+                                LDELAY);
+@@ -244,102 +199,411 @@ void prcm_init(void)
+                 * if running from flash, jump to small relocated code
+                 * area in SRAM.
+                 */
+               f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
+                               SRAM_VECT_CODE);
+
+                p0 = readl(&prcm_base->clken_pll);
+                sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
+-               sr32(&p0, 4, 4, dpll_param_p->fsel);    /* FREQSEL */
+               /* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
+               sr32(&p0, 4, 4, ptr->fsel);
+ 
+                p1 = readl(&prcm_base->clksel1_pll);
+-               sr32(&p1, 27, 2, dpll_param_p->m2);     /* Set M2 */
+-               sr32(&p1, 16, 11, dpll_param_p->m);     /* Set M */
+-               sr32(&p1, 8, 7, dpll_param_p->n);               /* Set N */
+-               sr32(&p1, 6, 1, 0);     /* set source for 96M */
+               /* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
+               sr32(&p1, 27, 5, ptr->m2);
+               /* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
+               sr32(&p1, 16, 11, ptr->m);
+               /* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
+               sr32(&p1, 8, 7, ptr->n);
+               /* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
+               sr32(&p1, 6, 1, 0);
+ 
+                p2 = readl(&prcm_base->clksel_core);
+-               sr32(&p2, 8, 4, CORE_SSI_DIV);  /* ssi */
+-               sr32(&p2, 4, 2, CORE_FUSB_DIV); /* fsusb */
+-               sr32(&p2, 2, 2, CORE_L4_DIV);   /* l4 */
+-               sr32(&p2, 0, 2, CORE_L3_DIV);   /* l3 */
+               /* SSI */
+               sr32(&p2, 8, 4, CORE_SSI_DIV);
+               /* FSUSB */
+               sr32(&p2, 4, 2, CORE_FUSB_DIV);
+               /* L4 */
+               sr32(&p2, 2, 2, CORE_L4_DIV);
+               /* L3 */
+               sr32(&p2, 0, 2, CORE_L3_DIV);
+ 
+                p3 = (u32)&prcm_base->idlest_ckgen;
+ 
+                (*f_lock_pll) (p0, p1, p2, p3);
+        }
+}
+ 
+-       /* PER DPLL */
+-       sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
+-       wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
+-
+-       /* Getting the base address to PER DPLL param table */
+-
+-       /* Set N */
+-       dpll_param_p = (dpll_param *) get_per_dpll_param();
+/******************************************************************************
+ * Initialize PER DPLL for OMAP34x/35x
+ *****************************************************************************/
+static void dpll4_init_34xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_per_dpll_param();
+ 
+        /* Moving it to the right sysclk base */
+-       dpll_param_p = dpll_param_p + clk_index;
+       ptr = ptr + clk_index;
+
+       /* EN_PERIPH_DPLL: CM_CLKEN_PLL[16:18] */
+       sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
+       wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
+ 
+        /*
+         * Errata 1.50 Workaround for OMAP3 ES1.0 only
+         * If using default divisors, write default divisor + 1
+         * and then the actual divisor value
+         */
+-       sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2 + 1);     /* set M6 */
+-       sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2);         /* set M6 */
+-       sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2 + 1);       /* set M5 */
+-       sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2);           /* set M5 */
+-       sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2 + 1);       /* set M4 */
+-       sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2);           /* set M4 */
+-       sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2 + 1);       /* set M3 */
+-       sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2);           /* set M3 */
+-       sr32(&prcm_base->clksel3_pll, 0, 5, dpll_param_p->m2 + 1); /* set M2 */
+-       sr32(&prcm_base->clksel3_pll, 0, 5, dpll_param_p->m2);  /* set M2 */
+       /* M6 */
+       sr32(&prcm_base->clksel1_emu, 24, 5, (PER_M6X2 + 1));
+       sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2);
+       /* M5 */
+       sr32(&prcm_base->clksel_cam, 0, 5, (PER_M5X2 + 1));
+       sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2);
+       /* M4 */
+       sr32(&prcm_base->clksel_dss, 0, 5, (PER_M4X2 + 1));
+       sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2);
+       /* M3 */
+       sr32(&prcm_base->clksel_dss, 8, 5, (PER_M3X2 + 1));
+       sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2);
+       /* M2 (DIV_96M): CM_CLKSEL3_PLL[0:4] */
+       sr32(&prcm_base->clksel3_pll, 0, 5, (ptr->m2 + 1));
+       sr32(&prcm_base->clksel3_pll, 0, 5, ptr->m2);
+        /* Workaround end */
+ 
+-       sr32(&prcm_base->clksel2_pll, 8, 11, dpll_param_p->m);  /* set m */
+-       sr32(&prcm_base->clksel2_pll, 0, 7, dpll_param_p->n);   /* set n */
+-       sr32(&prcm_base->clken_pll, 20, 4, dpll_param_p->fsel); /* FREQSEL */
+-       sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK);           /* lock mode */
+       /* M (PERIPH_DPLL_MULT): CM_CLKSEL2_PLL[8:18] */
+       sr32(&prcm_base->clksel2_pll, 8, 11, ptr->m);
+
+       /* N (PERIPH_DPLL_DIV): CM_CLKSEL2_PLL[0:6] */
+       sr32(&prcm_base->clksel2_pll, 0, 7, ptr->n);
+
+       /* FREQSEL (PERIPH_DPLL_FREQSEL): CM_CLKEN_PLL[20:23] */
+       sr32(&prcm_base->clken_pll, 20, 4, ptr->fsel);
+
+       /* LOCK MODE (EN_PERIPH_DPLL): CM_CLKEN_PLL[16:18] */
+       sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK);
+        wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
+}
+ 
+-       /* Getting the base address to MPU DPLL param table */
+-       dpll_param_p = (dpll_param *) get_mpu_dpll_param();
+static void mpu_init_34xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_mpu_dpll_param();
+ 
+-       /* Moving it to the right sysclk and ES rev base */
+-       dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
+       /* Moving to the right sysclk and ES rev base */
+       ptr = ptr + (3 * clk_index) + sil_index;
+ 
+        /* MPU DPLL (unlocked already) */
+ 
+-       /* Set M2 */
+-       sr32(&prcm_base->clksel2_pll_mpu, 0, 5, dpll_param_p->m2);
+-       /* Set M */
+-       sr32(&prcm_base->clksel1_pll_mpu, 8, 11, dpll_param_p->m);
+-       /* Set N */
+-       sr32(&prcm_base->clksel1_pll_mpu, 0, 7, dpll_param_p->n);
+-       /* FREQSEL */
+-       sr32(&prcm_base->clken_pll_mpu, 4, 4, dpll_param_p->fsel);
+-       /* lock mode */
+-       sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
+-       wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu, LDELAY);
+-
+-       /* Getting the base address to IVA DPLL param table */
+-       dpll_param_p = (dpll_param *) get_iva_dpll_param();
+-
+-       /* Moving it to the right sysclk and ES rev base */
+-       dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
+-
+-       /* IVA DPLL (set to 12*20=240MHz) */
+       /* M2 (MPU_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_MPU[0:4] */
+       sr32(&prcm_base->clksel2_pll_mpu, 0, 5, ptr->m2);
+
+       /* M (MPU_DPLL_MULT) : CM_CLKSEL2_PLL_MPU[8:18] */
+       sr32(&prcm_base->clksel1_pll_mpu, 8, 11, ptr->m);
+
+       /* N (MPU_DPLL_DIV) : CM_CLKSEL2_PLL_MPU[0:6] */
+       sr32(&prcm_base->clksel1_pll_mpu, 0, 7, ptr->n);
+
+       /* FREQSEL (MPU_DPLL_FREQSEL) : CM_CLKEN_PLL_MPU[4:7] */
+       sr32(&prcm_base->clken_pll_mpu, 4, 4, ptr->fsel);
+}
+
+static void iva_init_34xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_iva_dpll_param();
+
+       /* Moving to the right sysclk and ES rev base */
+       ptr = ptr + (3 * clk_index) + sil_index;
+
+       /* IVA DPLL */
+       /* EN_IVA2_DPLL : CM_CLKEN_PLL_IVA2[0:2] */
+        sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_STOP);
+        wait_on_value(ST_IVA2_CLK, 0, &prcm_base->idlest_pll_iva2, LDELAY);
+-       /* set M2 */
+-       sr32(&prcm_base->clksel2_pll_iva2, 0, 5, dpll_param_p->m2);
+-       /* set M */
+-       sr32(&prcm_base->clksel1_pll_iva2, 8, 11, dpll_param_p->m);
+-       /* set N */
+-       sr32(&prcm_base->clksel1_pll_iva2, 0, 7, dpll_param_p->n);
+-       /* FREQSEL */
+-       sr32(&prcm_base->clken_pll_iva2, 4, 4, dpll_param_p->fsel);
+-       /* lock mode */
+
+       /* M2 (IVA2_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_IVA2[0:4] */
+       sr32(&prcm_base->clksel2_pll_iva2, 0, 5, ptr->m2);
+
+       /* M (IVA2_DPLL_MULT) : CM_CLKSEL1_PLL_IVA2[8:18] */
+       sr32(&prcm_base->clksel1_pll_iva2, 8, 11, ptr->m);
+
+       /* N (IVA2_DPLL_DIV) : CM_CLKSEL1_PLL_IVA2[0:6] */
+       sr32(&prcm_base->clksel1_pll_iva2, 0, 7, ptr->n);
+
+       /* FREQSEL (IVA2_DPLL_FREQSEL) : CM_CLKEN_PLL_IVA2[4:7] */
+       sr32(&prcm_base->clken_pll_iva2, 4, 4, ptr->fsel);
+
+       /* LOCK MODE (EN_IVA2_DPLL) : CM_CLKEN_PLL_IVA2[0:2] */
+        sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_LOCK);
+
+        wait_on_value(ST_IVA2_CLK, 1, &prcm_base->idlest_pll_iva2, LDELAY);
+}
+
+/*
+ * OMAP3630 specific functions
+ */
+
+/******************************************************************************
+ * Initialize PER DPLL for OMAP36x/37x
+ *****************************************************************************/
+static void dpll3_init_36xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_36x_core_dpll_param();
+       void (*f_lock_pll) (u32, u32, u32, u32);
+       int xip_safe, p0, p1, p2, p3;
+
+       xip_safe = is_running_in_sram();
+
+       /* Moving it to the right sysclk base */
+       ptr += clk_index;
+
+       if (xip_safe) {
+               /* CORE DPLL */
+
+               /* Select relock bypass: CM_CLKEN_PLL[0:2] */
+               sr32(&prcm_base->clken_pll, 0, 3, PLL_FAST_RELOCK_BYPASS);
+               wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen,
+                               LDELAY);
+
+               /* CM_CLKSEL1_EMU[DIV_DPLL3] */
+               sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2);
+
+               /* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
+               sr32(&prcm_base->clksel1_pll, 27, 5, ptr->m2);
+
+               /* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
+               sr32(&prcm_base->clksel1_pll, 16, 11, ptr->m);
+
+               /* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
+               sr32(&prcm_base->clksel1_pll, 8, 7, ptr->n);
+
+               /* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
+               sr32(&prcm_base->clksel1_pll, 6, 1, 0);
+
+               /* SSI */
+               sr32(&prcm_base->clksel_core, 8, 4, CORE_SSI_DIV);
+               /* FSUSB */
+               sr32(&prcm_base->clksel_core, 4, 2, CORE_FUSB_DIV);
+               /* L4 */
+               sr32(&prcm_base->clksel_core, 2, 2, CORE_L4_DIV);
+               /* L3 */
+               sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
+               /* GFX */
+               sr32(&prcm_base->clksel_gfx,  0, 3, GFX_DIV);
+               /* RESET MGR */
+               sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
+               /* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
+               sr32(&prcm_base->clken_pll,   4, 4, ptr->fsel);
+               /* LOCK MODE */
+               sr32(&prcm_base->clken_pll,   0, 3, PLL_LOCK);
+
+               wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen,
+                               LDELAY);
+       } else if (is_running_in_flash()) {
+               /*
+                * if running from flash, jump to small relocated code
+                * area in SRAM.
+                */
+               f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
+                               SRAM_VECT_CODE);
+
+               p0 = readl(&prcm_base->clken_pll);
+               sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
+               /* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
+               sr32(&p0, 4, 4, ptr->fsel);
+
+               p1 = readl(&prcm_base->clksel1_pll);
+               /* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
+               sr32(&p1, 27, 5, ptr->m2);
+               /* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
+               sr32(&p1, 16, 11, ptr->m);
+               /* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
+               sr32(&p1, 8, 7, ptr->n);
+               /* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
+               sr32(&p1, 6, 1, 0);
+
+               p2 = readl(&prcm_base->clksel_core);
+               /* SSI */
+               sr32(&p2, 8, 4, CORE_SSI_DIV);
+               /* FSUSB */
+               sr32(&p2, 4, 2, CORE_FUSB_DIV);
+               /* L4 */
+               sr32(&p2, 2, 2, CORE_L4_DIV);
+               /* L3 */
+               sr32(&p2, 0, 2, CORE_L3_DIV);
+
+               p3 = (u32)&prcm_base->idlest_ckgen;
+
+               (*f_lock_pll) (p0, p1, p2, p3);
+       }
+}
+
+static void dpll4_init_36xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       struct dpll_per_36x_param *ptr;
+
+       ptr = (struct dpll_per_36x_param *)get_36x_per_dpll_param();
+
+       /* Moving it to the right sysclk base */
+       ptr += clk_index;
+
+       /* EN_PERIPH_DPLL: CM_CLKEN_PLL[16:18] */
+       sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
+       wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
+
+       /* M6 (DIV_DPLL4): CM_CLKSEL1_EMU[24:29] */
+       sr32(&prcm_base->clksel1_emu, 24, 6, ptr->m6);
+
+       /* M5 (CLKSEL_CAM): CM_CLKSEL1_EMU[0:5] */
+       sr32(&prcm_base->clksel_cam, 0, 6, ptr->m5);
+
+       /* M4 (CLKSEL_DSS1): CM_CLKSEL_DSS[0:5] */
+       sr32(&prcm_base->clksel_dss, 0, 6, ptr->m4);
+
+       /* M3 (CLKSEL_DSS1): CM_CLKSEL_DSS[8:13] */
+       sr32(&prcm_base->clksel_dss, 8, 6, ptr->m3);
+
+       /* M2 (DIV_96M): CM_CLKSEL3_PLL[0:4] */
+       sr32(&prcm_base->clksel3_pll, 0, 5, ptr->m2);
+
+       /* M (PERIPH_DPLL_MULT): CM_CLKSEL2_PLL[8:19] */
+       sr32(&prcm_base->clksel2_pll, 8, 12, ptr->m);
+
+       /* N (PERIPH_DPLL_DIV): CM_CLKSEL2_PLL[0:6] */
+       sr32(&prcm_base->clksel2_pll, 0, 7, ptr->n);
+
+       /* M2DIV (CLKSEL_96M): CM_CLKSEL_CORE[12:13] */
+       sr32(&prcm_base->clksel_core, 12, 2, ptr->m2div);
+
+       /* LOCK MODE (EN_PERIPH_DPLL): CM_CLKEN_PLL[16:18] */
+       sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK);
+       wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
+}
+
+static void mpu_init_36xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *) get_36x_mpu_dpll_param();
+
+       /* Moving to the right sysclk */
+       ptr += clk_index;
+
+       /* MPU DPLL (unlocked already */
+
+       /* M2 (MPU_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_MPU[0:4] */
+       sr32(&prcm_base->clksel2_pll_mpu, 0, 5, ptr->m2);
+
+       /* M (MPU_DPLL_MULT) : CM_CLKSEL2_PLL_MPU[8:18] */
+       sr32(&prcm_base->clksel1_pll_mpu, 8, 11, ptr->m);
+
+       /* N (MPU_DPLL_DIV) : CM_CLKSEL2_PLL_MPU[0:6] */
+       sr32(&prcm_base->clksel1_pll_mpu, 0, 7, ptr->n);
+}
+
+static void iva_init_36xx(u32 sil_index, u32 clk_index)
+{
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       dpll_param *ptr = (dpll_param *)get_36x_iva_dpll_param();
+
+       /* Moving to the right sysclk */
+       ptr += clk_index;
+
+       /* IVA DPLL */
+       /* EN_IVA2_DPLL : CM_CLKEN_PLL_IVA2[0:2] */
+       sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_STOP);
+       wait_on_value(ST_IVA2_CLK, 0, &prcm_base->idlest_pll_iva2, LDELAY);
+
+       /* M2 (IVA2_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_IVA2[0:4] */
+       sr32(&prcm_base->clksel2_pll_iva2, 0, 5, ptr->m2);
+
+       /* M (IVA2_DPLL_MULT) : CM_CLKSEL1_PLL_IVA2[8:18] */
+       sr32(&prcm_base->clksel1_pll_iva2, 8, 11, ptr->m);
+
+       /* N (IVA2_DPLL_DIV) : CM_CLKSEL1_PLL_IVA2[0:6] */
+       sr32(&prcm_base->clksel1_pll_iva2, 0, 7, ptr->n);
+
+       /* LOCK (MODE (EN_IVA2_DPLL) : CM_CLKEN_PLL_IVA2[0:2] */
+       sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_LOCK);
+
+       wait_on_value(ST_IVA2_CLK, 1, &prcm_base->idlest_pll_iva2, LDELAY);
+}
+
+/******************************************************************************
+ * prcm_init() - inits clocks for PRCM as defined in clocks.h
+ *               called from SRAM, or Flash (using temp SRAM stack).
+ *****************************************************************************/
+void prcm_init(void)
+{
+       u32 osc_clk = 0, sys_clkin_sel;
+       u32 clk_index, sil_index = 0;
+       struct prm *prm_base = (struct prm *)PRM_BASE;
+       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+       /*
+        * Gauge the input clock speed and find out the sys_clkin_sel
+        * value corresponding to the input clock.
+        */
+       osc_clk = get_osc_clk_speed();
+       get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
+
+       /* set input crystal speed */
+       sr32(&prm_base->clksel, 0, 3, sys_clkin_sel);
+
+       /* If the input clock is greater than 19.2M always divide/2 */
+       if (sys_clkin_sel > 2) {
+               /* input clock divider */
+               sr32(&prm_base->clksrc_ctrl, 6, 2, 2);
+               clk_index = sys_clkin_sel / 2;
+       } else {
+               /* input clock divider */
+               sr32(&prm_base->clksrc_ctrl, 6, 2, 1);
+               clk_index = sys_clkin_sel;
+       }
+
+       if (get_cpu_family() == CPU_OMAP36XX) {
+               /* Unlock MPU DPLL (slows things down, and needed later) */
+               sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
+               wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu,
+                               LDELAY);
+
+               dpll3_init_36xx(0, clk_index);
+               dpll4_init_36xx(0, clk_index);
+               iva_init_36xx(0, clk_index);
+               mpu_init_36xx(0, clk_index);
+
+               /* Lock MPU DPLL to set frequency */
+               sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
+               wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu,
+                               LDELAY);
+       } else {
+               /*
+                * The DPLL tables are defined according to sysclk value and
+                * silicon revision. The clk_index value will be used to get
+                * the values for that input sysclk from the DPLL param table
+                * and sil_index will get the values for that SysClk for the
+                * appropriate silicon rev.
+                */
+               if (((get_cpu_family() == CPU_OMAP34XX)
+                               && (get_cpu_rev() >= CPU_3XX_ES20)) ||
+                       (get_cpu_family() == CPU_AM35XX))
+                       sil_index = 1;
+
+               /* Unlock MPU DPLL (slows things down, and needed later) */
+               sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
+               wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu,
+                               LDELAY);
+
+               dpll3_init_34xx(sil_index, clk_index);
+               dpll4_init_34xx(sil_index, clk_index);
+               iva_init_34xx(sil_index, clk_index);
+               mpu_init_34xx(sil_index, clk_index);
+
+               /* Lock MPU DPLL to set frequency */
+               sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
+               wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu,
+                               LDELAY);
+       }
+ 
+        /* Set up GPTimers to sys_clk source only */
+        sr32(&prcm_base->clksel_per, 0, 8, 0xff);
+@@ -414,3 +678,4 @@ void per_clocks_enable(void)
+ 
+        sdelay(1000);
+ }
+
+diff --git a/cpu/arm_cortexa8/omap3/lowlevel_init.S b/cpu/arm_cortexa8/omap3/lowlevel_init.S
+index 73063ec..2045e4e 100644
+--- a/cpu/arm_cortexa8/omap3/lowlevel_init.S
+++ b/cpu/arm_cortexa8/omap3/lowlevel_init.S
+@@ -359,3 +359,72 @@ per_dpll_param:
+ get_per_dpll_param:
+        adr     r0, per_dpll_param
+        mov     pc, lr
+
+/*
+ * Tables for 36x/37x devices
+ *
+ */
+mpu_36x_dpll_param:
+/* 12MHz */
+.word 50, 0, 0, 1
+/* 13MHz */
+.word 600, 12, 0, 1
+/* 19.2MHz */
+.word 125, 3, 0, 1
+/* 26MHz */
+.word 300, 12, 0, 1
+/* 38.4MHz */
+.word 125, 7, 0, 1
+
+iva_36x_dpll_param:
+/* 12MHz */
+.word 130, 2, 0, 1
+/* 13MHz */
+.word 40, 0, 0, 1
+/* 19.2MHz */
+.word 325, 11, 0, 1
+/* 26MHz */
+.word 20, 0, 0, 1
+/* 38.4MHz */
+.word 325, 23, 0, 1
+
+core_36x_dpll_param:
+/* 12MHz */
+.word 100, 2, 0, 1
+/* 13MHz */
+.word 400, 12, 0, 1
+/* 19.2MHz */
+.word 375, 17, 0, 1
+/* 26MHz */
+.word 200, 12, 0, 1
+/* 38.4MHz */
+.word 375, 35, 0, 1
+
+per_36x_dpll_param:
+/*    SYSCLK    M       N      M2      M3      M4     M5      M6      m2DIV */
+.word 12000,    360,    4,     9,      16,     5,     4,      3,      1
+.word 13000,    864,   12,     9,      16,     9,     4,      3,      1
+.word 19200,    360,    7,     9,      16,     5,     4,      3,      1
+.word 26000,    432,   12,     9,      16,     9,     4,      3,      1
+.word 38400,    360,   15,     9,      16,     5,     4,      3,      1
+
+.globl get_36x_mpu_dpll_param
+get_36x_mpu_dpll_param:
+       adr     r0, mpu_36x_dpll_param
+       mov     pc, lr
+
+.globl get_36x_iva_dpll_param
+get_36x_iva_dpll_param:
+       adr     r0, iva_36x_dpll_param
+       mov     pc, lr
+
+.globl get_36x_core_dpll_param
+get_36x_core_dpll_param:
+       adr     r0, core_36x_dpll_param
+       mov     pc, lr
+
+.globl get_36x_per_dpll_param
+get_36x_per_dpll_param:
+       adr     r0, per_36x_dpll_param
+       mov     pc, lr
+
+diff --git a/include/asm-arm/arch-omap3/clocks.h b/include/asm-arm/arch-omap3/clocks.h
+index 71a0cb6..a5f2d08 100644
+--- a/include/asm-arm/arch-omap3/clocks.h
+++ b/include/asm-arm/arch-omap3/clocks.h
+@@ -51,12 +51,29 @@ typedef struct {
+        unsigned int m2;
+ } dpll_param;
+ 
+struct dpll_per_36x_param {
+        unsigned int sys_clk;
+        unsigned int m;
+        unsigned int n;
+        unsigned int m2;
+        unsigned int m3;
+        unsigned int m4;
+        unsigned int m5;
+        unsigned int m6;
+        unsigned int m2div;
+};
+
+ /* Following functions are exported from lowlevel_init.S */
+ extern dpll_param *get_mpu_dpll_param(void);
+ extern dpll_param *get_iva_dpll_param(void);
+ extern dpll_param *get_core_dpll_param(void);
+ extern dpll_param *get_per_dpll_param(void);
+ 
+extern dpll_param *get_36x_mpu_dpll_param(void);
+extern dpll_param *get_36x_iva_dpll_param(void);
+extern dpll_param *get_36x_core_dpll_param(void);
+extern dpll_param *get_36x_per_dpll_param(void);
+
+ extern void *_end_vect, *_start;
+ 
+ #endif
+diff --git a/include/asm-arm/arch-omap3/clocks_omap3.h b/include/asm-arm/arch-omap3/clocks_omap3.h
+index 661407b..30ef690 100644
+--- a/include/asm-arm/arch-omap3/clocks_omap3.h
+++ b/include/asm-arm/arch-omap3/clocks_omap3.h
+@@ -282,4 +282,31 @@
+ #define PER_FSEL_38P4          0x07
+ #define PER_M2_38P4            0x09
+ 
+/* 36XX PER DPLL */
+
+#define PER_36XX_M_12          0x1B0
+#define PER_36XX_N_12          0x05
+#define PER_36XX_FSEL_12       0x07
+#define PER_36XX_M2_12         0x09
+
+#define PER_36XX_M_13          0x360
+#define PER_36XX_N_13          0x0C
+#define PER_36XX_FSEL_13       0x03
+#define PER_36XX_M2_13         0x09
+
+#define PER_36XX_M_19P2                0x1C2
+#define PER_36XX_N_19P2                0x09
+#define PER_36XX_FSEL_19P2     0x07
+#define PER_36XX_M2_19P2       0x09
+
+#define PER_36XX_M_26          0x1B0
+#define PER_36XX_N_26          0x0C
+#define PER_36XX_FSEL_26       0x07
+#define PER_36XX_M2_26         0x09
+
+#define PER_36XX_M_38P4                0x1C2
+#define PER_36XX_N_38P4                0x13
+#define PER_36XX_FSEL_38P4     0x07
+#define PER_36XX_M2_38P4       0x09
+
+ #endif /* endif _CLOCKS_OMAP3_H_ */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0020-OMAP3-beagle-add-support-for-Beagle-xM.patch b/recipes-bsp/u-boot/u-boot/0020-OMAP3-beagle-add-support-for-Beagle-xM.patch
new file mode 100644
index 00000000..e6ae0dc7
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0020-OMAP3-beagle-add-support-for-Beagle-xM.patch
@@ -0,0 +1,137 @@
+From 27c6c30dbb5de0c0ed30ceaf69bb0e9f12149c03 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Tue, 23 Mar 2010 09:21:49 -0700
+Subject: [PATCH 20/37] OMAP3: beagle: add support for Beagle xM
+---
+ board/ti/beagle/beagle.c       |   23 +++++++++++++++--------
+ board/ti/beagle/beagle.h       |   34 ++++++++++++++++++++++++++++++----
+ include/configs/omap3_beagle.h |    1 +
+ 3 files changed, 46 insertions(+), 12 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index b4ea7e6..d357588 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -75,7 +75,7 @@ int beagle_get_revision(void)
+  *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
+  *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
+  *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
+- *             GPIO173, GPIO172, GPIO171: 0 0 0 => D
+ *             GPIO173, GPIO172, GPIO171: 0 0 0 => XM
+  */
+ void beagle_identify(void)
+ {
+@@ -108,29 +108,36 @@ int misc_init_r(void)
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+ 
+-       printf("Board revision ");
+        switch (beagle_revision) {
+        case REVISION_AXBX:
+-               printf("Ax/Bx\n");
+               printf("Beagle Rev Ax/Bx\n");
+                break;
+        case REVISION_CX:
+-               printf("C1/C2/C3\n");
+               printf("Beagle Rev C1/C2/C3\n");
+                MUX_BEAGLE_C();
+                break;
+        case REVISION_C4:
+-               printf("C4\n");
+               printf("Beagle Rev C4\n");
+                MUX_BEAGLE_C();
+                /* Set VAUX2 to 1.8V for EHCI PHY */
+                twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+                                        TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                        TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                        TWL4030_PM_RECEIVER_DEV_GRP_P1);
+               setenv("mpurate", "720");
+                break;
+-       case REVISION_D:
+-               printf("D\n");
+       case REVISION_XM:
+               printf("Beagle xM Rev A\n");
+               MUX_BEAGLE_XM();
+               /* Set VAUX2 to 1.8V for EHCI PHY */
+               twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+                                       TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                       TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                       TWL4030_PM_RECEIVER_DEV_GRP_P1);
+               setenv("mpurate", "720");
+                break;
+        default:
+-               printf("unknown 0x%02x\n", beagle_revision);
+               printf("Beagle unknown 0x%02x\n", beagle_revision);
+        }
+ 
+        /* Configure GPIOs to output */
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index d95fd78..fd06d46 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -38,7 +38,7 @@ const omap3_sysinfo sysinfo = {
+ #define REVISION_AXBX  0x7
+ #define REVISION_CX    0x6
+ #define REVISION_C4    0x5
+-#define REVISION_D     0x0
+#define REVISION_XM    0x0
+ 
+ /*
+  * IEN  - Input Enable
+@@ -379,11 +379,37 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(SDRC_CKE1),          (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
+ 
+ #define MUX_BEAGLE_C() \
+-       MUX_VAL(CP(MCBSP3_DX),          (IEN | PTD | DIS | M4)) /*GPIO_140*/\
+-       MUX_VAL(CP(MCBSP3_DR),          (IEN | PTD | DIS | M4)) /*GPIO_142*/\
+-       MUX_VAL(CP(MCBSP3_CLKX),        (IEN | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+        MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
+        MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+        MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/
+ 
+#define MUX_BEAGLE_XM() \
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
+       MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+       MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+       MUX_VAL(CP(DSS_DATA0),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA1),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA2),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA3),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA4),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA5),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA18),         (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\
+       MUX_VAL(CP(DSS_DATA19),         (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\
+       MUX_VAL(CP(DSS_DATA20),         (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\
+       MUX_VAL(CP(DSS_DATA21),         (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\
+       MUX_VAL(CP(DSS_DATA22),         (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\
+       MUX_VAL(CP(DSS_DATA23),         (IDIS | PTD | DIS | M3)) /*DSS_DATA5*/\
+       MUX_VAL(CP(SYS_BOOT0),          (IDIS | PTD | DIS | M3)) /*DSS_DATA18*/\
+       MUX_VAL(CP(SYS_BOOT1),          (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\
+       MUX_VAL(CP(SYS_BOOT3),          (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\
+       MUX_VAL(CP(SYS_BOOT4),          (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\
+       MUX_VAL(CP(SYS_BOOT5),          (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
+       MUX_VAL(CP(SYS_BOOT6),          (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/ 
+
+ #endif
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ce347cd..bba36df 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -157,6 +157,7 @@
+ /*
+  * Board NAND Info.
+  */
+#define CONFIG_SYS_NAND_QUIET_TEST     1
+ #define CONFIG_NAND_OMAP_GPMC
+ #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
+                                                        /* to access nand */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0021-OMAP3-Beagle-Overo-remove-omapfb.debug-y-from-defaul.patch b/recipes-bsp/u-boot/u-boot/0021-OMAP3-Beagle-Overo-remove-omapfb.debug-y-from-defaul.patch
new file mode 100644
index 00000000..01aedc87
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0021-OMAP3-Beagle-Overo-remove-omapfb.debug-y-from-defaul.patch
@@ -0,0 +1,53 @@
+From e26b222adeea78777a89e9b0d0aefed67cde7d55 Mon Sep 17 00:00:00 2001
+From: Steve Sakoman <steve@sakoman.com>
+Date: Thu, 25 Mar 2010 06:54:47 -0700
+Subject: [PATCH 21/37] OMAP3: Beagle, Overo: remove omapfb.debug=y from default env
+---
+ include/configs/omap3_beagle.h |    2 --
+ include/configs/omap3_overo.h  |    2 --
+ 2 files changed, 0 insertions(+), 4 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index bba36df..c156cea 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -195,7 +195,6 @@
+                "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+-               "omapfb.debug=y " \
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${mmcroot} " \
+                "rootfstype=${mmcrootfstype}\0" \
+@@ -203,7 +202,6 @@
+                "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+-               "omapfb.debug=y " \
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${nandroot} " \
+                "rootfstype=${nandrootfstype}\0" \
+diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
+index fdbeb67..418e2ea 100644
+--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
+@@ -164,7 +164,6 @@
+                "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+-               "omapfb.debug=y " \
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${mmcroot} " \
+                "rootfstype=${mmcrootfstype}\0" \
+@@ -172,7 +171,6 @@
+                "mpurate=${mpurate} " \
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+-               "omapfb.debug=y " \
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${nandroot} " \
+                "rootfstype=${nandrootfstype}\0" \
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0022-OMAP3-beagle-implement-expansionboard-detection-base.patch b/recipes-bsp/u-boot/u-boot/0022-OMAP3-beagle-implement-expansionboard-detection-base.patch
new file mode 100644
index 00000000..91d09abe
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0022-OMAP3-beagle-implement-expansionboard-detection-base.patch
@@ -0,0 +1,157 @@
+From 851d35fab7f93400a1d714524b5e986206d9b0c4 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Thu, 25 Mar 2010 16:07:23 +0100
+Subject: [PATCH 22/37] OMAP3: beagle: implement expansionboard detection based on board/overo.c code
+---
+ board/ti/beagle/beagle.c |   78 ++++++++++++++++++++++++++++++++++++++++++++++
+ board/ti/beagle/beagle.h |   25 +++++++++++++-
+ 2 files changed, 101 insertions(+), 2 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index d357588..8c5b88c 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -38,6 +38,31 @@
+ #include <asm/mach-types.h>
+ #include "beagle.h"
+ 
+static struct {
+       unsigned int device_vendor;
+       unsigned char revision;
+       unsigned char content;
+       unsigned char fab_revision[8];
+       unsigned char env_var[16];
+       unsigned char env_setting[64];
+} expansion_config;
+
+#define TWL4030_I2C_BUS                        0
+
+#define EXPANSION_EEPROM_I2C_BUS       1
+#define EXPANSION_EEPROM_I2C_ADDRESS   0x50
+
+#define TINCANTOOLS_VENDORID   0x0100
+#define GUMSTIX_VENDORID               0x0200
+#define SPECIALCOMP_VENDORID   0x0300
+
+#define TINCANTOOLS_ZIPPY              0x01000100
+#define TINCANTOOLS_ZIPPY2             0x02000100
+#define TINCANTOOLS_TRAINER            0x03000100
+#define TINCANTOOLS_SHOWDOG            0x04000100
+
+#define BEAGLE_NO_EEPROM               0xffffffff
+
+ static int beagle_revision;
+ 
+ /*
+@@ -95,6 +120,27 @@ void beagle_identify(void)
+ }
+ 
+ /*
+ * Routine: get_expansion_id
+ * Description: This function checks for expansion board by checking I2C
+ *             bus 2 for the availability of an AT24C01B serial EEPROM.
+ *             returns the device_vendor field from the EEPROM
+ */
+unsigned int get_expansion_id(void)
+{
+       i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
+
+       /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
+       if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1)
+               return BEAGLE_NO_EEPROM;
+
+       /* read configuration data */
+       i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
+                sizeof(expansion_config));
+
+       return expansion_config.device_vendor;
+}
+
+/*
+  * Routine: misc_init_r
+  * Description: Configure board specific parts
+  */
+@@ -104,6 +150,38 @@ int misc_init_r(void)
+        struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+ 
+        beagle_identify();
+       switch (get_expansion_id()) {
+               case TINCANTOOLS_ZIPPY:
+                       printf("Recognized Tincantools Zippy expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.fab_revision);
+                       MUX_TINCANTOOLS_ZIPPY();
+                       break;
+               case TINCANTOOLS_ZIPPY2:
+                       printf("Recognized Tincantools Zippy2 expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.fab_revision);
+                       MUX_TINCANTOOLS_ZIPPY();
+                       break;
+               case TINCANTOOLS_TRAINER:
+                       printf("Recognized Tincantools Trainer expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.fab_revision);
+                       break;
+               case TINCANTOOLS_SHOWDOG:
+                       printf("Recognized Tincantools Showdow expansion board (rev %d %s)\n",
+                               expansion_config.revision, expansion_config.fab_revision);
+                       /* Place holder for DSS2 definition for showdog lcd */
+                       setenv("defaultdisplay", "showdoglcd");
+                       break;
+               case BEAGLE_NO_EEPROM:
+                       printf("No EEPROM on expansion board\n");
+                       break;
+               default:
+                       printf("Unrecognized expansion board: %x\n", expansion_config.device_vendor);
+       }
+
+       if (expansion_config.content == 1)
+               setenv(expansion_config.env_var, expansion_config.env_setting);
+
+       i2c_set_bus_num(TWL4030_I2C_BUS);
+ 
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index fd06d46..ec4f831 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -260,8 +260,8 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(HSUSB0_DATA7),       (IEN  | PTD | DIS | M0)) /*HSUSB0_DATA7*/\
+        MUX_VAL(CP(I2C1_SCL),           (IEN  | PTU | EN  | M0)) /*I2C1_SCL*/\
+        MUX_VAL(CP(I2C1_SDA),           (IEN  | PTU | EN  | M0)) /*I2C1_SDA*/\
+-       MUX_VAL(CP(I2C2_SCL),           (IEN  | PTU | EN  | M4)) /*GPIO_168*/\
+-       MUX_VAL(CP(I2C2_SDA),           (IEN  | PTU | EN  | M4)) /*GPIO_183*/\
+       MUX_VAL(CP(I2C2_SCL),       (IEN  | PTU | EN  | M0)) /*I2C2_SCL*/\
+       MUX_VAL(CP(I2C2_SDA),       (IEN  | PTU | EN  | M0)) /*I2C2_SDA*/\
+        MUX_VAL(CP(I2C3_SCL),           (IEN  | PTU | EN  | M0)) /*I2C3_SCL*/\
+        MUX_VAL(CP(I2C3_SDA),           (IEN  | PTU | EN  | M0)) /*I2C3_SDA*/\
+        MUX_VAL(CP(I2C4_SCL),           (IEN  | PTU | EN  | M0)) /*I2C4_SCL*/\
+@@ -412,4 +412,25 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(SYS_BOOT5),          (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
+        MUX_VAL(CP(SYS_BOOT6),          (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/ 
+ 
+#define MUX_TINCANTOOLS_ZIPPY() \
+       MUX_VAL(CP(MMC2_CLK),       (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+       MUX_VAL(CP(MMC2_CMD),       (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
+       MUX_VAL(CP(MMC2_DAT0),      (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
+       MUX_VAL(CP(MMC2_DAT1),      (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
+       MUX_VAL(CP(MMC2_DAT2),      (IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
+       MUX_VAL(CP(MMC2_DAT3),      (IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
+       MUX_VAL(CP(MMC2_DAT4),      (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT0*/\
+       MUX_VAL(CP(MMC2_DAT5),      (IEN  | PTU | EN  | M1)) /*MMC2_DIR_DAT1*/\
+       MUX_VAL(CP(MMC2_DAT6),      (IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
+       MUX_VAL(CP(MMC2_DAT7),      (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
+       MUX_VAL(CP(MCBSP1_CLKR),    (IEN  | PTU | EN  | M1)) /*MCSPI4_CLK*/\
+       MUX_VAL(CP(MCBSP1_FSR),     (IEN  | PTU | EN  | M4)) /*GPIO_157*/\
+       MUX_VAL(CP(MCBSP1_DX),      (IEN  | PTD | EN  | M1)) /*MCSPI4_SIMO*/\
+       MUX_VAL(CP(MCBSP1_DR),      (IEN  | PTD | DIS | M1)) /*MCSPI4_SOMI*/\
+       MUX_VAL(CP(MCBSP1_FSX),     (IEN  | PTD | EN  | M1)) /*MCSPI4_CS0*/\
+       MUX_VAL(CP(MCBSP1_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_162*/\
+       MUX_VAL(CP(MCBSP3_DX),      (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),      (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+
+ #endif
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0023-beagleboard-display-message-about-I2C-errors-being-e.patch b/recipes-bsp/u-boot/u-boot/0023-beagleboard-display-message-about-I2C-errors-being-e.patch
new file mode 100644
index 00000000..d7ac7131
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0023-beagleboard-display-message-about-I2C-errors-being-e.patch
@@ -0,0 +1,26 @@
+From 4b07f3a9f045453e5e7b5950e721ed35d9bd308a Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 31 Mar 2010 14:24:25 +0200
+Subject: [PATCH 23/37] beagleboard: display message about I2C errors being expected when no expansion boards are present
+---
+ board/ti/beagle/beagle.c |    3 +++
+ 1 files changed, 3 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 8c5b88c..c9c9a58 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -150,6 +150,9 @@ int misc_init_r(void)
+        struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+ 
+        beagle_identify();
+
+       printf("\nProbing for expansion boards, if none are connected you'll see a harmless I2C error.\n");
+
+        switch (get_expansion_id()) {
+                case TINCANTOOLS_ZIPPY:
+                        printf("Recognized Tincantools Zippy expansion board (rev %d %s)\n",
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0024-beagleboard-fix-TCT-expansionboard-IDs.patch b/recipes-bsp/u-boot/u-boot/0024-beagleboard-fix-TCT-expansionboard-IDs.patch
new file mode 100644
index 00000000..dc5e69a2
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0024-beagleboard-fix-TCT-expansionboard-IDs.patch
@@ -0,0 +1,27 @@
+From a4fa85edf5ff6aa6a06f437acc8694dd866f6618 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 11 Apr 2010 12:14:43 +0200
+Subject: [PATCH 24/37] beagleboard: fix TCT expansionboard IDs
+---
+ board/ti/beagle/beagle.c |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index c9c9a58..7cb6d1f 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -58,8 +58,8 @@ static struct {
+ 
+ #define TINCANTOOLS_ZIPPY              0x01000100
+ #define TINCANTOOLS_ZIPPY2             0x02000100
+-#define TINCANTOOLS_TRAINER            0x03000100
+-#define TINCANTOOLS_SHOWDOG            0x04000100
+#define TINCANTOOLS_TRAINER            0x04000100
+#define TINCANTOOLS_SHOWDOG            0x03000100
+ 
+ #define BEAGLE_NO_EEPROM               0xffffffff
+ 
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0025-Add-DSS-driver-for-OMAP3.patch b/recipes-bsp/u-boot/u-boot/0025-Add-DSS-driver-for-OMAP3.patch
new file mode 100644
index 00000000..da517b25
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0025-Add-DSS-driver-for-OMAP3.patch
@@ -0,0 +1,353 @@
+From 10bffe78f0ef6cb450ecea717dce8d636982bc86 Mon Sep 17 00:00:00 2001
+From: Syed Mohammed Khasim <khasim@ti.com>
+Date: Tue, 12 Jan 2010 23:57:28 +0530
+Subject: [PATCH 25/37] Add DSS driver for OMAP3
+Supports dynamic panel configuration
+Supports dynamic tv standard selection
+Adds support for DSS register access through generic APIs
+Incorporated DSS register access using structures.
+Previous discussions are here
+http://www.mail-archive.com/u-boot@lists.denx.de/msg27150.html
+Signed-off-by: Syed Mohammed Khasim <khasim@ti.com>
+---
+ drivers/video/Makefile           |    1 +
+ drivers/video/omap3_dss.c        |  130 ++++++++++++++++++++++++++++
+ include/asm-arm/arch-omap3/dss.h |  173 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 304 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/video/omap3_dss.c
+ create mode 100644 include/asm-arm/arch-omap3/dss.h
+diff --git a/drivers/video/Makefile b/drivers/video/Makefile
+index a5e339a..44d7ae8 100644
+--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
+@@ -38,6 +38,7 @@ COBJS-$(CONFIG_SED156X) += sed156x.o
+ COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
+ COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o
+ COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
+COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
+ COBJS-y += videomodes.o
+ 
+ COBJS  := $(COBJS-y)
+diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
+new file mode 100644
+index 0000000..69c705a
+--- /dev/null
+++ b/drivers/video/omap3_dss.c
+@@ -0,0 +1,130 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ * Syed Mohammed Khasim <khasim@ti.com>
+ *
+ * Referred to Linux DSS driver files for OMAP3
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation's version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/dss.h>
+
+/*
+ * Configure VENC for a given Mode (NTSC / PAL)
+ */
+void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
+                               u32 height, u32 width)
+{
+       struct venc_regs *venc = (struct venc_regs *) OMAP3_VENC_BASE;
+       struct dss_regs *dss = (struct dss_regs *) OMAP3_DSS_BASE;
+       struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
+
+       writel(venc_cfg->status, &venc->status);
+       writel(venc_cfg->f_control, &venc->f_control);
+       writel(venc_cfg->vidout_ctrl, &venc->vidout_ctrl);
+       writel(venc_cfg->sync_ctrl, &venc->sync_ctrl);
+       writel(venc_cfg->llen, &venc->llen);
+       writel(venc_cfg->flens, &venc->flens);
+       writel(venc_cfg->hfltr_ctrl, &venc->hfltr_ctrl);
+       writel(venc_cfg->cc_carr_wss_carr, &venc->cc_carr_wss_carr);
+       writel(venc_cfg->c_phase, &venc->c_phase);
+       writel(venc_cfg->gain_u, &venc->gain_u);
+       writel(venc_cfg->gain_v, &venc->gain_v);
+       writel(venc_cfg->gain_y, &venc->gain_y);
+       writel(venc_cfg->black_level, &venc->black_level);
+       writel(venc_cfg->blank_level, &venc->blank_level);
+       writel(venc_cfg->x_color, &venc->x_color);
+       writel(venc_cfg->m_control, &venc->m_control);
+       writel(venc_cfg->bstamp_wss_data, &venc->bstamp_wss_data);
+       writel(venc_cfg->s_carr, &venc->s_carr);
+       writel(venc_cfg->line21, &venc->line21);
+       writel(venc_cfg->ln_sel, &venc->ln_sel);
+       writel(venc_cfg->l21__wc_ctl, &venc->l21__wc_ctl);
+       writel(venc_cfg->htrigger_vtrigger, &venc->htrigger_vtrigger);
+       writel(venc_cfg->savid__eavid, &venc->savid__eavid);
+       writel(venc_cfg->flen__fal, &venc->flen__fal);
+       writel(venc_cfg->lal__phase_reset, &venc->lal__phase_reset);
+       writel(venc_cfg->hs_int_start_stop_x,
+                               &venc->hs_int_start_stop_x);
+       writel(venc_cfg->hs_ext_start_stop_x,
+                               &venc->hs_ext_start_stop_x);
+       writel(venc_cfg->vs_int_start_x, &venc->vs_int_start_x);
+       writel(venc_cfg->vs_int_stop_x__vs_int_start_y,
+                       &venc->vs_int_stop_x__vs_int_start_y);
+       writel(venc_cfg->vs_int_stop_y__vs_ext_start_x,
+                       &venc->vs_int_stop_y__vs_ext_start_x);
+       writel(venc_cfg->vs_ext_stop_x__vs_ext_start_y,
+                       &venc->vs_ext_stop_x__vs_ext_start_y);
+       writel(venc_cfg->vs_ext_stop_y, &venc->vs_ext_stop_y);
+       writel(venc_cfg->avid_start_stop_x, &venc->avid_start_stop_x);
+       writel(venc_cfg->avid_start_stop_y, &venc->avid_start_stop_y);
+       writel(venc_cfg->fid_int_start_x__fid_int_start_y,
+                               &venc->fid_int_start_x__fid_int_start_y);
+       writel(venc_cfg->fid_int_offset_y__fid_ext_start_x,
+                               &venc->fid_int_offset_y__fid_ext_start_x);
+       writel(venc_cfg->fid_ext_start_y__fid_ext_offset_y,
+                               &venc->fid_ext_start_y__fid_ext_offset_y);
+       writel(venc_cfg->tvdetgp_int_start_stop_x,
+                               &venc->tvdetgp_int_start_stop_x);
+       writel(venc_cfg->tvdetgp_int_start_stop_y,
+                               &venc->tvdetgp_int_start_stop_y);
+       writel(venc_cfg->gen_ctrl, &venc->gen_ctrl);
+       writel(venc_cfg->output_control, &venc->output_control);
+       writel(venc_cfg->dac_b__dac_c, &venc->dac_b__dac_c);
+
+       /* Configure DSS for VENC Settings */
+       writel(VENC_DSS_CONFIG, &dss->control);
+
+       /* Configure height and width for Digital out */
+       writel(((height << DIG_LPP_SHIFT) | width), &dispc->size_dig);
+}
+
+/*
+ * Configure Panel Specific Parameters
+ */
+void omap3_dss_panel_config(const struct panel_config *panel_cfg)
+{
+       struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
+
+       writel(panel_cfg->timing_h, &dispc->timing_h);
+       writel(panel_cfg->timing_v, &dispc->timing_v);
+       writel(panel_cfg->pol_freq, &dispc->pol_freq);
+       writel(panel_cfg->divisor, &dispc->divisor);
+       writel(panel_cfg->lcd_size, &dispc->size_lcd);
+       writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config);
+       writel(((panel_cfg->panel_type << TFTSTN_SHIFT) |
+               (panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control);
+       writel(panel_cfg->panel_color, &dispc->default_color0);
+}
+
+/*
+ * Enable LCD and DIGITAL OUT in DSS
+ */
+void omap3_dss_enable(void)
+{
+       struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
+       u32 l = 0;
+
+       l = readl(&dispc->control);
+       l |= DISPC_ENABLE;
+       writel(l, &dispc->control);
+}
+diff --git a/include/asm-arm/arch-omap3/dss.h b/include/asm-arm/arch-omap3/dss.h
+new file mode 100644
+index 0000000..e5e3b0d
+--- /dev/null
+++ b/include/asm-arm/arch-omap3/dss.h
+@@ -0,0 +1,173 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ * Syed Mohammed Khasim <khasim@ti.com>
+ *
+ * Referred to Linux DSS driver files for OMAP3
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation's version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef DSS_H
+#define DSS_H
+
+/*
+ * DSS Base Registers
+ */
+#define OMAP3_DSS_BASE         0x48050040
+#define OMAP3_DISPC_BASE       0x48050440
+#define OMAP3_VENC_BASE                0x48050C00
+
+/* DSS Registers */
+struct dss_regs {
+       u32 control;                            /* 0x40 */
+       u32 sdi_control;                        /* 0x44 */
+       u32 pll_control;                        /* 0x48 */
+};
+
+/* DISPC Registers */
+struct dispc_regs {
+       u32 control;                            /* 0x40 */
+       u32 config;                             /* 0x44 */
+       u32 reserve_2;                          /* 0x48 */
+       u32 default_color0;                     /* 0x4C */
+       u32 default_color1;                     /* 0x50 */
+       u32 trans_color0;                       /* 0x54 */
+       u32 trans_color1;                       /* 0x58 */
+       u32 line_status;                        /* 0x5C */
+       u32 line_number;                        /* 0x60 */
+       u32 timing_h;                           /* 0x64 */
+       u32 timing_v;                           /* 0x68 */
+       u32 pol_freq;                           /* 0x6C */
+       u32 divisor;                            /* 0x70 */
+       u32 global_alpha;                       /* 0x74 */
+       u32 size_dig;                           /* 0x78 */
+       u32 size_lcd;                           /* 0x7C */
+};
+
+/* VENC Registers */
+struct venc_regs {
+       u32 rev_id;                             /* 0x00 */
+       u32 status;                             /* 0x04 */
+       u32 f_control;                          /* 0x08 */
+       u32 reserve_1;                          /* 0x0C */
+       u32 vidout_ctrl;                        /* 0x10 */
+       u32 sync_ctrl;                          /* 0x14 */
+       u32 reserve_2;                          /* 0x18 */
+       u32 llen;                               /* 0x1C */
+       u32 flens;                              /* 0x20 */
+       u32 hfltr_ctrl;                         /* 0x24 */
+       u32 cc_carr_wss_carr;                   /* 0x28 */
+       u32 c_phase;                            /* 0x2C */
+       u32 gain_u;                             /* 0x30 */
+       u32 gain_v;                             /* 0x34 */
+       u32 gain_y;                             /* 0x38 */
+       u32 black_level;                        /* 0x3C */
+       u32 blank_level;                        /* 0x40 */
+       u32 x_color;                            /* 0x44 */
+       u32 m_control;                          /* 0x48 */
+       u32 bstamp_wss_data;                    /* 0x4C */
+       u32 s_carr;                             /* 0x50 */
+       u32 line21;                             /* 0x54 */
+       u32 ln_sel;                             /* 0x58 */
+       u32 l21__wc_ctl;                        /* 0x5C */
+       u32 htrigger_vtrigger;                  /* 0x60 */
+       u32 savid__eavid;                       /* 0x64 */
+       u32 flen__fal;                          /* 0x68 */
+       u32 lal__phase_reset;                   /* 0x6C */
+       u32 hs_int_start_stop_x;                /* 0x70 */
+       u32 hs_ext_start_stop_x;                /* 0x74 */
+       u32 vs_int_start_x;                     /* 0x78 */
+       u32 vs_int_stop_x__vs_int_start_y;      /* 0x7C */
+       u32 vs_int_stop_y__vs_ext_start_x;      /* 0x80 */
+       u32 vs_ext_stop_x__vs_ext_start_y;      /* 0x84 */
+       u32 vs_ext_stop_y;                      /* 0x88 */
+       u32 reserve_3;                          /* 0x8C */
+       u32 avid_start_stop_x;                  /* 0x90 */
+       u32 avid_start_stop_y;                  /* 0x94 */
+       u32 reserve_4;                          /* 0x98 */
+       u32 reserve_5;                          /* 0x9C */
+       u32 fid_int_start_x__fid_int_start_y;   /* 0xA0 */
+       u32 fid_int_offset_y__fid_ext_start_x;  /* 0xA4 */
+       u32 fid_ext_start_y__fid_ext_offset_y;  /* 0xA8 */
+       u32 reserve_6;                          /* 0xAC */
+       u32 tvdetgp_int_start_stop_x;           /* 0xB0 */
+       u32 tvdetgp_int_start_stop_y;           /* 0xB4 */
+       u32 gen_ctrl;                           /* 0xB8 */
+       u32 reserve_7;                          /* 0xBC */
+       u32 reserve_8;                          /* 0xC0 */
+       u32 output_control;                     /* 0xC4 */
+       u32 dac_b__dac_c;                       /* 0xC8 */
+       u32 height_width;                       /* 0xCC */
+};
+
+/* Few Register Offsets */
+#define FRAME_MODE_SHIFT                       1
+#define TFTSTN_SHIFT                           3
+#define DATALINES_SHIFT                                8
+
+/* Enabling Display controller */
+#define LCD_ENABLE                             1
+#define DIG_ENABLE                             (1 << 1)
+#define GO_LCD                                 (1 << 5)
+#define GO_DIG                                 (1 << 6)
+#define GP_OUT0                                        (1 << 15)
+#define GP_OUT1                                        (1 << 16)
+
+#define DISPC_ENABLE                           (LCD_ENABLE | \
+                                                DIG_ENABLE | \
+                                                GO_LCD | \
+                                                GO_DIG | \
+                                                GP_OUT0| \
+                                                GP_OUT1)
+
+/* Configure VENC DSS Params */
+#define VENC_CLK_ENABLE                                (1 << 3)
+#define DAC_DEMEN                              (1 << 4)
+#define DAC_POWERDN                            (1 << 5)
+#define VENC_OUT_SEL                           (1 << 6)
+#define DIG_LPP_SHIFT                          16
+#define VENC_DSS_CONFIG                                (VENC_CLK_ENABLE | \
+                                                DAC_DEMEN | \
+                                                DAC_POWERDN | \
+                                                VENC_OUT_SEL)
+/*
+ * Panel Configuration
+ */
+struct panel_config {
+       u32 timing_h;
+       u32 timing_v;
+       u32 pol_freq;
+       u32 divisor;
+       u32 lcd_size;
+       u32 panel_type;
+       u32 data_lines;
+       u32 load_mode;
+       u32 panel_color;
+};
+
+/*
+ * Generic DSS Functions
+ */
+void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
+                       u32 height, u32 width);
+void omap3_dss_panel_config(const struct panel_config *panel_cfg);
+void omap3_dss_enable(void);
+
+#endif /* DSS_H */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0026-Enable-DSS-driver-for-Beagle.patch b/recipes-bsp/u-boot/u-boot/0026-Enable-DSS-driver-for-Beagle.patch
new file mode 100644
index 00000000..7e7bea83
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0026-Enable-DSS-driver-for-Beagle.patch
@@ -0,0 +1,158 @@
+From a8adb8e29aba9d2c83731839063f1381fce3906c Mon Sep 17 00:00:00 2001
+From: Syed Mohammed Khasim <khasim@ti.com>
+Date: Sun, 11 Apr 2010 17:44:39 +0200
+Subject: [PATCH 26/37] Enable DSS driver for Beagle
+Configures DSS to display color bar on Svideo
+Configures DSS to display background color on DVID
+Signed-off-by: Syed Mohammed Khasim <khasim@ti.com>
+---
+ board/ti/beagle/beagle.c       |   12 ++++++
+ board/ti/beagle/beagle.h       |   75 ++++++++++++++++++++++++++++++++++++++++
+ include/configs/omap3_beagle.h |    1 +
+ 3 files changed, 88 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 7cb6d1f..eb57b5a 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -141,6 +141,16 @@ unsigned int get_expansion_id(void)
+ }
+ 
+ /*
+ * Configure DSS to display background color on DVID
+ * Configure VENC to display color bar on S-Video
+ */
+void display_init(void)
+{
+       omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
+       omap3_dss_panel_config(&dvid_cfg);
+}
+
+/*
+  * Routine: misc_init_r
+  * Description: Configure board specific parts
+  */
+@@ -188,6 +198,7 @@ int misc_init_r(void)
+ 
+        twl4030_power_init();
+        twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+       display_init();
+ 
+        switch (beagle_revision) {
+        case REVISION_AXBX:
+@@ -233,6 +244,7 @@ int misc_init_r(void)
+                GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+ 
+        dieid_num_r();
+       omap3_dss_enable();
+ 
+        return 0;
+ }
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index ec4f831..69f9398 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -23,6 +23,8 @@
+ #ifndef _BEAGLE_H_
+ #define _BEAGLE_H_
+ 
+#include <asm/arch/dss.h>
+
+ const omap3_sysinfo sysinfo = {
+        DDR_STACKED,
+        "OMAP3 Beagle board",
+@@ -433,4 +435,77 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MCBSP3_DR),      (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+        MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+ 
+/*
+ * Display Configuration
+ */
+
+#define DVI_BEAGLE_ORANGE_COL          0x00FF8000
+#define VENC_HEIGHT                    0x00ef
+#define VENC_WIDTH                     0x027f
+
+/*
+ * Configure VENC in DSS for Beagle to generate Color Bar
+ *
+ * Kindly refer to OMAP TRM for definition of these values.
+ */
+static const struct venc_regs venc_config_std_tv = {
+       .status                                 = 0x0000001B,
+       .f_control                              = 0x00000040,
+       .vidout_ctrl                            = 0x00000000,
+       .sync_ctrl                              = 0x00008000,
+       .llen                                   = 0x00008359,
+       .flens                                  = 0x0000020C,
+       .hfltr_ctrl                             = 0x00000000,
+       .cc_carr_wss_carr                       = 0x043F2631,
+       .c_phase                                = 0x00000024,
+       .gain_u                                 = 0x00000130,
+       .gain_v                                 = 0x00000198,
+       .gain_y                                 = 0x000001C0,
+       .black_level                            = 0x0000006A,
+       .blank_level                            = 0x0000005C,
+       .x_color                                = 0x00000000,
+       .m_control                              = 0x00000001,
+       .bstamp_wss_data                        = 0x0000003F,
+       .s_carr                                 = 0x21F07C1F,
+       .line21                                 = 0x00000000,
+       .ln_sel                                 = 0x00000015,
+       .l21__wc_ctl                            = 0x00001400,
+       .htrigger_vtrigger                      = 0x00000000,
+       .savid__eavid                           = 0x069300F4,
+       .flen__fal                              = 0x0016020C,
+       .lal__phase_reset                       = 0x00060107,
+       .hs_int_start_stop_x                    = 0x008D034E,
+       .hs_ext_start_stop_x                    = 0x000F0359,
+       .vs_int_start_x                         = 0x01A00000,
+       .vs_int_stop_x__vs_int_start_y          = 0x020501A0,
+       .vs_int_stop_y__vs_ext_start_x          = 0x01AC0024,
+       .vs_ext_stop_x__vs_ext_start_y          = 0x020D01AC,
+       .vs_ext_stop_y                          = 0x00000006,
+       .avid_start_stop_x                      = 0x03480079,
+       .avid_start_stop_y                      = 0x02040024,
+       .fid_int_start_x__fid_int_start_y       = 0x0001008A,
+       .fid_int_offset_y__fid_ext_start_x      = 0x01AC0106,
+       .fid_ext_start_y__fid_ext_offset_y      = 0x01060006,
+       .tvdetgp_int_start_stop_x               = 0x00140001,
+       .tvdetgp_int_start_stop_y               = 0x00010001,
+       .gen_ctrl                               = 0x00FF0000,
+       .output_control                         = 0x0000000D,
+       .dac_b__dac_c                           = 0x00000000
+};
+
+/*
+ * Configure Timings for DVI D
+ */
+static const struct panel_config dvid_cfg = {
+       .timing_h       = 0x0ff03f31, /* Horizantal timing */
+       .timing_v       = 0x01400504, /* Vertical timing */
+       .pol_freq       = 0x00007028, /* Pol Freq */
+       .divisor        = 0x00010006, /* 72Mhz Pixel Clock */
+       .lcd_size       = 0x02ff03ff, /* 1024x768 */
+       .panel_type     = 0x01, /* TFT */
+       .data_lines     = 0x03, /* 24 Bit RGB */
+       .load_mode      = 0x02, /* Frame Mode */
+       .panel_color    = DVI_BEAGLE_ORANGE_COL /* ORANGE */
+};
+
+ #endif
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index c156cea..7bcbe9b 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -131,6 +131,7 @@
+ #define CONFIG_CMD_I2C         /* I2C serial bus support       */
+ #define CONFIG_CMD_MMC         /* MMC support                  */
+ #define CONFIG_CMD_NAND                /* NAND support                 */
+#define CONFIG_VIDEO_OMAP3     /* DSS Support                  */
+ 
+ #undef CONFIG_CMD_FLASH                /* flinfo, erase, protect       */
+ #undef CONFIG_CMD_FPGA         /* FPGA configuration Support   */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0027-beagleboardXM-don-t-set-mpurate-on-xM-in-bootargs.patch b/recipes-bsp/u-boot/u-boot/0027-beagleboardXM-don-t-set-mpurate-on-xM-in-bootargs.patch
new file mode 100644
index 00000000..90d71a8a
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0027-beagleboardXM-don-t-set-mpurate-on-xM-in-bootargs.patch
@@ -0,0 +1,24 @@
+From 85d4ffbc3a12b28cae00fc88d4adba7df4907fe4 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 13 Apr 2010 22:04:07 +0200
+Subject: [PATCH 27/37] beagleboardXM: don't set mpurate on xM in bootargs
+---
+ board/ti/beagle/beagle.c |    1 -
+ 1 files changed, 0 insertions(+), 1 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index eb57b5a..974a72c 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -226,7 +226,6 @@ int misc_init_r(void)
+                                        TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                        TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                        TWL4030_PM_RECEIVER_DEV_GRP_P1);
+-               setenv("mpurate", "720");
+                break;
+        default:
+                printf("Beagle unknown 0x%02x\n", beagle_revision);
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0028-OMAP3-fix-and-clean-up-L2-cache-enable-disable-funct.patch b/recipes-bsp/u-boot/u-boot/0028-OMAP3-fix-and-clean-up-L2-cache-enable-disable-funct.patch
new file mode 100644
index 00000000..d2c6abba
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0028-OMAP3-fix-and-clean-up-L2-cache-enable-disable-funct.patch
@@ -0,0 +1,112 @@
+From c18bda32fdb048ea38b7ff579f365ea8858053d7 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Wed, 14 Apr 2010 12:08:00 +0100
+Subject: [PATCH 28/37] OMAP3: fix and clean up L2 cache enable/disable functions
+On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
+so an SMC call to the ROM monitor is required.  On later versions,
+and on newer devices, this bit is banked and we can set it directly.
+The code checked only the ES revision of the chip, and hence incorrectly
+used the ROM call on ES1.0 versions of other devices.
+This patch adds a check for chip family as well as revision, and also
+removes some code duplication between the enable and disable functions.
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ cpu/arm_cortexa8/omap3/cache.S |   74 +++++++++++-----------------------------
+ 1 files changed, 20 insertions(+), 54 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/cache.S b/cpu/arm_cortexa8/omap3/cache.S
+index 0f63815..16afb5d 100644
+--- a/cpu/arm_cortexa8/omap3/cache.S
+++ b/cpu/arm_cortexa8/omap3/cache.S
+@@ -128,64 +128,30 @@ finished_inval:
+ 
+        ldmfd   r13!, {r0 - r5, r7, r9 - r12, pc}
+ 
+-
+-l2_cache_enable:
+-       push    {r0, r1, r2, lr}
+-       @ ES2 onwards we can disable/enable L2 ourselves
+l2_cache_set:
+       push    {r4-r6, lr}
+       mov     r5,  r0
+        bl      get_cpu_rev
+-       cmp     r0, #CPU_3XX_ES20
+-       blt     l2_cache_disable_EARLIER_THAN_ES2
+-       mrc     15, 0, r3, cr1, cr0, 1
+-       orr     r3, r3, #2
+-       mcr     15, 0, r3, cr1, cr0, 1
+-       b       l2_cache_enable_END
+-l2_cache_enable_EARLIER_THAN_ES2:
+-       @ Save r0, r12 and restore them after usage
+-       mov     r3, ip
+-       str     r3, [sp, #4]
+-       mov     r3, r0
+-       @
+       mov     r4,  r0
+       bl      get_cpu_family
+       @ ES2 onwards we can disable/enable L2 ourselves
+       cmp     r0,  #CPU_OMAP34XX
+       cmpeq   r4,  #CPU_3XX_ES10
+       mrc     15, 0, r0, cr1, cr0, 1
+       bic     r0, r0, #2
+       orr     r0, r0, r5, lsl #1
+       mcreq   15, 0, r0, cr1, cr0, 1
+        @ GP Device ROM code API usage here
+        @ r12 = AUXCR Write function and r0 value
+-       @
+        mov     ip, #3
+-       mrc     15, 0, r0, cr1, cr0, 1
+-       orr     r0, r0, #2
+-       @ SMI instruction to call ROM Code API
+-       .word   0xe1600070
+-       mov     r0, r3
+-       mov     ip, r3
+-       str     r3, [sp, #4]
+-l2_cache_enable_END:
+-       pop     {r1, r2, r3, pc}
+       @ SMCNE instruction to call ROM Code API
+       .word   0x11600070
+       pop     {r4-r6, pc}
+ 
+l2_cache_enable:
+       mov     r0, #1
+       b       l2_cache_set
+ 
+ l2_cache_disable:
+-       push    {r0, r1, r2, lr}
+-       @ ES2 onwards we can disable/enable L2 ourselves
+-       bl      get_cpu_rev
+-       cmp     r0, #CPU_3XX_ES20
+-       blt     l2_cache_disable_EARLIER_THAN_ES2
+-       mrc     15, 0, r3, cr1, cr0, 1
+-       bic     r3, r3, #2
+-       mcr     15, 0, r3, cr1, cr0, 1
+-       b       l2_cache_disable_END
+-l2_cache_disable_EARLIER_THAN_ES2:
+-       @ Save r0, r12 and restore them after usage
+-       mov     r3, ip
+-       str     r3, [sp, #4]
+-       mov     r3, r0
+-       @
+-       @ GP Device ROM code API usage here
+-       @ r12 = AUXCR Write function and r0 value
+-       @
+-       mov     ip, #3
+-       mrc     15, 0, r0, cr1, cr0, 1
+-       bic     r0, r0, #2
+-       @ SMI instruction to call ROM Code API
+-       .word   0xe1600070
+-       mov     r0, r3
+-       mov     ip, r3
+-       str     r3, [sp, #4]
+-l2_cache_disable_END:
+-       pop     {r1, r2, r3, pc}
+       mov     r0, #0
+       b       l2_cache_set
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0029-OMAP3-convert-setup_auxcr-to-pure-asm.patch b/recipes-bsp/u-boot/u-boot/0029-OMAP3-convert-setup_auxcr-to-pure-asm.patch
new file mode 100644
index 00000000..e1ffdca7
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0029-OMAP3-convert-setup_auxcr-to-pure-asm.patch
@@ -0,0 +1,99 @@
+From 6ddb5d4e28801907af7be39e47d502fd5c8e73e1 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Wed, 14 Apr 2010 16:49:57 +0100
+Subject: [PATCH 29/37] OMAP3: convert setup_auxcr() to pure asm
+This function consists entirely of inline asm statements, so writing
+it directly in a .S file is simpler. Additionally, the inline asm is
+not safe as is, since registers are not guaranteed to be preserved
+between asm() statements.
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ cpu/arm_cortexa8/omap3/board.c |   35 -----------------------------------
+ cpu/arm_cortexa8/omap3/cache.S |   19 +++++++++++++++++++
+ 2 files changed, 19 insertions(+), 35 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
+index 0126152..7f49199 100644
+--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
+@@ -122,41 +122,6 @@ void secureworld_exit()
+ }
+ 
+ /******************************************************************************
+- * Routine: setup_auxcr()
+- * Description: Write to AuxCR desired value using SMI.
+- *              general use.
+- *****************************************************************************/
+-void setup_auxcr()
+-{
+-       unsigned long i;
+-       volatile unsigned int j;
+-       /* Save r0, r12 and restore them after usage */
+-       __asm__ __volatile__("mov %0, r12":"=r"(j));
+-       __asm__ __volatile__("mov %0, r0":"=r"(i));
+-
+-       /*
+-        * GP Device ROM code API usage here
+-        * r12 = AUXCR Write function and r0 value
+-        */
+-       __asm__ __volatile__("mov r12, #0x3");
+-       __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
+-       /* Enabling ASA */
+-       __asm__ __volatile__("orr r0, r0, #0x10");
+-       /* Enable L1NEON */
+-       __asm__ __volatile__("orr r0, r0, #1 << 5");
+-       /* SMI instruction to call ROM Code API */
+-       __asm__ __volatile__(".word 0xE1600070");
+-       /* Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround) */
+-       __asm__ __volatile__("mov r12, #0x2");
+-       __asm__ __volatile__("mrc p15, 1, r0, c9, c0, 2");
+-       __asm__ __volatile__("orr r0, r0, #1 << 27");
+-       /* SMI instruction to call ROM Code API */
+-       __asm__ __volatile__(".word 0xE1600070");
+-       __asm__ __volatile__("mov r0, %0":"=r"(i));
+-       __asm__ __volatile__("mov r12, %0":"=r"(j));
+-}
+-
+-/******************************************************************************
+  * Routine: try_unlock_sram()
+  * Description: If chip is GP/EMU(special) type, unlock the SRAM for
+  *              general use.
+diff --git a/cpu/arm_cortexa8/omap3/cache.S b/cpu/arm_cortexa8/omap3/cache.S
+index 16afb5d..61e6946 100644
+--- a/cpu/arm_cortexa8/omap3/cache.S
+++ b/cpu/arm_cortexa8/omap3/cache.S
+@@ -43,6 +43,7 @@
+ .global invalidate_dcache
+ .global l2_cache_enable
+ .global l2_cache_disable
+.global setup_auxcr
+ 
+ /*
+  *     invalidate_dcache()
+@@ -155,3 +156,21 @@ l2_cache_enable:
+ l2_cache_disable:
+        mov     r0, #0
+        b       l2_cache_set
+
+/******************************************************************************
+ * Routine: setup_auxcr()
+ * Description: Write to AuxCR desired value using SMI.
+ *              general use.
+ *****************************************************************************/
+setup_auxcr:
+       mov     r12, #0x3
+       mrc     p15, 0, r0, c1, c0, 1
+       orr     r0, r0, #0x10                   @ Enable ASA
+       orr     r0, r0, #1 << 5                 @ Enable L1NEON
+       .word 0xE1600070                        @ SMC
+       mov     r12, #0x2
+       mrc     p15, 1, r0, c9, c0, 2
+       @ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
+       orr     r0, r0, #1 << 27
+       .word 0xE1600070                        @ SMC
+       bx      lr
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0030-OMAP3-apply-Cortex-A8-errata-workarounds-only-on-aff.patch b/recipes-bsp/u-boot/u-boot/0030-OMAP3-apply-Cortex-A8-errata-workarounds-only-on-aff.patch
new file mode 100644
index 00000000..af669ec0
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0030-OMAP3-apply-Cortex-A8-errata-workarounds-only-on-aff.patch
@@ -0,0 +1,46 @@
+From 4e7bc59affc2a71de40259330e27e62181993968 Mon Sep 17 00:00:00 2001
+From: Mans Rullgard <mans@mansr.com>
+Date: Wed, 14 Apr 2010 17:10:28 +0100
+Subject: [PATCH 30/37] OMAP3: apply Cortex-A8 errata workarounds only on affected revisions
+The workarounds for errata 621766 and 725233 should only be applied
+on affected Cortex-A8 revisions.  Recent chips use r3px cores where
+these have been fixed.
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+ cpu/arm_cortexa8/omap3/cache.S |   13 ++++++++++---
+ 1 files changed, 10 insertions(+), 3 deletions(-)
+diff --git a/cpu/arm_cortexa8/omap3/cache.S b/cpu/arm_cortexa8/omap3/cache.S
+index 61e6946..932e4eb 100644
+--- a/cpu/arm_cortexa8/omap3/cache.S
+++ b/cpu/arm_cortexa8/omap3/cache.S
+@@ -163,14 +163,21 @@ l2_cache_disable:
+  *              general use.
+  *****************************************************************************/
+ setup_auxcr:
+       mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
+       and     r2, r0, #0x00f00000             @ variant
+       and     r3, r0, #0x0000000f             @ revision
+       orr     r1, r3, r2, lsr #20-4           @ combine variant and revision
+        mov     r12, #0x3
+        mrc     p15, 0, r0, c1, c0, 1
+        orr     r0, r0, #0x10                   @ Enable ASA
+-       orr     r0, r0, #1 << 5                 @ Enable L1NEON
+       @ Enable L1NEON on pre-r2p1 (erratum 621766 workaround)
+       cmp     r1, #0x21
+       orrlt   r0, r0, #1 << 5
+        .word 0xE1600070                        @ SMC
+        mov     r12, #0x2
+        mrc     p15, 1, r0, c9, c0, 2
+-       @ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
+-       orr     r0, r0, #1 << 27
+       @ Set PLD_FWD bit in L2AUXCR on pre-r2p1 (erratum 725233 workaround)
+       cmp     r1, #0x21
+       orrlt   r0, r0, #1 << 27
+        .word 0xE1600070                        @ SMC
+        bx      lr
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0031-OMAP3-beagle-add-more-expansionboards-based-on-http-.patch b/recipes-bsp/u-boot/u-boot/0031-OMAP3-beagle-add-more-expansionboards-based-on-http-.patch
new file mode 100644
index 00000000..9ea19123
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0031-OMAP3-beagle-add-more-expansionboards-based-on-http-.patch
@@ -0,0 +1,61 @@
+From bbfb38ccd1e2bb19a1eb698bd37cd1ab50c87b37 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Fri, 23 Apr 2010 10:50:43 +0200
+Subject: [PATCH 31/37] OMAP3: beagle: add more expansionboards, based on http://www.elinux.org/BeagleBoardPinMux#Vendor_and_Device_IDs
+---
+ board/ti/beagle/beagle.c |    8 ++++++++
+ board/ti/beagle/beagle.h |    6 ++++++
+ 2 files changed, 14 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 974a72c..0544178 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -55,11 +55,15 @@ static struct {
+ #define TINCANTOOLS_VENDORID   0x0100
+ #define GUMSTIX_VENDORID               0x0200
+ #define SPECIALCOMP_VENDORID   0x0300
+#define HYR_VENDORID                   0x0400
+#define MENTOREL_VENDORID              0x0500
+#define KBADC_VENDORID                 0x0600
+ 
+ #define TINCANTOOLS_ZIPPY              0x01000100
+ #define TINCANTOOLS_ZIPPY2             0x02000100
+ #define TINCANTOOLS_TRAINER            0x04000100
+ #define TINCANTOOLS_SHOWDOG            0x03000100
+#define KBADC_BEAGLEFPGA               0x01000600
+ 
+ #define BEAGLE_NO_EEPROM               0xffffffff
+ 
+@@ -184,6 +188,10 @@ int misc_init_r(void)
+                        /* Place holder for DSS2 definition for showdog lcd */
+                        setenv("defaultdisplay", "showdoglcd");
+                        break;
+               case KBADC_BEAGLEFPGA:
+                       printf("Recognized KBADC Beagle FPGA board\n");
+                       MUX_KBADC_BEAGLEFPGA();
+                       break;
+                case BEAGLE_NO_EEPROM:
+                        printf("No EEPROM on expansion board\n");
+                        break;
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index 69f9398..90a0ebf 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -435,6 +435,12 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MCBSP3_DR),      (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+        MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+ 
+#define MUX_KBADC_BEAGLEFPGA() \
+       MUX_VAL(CP(MCBSP1_CLKR),    (IEN  | PTU | DIS | M1)) /*MCSPI4_CLK*/\
+       MUX_VAL(CP(MCBSP1_DX),      (IDIS | PTU | DIS | M1)) /*MCSPI4_SIMO*/\
+       MUX_VAL(CP(MCBSP1_DR),      (IEN  | PTU | EN  | M1)) /*MCSPI4_SOMI*/\
+       MUX_VAL(CP(MCBSP1_FSX),     (IDIS | PTU | DIS | M1)) /*MCSPI4_CS0*/\
+
+ /*
+  * Display Configuration
+  */
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0032-OMAP3-beagle-set-mpurate-to-600-for-revB-and-revC1-3.patch b/recipes-bsp/u-boot/u-boot/0032-OMAP3-beagle-set-mpurate-to-600-for-revB-and-revC1-3.patch
new file mode 100644
index 00000000..c99d3d98
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0032-OMAP3-beagle-set-mpurate-to-600-for-revB-and-revC1-3.patch
@@ -0,0 +1,29 @@
+From ae05ca488390671516bd4ed021eb43901fee740f Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 27 Apr 2010 13:44:16 +0200
+Subject: [PATCH 32/37] OMAP3: beagle: set mpurate to 600 for revB and revC1-3
+---
+ board/ti/beagle/beagle.c |    2 ++
+ 1 files changed, 2 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 0544178..6778499 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -211,10 +211,12 @@ int misc_init_r(void)
+        switch (beagle_revision) {
+        case REVISION_AXBX:
+                printf("Beagle Rev Ax/Bx\n");
+               setenv("mpurate", "600");
+                break;
+        case REVISION_CX:
+                printf("Beagle Rev C1/C2/C3\n");
+                MUX_BEAGLE_C();
+               setenv("mpurate", "600");
+                break;
+        case REVISION_C4:
+                printf("Beagle Rev C4\n");
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0033-OMAP3-beagle-prettify-expansionboard-message-a-bit.patch b/recipes-bsp/u-boot/u-boot/0033-OMAP3-beagle-prettify-expansionboard-message-a-bit.patch
new file mode 100644
index 00000000..a7b2c017
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0033-OMAP3-beagle-prettify-expansionboard-message-a-bit.patch
@@ -0,0 +1,25 @@
+From caf18bc716d77d7bf2c75bc58ffbcbf09ae79f2b Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 27 Apr 2010 13:45:28 +0200
+Subject: [PATCH 33/37] OMAP3: beagle: prettify expansionboard message a bit
+---
+ board/ti/beagle/beagle.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 6778499..58fb7c3 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -165,7 +165,7 @@ int misc_init_r(void)
+ 
+        beagle_identify();
+ 
+-       printf("\nProbing for expansion boards, if none are connected you'll see a harmless I2C error.\n");
+       printf("\nProbing for expansion boards, if none are connected you'll see a harmless I2C error.\n\n");
+ 
+        switch (get_expansion_id()) {
+                case TINCANTOOLS_ZIPPY:
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0034-OMAP3-beagle-add-pinmux-for-Tincantools-Trainer-expa.patch b/recipes-bsp/u-boot/u-boot/0034-OMAP3-beagle-add-pinmux-for-Tincantools-Trainer-expa.patch
new file mode 100644
index 00000000..5caa6f0f
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0034-OMAP3-beagle-add-pinmux-for-Tincantools-Trainer-expa.patch
@@ -0,0 +1,53 @@
+From 8580a3eafe3351e3c0f1ca3d0bc959bbeec40e28 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 27 Apr 2010 18:25:57 +0200
+Subject: [PATCH 34/37] OMAP3: beagle: add pinmux for Tincantools Trainer expansionboard
+---
+ board/ti/beagle/beagle.c |    2 ++
+ board/ti/beagle/beagle.h |   16 +++++++++++++++-
+ 2 files changed, 17 insertions(+), 1 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 58fb7c3..39c53f2 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -181,6 +181,8 @@ int misc_init_r(void)
+                case TINCANTOOLS_TRAINER:
+                        printf("Recognized Tincantools Trainer expansion board (rev %d %s)\n",
+                                expansion_config.revision, expansion_config.fab_revision);
+                       MUX_TINCANTOOLS_ZIPPY();
+                       MUX_TINCANTOOLS_TRAINER();
+                        break;
+                case TINCANTOOLS_SHOWDOG:
+                        printf("Recognized Tincantools Showdow expansion board (rev %d %s)\n",
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index 90a0ebf..7774855 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -433,7 +433,21 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(MCBSP1_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_162*/\
+        MUX_VAL(CP(MCBSP3_DX),      (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+        MUX_VAL(CP(MCBSP3_DR),      (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+-       MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTD | DIS | M4)) /*GPIO_141*/
+
+#define MUX_TINCANTOOLS_TRAINER() \
+       MUX_VAL(CP(MMC2_CLK),       (IEN  | PTU | EN  | M4)) /*GPIO_130*/\
+       MUX_VAL(CP(MMC2_CMD),       (IEN  | PTU | EN  | M4)) /*GPIO_131*/\
+       MUX_VAL(CP(MMC2_DAT0),      (IEN  | PTU | EN  | M4)) /*GPIO_132*/\
+       MUX_VAL(CP(MMC2_DAT1),      (IEN  | PTU | EN  | M4)) /*GPIO_133*/\
+       MUX_VAL(CP(MMC2_DAT2),      (IEN  | PTU | EN  | M4)) /*GPIO_134*/\
+       MUX_VAL(CP(MMC2_DAT3),      (IEN  | PTU | EN  | M4)) /*GPIO_135*/\
+       MUX_VAL(CP(MMC2_DAT4),      (IEN  | PTU | EN  | M4)) /*GPIO_136*/\
+       MUX_VAL(CP(MMC2_DAT5),      (IEN  | PTU | EN  | M4)) /*GPIO_137*/\
+       MUX_VAL(CP(MMC2_DAT6),      (IEN  | PTU | EN  | M4)) /*GPIO_138*/\
+       MUX_VAL(CP(MMC2_DAT7),      (IEN  | PTU | EN  | M4)) /*GPIO_139*/\
+       MUX_VAL(CP(MCBSP3_DX),      (IEN  | PTU | EN  | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_CLKX),    (IEN  | PTU | EN  | M4)) /*GPIO_141*/
+ 
+ #define MUX_KBADC_BEAGLEFPGA() \
+        MUX_VAL(CP(MCBSP1_CLKR),    (IEN  | PTU | DIS | M1)) /*MCSPI4_CLK*/\
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0035-OMAP3-Beagle-set-mpurate-to-1000-for-xM.patch b/recipes-bsp/u-boot/u-boot/0035-OMAP3-Beagle-set-mpurate-to-1000-for-xM.patch
new file mode 100644
index 00000000..5c02fcb6
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0035-OMAP3-Beagle-set-mpurate-to-1000-for-xM.patch
@@ -0,0 +1,24 @@
+From c45e93aef4d54b262f0d8e1ecf6b111f5e1c2a4c Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Fri, 30 Apr 2010 13:25:41 +0200
+Subject: [PATCH 35/37] OMAP3: Beagle: set mpurate to 1000 for xM
+---
+ board/ti/beagle/beagle.c |    1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 39c53f2..9300984 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -238,6 +238,7 @@ int misc_init_r(void)
+                                        TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                        TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                        TWL4030_PM_RECEIVER_DEV_GRP_P1);
+               setenv("mpurate", "1000");
+                break;
+        default:
+                printf("Beagle unknown 0x%02x\n", beagle_revision);
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0036-OMAP3-Beagle-decrease-bootdelay-to-3-use-VGA-for-def.patch b/recipes-bsp/u-boot/u-boot/0036-OMAP3-Beagle-decrease-bootdelay-to-3-use-VGA-for-def.patch
new file mode 100644
index 00000000..5f89f1ae
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0036-OMAP3-Beagle-decrease-bootdelay-to-3-use-VGA-for-def.patch
@@ -0,0 +1,34 @@
+From 39f15722db5595411ec085e36b7fd7657415a554 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Fri, 30 Apr 2010 13:26:01 +0200
+Subject: [PATCH 36/37] OMAP3: Beagle: decrease bootdelay to 3, use VGA for default resolution
+---
+ include/configs/omap3_beagle.h |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 7bcbe9b..93a6a5a 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -178,7 +178,7 @@
+                                                        /* partition */
+ 
+ /* Environment information */
+-#define CONFIG_BOOTDELAY               10
+#define CONFIG_BOOTDELAY               3
+ 
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+        "loadaddr=0x82000000\0" \
+@@ -186,7 +186,7 @@
+        "console=ttyS2,115200n8\0" \
+        "mpurate=500\0" \
+        "vram=12M\0" \
+-       "dvimode=1024x768MR-16@60\0" \
+       "dvimode=640x480MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+        "mmcroot=/dev/mmcblk0p2 rw\0" \
+        "mmcrootfstype=ext3 rootwait\0" \
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0037-OMAP3-beagle-pass-expansionboard-name-in-bootargs.patch b/recipes-bsp/u-boot/u-boot/0037-OMAP3-beagle-pass-expansionboard-name-in-bootargs.patch
new file mode 100644
index 00000000..2ee844b9
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0037-OMAP3-beagle-pass-expansionboard-name-in-bootargs.patch
@@ -0,0 +1,87 @@
+From 8ad472139f7b8b7c59c0192f3e2f50a20beadf59 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Mon, 3 May 2010 10:17:41 +0200
+Subject: [PATCH 37/37] OMAP3: beagle: pass expansionboard name in bootargs
+This makes it possible to do in-kernel fixups for expansionboards like reclaiming GPIOs
+---
+ board/ti/beagle/beagle.c       |    7 +++++++
+ include/configs/omap3_beagle.h |    3 +++
+ 2 files changed, 10 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 9300984..556e995 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -172,33 +172,40 @@ int misc_init_r(void)
+                        printf("Recognized Tincantools Zippy expansion board (rev %d %s)\n",
+                                expansion_config.revision, expansion_config.fab_revision);
+                        MUX_TINCANTOOLS_ZIPPY();
+                       setenv("buddy", "zippy");
+                        break;
+                case TINCANTOOLS_ZIPPY2:
+                        printf("Recognized Tincantools Zippy2 expansion board (rev %d %s)\n",
+                                expansion_config.revision, expansion_config.fab_revision);
+                        MUX_TINCANTOOLS_ZIPPY();
+                       setenv("buddy", "zippy2");
+                        break;
+                case TINCANTOOLS_TRAINER:
+                        printf("Recognized Tincantools Trainer expansion board (rev %d %s)\n",
+                                expansion_config.revision, expansion_config.fab_revision);
+                        MUX_TINCANTOOLS_ZIPPY();
+                        MUX_TINCANTOOLS_TRAINER();
+                       setenv("buddy", "trainer");
+                        break;
+                case TINCANTOOLS_SHOWDOG:
+                        printf("Recognized Tincantools Showdow expansion board (rev %d %s)\n",
+                                expansion_config.revision, expansion_config.fab_revision);
+                        /* Place holder for DSS2 definition for showdog lcd */
+                        setenv("defaultdisplay", "showdoglcd");
+                       setenv("buddy", "showdog");
+                        break;
+                case KBADC_BEAGLEFPGA:
+                        printf("Recognized KBADC Beagle FPGA board\n");
+                        MUX_KBADC_BEAGLEFPGA();
+                       setenv("buddy", "beaglefpga");
+                        break;
+                case BEAGLE_NO_EEPROM:
+                        printf("No EEPROM on expansion board\n");
+                       setenv("buddy", "none");
+                        break;
+                default:
+                        printf("Unrecognized expansion board: %x\n", expansion_config.device_vendor);
+                       setenv("buddy", "unknown");
+        }
+ 
+        if (expansion_config.content == 1)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 93a6a5a..affabf1 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -185,6 +185,7 @@
+        "usbtty=cdc_acm\0" \
+        "console=ttyS2,115200n8\0" \
+        "mpurate=500\0" \
+       "buddy=none\0" \
+        "vram=12M\0" \
+        "dvimode=640x480MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+@@ -194,6 +195,7 @@
+        "nandrootfstype=jffs2\0" \
+        "mmcargs=setenv bootargs console=${console} " \
+                "mpurate=${mpurate} " \
+               "buddy=${buddy} "\
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+@@ -201,6 +203,7 @@
+                "rootfstype=${mmcrootfstype}\0" \
+        "nandargs=setenv bootargs console=${console} " \
+                "mpurate=${mpurate} " \
+               "buddy=${buddy} "\
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0038-Added-configurations-for-xM-Rev-A-board.patch b/recipes-bsp/u-boot/u-boot/0038-Added-configurations-for-xM-Rev-A-board.patch
new file mode 100644
index 00000000..4cfcfe15
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0038-Added-configurations-for-xM-Rev-A-board.patch
@@ -0,0 +1,29 @@
+From 9a5d5518c3d3844cc49cf2d9ef5aeabca1e87c30 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Wed, 5 May 2010 14:53:49 -0500
+Subject: [PATCH 38/38] Added configurations for xM Rev A board
+This defaults to "on" condition for USB and DVI.  May want to revise for
+power savings.
+---
+ board/ti/beagle/beagle.h |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
+index 7774855..cb7fd1c 100644
+--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
+@@ -389,6 +389,10 @@ const omap3_sysinfo sysinfo = {
+        MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/
+ 
+ #define MUX_BEAGLE_XM() \
+       MUX_VAL(CP(GPMC_NCS5),          (IDIS | PTD | EN  | M4)) /*GPIO_56 - USB HUB reset*/\
+       MUX_VAL(CP(GPMC_WAIT0),         (IDIS | PTU | EN  | M4)) /*GPIO_63 - P8 USB HUB nreset*/\
+       MUX_VAL(CP(MMC1_DAT7),          (IDIS | PTU | EN  | M4)) /*GPIO_129 - DVI enable*/\
+       MUX_VAL(CP(HDQ_SIO),            (IDIS | PTU | EN  | M4)) /*GPIO_170 - P8 DVI enable*/\
+        MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+        MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+        MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0038-BeagleBoard-Added-LED-driver.patch b/recipes-bsp/u-boot/u-boot/0038-BeagleBoard-Added-LED-driver.patch
new file mode 100644
index 00000000..74ee4e31
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0038-BeagleBoard-Added-LED-driver.patch
@@ -0,0 +1,164 @@
+From 157b125b905b6dc69164d3f43eeb5e40d3744648 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Thu, 20 May 2010 06:14:01 -0500
+Subject: [PATCH] BeagleBoard: Added LED driver
+Added LED driver using status_led.  USR0 is set to monitor the boot
+status.  USR1 is set to be the green LED.
+(cherry picked from commit 048b526fd7cc0c642f27c674b3e235321c880b66)
+(cherry picked from commit 21c574d9e20f86ab757f5efdd9146e6607f2faba)
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ board/ti/beagle/Makefile |    4 ++-
+ board/ti/beagle/beagle.c |    8 ++++
+ board/ti/beagle/led.c    |   91 ++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 102 insertions(+), 1 deletions(-)
+ create mode 100644 board/ti/beagle/led.c
+diff --git a/board/ti/beagle/Makefile b/board/ti/beagle/Makefile
+index f797112..4cc675c 100644
+--- a/board/ti/beagle/Makefile
+++ b/board/ti/beagle/Makefile
+@@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
+ 
+ LIB    = $(obj)lib$(BOARD).a
+ 
+-COBJS  := beagle.o
+COBJS-y        := $(BOARD).o
+COBJS-$(CONFIG_STATUS_LED) += led.o
+ 
+COBJS  := $(sort $(COBJS-y))
+ SRCS   := $(COBJS:.o=.c)
+ OBJS   := $(addprefix $(obj),$(COBJS))
+ 
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 556e995..d21b9c8 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -30,6 +30,9 @@
+  * MA 02111-1307 USA
+  */
+ #include <common.h>
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#endif
+ #include <twl4030.h>
+ #include <asm/io.h>
+ #include <asm/arch/mux.h>
+@@ -83,6 +86,10 @@ int board_init(void)
+        /* boot param addr */
+        gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+ 
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+       status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
+#endif
+
+        return 0;
+ }
+ 
+@@ -278,3 +285,4 @@ void set_muxconf_regs(void)
+ {
+        MUX_BEAGLE();
+ }
+
+diff --git a/board/ti/beagle/led.c b/board/ti/beagle/led.c
+new file mode 100644
+index 0000000..df26552
+--- /dev/null
+++ b/board/ti/beagle/led.c
+@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2010 Texas Instruments, Inc.
+ * Jason Kridner <jkridner@beagleboard.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <status_led.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
+
+static unsigned int saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF};
+
+/* GPIO pins for the LEDs */
+#define BEAGLE_LED_USR0        149
+#define BEAGLE_LED_USR1        150
+
+#ifdef STATUS_LED_GREEN
+void green_LED_off (void)
+{
+       __led_set (STATUS_LED_GREEN, 0);
+}
+
+void green_LED_on (void)
+{
+       __led_set (STATUS_LED_GREEN, 1);
+}
+#endif
+
+void __led_init (led_id_t mask, int state)
+{
+       __led_set (mask, state);
+}
+
+void __led_toggle (led_id_t mask)
+{
+#ifdef STATUS_LED_BIT
+       if (STATUS_LED_BIT & mask) {
+               if (STATUS_LED_ON == saved_state[0])
+                       __led_set(STATUS_LED_BIT, 0);
+               else
+                       __led_set(STATUS_LED_BIT, 1);
+       }
+#endif
+#ifdef STATUS_LED_BIT1
+       if (STATUS_LED_BIT1 & mask) {
+               if (STATUS_LED_ON == saved_state[1])
+                       __led_set(STATUS_LED_BIT1, 0);
+               else
+                       __led_set(STATUS_LED_BIT1, 1);
+       }
+#endif
+}
+
+void __led_set (led_id_t mask, int state)
+{
+#ifdef STATUS_LED_BIT
+       if (STATUS_LED_BIT & mask) {
+               if (!omap_request_gpio(BEAGLE_LED_USR0)) {
+                       omap_set_gpio_direction(BEAGLE_LED_USR0, 0);
+                       omap_set_gpio_dataout(BEAGLE_LED_USR0, state);
+               }
+               saved_state[0] = state;
+       }
+#endif
+#ifdef STATUS_LED_BIT1
+       if (STATUS_LED_BIT1 & mask) {
+               if (!omap_request_gpio(BEAGLE_LED_USR1)) {
+                       omap_set_gpio_direction(BEAGLE_LED_USR1, 0);
+                       omap_set_gpio_dataout(BEAGLE_LED_USR1, state);
+               }
+               saved_state[1] = state;
+       }
+#endif
+}
+
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0039-Add-led-command.patch b/recipes-bsp/u-boot/u-boot/0039-Add-led-command.patch
new file mode 100644
index 00000000..6adbe2f7
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0039-Add-led-command.patch
@@ -0,0 +1,256 @@
+From 609524ecd54526b3f3c7d52cc43a3c9795970f6b Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Thu, 20 May 2010 05:41:26 -0500
+Subject: [PATCH] Add 'led' command
+This patch allows any board implementing the coloured LED API
+to control the LEDs from the console.
+led [green | yellow | red | all ]  [ on | off ]
+or
+led [ 1 | 2 | 3 | all ]  [ on | off ]
+Adds configuration item CONFIG_CMD_LED enabling the command.
+Partially based on patch from Ulf Samuelsson:
+http://www.mail-archive.com/u-boot@lists.denx.de/msg09593.html.
+(cherry picked from commit aaf47f8d6af81393b7d3275d69b5dbdf07a3d6fb)
+(cherry picked from commit 3d314bf59a48c2ee93d06d50b81f109af6a6c1ec)
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ common/Makefile  |    1 +
+ common/cmd_led.c |  207 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 208 insertions(+), 0 deletions(-)
+ create mode 100644 common/cmd_led.c
+diff --git a/common/Makefile b/common/Makefile
+index dbf7a05..1d717ca 100644
+--- a/common/Makefile
+++ b/common/Makefile
+@@ -106,6 +106,7 @@ COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o
+ COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o
+ COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
+ COBJS-$(CONFIG_CMD_CRAMFS) += cmd_cramfs.o
+COBJS-$(CONFIG_CMD_LED) += cmd_led.o
+ COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o
+ COBJS-y += cmd_load.o
+ COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
+diff --git a/common/cmd_led.c b/common/cmd_led.c
+new file mode 100644
+index 0000000..3b7b534
+--- /dev/null
+++ b/common/cmd_led.c
+@@ -0,0 +1,207 @@
+/*
+ * (C) Copyright 2010
+ * Jason Kridner <jkridner@beagleboard.org>
+ *
+ * Based on cmd_led.c patch from:
+ * http://www.mail-archive.com/u-boot@lists.denx.de/msg06873.html
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file provides a shell like 'test' function to return
+ * true/false from an integer or string compare of two memory
+ * locations or a location and a scalar/literal.
+ * A few parts were lifted from bash 'test' command
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+#include <status_led.h>
+
+int do_led ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
+{
+#ifdef CONFIG_BOARD_SPECIFIC_LED
+       led_id_t mask;
+#endif
+       int state;
+
+       /* Validate arguments */
+       if ((argc != 3)){
+               printf("Usage:\n%s\n", cmdtp->usage);
+               return 1;
+       }
+
+       if (strcmp(argv[2], "off") == 0) {
+               state = 0;
+       } else if (strcmp(argv[2], "on") == 0) {
+               state = 1;
+       } else {
+               printf ("Usage:\n%s\n", cmdtp->usage);
+               return 1;
+       }
+
+#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       if (strcmp(argv[1], "0") == 0) {
+               mask = STATUS_LED_BIT;
+               __led_set(mask, state);
+       }
+       else
+#endif
+#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       if (strcmp(argv[1], "1") == 0) {
+               mask = STATUS_LED_BIT1;
+               __led_set(mask, state);
+       }
+       else
+#endif
+#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       if (strcmp(argv[1], "2") == 0) {
+               mask = STATUS_LED_BIT2;
+               __led_set(mask, state);
+       }
+       else
+#endif
+#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       if (strcmp(argv[1], "3") == 0) {
+               mask = STATUS_LED_BIT3;
+               __led_set(mask, state);
+       }
+       else
+#endif
+#ifdef STATUS_LED_RED
+       if (strcmp(argv[1], "red") == 0) {
+               if (state == 0)
+                       red_LED_off();
+               else
+                       red_LED_on();
+       }
+       else
+#endif
+#ifdef STATUS_LED_GREEN
+       if (strcmp(argv[1], "green") == 0) {
+               if (state == 0)
+                       green_LED_off();
+               else
+                       green_LED_on();
+       }
+       else
+#endif
+#ifdef STATUS_LED_YELLOW
+       if (strcmp(argv[1], "yellow") == 0) {
+               if (state == 0)
+                       yellow_LED_off();
+               else
+                       yellow_LED_on();
+       }
+       else
+#endif
+#ifdef STATUS_LED_BLUE
+       if (strcmp(argv[1], "blue") == 0) {
+               if (state == 0)
+                       blue_LED_off();
+               else
+                       blue_LED_on();
+       }
+       else
+#endif
+       if (strcmp(argv[1], "all") == 0) {
+               mask = 0
+#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED)
+                       | STATUS_LED_BIT
+#endif
+#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED)
+                       | STATUS_LED_BIT1
+#endif
+#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED)
+                       | STATUS_LED_BIT2
+#endif
+#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED)
+                       | STATUS_LED_BIT3
+#endif
+                       ;
+#ifdef CONFIG_BOARD_SPECIFIC_LED
+               __led_set(mask, state);
+#endif
+#ifdef STATUS_LED_RED
+               if (state == 0)
+                       red_LED_off();
+               else
+                       red_LED_on();
+#endif
+#ifdef STATUS_LED_GREEN
+               if (state == 0)
+                       green_LED_off();
+               else
+                       green_LED_on();
+#endif
+#ifdef STATUS_LED_YELLOW
+               if (state == 0)
+                       yellow_LED_off();
+               else
+                       yellow_LED_on();
+#endif
+#ifdef STATUS_LED_BLUE
+               if (state == 0)
+                       blue_LED_off();
+               else
+                       blue_LED_on();
+#endif
+       } else {
+               printf ("Usage:\n%s\n", cmdtp->usage);
+               return 1;
+       }
+
+       return 0;
+}
+
+U_BOOT_CMD(
+       led, 3, 1, do_led,
+       "led\t- ["
+#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       "0|"
+#endif
+#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       "1|"
+#endif
+#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       "2|"
+#endif
+#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED)
+       "3|"
+#endif
+#ifdef STATUS_LED_GREEN
+       "green|"
+#endif
+#ifdef STATUS_LED_YELLOW
+       "yellow|"
+#endif
+#ifdef STATUS_LED_RED
+       "red|"
+#endif
+#ifdef STATUS_LED_BLUE
+       "blue|"
+#endif
+       "all] [on|off]\n",
+       "led [led_name] [on|off] sets or clears led(s)\n"
+);
+
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0039-OMAP3-beagle-setenv-beaglerev-for-AxBx-Cx-xMA-for-be.patch b/recipes-bsp/u-boot/u-boot/0039-OMAP3-beagle-setenv-beaglerev-for-AxBx-Cx-xMA-for-be.patch
new file mode 100644
index 00000000..9b64327d
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0039-OMAP3-beagle-setenv-beaglerev-for-AxBx-Cx-xMA-for-be.patch
@@ -0,0 +1,42 @@
+From c48581ecc0b060e4c1b5fa973d053e81e18f676b Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Thu, 3 Jun 2010 19:50:57 +0200
+Subject: [PATCH 39/39] OMAP3: beagle: setenv beaglerev for AxBx/Cx/xMA for better bootscripts
+---
+ board/ti/beagle/beagle.c |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index 556e995..cdba3dd 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -221,14 +221,17 @@ int misc_init_r(void)
+        case REVISION_AXBX:
+                printf("Beagle Rev Ax/Bx\n");
+                setenv("mpurate", "600");
+               setenv("beaglerev", "AxBx");
+                break;
+        case REVISION_CX:
+                printf("Beagle Rev C1/C2/C3\n");
+                MUX_BEAGLE_C();
+                setenv("mpurate", "600");
+               setenv("beaglerev", "Cx");
+                break;
+        case REVISION_C4:
+                printf("Beagle Rev C4\n");
+               setenv("beaglerev", "Cx");
+                MUX_BEAGLE_C();
+                /* Set VAUX2 to 1.8V for EHCI PHY */
+                twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+@@ -239,6 +242,7 @@ int misc_init_r(void)
+                break;
+        case REVISION_XM:
+                printf("Beagle xM Rev A\n");
+               setenv("beaglerev", "xMA");
+                MUX_BEAGLE_XM();
+                /* Set VAUX2 to 1.8V for EHCI PHY */
+                twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0041-BeagleBoard-Enabled-LEDs.patch b/recipes-bsp/u-boot/u-boot/0041-BeagleBoard-Enabled-LEDs.patch
new file mode 100644
index 00000000..8b046193
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0041-BeagleBoard-Enabled-LEDs.patch
@@ -0,0 +1,47 @@
+From 9d3e56ba351348b6329c488a981d3e2d8f848164 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Wed, 19 May 2010 05:14:43 -0500
+Subject: [PATCH] BeagleBoard: Enabled LEDs
+Added LED driver using status_led.  USR0 is set to monitor the boot
+status.  USR1 is set to be the GREEN LED.
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ include/configs/omap3_beagle.h |   13 +++++++++++++
+ 1 files changed, 13 insertions(+), 0 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index c2fc6ba..eaa8779 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -98,6 +98,18 @@
+ #define CONFIG_SYS_MMC_SET_DEV         1
+ #define CONFIG_DOS_PARTITION           1
+ 
+/* Status LED */
+#define CONFIG_STATUS_LED              1
+#define CONFIG_BOARD_SPECIFIC_LED      1
+#define STATUS_LED_BIT                 0x01
+#define STATUS_LED_STATE               STATUS_LED_ON
+#define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BIT1                        0x02
+#define STATUS_LED_STATE1              STATUS_LED_ON
+#define STATUS_LED_PERIOD1             (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BOOT                        STATUS_LED_BIT
+#define STATUS_LED_GREEN               STATUS_LED_BIT1
+
+ /* DDR - I use Micron DDR */
+ #define CONFIG_OMAP3_MICRON_DDR                1
+ 
+@@ -132,6 +144,7 @@
+ #define CONFIG_CMD_I2C         /* I2C serial bus support       */
+ #define CONFIG_CMD_MMC         /* MMC support                  */
+ #define CONFIG_CMD_NAND                /* NAND support                 */
+#define CONFIG_CMD_LED         /* LED support                  */
+ #define CONFIG_VIDEO_OMAP3     /* DSS Support                  */
+ 
+ #undef CONFIG_CMD_FLASH                /* flinfo, erase, protect       */
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0042-BeagleBoard-New-command-for-status-of-USER-button.patch b/recipes-bsp/u-boot/u-boot/0042-BeagleBoard-New-command-for-status-of-USER-button.patch
new file mode 100644
index 00000000..9a704a80
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0042-BeagleBoard-New-command-for-status-of-USER-button.patch
@@ -0,0 +1,97 @@
+From c053723cc5a73781a4954e6c93d280436623e3d6 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Wed, 21 Jul 2010 07:41:25 -0500
+Subject: [PATCH] BeagleBoard: Added userbutton command
+Based on commit f1099c7c43caf5bac3bf6a65aa266fade4747072
+    Author: Greg Turner <gregturner@ti.com>
+    Date:   Tue May 25 09:19:06 2010 -0500
+    New u-boot command for status of USER button on BeagleBoard-xM
+         Modified bootcmd to check the staus at boot time and set
+         filename of the boot script.
+* Moved to a BeagleBoard specific file.
+* Removed changes to default boot command from adding userbutton
+  command.
+* Made to handle pre-xM boards.
+* Flipped polarity of the return value to avoid confusion.  Success (0)
+  is when the button is pressed.  Failure (1) is when the button is NOT
+  pressed.
+---
+ board/ti/beagle/beagle.c |   54 ++++++++++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 54 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index a6a4961..66df719 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -40,6 +40,7 @@
+ #include <asm/arch/gpio.h>
+ #include <asm/mach-types.h>
+ #include "beagle.h"
+#include <command.h>
+ 
+ static struct {
+        unsigned int device_vendor;
+@@ -290,3 +291,56 @@ void set_muxconf_regs(void)
+        MUX_BEAGLE();
+ }
+ 
+/*
+ * This command returns the status of the user button on beagle xM
+ * Input - none
+ * Returns -   1 if button is held down
+ *             0 if button is not held down
+ */
+int do_userbutton (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       int     button = 0;
+       int     gpio;
+
+       /*
+        * pass address parameter as argv[0] (aka command name),
+        * and all remaining args
+        */
+       switch (beagle_revision) {
+       case REVISION_AXBX:
+       case REVISION_CX:
+       case REVISION_C4:
+               gpio = 7;
+               break;
+       case REVISION_XM:
+       default:
+               gpio = 4;
+               break;
+       }
+       omap_request_gpio(gpio);
+       omap_set_gpio_direction(gpio, 1);
+       printf("The user button is currently ");
+       if(omap_get_gpio_datain(gpio))
+       {
+               button = 1;
+               printf("PRESSED.\n");
+       }
+       else
+       {
+               button = 0;
+               printf("NOT pressed.\n");
+       }
+
+       omap_free_gpio(gpio);
+
+       return !button;
+}
+
+/* -------------------------------------------------------------------- */
+
+U_BOOT_CMD(
+       userbutton, CONFIG_SYS_MAXARGS, 1,      do_userbutton,
+       "Return the status of the BeagleBoard USER button",
+       ""
+);
+
+-- 
+1.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0043-BeagleBoard-Add-CONFIG_SYS_MEMTEST_SCRATCH.patch b/recipes-bsp/u-boot/u-boot/0043-BeagleBoard-Add-CONFIG_SYS_MEMTEST_SCRATCH.patch
new file mode 100644
index 00000000..fa6bb48e
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0043-BeagleBoard-Add-CONFIG_SYS_MEMTEST_SCRATCH.patch
@@ -0,0 +1,35 @@
+From d912a6d2d546faf55d07e91816b47096879137cc Mon Sep 17 00:00:00 2001
+From: Steven Kipisz <s-kipisz2@ti.com>
+Date: Fri, 4 Jun 2010 10:31:04 -0500
+Subject: [PATCH] BeagleBoard: Add CONFIG_SYS_MEMTEST_SCRATCH
+Add CONFIG_SYS_MEMTEST_SCRATCH to point to a scratch memory area.
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ include/configs/omap3_beagle.h |    9 +++++----
+ 1 files changed, 5 insertions(+), 4 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 555b350..0c6fce6 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -297,10 +297,11 @@
+ /* Boot Argument Buffer Size */
+ #define CONFIG_SYS_BARGSIZE            (CONFIG_SYS_CBSIZE)
+ 
+-#define CONFIG_SYS_MEMTEST_START       (OMAP34XX_SDRC_CS0)     /* memtest */
+-                                                               /* works on */
+-#define CONFIG_SYS_MEMTEST_END         (OMAP34XX_SDRC_CS0 + \
+-                                       0x01F00000) /* 31MB */
+#define CONFIG_SYS_ALT_MEMTEST         1
+#define CONFIG_SYS_MEMTEST_START       (0x82000000)            /* memtest */
+                                                               /* defaults */
+#define CONFIG_SYS_MEMTEST_END         (0x87FFFFFF)            /* 128MB */
+#define CONFIG_SYS_MEMTEST_SCRATCH     (0x81000000)    /* dummy address */
+ 
+ #define CONFIG_SYS_LOAD_ADDR           (OMAP34XX_SDRC_CS0)     /* default */
+                                                        /* load address */
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/0044-Beagleboard-Adjust-boot.patch b/recipes-bsp/u-boot/u-boot/0044-Beagleboard-Adjust-boot.patch
new file mode 100644
index 00000000..19b4ab79
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0044-Beagleboard-Adjust-boot.patch
@@ -0,0 +1,115 @@
+From c8d52ff17d71be0c632f20092d96e9530088c786 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Wed, 21 Jul 2010 08:47:59 -0500
+Subject: [PATCH] BeagleBoard: Adjust boot command on USER button
+When the USER button is pressed, the default boot command will attempt
+to load user.scr.  If that fails, it will try to load a ramdisk image.
+This version also sets the rootfstype and assumes that the userbutton
+command returns success (0) when the button is pressed.  It also really
+attempts to load the user.scr file.
+---
+ include/configs/omap3_beagle.h |   51 ++++++++++++++++++++++++++++++++++-----
+ 1 files changed, 44 insertions(+), 7 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index f372de2..6d1166f 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -195,9 +195,12 @@
+ #define CONFIG_BOOTDELAY               3
+ 
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+-       "loadaddr=0x82000000\0" \
+       "loadaddr=0x80200000\0" \
+       "rdaddr=0x81600000\0" \
+        "usbtty=cdc_acm\0" \
+        "console=ttyS2,115200n8\0" \
+       "optargs=\0" \
+       "bootscr=boot.scr\0" \
+        "mpurate=500\0" \
+        "buddy=none\0" \
+        "vram=12M\0" \
+@@ -208,7 +211,10 @@
+        "mmcrootfstype=ext3 rootwait\0" \
+        "nandroot=/dev/mtdblock4 rw\0" \
+        "nandrootfstype=jffs2\0" \
+       "ramroot=/dev/ram0 rw\0" \
+       "ramrootfstype=ext2\0" \
+        "mmcargs=setenv bootargs console=${console} " \
+               "${optargs} " \
+                "mpurate=${mpurate} " \
+                "buddy=${buddy} "\
+                "vram=${vram} " \
+@@ -217,6 +223,7 @@
+                "root=${mmcroot} " \
+                "rootfstype=${mmcrootfstype}\0" \
+        "nandargs=setenv bootargs console=${console} " \
+               "${optargs} " \
+                "mpurate=${mpurate} " \
+                "buddy=${buddy} "\
+                "vram=${vram} " \
+@@ -224,7 +231,18 @@
+                "omapdss.def_disp=${defaultdisplay} " \
+                "root=${nandroot} " \
+                "rootfstype=${nandrootfstype}\0" \
+-       "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+       "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
+       "ramargs=setenv bootargs console=${console} " \
+               "${optargs} " \
+               "mpurate=${mpurate} " \
+               "buddy=${buddy} "\
+               "vram=${vram} " \
+               "omapfb.mode=dvi:${dvimode} " \
+               "omapdss.def_disp=${defaultdisplay} " \
+               "root=${ramroot} rw ramdisk_size=65536 " \
+               "initrd=${rdaddr},64M " \
+               "rootfstype=${ramrootfstype}\0" \
+       "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
+        "bootscript=echo Running bootscript from mmc ...; " \
+                "source ${loadaddr}\0" \
+        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+@@ -235,15 +253,34 @@
+                "run nandargs; " \
+                "nand read ${loadaddr} 280000 400000; " \
+                "bootm ${loadaddr}\0" \
+       "ramboot=echo Booting from ramdisk ...; " \
+               "run ramargs; " \
+               "bootm ${loadaddr}\0" \
+ 
+ #define CONFIG_BOOTCOMMAND \
+        "if mmc init ${mmcdev}; then " \
+-               "if run loadbootscript; then " \
+-                       "run bootscript; " \
+               "if userbutton; then " \
+                       "setenv bootscr user.scr;" \
+                       "if run loadbootscript; then " \
+                               "run bootscript; " \
+                       "else " \
+                               "if run loaduimage; then " \
+                                       "if run loadramdisk; then " \
+                                               "run ramboot; " \
+                                       "else " \
+                                               "run mmcboot; " \
+                                       "fi; " \
+                               "fi; " \
+                       "fi; " \
+                "else " \
+-                       "if run loaduimage; then " \
+-                               "run mmcboot; " \
+-                       "else run nandboot; " \
+                       "setenv bootscr boot.scr; " \
+                       "if run loadbootscript; then " \
+                               "run bootscript; " \
+                       "else " \
+                               "if run loaduimage; then " \
+                                       "run mmcboot; " \
+                               "else run nandboot; " \
+                               "fi; " \
+                        "fi; " \
+                "fi; " \
+        "else run nandboot; fi"
+-- 
+1.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0045-BeagleBoard-Enable-pullups-on-i2c2.patch b/recipes-bsp/u-boot/u-boot/0045-BeagleBoard-Enable-pullups-on-i2c2.patch
new file mode 100644
index 00000000..ea3ab74c
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0045-BeagleBoard-Enable-pullups-on-i2c2.patch
@@ -0,0 +1,46 @@
+From bf4b655c6c02bbf95bd6ebbf820e53dbd8eb4803 Mon Sep 17 00:00:00 2001
+From: Steve Kipisz <s-kipisz2@ti.com>
+Date: Thu, 5 Aug 2010 10:36:07 -0500
+Subject: [PATCH] BeagleBoard: Enable pullups on i2c2.
+---
+ board/ti/beagle/beagle.c           |    2 ++
+ include/asm-arm/arch-omap3/omap3.h |    9 +++++++++
+ 2 files changed, 11 insertions(+), 0 deletions(-)
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index cdba3dd..eeb37bc 100644
+--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
+@@ -163,6 +163,8 @@ int misc_init_r(void)
+        struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
+        struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+ 
+       /* Enable i22 pullup resisters */
+       *(ulong *)(CONTROL_PROG_IO1) &= ~(PRG_I2C2_PULLUPRESX);
+        beagle_identify();
+ 
+        printf("\nProbing for expansion boards, if none are connected you'll see a harmless I2C error.\n\n");
+diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h
+index 3957c79..1860dff 100644
+--- a/include/asm-arm/arch-omap3/omap3.h
+++ b/include/asm-arm/arch-omap3/omap3.h
+@@ -50,6 +50,15 @@
+ /* CONTROL */
+ #define OMAP34XX_CTRL_BASE             (OMAP34XX_L4_IO_BASE + 0x2000)
+ 
+/* Signal Integrity Parameter Control Registers */
+#define CONTROL_PROG_IO0               0x48002444
+#define CONTROL_PROG_IO1               0x48002448
+#define CONTROL_PROG_IO2               0x48002408
+#define CONTROL_PROG_IO_WKUP1          0x48002A80
+
+/* Bit definition for CONTROL_PROG_IO1 */
+#define PRG_I2C2_PULLUPRESX            0x00000001
+
+ /* UART */
+ #define OMAP34XX_UART1                 (OMAP34XX_L4_IO_BASE + 0x6a000)
+ #define OMAP34XX_UART2                 (OMAP34XX_L4_IO_BASE + 0x6c000)
+-- 
+1.6.6.1
diff --git a/recipes-bsp/u-boot/u-boot/0046-BeagleBoard-Add-camera-to-default-bootargs.patch b/recipes-bsp/u-boot/u-boot/0046-BeagleBoard-Add-camera-to-default-bootargs.patch
new file mode 100644
index 00000000..f999f7fa
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0046-BeagleBoard-Add-camera-to-default-bootargs.patch
@@ -0,0 +1,50 @@
+From 519ecc8a8f441d30e55c7e4552c63e2363fa6dd5 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jkridner@beagleboard.org>
+Date: Thu, 5 Aug 2010 13:54:12 -0500
+Subject: [PATCH] BeagleBoard: Add camera to default bootargs
+Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
+---
+ include/configs/omap3_beagle.h |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 1a76004..48ad805 100644
+--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
+@@ -208,6 +208,7 @@
+        "bootscr=boot.scr\0" \
+        "mpurate=500\0" \
+        "buddy=none\0" \
+       "camera=lbcm3m1\0" \
+        "vram=12M\0" \
+        "dvimode=640x480MR-16@60\0" \
+        "defaultdisplay=dvi\0" \
+@@ -222,6 +223,7 @@
+                "${optargs} " \
+                "mpurate=${mpurate} " \
+                "buddy=${buddy} "\
+               "camera=${camera} "\
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+@@ -231,6 +233,7 @@
+                "${optargs} " \
+                "mpurate=${mpurate} " \
+                "buddy=${buddy} "\
+               "camera=${camera} "\
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+@@ -241,6 +244,7 @@
+                "${optargs} " \
+                "mpurate=${mpurate} " \
+                "buddy=${buddy} "\
+               "camera=${camera} "\
+                "vram=${vram} " \
+                "omapfb.mode=dvi:${dvimode} " \
+                "omapdss.def_disp=${defaultdisplay} " \
+-- 
+1.5.6.4
diff --git a/recipes-bsp/u-boot/u-boot/fw_env.config b/recipes-bsp/u-boot/u-boot/fw_env.config
new file mode 100644
index 00000000..d9112c22
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/fw_env.config
@@ -0,0 +1,8 @@
+# Configuration file for fw_(printenv/saveenv) utility.
+# Up to two entries are valid, in this case the redundant
+# environment sector is assumed present.
+# Notice, that the "Number of sectors" is ignored on NOR.
+# MTD device name       Device offset   Env. size       Flash sector size       Number of sectors
+/dev/mtd2               0x0000          0x20000         0x20000
diff --git a/recipes-bsp/u-boot/u-boot_git.bb b/recipes-bsp/u-boot/u-boot_git.bb
new file mode 100644
index 00000000..37508630
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot_git.bb
@@ -0,0 +1,62 @@
+require u-boot.inc
+PR ="r65"
+FILESPATHPKG =. "u-boot-git:"
+SRC_URI = "git://www.denx.de/git/u-boot.git;protocol=git \
+                       file://0001-OMAP3-enable-i2c-bus-switching-for-Beagle-and-Overo.patch \
+                       file://0002-OMAP3-add-board-revision-detection-for-Overo.patch \
+                       file://0003-OMAP3-update-Beagle-revision-detection-to-recognize-.patch \
+                       file://0004-OMAP3-Set-VAUX2-to-1.8V-for-EHCI-PHY-on-Beagle-Rev-C.patch \
+                       file://0005-OMAP3-add-entry-for-rev-3.1.2-check-and-display-max-.patch \
+                       file://0006-OMAP3-add-mpurate-boot-arg-for-overo-and-beagle.patch \
+                       file://0007-OMAP3-detect-expansion-board-type-version-using-eepr.patch \
+                       file://0008-OMAP3-Overo-enable-config-eeprom-to-set-u-boot-env-v.patch \
+                       file://0009-OMAP3-Overo-enable-input-on-MMC1_CLK-and-MMC3_CLK-pi.patch \
+                       file://0010-OMAP3-Overo-set-CONFIG_SYS_I2C_SPEED-to-400Khz.patch \
+                       file://0011-OMAP3-trim-excessively-long-delays-in-i2c-driver.patch \
+                       file://0012-OMAP3-Overo-allow-expansion-boards-with-any-vendor-I.patch \
+                       file://0013-OMAP3-Overo-change-address-of-expansion-eeprom-to-0x.patch \
+                       file://0014-OMAP3-board.c-don-t-attempt-to-set-up-second-RAM-ban.patch \
+                       file://0015-OMAP3-mem.c-enhance-the-RAM-test.patch \
+                       file://0016-env_nand.c-fail-gracefully-if-no-nand-is-present.patch \
+                       file://0017-OMAP3-add-definitions-to-support-sysinfo-cpu-and-cpu.patch \
+                       file://0018-OMAP3-sys_info-update-cpu-detection-for-36XX-37XX.patch \
+                       file://0019-OMAP3-clocks-update-clock-setup-for-36XX-37XX.patch \
+                       file://0020-OMAP3-beagle-add-support-for-Beagle-xM.patch \
+                       file://0021-OMAP3-Beagle-Overo-remove-omapfb.debug-y-from-defaul.patch \
+                       file://0022-OMAP3-beagle-implement-expansionboard-detection-base.patch \
+                       file://0023-beagleboard-display-message-about-I2C-errors-being-e.patch \
+                       file://0024-beagleboard-fix-TCT-expansionboard-IDs.patch \
+                       file://0025-Add-DSS-driver-for-OMAP3.patch \
+                       file://0026-Enable-DSS-driver-for-Beagle.patch \
+                       file://0027-beagleboardXM-don-t-set-mpurate-on-xM-in-bootargs.patch \
+                       file://0028-OMAP3-fix-and-clean-up-L2-cache-enable-disable-funct.patch \
+                       file://0029-OMAP3-convert-setup_auxcr-to-pure-asm.patch \
+                       file://0030-OMAP3-apply-Cortex-A8-errata-workarounds-only-on-aff.patch \
+                       file://0031-OMAP3-beagle-add-more-expansionboards-based-on-http-.patch \
+                       file://0032-OMAP3-beagle-set-mpurate-to-600-for-revB-and-revC1-3.patch \
+                       file://0033-OMAP3-beagle-prettify-expansionboard-message-a-bit.patch \
+                       file://0034-OMAP3-beagle-add-pinmux-for-Tincantools-Trainer-expa.patch \
+                       file://0035-OMAP3-Beagle-set-mpurate-to-1000-for-xM.patch \
+                       file://0036-OMAP3-Beagle-decrease-bootdelay-to-3-use-VGA-for-def.patch \
+                       file://0037-OMAP3-beagle-pass-expansionboard-name-in-bootargs.patch \
+                       file://0038-Added-configurations-for-xM-Rev-A-board.patch \
+                       file://0039-OMAP3-beagle-setenv-beaglerev-for-AxBx-Cx-xMA-for-be.patch \
+                       file://0001-OMAP-mmc-add-support-for-second-and-third-mmc-chan.patch \
+                       file://0001-OMAP3-Beagle-enable-support-for-second-and-third-m.patch \
+                       file://0038-BeagleBoard-Added-LED-driver.patch \
+                       file://0039-Add-led-command.patch \
+                       file://0041-BeagleBoard-Enabled-LEDs.patch \
+                       file://0042-BeagleBoard-New-command-for-status-of-USER-button.patch \
+                       file://0043-BeagleBoard-Add-CONFIG_SYS_MEMTEST_SCRATCH.patch \
+                       file://0044-Beagleboard-Adjust-boot.patch \
+                       file://0045-BeagleBoard-Enable-pullups-on-i2c2.patch \
+                       file://0046-BeagleBoard-Add-camera-to-default-bootargs.patch \
+                       file://0001-BeagleBoard-move-ramdisk-parameters.patch \
+                       file://fw_env.config \
+"
+SRCREV = "ca6e1c136ddb720c3bb2cc043b99f7f06bc46c55"
+PV = "2010.03+${PR}+gitr${SRCREV}"
+S = "${WORKDIR}/git"