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-rw-r--r--recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-Pin-Mux-initialization-glitch-fix.patch46
1 files changed, 0 insertions, 46 deletions
diff --git a/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-Pin-Mux-initialization-glitch-fix.patch b/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-Pin-Mux-initialization-glitch-fix.patch
deleted file mode 100644
index 7e88d704..00000000
--- a/recipes-bsp/u-boot/u-boot/0001-OMAP3-Beagle-Pin-Mux-initialization-glitch-fix.patch
+++ /dev/null
@@ -1,46 +0,0 @@
1From 7b250f8be3b8c496796dcdc954c9e5959cefea2c Mon Sep 17 00:00:00 2001
2From: Bob Feretich <bob.feretich@rafresearch.com>
3Date: Thu, 24 Feb 2011 13:16:44 +0000
4Subject: [PATCH 01/16] OMAP3 Beagle Pin Mux initialization glitch fix
5
6The below patch reverses the order of two segments in the board file.
7Output pins need to have their values initialized, before they are
8exposed to the logic outside the chip.
9
10Signed-off-by: Bob Feretich <bob.feretich@rafresearch.com>
11Cc: Wolfgang Denk <wd@denx.de>
12---
13 board/ti/beagle/beagle.c | 12 ++++++------
14 1 files changed, 6 insertions(+), 6 deletions(-)
15
16diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
17index c066d6e..929461c 100644
18--- a/board/ti/beagle/beagle.c
19+++ b/board/ti/beagle/beagle.c
20@@ -239,17 +239,17 @@ int misc_init_r(void)
21 twl4030_power_init();
22 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
23
24- /* Configure GPIOs to output */
25- writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
26- writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
27- GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
28-
29- /* Set GPIOs */
30+ /* Set GPIO states before they are made outputs */
31 writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
32 &gpio6_base->setdataout);
33 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
34 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
35
36+ /* Configure GPIOs to output */
37+ writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
38+ writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
39+ GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
40+
41 dieid_num_r();
42
43 return 0;
44--
451.6.6.1
46