diff options
Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch')
-rw-r--r-- | extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch new file mode 100644 index 00000000..f72c477f --- /dev/null +++ b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch | |||
@@ -0,0 +1,48 @@ | |||
1 | From 2f716593e3f11859bf98c997183c47587c2dba76 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mans Rullgard <mans@mansr.com> | ||
3 | Date: Tue, 10 Nov 2009 00:41:54 +0000 | ||
4 | Subject: [PATCH 39/45] ARM: Add option to allow userspace PLE access | ||
5 | |||
6 | This adds a Kconfig option to allow userspace to access the L2 preload | ||
7 | engine (PLE) found in Cortex-A8. | ||
8 | |||
9 | Signed-off-by: Mans Rullgard <mans@mansr.com> | ||
10 | --- | ||
11 | arch/arm/kernel/head.S | 4 ++++ | ||
12 | arch/arm/mm/Kconfig | 8 ++++++++ | ||
13 | 2 files changed, 12 insertions(+), 0 deletions(-) | ||
14 | |||
15 | diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S | ||
16 | index eb62bf9..659ec9e 100644 | ||
17 | --- a/arch/arm/kernel/head.S | ||
18 | +++ b/arch/arm/kernel/head.S | ||
19 | @@ -172,6 +172,10 @@ __enable_mmu: | ||
20 | #ifdef CONFIG_CPU_ICACHE_DISABLE | ||
21 | bic r0, r0, #CR_I | ||
22 | #endif | ||
23 | +#ifdef CONFIG_USER_L2_PLE | ||
24 | + mov r5, #3 | ||
25 | + mcr p15, 0, r5, c11, c1, 0 | ||
26 | +#endif | ||
27 | mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ | ||
28 | domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ | ||
29 | domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ | ||
30 | diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig | ||
31 | index dd4698c..564ff7d 100644 | ||
32 | --- a/arch/arm/mm/Kconfig | ||
33 | +++ b/arch/arm/mm/Kconfig | ||
34 | @@ -785,3 +785,11 @@ config ARM_L1_CACHE_SHIFT | ||
35 | int | ||
36 | default 6 if ARCH_OMAP3 || ARCH_S5PC1XX | ||
37 | default 5 | ||
38 | + | ||
39 | +config USER_L2_PLE | ||
40 | + bool "Enable userspace access to the L2 PLE" | ||
41 | + depends on CPU_V7 | ||
42 | + default n | ||
43 | + help | ||
44 | + Enable userspace access to the L2 preload engine (PLE) available | ||
45 | + in Cortex-A series ARM processors. | ||
46 | -- | ||
47 | 1.6.6.1 | ||
48 | |||