diff options
Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch')
-rw-r--r-- | extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch | 5237 |
1 files changed, 5237 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch new file mode 100644 index 00000000..25a7d610 --- /dev/null +++ b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch | |||
@@ -0,0 +1,5237 @@ | |||
1 | From 65b68a814742181e9a709949b8e3f06fb08e749b Mon Sep 17 00:00:00 2001 | ||
2 | From: Srinath <srinath@mistralsolutions.com> | ||
3 | Date: Thu, 5 Aug 2010 12:03:25 +0530 | ||
4 | Subject: [PATCH] Added Crane Board support | ||
5 | |||
6 | --- | ||
7 | arch/arm/configs/am3517_crane_defconfig | 1768 ++++++++++++++++++++++++++ | ||
8 | arch/arm/mach-omap2/Kconfig | 6 + | ||
9 | arch/arm/mach-omap2/Makefile | 2 + | ||
10 | arch/arm/mach-omap2/board-am3517crane.c | 773 +++++++++++ | ||
11 | arch/arm/mach-omap2/mmc-am3517crane.c | 267 ++++ | ||
12 | arch/arm/mach-omap2/mmc-am3517crane.h | 22 + | ||
13 | arch/arm/mach-omap2/tps65910-pmic.c | 195 +++ | ||
14 | arch/arm/tools/mach-types | 1 + | ||
15 | drivers/gpio/Makefile | 1 + | ||
16 | drivers/i2c/busses/i2c-omap.c | 3 +- | ||
17 | drivers/mfd/Kconfig | 13 + | ||
18 | drivers/mfd/Makefile | 4 +- | ||
19 | drivers/mfd/tps65910-core.c | 741 +++++++++++ | ||
20 | drivers/rtc/Kconfig | 8 + | ||
21 | drivers/rtc/Makefile | 1 + | ||
22 | drivers/rtc/rtc-tps65910.c | 657 ++++++++++ | ||
23 | drivers/usb/host/ehci-hub.c | 9 +- | ||
24 | drivers/usb/musb/Kconfig | 6 +- | ||
25 | drivers/usb/musb/Makefile | 3 +- | ||
26 | drivers/usb/musb/musb_core.c | 2 +- | ||
27 | drivers/usb/musb/musb_core.h | 2 +- | ||
28 | drivers/usb/musb/musb_gadget.c | 2 +- | ||
29 | drivers/usb/musb/musb_gadget_ep0.c | 2 +- | ||
30 | drivers/usb/musb/musb_io.h | 5 +- | ||
31 | drivers/usb/musb/musb_virthub.c | 8 +- | ||
32 | drivers/video/omap2/displays/panel-generic.c | 9 + | ||
33 | drivers/video/omap2/dss/venc.c | 15 +- | ||
34 | include/linux/i2c/tps65910.h | 278 ++++ | ||
35 | 28 files changed, 4779 insertions(+), 24 deletions(-) | ||
36 | create mode 100644 arch/arm/configs/am3517_crane_defconfig | ||
37 | create mode 100644 arch/arm/mach-omap2/board-am3517crane.c | ||
38 | create mode 100644 arch/arm/mach-omap2/mmc-am3517crane.c | ||
39 | create mode 100644 arch/arm/mach-omap2/mmc-am3517crane.h | ||
40 | create mode 100644 arch/arm/mach-omap2/tps65910-pmic.c | ||
41 | create mode 100644 drivers/mfd/tps65910-core.c | ||
42 | create mode 100644 drivers/rtc/rtc-tps65910.c | ||
43 | create mode 100644 include/linux/i2c/tps65910.h | ||
44 | |||
45 | diff --git a/arch/arm/configs/am3517_crane_defconfig b/arch/arm/configs/am3517_crane_defconfig | ||
46 | new file mode 100644 | ||
47 | index 0000000..24ffc83 | ||
48 | --- /dev/null | ||
49 | +++ b/arch/arm/configs/am3517_crane_defconfig | ||
50 | @@ -0,0 +1,1768 @@ | ||
51 | +# | ||
52 | +# Automatically generated make config: don't edit | ||
53 | +# Linux kernel version: 2.6.32 | ||
54 | +# Fri Nov 26 17:48:55 2010 | ||
55 | +# | ||
56 | +CONFIG_ARM=y | ||
57 | +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
58 | +CONFIG_GENERIC_GPIO=y | ||
59 | +CONFIG_GENERIC_TIME=y | ||
60 | +CONFIG_GENERIC_CLOCKEVENTS=y | ||
61 | +CONFIG_GENERIC_HARDIRQS=y | ||
62 | +CONFIG_STACKTRACE_SUPPORT=y | ||
63 | +CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
64 | +CONFIG_LOCKDEP_SUPPORT=y | ||
65 | +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
66 | +CONFIG_HARDIRQS_SW_RESEND=y | ||
67 | +CONFIG_GENERIC_IRQ_PROBE=y | ||
68 | +CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
69 | +CONFIG_ARCH_HAS_CPUFREQ=y | ||
70 | +CONFIG_GENERIC_HWEIGHT=y | ||
71 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
72 | +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
73 | +CONFIG_VECTORS_BASE=0xffff0000 | ||
74 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
75 | +CONFIG_CONSTRUCTORS=y | ||
76 | + | ||
77 | +# | ||
78 | +# General setup | ||
79 | +# | ||
80 | +CONFIG_EXPERIMENTAL=y | ||
81 | +CONFIG_BROKEN_ON_SMP=y | ||
82 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
83 | +CONFIG_LOCALVERSION="" | ||
84 | +# CONFIG_LOCALVERSION_AUTO is not set | ||
85 | +CONFIG_SWAP=y | ||
86 | +CONFIG_SYSVIPC=y | ||
87 | +CONFIG_SYSVIPC_SYSCTL=y | ||
88 | +# CONFIG_POSIX_MQUEUE is not set | ||
89 | +CONFIG_BSD_PROCESS_ACCT=y | ||
90 | +# CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
91 | +# CONFIG_TASKSTATS is not set | ||
92 | +# CONFIG_AUDIT is not set | ||
93 | + | ||
94 | +# | ||
95 | +# RCU Subsystem | ||
96 | +# | ||
97 | +CONFIG_TREE_RCU=y | ||
98 | +# CONFIG_TREE_PREEMPT_RCU is not set | ||
99 | +# CONFIG_TINY_RCU is not set | ||
100 | +# CONFIG_RCU_TRACE is not set | ||
101 | +CONFIG_RCU_FANOUT=32 | ||
102 | +# CONFIG_RCU_FANOUT_EXACT is not set | ||
103 | +# CONFIG_TREE_RCU_TRACE is not set | ||
104 | +CONFIG_IKCONFIG=y | ||
105 | +CONFIG_IKCONFIG_PROC=y | ||
106 | +CONFIG_LOG_BUF_SHIFT=14 | ||
107 | +CONFIG_GROUP_SCHED=y | ||
108 | +CONFIG_FAIR_GROUP_SCHED=y | ||
109 | +# CONFIG_RT_GROUP_SCHED is not set | ||
110 | +CONFIG_USER_SCHED=y | ||
111 | +# CONFIG_CGROUP_SCHED is not set | ||
112 | +# CONFIG_CGROUPS is not set | ||
113 | +CONFIG_SYSFS_DEPRECATED=y | ||
114 | +CONFIG_SYSFS_DEPRECATED_V2=y | ||
115 | +# CONFIG_RELAY is not set | ||
116 | +# CONFIG_NAMESPACES is not set | ||
117 | +CONFIG_BLK_DEV_INITRD=y | ||
118 | +CONFIG_INITRAMFS_SOURCE="" | ||
119 | +CONFIG_RD_GZIP=y | ||
120 | +# CONFIG_RD_BZIP2 is not set | ||
121 | +# CONFIG_RD_LZMA is not set | ||
122 | +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
123 | +CONFIG_SYSCTL=y | ||
124 | +CONFIG_ANON_INODES=y | ||
125 | +CONFIG_EMBEDDED=y | ||
126 | +CONFIG_UID16=y | ||
127 | +# CONFIG_SYSCTL_SYSCALL is not set | ||
128 | +CONFIG_KALLSYMS=y | ||
129 | +# CONFIG_KALLSYMS_ALL is not set | ||
130 | +CONFIG_KALLSYMS_EXTRA_PASS=y | ||
131 | +CONFIG_HOTPLUG=y | ||
132 | +CONFIG_PRINTK=y | ||
133 | +CONFIG_BUG=y | ||
134 | +CONFIG_ELF_CORE=y | ||
135 | +CONFIG_BASE_FULL=y | ||
136 | +CONFIG_FUTEX=y | ||
137 | +CONFIG_EPOLL=y | ||
138 | +CONFIG_SIGNALFD=y | ||
139 | +CONFIG_TIMERFD=y | ||
140 | +CONFIG_EVENTFD=y | ||
141 | +CONFIG_SHMEM=y | ||
142 | +CONFIG_AIO=y | ||
143 | + | ||
144 | +# | ||
145 | +# Kernel Performance Events And Counters | ||
146 | +# | ||
147 | +CONFIG_VM_EVENT_COUNTERS=y | ||
148 | +CONFIG_COMPAT_BRK=y | ||
149 | +CONFIG_SLAB=y | ||
150 | +# CONFIG_SLUB is not set | ||
151 | +# CONFIG_SLOB is not set | ||
152 | +# CONFIG_PROFILING is not set | ||
153 | +CONFIG_HAVE_OPROFILE=y | ||
154 | +# CONFIG_KPROBES is not set | ||
155 | +CONFIG_HAVE_KPROBES=y | ||
156 | +CONFIG_HAVE_KRETPROBES=y | ||
157 | +CONFIG_HAVE_CLK=y | ||
158 | + | ||
159 | +# | ||
160 | +# GCOV-based kernel profiling | ||
161 | +# | ||
162 | +# CONFIG_SLOW_WORK is not set | ||
163 | +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
164 | +CONFIG_SLABINFO=y | ||
165 | +CONFIG_RT_MUTEXES=y | ||
166 | +CONFIG_BASE_SMALL=0 | ||
167 | +CONFIG_MODULES=y | ||
168 | +# CONFIG_MODULE_FORCE_LOAD is not set | ||
169 | +CONFIG_MODULE_UNLOAD=y | ||
170 | +# CONFIG_MODULE_FORCE_UNLOAD is not set | ||
171 | +CONFIG_MODVERSIONS=y | ||
172 | +CONFIG_MODULE_SRCVERSION_ALL=y | ||
173 | +CONFIG_BLOCK=y | ||
174 | +CONFIG_LBDAF=y | ||
175 | +# CONFIG_BLK_DEV_BSG is not set | ||
176 | +# CONFIG_BLK_DEV_INTEGRITY is not set | ||
177 | + | ||
178 | +# | ||
179 | +# IO Schedulers | ||
180 | +# | ||
181 | +CONFIG_IOSCHED_NOOP=y | ||
182 | +CONFIG_IOSCHED_DEADLINE=y | ||
183 | +CONFIG_IOSCHED_CFQ=y | ||
184 | +# CONFIG_DEFAULT_DEADLINE is not set | ||
185 | +CONFIG_DEFAULT_CFQ=y | ||
186 | +# CONFIG_DEFAULT_NOOP is not set | ||
187 | +CONFIG_DEFAULT_IOSCHED="cfq" | ||
188 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
189 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
190 | +# CONFIG_INLINE_SPIN_LOCK is not set | ||
191 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
192 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
193 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
194 | +CONFIG_INLINE_SPIN_UNLOCK=y | ||
195 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
196 | +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
197 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
198 | +# CONFIG_INLINE_READ_TRYLOCK is not set | ||
199 | +# CONFIG_INLINE_READ_LOCK is not set | ||
200 | +# CONFIG_INLINE_READ_LOCK_BH is not set | ||
201 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
202 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
203 | +CONFIG_INLINE_READ_UNLOCK=y | ||
204 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
205 | +CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
206 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
207 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
208 | +# CONFIG_INLINE_WRITE_LOCK is not set | ||
209 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
210 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
211 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
212 | +CONFIG_INLINE_WRITE_UNLOCK=y | ||
213 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
214 | +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
215 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
216 | +# CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
217 | +CONFIG_FREEZER=y | ||
218 | + | ||
219 | +# | ||
220 | +# System Type | ||
221 | +# | ||
222 | +CONFIG_MMU=y | ||
223 | +# CONFIG_ARCH_AAEC2000 is not set | ||
224 | +# CONFIG_ARCH_INTEGRATOR is not set | ||
225 | +# CONFIG_ARCH_REALVIEW is not set | ||
226 | +# CONFIG_ARCH_VERSATILE is not set | ||
227 | +# CONFIG_ARCH_AT91 is not set | ||
228 | +# CONFIG_ARCH_CLPS711X is not set | ||
229 | +# CONFIG_ARCH_GEMINI is not set | ||
230 | +# CONFIG_ARCH_EBSA110 is not set | ||
231 | +# CONFIG_ARCH_EP93XX is not set | ||
232 | +# CONFIG_ARCH_FOOTBRIDGE is not set | ||
233 | +# CONFIG_ARCH_MXC is not set | ||
234 | +# CONFIG_ARCH_STMP3XXX is not set | ||
235 | +# CONFIG_ARCH_NETX is not set | ||
236 | +# CONFIG_ARCH_H720X is not set | ||
237 | +# CONFIG_ARCH_NOMADIK is not set | ||
238 | +# CONFIG_ARCH_IOP13XX is not set | ||
239 | +# CONFIG_ARCH_IOP32X is not set | ||
240 | +# CONFIG_ARCH_IOP33X is not set | ||
241 | +# CONFIG_ARCH_IXP23XX is not set | ||
242 | +# CONFIG_ARCH_IXP2000 is not set | ||
243 | +# CONFIG_ARCH_IXP4XX is not set | ||
244 | +# CONFIG_ARCH_L7200 is not set | ||
245 | +# CONFIG_ARCH_DOVE is not set | ||
246 | +# CONFIG_ARCH_KIRKWOOD is not set | ||
247 | +# CONFIG_ARCH_LOKI is not set | ||
248 | +# CONFIG_ARCH_MV78XX0 is not set | ||
249 | +# CONFIG_ARCH_ORION5X is not set | ||
250 | +# CONFIG_ARCH_MMP is not set | ||
251 | +# CONFIG_ARCH_KS8695 is not set | ||
252 | +# CONFIG_ARCH_NS9XXX is not set | ||
253 | +# CONFIG_ARCH_W90X900 is not set | ||
254 | +# CONFIG_ARCH_PNX4008 is not set | ||
255 | +# CONFIG_ARCH_PXA is not set | ||
256 | +# CONFIG_ARCH_MSM is not set | ||
257 | +# CONFIG_ARCH_RPC is not set | ||
258 | +# CONFIG_ARCH_SA1100 is not set | ||
259 | +# CONFIG_ARCH_S3C2410 is not set | ||
260 | +# CONFIG_ARCH_S3C64XX is not set | ||
261 | +# CONFIG_ARCH_S5PC1XX is not set | ||
262 | +# CONFIG_ARCH_SHARK is not set | ||
263 | +# CONFIG_ARCH_LH7A40X is not set | ||
264 | +# CONFIG_ARCH_U300 is not set | ||
265 | +# CONFIG_ARCH_DAVINCI is not set | ||
266 | +CONFIG_ARCH_OMAP=y | ||
267 | +# CONFIG_ARCH_BCMRING is not set | ||
268 | +# CONFIG_ARCH_U8500 is not set | ||
269 | + | ||
270 | +# | ||
271 | +# TI OMAP Implementations | ||
272 | +# | ||
273 | +CONFIG_ARCH_OMAP_OTG=y | ||
274 | +# CONFIG_ARCH_OMAP1 is not set | ||
275 | +# CONFIG_ARCH_OMAP2 is not set | ||
276 | +CONFIG_ARCH_OMAP3=y | ||
277 | +# CONFIG_ARCH_OMAP4 is not set | ||
278 | + | ||
279 | +# | ||
280 | +# OMAP Feature Selections | ||
281 | +# | ||
282 | +CONFIG_OMAP_RESET_CLOCKS=y | ||
283 | +CONFIG_OMAP_MUX=y | ||
284 | +# CONFIG_OMAP_MUX_DEBUG is not set | ||
285 | +CONFIG_OMAP_MUX_WARNINGS=y | ||
286 | +CONFIG_OMAP_MCBSP=y | ||
287 | +# CONFIG_OMAP_MBOX_FWK is not set | ||
288 | +# CONFIG_OMAP_MPU_TIMER is not set | ||
289 | +CONFIG_OMAP_32K_TIMER=y | ||
290 | +# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set | ||
291 | +CONFIG_OMAP_32K_TIMER_HZ=128 | ||
292 | +CONFIG_OMAP_DM_TIMER=y | ||
293 | +# CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
294 | +# CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
295 | +CONFIG_OMAP_LL_DEBUG_UART3=y | ||
296 | +# CONFIG_OMAP_LL_DEBUG_NONE is not set | ||
297 | +# CONFIG_OMAP_PM_NONE is not set | ||
298 | +CONFIG_OMAP_PM_NOOP=y | ||
299 | +# CONFIG_OMAP_PM_SRF is not set | ||
300 | +CONFIG_ARCH_OMAP34XX=y | ||
301 | +CONFIG_ARCH_OMAP3430=y | ||
302 | +CONFIG_OMAP_PACKAGE_CBB=y | ||
303 | + | ||
304 | +# | ||
305 | +# OMAP Board Type | ||
306 | +# | ||
307 | +# CONFIG_MACH_OMAP3_BEAGLE is not set | ||
308 | +# CONFIG_MACH_OMAP_LDP is not set | ||
309 | +# CONFIG_MACH_OVERO is not set | ||
310 | +# CONFIG_MACH_OMAP3EVM is not set | ||
311 | +# CONFIG_MACH_OMAP3517EVM is not set | ||
312 | +CONFIG_MACH_CRANEBOARD=y | ||
313 | +# CONFIG_MACH_OMAP3_PANDORA is not set | ||
314 | +# CONFIG_MACH_OMAP3_TOUCHBOOK is not set | ||
315 | +# CONFIG_MACH_OMAP_3430SDP is not set | ||
316 | +# CONFIG_MACH_NOKIA_RX51 is not set | ||
317 | +# CONFIG_MACH_OMAP_ZOOM2 is not set | ||
318 | +# CONFIG_MACH_OMAP_ZOOM3 is not set | ||
319 | +# CONFIG_MACH_CM_T35 is not set | ||
320 | +# CONFIG_MACH_IGEP0020 is not set | ||
321 | +# CONFIG_MACH_OMAP_3630SDP is not set | ||
322 | +# CONFIG_OMAP3_EMU is not set | ||
323 | +# CONFIG_OMAP3_SDRC_AC_TIMING is not set | ||
324 | + | ||
325 | +# | ||
326 | +# Processor Type | ||
327 | +# | ||
328 | +CONFIG_CPU_32=y | ||
329 | +CONFIG_CPU_32v6K=y | ||
330 | +CONFIG_CPU_V7=y | ||
331 | +CONFIG_CPU_32v7=y | ||
332 | +CONFIG_CPU_ABRT_EV7=y | ||
333 | +CONFIG_CPU_PABRT_V7=y | ||
334 | +CONFIG_CPU_CACHE_V7=y | ||
335 | +CONFIG_CPU_CACHE_VIPT=y | ||
336 | +CONFIG_CPU_COPY_V6=y | ||
337 | +CONFIG_CPU_TLB_V7=y | ||
338 | +CONFIG_CPU_HAS_ASID=y | ||
339 | +CONFIG_CPU_CP15=y | ||
340 | +CONFIG_CPU_CP15_MMU=y | ||
341 | + | ||
342 | +# | ||
343 | +# Processor Features | ||
344 | +# | ||
345 | +CONFIG_ARM_THUMB=y | ||
346 | +# CONFIG_ARM_THUMBEE is not set | ||
347 | +# CONFIG_CPU_ICACHE_DISABLE is not set | ||
348 | +# CONFIG_CPU_DCACHE_DISABLE is not set | ||
349 | +# CONFIG_CPU_BPREDICT_DISABLE is not set | ||
350 | +CONFIG_HAS_TLS_REG=y | ||
351 | +CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
352 | +CONFIG_ARM_ERRATA_430973=y | ||
353 | +CONFIG_ARM_ERRATA_458693=y | ||
354 | +CONFIG_ARM_ERRATA_460075=y | ||
355 | +CONFIG_COMMON_CLKDEV=y | ||
356 | + | ||
357 | +# | ||
358 | +# Bus support | ||
359 | +# | ||
360 | +# CONFIG_PCI_SYSCALL is not set | ||
361 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | ||
362 | +# CONFIG_PCCARD is not set | ||
363 | + | ||
364 | +# | ||
365 | +# Kernel Features | ||
366 | +# | ||
367 | +CONFIG_TICK_ONESHOT=y | ||
368 | +CONFIG_NO_HZ=y | ||
369 | +CONFIG_HIGH_RES_TIMERS=y | ||
370 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
371 | +CONFIG_VMSPLIT_3G=y | ||
372 | +# CONFIG_VMSPLIT_2G is not set | ||
373 | +# CONFIG_VMSPLIT_1G is not set | ||
374 | +CONFIG_PAGE_OFFSET=0xC0000000 | ||
375 | +CONFIG_PREEMPT_NONE=y | ||
376 | +# CONFIG_PREEMPT_VOLUNTARY is not set | ||
377 | +# CONFIG_PREEMPT is not set | ||
378 | +CONFIG_HZ=128 | ||
379 | +# CONFIG_THUMB2_KERNEL is not set | ||
380 | +CONFIG_AEABI=y | ||
381 | +CONFIG_OABI_COMPAT=y | ||
382 | +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | ||
383 | +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
384 | +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
385 | +# CONFIG_HIGHMEM is not set | ||
386 | +CONFIG_SELECT_MEMORY_MODEL=y | ||
387 | +CONFIG_FLATMEM_MANUAL=y | ||
388 | +# CONFIG_DISCONTIGMEM_MANUAL is not set | ||
389 | +# CONFIG_SPARSEMEM_MANUAL is not set | ||
390 | +CONFIG_FLATMEM=y | ||
391 | +CONFIG_FLAT_NODE_MEM_MAP=y | ||
392 | +CONFIG_PAGEFLAGS_EXTENDED=y | ||
393 | +CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
394 | +# CONFIG_PHYS_ADDR_T_64BIT is not set | ||
395 | +CONFIG_ZONE_DMA_FLAG=0 | ||
396 | +CONFIG_VIRT_TO_BUS=y | ||
397 | +# CONFIG_KSM is not set | ||
398 | +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
399 | +# CONFIG_LEDS is not set | ||
400 | +CONFIG_ALIGNMENT_TRAP=y | ||
401 | +# CONFIG_UACCESS_WITH_MEMCPY is not set | ||
402 | + | ||
403 | +# | ||
404 | +# Boot options | ||
405 | +# | ||
406 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
407 | +CONFIG_ZBOOT_ROM_BSS=0x0 | ||
408 | +CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" | ||
409 | +# CONFIG_XIP_KERNEL is not set | ||
410 | +# CONFIG_KEXEC is not set | ||
411 | + | ||
412 | +# | ||
413 | +# CPU Power Management | ||
414 | +# | ||
415 | +# CONFIG_CPU_FREQ is not set | ||
416 | +# CONFIG_CPU_IDLE is not set | ||
417 | + | ||
418 | +# | ||
419 | +# Floating point emulation | ||
420 | +# | ||
421 | + | ||
422 | +# | ||
423 | +# At least one emulation must be selected | ||
424 | +# | ||
425 | +CONFIG_FPE_NWFPE=y | ||
426 | +# CONFIG_FPE_NWFPE_XP is not set | ||
427 | +# CONFIG_FPE_FASTFPE is not set | ||
428 | +CONFIG_VFP=y | ||
429 | +CONFIG_VFPv3=y | ||
430 | +CONFIG_NEON=y | ||
431 | + | ||
432 | +# | ||
433 | +# Userspace binary formats | ||
434 | +# | ||
435 | +CONFIG_BINFMT_ELF=y | ||
436 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
437 | +CONFIG_HAVE_AOUT=y | ||
438 | +# CONFIG_BINFMT_AOUT is not set | ||
439 | +CONFIG_BINFMT_MISC=y | ||
440 | + | ||
441 | +# | ||
442 | +# Power management options | ||
443 | +# | ||
444 | +CONFIG_PM=y | ||
445 | +CONFIG_PM_DEBUG=y | ||
446 | +# CONFIG_PM_VERBOSE is not set | ||
447 | +CONFIG_CAN_PM_TRACE=y | ||
448 | +CONFIG_PM_SLEEP=y | ||
449 | +CONFIG_SUSPEND=y | ||
450 | +# CONFIG_PM_TEST_SUSPEND is not set | ||
451 | +CONFIG_SUSPEND_FREEZER=y | ||
452 | +# CONFIG_APM_EMULATION is not set | ||
453 | +# CONFIG_PM_RUNTIME is not set | ||
454 | +CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
455 | +CONFIG_NET=y | ||
456 | + | ||
457 | +# | ||
458 | +# Networking options | ||
459 | +# | ||
460 | +CONFIG_PACKET=y | ||
461 | +# CONFIG_PACKET_MMAP is not set | ||
462 | +CONFIG_UNIX=y | ||
463 | +CONFIG_XFRM=y | ||
464 | +# CONFIG_XFRM_USER is not set | ||
465 | +# CONFIG_XFRM_SUB_POLICY is not set | ||
466 | +# CONFIG_XFRM_MIGRATE is not set | ||
467 | +# CONFIG_XFRM_STATISTICS is not set | ||
468 | +CONFIG_NET_KEY=y | ||
469 | +# CONFIG_NET_KEY_MIGRATE is not set | ||
470 | +CONFIG_INET=y | ||
471 | +# CONFIG_IP_MULTICAST is not set | ||
472 | +# CONFIG_IP_ADVANCED_ROUTER is not set | ||
473 | +CONFIG_IP_FIB_HASH=y | ||
474 | +CONFIG_IP_PNP=y | ||
475 | +CONFIG_IP_PNP_DHCP=y | ||
476 | +CONFIG_IP_PNP_BOOTP=y | ||
477 | +CONFIG_IP_PNP_RARP=y | ||
478 | +# CONFIG_NET_IPIP is not set | ||
479 | +# CONFIG_NET_IPGRE is not set | ||
480 | +# CONFIG_ARPD is not set | ||
481 | +# CONFIG_SYN_COOKIES is not set | ||
482 | +# CONFIG_INET_AH is not set | ||
483 | +# CONFIG_INET_ESP is not set | ||
484 | +# CONFIG_INET_IPCOMP is not set | ||
485 | +# CONFIG_INET_XFRM_TUNNEL is not set | ||
486 | +# CONFIG_INET_TUNNEL is not set | ||
487 | +CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
488 | +CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
489 | +CONFIG_INET_XFRM_MODE_BEET=y | ||
490 | +# CONFIG_INET_LRO is not set | ||
491 | +CONFIG_INET_DIAG=y | ||
492 | +CONFIG_INET_TCP_DIAG=y | ||
493 | +# CONFIG_TCP_CONG_ADVANCED is not set | ||
494 | +CONFIG_TCP_CONG_CUBIC=y | ||
495 | +CONFIG_DEFAULT_TCP_CONG="cubic" | ||
496 | +# CONFIG_TCP_MD5SIG is not set | ||
497 | +# CONFIG_IPV6 is not set | ||
498 | +# CONFIG_NETWORK_SECMARK is not set | ||
499 | +# CONFIG_NETFILTER is not set | ||
500 | +# CONFIG_IP_DCCP is not set | ||
501 | +# CONFIG_IP_SCTP is not set | ||
502 | +# CONFIG_RDS is not set | ||
503 | +# CONFIG_TIPC is not set | ||
504 | +# CONFIG_ATM is not set | ||
505 | +# CONFIG_BRIDGE is not set | ||
506 | +# CONFIG_NET_DSA is not set | ||
507 | +# CONFIG_VLAN_8021Q is not set | ||
508 | +# CONFIG_DECNET is not set | ||
509 | +# CONFIG_LLC2 is not set | ||
510 | +# CONFIG_IPX is not set | ||
511 | +# CONFIG_ATALK is not set | ||
512 | +# CONFIG_X25 is not set | ||
513 | +# CONFIG_LAPB is not set | ||
514 | +# CONFIG_ECONET is not set | ||
515 | +# CONFIG_WAN_ROUTER is not set | ||
516 | +# CONFIG_PHONET is not set | ||
517 | +# CONFIG_IEEE802154 is not set | ||
518 | +# CONFIG_NET_SCHED is not set | ||
519 | +# CONFIG_DCB is not set | ||
520 | + | ||
521 | +# | ||
522 | +# Network testing | ||
523 | +# | ||
524 | +# CONFIG_NET_PKTGEN is not set | ||
525 | +# CONFIG_HAMRADIO is not set | ||
526 | +CONFIG_CAN=y | ||
527 | +CONFIG_CAN_RAW=y | ||
528 | +CONFIG_CAN_BCM=y | ||
529 | + | ||
530 | +# | ||
531 | +# CAN Device Drivers | ||
532 | +# | ||
533 | +CONFIG_CAN_VCAN=y | ||
534 | +CONFIG_CAN_DEV=y | ||
535 | +CONFIG_CAN_CALC_BITTIMING=y | ||
536 | +CONFIG_CAN_TI_HECC=y | ||
537 | +# CONFIG_CAN_SJA1000 is not set | ||
538 | + | ||
539 | +# | ||
540 | +# CAN USB interfaces | ||
541 | +# | ||
542 | +# CONFIG_CAN_EMS_USB is not set | ||
543 | +CONFIG_CAN_DEBUG_DEVICES=y | ||
544 | +# CONFIG_IRDA is not set | ||
545 | +# CONFIG_BT is not set | ||
546 | +# CONFIG_AF_RXRPC is not set | ||
547 | +CONFIG_WIRELESS=y | ||
548 | +# CONFIG_CFG80211 is not set | ||
549 | +# CONFIG_LIB80211 is not set | ||
550 | + | ||
551 | +# | ||
552 | +# CFG80211 needs to be enabled for MAC80211 | ||
553 | +# | ||
554 | +# CONFIG_WIMAX is not set | ||
555 | +# CONFIG_RFKILL is not set | ||
556 | +# CONFIG_NET_9P is not set | ||
557 | + | ||
558 | +# | ||
559 | +# Device Drivers | ||
560 | +# | ||
561 | + | ||
562 | +# | ||
563 | +# Generic Driver Options | ||
564 | +# | ||
565 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
566 | +# CONFIG_DEVTMPFS is not set | ||
567 | +CONFIG_STANDALONE=y | ||
568 | +CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
569 | +# CONFIG_FW_LOADER is not set | ||
570 | +# CONFIG_DEBUG_DRIVER is not set | ||
571 | +# CONFIG_DEBUG_DEVRES is not set | ||
572 | +# CONFIG_SYS_HYPERVISOR is not set | ||
573 | +# CONFIG_CONNECTOR is not set | ||
574 | +CONFIG_MTD=y | ||
575 | +# CONFIG_MTD_DEBUG is not set | ||
576 | +# CONFIG_MTD_TESTS is not set | ||
577 | +CONFIG_MTD_CONCAT=y | ||
578 | +CONFIG_MTD_PARTITIONS=y | ||
579 | +# CONFIG_MTD_REDBOOT_PARTS is not set | ||
580 | +CONFIG_MTD_CMDLINE_PARTS=y | ||
581 | +# CONFIG_MTD_AFS_PARTS is not set | ||
582 | +# CONFIG_MTD_AR7_PARTS is not set | ||
583 | + | ||
584 | +# | ||
585 | +# User Modules And Translation Layers | ||
586 | +# | ||
587 | +CONFIG_MTD_CHAR=y | ||
588 | +CONFIG_MTD_BLKDEVS=y | ||
589 | +CONFIG_MTD_BLOCK=y | ||
590 | +# CONFIG_FTL is not set | ||
591 | +# CONFIG_NFTL is not set | ||
592 | +# CONFIG_INFTL is not set | ||
593 | +# CONFIG_RFD_FTL is not set | ||
594 | +# CONFIG_SSFDC is not set | ||
595 | +# CONFIG_MTD_OOPS is not set | ||
596 | + | ||
597 | +# | ||
598 | +# RAM/ROM/Flash chip drivers | ||
599 | +# | ||
600 | +# CONFIG_MTD_CFI is not set | ||
601 | +# CONFIG_MTD_JEDECPROBE is not set | ||
602 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
603 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
604 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
605 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
606 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
607 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
608 | +CONFIG_MTD_CFI_I1=y | ||
609 | +CONFIG_MTD_CFI_I2=y | ||
610 | +# CONFIG_MTD_CFI_I4 is not set | ||
611 | +# CONFIG_MTD_CFI_I8 is not set | ||
612 | +# CONFIG_MTD_RAM is not set | ||
613 | +# CONFIG_MTD_ROM is not set | ||
614 | +# CONFIG_MTD_ABSENT is not set | ||
615 | + | ||
616 | +# | ||
617 | +# Mapping drivers for chip access | ||
618 | +# | ||
619 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
620 | +# CONFIG_MTD_PLATRAM is not set | ||
621 | + | ||
622 | +# | ||
623 | +# Self-contained MTD device drivers | ||
624 | +# | ||
625 | +# CONFIG_MTD_SLRAM is not set | ||
626 | +# CONFIG_MTD_PHRAM is not set | ||
627 | +# CONFIG_MTD_MTDRAM is not set | ||
628 | +# CONFIG_MTD_BLOCK2MTD is not set | ||
629 | + | ||
630 | +# | ||
631 | +# Disk-On-Chip Device Drivers | ||
632 | +# | ||
633 | +# CONFIG_MTD_DOC2000 is not set | ||
634 | +# CONFIG_MTD_DOC2001 is not set | ||
635 | +# CONFIG_MTD_DOC2001PLUS is not set | ||
636 | +CONFIG_MTD_NAND=y | ||
637 | +# CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
638 | +# CONFIG_MTD_NAND_ECC_SMC is not set | ||
639 | +# CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
640 | +# CONFIG_MTD_NAND_GPIO is not set | ||
641 | +CONFIG_MTD_NAND_OMAP2=y | ||
642 | +# CONFIG_MTD_NAND_OMAP_PREFETCH is not set | ||
643 | +CONFIG_MTD_NAND_IDS=y | ||
644 | +# CONFIG_MTD_NAND_DISKONCHIP is not set | ||
645 | +# CONFIG_MTD_NAND_NANDSIM is not set | ||
646 | +# CONFIG_MTD_NAND_PLATFORM is not set | ||
647 | +# CONFIG_MTD_ALAUDA is not set | ||
648 | +# CONFIG_MTD_ONENAND is not set | ||
649 | + | ||
650 | +# | ||
651 | +# LPDDR flash memory drivers | ||
652 | +# | ||
653 | +# CONFIG_MTD_LPDDR is not set | ||
654 | + | ||
655 | +# | ||
656 | +# UBI - Unsorted block images | ||
657 | +# | ||
658 | +# CONFIG_MTD_UBI is not set | ||
659 | +# CONFIG_PARPORT is not set | ||
660 | +CONFIG_BLK_DEV=y | ||
661 | +# CONFIG_BLK_DEV_COW_COMMON is not set | ||
662 | +CONFIG_BLK_DEV_LOOP=y | ||
663 | +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
664 | + | ||
665 | +# | ||
666 | +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
667 | +# | ||
668 | +# CONFIG_BLK_DEV_NBD is not set | ||
669 | +# CONFIG_BLK_DEV_UB is not set | ||
670 | +CONFIG_BLK_DEV_RAM=y | ||
671 | +CONFIG_BLK_DEV_RAM_COUNT=16 | ||
672 | +CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
673 | +# CONFIG_BLK_DEV_XIP is not set | ||
674 | +# CONFIG_CDROM_PKTCDVD is not set | ||
675 | +# CONFIG_ATA_OVER_ETH is not set | ||
676 | +# CONFIG_MG_DISK is not set | ||
677 | +# CONFIG_MISC_DEVICES is not set | ||
678 | +CONFIG_HAVE_IDE=y | ||
679 | +# CONFIG_IDE is not set | ||
680 | + | ||
681 | +# | ||
682 | +# SCSI device support | ||
683 | +# | ||
684 | +# CONFIG_RAID_ATTRS is not set | ||
685 | +CONFIG_SCSI=y | ||
686 | +CONFIG_SCSI_DMA=y | ||
687 | +# CONFIG_SCSI_TGT is not set | ||
688 | +# CONFIG_SCSI_NETLINK is not set | ||
689 | +CONFIG_SCSI_PROC_FS=y | ||
690 | + | ||
691 | +# | ||
692 | +# SCSI support type (disk, tape, CD-ROM) | ||
693 | +# | ||
694 | +CONFIG_BLK_DEV_SD=y | ||
695 | +# CONFIG_CHR_DEV_ST is not set | ||
696 | +# CONFIG_CHR_DEV_OSST is not set | ||
697 | +# CONFIG_BLK_DEV_SR is not set | ||
698 | +# CONFIG_CHR_DEV_SG is not set | ||
699 | +# CONFIG_CHR_DEV_SCH is not set | ||
700 | +# CONFIG_SCSI_MULTI_LUN is not set | ||
701 | +# CONFIG_SCSI_CONSTANTS is not set | ||
702 | +# CONFIG_SCSI_LOGGING is not set | ||
703 | +# CONFIG_SCSI_SCAN_ASYNC is not set | ||
704 | +CONFIG_SCSI_WAIT_SCAN=m | ||
705 | + | ||
706 | +# | ||
707 | +# SCSI Transports | ||
708 | +# | ||
709 | +# CONFIG_SCSI_SPI_ATTRS is not set | ||
710 | +# CONFIG_SCSI_FC_ATTRS is not set | ||
711 | +# CONFIG_SCSI_ISCSI_ATTRS is not set | ||
712 | +# CONFIG_SCSI_SAS_LIBSAS is not set | ||
713 | +# CONFIG_SCSI_SRP_ATTRS is not set | ||
714 | +CONFIG_SCSI_LOWLEVEL=y | ||
715 | +# CONFIG_ISCSI_TCP is not set | ||
716 | +# CONFIG_LIBFC is not set | ||
717 | +# CONFIG_LIBFCOE is not set | ||
718 | +# CONFIG_SCSI_DEBUG is not set | ||
719 | +# CONFIG_SCSI_DH is not set | ||
720 | +# CONFIG_SCSI_OSD_INITIATOR is not set | ||
721 | +# CONFIG_ATA is not set | ||
722 | +# CONFIG_MD is not set | ||
723 | +CONFIG_NETDEVICES=y | ||
724 | +# CONFIG_DUMMY is not set | ||
725 | +# CONFIG_BONDING is not set | ||
726 | +# CONFIG_MACVLAN is not set | ||
727 | +# CONFIG_EQUALIZER is not set | ||
728 | +# CONFIG_TUN is not set | ||
729 | +# CONFIG_VETH is not set | ||
730 | +CONFIG_PHYLIB=y | ||
731 | + | ||
732 | +# | ||
733 | +# MII PHY device drivers | ||
734 | +# | ||
735 | +# CONFIG_MARVELL_PHY is not set | ||
736 | +# CONFIG_DAVICOM_PHY is not set | ||
737 | +# CONFIG_QSEMI_PHY is not set | ||
738 | +# CONFIG_LXT_PHY is not set | ||
739 | +# CONFIG_CICADA_PHY is not set | ||
740 | +# CONFIG_VITESSE_PHY is not set | ||
741 | +# CONFIG_SMSC_PHY is not set | ||
742 | +# CONFIG_BROADCOM_PHY is not set | ||
743 | +# CONFIG_ICPLUS_PHY is not set | ||
744 | +# CONFIG_REALTEK_PHY is not set | ||
745 | +# CONFIG_NATIONAL_PHY is not set | ||
746 | +# CONFIG_STE10XP is not set | ||
747 | +# CONFIG_LSI_ET1011C_PHY is not set | ||
748 | +# CONFIG_FIXED_PHY is not set | ||
749 | +# CONFIG_MDIO_BITBANG is not set | ||
750 | +CONFIG_NET_ETHERNET=y | ||
751 | +CONFIG_MII=y | ||
752 | +# CONFIG_AX88796 is not set | ||
753 | +# CONFIG_SMC91X is not set | ||
754 | +CONFIG_TI_DAVINCI_EMAC=y | ||
755 | +# CONFIG_DM9000 is not set | ||
756 | +# CONFIG_ETHOC is not set | ||
757 | +# CONFIG_SMC911X is not set | ||
758 | +# CONFIG_SMSC911X is not set | ||
759 | +# CONFIG_DNET is not set | ||
760 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
761 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
762 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | ||
763 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
764 | +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
765 | +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
766 | +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
767 | +# CONFIG_B44 is not set | ||
768 | +# CONFIG_KS8842 is not set | ||
769 | +# CONFIG_KS8851_MLL is not set | ||
770 | +CONFIG_NETDEV_1000=y | ||
771 | +CONFIG_NETDEV_10000=y | ||
772 | +CONFIG_WLAN=y | ||
773 | +# CONFIG_USB_ZD1201 is not set | ||
774 | +# CONFIG_HOSTAP is not set | ||
775 | + | ||
776 | +# | ||
777 | +# Enable WiMAX (Networking options) to see the WiMAX drivers | ||
778 | +# | ||
779 | + | ||
780 | +# | ||
781 | +# USB Network Adapters | ||
782 | +# | ||
783 | +# CONFIG_USB_CATC is not set | ||
784 | +# CONFIG_USB_KAWETH is not set | ||
785 | +# CONFIG_USB_PEGASUS is not set | ||
786 | +# CONFIG_USB_RTL8150 is not set | ||
787 | +CONFIG_USB_USBNET=y | ||
788 | +# CONFIG_USB_NET_AX8817X is not set | ||
789 | +CONFIG_USB_NET_CDCETHER=y | ||
790 | +# CONFIG_USB_NET_CDC_EEM is not set | ||
791 | +CONFIG_USB_NET_DM9601=y | ||
792 | +# CONFIG_USB_NET_SMSC95XX is not set | ||
793 | +# CONFIG_USB_NET_GL620A is not set | ||
794 | +# CONFIG_USB_NET_NET1080 is not set | ||
795 | +# CONFIG_USB_NET_PLUSB is not set | ||
796 | +# CONFIG_USB_NET_MCS7830 is not set | ||
797 | +# CONFIG_USB_NET_RNDIS_HOST is not set | ||
798 | +# CONFIG_USB_NET_CDC_SUBSET is not set | ||
799 | +# CONFIG_USB_NET_ZAURUS is not set | ||
800 | +# CONFIG_USB_NET_INT51X1 is not set | ||
801 | +# CONFIG_WAN is not set | ||
802 | +# CONFIG_PPP is not set | ||
803 | +# CONFIG_SLIP is not set | ||
804 | +# CONFIG_NETCONSOLE is not set | ||
805 | +# CONFIG_NETPOLL is not set | ||
806 | +# CONFIG_NET_POLL_CONTROLLER is not set | ||
807 | +# CONFIG_ISDN is not set | ||
808 | +# CONFIG_PHONE is not set | ||
809 | + | ||
810 | +# | ||
811 | +# Input device support | ||
812 | +# | ||
813 | +CONFIG_INPUT=y | ||
814 | +# CONFIG_INPUT_FF_MEMLESS is not set | ||
815 | +# CONFIG_INPUT_POLLDEV is not set | ||
816 | +# CONFIG_INPUT_SPARSEKMAP is not set | ||
817 | + | ||
818 | +# | ||
819 | +# Userland interfaces | ||
820 | +# | ||
821 | +# CONFIG_INPUT_MOUSEDEV is not set | ||
822 | +# CONFIG_INPUT_JOYDEV is not set | ||
823 | +CONFIG_INPUT_EVDEV=y | ||
824 | +# CONFIG_INPUT_EVBUG is not set | ||
825 | + | ||
826 | +# | ||
827 | +# Input Device Drivers | ||
828 | +# | ||
829 | +# CONFIG_INPUT_KEYBOARD is not set | ||
830 | +# CONFIG_INPUT_MOUSE is not set | ||
831 | +# CONFIG_INPUT_JOYSTICK is not set | ||
832 | +# CONFIG_INPUT_TABLET is not set | ||
833 | +# CONFIG_INPUT_TOUCHSCREEN is not set | ||
834 | +# CONFIG_INPUT_MISC is not set | ||
835 | + | ||
836 | +# | ||
837 | +# Hardware I/O ports | ||
838 | +# | ||
839 | +CONFIG_SERIO=y | ||
840 | +CONFIG_SERIO_SERPORT=y | ||
841 | +CONFIG_SERIO_LIBPS2=y | ||
842 | +# CONFIG_SERIO_RAW is not set | ||
843 | +# CONFIG_SERIO_ALTERA_PS2 is not set | ||
844 | +# CONFIG_GAMEPORT is not set | ||
845 | + | ||
846 | +# | ||
847 | +# Character devices | ||
848 | +# | ||
849 | +CONFIG_VT=y | ||
850 | +CONFIG_CONSOLE_TRANSLATIONS=y | ||
851 | +CONFIG_VT_CONSOLE=y | ||
852 | +CONFIG_HW_CONSOLE=y | ||
853 | +# CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
854 | +CONFIG_DEVKMEM=y | ||
855 | +# CONFIG_SERIAL_NONSTANDARD is not set | ||
856 | + | ||
857 | +# | ||
858 | +# Serial drivers | ||
859 | +# | ||
860 | +CONFIG_SERIAL_8250=y | ||
861 | +CONFIG_SERIAL_8250_CONSOLE=y | ||
862 | +CONFIG_SERIAL_8250_NR_UARTS=32 | ||
863 | +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
864 | +CONFIG_SERIAL_8250_EXTENDED=y | ||
865 | +CONFIG_SERIAL_8250_MANY_PORTS=y | ||
866 | +CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
867 | +CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
868 | +CONFIG_SERIAL_8250_RSA=y | ||
869 | + | ||
870 | +# | ||
871 | +# Non-8250 serial port support | ||
872 | +# | ||
873 | +CONFIG_SERIAL_CORE=y | ||
874 | +CONFIG_SERIAL_CORE_CONSOLE=y | ||
875 | +CONFIG_UNIX98_PTYS=y | ||
876 | +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
877 | +# CONFIG_LEGACY_PTYS is not set | ||
878 | +# CONFIG_IPMI_HANDLER is not set | ||
879 | +CONFIG_HW_RANDOM=y | ||
880 | +# CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
881 | +# CONFIG_R3964 is not set | ||
882 | +# CONFIG_RAW_DRIVER is not set | ||
883 | +# CONFIG_TCG_TPM is not set | ||
884 | +CONFIG_I2C=y | ||
885 | +CONFIG_I2C_BOARDINFO=y | ||
886 | +CONFIG_I2C_COMPAT=y | ||
887 | +# CONFIG_I2C_CHARDEV is not set | ||
888 | +CONFIG_I2C_HELPER_AUTO=y | ||
889 | + | ||
890 | +# | ||
891 | +# I2C Hardware Bus support | ||
892 | +# | ||
893 | + | ||
894 | +# | ||
895 | +# I2C system bus drivers (mostly embedded / system-on-chip) | ||
896 | +# | ||
897 | +# CONFIG_I2C_DESIGNWARE is not set | ||
898 | +# CONFIG_I2C_GPIO is not set | ||
899 | +# CONFIG_I2C_OCORES is not set | ||
900 | +CONFIG_I2C_OMAP=y | ||
901 | +# CONFIG_I2C_SIMTEC is not set | ||
902 | + | ||
903 | +# | ||
904 | +# External I2C/SMBus adapter drivers | ||
905 | +# | ||
906 | +# CONFIG_I2C_PARPORT_LIGHT is not set | ||
907 | +# CONFIG_I2C_TAOS_EVM is not set | ||
908 | +# CONFIG_I2C_TINY_USB is not set | ||
909 | + | ||
910 | +# | ||
911 | +# Other I2C/SMBus bus drivers | ||
912 | +# | ||
913 | +# CONFIG_I2C_PCA_PLATFORM is not set | ||
914 | +# CONFIG_I2C_STUB is not set | ||
915 | + | ||
916 | +# | ||
917 | +# Miscellaneous I2C Chip support | ||
918 | +# | ||
919 | +# CONFIG_SENSORS_TSL2550 is not set | ||
920 | +# CONFIG_I2C_DEBUG_CORE is not set | ||
921 | +# CONFIG_I2C_DEBUG_ALGO is not set | ||
922 | +# CONFIG_I2C_DEBUG_BUS is not set | ||
923 | +# CONFIG_I2C_DEBUG_CHIP is not set | ||
924 | +# CONFIG_SPI is not set | ||
925 | + | ||
926 | +# | ||
927 | +# PPS support | ||
928 | +# | ||
929 | +# CONFIG_PPS is not set | ||
930 | +CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
931 | +CONFIG_GPIOLIB=y | ||
932 | +# CONFIG_DEBUG_GPIO is not set | ||
933 | +CONFIG_GPIO_SYSFS=y | ||
934 | + | ||
935 | +# | ||
936 | +# Memory mapped GPIO expanders: | ||
937 | +# | ||
938 | + | ||
939 | +# | ||
940 | +# I2C GPIO expanders: | ||
941 | +# | ||
942 | +# CONFIG_GPIO_MAX732X is not set | ||
943 | +# CONFIG_GPIO_PCA953X is not set | ||
944 | +# CONFIG_GPIO_PCF857X is not set | ||
945 | +# CONFIG_GPIO_TPS65910 is not set | ||
946 | + | ||
947 | +# | ||
948 | +# PCI GPIO expanders: | ||
949 | +# | ||
950 | + | ||
951 | +# | ||
952 | +# SPI GPIO expanders: | ||
953 | +# | ||
954 | + | ||
955 | +# | ||
956 | +# AC97 GPIO expanders: | ||
957 | +# | ||
958 | +# CONFIG_W1 is not set | ||
959 | +# CONFIG_POWER_SUPPLY is not set | ||
960 | +# CONFIG_HWMON is not set | ||
961 | +# CONFIG_THERMAL is not set | ||
962 | +CONFIG_WATCHDOG=y | ||
963 | +CONFIG_WATCHDOG_NOWAYOUT=y | ||
964 | + | ||
965 | +# | ||
966 | +# Watchdog Device Drivers | ||
967 | +# | ||
968 | +# CONFIG_SOFT_WATCHDOG is not set | ||
969 | +CONFIG_OMAP_WATCHDOG=y | ||
970 | + | ||
971 | +# | ||
972 | +# USB-based Watchdog Cards | ||
973 | +# | ||
974 | +# CONFIG_USBPCWATCHDOG is not set | ||
975 | +CONFIG_SSB_POSSIBLE=y | ||
976 | + | ||
977 | +# | ||
978 | +# Sonics Silicon Backplane | ||
979 | +# | ||
980 | +# CONFIG_SSB is not set | ||
981 | + | ||
982 | +# | ||
983 | +# Multifunction device drivers | ||
984 | +# | ||
985 | +# CONFIG_MFD_CORE is not set | ||
986 | +# CONFIG_MFD_SM501 is not set | ||
987 | +# CONFIG_MFD_ASIC3 is not set | ||
988 | +# CONFIG_HTC_EGPIO is not set | ||
989 | +# CONFIG_HTC_PASIC3 is not set | ||
990 | +# CONFIG_TPS65010 is not set | ||
991 | +# CONFIG_TWL4030_CORE is not set | ||
992 | +CONFIG_TPS65910_CORE=y | ||
993 | +# CONFIG_MFD_TMIO is not set | ||
994 | +# CONFIG_MFD_T7L66XB is not set | ||
995 | +# CONFIG_MFD_TC6387XB is not set | ||
996 | +# CONFIG_MFD_TC6393XB is not set | ||
997 | +# CONFIG_PMIC_DA903X is not set | ||
998 | +# CONFIG_PMIC_ADP5520 is not set | ||
999 | +# CONFIG_MFD_WM8400 is not set | ||
1000 | +# CONFIG_MFD_WM831X is not set | ||
1001 | +# CONFIG_MFD_WM8350_I2C is not set | ||
1002 | +# CONFIG_MFD_PCF50633 is not set | ||
1003 | +# CONFIG_AB3100_CORE is not set | ||
1004 | +# CONFIG_MFD_88PM8607 is not set | ||
1005 | +CONFIG_REGULATOR=y | ||
1006 | +# CONFIG_REGULATOR_DEBUG is not set | ||
1007 | +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
1008 | +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
1009 | +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
1010 | +# CONFIG_REGULATOR_BQ24022 is not set | ||
1011 | +# CONFIG_REGULATOR_MAX1586 is not set | ||
1012 | +# CONFIG_REGULATOR_TPS65910 is not set | ||
1013 | +# CONFIG_REGULATOR_LP3971 is not set | ||
1014 | +# CONFIG_REGULATOR_TPS65023 is not set | ||
1015 | +# CONFIG_REGULATOR_TPS6507X is not set | ||
1016 | +CONFIG_MEDIA_SUPPORT=y | ||
1017 | + | ||
1018 | +# | ||
1019 | +# Multimedia core support | ||
1020 | +# | ||
1021 | +CONFIG_VIDEO_DEV=y | ||
1022 | +CONFIG_VIDEO_V4L2_COMMON=y | ||
1023 | +CONFIG_VIDEO_ALLOW_V4L1=y | ||
1024 | +CONFIG_VIDEO_V4L1_COMPAT=y | ||
1025 | +# CONFIG_DVB_CORE is not set | ||
1026 | +CONFIG_VIDEO_MEDIA=y | ||
1027 | + | ||
1028 | +# | ||
1029 | +# Multimedia drivers | ||
1030 | +# | ||
1031 | +# CONFIG_MEDIA_ATTACH is not set | ||
1032 | +CONFIG_MEDIA_TUNER=y | ||
1033 | +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
1034 | +CONFIG_MEDIA_TUNER_SIMPLE=y | ||
1035 | +CONFIG_MEDIA_TUNER_TDA8290=y | ||
1036 | +CONFIG_MEDIA_TUNER_TDA9887=y | ||
1037 | +CONFIG_MEDIA_TUNER_TEA5761=y | ||
1038 | +CONFIG_MEDIA_TUNER_TEA5767=y | ||
1039 | +CONFIG_MEDIA_TUNER_MT20XX=y | ||
1040 | +CONFIG_MEDIA_TUNER_XC2028=y | ||
1041 | +CONFIG_MEDIA_TUNER_XC5000=y | ||
1042 | +CONFIG_MEDIA_TUNER_MC44S803=y | ||
1043 | +CONFIG_VIDEO_V4L2=y | ||
1044 | +CONFIG_VIDEO_V4L1=y | ||
1045 | +# CONFIG_VIDEO_CAPTURE_DRIVERS is not set | ||
1046 | +# CONFIG_RADIO_ADAPTERS is not set | ||
1047 | +# CONFIG_DAB is not set | ||
1048 | + | ||
1049 | +# | ||
1050 | +# Graphics support | ||
1051 | +# | ||
1052 | +# CONFIG_VGASTATE is not set | ||
1053 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
1054 | +CONFIG_FB=y | ||
1055 | +# CONFIG_FIRMWARE_EDID is not set | ||
1056 | +# CONFIG_FB_DDC is not set | ||
1057 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1058 | +CONFIG_FB_CFB_FILLRECT=y | ||
1059 | +CONFIG_FB_CFB_COPYAREA=y | ||
1060 | +CONFIG_FB_CFB_IMAGEBLIT=y | ||
1061 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
1062 | +# CONFIG_FB_SYS_FILLRECT is not set | ||
1063 | +# CONFIG_FB_SYS_COPYAREA is not set | ||
1064 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | ||
1065 | +# CONFIG_FB_FOREIGN_ENDIAN is not set | ||
1066 | +# CONFIG_FB_SYS_FOPS is not set | ||
1067 | +# CONFIG_FB_SVGALIB is not set | ||
1068 | +# CONFIG_FB_MACMODES is not set | ||
1069 | +# CONFIG_FB_BACKLIGHT is not set | ||
1070 | +# CONFIG_FB_MODE_HELPERS is not set | ||
1071 | +# CONFIG_FB_TILEBLITTING is not set | ||
1072 | + | ||
1073 | +# | ||
1074 | +# Frame buffer hardware drivers | ||
1075 | +# | ||
1076 | +# CONFIG_FB_S1D13XXX is not set | ||
1077 | +# CONFIG_FB_VIRTUAL is not set | ||
1078 | +# CONFIG_FB_METRONOME is not set | ||
1079 | +# CONFIG_FB_MB862XX is not set | ||
1080 | +# CONFIG_FB_BROADSHEET is not set | ||
1081 | +# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
1082 | +CONFIG_OMAP2_VRAM=y | ||
1083 | +CONFIG_OMAP2_VRFB=y | ||
1084 | +CONFIG_OMAP2_DSS=y | ||
1085 | +CONFIG_OMAP2_VRAM_SIZE=4 | ||
1086 | +# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set | ||
1087 | +# CONFIG_OMAP2_DSS_RFBI is not set | ||
1088 | +CONFIG_OMAP2_DSS_VENC=y | ||
1089 | +# CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO is not set | ||
1090 | +CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE=y | ||
1091 | +# CONFIG_OMAP2_DSS_SDI is not set | ||
1092 | +# CONFIG_OMAP2_DSS_DSI is not set | ||
1093 | +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
1094 | +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 | ||
1095 | +CONFIG_FB_OMAP2=y | ||
1096 | +# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set | ||
1097 | +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | ||
1098 | +CONFIG_FB_OMAP2_NUM_FBS=1 | ||
1099 | + | ||
1100 | +# | ||
1101 | +# OMAP2/3 Display Device Drivers | ||
1102 | +# | ||
1103 | +CONFIG_PANEL_GENERIC=y | ||
1104 | +# CONFIG_PANEL_SHARP_LS037V7DW01 is not set | ||
1105 | +# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set | ||
1106 | +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1107 | + | ||
1108 | +# | ||
1109 | +# Display device support | ||
1110 | +# | ||
1111 | +# CONFIG_DISPLAY_SUPPORT is not set | ||
1112 | + | ||
1113 | +# | ||
1114 | +# Console display driver support | ||
1115 | +# | ||
1116 | +# CONFIG_VGA_CONSOLE is not set | ||
1117 | +CONFIG_DUMMY_CONSOLE=y | ||
1118 | +# CONFIG_FRAMEBUFFER_CONSOLE is not set | ||
1119 | +CONFIG_LOGO=y | ||
1120 | +CONFIG_LOGO_LINUX_MONO=y | ||
1121 | +CONFIG_LOGO_LINUX_VGA16=y | ||
1122 | +CONFIG_LOGO_LINUX_CLUT224=y | ||
1123 | +# CONFIG_SOUND is not set | ||
1124 | +CONFIG_HID_SUPPORT=y | ||
1125 | +CONFIG_HID=y | ||
1126 | +# CONFIG_HIDRAW is not set | ||
1127 | + | ||
1128 | +# | ||
1129 | +# USB Input Devices | ||
1130 | +# | ||
1131 | +CONFIG_USB_HID=y | ||
1132 | +# CONFIG_HID_PID is not set | ||
1133 | +# CONFIG_USB_HIDDEV is not set | ||
1134 | + | ||
1135 | +# | ||
1136 | +# Special HID drivers | ||
1137 | +# | ||
1138 | +# CONFIG_HID_A4TECH is not set | ||
1139 | +# CONFIG_HID_APPLE is not set | ||
1140 | +# CONFIG_HID_BELKIN is not set | ||
1141 | +# CONFIG_HID_CHERRY is not set | ||
1142 | +# CONFIG_HID_CHICONY is not set | ||
1143 | +# CONFIG_HID_CYPRESS is not set | ||
1144 | +# CONFIG_HID_DRAGONRISE is not set | ||
1145 | +# CONFIG_HID_EZKEY is not set | ||
1146 | +# CONFIG_HID_KYE is not set | ||
1147 | +# CONFIG_HID_GYRATION is not set | ||
1148 | +# CONFIG_HID_TWINHAN is not set | ||
1149 | +# CONFIG_HID_KENSINGTON is not set | ||
1150 | +# CONFIG_HID_LOGITECH is not set | ||
1151 | +# CONFIG_HID_MICROSOFT is not set | ||
1152 | +# CONFIG_HID_MONTEREY is not set | ||
1153 | +# CONFIG_HID_NTRIG is not set | ||
1154 | +# CONFIG_HID_PANTHERLORD is not set | ||
1155 | +# CONFIG_HID_PETALYNX is not set | ||
1156 | +# CONFIG_HID_SAMSUNG is not set | ||
1157 | +# CONFIG_HID_SONY is not set | ||
1158 | +# CONFIG_HID_SUNPLUS is not set | ||
1159 | +# CONFIG_HID_GREENASIA is not set | ||
1160 | +# CONFIG_HID_SMARTJOYPLUS is not set | ||
1161 | +# CONFIG_HID_TOPSEED is not set | ||
1162 | +# CONFIG_HID_THRUSTMASTER is not set | ||
1163 | +# CONFIG_HID_ZEROPLUS is not set | ||
1164 | +CONFIG_USB_SUPPORT=y | ||
1165 | +CONFIG_USB_ARCH_HAS_HCD=y | ||
1166 | +CONFIG_USB_ARCH_HAS_OHCI=y | ||
1167 | +CONFIG_USB_ARCH_HAS_EHCI=y | ||
1168 | +CONFIG_USB=y | ||
1169 | +# CONFIG_USB_DEBUG is not set | ||
1170 | +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
1171 | + | ||
1172 | +# | ||
1173 | +# Miscellaneous USB options | ||
1174 | +# | ||
1175 | +CONFIG_USB_DEVICEFS=y | ||
1176 | +CONFIG_USB_DEVICE_CLASS=y | ||
1177 | +# CONFIG_USB_DYNAMIC_MINORS is not set | ||
1178 | +CONFIG_USB_SUSPEND=y | ||
1179 | +CONFIG_USB_OTG=y | ||
1180 | +# CONFIG_USB_OTG_WHITELIST is not set | ||
1181 | +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1182 | +# CONFIG_USB_MON is not set | ||
1183 | +# CONFIG_USB_WUSB is not set | ||
1184 | +# CONFIG_USB_WUSB_CBAF is not set | ||
1185 | + | ||
1186 | +# | ||
1187 | +# USB Host Controller Drivers | ||
1188 | +# | ||
1189 | +# CONFIG_USB_C67X00_HCD is not set | ||
1190 | +CONFIG_USB_EHCI_HCD=y | ||
1191 | +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
1192 | +CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
1193 | +# CONFIG_USB_OXU210HP_HCD is not set | ||
1194 | +# CONFIG_USB_ISP116X_HCD is not set | ||
1195 | +# CONFIG_USB_ISP1760_HCD is not set | ||
1196 | +# CONFIG_USB_ISP1362_HCD is not set | ||
1197 | +# CONFIG_USB_OHCI_HCD is not set | ||
1198 | +# CONFIG_USB_SL811_HCD is not set | ||
1199 | +# CONFIG_USB_R8A66597_HCD is not set | ||
1200 | +# CONFIG_USB_HWA_HCD is not set | ||
1201 | +CONFIG_USB_MUSB_HDRC=y | ||
1202 | +CONFIG_USB_MUSB_SOC=y | ||
1203 | + | ||
1204 | +# | ||
1205 | +# OMAP 343x high speed USB support | ||
1206 | +# | ||
1207 | +# CONFIG_USB_MUSB_HOST is not set | ||
1208 | +# CONFIG_USB_MUSB_PERIPHERAL is not set | ||
1209 | +CONFIG_USB_MUSB_OTG=y | ||
1210 | +CONFIG_USB_GADGET_MUSB_HDRC=y | ||
1211 | +CONFIG_USB_MUSB_HDRC_HCD=y | ||
1212 | +# CONFIG_MUSB_PIO_ONLY is not set | ||
1213 | +# CONFIG_USB_TI_CPPI_DMA is not set | ||
1214 | +CONFIG_USB_TI_CPPI41_DMA=y | ||
1215 | +CONFIG_USB_MUSB_DEBUG=y | ||
1216 | + | ||
1217 | +# | ||
1218 | +# USB Device Class drivers | ||
1219 | +# | ||
1220 | +# CONFIG_USB_ACM is not set | ||
1221 | +# CONFIG_USB_PRINTER is not set | ||
1222 | +# CONFIG_USB_WDM is not set | ||
1223 | +# CONFIG_USB_TMC is not set | ||
1224 | + | ||
1225 | +# | ||
1226 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1227 | +# | ||
1228 | + | ||
1229 | +# | ||
1230 | +# also be needed; see USB_STORAGE Help for more info | ||
1231 | +# | ||
1232 | +CONFIG_USB_STORAGE=y | ||
1233 | +# CONFIG_USB_STORAGE_DEBUG is not set | ||
1234 | +# CONFIG_USB_STORAGE_DATAFAB is not set | ||
1235 | +# CONFIG_USB_STORAGE_FREECOM is not set | ||
1236 | +# CONFIG_USB_STORAGE_ISD200 is not set | ||
1237 | +# CONFIG_USB_STORAGE_USBAT is not set | ||
1238 | +# CONFIG_USB_STORAGE_SDDR09 is not set | ||
1239 | +# CONFIG_USB_STORAGE_SDDR55 is not set | ||
1240 | +# CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1241 | +# CONFIG_USB_STORAGE_ALAUDA is not set | ||
1242 | +# CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1243 | +# CONFIG_USB_STORAGE_KARMA is not set | ||
1244 | +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1245 | +# CONFIG_USB_LIBUSUAL is not set | ||
1246 | + | ||
1247 | +# | ||
1248 | +# USB Imaging devices | ||
1249 | +# | ||
1250 | +# CONFIG_USB_MDC800 is not set | ||
1251 | +# CONFIG_USB_MICROTEK is not set | ||
1252 | + | ||
1253 | +# | ||
1254 | +# USB port drivers | ||
1255 | +# | ||
1256 | +# CONFIG_USB_SERIAL is not set | ||
1257 | + | ||
1258 | +# | ||
1259 | +# USB Miscellaneous drivers | ||
1260 | +# | ||
1261 | +# CONFIG_USB_EMI62 is not set | ||
1262 | +# CONFIG_USB_EMI26 is not set | ||
1263 | +# CONFIG_USB_ADUTUX is not set | ||
1264 | +# CONFIG_USB_SEVSEG is not set | ||
1265 | +# CONFIG_USB_RIO500 is not set | ||
1266 | +# CONFIG_USB_LEGOTOWER is not set | ||
1267 | +# CONFIG_USB_LCD is not set | ||
1268 | +# CONFIG_USB_BERRY_CHARGE is not set | ||
1269 | +# CONFIG_USB_LED is not set | ||
1270 | +# CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1271 | +# CONFIG_USB_CYTHERM is not set | ||
1272 | +# CONFIG_USB_IDMOUSE is not set | ||
1273 | +# CONFIG_USB_FTDI_ELAN is not set | ||
1274 | +# CONFIG_USB_APPLEDISPLAY is not set | ||
1275 | +# CONFIG_USB_SISUSBVGA is not set | ||
1276 | +# CONFIG_USB_LD is not set | ||
1277 | +# CONFIG_USB_TRANCEVIBRATOR is not set | ||
1278 | +# CONFIG_USB_IOWARRIOR is not set | ||
1279 | +CONFIG_USB_TEST=y | ||
1280 | +# CONFIG_USB_ISIGHTFW is not set | ||
1281 | +# CONFIG_USB_VST is not set | ||
1282 | +CONFIG_USB_GADGET=y | ||
1283 | +# CONFIG_USB_GADGET_DEBUG is not set | ||
1284 | +# CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1285 | +CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
1286 | +CONFIG_USB_GADGET_SELECTED=y | ||
1287 | +# CONFIG_USB_GADGET_AT91 is not set | ||
1288 | +# CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
1289 | +# CONFIG_USB_GADGET_FSL_USB2 is not set | ||
1290 | +# CONFIG_USB_GADGET_LH7A40X is not set | ||
1291 | +# CONFIG_USB_GADGET_OMAP is not set | ||
1292 | +# CONFIG_USB_GADGET_PXA25X is not set | ||
1293 | +# CONFIG_USB_GADGET_R8A66597 is not set | ||
1294 | +# CONFIG_USB_GADGET_PXA27X is not set | ||
1295 | +# CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
1296 | +# CONFIG_USB_GADGET_IMX is not set | ||
1297 | +# CONFIG_USB_GADGET_S3C2410 is not set | ||
1298 | +# CONFIG_USB_GADGET_M66592 is not set | ||
1299 | +# CONFIG_USB_GADGET_AMD5536UDC is not set | ||
1300 | +# CONFIG_USB_GADGET_FSL_QE is not set | ||
1301 | +# CONFIG_USB_GADGET_CI13XXX is not set | ||
1302 | +# CONFIG_USB_GADGET_NET2280 is not set | ||
1303 | +# CONFIG_USB_GADGET_GOKU is not set | ||
1304 | +# CONFIG_USB_GADGET_LANGWELL is not set | ||
1305 | +# CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1306 | +CONFIG_USB_GADGET_DUALSPEED=y | ||
1307 | +# CONFIG_USB_ZERO is not set | ||
1308 | +# CONFIG_USB_AUDIO is not set | ||
1309 | +# CONFIG_USB_ETH is not set | ||
1310 | +# CONFIG_USB_GADGETFS is not set | ||
1311 | +CONFIG_USB_FILE_STORAGE=m | ||
1312 | +# CONFIG_USB_FILE_STORAGE_TEST is not set | ||
1313 | +CONFIG_USB_MASS_STORAGE=m | ||
1314 | +# CONFIG_USB_G_SERIAL is not set | ||
1315 | +# CONFIG_USB_MIDI_GADGET is not set | ||
1316 | +# CONFIG_USB_G_PRINTER is not set | ||
1317 | +# CONFIG_USB_CDC_COMPOSITE is not set | ||
1318 | +# CONFIG_USB_G_MULTI is not set | ||
1319 | + | ||
1320 | +# | ||
1321 | +# OTG and related infrastructure | ||
1322 | +# | ||
1323 | +CONFIG_USB_OTG_UTILS=y | ||
1324 | +# CONFIG_USB_GPIO_VBUS is not set | ||
1325 | +# CONFIG_ISP1301_OMAP is not set | ||
1326 | +# CONFIG_USB_ULPI is not set | ||
1327 | +CONFIG_NOP_USB_XCEIV=y | ||
1328 | +CONFIG_MMC=y | ||
1329 | +# CONFIG_MMC_DEBUG is not set | ||
1330 | +# CONFIG_MMC_UNSAFE_RESUME is not set | ||
1331 | + | ||
1332 | +# | ||
1333 | +# MMC/SD/SDIO Card Drivers | ||
1334 | +# | ||
1335 | +CONFIG_MMC_BLOCK=y | ||
1336 | +CONFIG_MMC_BLOCK_BOUNCE=y | ||
1337 | +# CONFIG_SDIO_UART is not set | ||
1338 | +# CONFIG_MMC_TEST is not set | ||
1339 | + | ||
1340 | +# | ||
1341 | +# MMC/SD/SDIO Host Controller Drivers | ||
1342 | +# | ||
1343 | +# CONFIG_MMC_SDHCI is not set | ||
1344 | +# CONFIG_MMC_OMAP is not set | ||
1345 | +CONFIG_MMC_OMAP_HS=y | ||
1346 | +# CONFIG_MMC_AT91 is not set | ||
1347 | +# CONFIG_MMC_ATMELMCI is not set | ||
1348 | +# CONFIG_MEMSTICK is not set | ||
1349 | +# CONFIG_NEW_LEDS is not set | ||
1350 | +# CONFIG_ACCESSIBILITY is not set | ||
1351 | +CONFIG_RTC_LIB=y | ||
1352 | +CONFIG_RTC_CLASS=y | ||
1353 | +CONFIG_RTC_HCTOSYS=y | ||
1354 | +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1355 | +# CONFIG_RTC_DEBUG is not set | ||
1356 | + | ||
1357 | +# | ||
1358 | +# RTC interfaces | ||
1359 | +# | ||
1360 | +CONFIG_RTC_INTF_SYSFS=y | ||
1361 | +CONFIG_RTC_INTF_PROC=y | ||
1362 | +CONFIG_RTC_INTF_DEV=y | ||
1363 | +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1364 | +# CONFIG_RTC_DRV_TEST is not set | ||
1365 | + | ||
1366 | +# | ||
1367 | +# I2C RTC drivers | ||
1368 | +# | ||
1369 | +# CONFIG_RTC_DRV_DS1307 is not set | ||
1370 | +# CONFIG_RTC_DRV_DS1374 is not set | ||
1371 | +# CONFIG_RTC_DRV_DS1672 is not set | ||
1372 | +# CONFIG_RTC_DRV_MAX6900 is not set | ||
1373 | +# CONFIG_RTC_DRV_RS5C372 is not set | ||
1374 | +# CONFIG_RTC_DRV_ISL1208 is not set | ||
1375 | +# CONFIG_RTC_DRV_X1205 is not set | ||
1376 | +# CONFIG_RTC_DRV_PCF8563 is not set | ||
1377 | +# CONFIG_RTC_DRV_PCF8583 is not set | ||
1378 | +# CONFIG_RTC_DRV_M41T80 is not set | ||
1379 | +CONFIG_RTC_DRV_TPS65910=y | ||
1380 | +# CONFIG_RTC_DRV_S35390A is not set | ||
1381 | +# CONFIG_RTC_DRV_FM3130 is not set | ||
1382 | +# CONFIG_RTC_DRV_RX8581 is not set | ||
1383 | +# CONFIG_RTC_DRV_RX8025 is not set | ||
1384 | + | ||
1385 | +# | ||
1386 | +# SPI RTC drivers | ||
1387 | +# | ||
1388 | + | ||
1389 | +# | ||
1390 | +# Platform RTC drivers | ||
1391 | +# | ||
1392 | +# CONFIG_RTC_DRV_CMOS is not set | ||
1393 | +# CONFIG_RTC_DRV_DS1286 is not set | ||
1394 | +# CONFIG_RTC_DRV_DS1511 is not set | ||
1395 | +# CONFIG_RTC_DRV_DS1553 is not set | ||
1396 | +# CONFIG_RTC_DRV_DS1742 is not set | ||
1397 | +# CONFIG_RTC_DRV_STK17TA8 is not set | ||
1398 | +# CONFIG_RTC_DRV_M48T86 is not set | ||
1399 | +# CONFIG_RTC_DRV_M48T35 is not set | ||
1400 | +# CONFIG_RTC_DRV_M48T59 is not set | ||
1401 | +# CONFIG_RTC_DRV_MSM6242 is not set | ||
1402 | +# CONFIG_RTC_DRV_BQ4802 is not set | ||
1403 | +# CONFIG_RTC_DRV_RP5C01 is not set | ||
1404 | +# CONFIG_RTC_DRV_V3020 is not set | ||
1405 | + | ||
1406 | +# | ||
1407 | +# on-CPU RTC drivers | ||
1408 | +# | ||
1409 | +# CONFIG_DMADEVICES is not set | ||
1410 | +# CONFIG_AUXDISPLAY is not set | ||
1411 | +# CONFIG_UIO is not set | ||
1412 | + | ||
1413 | +# | ||
1414 | +# TI VLYNQ | ||
1415 | +# | ||
1416 | +# CONFIG_STAGING is not set | ||
1417 | + | ||
1418 | +# | ||
1419 | +# CBUS support | ||
1420 | +# | ||
1421 | +# CONFIG_CBUS is not set | ||
1422 | + | ||
1423 | +# | ||
1424 | +# File systems | ||
1425 | +# | ||
1426 | +CONFIG_FS_JOURNAL_INFO=y | ||
1427 | +CONFIG_EXT2_FS=y | ||
1428 | +# CONFIG_EXT2_FS_XATTR is not set | ||
1429 | +# CONFIG_EXT2_FS_XIP is not set | ||
1430 | +CONFIG_EXT3_FS=y | ||
1431 | +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1432 | +# CONFIG_EXT3_FS_XATTR is not set | ||
1433 | +# CONFIG_EXT4_FS is not set | ||
1434 | +CONFIG_JBD=y | ||
1435 | +# CONFIG_REISERFS_FS is not set | ||
1436 | +# CONFIG_JFS_FS is not set | ||
1437 | +# CONFIG_FS_POSIX_ACL is not set | ||
1438 | +# CONFIG_XFS_FS is not set | ||
1439 | +# CONFIG_GFS2_FS is not set | ||
1440 | +# CONFIG_OCFS2_FS is not set | ||
1441 | +# CONFIG_BTRFS_FS is not set | ||
1442 | +# CONFIG_NILFS2_FS is not set | ||
1443 | +CONFIG_FILE_LOCKING=y | ||
1444 | +CONFIG_FSNOTIFY=y | ||
1445 | +CONFIG_DNOTIFY=y | ||
1446 | +CONFIG_INOTIFY=y | ||
1447 | +CONFIG_INOTIFY_USER=y | ||
1448 | +CONFIG_QUOTA=y | ||
1449 | +# CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
1450 | +CONFIG_PRINT_QUOTA_WARNING=y | ||
1451 | +CONFIG_QUOTA_TREE=y | ||
1452 | +# CONFIG_QFMT_V1 is not set | ||
1453 | +CONFIG_QFMT_V2=y | ||
1454 | +CONFIG_QUOTACTL=y | ||
1455 | +# CONFIG_AUTOFS_FS is not set | ||
1456 | +# CONFIG_AUTOFS4_FS is not set | ||
1457 | +# CONFIG_FUSE_FS is not set | ||
1458 | + | ||
1459 | +# | ||
1460 | +# Caches | ||
1461 | +# | ||
1462 | +# CONFIG_FSCACHE is not set | ||
1463 | + | ||
1464 | +# | ||
1465 | +# CD-ROM/DVD Filesystems | ||
1466 | +# | ||
1467 | +# CONFIG_ISO9660_FS is not set | ||
1468 | +# CONFIG_UDF_FS is not set | ||
1469 | + | ||
1470 | +# | ||
1471 | +# DOS/FAT/NT Filesystems | ||
1472 | +# | ||
1473 | +CONFIG_FAT_FS=y | ||
1474 | +CONFIG_MSDOS_FS=y | ||
1475 | +CONFIG_VFAT_FS=y | ||
1476 | +CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1477 | +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1478 | +# CONFIG_NTFS_FS is not set | ||
1479 | + | ||
1480 | +# | ||
1481 | +# Pseudo filesystems | ||
1482 | +# | ||
1483 | +CONFIG_PROC_FS=y | ||
1484 | +CONFIG_PROC_SYSCTL=y | ||
1485 | +CONFIG_PROC_PAGE_MONITOR=y | ||
1486 | +CONFIG_SYSFS=y | ||
1487 | +CONFIG_TMPFS=y | ||
1488 | +# CONFIG_TMPFS_POSIX_ACL is not set | ||
1489 | +# CONFIG_HUGETLB_PAGE is not set | ||
1490 | +# CONFIG_CONFIGFS_FS is not set | ||
1491 | +CONFIG_MISC_FILESYSTEMS=y | ||
1492 | +# CONFIG_ADFS_FS is not set | ||
1493 | +# CONFIG_AFFS_FS is not set | ||
1494 | +# CONFIG_HFS_FS is not set | ||
1495 | +# CONFIG_HFSPLUS_FS is not set | ||
1496 | +# CONFIG_BEFS_FS is not set | ||
1497 | +# CONFIG_BFS_FS is not set | ||
1498 | +# CONFIG_EFS_FS is not set | ||
1499 | +CONFIG_JFFS2_FS=y | ||
1500 | +CONFIG_JFFS2_FS_DEBUG=0 | ||
1501 | +CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1502 | +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1503 | +# CONFIG_JFFS2_SUMMARY is not set | ||
1504 | +# CONFIG_JFFS2_FS_XATTR is not set | ||
1505 | +CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
1506 | +CONFIG_JFFS2_ZLIB=y | ||
1507 | +# CONFIG_JFFS2_LZO is not set | ||
1508 | +CONFIG_JFFS2_RTIME=y | ||
1509 | +# CONFIG_JFFS2_RUBIN is not set | ||
1510 | +# CONFIG_JFFS2_CMODE_NONE is not set | ||
1511 | +CONFIG_JFFS2_CMODE_PRIORITY=y | ||
1512 | +# CONFIG_JFFS2_CMODE_SIZE is not set | ||
1513 | +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
1514 | +# CONFIG_CRAMFS is not set | ||
1515 | +# CONFIG_SQUASHFS is not set | ||
1516 | +# CONFIG_VXFS_FS is not set | ||
1517 | +# CONFIG_MINIX_FS is not set | ||
1518 | +# CONFIG_OMFS_FS is not set | ||
1519 | +# CONFIG_HPFS_FS is not set | ||
1520 | +# CONFIG_QNX4FS_FS is not set | ||
1521 | +# CONFIG_ROMFS_FS is not set | ||
1522 | +# CONFIG_SYSV_FS is not set | ||
1523 | +# CONFIG_UFS_FS is not set | ||
1524 | +CONFIG_NETWORK_FILESYSTEMS=y | ||
1525 | +CONFIG_NFS_FS=y | ||
1526 | +CONFIG_NFS_V3=y | ||
1527 | +# CONFIG_NFS_V3_ACL is not set | ||
1528 | +CONFIG_NFS_V4=y | ||
1529 | +# CONFIG_NFS_V4_1 is not set | ||
1530 | +CONFIG_ROOT_NFS=y | ||
1531 | +# CONFIG_NFSD is not set | ||
1532 | +CONFIG_LOCKD=y | ||
1533 | +CONFIG_LOCKD_V4=y | ||
1534 | +CONFIG_NFS_COMMON=y | ||
1535 | +CONFIG_SUNRPC=y | ||
1536 | +CONFIG_SUNRPC_GSS=y | ||
1537 | +CONFIG_RPCSEC_GSS_KRB5=y | ||
1538 | +# CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1539 | +# CONFIG_SMB_FS is not set | ||
1540 | +# CONFIG_CIFS is not set | ||
1541 | +# CONFIG_NCP_FS is not set | ||
1542 | +# CONFIG_CODA_FS is not set | ||
1543 | +# CONFIG_AFS_FS is not set | ||
1544 | + | ||
1545 | +# | ||
1546 | +# Partition Types | ||
1547 | +# | ||
1548 | +CONFIG_PARTITION_ADVANCED=y | ||
1549 | +# CONFIG_ACORN_PARTITION is not set | ||
1550 | +# CONFIG_OSF_PARTITION is not set | ||
1551 | +# CONFIG_AMIGA_PARTITION is not set | ||
1552 | +# CONFIG_ATARI_PARTITION is not set | ||
1553 | +# CONFIG_MAC_PARTITION is not set | ||
1554 | +CONFIG_MSDOS_PARTITION=y | ||
1555 | +# CONFIG_BSD_DISKLABEL is not set | ||
1556 | +# CONFIG_MINIX_SUBPARTITION is not set | ||
1557 | +# CONFIG_SOLARIS_X86_PARTITION is not set | ||
1558 | +# CONFIG_UNIXWARE_DISKLABEL is not set | ||
1559 | +# CONFIG_LDM_PARTITION is not set | ||
1560 | +# CONFIG_SGI_PARTITION is not set | ||
1561 | +# CONFIG_ULTRIX_PARTITION is not set | ||
1562 | +# CONFIG_SUN_PARTITION is not set | ||
1563 | +# CONFIG_KARMA_PARTITION is not set | ||
1564 | +# CONFIG_EFI_PARTITION is not set | ||
1565 | +# CONFIG_SYSV68_PARTITION is not set | ||
1566 | +CONFIG_NLS=y | ||
1567 | +CONFIG_NLS_DEFAULT="iso8859-1" | ||
1568 | +CONFIG_NLS_CODEPAGE_437=y | ||
1569 | +# CONFIG_NLS_CODEPAGE_737 is not set | ||
1570 | +# CONFIG_NLS_CODEPAGE_775 is not set | ||
1571 | +# CONFIG_NLS_CODEPAGE_850 is not set | ||
1572 | +# CONFIG_NLS_CODEPAGE_852 is not set | ||
1573 | +# CONFIG_NLS_CODEPAGE_855 is not set | ||
1574 | +# CONFIG_NLS_CODEPAGE_857 is not set | ||
1575 | +# CONFIG_NLS_CODEPAGE_860 is not set | ||
1576 | +# CONFIG_NLS_CODEPAGE_861 is not set | ||
1577 | +# CONFIG_NLS_CODEPAGE_862 is not set | ||
1578 | +# CONFIG_NLS_CODEPAGE_863 is not set | ||
1579 | +# CONFIG_NLS_CODEPAGE_864 is not set | ||
1580 | +# CONFIG_NLS_CODEPAGE_865 is not set | ||
1581 | +# CONFIG_NLS_CODEPAGE_866 is not set | ||
1582 | +# CONFIG_NLS_CODEPAGE_869 is not set | ||
1583 | +# CONFIG_NLS_CODEPAGE_936 is not set | ||
1584 | +# CONFIG_NLS_CODEPAGE_950 is not set | ||
1585 | +# CONFIG_NLS_CODEPAGE_932 is not set | ||
1586 | +# CONFIG_NLS_CODEPAGE_949 is not set | ||
1587 | +# CONFIG_NLS_CODEPAGE_874 is not set | ||
1588 | +# CONFIG_NLS_ISO8859_8 is not set | ||
1589 | +# CONFIG_NLS_CODEPAGE_1250 is not set | ||
1590 | +# CONFIG_NLS_CODEPAGE_1251 is not set | ||
1591 | +# CONFIG_NLS_ASCII is not set | ||
1592 | +CONFIG_NLS_ISO8859_1=y | ||
1593 | +# CONFIG_NLS_ISO8859_2 is not set | ||
1594 | +# CONFIG_NLS_ISO8859_3 is not set | ||
1595 | +# CONFIG_NLS_ISO8859_4 is not set | ||
1596 | +# CONFIG_NLS_ISO8859_5 is not set | ||
1597 | +# CONFIG_NLS_ISO8859_6 is not set | ||
1598 | +# CONFIG_NLS_ISO8859_7 is not set | ||
1599 | +# CONFIG_NLS_ISO8859_9 is not set | ||
1600 | +# CONFIG_NLS_ISO8859_13 is not set | ||
1601 | +# CONFIG_NLS_ISO8859_14 is not set | ||
1602 | +# CONFIG_NLS_ISO8859_15 is not set | ||
1603 | +# CONFIG_NLS_KOI8_R is not set | ||
1604 | +# CONFIG_NLS_KOI8_U is not set | ||
1605 | +# CONFIG_NLS_UTF8 is not set | ||
1606 | +# CONFIG_DLM is not set | ||
1607 | + | ||
1608 | +# | ||
1609 | +# Kernel hacking | ||
1610 | +# | ||
1611 | +# CONFIG_PRINTK_TIME is not set | ||
1612 | +CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1613 | +CONFIG_ENABLE_MUST_CHECK=y | ||
1614 | +CONFIG_FRAME_WARN=1024 | ||
1615 | +CONFIG_MAGIC_SYSRQ=y | ||
1616 | +# CONFIG_STRIP_ASM_SYMS is not set | ||
1617 | +# CONFIG_UNUSED_SYMBOLS is not set | ||
1618 | +# CONFIG_DEBUG_FS is not set | ||
1619 | +# CONFIG_HEADERS_CHECK is not set | ||
1620 | +CONFIG_DEBUG_KERNEL=y | ||
1621 | +# CONFIG_DEBUG_SHIRQ is not set | ||
1622 | +CONFIG_DETECT_SOFTLOCKUP=y | ||
1623 | +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1624 | +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1625 | +CONFIG_DETECT_HUNG_TASK=y | ||
1626 | +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
1627 | +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
1628 | +# CONFIG_SCHED_DEBUG is not set | ||
1629 | +# CONFIG_SCHEDSTATS is not set | ||
1630 | +# CONFIG_TIMER_STATS is not set | ||
1631 | +# CONFIG_DEBUG_OBJECTS is not set | ||
1632 | +# CONFIG_DEBUG_SLAB is not set | ||
1633 | +# CONFIG_DEBUG_KMEMLEAK is not set | ||
1634 | +# CONFIG_DEBUG_RT_MUTEXES is not set | ||
1635 | +# CONFIG_RT_MUTEX_TESTER is not set | ||
1636 | +# CONFIG_DEBUG_SPINLOCK is not set | ||
1637 | +CONFIG_DEBUG_MUTEXES=y | ||
1638 | +# CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1639 | +# CONFIG_PROVE_LOCKING is not set | ||
1640 | +# CONFIG_LOCK_STAT is not set | ||
1641 | +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1642 | +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1643 | +# CONFIG_DEBUG_KOBJECT is not set | ||
1644 | +# CONFIG_DEBUG_BUGVERBOSE is not set | ||
1645 | +CONFIG_DEBUG_INFO=y | ||
1646 | +# CONFIG_DEBUG_VM is not set | ||
1647 | +# CONFIG_DEBUG_WRITECOUNT is not set | ||
1648 | +# CONFIG_DEBUG_MEMORY_INIT is not set | ||
1649 | +# CONFIG_DEBUG_LIST is not set | ||
1650 | +# CONFIG_DEBUG_SG is not set | ||
1651 | +# CONFIG_DEBUG_NOTIFIERS is not set | ||
1652 | +# CONFIG_DEBUG_CREDENTIALS is not set | ||
1653 | +# CONFIG_BOOT_PRINTK_DELAY is not set | ||
1654 | +# CONFIG_RCU_TORTURE_TEST is not set | ||
1655 | +# CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1656 | +# CONFIG_BACKTRACE_SELF_TEST is not set | ||
1657 | +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1658 | +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
1659 | +# CONFIG_FAULT_INJECTION is not set | ||
1660 | +# CONFIG_LATENCYTOP is not set | ||
1661 | +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
1662 | +# CONFIG_PAGE_POISONING is not set | ||
1663 | +CONFIG_HAVE_FUNCTION_TRACER=y | ||
1664 | +CONFIG_TRACING_SUPPORT=y | ||
1665 | +CONFIG_FTRACE=y | ||
1666 | +# CONFIG_FUNCTION_TRACER is not set | ||
1667 | +# CONFIG_IRQSOFF_TRACER is not set | ||
1668 | +# CONFIG_SCHED_TRACER is not set | ||
1669 | +# CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
1670 | +# CONFIG_BOOT_TRACER is not set | ||
1671 | +CONFIG_BRANCH_PROFILE_NONE=y | ||
1672 | +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
1673 | +# CONFIG_PROFILE_ALL_BRANCHES is not set | ||
1674 | +# CONFIG_STACK_TRACER is not set | ||
1675 | +# CONFIG_KMEMTRACE is not set | ||
1676 | +# CONFIG_WORKQUEUE_TRACER is not set | ||
1677 | +# CONFIG_BLK_DEV_IO_TRACE is not set | ||
1678 | +# CONFIG_SAMPLES is not set | ||
1679 | +CONFIG_HAVE_ARCH_KGDB=y | ||
1680 | +# CONFIG_KGDB is not set | ||
1681 | +CONFIG_ARM_UNWIND=y | ||
1682 | +# CONFIG_DEBUG_USER is not set | ||
1683 | +# CONFIG_DEBUG_ERRORS is not set | ||
1684 | +# CONFIG_DEBUG_STACK_USAGE is not set | ||
1685 | +CONFIG_DEBUG_LL=y | ||
1686 | +# CONFIG_EARLY_PRINTK is not set | ||
1687 | +# CONFIG_DEBUG_ICEDCC is not set | ||
1688 | +# CONFIG_OC_ETM is not set | ||
1689 | + | ||
1690 | +# | ||
1691 | +# Security options | ||
1692 | +# | ||
1693 | +# CONFIG_KEYS is not set | ||
1694 | +# CONFIG_SECURITY is not set | ||
1695 | +# CONFIG_SECURITYFS is not set | ||
1696 | +# CONFIG_DEFAULT_SECURITY_SELINUX is not set | ||
1697 | +# CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
1698 | +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
1699 | +CONFIG_DEFAULT_SECURITY_DAC=y | ||
1700 | +CONFIG_DEFAULT_SECURITY="" | ||
1701 | +CONFIG_CRYPTO=y | ||
1702 | + | ||
1703 | +# | ||
1704 | +# Crypto core or helper | ||
1705 | +# | ||
1706 | +CONFIG_CRYPTO_ALGAPI=y | ||
1707 | +CONFIG_CRYPTO_ALGAPI2=y | ||
1708 | +CONFIG_CRYPTO_AEAD2=y | ||
1709 | +CONFIG_CRYPTO_BLKCIPHER=y | ||
1710 | +CONFIG_CRYPTO_BLKCIPHER2=y | ||
1711 | +CONFIG_CRYPTO_HASH=y | ||
1712 | +CONFIG_CRYPTO_HASH2=y | ||
1713 | +CONFIG_CRYPTO_RNG2=y | ||
1714 | +CONFIG_CRYPTO_PCOMP=y | ||
1715 | +CONFIG_CRYPTO_MANAGER=y | ||
1716 | +CONFIG_CRYPTO_MANAGER2=y | ||
1717 | +# CONFIG_CRYPTO_GF128MUL is not set | ||
1718 | +# CONFIG_CRYPTO_NULL is not set | ||
1719 | +CONFIG_CRYPTO_WORKQUEUE=y | ||
1720 | +# CONFIG_CRYPTO_CRYPTD is not set | ||
1721 | +# CONFIG_CRYPTO_AUTHENC is not set | ||
1722 | +# CONFIG_CRYPTO_TEST is not set | ||
1723 | + | ||
1724 | +# | ||
1725 | +# Authenticated Encryption with Associated Data | ||
1726 | +# | ||
1727 | +# CONFIG_CRYPTO_CCM is not set | ||
1728 | +# CONFIG_CRYPTO_GCM is not set | ||
1729 | +# CONFIG_CRYPTO_SEQIV is not set | ||
1730 | + | ||
1731 | +# | ||
1732 | +# Block modes | ||
1733 | +# | ||
1734 | +CONFIG_CRYPTO_CBC=y | ||
1735 | +# CONFIG_CRYPTO_CTR is not set | ||
1736 | +# CONFIG_CRYPTO_CTS is not set | ||
1737 | +CONFIG_CRYPTO_ECB=m | ||
1738 | +# CONFIG_CRYPTO_LRW is not set | ||
1739 | +CONFIG_CRYPTO_PCBC=m | ||
1740 | +# CONFIG_CRYPTO_XTS is not set | ||
1741 | + | ||
1742 | +# | ||
1743 | +# Hash modes | ||
1744 | +# | ||
1745 | +# CONFIG_CRYPTO_HMAC is not set | ||
1746 | +# CONFIG_CRYPTO_XCBC is not set | ||
1747 | +# CONFIG_CRYPTO_VMAC is not set | ||
1748 | + | ||
1749 | +# | ||
1750 | +# Digest | ||
1751 | +# | ||
1752 | +CONFIG_CRYPTO_CRC32C=y | ||
1753 | +# CONFIG_CRYPTO_GHASH is not set | ||
1754 | +# CONFIG_CRYPTO_MD4 is not set | ||
1755 | +CONFIG_CRYPTO_MD5=y | ||
1756 | +# CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1757 | +# CONFIG_CRYPTO_RMD128 is not set | ||
1758 | +# CONFIG_CRYPTO_RMD160 is not set | ||
1759 | +# CONFIG_CRYPTO_RMD256 is not set | ||
1760 | +# CONFIG_CRYPTO_RMD320 is not set | ||
1761 | +# CONFIG_CRYPTO_SHA1 is not set | ||
1762 | +# CONFIG_CRYPTO_SHA256 is not set | ||
1763 | +# CONFIG_CRYPTO_SHA512 is not set | ||
1764 | +# CONFIG_CRYPTO_TGR192 is not set | ||
1765 | +# CONFIG_CRYPTO_WP512 is not set | ||
1766 | + | ||
1767 | +# | ||
1768 | +# Ciphers | ||
1769 | +# | ||
1770 | +# CONFIG_CRYPTO_AES is not set | ||
1771 | +# CONFIG_CRYPTO_ANUBIS is not set | ||
1772 | +# CONFIG_CRYPTO_ARC4 is not set | ||
1773 | +# CONFIG_CRYPTO_BLOWFISH is not set | ||
1774 | +# CONFIG_CRYPTO_CAMELLIA is not set | ||
1775 | +# CONFIG_CRYPTO_CAST5 is not set | ||
1776 | +# CONFIG_CRYPTO_CAST6 is not set | ||
1777 | +CONFIG_CRYPTO_DES=y | ||
1778 | +# CONFIG_CRYPTO_FCRYPT is not set | ||
1779 | +# CONFIG_CRYPTO_KHAZAD is not set | ||
1780 | +# CONFIG_CRYPTO_SALSA20 is not set | ||
1781 | +# CONFIG_CRYPTO_SEED is not set | ||
1782 | +# CONFIG_CRYPTO_SERPENT is not set | ||
1783 | +# CONFIG_CRYPTO_TEA is not set | ||
1784 | +# CONFIG_CRYPTO_TWOFISH is not set | ||
1785 | + | ||
1786 | +# | ||
1787 | +# Compression | ||
1788 | +# | ||
1789 | +# CONFIG_CRYPTO_DEFLATE is not set | ||
1790 | +# CONFIG_CRYPTO_ZLIB is not set | ||
1791 | +# CONFIG_CRYPTO_LZO is not set | ||
1792 | + | ||
1793 | +# | ||
1794 | +# Random Number Generation | ||
1795 | +# | ||
1796 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1797 | +CONFIG_CRYPTO_HW=y | ||
1798 | +# CONFIG_BINARY_PRINTF is not set | ||
1799 | + | ||
1800 | +# | ||
1801 | +# Library routines | ||
1802 | +# | ||
1803 | +CONFIG_BITREVERSE=y | ||
1804 | +CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1805 | +CONFIG_CRC_CCITT=y | ||
1806 | +# CONFIG_CRC16 is not set | ||
1807 | +# CONFIG_CRC_T10DIF is not set | ||
1808 | +# CONFIG_CRC_ITU_T is not set | ||
1809 | +CONFIG_CRC32=y | ||
1810 | +# CONFIG_CRC7 is not set | ||
1811 | +CONFIG_LIBCRC32C=y | ||
1812 | +CONFIG_ZLIB_INFLATE=y | ||
1813 | +CONFIG_ZLIB_DEFLATE=y | ||
1814 | +CONFIG_DECOMPRESS_GZIP=y | ||
1815 | +CONFIG_HAS_IOMEM=y | ||
1816 | +CONFIG_HAS_IOPORT=y | ||
1817 | +CONFIG_HAS_DMA=y | ||
1818 | +CONFIG_NLATTR=y | ||
1819 | diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig | ||
1820 | index b72ae06..d965d58 100644 | ||
1821 | --- a/arch/arm/mach-omap2/Kconfig | ||
1822 | +++ b/arch/arm/mach-omap2/Kconfig | ||
1823 | @@ -96,6 +96,11 @@ config MACH_OMAP3517EVM | ||
1824 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
1825 | select OMAP_PACKAGE_CBB | ||
1826 | |||
1827 | +config MACH_CRANEBOARD | ||
1828 | + bool "AM3517/05 Crane board" | ||
1829 | + depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
1830 | + select OMAP_PACKAGE_CBB | ||
1831 | + | ||
1832 | config PMIC_TPS65023 | ||
1833 | bool "TPS65023 Power Module" | ||
1834 | default y | ||
1835 | @@ -171,6 +176,7 @@ config MACH_OMAP_4430SDP | ||
1836 | bool "OMAP 4430 SDP board" | ||
1837 | depends on ARCH_OMAP4 | ||
1838 | |||
1839 | + | ||
1840 | config OMAP3_EMU | ||
1841 | bool "OMAP3 debugging peripherals" | ||
1842 | depends on ARCH_OMAP3 | ||
1843 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
1844 | index fa01859..9042317 100644 | ||
1845 | --- a/arch/arm/mach-omap2/Makefile | ||
1846 | +++ b/arch/arm/mach-omap2/Makefile | ||
1847 | @@ -130,6 +130,8 @@ obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o | ||
1848 | obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \ | ||
1849 | mmc-am3517evm.o | ||
1850 | |||
1851 | +obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o \ | ||
1852 | + mmc-am3517crane.o | ||
1853 | # Platform specific device init code | ||
1854 | obj-y += usb-musb.o | ||
1855 | obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o | ||
1856 | diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c | ||
1857 | new file mode 100644 | ||
1858 | index 0000000..0bf4f60 | ||
1859 | --- /dev/null | ||
1860 | +++ b/arch/arm/mach-omap2/board-am3517crane.c | ||
1861 | @@ -0,0 +1,773 @@ | ||
1862 | +/* | ||
1863 | + * linux/arch/arm/mach-omap2/board-am3517crane.c | ||
1864 | + * | ||
1865 | + * Copyright (C) 2010 Mistral Solutions Pvt LtD <www.mistralsolutions.com> | ||
1866 | + * Author: Srinath.R <srinath@mistralsolutions.com> | ||
1867 | + * | ||
1868 | + * Based on mach-omap2/board-am3517evm.c | ||
1869 | + * | ||
1870 | + * This program is free software; you can redistribute it and/or modify it | ||
1871 | + * under the terms of the GNU General Public License as published by the | ||
1872 | + * Free Software Foundation version 2. | ||
1873 | + * | ||
1874 | + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, | ||
1875 | + * whether express or implied; without even the implied warranty of | ||
1876 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
1877 | + * General Public License for more details. | ||
1878 | + */ | ||
1879 | + | ||
1880 | +#include <linux/kernel.h> | ||
1881 | +#include <linux/init.h> | ||
1882 | +#include <linux/platform_device.h> | ||
1883 | +#include <linux/gpio.h> | ||
1884 | +#include <linux/irq.h> | ||
1885 | +#include <linux/i2c/tsc2004.h> | ||
1886 | +#include <linux/mtd/mtd.h> | ||
1887 | +#include <linux/mtd/partitions.h> | ||
1888 | +#include <linux/mtd/nand.h> | ||
1889 | +#include <linux/input.h> | ||
1890 | +#include <linux/tca6416_keypad.h> | ||
1891 | +#include <linux/davinci_emac.h> | ||
1892 | +#include <linux/i2c/pca953x.h> | ||
1893 | +#include <linux/regulator/machine.h> | ||
1894 | +#include <linux/can/platform/ti_hecc.h> | ||
1895 | +#include <linux/i2c/tps65910.h> | ||
1896 | + | ||
1897 | +#include <mach/hardware.h> | ||
1898 | +#include <mach/am35xx.h> | ||
1899 | +#include <asm/mach-types.h> | ||
1900 | +#include <asm/mach/arch.h> | ||
1901 | +#include <asm/mach/map.h> | ||
1902 | + | ||
1903 | +#include <plat/board.h> | ||
1904 | +#include <plat/common.h> | ||
1905 | +#include <plat/control.h> | ||
1906 | +#include <plat/usb.h> | ||
1907 | +#include <plat/display.h> | ||
1908 | +#include <plat/gpmc.h> | ||
1909 | +#include <plat/nand.h> | ||
1910 | + | ||
1911 | +#include "mmc-am3517crane.h" | ||
1912 | +#include "mux.h" | ||
1913 | + | ||
1914 | +#define GPMC_CS0_BASE 0x60 | ||
1915 | +#define GPMC_CS_SIZE 0x30 | ||
1916 | + | ||
1917 | +#define NAND_BLOCK_SIZE SZ_128K | ||
1918 | + | ||
1919 | +static struct mtd_partition am3517crane_nand_partitions[] = { | ||
1920 | + /* All the partition sizes are listed in terms of NAND block size */ | ||
1921 | + { | ||
1922 | + .name = "xloader-nand", | ||
1923 | + .offset = 0, | ||
1924 | + .size = 4*(SZ_128K), | ||
1925 | + .mask_flags = MTD_WRITEABLE | ||
1926 | + }, | ||
1927 | + { | ||
1928 | + .name = "uboot-nand", | ||
1929 | + .offset = MTDPART_OFS_APPEND, | ||
1930 | + .size = 28*(SZ_128K), | ||
1931 | + .mask_flags = MTD_WRITEABLE | ||
1932 | + }, | ||
1933 | + { | ||
1934 | + .name = "params-nand", | ||
1935 | + .offset = MTDPART_OFS_APPEND, | ||
1936 | + .size = 4*(SZ_128K) | ||
1937 | + }, | ||
1938 | + { | ||
1939 | + .name = "linux-nand", | ||
1940 | + .offset = MTDPART_OFS_APPEND, | ||
1941 | + .size = 80*(SZ_128K) | ||
1942 | + }, | ||
1943 | + { | ||
1944 | + .name = "jffs2-nand", | ||
1945 | + .size = MTDPART_SIZ_FULL, | ||
1946 | + .offset = MTDPART_OFS_APPEND, | ||
1947 | + }, | ||
1948 | +}; | ||
1949 | + | ||
1950 | +static struct omap_nand_platform_data am3517crane_nand_data = { | ||
1951 | + .parts = am3517crane_nand_partitions, | ||
1952 | + .nr_parts = ARRAY_SIZE(am3517crane_nand_partitions), | ||
1953 | + .nand_setup = NULL, | ||
1954 | + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
1955 | + .dev_ready = NULL, | ||
1956 | +}; | ||
1957 | + | ||
1958 | +static struct resource am3517crane_nand_resource = { | ||
1959 | + .flags = IORESOURCE_MEM, | ||
1960 | +}; | ||
1961 | + | ||
1962 | +static struct platform_device am3517crane_nand_device = { | ||
1963 | + .name = "omap2-nand", | ||
1964 | + .id = 0, | ||
1965 | + .dev = { | ||
1966 | + .platform_data = &am3517crane_nand_data, | ||
1967 | + }, | ||
1968 | + .num_resources = 1, | ||
1969 | + .resource = &am3517crane_nand_resource, | ||
1970 | +}; | ||
1971 | + | ||
1972 | +void __init am3517crane_flash_init(void) | ||
1973 | +{ | ||
1974 | + u8 cs = 0; | ||
1975 | + u8 nandcs = GPMC_CS_NUM + 1; | ||
1976 | + u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; | ||
1977 | + | ||
1978 | + while (cs < GPMC_CS_NUM) { | ||
1979 | + u32 ret = 0; | ||
1980 | + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
1981 | + | ||
1982 | + if ((ret & 0xC00) == 0x800) { | ||
1983 | + /* Found it!! */ | ||
1984 | + if (nandcs > GPMC_CS_NUM) | ||
1985 | + nandcs = cs; | ||
1986 | + } | ||
1987 | + cs++; | ||
1988 | + } | ||
1989 | + if (nandcs > GPMC_CS_NUM) { | ||
1990 | + printk(KERN_INFO "NAND: Unable to find configuration " | ||
1991 | + " in GPMC\n "); | ||
1992 | + return; | ||
1993 | + } | ||
1994 | + | ||
1995 | + if (nandcs < GPMC_CS_NUM) { | ||
1996 | + am3517crane_nand_data.cs = nandcs; | ||
1997 | + am3517crane_nand_data.gpmc_cs_baseaddr = | ||
1998 | + (void *)(gpmc_base_add + GPMC_CS0_BASE + nandcs*GPMC_CS_SIZE); | ||
1999 | + | ||
2000 | + am3517crane_nand_data.gpmc_baseaddr = (void *)(gpmc_base_add); | ||
2001 | + | ||
2002 | + if (platform_device_register(&am3517crane_nand_device) < 0) | ||
2003 | + printk(KERN_ERR "Unable to register NAND device\n"); | ||
2004 | + | ||
2005 | + } | ||
2006 | +} | ||
2007 | + | ||
2008 | + | ||
2009 | +#define AM35XX_EVM_PHY_MASK (0xF) | ||
2010 | +#define AM35XX_EVM_MDIO_FREQUENCY (1000000) | ||
2011 | + | ||
2012 | +static struct emac_platform_data am3517_crane_emac_pdata = { | ||
2013 | + .phy_mask = AM35XX_EVM_PHY_MASK, | ||
2014 | + .mdio_max_freq = AM35XX_EVM_MDIO_FREQUENCY, | ||
2015 | + .rmii_en = 1, | ||
2016 | +}; | ||
2017 | + | ||
2018 | +static int __init eth_addr_setup(char *str) | ||
2019 | +{ | ||
2020 | + int i; | ||
2021 | + | ||
2022 | + if (str == NULL) | ||
2023 | + return 0; | ||
2024 | + for (i = 0; i < ETH_ALEN; i++) | ||
2025 | + am3517_crane_emac_pdata.mac_addr[i] = simple_strtol(&str[i*3], | ||
2026 | + (char **)NULL, 16); | ||
2027 | + return 1; | ||
2028 | +} | ||
2029 | + | ||
2030 | +/* Get MAC address from kernel boot parameter eth=AA:BB:CC:DD:EE:FF */ | ||
2031 | +__setup("eth=", eth_addr_setup); | ||
2032 | + | ||
2033 | +static struct resource am3517_emac_resources[] = { | ||
2034 | + { | ||
2035 | + .start = AM35XX_IPSS_EMAC_BASE, | ||
2036 | + .end = AM35XX_IPSS_EMAC_BASE + 0x3FFFF, | ||
2037 | + .flags = IORESOURCE_MEM, | ||
2038 | + }, | ||
2039 | + { | ||
2040 | + .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ, | ||
2041 | + .end = INT_35XX_EMAC_C0_RXTHRESH_IRQ, | ||
2042 | + .flags = IORESOURCE_IRQ, | ||
2043 | + }, | ||
2044 | + { | ||
2045 | + .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ, | ||
2046 | + .end = INT_35XX_EMAC_C0_RX_PULSE_IRQ, | ||
2047 | + .flags = IORESOURCE_IRQ, | ||
2048 | + }, | ||
2049 | + { | ||
2050 | + .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ, | ||
2051 | + .end = INT_35XX_EMAC_C0_TX_PULSE_IRQ, | ||
2052 | + .flags = IORESOURCE_IRQ, | ||
2053 | + }, | ||
2054 | + { | ||
2055 | + .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ, | ||
2056 | + .end = INT_35XX_EMAC_C0_MISC_PULSE_IRQ, | ||
2057 | + .flags = IORESOURCE_IRQ, | ||
2058 | + }, | ||
2059 | +}; | ||
2060 | + | ||
2061 | +static struct platform_device am3517_emac_device = { | ||
2062 | + .name = "davinci_emac", | ||
2063 | + .id = -1, | ||
2064 | + .num_resources = ARRAY_SIZE(am3517_emac_resources), | ||
2065 | + .resource = am3517_emac_resources, | ||
2066 | +}; | ||
2067 | + | ||
2068 | +static void am3517_enable_ethernet_int(void) | ||
2069 | +{ | ||
2070 | + u32 regval; | ||
2071 | + | ||
2072 | + regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2073 | + regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR | | ||
2074 | + AM35XX_CPGMAC_C0_TX_PULSE_CLR | | ||
2075 | + AM35XX_CPGMAC_C0_MISC_PULSE_CLR | | ||
2076 | + AM35XX_CPGMAC_C0_RX_THRESH_CLR); | ||
2077 | + | ||
2078 | + omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2079 | + regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2080 | +} | ||
2081 | + | ||
2082 | +static void am3517_disable_ethernet_int(void) | ||
2083 | +{ | ||
2084 | + u32 regval; | ||
2085 | + | ||
2086 | + regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2087 | + regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR | | ||
2088 | + AM35XX_CPGMAC_C0_TX_PULSE_CLR); | ||
2089 | + omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2090 | + regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
2091 | +} | ||
2092 | + | ||
2093 | +void am3517_crane_ethernet_init(struct emac_platform_data *pdata) | ||
2094 | +{ | ||
2095 | + unsigned int regval; | ||
2096 | + | ||
2097 | + pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET; | ||
2098 | + pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET; | ||
2099 | + pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET; | ||
2100 | + pdata->mdio_reg_offset = AM35XX_EMAC_MDIO_OFFSET; | ||
2101 | + pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE; | ||
2102 | + pdata->version = EMAC_VERSION_2; | ||
2103 | + pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR; | ||
2104 | + pdata->interrupt_enable = am3517_enable_ethernet_int; | ||
2105 | + pdata->interrupt_disable = am3517_disable_ethernet_int; | ||
2106 | + am3517_emac_device.dev.platform_data = pdata; | ||
2107 | + platform_device_register(&am3517_emac_device); | ||
2108 | + | ||
2109 | + regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
2110 | + regval = regval & (~(AM35XX_CPGMACSS_SW_RST)); | ||
2111 | + omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
2112 | + regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
2113 | + | ||
2114 | + return ; | ||
2115 | +} | ||
2116 | + | ||
2117 | +static void __init am3517_crane_display_init(void) | ||
2118 | +{ | ||
2119 | + omap_mux_init_gpio(52, OMAP_PIN_OUTPUT); | ||
2120 | + gpio_request(52, "dvi_enable"); | ||
2121 | + gpio_direction_output(52, 1); | ||
2122 | +} | ||
2123 | + | ||
2124 | + | ||
2125 | + | ||
2126 | +static struct omap_dss_device am3517_crane_tv_device = { | ||
2127 | + .type = OMAP_DISPLAY_TYPE_VENC, | ||
2128 | + .name = "tv", | ||
2129 | + .driver_name = "venc", | ||
2130 | + .phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, | ||
2131 | + .platform_enable = NULL, | ||
2132 | + .platform_disable = NULL, | ||
2133 | +}; | ||
2134 | + | ||
2135 | +static int am3517_crane_panel_enable_dvi(struct omap_dss_device *dssdev) | ||
2136 | +{ | ||
2137 | + gpio_set_value(52, 1); | ||
2138 | + return 0; | ||
2139 | +} | ||
2140 | + | ||
2141 | +static void am3517_crane_panel_disable_dvi(struct omap_dss_device *dssdev) | ||
2142 | +{ | ||
2143 | + gpio_set_value(52, 0); | ||
2144 | +} | ||
2145 | + | ||
2146 | +static struct omap_dss_device am3517_crane_dvi_device = { | ||
2147 | + .type = OMAP_DISPLAY_TYPE_DPI, | ||
2148 | + .name = "dvi", | ||
2149 | + .driver_name = "generic_panel", | ||
2150 | + .phy.dpi.data_lines = 24, | ||
2151 | + .platform_enable = am3517_crane_panel_enable_dvi, | ||
2152 | + .platform_disable = am3517_crane_panel_disable_dvi, | ||
2153 | +}; | ||
2154 | + | ||
2155 | +static struct omap_dss_device *am3517_crane_dss_devices[] = { | ||
2156 | + &am3517_crane_tv_device, | ||
2157 | + &am3517_crane_dvi_device, | ||
2158 | +}; | ||
2159 | + | ||
2160 | +static struct omap_dss_board_info am3517_crane_dss_data = { | ||
2161 | + .num_devices = ARRAY_SIZE(am3517_crane_dss_devices), | ||
2162 | + .devices = am3517_crane_dss_devices, | ||
2163 | + .default_device = &am3517_crane_dvi_device, | ||
2164 | +}; | ||
2165 | + | ||
2166 | +struct platform_device am3517_crane_dss_device = { | ||
2167 | + .name = "omapdss", | ||
2168 | + .id = -1, | ||
2169 | + .dev = { | ||
2170 | + .platform_data = &am3517_crane_dss_data, | ||
2171 | + }, | ||
2172 | +}; | ||
2173 | + | ||
2174 | +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | ||
2175 | +static struct resource dm644x_ccdc_resource[] = { | ||
2176 | + /* CCDC Base address */ | ||
2177 | + { | ||
2178 | + .start = AM35XX_IPSS_VPFE_BASE, | ||
2179 | + .end = AM35XX_IPSS_VPFE_BASE + 0xffff, | ||
2180 | + .flags = IORESOURCE_MEM, | ||
2181 | + }, | ||
2182 | +}; | ||
2183 | + | ||
2184 | +static struct platform_device dm644x_ccdc_dev = { | ||
2185 | + .name = "dm644x_ccdc", | ||
2186 | + .id = -1, | ||
2187 | + .num_resources = ARRAY_SIZE(dm644x_ccdc_resource), | ||
2188 | + .resource = dm644x_ccdc_resource, | ||
2189 | + .dev = { | ||
2190 | + .dma_mask = &vpfe_capture_dma_mask, | ||
2191 | + .coherent_dma_mask = DMA_BIT_MASK(32), | ||
2192 | + }, | ||
2193 | +}; | ||
2194 | + | ||
2195 | +static struct regulator_consumer_supply am3517_crane_vdd1_supplies[] = { | ||
2196 | + { | ||
2197 | + .supply = "vdd_core", | ||
2198 | + }, | ||
2199 | +}; | ||
2200 | + | ||
2201 | +static struct regulator_init_data am3517_crane_regulator_vdd1 = { | ||
2202 | + .constraints = { | ||
2203 | + .min_uV = 1200000, | ||
2204 | + .max_uV = 1200000, | ||
2205 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2206 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2207 | + .always_on = true, | ||
2208 | + .apply_uV = true, | ||
2209 | + }, | ||
2210 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdd1_supplies), | ||
2211 | + .consumer_supplies = am3517_crane_vdd1_supplies, | ||
2212 | +}; | ||
2213 | + | ||
2214 | +static struct regulator_consumer_supply am3517_crane_vdd2_supplies[] = { | ||
2215 | + { | ||
2216 | + .supply = "vddshv", | ||
2217 | + }, | ||
2218 | +}; | ||
2219 | + | ||
2220 | +static struct regulator_init_data am3517_crane_regulator_vdd2 = { | ||
2221 | + .constraints = { | ||
2222 | + .min_uV = 3300000, | ||
2223 | + .max_uV = 3300000, | ||
2224 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2225 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2226 | + .always_on = true, | ||
2227 | + .apply_uV = true, | ||
2228 | + }, | ||
2229 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdd2_supplies), | ||
2230 | + .consumer_supplies = am3517_crane_vdd2_supplies, | ||
2231 | +}; | ||
2232 | + | ||
2233 | + | ||
2234 | +static struct regulator_consumer_supply am3517_crane_vio_supplies[] = { | ||
2235 | + { | ||
2236 | + .supply = "vdds", | ||
2237 | + }, | ||
2238 | +}; | ||
2239 | + | ||
2240 | +static struct regulator_init_data am3517_crane_regulator_vio = { | ||
2241 | + .constraints = { | ||
2242 | + .min_uV = 1800000, | ||
2243 | + .max_uV = 1800000, | ||
2244 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2245 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2246 | + .always_on = true, | ||
2247 | + .apply_uV = true, | ||
2248 | + }, | ||
2249 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vio_supplies), | ||
2250 | + .consumer_supplies = am3517_crane_vio_supplies, | ||
2251 | +}; | ||
2252 | + | ||
2253 | + | ||
2254 | +static struct regulator_consumer_supply am3517_crane_vaux1_supplies[] = { | ||
2255 | + { | ||
2256 | + .supply = "vdd_sram_mpu", | ||
2257 | + }, | ||
2258 | + { | ||
2259 | + .supply = "vdd_sram_core_bg0", | ||
2260 | + }, | ||
2261 | + { | ||
2262 | + .supply = "vddsosc", | ||
2263 | + }, | ||
2264 | +}; | ||
2265 | + | ||
2266 | +static struct regulator_init_data am3517_crane_regulator_vaux1 = { | ||
2267 | + .constraints = { | ||
2268 | + .min_uV = 1800000, | ||
2269 | + .max_uV = 1800000, | ||
2270 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2271 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2272 | + .always_on = true, | ||
2273 | + .apply_uV = true, | ||
2274 | + }, | ||
2275 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vaux1_supplies), | ||
2276 | + .consumer_supplies = am3517_crane_vaux1_supplies, | ||
2277 | +}; | ||
2278 | + | ||
2279 | + | ||
2280 | +static struct regulator_consumer_supply am3517_crane_vaux2_supplies[] = { | ||
2281 | + { | ||
2282 | + .supply = "vdda1p8v_usbphy", | ||
2283 | + }, | ||
2284 | +}; | ||
2285 | + | ||
2286 | +static struct regulator_init_data am3517_crane_regulator_vaux2 = { | ||
2287 | + .constraints = { | ||
2288 | + .min_uV = 1800000, | ||
2289 | + .max_uV = 1800000, | ||
2290 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2291 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2292 | + .always_on = true, | ||
2293 | + .apply_uV = true, | ||
2294 | + }, | ||
2295 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vaux2_supplies), | ||
2296 | + .consumer_supplies = am3517_crane_vaux2_supplies, | ||
2297 | +}; | ||
2298 | + | ||
2299 | + | ||
2300 | +static struct regulator_consumer_supply am3517_crane_vdac_supplies[] = { | ||
2301 | + { | ||
2302 | + .supply = "vdda_dac", | ||
2303 | + .dev = &am3517_crane_dss_device.dev, | ||
2304 | + }, | ||
2305 | +}; | ||
2306 | + | ||
2307 | +static struct regulator_init_data am3517_crane_regulator_vdac = { | ||
2308 | + .constraints = { | ||
2309 | + .min_uV = 1800000, | ||
2310 | + .max_uV = 1800000, | ||
2311 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2312 | + .valid_ops_mask = REGULATOR_CHANGE_MODE, | ||
2313 | + .always_on = true, | ||
2314 | + .apply_uV = true, | ||
2315 | + }, | ||
2316 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdac_supplies), | ||
2317 | + .consumer_supplies = am3517_crane_vdac_supplies, | ||
2318 | +}; | ||
2319 | + | ||
2320 | +static struct regulator_consumer_supply am3517_crane_vmmc_supplies[] = { | ||
2321 | + { | ||
2322 | + .supply = "vdda3p3v_usbphy", | ||
2323 | + }, | ||
2324 | +}; | ||
2325 | + | ||
2326 | +static struct regulator_init_data am3517_crane_regulator_vmmc = { | ||
2327 | + .constraints = { | ||
2328 | + .min_uV = 3300000, | ||
2329 | + .max_uV = 3300000, | ||
2330 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2331 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2332 | + .always_on = true, | ||
2333 | + .apply_uV = true, | ||
2334 | + }, | ||
2335 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vmmc_supplies), | ||
2336 | + .consumer_supplies = am3517_crane_vmmc_supplies, | ||
2337 | +}; | ||
2338 | + | ||
2339 | + | ||
2340 | +static struct regulator_consumer_supply am3517_crane_vpll_supplies[] = { | ||
2341 | + { | ||
2342 | + .supply = "vdds_dpll_mpu_usbhost", | ||
2343 | + }, | ||
2344 | + { | ||
2345 | + .supply = "vdds_dpll_per_core", | ||
2346 | + }, | ||
2347 | +}; | ||
2348 | + | ||
2349 | +static struct regulator_init_data am3517_crane_regulator_vpll = { | ||
2350 | + .constraints = { | ||
2351 | + .min_uV = 1800000, | ||
2352 | + .max_uV = 1800000, | ||
2353 | + .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
2354 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
2355 | + .always_on = true, | ||
2356 | + .apply_uV = true, | ||
2357 | + }, | ||
2358 | + .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vpll_supplies), | ||
2359 | + .consumer_supplies = am3517_crane_vpll_supplies, | ||
2360 | +}; | ||
2361 | + | ||
2362 | +static int am3517_crane_tps65910_config(struct tps65910_platform_data *pdata) | ||
2363 | +{ | ||
2364 | + u8 val = 0; | ||
2365 | + int i = 0; | ||
2366 | + int err = -1; | ||
2367 | + | ||
2368 | + | ||
2369 | + /* Configure TPS65910 for am3517_crane board needs */ | ||
2370 | + | ||
2371 | + /* Set sleep state active high */ | ||
2372 | + val |= (TPS65910_DEV2_SLEEPSIG_POL); | ||
2373 | + | ||
2374 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
2375 | + TPS65910_REG_DEVCTRL2); | ||
2376 | + if (err) { | ||
2377 | + printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL2 reg\n"); | ||
2378 | + return -EIO; | ||
2379 | + } | ||
2380 | + | ||
2381 | + /* Mask ALL interrupts */ | ||
2382 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0xFF, | ||
2383 | + TPS65910_REG_INT_MSK); | ||
2384 | + if (err) { | ||
2385 | + printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK reg\n"); | ||
2386 | + return -EIO; | ||
2387 | + } | ||
2388 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0x03, | ||
2389 | + TPS65910_REG_INT_MSK2); | ||
2390 | + if (err) { | ||
2391 | + printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK2 reg\n"); | ||
2392 | + return -EIO; | ||
2393 | + } | ||
2394 | + | ||
2395 | + /* Set RTC regulator on during sleep */ | ||
2396 | + | ||
2397 | + val = TPS65910_VRTC_OFFMASK; | ||
2398 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
2399 | + TPS65910_REG_VRTC); | ||
2400 | + | ||
2401 | + if (err) { | ||
2402 | + printk(KERN_ERR "Unable to write TPS65910_REG_VRTC reg\n"); | ||
2403 | + return -EIO; | ||
2404 | + } | ||
2405 | + /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */ | ||
2406 | + val = 0; | ||
2407 | + val &= ~TPS65910_RTC_PWDNN; | ||
2408 | + val |= (TPS65910_CK32K_CTRL | TPS65910_SR_CTL_I2C_SEL); | ||
2409 | + | ||
2410 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
2411 | + TPS65910_REG_DEVCTRL); | ||
2412 | + if (err) { | ||
2413 | + printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL reg\n"); | ||
2414 | + return -EIO; | ||
2415 | + } | ||
2416 | + | ||
2417 | + /* Enable and set back-up battery charger control*/ | ||
2418 | + | ||
2419 | + tps65910_enable_bbch(TPS65910_BBSEL_2P52); | ||
2420 | + | ||
2421 | + err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, | ||
2422 | + TPS65910_REG_VRTC); | ||
2423 | + if (err) { | ||
2424 | + printk(KERN_ERR "Unable to read TPS65910_REG_VRTC reg\n"); | ||
2425 | + return -EIO; | ||
2426 | + } | ||
2427 | + val = TPS65910_VRTC_OFFMASK; | ||
2428 | + | ||
2429 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
2430 | + TPS65910_REG_VRTC); | ||
2431 | + if (err) { | ||
2432 | + printk(KERN_ERR "Unable to write TPS65910_REG_VRTC reg\n"); | ||
2433 | + return -EIO; | ||
2434 | + } | ||
2435 | + | ||
2436 | + /* Disable SmartReflex control */ | ||
2437 | + val &= 0; | ||
2438 | + val &= ~TPS65910_RTC_PWDNN; | ||
2439 | + val |= (TPS65910_CK32K_CTRL | TPS65910_SR_CTL_I2C_SEL); | ||
2440 | + | ||
2441 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
2442 | + TPS65910_REG_DEVCTRL); | ||
2443 | + if (err) { | ||
2444 | + printk(KERN_ERR "Unabale to write TPS65910_REG_DEVCTRL reg\n"); | ||
2445 | + return -EIO; | ||
2446 | + } | ||
2447 | + | ||
2448 | + /* initilize all ISR work as NULL, specific driver will | ||
2449 | + * assign function(s) later. | ||
2450 | + */ | ||
2451 | + for (i = 0; i < TPS65910_MAX_IRQS; i++) | ||
2452 | + pdata->handlers[i] = NULL; | ||
2453 | + | ||
2454 | + return 0; | ||
2455 | +} | ||
2456 | + | ||
2457 | +struct tps65910_platform_data am3517_crane_tps65910_data = { | ||
2458 | + .irq_num = (unsigned)TPS65910_HOST_IRQ, | ||
2459 | + .gpio = NULL, | ||
2460 | + .vio = &am3517_crane_regulator_vio, | ||
2461 | + .vdd1 = &am3517_crane_regulator_vdd1, | ||
2462 | + .vdd2 = &am3517_crane_regulator_vdd2, | ||
2463 | + .vdd3 = NULL, | ||
2464 | + .vdig1 = NULL, | ||
2465 | + .vdig2 = NULL, | ||
2466 | + .vaux33 = NULL, | ||
2467 | + .vmmc = &am3517_crane_regulator_vmmc, | ||
2468 | + .vaux1 = &am3517_crane_regulator_vaux1, | ||
2469 | + .vaux2 = &am3517_crane_regulator_vaux2, | ||
2470 | + .vdac = &am3517_crane_regulator_vdac, | ||
2471 | + .vpll = &am3517_crane_regulator_vpll, | ||
2472 | + .board_tps65910_config = am3517_crane_tps65910_config, | ||
2473 | +}; | ||
2474 | + | ||
2475 | +static struct i2c_board_info __initdata am3517crane_i2c1_boardinfo[] = { | ||
2476 | + { | ||
2477 | + I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID0), | ||
2478 | + .flags = I2C_CLIENT_WAKE, | ||
2479 | + .irq = TPS65910_HOST_IRQ, | ||
2480 | + .platform_data = &am3517_crane_tps65910_data, | ||
2481 | + }, | ||
2482 | +}; | ||
2483 | + | ||
2484 | + | ||
2485 | +static int __init am3517_crane_i2c_init(void) | ||
2486 | +{ | ||
2487 | + omap_register_i2c_bus(1, 400, am3517crane_i2c1_boardinfo, | ||
2488 | + ARRAY_SIZE(am3517crane_i2c1_boardinfo)); | ||
2489 | + omap_register_i2c_bus(2, 400, NULL, 0); | ||
2490 | + omap_register_i2c_bus(3, 400, NULL, 0); | ||
2491 | + | ||
2492 | + return 0; | ||
2493 | +} | ||
2494 | + | ||
2495 | +/* | ||
2496 | + * HECC information | ||
2497 | + */ | ||
2498 | +static struct resource am3517_hecc_resources[] = { | ||
2499 | + { | ||
2500 | + .start = AM35XX_IPSS_HECC_BASE, | ||
2501 | + .end = AM35XX_IPSS_HECC_BASE + 0x3FFF, | ||
2502 | + .flags = IORESOURCE_MEM, | ||
2503 | + }, | ||
2504 | + { | ||
2505 | + .start = INT_35XX_HECC0_IRQ, | ||
2506 | + .end = INT_35XX_HECC0_IRQ, | ||
2507 | + .flags = IORESOURCE_IRQ, | ||
2508 | + }, | ||
2509 | +}; | ||
2510 | + | ||
2511 | +static struct platform_device am3517_hecc_device = { | ||
2512 | + .name = "ti_hecc", | ||
2513 | + .id = 1, | ||
2514 | + .num_resources = ARRAY_SIZE(am3517_hecc_resources), | ||
2515 | + .resource = am3517_hecc_resources, | ||
2516 | +}; | ||
2517 | + | ||
2518 | +static struct ti_hecc_platform_data am3517_crane_hecc_pdata = { | ||
2519 | + .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET, | ||
2520 | + .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET, | ||
2521 | + .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET, | ||
2522 | + .mbx_offset = AM35XX_HECC_MBOX_OFFSET, | ||
2523 | + .int_line = AM35XX_HECC_INT_LINE, | ||
2524 | + .version = AM35XX_HECC_VERSION, | ||
2525 | +}; | ||
2526 | + | ||
2527 | +static void am3517_crane_hecc_init(struct ti_hecc_platform_data *pdata) | ||
2528 | +{ | ||
2529 | + am3517_hecc_device.dev.platform_data = pdata; | ||
2530 | + platform_device_register(&am3517_hecc_device); | ||
2531 | +} | ||
2532 | + | ||
2533 | + | ||
2534 | +/* | ||
2535 | + * Board initialization | ||
2536 | + */ | ||
2537 | +static struct omap_board_config_kernel am3517_crane_config[] __initdata = { | ||
2538 | +}; | ||
2539 | + | ||
2540 | +static struct platform_device *am3517_crane_devices[] __initdata = { | ||
2541 | + &dm644x_ccdc_dev, | ||
2542 | + &am3517_crane_dss_device, | ||
2543 | +}; | ||
2544 | + | ||
2545 | +static void __init am3517_crane_init_irq(void) | ||
2546 | +{ | ||
2547 | + omap_board_config = am3517_crane_config; | ||
2548 | + omap_board_config_size = ARRAY_SIZE(am3517_crane_config); | ||
2549 | + | ||
2550 | + omap2_init_common_hw(NULL, NULL, NULL, NULL, NULL); | ||
2551 | + omap_init_irq(); | ||
2552 | + omap_gpio_init(); | ||
2553 | +} | ||
2554 | + | ||
2555 | +static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { | ||
2556 | + .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
2557 | + .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
2558 | + .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
2559 | + | ||
2560 | + .phy_reset = true, | ||
2561 | + .reset_gpio_port[0] = 38, | ||
2562 | + .reset_gpio_port[1] = -EINVAL, | ||
2563 | + .reset_gpio_port[2] = -EINVAL | ||
2564 | +}; | ||
2565 | + | ||
2566 | +#ifdef CONFIG_OMAP_MUX | ||
2567 | +static struct omap_board_mux board_mux[] __initdata = { | ||
2568 | + /* USB OTG DRVVBUS offset = 0x212 */ | ||
2569 | + OMAP3_MUX(CHASSIS_DMAREQ3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), | ||
2570 | + OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), | ||
2571 | + OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN), | ||
2572 | + { .reg_offset = OMAP_MUX_TERMINATOR }, | ||
2573 | +}; | ||
2574 | +#else | ||
2575 | +#define board_mux NULL | ||
2576 | +#endif | ||
2577 | + | ||
2578 | +static struct am3517_hsmmc_info mmc[] = { | ||
2579 | + { | ||
2580 | + .mmc = 1, | ||
2581 | + .wires = 8, | ||
2582 | + .gpio_cd = 41, | ||
2583 | + .gpio_wp = 40, | ||
2584 | + }, | ||
2585 | + {} /* Terminator */ | ||
2586 | +}; | ||
2587 | + | ||
2588 | +static void __init am3517_crane_init(void) | ||
2589 | +{ | ||
2590 | + | ||
2591 | + am3517_crane_i2c_init(); | ||
2592 | + omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | ||
2593 | + platform_add_devices(am3517_crane_devices, | ||
2594 | + ARRAY_SIZE(am3517_crane_devices)); | ||
2595 | + | ||
2596 | + omap_serial_init(); | ||
2597 | + am3517crane_flash_init(); | ||
2598 | + usb_musb_init(); | ||
2599 | + | ||
2600 | + /* Configure GPIO for EHCI port */ | ||
2601 | + omap_mux_init_gpio(35, OMAP_PIN_OUTPUT); | ||
2602 | + gpio_request(35, "usb_ehci_enable"); | ||
2603 | + gpio_direction_output(35, 1); | ||
2604 | + gpio_set_value(35, 1); | ||
2605 | + omap_mux_init_gpio(38, OMAP_PIN_OUTPUT); | ||
2606 | + usb_ehci_init(&ehci_pdata); | ||
2607 | + | ||
2608 | + /* DSS */ | ||
2609 | + am3517_crane_display_init(); | ||
2610 | + | ||
2611 | + /*Ethernet*/ | ||
2612 | + am3517_crane_ethernet_init(&am3517_crane_emac_pdata); | ||
2613 | + am3517_crane_hecc_init(&am3517_crane_hecc_pdata); | ||
2614 | + | ||
2615 | + /* MMC init function */ | ||
2616 | + am3517_mmc_init(mmc); | ||
2617 | + | ||
2618 | +} | ||
2619 | + | ||
2620 | +static void __init am3517_crane_map_io(void) | ||
2621 | +{ | ||
2622 | + omap2_set_globals_343x(); | ||
2623 | + omap2_map_common_io(); | ||
2624 | +} | ||
2625 | + | ||
2626 | +MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") | ||
2627 | + .phys_io = 0x48000000, | ||
2628 | + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
2629 | + .boot_params = 0x80000100, | ||
2630 | + .map_io = am3517_crane_map_io, | ||
2631 | + .init_irq = am3517_crane_init_irq, | ||
2632 | + .init_machine = am3517_crane_init, | ||
2633 | + .timer = &omap_timer, | ||
2634 | +MACHINE_END | ||
2635 | diff --git a/arch/arm/mach-omap2/mmc-am3517crane.c b/arch/arm/mach-omap2/mmc-am3517crane.c | ||
2636 | new file mode 100644 | ||
2637 | index 0000000..80ad8ae | ||
2638 | --- /dev/null | ||
2639 | +++ b/arch/arm/mach-omap2/mmc-am3517crane.c | ||
2640 | @@ -0,0 +1,267 @@ | ||
2641 | +/* | ||
2642 | + * linux/arch/arm/mach-omap2/mmc-crane.c | ||
2643 | + * | ||
2644 | + * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> | ||
2645 | + * Author: Srinath.R <srinath@mistralsolutions.com> | ||
2646 | + * | ||
2647 | + * Based on linux/arch/arm/mach-omap2/mmc-am3517evm.c | ||
2648 | + * | ||
2649 | + * This program is free software; you can redistribute it and/or modify | ||
2650 | + * it under the terms of the GNU General Public License version 2 as | ||
2651 | + * published by the Free Software Foundation. | ||
2652 | + */ | ||
2653 | +#include <linux/err.h> | ||
2654 | +#include <linux/io.h> | ||
2655 | +#include <linux/module.h> | ||
2656 | +#include <linux/platform_device.h> | ||
2657 | +#include <linux/interrupt.h> | ||
2658 | +#include <linux/delay.h> | ||
2659 | +#include <linux/gpio.h> | ||
2660 | + | ||
2661 | +#include <mach/hardware.h> | ||
2662 | +#include <plat/control.h> | ||
2663 | +#include <plat/mmc.h> | ||
2664 | +#include <plat/board.h> | ||
2665 | +#include "mmc-am3517crane.h" | ||
2666 | + | ||
2667 | +#define LDO_CLR 0x00 | ||
2668 | +#define VSEL_S2_CLR 0x40 | ||
2669 | + | ||
2670 | +#define VMMC1_DEV_GRP 0x27 | ||
2671 | +#define VMMC1_CLR 0x00 | ||
2672 | +#define VMMC1_315V 0x03 | ||
2673 | +#define VMMC1_300V 0x02 | ||
2674 | +#define VMMC1_285V 0x01 | ||
2675 | +#define VMMC1_185V 0x00 | ||
2676 | +#define VMMC1_DEDICATED 0x2A | ||
2677 | + | ||
2678 | +#define VMMC2_DEV_GRP 0x2B | ||
2679 | +#define VMMC2_CLR 0x40 | ||
2680 | +#define VMMC2_315V 0x0c | ||
2681 | +#define VMMC2_300V 0x0b | ||
2682 | +#define VMMC2_285V 0x0a | ||
2683 | +#define VMMC2_260V 0x08 | ||
2684 | +#define VMMC2_185V 0x06 | ||
2685 | +#define VMMC2_DEDICATED 0x2E | ||
2686 | + | ||
2687 | +#define VMMC_DEV_GRP_P1 0x20 | ||
2688 | + | ||
2689 | +#define HSMMC_NAME_LEN 9 | ||
2690 | + | ||
2691 | +#if defined(CONFIG_REGULATOR) || \ | ||
2692 | + (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ | ||
2693 | + defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)) | ||
2694 | + | ||
2695 | +/* | ||
2696 | + * MMC definitions | ||
2697 | + * | ||
2698 | + */ | ||
2699 | +static struct mmc_controller { | ||
2700 | + struct omap_mmc_platform_data *mmc; | ||
2701 | + u8 vmmc_dev_grp; | ||
2702 | + u8 vmmc_dedicated; | ||
2703 | + char name[HSMMC_NAME_LEN]; | ||
2704 | +} hsmmc[] = { | ||
2705 | + { | ||
2706 | + .vmmc_dev_grp = VMMC1_DEV_GRP, | ||
2707 | + .vmmc_dedicated = VMMC1_DEDICATED, | ||
2708 | + }, | ||
2709 | + { | ||
2710 | + .vmmc_dev_grp = VMMC2_DEV_GRP, | ||
2711 | + .vmmc_dedicated = VMMC2_DEDICATED, | ||
2712 | + }, | ||
2713 | +}; | ||
2714 | + | ||
2715 | +static int mmc_card_detect(int irq) | ||
2716 | +{ | ||
2717 | + unsigned i; | ||
2718 | + | ||
2719 | + for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { | ||
2720 | + struct omap_mmc_platform_data *mmc; | ||
2721 | + | ||
2722 | + mmc = hsmmc[i].mmc; | ||
2723 | + if (!mmc) | ||
2724 | + continue; | ||
2725 | + if (irq != mmc->slots[0].card_detect_irq) | ||
2726 | + continue; | ||
2727 | + | ||
2728 | + /* NOTE: assumes card detect signal is active-low */ | ||
2729 | + return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | ||
2730 | + } | ||
2731 | + return -ENOSYS; | ||
2732 | +} | ||
2733 | + | ||
2734 | +static int mmc_get_ro(struct device *dev, int slot) | ||
2735 | +{ | ||
2736 | + struct omap_mmc_platform_data *mmc = dev->platform_data; | ||
2737 | + | ||
2738 | + /* NOTE: assumes write protect signal is active-high */ | ||
2739 | + return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); | ||
2740 | +} | ||
2741 | + | ||
2742 | +/* | ||
2743 | + * MMC Slot Initialization. | ||
2744 | + */ | ||
2745 | +static int mmc_late_init(struct device *dev) | ||
2746 | +{ | ||
2747 | + struct omap_mmc_platform_data *mmc = dev->platform_data; | ||
2748 | + int ret = 0; | ||
2749 | + int i; | ||
2750 | + | ||
2751 | + ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd"); | ||
2752 | + if (ret) | ||
2753 | + goto done; | ||
2754 | + ret = gpio_direction_input(mmc->slots[0].switch_pin); | ||
2755 | + if (ret) | ||
2756 | + goto err; | ||
2757 | + | ||
2758 | + for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { | ||
2759 | + if (hsmmc[i].name == mmc->slots[0].name) { | ||
2760 | + hsmmc[i].mmc = mmc; | ||
2761 | + break; | ||
2762 | + } | ||
2763 | + } | ||
2764 | + | ||
2765 | + return 0; | ||
2766 | + | ||
2767 | +err: | ||
2768 | + gpio_free(mmc->slots[0].switch_pin); | ||
2769 | +done: | ||
2770 | + mmc->slots[0].card_detect_irq = 0; | ||
2771 | + mmc->slots[0].card_detect = NULL; | ||
2772 | + | ||
2773 | + dev_err(dev, "err %d configuring card detect\n", ret); | ||
2774 | + return ret; | ||
2775 | +} | ||
2776 | + | ||
2777 | +static void mmc_cleanup(struct device *dev) | ||
2778 | +{ | ||
2779 | + struct omap_mmc_platform_data *mmc = dev->platform_data; | ||
2780 | + | ||
2781 | + gpio_free(mmc->slots[0].switch_pin); | ||
2782 | +} | ||
2783 | + | ||
2784 | +#ifdef CONFIG_PM | ||
2785 | + | ||
2786 | +static int mmc_suspend(struct device *dev, int slot) | ||
2787 | +{ | ||
2788 | + struct omap_mmc_platform_data *mmc = dev->platform_data; | ||
2789 | + | ||
2790 | + disable_irq(mmc->slots[0].card_detect_irq); | ||
2791 | + return 0; | ||
2792 | +} | ||
2793 | + | ||
2794 | +static int mmc_resume(struct device *dev, int slot) | ||
2795 | +{ | ||
2796 | + struct omap_mmc_platform_data *mmc = dev->platform_data; | ||
2797 | + | ||
2798 | + enable_irq(mmc->slots[0].card_detect_irq); | ||
2799 | + return 0; | ||
2800 | +} | ||
2801 | + | ||
2802 | +#else | ||
2803 | +#define mmc_suspend NULL | ||
2804 | +#define mmc_resume NULL | ||
2805 | +#endif | ||
2806 | + | ||
2807 | +/* | ||
2808 | + * the MMC power setting function | ||
2809 | + */ | ||
2810 | + | ||
2811 | +static int mmc1_set_power(struct device *dev, int slot, int power_on, | ||
2812 | + int vdd) | ||
2813 | +{ | ||
2814 | + return 0; | ||
2815 | +} | ||
2816 | + | ||
2817 | +static int mmc2_set_power(struct device *dev, int slot, int power_on, int vdd) | ||
2818 | +{ | ||
2819 | + return 0; | ||
2820 | +} | ||
2821 | + | ||
2822 | +static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata; | ||
2823 | + | ||
2824 | +void __init am3517_mmc_init(struct am3517_hsmmc_info *controllers) | ||
2825 | +{ | ||
2826 | + struct am3517_hsmmc_info *c; | ||
2827 | + int nr_hsmmc = ARRAY_SIZE(hsmmc_data); | ||
2828 | + | ||
2829 | + for (c = controllers; c->mmc; c++) { | ||
2830 | + struct mmc_controller *mmc_control = hsmmc + c->mmc - 1; | ||
2831 | + struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1]; | ||
2832 | + | ||
2833 | + if (!c->mmc || c->mmc > nr_hsmmc) { | ||
2834 | + pr_debug("MMC%d: no such controller\n", c->mmc); | ||
2835 | + continue; | ||
2836 | + } | ||
2837 | + if (mmc) { | ||
2838 | + pr_debug("MMC%d: already configured\n", c->mmc); | ||
2839 | + continue; | ||
2840 | + } | ||
2841 | + | ||
2842 | + mmc = kzalloc(sizeof(struct omap_mmc_platform_data), | ||
2843 | + GFP_KERNEL); | ||
2844 | + if (!mmc) { | ||
2845 | + pr_err("Cannot allocate memory for mmc device!\n"); | ||
2846 | + return; | ||
2847 | + } | ||
2848 | + | ||
2849 | + sprintf(mmc_control->name, "mmc%islot%i", c->mmc, 1); | ||
2850 | + mmc->slots[0].name = mmc_control->name; | ||
2851 | + mmc->nr_slots = 1; | ||
2852 | + mmc->slots[0].ocr_mask = MMC_VDD_165_195 | | ||
2853 | + MMC_VDD_26_27 | MMC_VDD_27_28 | | ||
2854 | + MMC_VDD_29_30 | | ||
2855 | + MMC_VDD_30_31 | MMC_VDD_31_32; | ||
2856 | + mmc->slots[0].wires = c->wires; | ||
2857 | + mmc->slots[0].internal_clock = !c->ext_clock; | ||
2858 | + mmc->dma_mask = 0xffffffff; | ||
2859 | + | ||
2860 | + if (1) { | ||
2861 | + mmc->init = mmc_late_init; | ||
2862 | + mmc->cleanup = mmc_cleanup; | ||
2863 | + mmc->suspend = mmc_suspend; | ||
2864 | + mmc->resume = mmc_resume; | ||
2865 | + | ||
2866 | + mmc->slots[0].switch_pin = c->gpio_cd; | ||
2867 | + mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd); | ||
2868 | + mmc->slots[0].card_detect = mmc_card_detect; | ||
2869 | + } else | ||
2870 | + mmc->slots[0].switch_pin = -EINVAL; | ||
2871 | + | ||
2872 | + /* write protect normally uses an OMAP gpio */ | ||
2873 | + if (gpio_is_valid(c->gpio_wp)) { | ||
2874 | + gpio_request(c->gpio_wp, "mmc_wp"); | ||
2875 | + gpio_direction_input(c->gpio_wp); | ||
2876 | + | ||
2877 | + mmc->slots[0].gpio_wp = c->gpio_wp; | ||
2878 | + mmc->slots[0].get_ro = mmc_get_ro; | ||
2879 | + } else | ||
2880 | + mmc->slots[0].gpio_wp = -EINVAL; | ||
2881 | + | ||
2882 | + /* NOTE: we assume OMAP's MMC1 and MMC2 use | ||
2883 | + * the TWL4030's VMMC1 and VMMC2, respectively; | ||
2884 | + * and that OMAP's MMC3 isn't used. | ||
2885 | + */ | ||
2886 | + | ||
2887 | + switch (c->mmc) { | ||
2888 | + case 1: | ||
2889 | + mmc->slots[0].set_power = mmc1_set_power; | ||
2890 | + break; | ||
2891 | + case 2: | ||
2892 | + mmc->slots[0].set_power = mmc2_set_power; | ||
2893 | + break; | ||
2894 | + default: | ||
2895 | + pr_err("MMC%d configuration not supported!\n", c->mmc); | ||
2896 | + continue; | ||
2897 | + } | ||
2898 | + hsmmc_data[c->mmc - 1] = mmc; | ||
2899 | + } | ||
2900 | + | ||
2901 | + omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC); | ||
2902 | +} | ||
2903 | +#else | ||
2904 | +inline void am3517_mmc_init(struct craneboard_hsmmc_info *info) | ||
2905 | +{ | ||
2906 | +} | ||
2907 | +#endif | ||
2908 | diff --git a/arch/arm/mach-omap2/mmc-am3517crane.h b/arch/arm/mach-omap2/mmc-am3517crane.h | ||
2909 | new file mode 100644 | ||
2910 | index 0000000..97fd872 | ||
2911 | --- /dev/null | ||
2912 | +++ b/arch/arm/mach-omap2/mmc-am3517crane.h | ||
2913 | @@ -0,0 +1,22 @@ | ||
2914 | +/* | ||
2915 | + * MMC definitions for craneboard AM3517/05 | ||
2916 | + * | ||
2917 | + * This program is free software; you can redistribute it and/or modify | ||
2918 | + * it under the terms of the GNU General Public License version 2 as | ||
2919 | + * published by the Free Software Foundation. | ||
2920 | + */ | ||
2921 | + | ||
2922 | +struct am3517_hsmmc_info { | ||
2923 | + u8 mmc; /* controller 1/2/3 */ | ||
2924 | + u8 wires; /* 1/4/8 wires */ | ||
2925 | + bool transceiver; /* MMC-2 option */ | ||
2926 | + bool ext_clock; /* use external pin for input clock */ | ||
2927 | + bool cover_only; /* No card detect - just cover switch */ | ||
2928 | + int gpio_cd; /* or -EINVAL */ | ||
2929 | + int gpio_wp; /* or -EINVAL */ | ||
2930 | + char *name; /* or NULL for default */ | ||
2931 | + struct device *dev; /* returned: pointer to mmc adapter */ | ||
2932 | + int ocr_mask; /* temporary HACK */ | ||
2933 | +}; | ||
2934 | + | ||
2935 | +void am3517_mmc_init(struct am3517_hsmmc_info *); | ||
2936 | diff --git a/arch/arm/mach-omap2/tps65910-pmic.c b/arch/arm/mach-omap2/tps65910-pmic.c | ||
2937 | new file mode 100644 | ||
2938 | index 0000000..b17d662 | ||
2939 | --- /dev/null | ||
2940 | +++ b/arch/arm/mach-omap2/tps65910-pmic.c | ||
2941 | @@ -0,0 +1,195 @@ | ||
2942 | +/* | ||
2943 | + * tps65910-pmic.c | ||
2944 | + * | ||
2945 | + * Common regulator supplies and init data structs for TPS65910 | ||
2946 | + * PMIC for AM35xx based EVMs. They can be used in various board-evm | ||
2947 | + * files for Am35xx based platforms using TPS65910. | ||
2948 | + * | ||
2949 | + * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> | ||
2950 | + * | ||
2951 | + * Based on arch/arm/mach-omap2/twl4030-pmic.c | ||
2952 | + * | ||
2953 | + * This program is free software; you can redistribute it and/or | ||
2954 | + * modify it under the terms of the GNU General Public License as | ||
2955 | + * published by the Free Software Foundation version 2. | ||
2956 | + * | ||
2957 | + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, | ||
2958 | + * whether express or implied; without even the implied warranty of | ||
2959 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
2960 | + * General Public License for more details. | ||
2961 | + */ | ||
2962 | + | ||
2963 | +/* Power domain maping for TPS65910 and AM35XX | ||
2964 | + | ||
2965 | + 1.8V | ||
2966 | + VIO -----------> VDDS | ||
2967 | + | ||
2968 | + 1.8V | ||
2969 | + VAUX1 ---------> VDDS_SRAM_CORE_BG | ||
2970 | + | | ||
2971 | + -------> VDDS_SRAM_MPU | ||
2972 | + | | ||
2973 | + -------> VDDOSC | ||
2974 | + | ||
2975 | + 3.3V | ||
2976 | + VDD2 ----------> VDDSHV | ||
2977 | + | ||
2978 | + 1.2V | ||
2979 | + VDD1 ----------> VDD_CORE | ||
2980 | + | ||
2981 | + 1.8V | ||
2982 | + VPLL ----------> VDDS_DPLL_PRE_CORE | ||
2983 | + | | ||
2984 | + -------> VDDSPLL_MPU_USBHOST | ||
2985 | + | ||
2986 | + 1.8V | ||
2987 | + VDAC ----------> VDDA_DAC | ||
2988 | + | ||
2989 | + 1.8V | ||
2990 | + VAUX2 ----------> VDDA1P8V_USBPHY | ||
2991 | + | ||
2992 | + 3.3V | ||
2993 | + VMMC ----------> VDDA3P3V_USBPHY | ||
2994 | + | ||
2995 | +*/ | ||
2996 | +#include <linux/regulator/machine.h> | ||
2997 | + | ||
2998 | +/* VIO */ | ||
2999 | +struct regulator_consumer_supply tps65910_vio_supply = { | ||
3000 | + .supply = "vdds", | ||
3001 | +}; | ||
3002 | + | ||
3003 | + | ||
3004 | +/* VAUX1 */ | ||
3005 | +struct regulator_consumer_supply tps65910_vaux1_supply[] = { | ||
3006 | + { | ||
3007 | + .supply = "vdds_sram_core_bg", | ||
3008 | + }, | ||
3009 | + { | ||
3010 | + .supply = "vdds_sram_mpu", | ||
3011 | + }, | ||
3012 | + { | ||
3013 | + .supply = "vddosc", | ||
3014 | + }, | ||
3015 | +}; | ||
3016 | + | ||
3017 | +/* VPLL */ | ||
3018 | +struct regulator_consumer_supply tps65910_vpll_supply[] = { | ||
3019 | + { | ||
3020 | + .supply = "vdds_dpll_pre_core", | ||
3021 | + }, | ||
3022 | + { | ||
3023 | + .supply = "vddspll_mpu_usbhost", | ||
3024 | + }, | ||
3025 | + | ||
3026 | +}; | ||
3027 | + | ||
3028 | +/* VDAC */ | ||
3029 | +struct regulator_consumer_supply tps65910_vdac_supply = { | ||
3030 | + .supply = "vdda_dac", | ||
3031 | +}; | ||
3032 | + | ||
3033 | +/* VAUX2 */ | ||
3034 | +struct regulator_consumer_supply tps65910_vaux2_supply = { | ||
3035 | + .supply = "vdda1p8v_usbphy", | ||
3036 | +}; | ||
3037 | + | ||
3038 | + | ||
3039 | +/* VMMC */ | ||
3040 | +struct regulator_consumer_supply tps65910_vmmc_supply = { | ||
3041 | + .supply = "vdda3p3v_usbphy", | ||
3042 | +}; | ||
3043 | + | ||
3044 | + | ||
3045 | +/* Regulator initialization data */ | ||
3046 | + | ||
3047 | +/* VIO LDO */ | ||
3048 | +struct regulator_init_data vio_data = { | ||
3049 | + .constraints = { | ||
3050 | + .min_uV = 1800000, | ||
3051 | + .max_uV = 1800000, | ||
3052 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3053 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3054 | + .always_on = true, | ||
3055 | + .apply_uV = true, | ||
3056 | + }, | ||
3057 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux1_supply), | ||
3058 | + .consumer_supplies = &tps65910_vaux1_supply, | ||
3059 | +}; | ||
3060 | + | ||
3061 | + | ||
3062 | + | ||
3063 | +/* VAUX1 LDO */ | ||
3064 | +struct regulator_init_data vaux1_data = { | ||
3065 | + .constraints = { | ||
3066 | + .min_uV = 1800000, | ||
3067 | + .max_uV = 2850000, | ||
3068 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3069 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3070 | + .always_on = true, | ||
3071 | + .apply_uV = false, | ||
3072 | + }, | ||
3073 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux1_supply), | ||
3074 | + .consumer_supplies = &tps65910_vaux1_supply, | ||
3075 | +}; | ||
3076 | + | ||
3077 | +/* VAUX2 LDO */ | ||
3078 | +struct regulator_init_data vaux2_data = { | ||
3079 | + .constraints = { | ||
3080 | + .min_uV = 3300000, | ||
3081 | + .max_uV = 3300000, | ||
3082 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3083 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3084 | + .always_on = true, | ||
3085 | + .apply_uV = true, | ||
3086 | + }, | ||
3087 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux2_supply), | ||
3088 | + .consumer_supplies = &tps65910_vaux2_supply, | ||
3089 | + | ||
3090 | +}; | ||
3091 | + | ||
3092 | +/* VMMC LDO */ | ||
3093 | +struct regulator_init_data vmmc_data = { | ||
3094 | + .constraints = { | ||
3095 | + .min_uV = 1800000, | ||
3096 | + .max_uV = 3300000, | ||
3097 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3098 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3099 | + .always_on = true, | ||
3100 | + .apply_uV = false, | ||
3101 | + }, | ||
3102 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vmmc_supply), | ||
3103 | + .consumer_supplies = &tps65910_vmmc_supply, | ||
3104 | + | ||
3105 | +}; | ||
3106 | + | ||
3107 | +/* VPLL LDO */ | ||
3108 | +struct regulator_init_data vpll_data = { | ||
3109 | + .constraints = { | ||
3110 | + .min_uV = 100000, | ||
3111 | + .max_uV = 2500000, | ||
3112 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3113 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3114 | + .always_on = true, | ||
3115 | + .apply_uV = false, | ||
3116 | + }, | ||
3117 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vpll_supply), | ||
3118 | + .consumer_supplies = &tps65910_vpll_supply, | ||
3119 | +}; | ||
3120 | + | ||
3121 | +/* VDAC LDO */ | ||
3122 | +struct regulator_init_data vdac_data = { | ||
3123 | + .constraints = { | ||
3124 | + .min_uV = 1800000, | ||
3125 | + .max_uV = 2850000, | ||
3126 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
3127 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
3128 | + .always_on = true, | ||
3129 | + .apply_uV = false, | ||
3130 | + }, | ||
3131 | + .num_consumer_supplies = ARRAY_SIZE(tps65910_vdac_supply), | ||
3132 | + .consumer_supplies = &tps65910_vdac_supply, | ||
3133 | + | ||
3134 | +}; | ||
3135 | + | ||
3136 | + | ||
3137 | diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types | ||
3138 | index 07b976d..2c9a874 100644 | ||
3139 | --- a/arch/arm/tools/mach-types | ||
3140 | +++ b/arch/arm/tools/mach-types | ||
3141 | @@ -2536,3 +2536,4 @@ c3ax03 MACH_C3AX03 C3AX03 2549 | ||
3142 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 | ||
3143 | esyx MACH_ESYX ESYX 2551 | ||
3144 | bulldog MACH_BULLDOG BULLDOG 2553 | ||
3145 | +craneboard MACH_CRANEBOARD CRANEBOARD 2932 | ||
3146 | diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile | ||
3147 | index 270b6d7..b7ae0c4 100644 | ||
3148 | --- a/drivers/gpio/Makefile | ||
3149 | +++ b/drivers/gpio/Makefile | ||
3150 | @@ -20,3 +20,4 @@ obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio.o | ||
3151 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o | ||
3152 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o | ||
3153 | obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o | ||
3154 | + | ||
3155 | diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c | ||
3156 | index bbea8a0..48273d7 100644 | ||
3157 | --- a/drivers/i2c/busses/i2c-omap.c | ||
3158 | +++ b/drivers/i2c/busses/i2c-omap.c | ||
3159 | @@ -801,7 +801,7 @@ complete: | ||
3160 | "data to send\n"); | ||
3161 | break; | ||
3162 | } | ||
3163 | - | ||
3164 | +#ifndef CONFIG_CRANEBOARD | ||
3165 | /* | ||
3166 | * OMAP3430 Errata 1.153: When an XRDY/XDR | ||
3167 | * is hit, wait for XUDF before writing data | ||
3168 | @@ -821,6 +821,7 @@ complete: | ||
3169 | stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); | ||
3170 | } | ||
3171 | } | ||
3172 | +#endif | ||
3173 | |||
3174 | omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); | ||
3175 | } | ||
3176 | diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig | ||
3177 | index 8782978..306b346 100644 | ||
3178 | --- a/drivers/mfd/Kconfig | ||
3179 | +++ b/drivers/mfd/Kconfig | ||
3180 | @@ -129,12 +129,25 @@ config TWL4030_POWER | ||
3181 | and load scripts controling which resources are switched off/on | ||
3182 | or reset when a sleep, wakeup or warm reset event occurs. | ||
3183 | |||
3184 | +config TPS65910_CORE | ||
3185 | + bool "Texas Instruments TPS65910 Support" | ||
3186 | + depends on I2C=y && GENERIC_HARDIRQS | ||
3187 | + help | ||
3188 | + Say yes here if you have TPS65910 family chip on your board. | ||
3189 | + This core driver provides register access and registers devices | ||
3190 | + for the various functions so that function-specific drivers can | ||
3191 | + bind to them. | ||
3192 | + | ||
3193 | + These multi-function chips are found on many AM35xx boards, | ||
3194 | + providing power management, RTC, GPIO features. | ||
3195 | + | ||
3196 | config TWL4030_CODEC | ||
3197 | bool | ||
3198 | depends on TWL4030_CORE | ||
3199 | select MFD_CORE | ||
3200 | default n | ||
3201 | |||
3202 | + | ||
3203 | config MFD_TMIO | ||
3204 | bool | ||
3205 | default n | ||
3206 | diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile | ||
3207 | index ca2f2c4..85dc3a7 100644 | ||
3208 | --- a/drivers/mfd/Makefile | ||
3209 | +++ b/drivers/mfd/Makefile | ||
3210 | @@ -30,6 +30,8 @@ obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o | ||
3211 | obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o | ||
3212 | obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o | ||
3213 | |||
3214 | +obj-$(CONFIG_TPS65910_CORE) += tps65910-core.o | ||
3215 | + | ||
3216 | obj-$(CONFIG_MFD_MC13783) += mc13783-core.o | ||
3217 | |||
3218 | obj-$(CONFIG_MFD_CORE) += mfd-core.o | ||
3219 | @@ -55,4 +57,4 @@ obj-$(CONFIG_AB3100_CORE) += ab3100-core.o | ||
3220 | obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o | ||
3221 | obj-$(CONFIG_AB4500_CORE) += ab4500-core.o | ||
3222 | obj-$(CONFIG_MFD_88PM8607) += 88pm8607.o | ||
3223 | -obj-$(CONFIG_PMIC_ADP5520) += adp5520.o | ||
3224 | \ No newline at end of file | ||
3225 | +obj-$(CONFIG_PMIC_ADP5520) += adp5520.o | ||
3226 | diff --git a/drivers/mfd/tps65910-core.c b/drivers/mfd/tps65910-core.c | ||
3227 | new file mode 100644 | ||
3228 | index 0000000..9ffccc7 | ||
3229 | --- /dev/null | ||
3230 | +++ b/drivers/mfd/tps65910-core.c | ||
3231 | @@ -0,0 +1,741 @@ | ||
3232 | +/* | ||
3233 | + * tps65910-core.c -- Multifunction core driver for TPS65910x chips | ||
3234 | + * | ||
3235 | + * Copyright (C) 2010 Mistral solutions Pvt Ltd <www.mistralsolutions.com> | ||
3236 | + * | ||
3237 | + * Based on twl-core.c | ||
3238 | + * | ||
3239 | + * This program is free software; you can redistribute it and/or modify | ||
3240 | + * it under the terms of the GNU General Public License as published by | ||
3241 | + * the Free Software Foundation; either version 2 of the License, or | ||
3242 | + * (at your option) any later version. | ||
3243 | + * | ||
3244 | + * This program is distributed in the hope that it will be useful, | ||
3245 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
3246 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
3247 | + * GNU General Public License for more details. | ||
3248 | + * | ||
3249 | + * You should have received a copy of the GNU General Public License | ||
3250 | + * along with this program; if not, write to the Free Software | ||
3251 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
3252 | + */ | ||
3253 | + | ||
3254 | +#include <linux/init.h> | ||
3255 | +#include <linux/mutex.h> | ||
3256 | +#include <linux/platform_device.h> | ||
3257 | +#include <linux/clk.h> | ||
3258 | +#include <linux/err.h> | ||
3259 | + | ||
3260 | +#include <linux/regulator/machine.h> | ||
3261 | + | ||
3262 | +#include <linux/i2c.h> | ||
3263 | +#include <linux/i2c/tps65910.h> | ||
3264 | +#include <plat/board.h> | ||
3265 | +#include <linux/irq.h> | ||
3266 | +#include <linux/interrupt.h> | ||
3267 | +#include <linux/delay.h> | ||
3268 | + | ||
3269 | +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | ||
3270 | +#include <plat/cpu.h> | ||
3271 | +#endif | ||
3272 | + | ||
3273 | +#define DRIVER_NAME "tps65910" | ||
3274 | + | ||
3275 | +#if defined(CONFIG_GPIO_TPS65910) | ||
3276 | +#define tps65910_has_gpio() true | ||
3277 | +#else | ||
3278 | +#define tps65910_has_gpio() false | ||
3279 | +#endif | ||
3280 | + | ||
3281 | +#if defined(CONFIG_REGULATOR_TPS65910) | ||
3282 | +#define tps65910_has_regulator() true | ||
3283 | +#else | ||
3284 | +#define tps65910_has_regulator() false | ||
3285 | +#endif | ||
3286 | + | ||
3287 | +#if defined(CONFIG_RTC_DRV_TPS65910) | ||
3288 | +#define tps65910_has_rtc() true | ||
3289 | +#else | ||
3290 | +#define tps65910_has_rtc() false | ||
3291 | +#endif | ||
3292 | + | ||
3293 | +#define TPS65910_GENERAL 0 | ||
3294 | +#define TPS65910_SMARTREFLEX 1 | ||
3295 | + | ||
3296 | + | ||
3297 | +struct tps65910_platform_data *the_tps65910; | ||
3298 | + | ||
3299 | +enum tps65910x_model { | ||
3300 | + TPS65910, /* TI processors OMAP3 family */ | ||
3301 | + TPS659101, /* Samsung - S5PV210, S5PC1xx */ | ||
3302 | + TPS659102, /* Samsung - S3C64xx */ | ||
3303 | + TPS659103, /* Reserved */ | ||
3304 | + TPS659104, /* Reserved */ | ||
3305 | + TPS659105, /* TI processors - DM643x, DM644x */ | ||
3306 | + TPS659106, /* Reserved */ | ||
3307 | + TPS659107, /* Reserved */ | ||
3308 | + TPS659108, /* Reserved */ | ||
3309 | + TPS659109, /* Freescale - i.MX51 */ | ||
3310 | + | ||
3311 | +}; | ||
3312 | + | ||
3313 | +static bool inuse; | ||
3314 | +static struct work_struct core_work; | ||
3315 | +static struct mutex work_lock; | ||
3316 | + | ||
3317 | +/* Structure for each TPS65910 Slave */ | ||
3318 | +struct tps65910_client { | ||
3319 | + struct i2c_client *client; | ||
3320 | + u8 address; | ||
3321 | + /* max numb of i2c_msg required for read = 2 */ | ||
3322 | + struct i2c_msg xfer_msg[2]; | ||
3323 | + /* To lock access to xfer_msg */ | ||
3324 | + struct mutex xfer_lock; | ||
3325 | +}; | ||
3326 | +static struct tps65910_client tps65910_modules[TPS65910_NUM_SLAVES]; | ||
3327 | + | ||
3328 | +/* bbch = Back-up battery charger control register */ | ||
3329 | +int tps65910_enable_bbch(u8 voltage) | ||
3330 | +{ | ||
3331 | + | ||
3332 | + u8 val = 0; | ||
3333 | + int err; | ||
3334 | + | ||
3335 | + if (voltage == TPS65910_BBSEL_3P0 || voltage == TPS65910_BBSEL_2P52 || | ||
3336 | + voltage == TPS65910_BBSEL_3P15 || | ||
3337 | + voltage == TPS65910_BBSEL_VBAT) { | ||
3338 | + val = (voltage | TPS65910_BBCHEN); | ||
3339 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
3340 | + TPS65910_REG_BBCH); | ||
3341 | + if (err) { | ||
3342 | + printk(KERN_ERR "Unable write TPS65910_REG_BBCH reg\n"); | ||
3343 | + return -EIO; | ||
3344 | + } | ||
3345 | + } else { | ||
3346 | + printk(KERN_ERR"Invalid argumnet for %s \n", __func__); | ||
3347 | + return -EINVAL; | ||
3348 | + } | ||
3349 | + | ||
3350 | + return 0; | ||
3351 | +} | ||
3352 | +EXPORT_SYMBOL(tps65910_enable_bbch); | ||
3353 | + | ||
3354 | +int tps65910_disable_bbch(void) | ||
3355 | +{ | ||
3356 | + | ||
3357 | + u8 val = 0; | ||
3358 | + int err; | ||
3359 | + | ||
3360 | + err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_BBCH); | ||
3361 | + | ||
3362 | + if (!err) { | ||
3363 | + val &= ~TPS65910_BBCHEN; | ||
3364 | + | ||
3365 | + err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, | ||
3366 | + TPS65910_REG_BBCH); | ||
3367 | + if (err) { | ||
3368 | + printk(KERN_ERR "Unable write TPS65910_REG_BBCH \ | ||
3369 | + reg\n"); | ||
3370 | + return -EIO; | ||
3371 | + } | ||
3372 | + } else { | ||
3373 | + printk(KERN_ERR "Unable to read TPS65910_REG_BBCH reg\n"); | ||
3374 | + return -EIO; | ||
3375 | + } | ||
3376 | + return 0; | ||
3377 | +} | ||
3378 | +EXPORT_SYMBOL(tps65910_disable_bbch); | ||
3379 | + | ||
3380 | +int tps65910_i2c_read(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes) | ||
3381 | +{ | ||
3382 | + u8 val; | ||
3383 | + u32 ret; | ||
3384 | + struct tps65910_client *tps65910; | ||
3385 | + struct i2c_msg *msg; | ||
3386 | + | ||
3387 | + switch (slave_addr) { | ||
3388 | + case TPS65910_I2C_ID0: | ||
3389 | + tps65910 = &tps65910_modules[0]; | ||
3390 | + tps65910->address = TPS65910_I2C_ID0; | ||
3391 | + break; | ||
3392 | + case TPS65910_I2C_ID1: | ||
3393 | + tps65910 = &tps65910_modules[1]; | ||
3394 | + tps65910->address = TPS65910_I2C_ID1; | ||
3395 | + break; | ||
3396 | + default: | ||
3397 | + printk(KERN_ERR "Invalid Slave address for TPS65910\n"); | ||
3398 | + return -ENODEV; | ||
3399 | + } | ||
3400 | + mutex_lock(&tps65910->xfer_lock); | ||
3401 | + /* [MSG1] fill the register address data */ | ||
3402 | + msg = &tps65910->xfer_msg[0]; | ||
3403 | + msg->addr = tps65910->address; | ||
3404 | + msg->len = 1; | ||
3405 | + msg->flags = 0; | ||
3406 | + val = reg; | ||
3407 | + msg->buf = &val; | ||
3408 | + /* [MSG2] fill the data rx buffer */ | ||
3409 | + msg = &tps65910->xfer_msg[1]; | ||
3410 | + msg->addr = tps65910->address; | ||
3411 | + msg->flags = I2C_M_RD; /* Read the register value */ | ||
3412 | + msg->len = num_bytes; /* only n bytes */ | ||
3413 | + msg->buf = value; | ||
3414 | + | ||
3415 | + ret = i2c_transfer(tps65910->client->adapter, tps65910->xfer_msg, 2); | ||
3416 | + mutex_unlock(&tps65910->xfer_lock); | ||
3417 | + | ||
3418 | + /* i2c_transfer returns number of messages transferred */ | ||
3419 | + if (ret != 2) { | ||
3420 | + pr_err("%s: i2c_read failed to transfer all messages\n", | ||
3421 | + "TPS65910C"); | ||
3422 | + return -EIO; | ||
3423 | + } else { | ||
3424 | + return 0; | ||
3425 | + } | ||
3426 | +} | ||
3427 | +EXPORT_SYMBOL(tps65910_i2c_read); | ||
3428 | + | ||
3429 | + | ||
3430 | +int tps65910_i2c_write(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes) | ||
3431 | +{ | ||
3432 | + int ret; | ||
3433 | + struct tps65910_client *tps65910; | ||
3434 | + struct i2c_msg *msg; | ||
3435 | + u8 write_buf[66]; /* Max 65 Regs + offset*/ | ||
3436 | + | ||
3437 | + switch (slave_addr) { | ||
3438 | + case TPS65910_I2C_ID0: | ||
3439 | + tps65910 = &tps65910_modules[0]; | ||
3440 | + tps65910->address = TPS65910_I2C_ID0; | ||
3441 | + break; | ||
3442 | + case TPS65910_I2C_ID1: | ||
3443 | + tps65910 = &tps65910_modules[1]; | ||
3444 | + tps65910->address = TPS65910_I2C_ID1; | ||
3445 | + break; | ||
3446 | + default: | ||
3447 | + printk(KERN_ERR "Invalid Slave address for TPS65910\n"); | ||
3448 | + return -ENODEV; | ||
3449 | + } | ||
3450 | + | ||
3451 | + mutex_lock(&tps65910->xfer_lock); | ||
3452 | + /* [MSG1]: fill the register address data fill the data Tx buffer */ | ||
3453 | + msg = &tps65910->xfer_msg[0]; | ||
3454 | + msg->addr = tps65910->address; | ||
3455 | + msg->len = num_bytes + 1; | ||
3456 | + msg->flags = 0; | ||
3457 | + write_buf[0] = reg; | ||
3458 | + memcpy(&write_buf[1], value, num_bytes); | ||
3459 | + msg->buf = &write_buf[0]; | ||
3460 | + ret = i2c_transfer(tps65910->client->adapter, tps65910->xfer_msg, 1); | ||
3461 | + mutex_unlock(&tps65910->xfer_lock); | ||
3462 | + | ||
3463 | + /* i2c_transfer returns number of messages transferred */ | ||
3464 | + if (ret != 1) { | ||
3465 | + pr_err("%s: i2c_write failed to transfer all messages\n", | ||
3466 | + __func__); | ||
3467 | + return -EIO; | ||
3468 | + } else { | ||
3469 | + return 0; | ||
3470 | + } | ||
3471 | +} | ||
3472 | +EXPORT_SYMBOL(tps65910_i2c_write); | ||
3473 | + | ||
3474 | +int tps65910_i2c_read_u8(u8 mod_no, u8 *value, u8 reg) | ||
3475 | +{ | ||
3476 | + struct tps65910_client *tps65910; | ||
3477 | + | ||
3478 | + switch (mod_no) { | ||
3479 | + case TPS65910_I2C_ID0: | ||
3480 | + tps65910 = &tps65910_modules[0]; | ||
3481 | + tps65910->address = TPS65910_I2C_ID0; | ||
3482 | + break; | ||
3483 | + case TPS65910_I2C_ID1: | ||
3484 | + tps65910 = &tps65910_modules[1]; | ||
3485 | + tps65910->address = TPS65910_I2C_ID1; | ||
3486 | + break; | ||
3487 | + default: | ||
3488 | + printk(KERN_ERR "Invalid Slave address for TPS65910\n"); | ||
3489 | + return -ENODEV; | ||
3490 | + } | ||
3491 | + | ||
3492 | + (*value) = i2c_smbus_read_byte_data(tps65910->client, reg); | ||
3493 | + mdelay(10); | ||
3494 | + if (*value < 0) | ||
3495 | + return -EIO; | ||
3496 | + else | ||
3497 | + return 0; | ||
3498 | +} | ||
3499 | +EXPORT_SYMBOL(tps65910_i2c_read_u8); | ||
3500 | + | ||
3501 | +int tps65910_i2c_write_u8(u8 slave_addr, u8 value, u8 reg) | ||
3502 | +{ | ||
3503 | + int ret; | ||
3504 | + struct tps65910_client *tps65910; | ||
3505 | + | ||
3506 | + switch (slave_addr) { | ||
3507 | + case TPS65910_I2C_ID0: | ||
3508 | + tps65910 = &tps65910_modules[0]; | ||
3509 | + tps65910->address = TPS65910_I2C_ID0; | ||
3510 | + break; | ||
3511 | + case TPS65910_I2C_ID1: | ||
3512 | + tps65910 = &tps65910_modules[1]; | ||
3513 | + tps65910->address = TPS65910_I2C_ID1; | ||
3514 | + break; | ||
3515 | + default: | ||
3516 | + printk(KERN_ERR "Invalid Slave address for TPS65910\n"); | ||
3517 | + return -ENODEV; | ||
3518 | + } | ||
3519 | + ret = i2c_smbus_write_byte_data(tps65910->client, reg, value); | ||
3520 | + if (ret < 0) | ||
3521 | + return -EIO; | ||
3522 | + else | ||
3523 | + return 0; | ||
3524 | +} | ||
3525 | +EXPORT_SYMBOL(tps65910_i2c_write_u8); | ||
3526 | + | ||
3527 | + | ||
3528 | +int tps65910_enable_irq(int irq) | ||
3529 | +{ | ||
3530 | + u8 mask = 0x00; | ||
3531 | + | ||
3532 | + if (irq > 7) { | ||
3533 | + irq -= 8; | ||
3534 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, | ||
3535 | + &mask, TPS65910_REG_INT_MSK2); | ||
3536 | + mask &= ~(1 << irq); | ||
3537 | + return tps65910_i2c_write_u8(TPS65910_I2C_ID0, | ||
3538 | + mask, TPS65910_REG_INT_MSK2); | ||
3539 | + } else { | ||
3540 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, | ||
3541 | + &mask, TPS65910_REG_INT_MSK); | ||
3542 | + mask &= ~(1 << irq); | ||
3543 | + return tps65910_i2c_write_u8(TPS65910_I2C_ID0, | ||
3544 | + mask, TPS65910_REG_INT_MSK); | ||
3545 | + } | ||
3546 | +} | ||
3547 | +EXPORT_SYMBOL(tps65910_enable_irq); | ||
3548 | + | ||
3549 | +int tps65910_disable_irq(int irq) | ||
3550 | +{ | ||
3551 | + u8 mask = 0x00; | ||
3552 | + | ||
3553 | + if (irq > 7) { | ||
3554 | + irq -= 8; | ||
3555 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, | ||
3556 | + &mask, TPS65910_REG_INT_MSK2); | ||
3557 | + mask |= (1 << irq); | ||
3558 | + return tps65910_i2c_write_u8(TPS65910_I2C_ID0, | ||
3559 | + mask, TPS65910_REG_INT_MSK2); | ||
3560 | + } else { | ||
3561 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, | ||
3562 | + &mask, TPS65910_REG_INT_MSK); | ||
3563 | + mask = (1 << irq); | ||
3564 | + return tps65910_i2c_write_u8(TPS65910_I2C_ID0, | ||
3565 | + mask, TPS65910_REG_INT_MSK); | ||
3566 | + } | ||
3567 | +} | ||
3568 | +EXPORT_SYMBOL(tps65910_disable_irq); | ||
3569 | + | ||
3570 | +int tps65910_add_irq_work(int irq, | ||
3571 | + void (*handler)(void *data)) | ||
3572 | +{ | ||
3573 | + int ret = 0; | ||
3574 | + the_tps65910->handlers[irq] = handler; | ||
3575 | + ret = tps65910_enable_irq(irq); | ||
3576 | + | ||
3577 | + return ret; | ||
3578 | +} | ||
3579 | +EXPORT_SYMBOL(tps65910_add_irq_work); | ||
3580 | + | ||
3581 | +int tps65910_remove_irq_work(int irq) | ||
3582 | +{ | ||
3583 | + int ret = 0; | ||
3584 | + ret = tps65910_disable_irq(irq); | ||
3585 | + the_tps65910->handlers[irq] = NULL; | ||
3586 | + return ret; | ||
3587 | +} | ||
3588 | +EXPORT_SYMBOL(tps65910_remove_irq_work); | ||
3589 | + | ||
3590 | +static void tps65910_core_work(struct work_struct *work) | ||
3591 | +{ | ||
3592 | + /* Read the status register and take action */ | ||
3593 | + u8 status = 0x00; | ||
3594 | + u8 status2 = 0x00; | ||
3595 | + u8 mask = 0x00; | ||
3596 | + u8 mask2 = 0x00; | ||
3597 | + u16 isr = 0x00; | ||
3598 | + u16 irq = 0; | ||
3599 | + void (*handler)(void *data) = NULL; | ||
3600 | + | ||
3601 | + mutex_lock(&work_lock); | ||
3602 | + while (1) { | ||
3603 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, &status2, | ||
3604 | + TPS65910_REG_INT_STS2); | ||
3605 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, &mask2, | ||
3606 | + TPS65910_REG_INT_MSK2); | ||
3607 | + status2 &= (~mask2); | ||
3608 | + isr = (status2 << 8); | ||
3609 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, &status, | ||
3610 | + TPS65910_REG_INT_STS); | ||
3611 | + tps65910_i2c_read_u8(TPS65910_I2C_ID0, &mask, | ||
3612 | + TPS65910_REG_INT_MSK); | ||
3613 | + status &= ~(mask); | ||
3614 | + isr |= status; | ||
3615 | + if (!isr) | ||
3616 | + break; | ||
3617 | + | ||
3618 | + while (isr) { | ||
3619 | + irq = fls(isr) - 1; | ||
3620 | + isr &= ~(1 << irq); | ||
3621 | + handler = the_tps65910->handlers[irq]; | ||
3622 | + if (handler) | ||
3623 | + handler(the_tps65910); | ||
3624 | + } | ||
3625 | + } | ||
3626 | + enable_irq(the_tps65910->irq_num); | ||
3627 | + mutex_unlock(&work_lock); | ||
3628 | +} | ||
3629 | + | ||
3630 | + | ||
3631 | +static irqreturn_t tps65910_isr(int irq, void *data) | ||
3632 | +{ | ||
3633 | + | ||
3634 | +#ifdef CONFIG_LOCKDEP | ||
3635 | + /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which | ||
3636 | + * we don't want and can't tolerate. Although it might be | ||
3637 | + * friendlier not to borrow this thread context... | ||
3638 | + */ | ||
3639 | + local_irq_enable(); | ||
3640 | +#endif | ||
3641 | + disable_irq_nosync(irq); | ||
3642 | + (void) schedule_work(&core_work); | ||
3643 | + return IRQ_HANDLED; | ||
3644 | +} | ||
3645 | + | ||
3646 | + | ||
3647 | +static struct device *add_numbered_child(unsigned chip, const char *name, | ||
3648 | + int num, void *pdata, unsigned pdata_len, bool can_wakeup, int irq) | ||
3649 | +{ | ||
3650 | + | ||
3651 | + struct platform_device *pdev; | ||
3652 | + struct tps65910_client *tps65910 = &tps65910_modules[chip]; | ||
3653 | + int status; | ||
3654 | + | ||
3655 | + pdev = platform_device_alloc(name, num); | ||
3656 | + if (!pdev) { | ||
3657 | + dev_dbg(&tps65910->client->dev, "can't alloc dev\n"); | ||
3658 | + status = -ENOMEM; | ||
3659 | + goto err; | ||
3660 | + } | ||
3661 | + device_init_wakeup(&pdev->dev, can_wakeup); | ||
3662 | + pdev->dev.parent = &tps65910->client->dev; | ||
3663 | + | ||
3664 | + if (pdata) { | ||
3665 | + status = platform_device_add_data(pdev, pdata, pdata_len); | ||
3666 | + if (status < 0) { | ||
3667 | + dev_dbg(&pdev->dev, "can't add platform_data\n"); | ||
3668 | + goto err; | ||
3669 | + } | ||
3670 | + } | ||
3671 | + status = platform_device_add(pdev); | ||
3672 | + | ||
3673 | +err: | ||
3674 | + if (status < 0) { | ||
3675 | + platform_device_put(pdev); | ||
3676 | + dev_err(&tps65910->client->dev, "can't add %s dev\n", name); | ||
3677 | + return ERR_PTR(status); | ||
3678 | + } | ||
3679 | + return &pdev->dev; | ||
3680 | + | ||
3681 | +} | ||
3682 | + | ||
3683 | +static inline struct device *add_child(unsigned chip, const char *name, | ||
3684 | + void *pdata, unsigned pdata_len, | ||
3685 | + bool can_wakeup, int irq) | ||
3686 | +{ | ||
3687 | + return add_numbered_child(chip, name, -1, pdata, pdata_len, | ||
3688 | + can_wakeup, irq); | ||
3689 | +} | ||
3690 | + static | ||
3691 | +struct device *add_regulator_linked(int num, struct regulator_init_data *pdata, | ||
3692 | + struct regulator_consumer_supply *consumers, | ||
3693 | + unsigned num_consumers) | ||
3694 | +{ | ||
3695 | + /* regulator framework demands init_data */ | ||
3696 | + if (!pdata) | ||
3697 | + return NULL; | ||
3698 | + | ||
3699 | + if (consumers) { | ||
3700 | + pdata->consumer_supplies = consumers; | ||
3701 | + pdata->num_consumer_supplies = num_consumers; | ||
3702 | + } | ||
3703 | + return add_numbered_child(TPS65910_GENERAL, "tps65910_regulator", num, | ||
3704 | + pdata, sizeof(*pdata), false, TPS65910_HOST_IRQ); | ||
3705 | +} | ||
3706 | + | ||
3707 | + static struct device * | ||
3708 | +add_regulator(int num, struct regulator_init_data *pdata) | ||
3709 | +{ | ||
3710 | + return add_regulator_linked(num, pdata, NULL, 0); | ||
3711 | +} | ||
3712 | + | ||
3713 | + static int | ||
3714 | +add_children(struct tps65910_platform_data *pdata, unsigned long features) | ||
3715 | +{ | ||
3716 | + int status; | ||
3717 | + struct device *child; | ||
3718 | + | ||
3719 | + struct platform_device *pdev = NULL; | ||
3720 | + | ||
3721 | + if (tps65910_has_gpio() && (pdata->gpio != NULL)) { | ||
3722 | + | ||
3723 | + pdev = platform_device_alloc("tps65910_gpio", -1); | ||
3724 | + if (!pdev) { | ||
3725 | + status = -ENOMEM; | ||
3726 | + goto err; | ||
3727 | + } | ||
3728 | + pdev->dev.parent = &tps65910_modules[0].client->dev; | ||
3729 | + device_init_wakeup(&pdev->dev, 0); | ||
3730 | + if (pdata) { | ||
3731 | + status = platform_device_add_data(pdev, pdata, | ||
3732 | + sizeof(*pdata)); | ||
3733 | + if (status < 0) { | ||
3734 | + dev_dbg(&pdev->dev, | ||
3735 | + "can't add platform_data\n"); | ||
3736 | + goto err; | ||
3737 | + } | ||
3738 | + } | ||
3739 | + } | ||
3740 | + if (tps65910_has_rtc()) { | ||
3741 | + child = add_child(TPS65910_GENERAL, "tps65910_rtc", | ||
3742 | + NULL, 0, true, pdata->irq_num); | ||
3743 | + if (IS_ERR(child)) | ||
3744 | + return PTR_ERR(child); | ||
3745 | + } | ||
3746 | + | ||
3747 | + if (tps65910_has_regulator()) { | ||
3748 | + | ||
3749 | + child = add_regulator(TPS65910_VIO, pdata->vio); | ||
3750 | + if (IS_ERR(child)) | ||
3751 | + return PTR_ERR(child); | ||
3752 | + | ||
3753 | + child = add_regulator(TPS65910_VDD1, pdata->vdd1); | ||
3754 | + if (IS_ERR(child)) | ||
3755 | + return PTR_ERR(child); | ||
3756 | + | ||
3757 | + child = add_regulator(TPS65910_VDD2, pdata->vdd2); | ||
3758 | + if (IS_ERR(child)) | ||
3759 | + return PTR_ERR(child); | ||
3760 | + | ||
3761 | + child = add_regulator(TPS65910_VDD3, pdata->vdd3); | ||
3762 | + if (IS_ERR(child)) | ||
3763 | + return PTR_ERR(child); | ||
3764 | + | ||
3765 | + child = add_regulator(TPS65910_VDIG1, pdata->vdig1); | ||
3766 | + if (IS_ERR(child)) | ||
3767 | + return PTR_ERR(child); | ||
3768 | + | ||
3769 | + child = add_regulator(TPS65910_VDIG2, pdata->vdig2); | ||
3770 | + if (IS_ERR(child)) | ||
3771 | + return PTR_ERR(child); | ||
3772 | + | ||
3773 | + child = add_regulator(TPS65910_VAUX33, pdata->vaux33); | ||
3774 | + if (IS_ERR(child)) | ||
3775 | + return PTR_ERR(child); | ||
3776 | + | ||
3777 | + child = add_regulator(TPS65910_VMMC, pdata->vmmc); | ||
3778 | + if (IS_ERR(child)) | ||
3779 | + return PTR_ERR(child); | ||
3780 | + | ||
3781 | + child = add_regulator(TPS65910_VAUX1, pdata->vaux1); | ||
3782 | + if (IS_ERR(child)) | ||
3783 | + return PTR_ERR(child); | ||
3784 | + | ||
3785 | + child = add_regulator(TPS65910_VAUX2, pdata->vaux2); | ||
3786 | + if (IS_ERR(child)) | ||
3787 | + return PTR_ERR(child); | ||
3788 | + | ||
3789 | + child = add_regulator(TPS65910_VDAC, pdata->vdac); | ||
3790 | + if (IS_ERR(child)) | ||
3791 | + return PTR_ERR(child); | ||
3792 | + | ||
3793 | + child = add_regulator(TPS65910_VPLL, pdata->vpll); | ||
3794 | + if (IS_ERR(child)) | ||
3795 | + return PTR_ERR(child); | ||
3796 | + } | ||
3797 | + return 0; | ||
3798 | + | ||
3799 | +err: | ||
3800 | + return -1; | ||
3801 | + | ||
3802 | +} | ||
3803 | + | ||
3804 | +static int tps65910_remove(struct i2c_client *client) | ||
3805 | +{ | ||
3806 | + unsigned i; | ||
3807 | + | ||
3808 | + for (i = 0; i < TPS65910_NUM_SLAVES; i++) { | ||
3809 | + | ||
3810 | + struct tps65910_client *tps65910 = &tps65910_modules[i]; | ||
3811 | + | ||
3812 | + if (tps65910->client && tps65910->client != client) | ||
3813 | + i2c_unregister_device(tps65910->client); | ||
3814 | + | ||
3815 | + tps65910_modules[i].client = NULL; | ||
3816 | + } | ||
3817 | + inuse = false; | ||
3818 | + return 0; | ||
3819 | +} | ||
3820 | + | ||
3821 | +static int __init | ||
3822 | +tps65910_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) | ||
3823 | +{ | ||
3824 | + int status; | ||
3825 | + unsigned i; | ||
3826 | + struct tps65910_platform_data *pdata; | ||
3827 | + | ||
3828 | + pdata = client->dev.platform_data; | ||
3829 | + the_tps65910 = pdata; | ||
3830 | + | ||
3831 | + if (!pdata) { | ||
3832 | + dev_dbg(&client->dev, "no platform data?\n"); | ||
3833 | + return -EINVAL; | ||
3834 | + } | ||
3835 | + | ||
3836 | + if (i2c_check_functionality(client->adapter, | ||
3837 | + (I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE)) == 0) { | ||
3838 | + dev_dbg(&client->dev, "can't talk I2C?\n"); | ||
3839 | + return -EIO; | ||
3840 | + } | ||
3841 | + | ||
3842 | + if (inuse) { | ||
3843 | + dev_dbg(&client->dev, "driver is already in use\n"); | ||
3844 | + return -EBUSY; | ||
3845 | + } | ||
3846 | + | ||
3847 | + for (i = 0; i < TPS65910_NUM_SLAVES; i++) { | ||
3848 | + | ||
3849 | + struct tps65910_client *tps65910 = &tps65910_modules[i]; | ||
3850 | + | ||
3851 | + tps65910->address = client->addr + i; | ||
3852 | + | ||
3853 | + if (i == 0) | ||
3854 | + tps65910->client = client; | ||
3855 | + else { | ||
3856 | + tps65910->client = i2c_new_dummy(client->adapter, | ||
3857 | + tps65910->address); | ||
3858 | + | ||
3859 | + if (!tps65910->client) { | ||
3860 | + dev_err(&client->dev, | ||
3861 | + "can't attach client %d\n", i); | ||
3862 | + status = -ENOMEM; | ||
3863 | + goto fail; | ||
3864 | + } | ||
3865 | + } | ||
3866 | + mutex_init(&tps65910->xfer_lock); | ||
3867 | + } | ||
3868 | + | ||
3869 | + inuse = true; | ||
3870 | + | ||
3871 | + if (pdata->board_tps65910_config != NULL) | ||
3872 | + pdata->board_tps65910_config(pdata); | ||
3873 | + | ||
3874 | + | ||
3875 | + if (pdata->irq_num) { | ||
3876 | + /* TPS65910 power ON interrupt(s) would have already been | ||
3877 | + * occured, immediately after request_irq the control will be | ||
3878 | + * transfered to tps65910_isr, if we do work initialization | ||
3879 | + * after requesting IRQ, the system crashes (does not boot), | ||
3880 | + * to avoid this we do work initialization before requesting | ||
3881 | + * IRQ | ||
3882 | + */ | ||
3883 | + mutex_init(&work_lock); | ||
3884 | + INIT_WORK(&core_work, tps65910_core_work); | ||
3885 | + | ||
3886 | + status = request_irq(pdata->irq_num, tps65910_isr, | ||
3887 | + IRQF_DISABLED, "tps65910", pdata); | ||
3888 | + if (status < 0) { | ||
3889 | + pr_err("tps65910: could not claim irq%d: %d\n", | ||
3890 | + pdata->irq_num, status); | ||
3891 | + goto fail; | ||
3892 | + } | ||
3893 | + } | ||
3894 | + | ||
3895 | + status = add_children(pdata, 0x00); | ||
3896 | + if (status < 0) | ||
3897 | + goto fail; | ||
3898 | + | ||
3899 | + return 0; | ||
3900 | + | ||
3901 | +fail: | ||
3902 | + if (status < 0) | ||
3903 | + tps65910_remove(client); | ||
3904 | + | ||
3905 | + return status; | ||
3906 | +} | ||
3907 | + | ||
3908 | + | ||
3909 | +static int tps65910_i2c_remove(struct i2c_client *client) | ||
3910 | +{ | ||
3911 | + unsigned i; | ||
3912 | + | ||
3913 | + for (i = 0; i < TPS65910_NUM_SLAVES; i++) { | ||
3914 | + | ||
3915 | + struct tps65910_client *tps65910 = &tps65910_modules[i]; | ||
3916 | + | ||
3917 | + if (tps65910->client && tps65910->client != client) | ||
3918 | + i2c_unregister_device(tps65910->client); | ||
3919 | + | ||
3920 | + tps65910_modules[i].client = NULL; | ||
3921 | + } | ||
3922 | + inuse = false; | ||
3923 | + return 0; | ||
3924 | +} | ||
3925 | + | ||
3926 | +/* chip-specific feature flags, for i2c_device_id.driver_data */ | ||
3927 | +static const struct i2c_device_id tps65910_i2c_ids[] = { | ||
3928 | + { "tps65910", TPS65910 }, | ||
3929 | + { "tps659101", TPS659101 }, | ||
3930 | + { "tps659102", TPS659102 }, | ||
3931 | + { "tps659103", TPS659103 }, | ||
3932 | + { "tps659104", TPS659104 }, | ||
3933 | + { "tps659105", TPS659105 }, | ||
3934 | + { "tps659106", TPS659106 }, | ||
3935 | + { "tps659107", TPS659107 }, | ||
3936 | + { "tps659108", TPS659108 }, | ||
3937 | + { "tps659109", TPS659109 }, | ||
3938 | + {/* end of list */ }, | ||
3939 | +}; | ||
3940 | +MODULE_DEVICE_TABLE(i2c, tps65910_i2c_ids); | ||
3941 | + | ||
3942 | +/* One Client Driver ,3 Clients - Regulator, RTC , GPIO */ | ||
3943 | +static struct i2c_driver tps65910_i2c_driver = { | ||
3944 | + .driver.name = DRIVER_NAME, | ||
3945 | + .id_table = tps65910_i2c_ids, | ||
3946 | + .probe = tps65910_i2c_probe, | ||
3947 | + .remove = tps65910_i2c_remove, | ||
3948 | +}; | ||
3949 | + | ||
3950 | +static int __init tps65910_init(void) | ||
3951 | +{ | ||
3952 | + int res; | ||
3953 | + | ||
3954 | + res = i2c_add_driver(&tps65910_i2c_driver); | ||
3955 | + if (res < 0) { | ||
3956 | + pr_err(DRIVER_NAME ": driver registration failed\n"); | ||
3957 | + return res; | ||
3958 | + } | ||
3959 | + | ||
3960 | + return 0; | ||
3961 | +} | ||
3962 | +subsys_initcall(tps65910_init); | ||
3963 | + | ||
3964 | +static void __exit tps65910_exit(void) | ||
3965 | +{ | ||
3966 | + i2c_del_driver(&tps65910_i2c_driver); | ||
3967 | +} | ||
3968 | +module_exit(tps65910_exit); | ||
3969 | + | ||
3970 | +MODULE_AUTHOR("Mistral Solutions Pvt Ltd"); | ||
3971 | +MODULE_DESCRIPTION("I2C Core interface for TPS65910"); | ||
3972 | +MODULE_LICENSE("GPL"); | ||
3973 | diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig | ||
3974 | index 71fbd6e..0ddf4c2 100644 | ||
3975 | --- a/drivers/rtc/Kconfig | ||
3976 | +++ b/drivers/rtc/Kconfig | ||
3977 | @@ -267,6 +267,14 @@ config RTC_DRV_TWL4030 | ||
3978 | This driver can also be built as a module. If so, the module | ||
3979 | will be called rtc-twl. | ||
3980 | |||
3981 | +config RTC_DRV_TPS65910 | ||
3982 | + boolean "TI TPS65910" | ||
3983 | + depends on RTC_CLASS && TPS65910_CORE | ||
3984 | + help | ||
3985 | + If you say yes here you get support for the RTC on the | ||
3986 | + TPS65910 family chips, used mostly with OMAP3/AM35xx platforms. | ||
3987 | + | ||
3988 | + | ||
3989 | config RTC_DRV_S35390A | ||
3990 | tristate "Seiko Instruments S-35390A" | ||
3991 | select BITREVERSE | ||
3992 | diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile | ||
3993 | index 7da6efb..8fcfe49 100644 | ||
3994 | --- a/drivers/rtc/Makefile | ||
3995 | +++ b/drivers/rtc/Makefile | ||
3996 | @@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o | ||
3997 | obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o | ||
3998 | obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o | ||
3999 | obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o | ||
4000 | +obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o | ||
4001 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o | ||
4002 | obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o | ||
4003 | obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o | ||
4004 | diff --git a/drivers/rtc/rtc-tps65910.c b/drivers/rtc/rtc-tps65910.c | ||
4005 | new file mode 100644 | ||
4006 | index 0000000..7e7ed4b | ||
4007 | --- /dev/null | ||
4008 | +++ b/drivers/rtc/rtc-tps65910.c | ||
4009 | @@ -0,0 +1,657 @@ | ||
4010 | +/* | ||
4011 | + * rtc-tps65910.c -- TPS65910 Real Time Clock interface | ||
4012 | + * | ||
4013 | + * Copyright (C) 2010 Mistral Solutions Pvt Ltd. <www.mistralsolutions.com> | ||
4014 | + * Author: Umesh K <umeshk@mistralsolutions.com> | ||
4015 | + * | ||
4016 | + * Based on rtc-twl.c | ||
4017 | + * | ||
4018 | + * This program is free software; you can redistribute it and/or | ||
4019 | + * modify it under the terms of the GNU General Public License | ||
4020 | + * as published by the Free Software Foundation; either version | ||
4021 | + * 2 of the License, or (at your option) any later version. | ||
4022 | + */ | ||
4023 | + | ||
4024 | +#include <linux/kernel.h> | ||
4025 | +#include <linux/errno.h> | ||
4026 | +#include <linux/init.h> | ||
4027 | +#include <linux/module.h> | ||
4028 | +#include <linux/types.h> | ||
4029 | +#include <linux/rtc.h> | ||
4030 | +#include <linux/bcd.h> | ||
4031 | +#include <linux/platform_device.h> | ||
4032 | +#include <linux/interrupt.h> | ||
4033 | +#include <linux/i2c/tps65910.h> | ||
4034 | +#include <linux/gpio.h> | ||
4035 | +#include <linux/delay.h> | ||
4036 | + | ||
4037 | +/* RTC Definitions */ | ||
4038 | +/* RTC_CTRL_REG bitfields */ | ||
4039 | +#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 | ||
4040 | +#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 | ||
4041 | +#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 | ||
4042 | +#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 | ||
4043 | +#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 | ||
4044 | +#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 | ||
4045 | +#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 | ||
4046 | +#define BIT_RTC_CTRL_REG_RTC_V_OPT_M 0x80 | ||
4047 | + | ||
4048 | +/* RTC_STATUS_REG bitfields */ | ||
4049 | +#define BIT_RTC_STATUS_REG_RUN_M 0x02 | ||
4050 | +#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 | ||
4051 | +#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 | ||
4052 | +#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 | ||
4053 | +#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 | ||
4054 | +#define BIT_RTC_STATUS_REG_ALARM_M 0x40 | ||
4055 | +#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 | ||
4056 | + | ||
4057 | +/* RTC_INTERRUPTS_REG bitfields */ | ||
4058 | +#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 | ||
4059 | +#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 | ||
4060 | +#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 | ||
4061 | + | ||
4062 | +/* DEVCTRL bitfields */ | ||
4063 | +#define BIT_RTC_PWDN 0x40 | ||
4064 | + | ||
4065 | +/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ | ||
4066 | +#define ALL_TIME_REGS 6 | ||
4067 | + | ||
4068 | +/* | ||
4069 | + * Supports 1 byte read from TPS65910 RTC register. | ||
4070 | + */ | ||
4071 | +static int tps65910_rtc_read_u8(u8 *data, u8 reg) | ||
4072 | +{ | ||
4073 | + int ret; | ||
4074 | + | ||
4075 | + ret = tps65910_i2c_read_u8(TPS65910_I2C_ID0, data, reg); | ||
4076 | + | ||
4077 | + if (ret < 0) | ||
4078 | + pr_err("tps65910_rtc: Could not read TPS65910" | ||
4079 | + "register %X - error %d\n", reg, ret); | ||
4080 | + return ret; | ||
4081 | +} | ||
4082 | + | ||
4083 | +/* | ||
4084 | + * Supports 1 byte write to TPS65910 RTC registers. | ||
4085 | + */ | ||
4086 | +static int tps65910_rtc_write_u8(u8 data, u8 reg) | ||
4087 | +{ | ||
4088 | + int ret; | ||
4089 | + | ||
4090 | + ret = tps65910_i2c_write_u8(TPS65910_I2C_ID0, data, reg); | ||
4091 | + if (ret < 0) | ||
4092 | + pr_err("tps65910_rtc: Could not write TPS65910" | ||
4093 | + "register %X - error %d\n", reg, ret); | ||
4094 | + return ret; | ||
4095 | +} | ||
4096 | + | ||
4097 | +/* | ||
4098 | + * Cache the value for timer/alarm interrupts register; this is | ||
4099 | + * only changed by callers holding rtc ops lock (or resume). | ||
4100 | + */ | ||
4101 | +static unsigned char rtc_irq_bits; | ||
4102 | + | ||
4103 | +/* | ||
4104 | + * Enable 1/second update and/or alarm interrupts. | ||
4105 | + */ | ||
4106 | +static int set_rtc_irq_bit(unsigned char bit) | ||
4107 | +{ | ||
4108 | + unsigned char val; | ||
4109 | + int ret; | ||
4110 | + | ||
4111 | + val = rtc_irq_bits | bit; | ||
4112 | + val |= bit; | ||
4113 | + ret = tps65910_rtc_write_u8(val, TPS65910_REG_RTC_INTERRUPTS); | ||
4114 | + if (ret == 0) | ||
4115 | + rtc_irq_bits = val; | ||
4116 | + | ||
4117 | + return ret; | ||
4118 | +} | ||
4119 | + | ||
4120 | +/* | ||
4121 | + * Disable update and/or alarm interrupts. | ||
4122 | + */ | ||
4123 | +static int mask_rtc_irq_bit(unsigned char bit) | ||
4124 | +{ | ||
4125 | + unsigned char val; | ||
4126 | + int ret; | ||
4127 | + | ||
4128 | + val = rtc_irq_bits & ~bit; | ||
4129 | + ret = tps65910_rtc_write_u8(val, TPS65910_REG_RTC_INTERRUPTS); | ||
4130 | + if (ret == 0) | ||
4131 | + rtc_irq_bits = val; | ||
4132 | + | ||
4133 | + return ret; | ||
4134 | +} | ||
4135 | + | ||
4136 | +static int tps65910_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) | ||
4137 | +{ | ||
4138 | + int ret; | ||
4139 | + | ||
4140 | + if (enabled) | ||
4141 | + ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); | ||
4142 | + else | ||
4143 | + ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); | ||
4144 | + | ||
4145 | + return ret; | ||
4146 | +} | ||
4147 | + | ||
4148 | +static int tps65910_rtc_update_irq_enable(struct device *dev, unsigned enabled) | ||
4149 | +{ | ||
4150 | + int ret; | ||
4151 | + | ||
4152 | + if (enabled) | ||
4153 | + ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | ||
4154 | + else | ||
4155 | + ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | ||
4156 | + | ||
4157 | + return ret; | ||
4158 | +} | ||
4159 | + | ||
4160 | +#if 1 /* Debugging periodic interrupts */ | ||
4161 | +/* | ||
4162 | + * We will just handle setting the frequency and make use the framework for | ||
4163 | + * reading the periodic interupts. | ||
4164 | + * | ||
4165 | + * @freq: Current periodic IRQ freq: | ||
4166 | + * bit 0: every second | ||
4167 | + * bit 1: every minute | ||
4168 | + * bit 2: every hour | ||
4169 | + * bit 3: every day | ||
4170 | + */ | ||
4171 | + | ||
4172 | +static int tps65910_rtc_irq_set_freq(struct device *dev, int freq) | ||
4173 | +{ | ||
4174 | + struct rtc_device *rtc = dev_get_drvdata(dev); | ||
4175 | + | ||
4176 | + if (freq < 0 || freq > 3) | ||
4177 | + return -EINVAL; | ||
4178 | + | ||
4179 | + rtc->irq_freq = freq; | ||
4180 | + /* set rtc irq freq to user defined value */ | ||
4181 | + set_rtc_irq_bit(freq); | ||
4182 | + | ||
4183 | + return 0; | ||
4184 | +} | ||
4185 | +#endif | ||
4186 | + | ||
4187 | +/* | ||
4188 | + * Gets current TPS65910 RTC time and date parameters. | ||
4189 | + * | ||
4190 | + * The RTC's time/alarm representation is not what gmtime(3) requires | ||
4191 | + * Linux to use: | ||
4192 | + * | ||
4193 | + * - Months are 1..12 vs Linux 0-11 | ||
4194 | + * - Years are 0..99 vs Linux 1900..N (we assume 21st century) | ||
4195 | + */ | ||
4196 | +static int tps65910_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
4197 | +{ | ||
4198 | + unsigned char rtc_data[ALL_TIME_REGS + 1]; | ||
4199 | + int ret; | ||
4200 | + u8 save_control; | ||
4201 | + | ||
4202 | + tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4203 | + ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4204 | + if (ret < 0) | ||
4205 | + return ret; | ||
4206 | + | ||
4207 | + save_control &= ~BIT_RTC_CTRL_REG_RTC_V_OPT_M; | ||
4208 | + | ||
4209 | + ret = tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); | ||
4210 | + if (ret < 0) | ||
4211 | + return ret; | ||
4212 | + | ||
4213 | + ret = tps65910_rtc_read_u8(&rtc_data[0], TPS65910_REG_SECONDS); | ||
4214 | + if (ret < 0) { | ||
4215 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4216 | + return ret; | ||
4217 | + } | ||
4218 | + ret = tps65910_rtc_read_u8(&rtc_data[1], TPS65910_REG_MINUTES); | ||
4219 | + if (ret < 0) { | ||
4220 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4221 | + return ret; | ||
4222 | + } | ||
4223 | + ret = tps65910_rtc_read_u8(&rtc_data[2], TPS65910_REG_HOURS); | ||
4224 | + if (ret < 0) { | ||
4225 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4226 | + return ret; | ||
4227 | + } | ||
4228 | + ret = tps65910_rtc_read_u8(&rtc_data[3], TPS65910_REG_DAYS); | ||
4229 | + if (ret < 0) { | ||
4230 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4231 | + return ret; | ||
4232 | + } | ||
4233 | + ret = tps65910_rtc_read_u8(&rtc_data[4], TPS65910_REG_MONTHS); | ||
4234 | + if (ret < 0) { | ||
4235 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4236 | + return ret; | ||
4237 | + } | ||
4238 | + ret = tps65910_rtc_read_u8(&rtc_data[5], TPS65910_REG_YEARS); | ||
4239 | + if (ret < 0) { | ||
4240 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4241 | + return ret; | ||
4242 | + } | ||
4243 | + | ||
4244 | + tm->tm_sec = bcd2bin(rtc_data[0]); | ||
4245 | + tm->tm_min = bcd2bin(rtc_data[1]); | ||
4246 | + tm->tm_hour = bcd2bin(rtc_data[2]); | ||
4247 | + tm->tm_mday = bcd2bin(rtc_data[3]); | ||
4248 | + tm->tm_mon = bcd2bin(rtc_data[4]) - 1; | ||
4249 | + tm->tm_year = bcd2bin(rtc_data[5]) + 100; | ||
4250 | + | ||
4251 | + return ret; | ||
4252 | +} | ||
4253 | + | ||
4254 | +static int tps65910_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
4255 | +{ | ||
4256 | + unsigned char save_control; | ||
4257 | + unsigned char rtc_data[ALL_TIME_REGS + 1]; | ||
4258 | + int ret; | ||
4259 | + | ||
4260 | + rtc_data[1] = bin2bcd(tm->tm_sec); | ||
4261 | + rtc_data[2] = bin2bcd(tm->tm_min); | ||
4262 | + rtc_data[3] = bin2bcd(tm->tm_hour); | ||
4263 | + rtc_data[4] = bin2bcd(tm->tm_mday); | ||
4264 | + rtc_data[5] = bin2bcd(tm->tm_mon + 1); | ||
4265 | + rtc_data[6] = bin2bcd(tm->tm_year - 100); | ||
4266 | + | ||
4267 | + /*Dummy read*/ | ||
4268 | + ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4269 | + | ||
4270 | + /* Stop RTC while updating the TC registers */ | ||
4271 | + ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4272 | + if (ret < 0) | ||
4273 | + goto out; | ||
4274 | + | ||
4275 | + save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; | ||
4276 | + | ||
4277 | + tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); | ||
4278 | + | ||
4279 | + /* update all the time registers in one shot */ | ||
4280 | + ret = tps65910_rtc_write_u8(rtc_data[1], TPS65910_REG_SECONDS); | ||
4281 | + if (ret < 0) { | ||
4282 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4283 | + return ret; | ||
4284 | + } | ||
4285 | + ret = tps65910_rtc_write_u8(rtc_data[2], TPS65910_REG_MINUTES); | ||
4286 | + if (ret < 0) { | ||
4287 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4288 | + return ret; | ||
4289 | + } | ||
4290 | + ret = tps65910_rtc_write_u8(rtc_data[3], TPS65910_REG_HOURS); | ||
4291 | + if (ret < 0) { | ||
4292 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4293 | + return ret; | ||
4294 | + } | ||
4295 | + ret = tps65910_rtc_write_u8(rtc_data[4], TPS65910_REG_DAYS); | ||
4296 | + if (ret < 0) { | ||
4297 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4298 | + return ret; | ||
4299 | + } | ||
4300 | + ret = tps65910_rtc_write_u8(rtc_data[5], TPS65910_REG_MONTHS); | ||
4301 | + if (ret < 0) { | ||
4302 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4303 | + return ret; | ||
4304 | + } | ||
4305 | + ret = tps65910_rtc_write_u8(rtc_data[6], TPS65910_REG_YEARS); | ||
4306 | + if (ret < 0) { | ||
4307 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4308 | + return ret; | ||
4309 | + } | ||
4310 | + | ||
4311 | + /*Dummy read*/ | ||
4312 | + ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4313 | + | ||
4314 | + ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); | ||
4315 | + if (ret < 0) | ||
4316 | + goto out; | ||
4317 | + /* Start back RTC */ | ||
4318 | + save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; | ||
4319 | + ret = tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); | ||
4320 | + | ||
4321 | +out: | ||
4322 | + return ret; | ||
4323 | +} | ||
4324 | + | ||
4325 | +/* | ||
4326 | + * Gets current TPS65910 RTC alarm time. | ||
4327 | + */ | ||
4328 | +static int tps65910_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) | ||
4329 | +{ | ||
4330 | + unsigned char rtc_data[ALL_TIME_REGS + 1]; | ||
4331 | + int ret; | ||
4332 | + | ||
4333 | + ret = tps65910_rtc_read_u8(&rtc_data[0], TPS65910_REG_ALARM_SECONDS); | ||
4334 | + if (ret < 0) { | ||
4335 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4336 | + return ret; | ||
4337 | + } | ||
4338 | + ret = tps65910_rtc_read_u8(&rtc_data[1], TPS65910_REG_ALARM_MINUTES); | ||
4339 | + if (ret < 0) { | ||
4340 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4341 | + return ret; | ||
4342 | + } | ||
4343 | + ret = tps65910_rtc_read_u8(&rtc_data[2], TPS65910_REG_ALARM_HOURS); | ||
4344 | + if (ret < 0) { | ||
4345 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4346 | + return ret; | ||
4347 | + } | ||
4348 | + ret = tps65910_rtc_read_u8(&rtc_data[3], TPS65910_REG_ALARM_DAYS); | ||
4349 | + if (ret < 0) { | ||
4350 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4351 | + return ret; | ||
4352 | + } | ||
4353 | + ret = tps65910_rtc_read_u8(&rtc_data[4], TPS65910_REG_ALARM_MONTHS); | ||
4354 | + if (ret < 0) { | ||
4355 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4356 | + return ret; | ||
4357 | + } | ||
4358 | + ret = tps65910_rtc_read_u8(&rtc_data[5], TPS65910_REG_ALARM_YEARS); | ||
4359 | + if (ret < 0) { | ||
4360 | + dev_err(dev, "rtc_read_time error %d\n", ret); | ||
4361 | + return ret; | ||
4362 | + } | ||
4363 | + | ||
4364 | + /* some of these fields may be wildcard/"match all" */ | ||
4365 | + alm->time.tm_sec = bcd2bin(rtc_data[0]); | ||
4366 | + alm->time.tm_min = bcd2bin(rtc_data[1]); | ||
4367 | + alm->time.tm_hour = bcd2bin(rtc_data[2]); | ||
4368 | + alm->time.tm_mday = bcd2bin(rtc_data[3]); | ||
4369 | + alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; | ||
4370 | + alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; | ||
4371 | + | ||
4372 | + /* report cached alarm enable state */ | ||
4373 | + if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) | ||
4374 | + alm->enabled = 1; | ||
4375 | + | ||
4376 | + return ret; | ||
4377 | +} | ||
4378 | + | ||
4379 | +static int tps65910_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | ||
4380 | +{ | ||
4381 | + unsigned char alarm_data[ALL_TIME_REGS + 1]; | ||
4382 | + int ret; | ||
4383 | + | ||
4384 | + ret = tps65910_rtc_alarm_irq_enable(dev, 0); | ||
4385 | + if (ret) | ||
4386 | + goto out; | ||
4387 | + | ||
4388 | + alarm_data[1] = bin2bcd(alm->time.tm_sec); | ||
4389 | + alarm_data[2] = bin2bcd(alm->time.tm_min); | ||
4390 | + alarm_data[3] = bin2bcd(alm->time.tm_hour); | ||
4391 | + alarm_data[4] = bin2bcd(alm->time.tm_mday); | ||
4392 | + alarm_data[5] = bin2bcd(alm->time.tm_mon + 1); | ||
4393 | + alarm_data[6] = bin2bcd(alm->time.tm_year - 100); | ||
4394 | + | ||
4395 | + /* update all the alarm registers in one shot */ | ||
4396 | + ret = tps65910_rtc_write_u8(alarm_data[1], TPS65910_REG_ALARM_SECONDS); | ||
4397 | + if (ret < 0) { | ||
4398 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4399 | + return ret; | ||
4400 | + } | ||
4401 | + ret = tps65910_rtc_write_u8(alarm_data[2], TPS65910_REG_ALARM_MINUTES); | ||
4402 | + if (ret < 0) { | ||
4403 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4404 | + return ret; | ||
4405 | + } | ||
4406 | + ret = tps65910_rtc_write_u8(alarm_data[3], TPS65910_REG_ALARM_HOURS); | ||
4407 | + if (ret < 0) { | ||
4408 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4409 | + return ret; | ||
4410 | + } | ||
4411 | + ret = tps65910_rtc_write_u8(alarm_data[4], TPS65910_REG_ALARM_DAYS); | ||
4412 | + if (ret < 0) { | ||
4413 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4414 | + return ret; | ||
4415 | + } | ||
4416 | + ret = tps65910_rtc_write_u8(alarm_data[5], TPS65910_REG_ALARM_MONTHS); | ||
4417 | + if (ret < 0) { | ||
4418 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4419 | + return ret; | ||
4420 | + } | ||
4421 | + ret = tps65910_rtc_write_u8(alarm_data[6], TPS65910_REG_ALARM_YEARS); | ||
4422 | + if (ret < 0) { | ||
4423 | + dev_err(dev, "rtc_write_time error %d\n", ret); | ||
4424 | + return ret; | ||
4425 | + } | ||
4426 | + | ||
4427 | + if (alm->enabled) | ||
4428 | + ret = tps65910_rtc_alarm_irq_enable(dev, 1); | ||
4429 | +out: | ||
4430 | + return ret; | ||
4431 | +} | ||
4432 | + | ||
4433 | + | ||
4434 | +struct work_struct rtc_wq; | ||
4435 | +unsigned long rtc_events; | ||
4436 | +struct rtc_device *global_rtc; | ||
4437 | + | ||
4438 | +void rtc_work(void *data) | ||
4439 | +{ | ||
4440 | + | ||
4441 | + int res; | ||
4442 | + u8 rd_reg; | ||
4443 | + unsigned long events = 0; | ||
4444 | + | ||
4445 | + res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_INT_STS); | ||
4446 | + | ||
4447 | + if (res < 0) | ||
4448 | + goto out; | ||
4449 | + /* | ||
4450 | + * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. | ||
4451 | + * only one (ALARM or RTC) interrupt source may be enabled | ||
4452 | + * at time, we also could check our results | ||
4453 | + * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] | ||
4454 | + */ | ||
4455 | + if (rd_reg & TPS65910_RTC_ALARM_IT) { | ||
4456 | + res = tps65910_rtc_write_u8(rd_reg | TPS65910_RTC_ALARM_IT, | ||
4457 | + TPS65910_REG_INT_STS); | ||
4458 | + if (res < 0) | ||
4459 | + goto out; | ||
4460 | + | ||
4461 | + /*Dummy read -- mandatory for status register*/ | ||
4462 | + res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4463 | + mdelay(100); | ||
4464 | + res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4465 | + res = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); | ||
4466 | + | ||
4467 | + rtc_events |= RTC_IRQF | RTC_AF; | ||
4468 | + } else if (rd_reg & TPS65910_RTC_PERIOD_IT) { | ||
4469 | + res = tps65910_rtc_write_u8(rd_reg | TPS65910_RTC_PERIOD_IT, | ||
4470 | + TPS65910_REG_INT_STS); | ||
4471 | + if (res < 0) | ||
4472 | + goto out; | ||
4473 | + | ||
4474 | + /*Dummy read -- mandatory for status register*/ | ||
4475 | + res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4476 | + mdelay(100); | ||
4477 | + res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4478 | + rd_reg &= 0xC3; | ||
4479 | + res = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); | ||
4480 | + rtc_events |= RTC_IRQF | RTC_UF; | ||
4481 | + } | ||
4482 | +out: | ||
4483 | + /* Notify RTC core on event */ | ||
4484 | + events = rtc_events; | ||
4485 | + rtc_update_irq(global_rtc, 1, events); | ||
4486 | +} | ||
4487 | + | ||
4488 | +static struct rtc_class_ops tps65910_rtc_ops = { | ||
4489 | + .read_time = tps65910_rtc_read_time, | ||
4490 | + .set_time = tps65910_rtc_set_time, | ||
4491 | + .read_alarm = tps65910_rtc_read_alarm, | ||
4492 | + .set_alarm = tps65910_rtc_set_alarm, | ||
4493 | + .alarm_irq_enable = tps65910_rtc_alarm_irq_enable, | ||
4494 | + .update_irq_enable = tps65910_rtc_update_irq_enable, | ||
4495 | + .irq_set_freq = tps65910_rtc_irq_set_freq, | ||
4496 | +}; | ||
4497 | + | ||
4498 | +static int __devinit tps65910_rtc_probe(struct platform_device *pdev) | ||
4499 | +{ | ||
4500 | + struct rtc_device *rtc; | ||
4501 | + int ret = 0; | ||
4502 | + u8 rd_reg; | ||
4503 | + | ||
4504 | + rtc = rtc_device_register(pdev->name, | ||
4505 | + &pdev->dev, &tps65910_rtc_ops, THIS_MODULE); | ||
4506 | + | ||
4507 | + if (IS_ERR(rtc)) { | ||
4508 | + ret = PTR_ERR(rtc); | ||
4509 | + dev_err(&pdev->dev, "can't register TPS65910 RTC device,\ | ||
4510 | + err %ld\n", PTR_ERR(rtc)); | ||
4511 | + goto out0; | ||
4512 | + | ||
4513 | + } | ||
4514 | + printk(KERN_INFO "TPS65910 RTC device successfully registered\n"); | ||
4515 | + | ||
4516 | + platform_set_drvdata(pdev, rtc); | ||
4517 | + | ||
4518 | + /* Take rtc out of reset */ | ||
4519 | + tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_DEVCTRL); | ||
4520 | + rd_reg &= ~BIT_RTC_PWDN; | ||
4521 | + ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_DEVCTRL); | ||
4522 | + | ||
4523 | + /* Dummy read to ensure that the register gets updated. | ||
4524 | + * Please refer tps65910 TRM table:25 for details | ||
4525 | + */ | ||
4526 | + tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4527 | + | ||
4528 | + ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); | ||
4529 | + if (ret < 0) { | ||
4530 | + printk(KERN_ERR "TPS65910 RTC STATUS REG READ FAILED\n"); | ||
4531 | + goto out1; | ||
4532 | + } | ||
4533 | + | ||
4534 | + if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) | ||
4535 | + dev_warn(&pdev->dev, "Power up reset detected.\n"); | ||
4536 | + | ||
4537 | + if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) | ||
4538 | + dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); | ||
4539 | + | ||
4540 | + /* Clear RTC Power up reset and pending alarm interrupts */ | ||
4541 | + ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); | ||
4542 | + if (ret < 0) | ||
4543 | + goto out1; | ||
4544 | + ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_INT_STS); | ||
4545 | + if (ret < 0) { | ||
4546 | + printk(KERN_ERR "TPS65910 RTC STATUS REG READ FAILED\n"); | ||
4547 | + goto out1; | ||
4548 | + } | ||
4549 | + | ||
4550 | + if (rd_reg & 0x40) { | ||
4551 | + printk(KERN_INFO "pending alarm interrupt!!! clearing!!!"); | ||
4552 | + tps65910_rtc_write_u8(rd_reg, TPS65910_REG_INT_STS); | ||
4553 | + } | ||
4554 | + | ||
4555 | + global_rtc = rtc; | ||
4556 | + | ||
4557 | + /* Link RTC IRQ handler to TPS65910 Core */ | ||
4558 | + tps65910_add_irq_work(TPS65910_RTC_ALARM_IRQ, rtc_work); | ||
4559 | + tps65910_add_irq_work(TPS65910_RTC_PERIOD_IRQ, rtc_work); | ||
4560 | + | ||
4561 | + /* Check RTC module status, Enable if it is off */ | ||
4562 | + ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_CTRL); | ||
4563 | + if (ret < 0) | ||
4564 | + goto out1; | ||
4565 | + | ||
4566 | + if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { | ||
4567 | + dev_info(&pdev->dev, "Enabling TPS65910-RTC.\n"); | ||
4568 | + rd_reg |= BIT_RTC_CTRL_REG_STOP_RTC_M; | ||
4569 | + ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_CTRL); | ||
4570 | + if (ret < 0) | ||
4571 | + goto out1; | ||
4572 | + } | ||
4573 | + | ||
4574 | + /* init cached IRQ enable bits */ | ||
4575 | + ret = tps65910_rtc_read_u8(&rtc_irq_bits, TPS65910_REG_RTC_INTERRUPTS); | ||
4576 | + if (ret < 0) | ||
4577 | + goto out1; | ||
4578 | + | ||
4579 | + tps65910_rtc_write_u8(0x3F, TPS65910_REG_INT_MSK); | ||
4580 | + return ret; | ||
4581 | + | ||
4582 | +out1: | ||
4583 | + rtc_device_unregister(rtc); | ||
4584 | +out0: | ||
4585 | + return ret; | ||
4586 | +} | ||
4587 | + | ||
4588 | +/* | ||
4589 | + * Disable all TPS65910 RTC module interrupts. | ||
4590 | + * Sets status flag to free. | ||
4591 | + */ | ||
4592 | +static int __devexit tps65910_rtc_remove(struct platform_device *pdev) | ||
4593 | +{ | ||
4594 | + /* leave rtc running, but disable irqs */ | ||
4595 | + struct rtc_device *rtc = platform_get_drvdata(pdev); | ||
4596 | + int irq = platform_get_irq(pdev, 0); | ||
4597 | + | ||
4598 | + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); | ||
4599 | + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | ||
4600 | + | ||
4601 | + | ||
4602 | + free_irq(irq, rtc); | ||
4603 | + | ||
4604 | + rtc_device_unregister(rtc); | ||
4605 | + platform_set_drvdata(pdev, NULL); | ||
4606 | + return 0; | ||
4607 | +} | ||
4608 | + | ||
4609 | +static void tps65910_rtc_shutdown(struct platform_device *pdev) | ||
4610 | +{ | ||
4611 | + /* mask timer interrupts, but leave alarm interrupts on to enable | ||
4612 | + * power-on when alarm is triggered | ||
4613 | + */ | ||
4614 | + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | ||
4615 | +} | ||
4616 | + | ||
4617 | +#ifdef CONFIG_PM | ||
4618 | + | ||
4619 | +static unsigned char irqstat; | ||
4620 | + | ||
4621 | + static | ||
4622 | +int tps65910_rtc_suspend(struct platform_device *pdev, pm_message_t state) | ||
4623 | +{ | ||
4624 | + irqstat = rtc_irq_bits; | ||
4625 | + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | ||
4626 | + return 0; | ||
4627 | +} | ||
4628 | + | ||
4629 | +static int tps65910_rtc_resume(struct platform_device *pdev) | ||
4630 | +{ | ||
4631 | + set_rtc_irq_bit(irqstat); | ||
4632 | + return 0; | ||
4633 | +} | ||
4634 | + | ||
4635 | +#else | ||
4636 | +#define tps65910_rtc_suspend NULL | ||
4637 | +#define tps65910_rtc_resume NULL | ||
4638 | +#endif | ||
4639 | + | ||
4640 | + | ||
4641 | +static struct platform_driver tps65910rtc_driver = { | ||
4642 | + .probe = tps65910_rtc_probe, | ||
4643 | + .remove = __devexit_p(tps65910_rtc_remove), | ||
4644 | + .shutdown = tps65910_rtc_shutdown, | ||
4645 | + .suspend = tps65910_rtc_suspend, | ||
4646 | + .resume = tps65910_rtc_resume, | ||
4647 | + .driver = { | ||
4648 | + .owner = THIS_MODULE, | ||
4649 | + .name = "tps65910_rtc", | ||
4650 | + }, | ||
4651 | +}; | ||
4652 | +static int __init tps65910_rtc_init(void) | ||
4653 | +{ | ||
4654 | + return platform_driver_register(&tps65910rtc_driver); | ||
4655 | +} | ||
4656 | +module_init(tps65910_rtc_init); | ||
4657 | + | ||
4658 | +static void __exit tps65910_rtc_exit(void) | ||
4659 | +{ | ||
4660 | + platform_driver_unregister(&tps65910rtc_driver); | ||
4661 | +} | ||
4662 | +module_exit(tps65910_rtc_exit); | ||
4663 | + | ||
4664 | +MODULE_ALIAS("platform:tps65910_rtc"); | ||
4665 | +MODULE_AUTHOR("Umesh K <umeshk@mistralsolutions.com"); | ||
4666 | +MODULE_LICENSE("GPL"); | ||
4667 | diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c | ||
4668 | index c80105b..1d9cf0c 100644 | ||
4669 | --- a/drivers/usb/host/ehci-hub.c | ||
4670 | +++ b/drivers/usb/host/ehci-hub.c | ||
4671 | @@ -468,7 +468,8 @@ static int check_reset_complete ( | ||
4672 | index + 1); | ||
4673 | |||
4674 | // what happens if HCS_N_CC(params) == 0 ? | ||
4675 | -#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) | ||
4676 | +#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ | ||
4677 | + !defined(CONFIG_MACH_CRANEBOARD) | ||
4678 | port_status |= PORT_OWNER; | ||
4679 | #endif | ||
4680 | port_status &= ~PORT_RWC_BITS; | ||
4681 | @@ -927,7 +928,8 @@ static int ehci_hub_control ( | ||
4682 | ehci_dbg (ehci, | ||
4683 | "port %d low speed --> companion\n", | ||
4684 | wIndex + 1); | ||
4685 | -#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) | ||
4686 | +#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ | ||
4687 | + !defined(CONFIG_MACH_CRANEBOARD) | ||
4688 | temp |= PORT_OWNER; | ||
4689 | #endif | ||
4690 | } else { | ||
4691 | @@ -978,7 +980,8 @@ error_exit: | ||
4692 | |||
4693 | static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum) | ||
4694 | { | ||
4695 | -#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) | ||
4696 | +#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ | ||
4697 | + !defined(CONFIG_MACH_CRANEBOARD) | ||
4698 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
4699 | |||
4700 | if (ehci_is_TDI(ehci)) | ||
4701 | diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig | ||
4702 | index dd1edfd..5ac688d 100644 | ||
4703 | --- a/drivers/usb/musb/Kconfig | ||
4704 | +++ b/drivers/usb/musb/Kconfig | ||
4705 | @@ -10,7 +10,7 @@ comment "Enable Host or Gadget support to see Inventra options" | ||
4706 | config USB_MUSB_HDRC | ||
4707 | depends on (USB || USB_GADGET) | ||
4708 | depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523)) | ||
4709 | - select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN || MACH_OMAP3517EVM) | ||
4710 | + select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN || MACH_OMAP3517EVM || MACH_CRANEBOARD) | ||
4711 | select TWL4030_USB if MACH_OMAP_3430SDP | ||
4712 | select USB_OTG_UTILS | ||
4713 | tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' | ||
4714 | @@ -152,7 +152,7 @@ config MUSB_PIO_ONLY | ||
4715 | |||
4716 | config USB_INVENTRA_DMA | ||
4717 | bool | ||
4718 | - depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY && !MACH_OMAP3517EVM | ||
4719 | + depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY && !MACH_OMAP3517EVM && !MACH_CRANEBOARD | ||
4720 | default ARCH_OMAP2430 || ARCH_OMAP34XX || BLACKFIN | ||
4721 | help | ||
4722 | Enable DMA transfers using Mentor's engine. | ||
4723 | @@ -182,7 +182,7 @@ config USB_TI_CPPI_DMA | ||
4724 | config USB_TI_CPPI41_DMA | ||
4725 | bool | ||
4726 | depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY | ||
4727 | - default ARCH_DAVINCI_DA830 || MACH_OMAP3517EVM | ||
4728 | + default ARCH_DAVINCI_DA830 || MACH_OMAP3517EVM || MACH_CRANEBOARD | ||
4729 | select CPPI41 | ||
4730 | help | ||
4731 | Enable DMA transfers when TI CPPI 4.1 DMA is available. | ||
4732 | diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile | ||
4733 | index 01de383..daf3415 100644 | ||
4734 | --- a/drivers/usb/musb/Makefile | ||
4735 | +++ b/drivers/usb/musb/Makefile | ||
4736 | @@ -19,7 +19,8 @@ ifeq ($(CONFIG_ARCH_OMAP2430),y) | ||
4737 | endif | ||
4738 | |||
4739 | ifeq ($(CONFIG_ARCH_OMAP3430),y) | ||
4740 | - ifeq ($(CONFIG_MACH_OMAP3517EVM),y) | ||
4741 | + | ||
4742 | + ifeq ($(CONFIG_MACH_CRANEBOARD),y) | ||
4743 | musb_hdrc-objs += am3517.o | ||
4744 | else | ||
4745 | musb_hdrc-objs += omap2430.o | ||
4746 | diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c | ||
4747 | index 98874c5..71ec7e8 100644 | ||
4748 | --- a/drivers/usb/musb/musb_core.c | ||
4749 | +++ b/drivers/usb/musb/musb_core.c | ||
4750 | @@ -1019,7 +1019,7 @@ static void musb_shutdown(struct platform_device *pdev) | ||
4751 | */ | ||
4752 | #if defined(CONFIG_USB_TUSB6010) || \ | ||
4753 | defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX) || \ | ||
4754 | - defined(CONFIG_MACH_OMAP3517EVM) | ||
4755 | + defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4756 | static ushort __initdata fifo_mode = 4; | ||
4757 | #else | ||
4758 | static ushort __initdata fifo_mode = 2; | ||
4759 | diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h | ||
4760 | index 0b19d0b..d7850c7 100644 | ||
4761 | --- a/drivers/usb/musb/musb_core.h | ||
4762 | +++ b/drivers/usb/musb/musb_core.h | ||
4763 | @@ -380,7 +380,7 @@ struct musb { | ||
4764 | void __iomem *sync_va; | ||
4765 | #endif | ||
4766 | |||
4767 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4768 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4769 | /* Backup registers required for the workaround of AM3517 bytewise | ||
4770 | * read issue. FADDR, POWER, INTRTXE, INTRRXE and INTRUSBE register | ||
4771 | * read would actually clear the interrupt registers and would cause | ||
4772 | diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c | ||
4773 | index c0e2efc..bb93de7 100644 | ||
4774 | --- a/drivers/usb/musb/musb_gadget.c | ||
4775 | +++ b/drivers/usb/musb/musb_gadget.c | ||
4776 | @@ -2024,7 +2024,7 @@ __acquires(musb->lock) | ||
4777 | |||
4778 | |||
4779 | /* what speed did we negotiate? */ | ||
4780 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4781 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4782 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4783 | #endif | ||
4784 | power = musb_readb(mbase, MUSB_POWER); | ||
4785 | diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c | ||
4786 | index 7a9dc1e..bcc754d 100644 | ||
4787 | --- a/drivers/usb/musb/musb_gadget_ep0.c | ||
4788 | +++ b/drivers/usb/musb/musb_gadget_ep0.c | ||
4789 | @@ -770,7 +770,7 @@ setup: | ||
4790 | printk(KERN_NOTICE "%s: peripheral reset " | ||
4791 | "irq lost!\n", | ||
4792 | musb_driver_name); | ||
4793 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4794 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4795 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4796 | #endif | ||
4797 | power = musb_readb(mbase, MUSB_POWER); | ||
4798 | diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h | ||
4799 | index 0969d88..e578061 100644 | ||
4800 | --- a/drivers/usb/musb/musb_io.h | ||
4801 | +++ b/drivers/usb/musb/musb_io.h | ||
4802 | @@ -56,7 +56,8 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len) | ||
4803 | |||
4804 | #endif | ||
4805 | |||
4806 | -#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_MACH_OMAP3517EVM) | ||
4807 | +#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_MACH_OMAP3517EVM) && \ | ||
4808 | + !defined(CONFIG_MACH_CRANEBOARD) | ||
4809 | |||
4810 | /* NOTE: these offsets are all in bytes */ | ||
4811 | |||
4812 | @@ -136,7 +137,7 @@ static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) | ||
4813 | static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) | ||
4814 | { bfin_write16(addr + offset, (u16) data); } | ||
4815 | |||
4816 | -#elif defined(CONFIG_MACH_OMAP3517EVM) | ||
4817 | +#elif (defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD)) | ||
4818 | |||
4819 | /* AM3517 has a limitation on read operation. Only 32 bit read is | ||
4820 | * allowed and thus 8bit and 16bit read has to be handled differently | ||
4821 | diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c | ||
4822 | index 0200a62..c1570b6 100644 | ||
4823 | --- a/drivers/usb/musb/musb_virthub.c | ||
4824 | +++ b/drivers/usb/musb/musb_virthub.c | ||
4825 | @@ -68,12 +68,12 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend) | ||
4826 | musb_writeb(mbase, MUSB_POWER, power); | ||
4827 | |||
4828 | /* Needed for OPT A tests */ | ||
4829 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4830 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4831 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4832 | #endif | ||
4833 | power = musb_readb(mbase, MUSB_POWER); | ||
4834 | while (power & MUSB_POWER_SUSPENDM) { | ||
4835 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4836 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4837 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4838 | #endif | ||
4839 | power = musb_readb(mbase, MUSB_POWER); | ||
4840 | @@ -135,7 +135,7 @@ static void musb_port_reset(struct musb *musb, bool do_reset) | ||
4841 | /* NOTE: caller guarantees it will turn off the reset when | ||
4842 | * the appropriate amount of time has passed | ||
4843 | */ | ||
4844 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4845 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4846 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4847 | #endif | ||
4848 | power = musb_readb(mbase, MUSB_POWER); | ||
4849 | @@ -171,7 +171,7 @@ static void musb_port_reset(struct musb *musb, bool do_reset) | ||
4850 | |||
4851 | musb->ignore_disconnect = false; | ||
4852 | |||
4853 | -#ifdef CONFIG_MACH_OMAP3517EVM | ||
4854 | +#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) | ||
4855 | musb->read_mask &= ~AM3517_READ_ISSUE_POWER; | ||
4856 | #endif | ||
4857 | power = musb_readb(mbase, MUSB_POWER); | ||
4858 | diff --git a/drivers/video/omap2/displays/panel-generic.c b/drivers/video/omap2/displays/panel-generic.c | ||
4859 | index eb48d1a..ad9ecc2 100644 | ||
4860 | --- a/drivers/video/omap2/displays/panel-generic.c | ||
4861 | +++ b/drivers/video/omap2/displays/panel-generic.c | ||
4862 | @@ -26,7 +26,11 @@ static struct omap_video_timings generic_panel_timings = { | ||
4863 | /* 640 x 480 @ 60 Hz Reduced blanking VESA CVT 0.31M3-R */ | ||
4864 | .x_res = 640, | ||
4865 | .y_res = 480, | ||
4866 | +#ifdef CONFIG_MACH_CRANEBOARD | ||
4867 | + .pixel_clock = 24000, | ||
4868 | +#else | ||
4869 | .pixel_clock = 23500, | ||
4870 | +#endif | ||
4871 | .hfp = 48, | ||
4872 | .hsw = 32, | ||
4873 | .hbp = 80, | ||
4874 | @@ -37,7 +41,12 @@ static struct omap_video_timings generic_panel_timings = { | ||
4875 | |||
4876 | static int generic_panel_probe(struct omap_dss_device *dssdev) | ||
4877 | { | ||
4878 | +#ifdef CONFIG_MACH_CRANEBOARD | ||
4879 | + dssdev->panel.config = (OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | | ||
4880 | + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC); | ||
4881 | +#else | ||
4882 | dssdev->panel.config = OMAP_DSS_LCD_TFT; | ||
4883 | +#endif | ||
4884 | dssdev->panel.timings = generic_panel_timings; | ||
4885 | |||
4886 | return 0; | ||
4887 | diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c | ||
4888 | index 1127e85..8be116f 100644 | ||
4889 | --- a/drivers/video/omap2/dss/venc.c | ||
4890 | +++ b/drivers/video/omap2/dss/venc.c | ||
4891 | @@ -292,7 +292,9 @@ static struct { | ||
4892 | void __iomem *base; | ||
4893 | struct mutex venc_lock; | ||
4894 | u32 wss_data; | ||
4895 | +#ifndef CONFIG_MACH_CRANEBOARD | ||
4896 | struct regulator *vdda_dac_reg; | ||
4897 | +#endif | ||
4898 | } venc; | ||
4899 | |||
4900 | static inline void venc_write_reg(int idx, u32 val) | ||
4901 | @@ -503,13 +505,14 @@ int venc_init(struct platform_device *pdev) | ||
4902 | return -ENOMEM; | ||
4903 | } | ||
4904 | |||
4905 | +#ifndef CONFIG_MACH_CRANEBOARD | ||
4906 | venc.vdda_dac_reg = regulator_get(&pdev->dev, "vdda_dac"); | ||
4907 | if (IS_ERR(venc.vdda_dac_reg)) { | ||
4908 | iounmap(venc.base); | ||
4909 | DSSERR("can't get VDDA_DAC regulator\n"); | ||
4910 | return PTR_ERR(venc.vdda_dac_reg); | ||
4911 | } | ||
4912 | - | ||
4913 | +#endif | ||
4914 | venc_enable_clocks(1); | ||
4915 | |||
4916 | rev_id = (u8)(venc_read_reg(VENC_REV_ID) & 0xff); | ||
4917 | @@ -523,9 +526,9 @@ int venc_init(struct platform_device *pdev) | ||
4918 | void venc_exit(void) | ||
4919 | { | ||
4920 | omap_dss_unregister_driver(&venc_driver); | ||
4921 | - | ||
4922 | +#ifndef CONFIG_MACH_CRANEBOARD | ||
4923 | regulator_put(venc.vdda_dac_reg); | ||
4924 | - | ||
4925 | +#endif | ||
4926 | iounmap(venc.base); | ||
4927 | } | ||
4928 | |||
4929 | @@ -576,8 +579,9 @@ static int venc_power_on(struct omap_dss_device *dssdev) | ||
4930 | dispc_set_digit_size(dssdev->panel.timings.x_res, | ||
4931 | dssdev->panel.timings.y_res/2); | ||
4932 | |||
4933 | +#ifndef CONFIG_MACH_CRANEBOARD | ||
4934 | regulator_enable(venc.vdda_dac_reg); | ||
4935 | - | ||
4936 | +#endif | ||
4937 | if (dssdev->platform_enable) | ||
4938 | dssdev->platform_enable(dssdev); | ||
4939 | |||
4940 | @@ -604,8 +608,9 @@ static void venc_power_off(struct omap_dss_device *dssdev) | ||
4941 | if (dssdev->platform_disable) | ||
4942 | dssdev->platform_disable(dssdev); | ||
4943 | |||
4944 | +#ifndef CONFIG_MACH_CRANEBOARD | ||
4945 | regulator_disable(venc.vdda_dac_reg); | ||
4946 | - | ||
4947 | +#endif | ||
4948 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | ||
4949 | dsi_pll_uninit(); | ||
4950 | dss_clk_disable(DSS_CLK_FCK2); | ||
4951 | diff --git a/include/linux/i2c/tps65910.h b/include/linux/i2c/tps65910.h | ||
4952 | new file mode 100644 | ||
4953 | index 0000000..1362de4 | ||
4954 | --- /dev/null | ||
4955 | +++ b/include/linux/i2c/tps65910.h | ||
4956 | @@ -0,0 +1,278 @@ | ||
4957 | +/* linux/i2c/tps65910.h | ||
4958 | + * | ||
4959 | + * TPS65910 Power Management Device Definitions. | ||
4960 | + * | ||
4961 | + * Based on include/linux/i2c/twl.h | ||
4962 | + * | ||
4963 | + * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> | ||
4964 | + * | ||
4965 | + * This program is free software; you can redistribute it and/or modify it | ||
4966 | + * under the terms of the GNU General Public License as published by the | ||
4967 | + * Free Software Foundation; either version 2 of the License, or (at your | ||
4968 | + * option) any later version. | ||
4969 | + * | ||
4970 | + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
4971 | + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
4972 | + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
4973 | + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
4974 | + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
4975 | + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
4976 | + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
4977 | + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
4978 | + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
4979 | + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
4980 | + * | ||
4981 | + * You should have received a copy of the GNU General Public License along | ||
4982 | + * with this program; if not, write to the Free Software Foundation, Inc., | ||
4983 | + * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
4984 | + */ | ||
4985 | + | ||
4986 | +#ifndef __LINUX_I2C_TPS65910_H | ||
4987 | +#define __LINUX_I2C_TPS65910_H | ||
4988 | + | ||
4989 | +#define TPS65910_NUM_SLAVES 2 | ||
4990 | +/* I2C Slave Address 7-bit */ | ||
4991 | +#define TPS65910_I2C_ID0 0x2D /* general-purpose */ | ||
4992 | +#define TPS65910_I2C_ID1 0x12 /* Smart Reflex */ | ||
4993 | + | ||
4994 | +/* TPS65910 to host IRQ */ | ||
4995 | +#define TPS65910_HOST_IRQ INT_34XX_SYS_NIRQ | ||
4996 | + | ||
4997 | +/* TPS65910 MAX GPIOs */ | ||
4998 | +#define TPS65910_GPIO_MAX 1 | ||
4999 | + | ||
5000 | +/* | ||
5001 | + * ---------------------------------------------------------------------------- | ||
5002 | + * Registers, all 8 bits | ||
5003 | + * ---------------------------------------------------------------------------- | ||
5004 | + */ | ||
5005 | +#define TPS65910_REG_SECONDS 0x00 | ||
5006 | +#define TPS65910_REG_MINUTES 0x01 | ||
5007 | +#define TPS65910_REG_HOURS 0x02 | ||
5008 | +#define TPS65910_REG_DAYS 0x03 | ||
5009 | +#define TPS65910_REG_MONTHS 0x04 | ||
5010 | +#define TPS65910_REG_YEARS 0x05 | ||
5011 | +#define TPS65910_REG_WEEKS 0x06 | ||
5012 | +#define TPS65910_REG_ALARM_SECONDS 0x08 | ||
5013 | +#define TPS65910_REG_ALARM_MINUTES 0x09 | ||
5014 | +#define TPS65910_REG_ALARM_HOURS 0x0A | ||
5015 | +#define TPS65910_REG_ALARM_DAYS 0x0B | ||
5016 | +#define TPS65910_REG_ALARM_MONTHS 0x0C | ||
5017 | +#define TPS65910_REG_ALARM_YEARS 0x0D | ||
5018 | + | ||
5019 | +#define TPS65910_REG_RTC_CTRL 0x10 | ||
5020 | +#define TPS65910_REG_RTC_STATUS 0x11 | ||
5021 | +#define TPS65910_REG_RTC_INTERRUPTS 0x12 | ||
5022 | +#define TPS65910_REG_RTC_COMP_LSB 0x13 | ||
5023 | +#define TPS65910_REG_RTC_COMP_MSB 0x14 | ||
5024 | +#define TPS65910_REG_RTC_RES_PROG 0x15 | ||
5025 | +#define TPS65910_REG_RTC_RESET_STATUS 0x16 | ||
5026 | +#define TPS65910_REG_BCK1 0x17 | ||
5027 | +#define TPS65910_REG_BCK2 0x18 | ||
5028 | +#define TPS65910_REG_BCK3 0x19 | ||
5029 | +#define TPS65910_REG_BCK4 0x1A | ||
5030 | +#define TPS65910_REG_BCK5 0x1B | ||
5031 | +#define TPS65910_REG_PUADEN 0x1C | ||
5032 | +#define TPS65910_REG_REF 0x1D | ||
5033 | +#define TPS65910_REG_VRTC 0x1E | ||
5034 | + | ||
5035 | +#define TPS65910_REG_VIO 0x20 | ||
5036 | +#define TPS65910_REG_VDD1 0x21 | ||
5037 | +#define TPS65910_REG_VDD1_OP 0x22 | ||
5038 | +#define TPS65910_REG_VDD1_SR 0x23 | ||
5039 | +#define TPS65910_REG_VDD2 0x24 | ||
5040 | +#define TPS65910_REG_VDD2_OP 0x25 | ||
5041 | +#define TPS65910_REG_VDD2_SR 0x26 | ||
5042 | +#define TPS65910_REG_VDD3 0x27 | ||
5043 | + | ||
5044 | +#define TPS65910_REG_VDIG1 0x30 | ||
5045 | +#define TPS65910_REG_VDIG2 0x31 | ||
5046 | +#define TPS65910_REG_VAUX1 0x32 | ||
5047 | +#define TPS65910_REG_VAUX2 0x33 | ||
5048 | +#define TPS65910_REG_VAUX33 0x34 | ||
5049 | +#define TPS65910_REG_VMMC 0x35 | ||
5050 | +#define TPS65910_REG_VPLL 0x36 | ||
5051 | +#define TPS65910_REG_VDAC 0x37 | ||
5052 | +#define TPS65910_REG_THERM 0x38 | ||
5053 | +#define TPS65910_REG_BBCH 0x39 | ||
5054 | + | ||
5055 | +#define TPS65910_REG_DCDCCTRL 0x3E | ||
5056 | +#define TPS65910_REG_DEVCTRL 0x3F | ||
5057 | +#define TPS65910_REG_DEVCTRL2 0x40 | ||
5058 | +#define TPS65910_REG_SLEEP_KEEP_LDO_ON 0x41 | ||
5059 | +#define TPS65910_REG_SLEEP_KEEP_RES_ON 0x42 | ||
5060 | +#define TPS65910_REG_SLEEP_SET_LDO_OFF 0x43 | ||
5061 | +#define TPS65910_REG_SLEEP_SET_RES_OFF 0x44 | ||
5062 | +#define TPS65910_REG_EN1_LDO_ASS 0x45 | ||
5063 | +#define TPS65910_REG_EN1_SMPS_ASS 0x46 | ||
5064 | +#define TPS65910_REG_EN2_LDO_ASS 0x47 | ||
5065 | +#define TPS65910_REG_EN2_SMPS_ASS 0x48 | ||
5066 | +#define TPS65910_REG_EN3_LDO_ASS 0x49 | ||
5067 | +#define TPS65910_REG_SPARE 0x4A | ||
5068 | + | ||
5069 | +#define TPS65910_REG_INT_STS 0x50 | ||
5070 | +#define TPS65910_REG_INT_MSK 0x51 | ||
5071 | +#define TPS65910_REG_INT_STS2 0x52 | ||
5072 | +#define TPS65910_REG_INT_MSK2 0x53 | ||
5073 | +#define TPS65910_REG_INT_STS3 0x54 | ||
5074 | +#define TPS65910_REG_INT_MSK3 0x55 | ||
5075 | + | ||
5076 | +#define TPS65910_REG_GPIO0 0x60 | ||
5077 | + | ||
5078 | +#define TPS65910_REG_JTAGVERNUM 0x80 | ||
5079 | + | ||
5080 | +/* TPS65910 GPIO Specific flags */ | ||
5081 | +#define TPS65910_GPIO_INT_FALLING 0 | ||
5082 | +#define TPS65910_GPIO_INT_RISING 1 | ||
5083 | + | ||
5084 | +#define TPS65910_DEBOUNCE_91_5_MS 0 | ||
5085 | +#define TPS65910_DEBOUNCE_150_MS 1 | ||
5086 | + | ||
5087 | +#define TPS65910_GPIO_PUDIS (1 << 3) | ||
5088 | +#define TPS65910_GPIO_CFG_OUTPUT (1 << 2) | ||
5089 | + | ||
5090 | + | ||
5091 | + | ||
5092 | +/* TPS65910 Interrupt events */ | ||
5093 | + | ||
5094 | +/* RTC Driver */ | ||
5095 | +#define TPS65910_RTC_ALARM_IT 0x80 | ||
5096 | +#define TPS65910_RTC_PERIOD_IT 0x40 | ||
5097 | + | ||
5098 | +/*Core Driver */ | ||
5099 | +#define TPS65910_HOT_DIE_IT 0x20 | ||
5100 | +#define TPS65910_PWRHOLD_IT 0x10 | ||
5101 | +#define TPS65910_PWRON_LP_IT 0x08 | ||
5102 | +#define TPS65910_PWRON_IT 0x04 | ||
5103 | +#define TPS65910_VMBHI_IT 0x02 | ||
5104 | +#define TPS65910_VMBGCH_IT 0x01 | ||
5105 | + | ||
5106 | +/* GPIO driver */ | ||
5107 | +#define TPS65910_GPIO_F_IT 0x02 | ||
5108 | +#define TPS65910_GPIO_R_IT 0x01 | ||
5109 | + | ||
5110 | + | ||
5111 | +#define TPS65910_VRTC_OFFMASK (1<<3) | ||
5112 | + | ||
5113 | +/* Back-up battery charger control */ | ||
5114 | +#define TPS65910_BBCHEN 0x01 | ||
5115 | + | ||
5116 | +/* Back-up battery charger voltage */ | ||
5117 | +#define TPS65910_BBSEL_3P0 0x00 | ||
5118 | +#define TPS65910_BBSEL_2P52 0x02 | ||
5119 | +#define TPS65910_BBSEL_3P15 0x04 | ||
5120 | +#define TPS65910_BBSEL_VBAT 0x06 | ||
5121 | + | ||
5122 | +/* DEVCTRL_REG flags */ | ||
5123 | +#define TPS65910_RTC_PWDNN 0x40 | ||
5124 | +#define TPS65910_CK32K_CTRL 0x20 | ||
5125 | +#define TPS65910_SR_CTL_I2C_SEL 0x10 | ||
5126 | +#define TPS65910_DEV_OFF_RST 0x08 | ||
5127 | +#define TPS65910_DEV_ON 0x04 | ||
5128 | +#define TPS65910_DEV_SLP 0x02 | ||
5129 | +#define TPS65910_DEV_OFF 0x01 | ||
5130 | + | ||
5131 | +/* DEVCTRL2_REG flags */ | ||
5132 | +#define TPS65910_DEV2_TSLOT_LENGTH 0x30 | ||
5133 | +#define TPS65910_DEV2_SLEEPSIG_POL 0x08 | ||
5134 | +#define TPS65910_DEV2_PWON_LP_OFF 0x04 | ||
5135 | +#define TPS65910_DEV2_PWON_LP_RST 0x02 | ||
5136 | +#define TPS65910_DEV2_IT_POL 0x01 | ||
5137 | + | ||
5138 | +/* TPS65910 SMPS/LDO's */ | ||
5139 | +#define TPS65910_VIO 0 | ||
5140 | +#define TPS65910_VDD1 1 | ||
5141 | +#define TPS65910_VDD2 2 | ||
5142 | +#define TPS65910_VDD3 3 | ||
5143 | +/* LDOs */ | ||
5144 | +#define TPS65910_VDIG1 4 | ||
5145 | +#define TPS65910_VDIG2 5 | ||
5146 | +#define TPS65910_VAUX33 6 | ||
5147 | +#define TPS65910_VMMC 7 | ||
5148 | +#define TPS65910_VAUX1 8 | ||
5149 | +#define TPS65910_VAUX2 9 | ||
5150 | +#define TPS65910_VDAC 10 | ||
5151 | +#define TPS65910_VPLL 11 | ||
5152 | +/* Internal LDO */ | ||
5153 | +#define TPS65910_VRTC 12 | ||
5154 | + | ||
5155 | +/* Number of step-down/up converters available */ | ||
5156 | +#define TPS65910_NUM_DCDC 4 | ||
5157 | + | ||
5158 | +/* Number of LDO voltage regulators available */ | ||
5159 | +#define TPS65910_NUM_LDO 9 | ||
5160 | + | ||
5161 | +/* Number of total regulators available */ | ||
5162 | +#define TPS65910_NUM_REGULATOR (TPS65910_NUM_DCDC + TPS65910_NUM_LDO) | ||
5163 | + | ||
5164 | + | ||
5165 | +/* Regulator Supply state */ | ||
5166 | +#define SUPPLY_STATE_FLAG 0x03 | ||
5167 | +/* OFF States */ | ||
5168 | +#define TPS65910_REG_OFF_00 0x00 | ||
5169 | +#define TPS65910_REG_OFF_10 0x02 | ||
5170 | +/* OHP - on High Power */ | ||
5171 | +#define TPS65910_REG_OHP 0x01 | ||
5172 | +/* OLP - on Low Power */ | ||
5173 | +#define TPS65910_REG_OLP 0x03 | ||
5174 | + | ||
5175 | +#define TPS65910_MAX_IRQS 10 | ||
5176 | +#define TPS65910_VMBDCH_IRQ 0 | ||
5177 | +#define TPS65910_VMBHI_IRQ 1 | ||
5178 | +#define TPS65910_PWRON_IRQ 2 | ||
5179 | +#define TPS65910_PWRON_LP_IRQ 3 | ||
5180 | +#define TPS65910_PWRHOLD_IRQ 4 | ||
5181 | +#define TPS65910_HOTDIE_IRQ 5 | ||
5182 | +#define TPS65910_RTC_ALARM_IRQ 6 | ||
5183 | +#define TPS65910_RTC_PERIOD_IRQ 7 | ||
5184 | +#define TPS65910_GPIO0_R_IRQ 8 | ||
5185 | +#define TPS65910_GPIO0_F_IRQ 9 | ||
5186 | + | ||
5187 | +/* TPS65910 has 1 GPIO */ | ||
5188 | +struct tps65910_gpio { | ||
5189 | + u8 debounce; | ||
5190 | + u8 pullup_pulldown; | ||
5191 | + u8 gpio_config; /* Input or output */ | ||
5192 | + u8 gpio_val; /* Output value */ | ||
5193 | + int (*gpio_setup)(struct tps65910_gpio *pdata); | ||
5194 | + int (*gpio_taredown)(struct tps65910_gpio *pdata); | ||
5195 | +}; | ||
5196 | + | ||
5197 | +struct tps65910_platform_data { | ||
5198 | + | ||
5199 | + unsigned irq_num; /* TPS65910 to Host IRQ Number */ | ||
5200 | + struct tps65910_gpio *gpio; | ||
5201 | + | ||
5202 | + /* plaform specific data to be initialised in board file */ | ||
5203 | + struct regulator_init_data *vio; | ||
5204 | + struct regulator_init_data *vdd1; | ||
5205 | + struct regulator_init_data *vdd2; | ||
5206 | + struct regulator_init_data *vdd3; | ||
5207 | + struct regulator_init_data *vdig1; | ||
5208 | + struct regulator_init_data *vdig2; | ||
5209 | + struct regulator_init_data *vaux33; | ||
5210 | + struct regulator_init_data *vmmc; | ||
5211 | + struct regulator_init_data *vaux1; | ||
5212 | + struct regulator_init_data *vaux2; | ||
5213 | + struct regulator_init_data *vdac; | ||
5214 | + struct regulator_init_data *vpll; | ||
5215 | + | ||
5216 | + void (*handlers[TPS65910_MAX_IRQS]) (void *data); | ||
5217 | + /* Configure TP65910 to board specific usage*/ | ||
5218 | + int (*board_tps65910_config)(struct tps65910_platform_data *pdata); | ||
5219 | +}; | ||
5220 | + | ||
5221 | +int tps65910_enable_bbch(u8 voltage); | ||
5222 | +int tps65910_disable_bbch(void); | ||
5223 | + | ||
5224 | +int tps65910_remove_irq_work(int irq); | ||
5225 | +int tps65910_add_irq_work(int irq, void (*handler)(void *data)); | ||
5226 | + | ||
5227 | +int tps65910_i2c_write_u8(u8 slave_addr, u8 val, u8 reg); | ||
5228 | +int tps65910_i2c_read_u8(u8 slave_addr, u8 *val, u8 reg); | ||
5229 | + | ||
5230 | +int tps65910_i2c_write(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes); | ||
5231 | +int tps65910_i2c_read(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes); | ||
5232 | + | ||
5233 | +#endif /* __LINUX_I2C_TPS65910_H */ | ||
5234 | + | ||
5235 | -- | ||
5236 | 1.7.0.4 | ||
5237 | |||