diff options
Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch')
-rw-r--r-- | extras/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch | 482 |
1 files changed, 482 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch b/extras/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch new file mode 100644 index 00000000..78381e9e --- /dev/null +++ b/extras/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch | |||
@@ -0,0 +1,482 @@ | |||
1 | From 3a66cefdf60033381c623b0425345c41e8c078fe Mon Sep 17 00:00:00 2001 | ||
2 | From: Steve Sakoman <steve@sakoman.com> | ||
3 | Date: Fri, 19 Nov 2010 15:11:19 -0800 | ||
4 | Subject: [PATCH 11/32] Revert "omap_hsmmc: improve interrupt synchronisation" | ||
5 | |||
6 | This reverts commit b417577d3b9bbb06a4ddc9aa955af9bd503f7242. | ||
7 | |||
8 | Conflicts: | ||
9 | |||
10 | drivers/mmc/host/omap_hsmmc.c | ||
11 | --- | ||
12 | drivers/mmc/host/omap_hsmmc.c | 267 ++++++++++++++++++++--------------------- | ||
13 | 1 files changed, 128 insertions(+), 139 deletions(-) | ||
14 | |||
15 | diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c | ||
16 | index 259ece0..15a023b 100644 | ||
17 | --- a/drivers/mmc/host/omap_hsmmc.c | ||
18 | +++ b/drivers/mmc/host/omap_hsmmc.c | ||
19 | @@ -159,10 +159,12 @@ struct omap_hsmmc_host { | ||
20 | */ | ||
21 | struct regulator *vcc; | ||
22 | struct regulator *vcc_aux; | ||
23 | + struct semaphore sem; | ||
24 | struct work_struct mmc_carddetect_work; | ||
25 | void __iomem *base; | ||
26 | resource_size_t mapbase; | ||
27 | spinlock_t irq_lock; /* Prevent races with irq handler */ | ||
28 | + unsigned long flags; | ||
29 | unsigned int id; | ||
30 | unsigned int dma_len; | ||
31 | unsigned int dma_sg_idx; | ||
32 | @@ -183,7 +185,6 @@ struct omap_hsmmc_host { | ||
33 | int protect_card; | ||
34 | int reqs_blocked; | ||
35 | int use_reg; | ||
36 | - int req_in_progress; | ||
37 | |||
38 | struct omap_mmc_platform_data *pdata; | ||
39 | }; | ||
40 | @@ -556,32 +557,6 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) | ||
41 | dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); | ||
42 | } | ||
43 | |||
44 | -static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, | ||
45 | - struct mmc_command *cmd) | ||
46 | -{ | ||
47 | - unsigned int irq_mask; | ||
48 | - | ||
49 | - if (host->use_dma) | ||
50 | - irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); | ||
51 | - else | ||
52 | - irq_mask = INT_EN_MASK; | ||
53 | - | ||
54 | - /* Disable timeout for erases */ | ||
55 | - if (cmd->opcode == MMC_ERASE) | ||
56 | - irq_mask &= ~DTO_ENABLE; | ||
57 | - | ||
58 | - OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); | ||
59 | - OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); | ||
60 | - OMAP_HSMMC_WRITE(host->base, IE, irq_mask); | ||
61 | -} | ||
62 | - | ||
63 | -static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) | ||
64 | -{ | ||
65 | - OMAP_HSMMC_WRITE(host->base, ISE, 0); | ||
66 | - OMAP_HSMMC_WRITE(host->base, IE, 0); | ||
67 | - OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); | ||
68 | -} | ||
69 | - | ||
70 | #ifdef CONFIG_PM | ||
71 | |||
72 | /* | ||
73 | @@ -650,7 +625,9 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) | ||
74 | && time_before(jiffies, timeout)) | ||
75 | ; | ||
76 | |||
77 | - omap_hsmmc_disable_irq(host); | ||
78 | + OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); | ||
79 | + OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); | ||
80 | + OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
81 | |||
82 | /* Do not initialize card-specific things if the power is off */ | ||
83 | if (host->power_mode == MMC_POWER_OFF) | ||
84 | @@ -753,8 +730,6 @@ static void send_init_stream(struct omap_hsmmc_host *host) | ||
85 | return; | ||
86 | |||
87 | disable_irq(host->irq); | ||
88 | - | ||
89 | - OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
90 | OMAP_HSMMC_WRITE(host->base, CON, | ||
91 | OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); | ||
92 | OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); | ||
93 | @@ -820,7 +795,17 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, | ||
94 | mmc_hostname(host->mmc), cmd->opcode, cmd->arg); | ||
95 | host->cmd = cmd; | ||
96 | |||
97 | - omap_hsmmc_enable_irq(host, cmd); | ||
98 | + /* | ||
99 | + * Clear status bits and enable interrupts | ||
100 | + */ | ||
101 | + OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); | ||
102 | + OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); | ||
103 | + | ||
104 | + if (host->use_dma) | ||
105 | + OMAP_HSMMC_WRITE(host->base, IE, | ||
106 | + INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); | ||
107 | + else | ||
108 | + OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
109 | |||
110 | host->response_busy = 0; | ||
111 | if (cmd->flags & MMC_RSP_PRESENT) { | ||
112 | @@ -854,7 +839,13 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, | ||
113 | if (host->use_dma) | ||
114 | cmdreg |= DMA_EN; | ||
115 | |||
116 | - host->req_in_progress = 1; | ||
117 | + /* | ||
118 | + * In an interrupt context (i.e. STOP command), the spinlock is unlocked | ||
119 | + * by the interrupt handler, otherwise (i.e. for a new request) it is | ||
120 | + * unlocked here. | ||
121 | + */ | ||
122 | + if (!in_interrupt()) | ||
123 | + spin_unlock_irqrestore(&host->irq_lock, host->flags); | ||
124 | |||
125 | OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); | ||
126 | OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); | ||
127 | @@ -869,23 +860,6 @@ omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) | ||
128 | return DMA_FROM_DEVICE; | ||
129 | } | ||
130 | |||
131 | -static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) | ||
132 | -{ | ||
133 | - int dma_ch; | ||
134 | - | ||
135 | - spin_lock(&host->irq_lock); | ||
136 | - host->req_in_progress = 0; | ||
137 | - dma_ch = host->dma_ch; | ||
138 | - spin_unlock(&host->irq_lock); | ||
139 | - | ||
140 | - omap_hsmmc_disable_irq(host); | ||
141 | - /* Do not complete the request if DMA is still in progress */ | ||
142 | - if (mrq->data && host->use_dma && dma_ch != -1) | ||
143 | - return; | ||
144 | - host->mrq = NULL; | ||
145 | - mmc_request_done(host->mmc, mrq); | ||
146 | -} | ||
147 | - | ||
148 | /* | ||
149 | * Notify the transfer complete to MMC core | ||
150 | */ | ||
151 | @@ -902,19 +876,25 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) | ||
152 | return; | ||
153 | } | ||
154 | |||
155 | - omap_hsmmc_request_done(host, mrq); | ||
156 | + host->mrq = NULL; | ||
157 | + mmc_request_done(host->mmc, mrq); | ||
158 | return; | ||
159 | } | ||
160 | |||
161 | host->data = NULL; | ||
162 | |||
163 | + if (host->use_dma && host->dma_ch != -1) | ||
164 | + dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, | ||
165 | + omap_hsmmc_get_dma_dir(host, data)); | ||
166 | + | ||
167 | if (!data->error) | ||
168 | data->bytes_xfered += data->blocks * (data->blksz); | ||
169 | else | ||
170 | data->bytes_xfered = 0; | ||
171 | |||
172 | if (!data->stop) { | ||
173 | - omap_hsmmc_request_done(host, data->mrq); | ||
174 | + host->mrq = NULL; | ||
175 | + mmc_request_done(host->mmc, data->mrq); | ||
176 | return; | ||
177 | } | ||
178 | omap_hsmmc_start_command(host, data->stop, NULL); | ||
179 | @@ -940,8 +920,10 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) | ||
180 | cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); | ||
181 | } | ||
182 | } | ||
183 | - if ((host->data == NULL && !host->response_busy) || cmd->error) | ||
184 | - omap_hsmmc_request_done(host, cmd->mrq); | ||
185 | + if ((host->data == NULL && !host->response_busy) || cmd->error) { | ||
186 | + host->mrq = NULL; | ||
187 | + mmc_request_done(host->mmc, cmd->mrq); | ||
188 | + } | ||
189 | } | ||
190 | |||
191 | /* | ||
192 | @@ -949,19 +931,14 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) | ||
193 | */ | ||
194 | static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) | ||
195 | { | ||
196 | - int dma_ch; | ||
197 | - | ||
198 | host->data->error = errno; | ||
199 | |||
200 | - spin_lock(&host->irq_lock); | ||
201 | - dma_ch = host->dma_ch; | ||
202 | - host->dma_ch = -1; | ||
203 | - spin_unlock(&host->irq_lock); | ||
204 | - | ||
205 | - if (host->use_dma && dma_ch != -1) { | ||
206 | + if (host->use_dma && host->dma_ch != -1) { | ||
207 | dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, | ||
208 | omap_hsmmc_get_dma_dir(host, host->data)); | ||
209 | - omap_free_dma(dma_ch); | ||
210 | + omap_free_dma(host->dma_ch); | ||
211 | + host->dma_ch = -1; | ||
212 | + up(&host->sem); | ||
213 | } | ||
214 | host->data = NULL; | ||
215 | } | ||
216 | @@ -1034,21 +1011,28 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, | ||
217 | __func__); | ||
218 | } | ||
219 | |||
220 | -static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | ||
221 | +/* | ||
222 | + * MMC controller IRQ handler | ||
223 | + */ | ||
224 | +static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) | ||
225 | { | ||
226 | + struct omap_hsmmc_host *host = dev_id; | ||
227 | struct mmc_data *data; | ||
228 | - int end_cmd = 0, end_trans = 0; | ||
229 | - | ||
230 | - if (!host->req_in_progress) { | ||
231 | - do { | ||
232 | - OMAP_HSMMC_WRITE(host->base, STAT, status); | ||
233 | - /* Flush posted write */ | ||
234 | - status = OMAP_HSMMC_READ(host->base, STAT); | ||
235 | - } while (status & INT_EN_MASK); | ||
236 | - return; | ||
237 | + int end_cmd = 0, end_trans = 0, status; | ||
238 | + | ||
239 | + spin_lock(&host->irq_lock); | ||
240 | + | ||
241 | + if (host->mrq == NULL) { | ||
242 | + OMAP_HSMMC_WRITE(host->base, STAT, | ||
243 | + OMAP_HSMMC_READ(host->base, STAT)); | ||
244 | + /* Flush posted write */ | ||
245 | + OMAP_HSMMC_READ(host->base, STAT); | ||
246 | + spin_unlock(&host->irq_lock); | ||
247 | + return IRQ_HANDLED; | ||
248 | } | ||
249 | |||
250 | data = host->data; | ||
251 | + status = OMAP_HSMMC_READ(host->base, STAT); | ||
252 | dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); | ||
253 | |||
254 | if (status & ERR) { | ||
255 | @@ -1101,27 +1085,15 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | ||
256 | } | ||
257 | |||
258 | OMAP_HSMMC_WRITE(host->base, STAT, status); | ||
259 | + /* Flush posted write */ | ||
260 | + OMAP_HSMMC_READ(host->base, STAT); | ||
261 | |||
262 | if (end_cmd || ((status & CC) && host->cmd)) | ||
263 | omap_hsmmc_cmd_done(host, host->cmd); | ||
264 | if ((end_trans || (status & TC)) && host->mrq) | ||
265 | omap_hsmmc_xfer_done(host, data); | ||
266 | -} | ||
267 | - | ||
268 | -/* | ||
269 | - * MMC controller IRQ handler | ||
270 | - */ | ||
271 | -static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) | ||
272 | -{ | ||
273 | - struct omap_hsmmc_host *host = dev_id; | ||
274 | - int status; | ||
275 | |||
276 | - status = OMAP_HSMMC_READ(host->base, STAT); | ||
277 | - do { | ||
278 | - omap_hsmmc_do_irq(host, status); | ||
279 | - /* Flush posted write */ | ||
280 | - status = OMAP_HSMMC_READ(host->base, STAT); | ||
281 | - } while (status & INT_EN_MASK); | ||
282 | + spin_unlock(&host->irq_lock); | ||
283 | |||
284 | return IRQ_HANDLED; | ||
285 | } | ||
286 | @@ -1316,11 +1288,9 @@ static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, | ||
287 | /* | ||
288 | * DMA call back function | ||
289 | */ | ||
290 | -static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) | ||
291 | +static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *data) | ||
292 | { | ||
293 | - struct omap_hsmmc_host *host = cb_data; | ||
294 | - struct mmc_data *data = host->mrq->data; | ||
295 | - int dma_ch, req_in_progress; | ||
296 | + struct omap_hsmmc_host *host = data; | ||
297 | |||
298 | if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { | ||
299 | dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", | ||
300 | @@ -1328,38 +1298,24 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) | ||
301 | return; | ||
302 | } | ||
303 | |||
304 | - spin_lock(&host->irq_lock); | ||
305 | - if (host->dma_ch < 0) { | ||
306 | - spin_unlock(&host->irq_lock); | ||
307 | + if (host->dma_ch < 0) | ||
308 | return; | ||
309 | - } | ||
310 | |||
311 | host->dma_sg_idx++; | ||
312 | if (host->dma_sg_idx < host->dma_len) { | ||
313 | /* Fire up the next transfer. */ | ||
314 | - omap_hsmmc_config_dma_params(host, data, | ||
315 | - data->sg + host->dma_sg_idx); | ||
316 | - spin_unlock(&host->irq_lock); | ||
317 | + omap_hsmmc_config_dma_params(host, host->data, | ||
318 | + host->data->sg + host->dma_sg_idx); | ||
319 | return; | ||
320 | } | ||
321 | |||
322 | - dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, | ||
323 | - omap_hsmmc_get_dma_dir(host, data)); | ||
324 | - | ||
325 | - req_in_progress = host->req_in_progress; | ||
326 | - dma_ch = host->dma_ch; | ||
327 | + omap_free_dma(host->dma_ch); | ||
328 | host->dma_ch = -1; | ||
329 | - spin_unlock(&host->irq_lock); | ||
330 | - | ||
331 | - omap_free_dma(dma_ch); | ||
332 | - | ||
333 | - /* If DMA has finished after TC, complete the request */ | ||
334 | - if (!req_in_progress) { | ||
335 | - struct mmc_request *mrq = host->mrq; | ||
336 | - | ||
337 | - host->mrq = NULL; | ||
338 | - mmc_request_done(host->mmc, mrq); | ||
339 | - } | ||
340 | + /* | ||
341 | + * DMA Callback: run in interrupt context. | ||
342 | + * mutex_unlock will throw a kernel warning if used. | ||
343 | + */ | ||
344 | + up(&host->sem); | ||
345 | } | ||
346 | |||
347 | /* | ||
348 | @@ -1368,7 +1324,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) | ||
349 | static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | ||
350 | struct mmc_request *req) | ||
351 | { | ||
352 | - int dma_ch = 0, ret = 0, i; | ||
353 | + int dma_ch = 0, ret = 0, err = 1, i; | ||
354 | struct mmc_data *data = req->data; | ||
355 | |||
356 | /* Sanity check: all the SG entries must be aligned by block size. */ | ||
357 | @@ -1385,7 +1341,23 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | ||
358 | */ | ||
359 | return -EINVAL; | ||
360 | |||
361 | - BUG_ON(host->dma_ch != -1); | ||
362 | + /* | ||
363 | + * If for some reason the DMA transfer is still active, | ||
364 | + * we wait for timeout period and free the dma | ||
365 | + */ | ||
366 | + if (host->dma_ch != -1) { | ||
367 | + set_current_state(TASK_UNINTERRUPTIBLE); | ||
368 | + schedule_timeout(100); | ||
369 | + if (down_trylock(&host->sem)) { | ||
370 | + omap_free_dma(host->dma_ch); | ||
371 | + host->dma_ch = -1; | ||
372 | + up(&host->sem); | ||
373 | + return err; | ||
374 | + } | ||
375 | + } else { | ||
376 | + if (down_trylock(&host->sem)) | ||
377 | + return err; | ||
378 | + } | ||
379 | |||
380 | ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), | ||
381 | "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); | ||
382 | @@ -1485,27 +1457,37 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | ||
383 | struct omap_hsmmc_host *host = mmc_priv(mmc); | ||
384 | int err; | ||
385 | |||
386 | - BUG_ON(host->req_in_progress); | ||
387 | - BUG_ON(host->dma_ch != -1); | ||
388 | - if (host->protect_card) { | ||
389 | - if (host->reqs_blocked < 3) { | ||
390 | - /* | ||
391 | - * Ensure the controller is left in a consistent | ||
392 | - * state by resetting the command and data state | ||
393 | - * machines. | ||
394 | - */ | ||
395 | - omap_hsmmc_reset_controller_fsm(host, SRD); | ||
396 | - omap_hsmmc_reset_controller_fsm(host, SRC); | ||
397 | - host->reqs_blocked += 1; | ||
398 | - } | ||
399 | - req->cmd->error = -EBADF; | ||
400 | - if (req->data) | ||
401 | - req->data->error = -EBADF; | ||
402 | - req->cmd->retries = 0; | ||
403 | - mmc_request_done(mmc, req); | ||
404 | - return; | ||
405 | - } else if (host->reqs_blocked) | ||
406 | - host->reqs_blocked = 0; | ||
407 | + /* | ||
408 | + * Prevent races with the interrupt handler because of unexpected | ||
409 | + * interrupts, but not if we are already in interrupt context i.e. | ||
410 | + * retries. | ||
411 | + */ | ||
412 | + if (!in_interrupt()) { | ||
413 | + spin_lock_irqsave(&host->irq_lock, host->flags); | ||
414 | + /* | ||
415 | + * Protect the card from I/O if there is a possibility | ||
416 | + * it can be removed. | ||
417 | + */ | ||
418 | + if (host->protect_card) { | ||
419 | + if (host->reqs_blocked < 3) { | ||
420 | + /* | ||
421 | + * Ensure the controller is left in a consistent | ||
422 | + * state by resetting the command and data state | ||
423 | + * machines. | ||
424 | + */ | ||
425 | + omap_hsmmc_reset_controller_fsm(host, SRD); | ||
426 | + omap_hsmmc_reset_controller_fsm(host, SRC); | ||
427 | + host->reqs_blocked += 1; | ||
428 | + } | ||
429 | + req->cmd->error = -EBADF; | ||
430 | + if (req->data) | ||
431 | + req->data->error = -EBADF; | ||
432 | + spin_unlock_irqrestore(&host->irq_lock, host->flags); | ||
433 | + mmc_request_done(mmc, req); | ||
434 | + return; | ||
435 | + } else if (host->reqs_blocked) | ||
436 | + host->reqs_blocked = 0; | ||
437 | + } | ||
438 | WARN_ON(host->mrq != NULL); | ||
439 | host->mrq = req; | ||
440 | err = omap_hsmmc_prepare_data(host, req); | ||
441 | @@ -1514,6 +1496,8 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | ||
442 | if (req->data) | ||
443 | req->data->error = err; | ||
444 | host->mrq = NULL; | ||
445 | + if (!in_interrupt()) | ||
446 | + spin_unlock_irqrestore(&host->irq_lock, host->flags); | ||
447 | mmc_request_done(mmc, req); | ||
448 | return; | ||
449 | } | ||
450 | @@ -2093,6 +2077,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) | ||
451 | mmc->f_min = 400000; | ||
452 | mmc->f_max = 52000000; | ||
453 | |||
454 | + sema_init(&host->sem, 1); | ||
455 | spin_lock_init(&host->irq_lock); | ||
456 | |||
457 | host->iclk = clk_get(&pdev->dev, "ick"); | ||
458 | @@ -2235,7 +2220,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) | ||
459 | pdata->resume = omap_hsmmc_resume_cdirq; | ||
460 | } | ||
461 | |||
462 | - omap_hsmmc_disable_irq(host); | ||
463 | + OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); | ||
464 | + OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
465 | |||
466 | mmc_host_lazy_disable(host->mmc); | ||
467 | |||
468 | @@ -2356,7 +2342,10 @@ static int omap_hsmmc_suspend(struct device *dev) | ||
469 | ret = mmc_suspend_host(host->mmc); | ||
470 | mmc_host_enable(host->mmc); | ||
471 | if (ret == 0) { | ||
472 | - omap_hsmmc_disable_irq(host); | ||
473 | + OMAP_HSMMC_WRITE(host->base, ISE, 0); | ||
474 | + OMAP_HSMMC_WRITE(host->base, IE, 0); | ||
475 | + | ||
476 | + | ||
477 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
478 | OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); | ||
479 | mmc_host_disable(host->mmc); | ||
480 | -- | ||
481 | 1.6.6.1 | ||
482 | |||