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-rw-r--r--meta-ti-bsp/recipes-bsp/u-boot/u-boot-ti-staging_2023.04.bb2
-rw-r--r--meta-ti-bsp/recipes-kernel/linux/linux-ti-staging-rt_6.1.bb2
-rw-r--r--meta-ti-bsp/recipes-kernel/linux/linux-ti-staging_6.1.bb2
3 files changed, 3 insertions, 3 deletions
diff --git a/meta-ti-bsp/recipes-bsp/u-boot/u-boot-ti-staging_2023.04.bb b/meta-ti-bsp/recipes-bsp/u-boot/u-boot-ti-staging_2023.04.bb
index e95c9c76..00617ea5 100644
--- a/meta-ti-bsp/recipes-bsp/u-boot/u-boot-ti-staging_2023.04.bb
+++ b/meta-ti-bsp/recipes-bsp/u-boot/u-boot-ti-staging_2023.04.bb
@@ -6,4 +6,4 @@ PR = "r0"
6 6
7BRANCH = "ti-u-boot-2023.04" 7BRANCH = "ti-u-boot-2023.04"
8 8
9SRCREV = "a97ca328b3df6abf79c5cc01878290e03131bbba" 9SRCREV = "8e29cc8dec2dda343e4751d917e14a2962d081d5"
diff --git a/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging-rt_6.1.bb b/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging-rt_6.1.bb
index a0534cad..13d8b035 100644
--- a/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging-rt_6.1.bb
+++ b/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging-rt_6.1.bb
@@ -6,7 +6,7 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}-6.1:"
6 6
7BRANCH = "ti-rt-linux-6.1.y" 7BRANCH = "ti-rt-linux-6.1.y"
8 8
9SRCREV = "95b5a09669edc6d3a5216ab8155a621ac28dd6ca" 9SRCREV = "a3301d5cd75f78159753d3c59d2e70ee78e74e58"
10 10
11include ${@ 'recipes-kernel/linux/ti-extras-rt.inc' if d.getVar('TI_EXTRAS') else ''} 11include ${@ 'recipes-kernel/linux/ti-extras-rt.inc' if d.getVar('TI_EXTRAS') else ''}
12 12
diff --git a/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging_6.1.bb b/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging_6.1.bb
index 1290d987..e2ccfc0b 100644
--- a/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging_6.1.bb
+++ b/meta-ti-bsp/recipes-kernel/linux/linux-ti-staging_6.1.bb
@@ -23,7 +23,7 @@ S = "${WORKDIR}/git"
23 23
24BRANCH ?= "ti-linux-6.1.y" 24BRANCH ?= "ti-linux-6.1.y"
25 25
26SRCREV ?= "edc768299f200ad01fcb51d9fc68f329fa62936f" 26SRCREV ?= "78d2216bc679e98b7edb07ffabddb6d0337b5fcb"
27PV = "6.1.69+git${SRCPV}" 27PV = "6.1.69+git${SRCPV}"
28 28
29# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild 29# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild