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authorDenys Dmytriyenko <denys@ti.com>2015-08-24 23:50:12 +0000
committerDenys Dmytriyenko <denys@ti.com>2015-08-24 14:32:30 -0400
commit49903e58ad0ce3db550ffbefbe4cb321500c7797 (patch)
tree89a9e35f2b092704d5a28b3f1613c6427e3b2e4f /recipes-kernel
parent7bb1f36fad2170104db0266f9ffd342dd4b16610 (diff)
downloadmeta-ti-49903e58ad0ce3db550ffbefbe4cb321500c7797.tar.gz
linux-ti-staging: bump rev, add interim GFX patches for J6/AM5
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
Diffstat (limited to 'recipes-kernel')
-rw-r--r--recipes-kernel/linux/linux-ti-staging-4.1/0001-DT-gpu-add-binding-for-TI-SGX-driver.patch49
-rw-r--r--recipes-kernel/linux/linux-ti-staging-4.1/0002-ARM-dts-DRA7xx-add-gpu-interface-clock.patch34
-rw-r--r--recipes-kernel/linux/linux-ti-staging-4.1/0003-ARM-dts-DRA7xx-add-device-tree-entry-for-SGX.patch35
-rw-r--r--recipes-kernel/linux/linux-ti-staging-4.1/0004-arm-dra7xx-Add-gpu-hwmod-data.patch115
-rw-r--r--recipes-kernel/linux/linux-ti-staging-4.1/0005-drm-omap-Add-omapdrm-plugin-API.patch585
-rw-r--r--recipes-kernel/linux/linux-ti-staging_4.1.bb12
6 files changed, 828 insertions, 2 deletions
diff --git a/recipes-kernel/linux/linux-ti-staging-4.1/0001-DT-gpu-add-binding-for-TI-SGX-driver.patch b/recipes-kernel/linux/linux-ti-staging-4.1/0001-DT-gpu-add-binding-for-TI-SGX-driver.patch
new file mode 100644
index 00000000..d4ad9852
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti-staging-4.1/0001-DT-gpu-add-binding-for-TI-SGX-driver.patch
@@ -0,0 +1,49 @@
1From cab4b45daa65a79d24a4ae1345e2591986c7c73e Mon Sep 17 00:00:00 2001
2From: Anand Balagopalakrishnan <anandb@ti.com>
3Date: Sat, 15 Aug 2015 22:37:38 +0000
4Subject: [PATCH 1/5] DT: gpu: add binding for TI SGX driver
5
6This patch adds the devicetree binding for TI SGX device driver.
7
8Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
9---
10 Documentation/devicetree/bindings/gpu/ti-sgx.txt | 27 ++++++++++++++++++++++++
11 1 file changed, 27 insertions(+)
12 create mode 100644 Documentation/devicetree/bindings/gpu/ti-sgx.txt
13
14diff --git a/Documentation/devicetree/bindings/gpu/ti-sgx.txt b/Documentation/devicetree/bindings/gpu/ti-sgx.txt
15new file mode 100644
16index 0000000..a13e105
17--- /dev/null
18+++ b/Documentation/devicetree/bindings/gpu/ti-sgx.txt
19@@ -0,0 +1,27 @@
20+TI SGX 3D Graphics Accelerator
21+
22+Required properties:
23+ - compatible : value should take the following format:
24+ "ti,<soc>-<gpuversion>", "img,<gpuversion>"
25+
26+ accepted values:
27+ (a) "ti,dra7-sgx544", "img,sgx544" for TI DRA7xx / AM57x
28+ (b) "ti,am4-sgx530", "img,sgx530" for TI AM43x
29+ (c) "ti,am3-sgx530", "img,sgx530" for TI AM33x
30+ - reg: base address and length of the SGX registers
31+ - interrupts : SGX interrupt number
32+
33+Recommended properties:
34+ - ti,hwmods: Name of the hwmod associated with the SGX
35+ - clocks : from SoC clock binding
36+ - clock-names : names of clocks listed in clocks property in the same order
37+
38+Example:
39+ sgx@0x56000000 {
40+ compatible = "ti,dra7-sgx544", "img,sgx544";
41+ reg = <0x56000000 0x100000>;
42+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
43+ ti,hwmods = "gpu";
44+ clocks = <&gpu_l3_iclk>, <&gpu_core_gclk_mux>, <&gpu_hyd_gclk_mux>;
45+ clock-names = "sys", "core", "hyd";
46+ };
47--
482.2.0
49
diff --git a/recipes-kernel/linux/linux-ti-staging-4.1/0002-ARM-dts-DRA7xx-add-gpu-interface-clock.patch b/recipes-kernel/linux/linux-ti-staging-4.1/0002-ARM-dts-DRA7xx-add-gpu-interface-clock.patch
new file mode 100644
index 00000000..c4282cb1
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti-staging-4.1/0002-ARM-dts-DRA7xx-add-gpu-interface-clock.patch
@@ -0,0 +1,34 @@
1From f50b88d4be286d744361f7dadff0e6ae8ba107ff Mon Sep 17 00:00:00 2001
2From: Anand Balagopalakrishnan <anandb@ti.com>
3Date: Sat, 15 Aug 2015 22:37:39 +0000
4Subject: [PATCH 2/5] ARM: dts: DRA7xx: add gpu interface clock
5
6Addition of SGX interface sys clock to DRA7xx device tree.
7
8Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
9---
10 arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++
11 1 file changed, 8 insertions(+)
12
13diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
14index bd11c46..c734f75 100644
15--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
16+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
17@@ -753,6 +753,14 @@
18 ti,index-power-of-two;
19 };
20
21+ gpu_l3_iclk: gpu_l3_iclk {
22+ #clock-cells = <0>;
23+ compatible = "fixed-factor-clock";
24+ clocks = <&l3_iclk_div>;
25+ clock-mult = <1>;
26+ clock-div = <1>;
27+ };
28+
29 l4_root_clk_div: l4_root_clk_div {
30 #clock-cells = <0>;
31 compatible = "fixed-factor-clock";
32--
332.2.0
34
diff --git a/recipes-kernel/linux/linux-ti-staging-4.1/0003-ARM-dts-DRA7xx-add-device-tree-entry-for-SGX.patch b/recipes-kernel/linux/linux-ti-staging-4.1/0003-ARM-dts-DRA7xx-add-device-tree-entry-for-SGX.patch
new file mode 100644
index 00000000..df4dbc3d
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti-staging-4.1/0003-ARM-dts-DRA7xx-add-device-tree-entry-for-SGX.patch
@@ -0,0 +1,35 @@
1From e3ac183fe81a9bbd43a0f889253054d9311d5431 Mon Sep 17 00:00:00 2001
2From: Anand Balagopalakrishnan <anandb@ti.com>
3Date: Sat, 15 Aug 2015 22:37:40 +0000
4Subject: [PATCH 3/5] ARM: dts: DRA7xx: add device tree entry for SGX
5
6Addition of SGX to DRA7xx DTS to enable graphics support.
7
8Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
9---
10 arch/arm/boot/dts/dra7.dtsi | 9 +++++++++
11 1 file changed, 9 insertions(+)
12
13diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
14index e599b29..dd974f9 100644
15--- a/arch/arm/boot/dts/dra7.dtsi
16+++ b/arch/arm/boot/dts/dra7.dtsi
17@@ -889,6 +889,15 @@
18 status = "disabled";
19 };
20
21+ sgx: sgx@0x56000000 {
22+ compatible = "ti,omap5-sgx544", "img,sgx544";
23+ reg = <0x56000000 0x100000>;
24+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
25+ ti,hwmods = "gpu";
26+ clocks = <&gpu_l3_iclk>, <&gpu_core_gclk_mux>, <&gpu_hyd_gclk_mux>;
27+ clock-names = "sys", "core", "hyd";
28+ };
29+
30 i2c1: i2c@48070000 {
31 compatible = "ti,omap4-i2c";
32 reg = <0x48070000 0x100>;
33--
342.2.0
35
diff --git a/recipes-kernel/linux/linux-ti-staging-4.1/0004-arm-dra7xx-Add-gpu-hwmod-data.patch b/recipes-kernel/linux/linux-ti-staging-4.1/0004-arm-dra7xx-Add-gpu-hwmod-data.patch
new file mode 100644
index 00000000..99b34733
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti-staging-4.1/0004-arm-dra7xx-Add-gpu-hwmod-data.patch
@@ -0,0 +1,115 @@
1From 738de270894a7a2296c612ced981634df641f093 Mon Sep 17 00:00:00 2001
2From: Hemant Hariyani <hemanthariyani@ti.com>
3Date: Sat, 15 Aug 2015 22:37:41 +0000
4Subject: [PATCH 4/5] arm:dra7xx: Add gpu hwmod data
5
6GPU hwmod data for DRA7xx
7
8Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
9Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
10---
11 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 74 +++++++++++++++++++++++++++++++
12 1 file changed, 74 insertions(+)
13
14diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
15index 0641f03..e1cc927 100644
16--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
17+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
18@@ -1318,6 +1318,40 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
19 };
20
21 /*
22+ * 'gpu' class
23+ * 3d graphics accelerator
24+ */
25+
26+static struct omap_hwmod_class_sysconfig dra7xx_gpu_sysc = {
27+ .rev_offs = 0x0000,
28+ .sysc_offs = 0x0010,
29+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
30+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
31+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
32+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
33+ .sysc_fields = &omap_hwmod_sysc_type2,
34+};
35+
36+static struct omap_hwmod_class dra7xx_gpu_hwmod_class = {
37+ .name = "gpu",
38+ .sysc = &dra7xx_gpu_sysc,
39+};
40+
41+static struct omap_hwmod dra7xx_gpu_hwmod = {
42+ .name = "gpu",
43+ .class = &dra7xx_gpu_hwmod_class,
44+ .clkdm_name = "gpu_clkdm",
45+ .main_clk = "gpu_core_gclk_mux",
46+ .prcm = {
47+ .omap4 = {
48+ .clkctrl_offs = DRA7XX_CM_GPU_GPU_CLKCTRL_OFFSET,
49+ .context_offs = DRA7XX_RM_GPU_GPU_CONTEXT_OFFSET,
50+ .modulemode = MODULEMODE_SWCTRL,
51+ },
52+ },
53+};
54+
55+/*
56 * 'hdq1w' class
57 *
58 */
59@@ -3686,6 +3720,45 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
60 .user = OCP_USER_MPU | OCP_USER_SDMA,
61 };
62
63+static struct omap_hwmod_addr_space dra7xx_gpu_addrs[] = {
64+ {
65+ .name = "klio",
66+ .pa_start = 0x56000000,
67+ .pa_end = 0x56001fff,
68+ },
69+ {
70+ .name = "hydra2",
71+ .pa_start = 0x56004000,
72+ .pa_end = 0x56004fff,
73+ },
74+ {
75+ .name = "klio_0",
76+ .pa_start = 0x56008000,
77+ .pa_end = 0x56009fff,
78+ },
79+ {
80+ .name = "klio_1",
81+ .pa_start = 0x5600c000,
82+ .pa_end = 0x5600dfff,
83+ },
84+ {
85+ .name = "klio_hl",
86+ .pa_start = 0x5600fe00,
87+ .pa_end = 0x5600ffff,
88+ .flags = ADDR_TYPE_RT
89+ },
90+ { }
91+};
92+
93+/* l3_main_1 -> gpu */
94+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpu = {
95+ .master = &dra7xx_l3_main_1_hwmod,
96+ .slave = &dra7xx_gpu_hwmod,
97+ .clk = "l3_iclk_div",
98+ .addr = dra7xx_gpu_addrs,
99+ .user = OCP_USER_MPU | OCP_USER_SDMA,
100+};
101+
102 static struct omap_hwmod_addr_space dra7xx_hdq1w_addrs[] = {
103 {
104 .pa_start = 0x480b2000,
105@@ -4461,6 +4534,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
106 &dra7xx_l4_per1__gpio7,
107 &dra7xx_l4_per1__gpio8,
108 &dra7xx_l3_main_1__gpmc,
109+ &dra7xx_l3_main_1__gpu,
110 &dra7xx_l4_per1__hdq1w,
111 &dra7xx_l4_per1__i2c1,
112 &dra7xx_l4_per1__i2c2,
113--
1142.2.0
115
diff --git a/recipes-kernel/linux/linux-ti-staging-4.1/0005-drm-omap-Add-omapdrm-plugin-API.patch b/recipes-kernel/linux/linux-ti-staging-4.1/0005-drm-omap-Add-omapdrm-plugin-API.patch
new file mode 100644
index 00000000..b458ecf5
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti-staging-4.1/0005-drm-omap-Add-omapdrm-plugin-API.patch
@@ -0,0 +1,585 @@
1From 7635957dc5dde6de6753fcadb1b4f6044f1d16fa Mon Sep 17 00:00:00 2001
2From: Rob Clark <rob@ti.com>
3Date: Sat, 15 Aug 2015 22:37:42 +0000
4Subject: [PATCH 5/5] drm/omap: Add omapdrm plugin API
5
6This patch enables SGX driver to be added as a plugin to omapdrm. Plugins can
7be loaded/unloaded at runtime. Currently, only SGX registers as a plugin.
8
9Main changes involved:
10
111. SGX specific GEM VM operations
12 SGX requires contiguous memory for both texture memory as well as
13 framebuffers. Memory allocation of FB is done through GEM and is
14 guaranteed to be contiguous.
15
16 Texture memory can be non-contiguous if:
17 a. user space allocates memory
18 b. memory is allocated by other cores
19 c. memory comes from CMA
20
21 We want to wrap such memory regions as GEM objects so that the graphics
22 pipeline remains consistent.
23
242. Support for ioctls from plugin driver
25 SGX driver registers as a plugin to the omapdrm driver. During
26 registration, SGX specific ioctls are added to omapdrm. This allows
27 user space to control specific SGX feature sets using the DRM FD.
28
293. Make GEM operations public
30 SGX driver needs to work directly on GEM objects for DSS
31 synchronization, getting Tiler address, etc.
32
33Signed-off-by: Rob Clark <rob@ti.com>
34Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
35Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
36Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
37---
38 drivers/gpu/drm/omapdrm/omap_drv.c | 125 +++++++++++++++++++++++++++++++++++--
39 drivers/gpu/drm/omapdrm/omap_drv.h | 60 ++++++++++++++++--
40 drivers/gpu/drm/omapdrm/omap_gem.c | 89 ++++++++++++++++++++++++++
41 include/uapi/drm/omap_drm.h | 10 +--
42 4 files changed, 269 insertions(+), 15 deletions(-)
43
44diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
45index ea537a5..1b0fb19 100644
46--- a/drivers/gpu/drm/omapdrm/omap_drv.c
47+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
48@@ -34,11 +34,20 @@
49 #define DRIVER_MINOR 0
50 #define DRIVER_PATCHLEVEL 0
51
52+struct drm_device *drm_device;
53+
54 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
55
56 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
57 module_param(num_crtc, int, 0600);
58
59+static struct omap_drm_plugin *sgx_plugin;
60+
61+/* keep track of whether we are already loaded.. we may need to call
62+ * plugin's load() if they register after we are already loaded
63+ */
64+static bool loaded = false;
65+
66 /*
67 * mode config funcs
68 */
69@@ -615,6 +624,19 @@ static int ioctl_set_param(struct drm_device *dev, void *data,
70 return 0;
71 }
72
73+static int ioctl_get_base(struct drm_device *dev, void *data,
74+ struct drm_file *file_priv)
75+{
76+ struct drm_omap_get_base *args = data;
77+
78+ if (!sgx_plugin)
79+ return -ENODEV;
80+
81+ args->ioctl_base = sgx_plugin->ioctl_base;
82+
83+ return 0;
84+}
85+
86 static int ioctl_gem_new(struct drm_device *dev, void *data,
87 struct drm_file *file_priv)
88 {
89@@ -693,9 +715,10 @@ static int ioctl_gem_info(struct drm_device *dev, void *data,
90 return ret;
91 }
92
93-static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
94+static struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
95 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
96 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
97+ DRM_IOCTL_DEF_DRV(OMAP_GET_BASE, ioctl_get_base, DRM_UNLOCKED|DRM_AUTH),
98 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
99 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
100 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
101@@ -725,6 +748,8 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
102
103 DBG("load: dev=%p", dev);
104
105+ drm_device = dev;
106+
107 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
108 if (!priv)
109 return -ENOMEM;
110@@ -770,6 +795,11 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
111
112 drm_kms_helper_poll_init(dev);
113
114+ loaded = true;
115+
116+ if (sgx_plugin)
117+ sgx_plugin->load(dev, flags);
118+
119 return 0;
120 }
121
122@@ -779,6 +809,9 @@ static int dev_unload(struct drm_device *dev)
123
124 DBG("unload: dev=%p", dev);
125
126+ if (sgx_plugin)
127+ sgx_plugin->unload(dev);
128+
129 drm_kms_helper_poll_fini(dev);
130
131 if (priv->fbdev)
132@@ -797,15 +830,18 @@ static int dev_unload(struct drm_device *dev)
133
134 dev_set_drvdata(dev->dev, NULL);
135
136+ loaded = false;
137+
138 return 0;
139 }
140
141 static int dev_open(struct drm_device *dev, struct drm_file *file)
142 {
143- file->driver_priv = NULL;
144-
145 DBG("open: dev=%p, file=%p", dev, file);
146
147+ if (sgx_plugin)
148+ sgx_plugin->open(dev, file);
149+
150 return 0;
151 }
152
153@@ -862,6 +898,9 @@ static void dev_preclose(struct drm_device *dev, struct drm_file *file)
154
155 DBG("preclose: dev=%p", dev);
156
157+ if (sgx_plugin)
158+ sgx_plugin->release(dev, file);
159+
160 /*
161 * Unlink all pending CRTC events to make sure they won't be queued up
162 * by a pending asynchronous commit.
163@@ -874,6 +913,8 @@ static void dev_preclose(struct drm_device *dev, struct drm_file *file)
164 }
165 }
166 spin_unlock_irqrestore(&dev->event_lock, flags);
167+
168+ kfree(file->driver_priv);
169 }
170
171 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
172@@ -883,8 +924,8 @@ static void dev_postclose(struct drm_device *dev, struct drm_file *file)
173
174 static const struct vm_operations_struct omap_gem_vm_ops = {
175 .fault = omap_gem_fault,
176- .open = drm_gem_vm_open,
177- .close = drm_gem_vm_close,
178+ .open = omap_gem_vm_open,
179+ .close = omap_gem_vm_close,
180 };
181
182 static const struct file_operations omapdriver_fops = {
183@@ -934,6 +975,80 @@ static struct drm_driver omap_drm_driver = {
184 .patchlevel = DRIVER_PATCHLEVEL,
185 };
186
187+int omap_drm_register_plugin(struct omap_drm_plugin *plugin)
188+{
189+ struct drm_device *dev = drm_device;
190+ int i;
191+
192+ DBG("register plugin: %p (%s)", plugin, plugin->name);
193+
194+ if (sgx_plugin)
195+ return -EBUSY;
196+
197+ for (i = 0; i < plugin->num_ioctls; i++) {
198+ int nr = i + DRM_OMAP_NUM_IOCTLS;
199+
200+ /* check for out of bounds ioctl or already registered ioctl */
201+ if (nr > ARRAY_SIZE(ioctls) || ioctls[nr].func) {
202+ dev_err(dev->dev, "invalid ioctl: %d (nr=%d)\n", i, nr);
203+ return -EINVAL;
204+ }
205+ }
206+
207+ plugin->ioctl_base = DRM_OMAP_NUM_IOCTLS;
208+
209+ /* register the plugin's ioctl's */
210+ for (i = 0; i < plugin->num_ioctls; i++) {
211+ int nr = i + DRM_OMAP_NUM_IOCTLS;
212+
213+ DBG("register ioctl: %d %08x", nr, plugin->ioctls[i].cmd);
214+
215+ ioctls[nr] = plugin->ioctls[i];
216+ }
217+
218+ omap_drm_driver.num_ioctls = DRM_OMAP_NUM_IOCTLS + plugin->num_ioctls;
219+
220+ sgx_plugin = plugin;
221+
222+ if (loaded)
223+ plugin->load(dev, 0);
224+
225+ return 0;
226+}
227+EXPORT_SYMBOL(omap_drm_register_plugin);
228+
229+int omap_drm_unregister_plugin(struct omap_drm_plugin *plugin)
230+{
231+ int i;
232+
233+ for (i = 0; i < plugin->num_ioctls; i++) {
234+ const struct drm_ioctl_desc empty = { 0 };
235+ int nr = i + DRM_OMAP_NUM_IOCTLS;
236+
237+ ioctls[nr] = empty;
238+ }
239+
240+ omap_drm_driver.num_ioctls = DRM_OMAP_NUM_IOCTLS;
241+
242+ sgx_plugin = NULL;
243+
244+ return 0;
245+}
246+EXPORT_SYMBOL(omap_drm_unregister_plugin);
247+
248+void *omap_drm_file_priv(struct drm_file *file)
249+{
250+ return file->driver_priv;
251+}
252+EXPORT_SYMBOL(omap_drm_file_priv);
253+
254+void omap_drm_file_set_priv(struct drm_file *file, void *priv)
255+{
256+ file->driver_priv = priv;
257+}
258+EXPORT_SYMBOL(omap_drm_file_set_priv);
259+
260+
261 static int pdev_probe(struct platform_device *device)
262 {
263 int r;
264diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
265index 1f13c96..502d7b9 100644
266--- a/drivers/gpu/drm/omapdrm/omap_drv.h
267+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
268@@ -36,12 +36,6 @@
269
270 #define MODULE_NAME "omapdrm"
271
272-/* max # of mapper-id's that can be assigned.. todo, come up with a better
273- * (but still inexpensive) way to store/access per-buffer mapper private
274- * data..
275- */
276-#define MAX_MAPPERS 2
277-
278 /* parameters which describe (unrotated) coordinates of scanout within a fb: */
279 struct omap_drm_window {
280 uint32_t rotation;
281@@ -276,4 +270,58 @@ fail:
282 return -ENOENT;
283 }
284
285+/****** PLUGIN API specific ******/
286+
287+/* interface that plug-in drivers (for now just PVR) can implement */
288+struct omap_drm_plugin {
289+ const char *name;
290+
291+ /* drm functions */
292+ int (*load)(struct drm_device *dev, unsigned long flags);
293+ int (*unload)(struct drm_device *dev);
294+ int (*open)(struct drm_device *dev, struct drm_file *file);
295+ int (*release)(struct drm_device *dev, struct drm_file *file);
296+
297+ struct drm_ioctl_desc *ioctls;
298+ int num_ioctls;
299+ int ioctl_base;
300+};
301+
302+int omap_drm_register_plugin(struct omap_drm_plugin *plugin);
303+int omap_drm_unregister_plugin(struct omap_drm_plugin *plugin);
304+
305+void *omap_drm_file_priv(struct drm_file *file);
306+void omap_drm_file_set_priv(struct drm_file *file, void *priv);
307+
308+void *omap_gem_priv(struct drm_gem_object *obj);
309+void omap_gem_set_priv(struct drm_gem_object *obj, void *priv);
310+void omap_gem_vm_open(struct vm_area_struct *vma);
311+void omap_gem_vm_close(struct vm_area_struct *vma);
312+
313+/* for external plugin buffers wrapped as GEM object (via. omap_gem_new_ext())
314+ * a vm_ops struct can be provided to get callback notification of various
315+ * events..
316+ */
317+struct omap_gem_vm_ops {
318+ void (*open)(struct vm_area_struct *area);
319+ void (*close)(struct vm_area_struct *area);
320+ /*maybe: int (*fault)(struct vm_area_struct *vma,
321+ struct vm_fault *vmf)*/
322+
323+ /* note: mmap isn't expected to do anything. it is just to allow buffer
324+ * allocate to update it's own internal state
325+ */
326+ void (*mmap)(struct file *, struct vm_area_struct *);
327+};
328+
329+struct drm_gem_object *omap_gem_new_ext(struct drm_device *dev,
330+ union omap_gem_size gsize, uint32_t flags,
331+ dma_addr_t paddr, struct page **pages,
332+ struct omap_gem_vm_ops *ops);
333+
334+void omap_gem_op_update(void);
335+int omap_gem_set_sync_object(struct drm_gem_object *obj, void *syncobj);
336+/*********************************/
337+
338+
339 #endif /* __OMAP_DRV_H__ */
340diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c
341index f9ddbf5..49f5222 100644
342--- a/drivers/gpu/drm/omapdrm/omap_gem.c
343+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
344@@ -117,6 +117,14 @@ struct omap_gem_object {
345 uint32_t read_pending;
346 uint32_t read_complete;
347 } *sync;
348+
349+ struct omap_gem_vm_ops *ops;
350+
351+ /**
352+ * per-mapper private data..
353+ */
354+ void *priv;
355+
356 };
357
358 static int get_pages(struct drm_gem_object *obj, struct page ***pages);
359@@ -300,6 +308,7 @@ uint32_t omap_gem_flags(struct drm_gem_object *obj)
360 {
361 return to_omap_bo(obj)->flags;
362 }
363+EXPORT_SYMBOL(omap_gem_flags);
364
365 /** get mmap offset */
366 static uint64_t mmap_offset(struct drm_gem_object *obj)
367@@ -329,6 +338,7 @@ uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj)
368 mutex_unlock(&obj->dev->struct_mutex);
369 return offset;
370 }
371+EXPORT_SYMBOL(omap_gem_mmap_offset);
372
373 /** get mmap size */
374 size_t omap_gem_mmap_size(struct drm_gem_object *obj)
375@@ -361,6 +371,7 @@ int omap_gem_tiled_size(struct drm_gem_object *obj, uint16_t *w, uint16_t *h)
376 }
377 return -EINVAL;
378 }
379+EXPORT_SYMBOL(omap_gem_tiled_size);
380
381 /* Normal handling for the case of faulting in non-tiled buffers */
382 static int fault_1d(struct drm_gem_object *obj,
383@@ -593,6 +604,9 @@ int omap_gem_mmap_obj(struct drm_gem_object *obj,
384 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
385 }
386
387+ if (omap_obj->ops && omap_obj->ops->mmap)
388+ omap_obj->ops->mmap(obj->filp, vma);
389+
390 return 0;
391 }
392
393@@ -804,6 +818,7 @@ fail:
394
395 return ret;
396 }
397+EXPORT_SYMBOL(omap_gem_get_paddr);
398
399 /* Release physical address, when DMA is no longer being performed.. this
400 * could potentially unpin and unmap buffers from TILER
401@@ -834,6 +849,7 @@ void omap_gem_put_paddr(struct drm_gem_object *obj)
402
403 mutex_unlock(&obj->dev->struct_mutex);
404 }
405+EXPORT_SYMBOL(omap_gem_put_paddr);
406
407 /* Get rotated scanout address (only valid if already pinned), at the
408 * specified orientation and x,y offset from top-left corner of buffer
409@@ -864,6 +880,7 @@ int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient)
410 ret = tiler_stride(gem2fmt(omap_obj->flags), orient);
411 return ret;
412 }
413+EXPORT_SYMBOL(omap_gem_tiled_stride);
414
415 /* acquire pages when needed (for example, for DMA where physically
416 * contiguous buffer is not required
417@@ -913,6 +930,7 @@ int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages,
418 mutex_unlock(&obj->dev->struct_mutex);
419 return ret;
420 }
421+EXPORT_SYMBOL(omap_gem_get_pages);
422
423 /* release pages when DMA no longer being performed */
424 int omap_gem_put_pages(struct drm_gem_object *obj)
425@@ -923,6 +941,7 @@ int omap_gem_put_pages(struct drm_gem_object *obj)
426 */
427 return 0;
428 }
429+EXPORT_SYMBOL(omap_gem_put_pages);
430
431 /* Get kernel virtual address for CPU access.. this more or less only
432 * exists for omap_fbdev. This should be called with struct_mutex
433@@ -1118,17 +1137,20 @@ void omap_gem_op_update(void)
434 sync_op_update();
435 spin_unlock(&sync_lock);
436 }
437+EXPORT_SYMBOL(omap_gem_op_update);
438
439 /* mark the start of read and/or write operation */
440 int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op)
441 {
442 return sync_op(obj, op, true);
443 }
444+EXPORT_SYMBOL(omap_gem_op_start);
445
446 int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op)
447 {
448 return sync_op(obj, op, false);
449 }
450+EXPORT_SYMBOL(omap_gem_op_finish);
451
452 static DECLARE_WAIT_QUEUE_HEAD(sync_event);
453
454@@ -1181,6 +1203,7 @@ int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op)
455 }
456 return ret;
457 }
458+EXPORT_SYMBOL(omap_gem_op_sync);
459
460 /* call fxn(arg), either synchronously or asynchronously if the op
461 * is currently blocked.. fxn() can be called from any context
462@@ -1227,6 +1250,7 @@ int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
463
464 return 0;
465 }
466+EXPORT_SYMBOL(omap_gem_op_async);
467
468 /* special API so PVR can update the buffer to use a sync-object allocated
469 * from it's sync-obj heap. Only used for a newly allocated (from PVR's
470@@ -1264,6 +1288,7 @@ unlock:
471 spin_unlock(&sync_lock);
472 return ret;
473 }
474+EXPORT_SYMBOL(omap_gem_set_sync_object);
475
476 /* don't call directly.. called from GEM core when it is time to actually
477 * free the object..
478@@ -1485,3 +1510,67 @@ void omap_gem_deinit(struct drm_device *dev)
479 */
480 kfree(usergart);
481 }
482+
483+/****** PLUGIN API specific ******/
484+
485+/* This constructor is mainly to give plugins a way to wrap their
486+ * own allocations
487+ */
488+struct drm_gem_object *omap_gem_new_ext(struct drm_device *dev,
489+ union omap_gem_size gsize, uint32_t flags,
490+ dma_addr_t paddr, struct page **pages,
491+ struct omap_gem_vm_ops *ops)
492+{
493+ struct drm_gem_object *obj;
494+
495+ BUG_ON((flags & OMAP_BO_TILED) && !pages);
496+
497+ if (paddr)
498+ flags |= OMAP_BO_DMA;
499+
500+ obj = omap_gem_new(dev, gsize, flags | OMAP_BO_EXT_MEM);
501+ if (obj) {
502+ struct omap_gem_object *omap_obj = to_omap_bo(obj);
503+ omap_obj->paddr = paddr;
504+ omap_obj->pages = pages;
505+ omap_obj->ops = ops;
506+ }
507+ return obj;
508+}
509+EXPORT_SYMBOL(omap_gem_new_ext);
510+
511+void omap_gem_vm_open(struct vm_area_struct *vma)
512+{
513+ struct drm_gem_object *obj = vma->vm_private_data;
514+ struct omap_gem_object *omap_obj = to_omap_bo(obj);
515+
516+ if (omap_obj->ops && omap_obj->ops->open)
517+ omap_obj->ops->open(vma);
518+ else
519+ drm_gem_vm_open(vma);
520+
521+}
522+
523+void omap_gem_vm_close(struct vm_area_struct *vma)
524+{
525+ struct drm_gem_object *obj = vma->vm_private_data;
526+ struct omap_gem_object *omap_obj = to_omap_bo(obj);
527+
528+ if (omap_obj->ops && omap_obj->ops->close)
529+ omap_obj->ops->close(vma);
530+ else
531+ drm_gem_vm_close(vma);
532+
533+}
534+
535+void *omap_gem_priv(struct drm_gem_object *obj)
536+{
537+ return to_omap_bo(obj)->priv;
538+}
539+EXPORT_SYMBOL(omap_gem_priv);
540+
541+void omap_gem_set_priv(struct drm_gem_object *obj, void *priv)
542+{
543+ to_omap_bo(obj)->priv = priv;
544+}
545+EXPORT_SYMBOL(omap_gem_set_priv);
546diff --git a/include/uapi/drm/omap_drm.h b/include/uapi/drm/omap_drm.h
547index 1d0b117..5292b93 100644
548--- a/include/uapi/drm/omap_drm.h
549+++ b/include/uapi/drm/omap_drm.h
550@@ -33,6 +33,12 @@ struct drm_omap_param {
551 uint64_t value; /* in (set_param), out (get_param) */
552 };
553
554+struct drm_omap_get_base {
555+ char plugin_name[64]; /* in */
556+ uint32_t ioctl_base; /* out */
557+ uint32_t __pad;
558+};
559+
560 #define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */
561 #define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */
562 #define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
563@@ -101,9 +107,7 @@ struct drm_omap_gem_info {
564
565 #define DRM_OMAP_GET_PARAM 0x00
566 #define DRM_OMAP_SET_PARAM 0x01
567-/* placeholder for plugin-api
568 #define DRM_OMAP_GET_BASE 0x02
569-*/
570 #define DRM_OMAP_GEM_NEW 0x03
571 #define DRM_OMAP_GEM_CPU_PREP 0x04
572 #define DRM_OMAP_GEM_CPU_FINI 0x05
573@@ -112,9 +116,7 @@ struct drm_omap_gem_info {
574
575 #define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
576 #define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
577-/* placeholder for plugin-api
578 #define DRM_IOCTL_OMAP_GET_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_BASE, struct drm_omap_get_base)
579-*/
580 #define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
581 #define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
582 #define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
583--
5842.2.0
585
diff --git a/recipes-kernel/linux/linux-ti-staging_4.1.bb b/recipes-kernel/linux/linux-ti-staging_4.1.bb
index ec2d1bdf..6ce53bbd 100644
--- a/recipes-kernel/linux/linux-ti-staging_4.1.bb
+++ b/recipes-kernel/linux/linux-ti-staging_4.1.bb
@@ -50,11 +50,11 @@ S = "${WORKDIR}/git"
50 50
51BRANCH = "ti-lsk-linux-4.1.y" 51BRANCH = "ti-lsk-linux-4.1.y"
52 52
53SRCREV = "e8f07af182399ef8f7fc331918163e11ee9a5870" 53SRCREV = "77889ef34c567c94faf6ba7b39aa7c65a6f3e841"
54PV = "4.1.6+git${SRCPV}" 54PV = "4.1.6+git${SRCPV}"
55 55
56# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild 56# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild
57MACHINE_KERNEL_PR_append = "b" 57MACHINE_KERNEL_PR_append = "c"
58PR = "${MACHINE_KERNEL_PR}" 58PR = "${MACHINE_KERNEL_PR}"
59 59
60KERNEL_CONFIG_DIR = "${S}/ti_config_fragments" 60KERNEL_CONFIG_DIR = "${S}/ti_config_fragments"
@@ -70,3 +70,11 @@ KERNEL_GIT_PROTOCOL = "git"
70SRC_URI += "${KERNEL_GIT_URI};protocol=${KERNEL_GIT_PROTOCOL};branch=${BRANCH} \ 70SRC_URI += "${KERNEL_GIT_URI};protocol=${KERNEL_GIT_PROTOCOL};branch=${BRANCH} \
71 file://defconfig \ 71 file://defconfig \
72 " 72 "
73
74GFX_PATCHES = "file://0001-DT-gpu-add-binding-for-TI-SGX-driver.patch \
75 file://0002-ARM-dts-DRA7xx-add-gpu-interface-clock.patch \
76 file://0003-ARM-dts-DRA7xx-add-device-tree-entry-for-SGX.patch \
77 file://0004-arm-dra7xx-Add-gpu-hwmod-data.patch \
78 file://0005-drm-omap-Add-omapdrm-plugin-API.patch"
79
80SRC_URI_append_dra7xx = " ${GFX_PATCHES}"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-09-22 23:30:58 +0000