BSP: rename beagleboard to TI

linux-omap 2.6.37rc: sync with OE

7 files changed, 491 insertions, 0 deletions

diff --git a/recipes-bsp/x-load/signgp.bb b/recipes-bsp/x-load/signgp.bb
new file mode 100644
index 00000000..8535c53a
--- /dev/null
+++ b/recipes-bsp/x-load/signgp.bb
@@ -0,0 +1,19 @@
+LICENSE = "NewBSD"
+DESCRIPTION = "Tool to sign omap3 x-loader images"
+
+PR = "r4"
+
+SRC_URI = "file://signGP.c"
+
+do_compile() {
+        ${CC} ${CFLAGS} ${LDFLAGS} ${WORKDIR}/signGP.c -o signGP
+}
+
+do_install() {
+        install -d ${D}${bindir}
+        install -m 0755 signGP ${D}${bindir}
+}
+
+NATIVE_INSTALL_WORKS = "1"
+
+BBCLASSEXTEND = "native nativesdk"
diff --git a/recipes-bsp/x-load/signgp/signGP.c b/recipes-bsp/x-load/signgp/signGP.c
new file mode 100644
index 00000000..93250640
--- /dev/null
+++ b/recipes-bsp/x-load/signgp/signGP.c
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+
+//
+// signGP.c
+// Read the x-load.bin file and write out the x-load.bin.ift file.
+// The signed image is the original pre-pended with the size of the image
+// and the load address.  If not entered on command line, file name is
+// assumed to be x-load.bin in current directory and load address is
+// 0x40200800.
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <fcntl.h>
+#include <sys/stat.h>
+#include <string.h>
+#include <malloc.h>
+
+
+main(int argc, char *argv[])
+{
+        int     i;
+        char    ifname[FILENAME_MAX], ofname[FILENAME_MAX], ch;
+        FILE    *ifile, *ofile;
+        unsigned long   loadaddr, len;
+        struct stat     sinfo;
+
+
+        // Default to x-load.bin and 0x40200800.
+        strcpy(ifname, "x-load.bin");
+        loadaddr = 0x40200800;
+
+        if ((argc == 2) || (argc == 3))
+                strcpy(ifname, argv[1]);
+
+        if (argc == 3)
+                loadaddr = strtol(argv[2], NULL, 16);
+
+        // Form the output file name.
+        strcpy(ofname, ifname);
+        strcat(ofname, ".ift");
+
+        // Open the input file.
+        ifile = fopen(ifname, "rb");
+        if (ifile == NULL) {
+                printf("Cannot open %s\n", ifname);
+                exit(0);
+        }
+
+        // Get file length.
+        stat(ifname, &sinfo);
+        len = sinfo.st_size;
+
+        // Open the output file and write it.
+        ofile = fopen(ofname, "wb");
+        if (ofile == NULL) {
+                printf("Cannot open %s\n", ofname);
+                fclose(ifile);
+                exit(0);
+        }
+
+        // Pad 1 sector of zeroes.
+        //ch = 0x00;
+        //for (i=0; i<0x200; i++)
+        //      fwrite(&ch, 1, 1, ofile);
+
+        fwrite(&len, 1, 4, ofile);
+        fwrite(&loadaddr, 1, 4, ofile);
+        for (i=0; i<len; i++) {
+                fread(&ch, 1, 1, ifile);
+                fwrite(&ch, 1, 1, ofile);
+        }
+
+        fclose(ifile);
+        fclose(ofile);
+}
diff --git a/recipes-bsp/x-load/x-load-git/bb8547fcbc54ecc7a75f9ad45a31042a04d8a2ce.patch b/recipes-bsp/x-load/x-load-git/bb8547fcbc54ecc7a75f9ad45a31042a04d8a2ce.patch
new file mode 100644
index 00000000..d447fd0b
--- /dev/null
+++ b/recipes-bsp/x-load/x-load-git/bb8547fcbc54ecc7a75f9ad45a31042a04d8a2ce.patch
@@ -0,0 +1,35 @@
+From bb8547fcbc54ecc7a75f9ad45a31042a04d8a2ce Mon Sep 17 00:00:00 2001
+From: Laine Walker-Avina <lwalkera@ieee.org>
+Date: Tue, 13 Apr 2010 13:27:31 -0700
+Subject: [PATCH] FAT: Find the start of the first partition in a non-hardcoded way
+
+---
+ fs/fat/fat.c |   12 +++++-------
+ 1 files changed, 5 insertions(+), 7 deletions(-)
+
+diff --git a/fs/fat/fat.c b/fs/fat/fat.c
+index eb754c0..c6bdb13 100644
+--- a/fs/fat/fat.c
++++ b/fs/fat/fat.c
+@@ -145,13 +145,11 @@ fat_register_device(block_dev_desc_t *dev_desc, int part_no)
+                        return -1;
+                }
+ #else
+-               /* FIXME we need to determine the start block of the
+-                * partition where the DOS FS resides. This can be done
+-                * by using the get_partition_info routine. For this
+-                * purpose the libpart must be included.
+-                */
+-               part_offset=63;
+-               //part_offset=0;
++               part_offset = buffer[DOS_PART_TBL_OFFSET+8]      |
++                             buffer[DOS_PART_TBL_OFFSET+9] <<8  |
++                             buffer[DOS_PART_TBL_OFFSET+10]<<16 |
++                             buffer[DOS_PART_TBL_OFFSET+11]<<24;
++
+                cur_part = 1;
+ #endif
+        }
+-- 
+1.6.1
+
diff --git a/recipes-bsp/x-load/x-load-git/name.patch b/recipes-bsp/x-load/x-load-git/name.patch
new file mode 100644
index 00000000..1a7aa567
--- /dev/null
+++ b/recipes-bsp/x-load/x-load-git/name.patch
@@ -0,0 +1,13 @@
+--- git/Makefile-orig   2010-03-08 06:56:36.000000000 -0800
++++ git/Makefile        2010-03-08 06:56:52.000000000 -0800
+@@ -153,8 +153,8 @@ omap3evm_config :   unconfig
+ overo_config : unconfig
+        @./mkconfig $(@:_config=) arm omap3 overo
+ 
+-omap3530beagle_config :    unconfig
+-       @./mkconfig $(@:_config=) arm omap3 omap3530beagle
++beagleboard_config :    unconfig
++       @./mkconfig omap3530beagle arm omap3 omap3530beagle
+ 
+ #########################################################################
+ 
diff --git a/recipes-bsp/x-load/x-load-git/xm-mem.patch b/recipes-bsp/x-load/x-load-git/xm-mem.patch
new file mode 100644
index 00000000..d038faf2
--- /dev/null
+++ b/recipes-bsp/x-load/x-load-git/xm-mem.patch
@@ -0,0 +1,237 @@
+From a25b926ff963a1866e26b11a4dac742564618375 Mon Sep 17 00:00:00 2001
+From: Steve Kipisz <s-kipisz2@ti.com>
+Date: Thu, 8 Jul 2010 10:30:58 -0500
+Subject: [PATCH] Support Micron or Numonyx memory
+
+* Updated Numonyx memory size.
+---
+ board/omap3530beagle/omap3530beagle.c |   56 +++++++++++++++++++++++++++-----
+ drivers/k9f1g08r0a.c                  |   43 +++++++++++++++++++------
+ include/asm/arch-omap3/mem.h          |   43 ++++++++++++++++++++++++-
+ 3 files changed, 121 insertions(+), 21 deletions(-)
+
+diff --git a/board/omap3530beagle/omap3530beagle.c b/board/omap3530beagle/omap3530beagle.c
+index eb8008e..1b3d8c7 100644
+--- a/board/omap3530beagle/omap3530beagle.c
++++ b/board/omap3530beagle/omap3530beagle.c
+@@ -265,6 +265,32 @@ u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
+ }
+ 
+ #ifdef CFG_3430SDRAM_DDR
++
++#define MICRON_DDR     0
++#define NUMONYX_MCP    1
++int identify_xm_ddr()
++{
++       int     mfr, id;
++
++       __raw_writel(M_NAND_GPMC_CONFIG1, GPMC_CONFIG1 + GPMC_CONFIG_CS0);
++       __raw_writel(M_NAND_GPMC_CONFIG2, GPMC_CONFIG2 + GPMC_CONFIG_CS0);
++       __raw_writel(M_NAND_GPMC_CONFIG3, GPMC_CONFIG3 + GPMC_CONFIG_CS0);
++       __raw_writel(M_NAND_GPMC_CONFIG4, GPMC_CONFIG4 + GPMC_CONFIG_CS0);
++       __raw_writel(M_NAND_GPMC_CONFIG5, GPMC_CONFIG5 + GPMC_CONFIG_CS0);
++       __raw_writel(M_NAND_GPMC_CONFIG6, GPMC_CONFIG6 + GPMC_CONFIG_CS0);
++
++       /* Enable the GPMC Mapping */
++       __raw_writel((((OMAP34XX_GPMC_CS0_SIZE & 0xF)<<8) |
++                            ((NAND_BASE_ADR>>24) & 0x3F) |
++                            (1<<6)),  (GPMC_CONFIG7 + GPMC_CONFIG_CS0));
++       delay(2000);
++
++       nand_readid(&mfr, &id);
++       if (mfr == 0)
++               return MICRON_DDR;
++       if ((mfr == 0x20) && (id == 0xba))
++               return NUMONYX_MCP;
++}
+ /*********************************************************************
+  * config_3430sdram_ddr() - Init DDR on 3430SDP dev board.
+  *********************************************************************/
+@@ -279,15 +305,27 @@ void config_3430sdram_ddr(void)
+        __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
+ 
+        if (beagle_revision() == REVISION_XM) {
+-               __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
+-               __raw_writel(SDP_SDRC_MDCFG_0_DDR_XM, SDRC_MCFG_0);
+-               __raw_writel(SDP_SDRC_MDCFG_0_DDR_XM, SDRC_MCFG_1);
+-               __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
+-               __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
+-               __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
+-               __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
+-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
+-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
++               if (identify_xm_ddr() == MICRON_DDR) {
++                       __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
++                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
++                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
++                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
++                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
++                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
++                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
++                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
++                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
++               } else {
++                       __raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
++                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
++                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
++                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
++                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
++                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
++                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
++                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
++                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
++               }
+        } else {
+                __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
+                __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
+diff --git a/drivers/k9f1g08r0a.c b/drivers/k9f1g08r0a.c
+index 8968a1b..d2da804 100644
+--- a/drivers/k9f1g08r0a.c
++++ b/drivers/k9f1g08r0a.c
+@@ -154,6 +154,29 @@ static int NanD_Address(unsigned int numbytes, unsigned long ofs)
+        return 0;
+ }
+ 
++int nand_readid(int *mfr, int *id)
++{
++       NAND_ENABLE_CE();
++
++       if (NanD_Command(NAND_CMD_RESET)) {
++               NAND_DISABLE_CE();
++               return 1;
++       }
++ 
++       if (NanD_Command(NAND_CMD_READID)) {
++               NAND_DISABLE_CE();
++               return 1;
++       }
++ 
++       NanD_Address(ADDR_COLUMN, 0);
++
++       *mfr = READ_NAND(NAND_ADDR);
++       *id = READ_NAND(NAND_ADDR);
++
++       NAND_DISABLE_CE();
++       return 0;
++}
++
+ /* read chip mfr and id
+  * return 0 if they match board config
+  * return 1 if not
+@@ -162,23 +185,23 @@ int nand_chip()
+ {
+        int mfr, id;
+ 
+-       NAND_ENABLE_CE();
++       NAND_ENABLE_CE();
+ 
+-       if (NanD_Command(NAND_CMD_RESET)) {
+-               printf("Err: RESET\n");
+-               NAND_DISABLE_CE();   
++       if (NanD_Command(NAND_CMD_RESET)) {
++               printf("Err: RESET\n");
++               NAND_DISABLE_CE();   
+                return 1;
+        }
+  
+-       if (NanD_Command(NAND_CMD_READID)) {
+-               printf("Err: READID\n");
+-               NAND_DISABLE_CE();
++       if (NanD_Command(NAND_CMD_READID)) {
++               printf("Err: READID\n");
++               NAND_DISABLE_CE();
+                return 1;
+-       }
++       }
+  
+-       NanD_Address(ADDR_COLUMN, 0);
++       NanD_Address(ADDR_COLUMN, 0);
+ 
+-       mfr = READ_NAND(NAND_ADDR);
++       mfr = READ_NAND(NAND_ADDR);
+        id = READ_NAND(NAND_ADDR);
+ 
+        NAND_DISABLE_CE();
+diff --git a/include/asm/arch-omap3/mem.h b/include/asm/arch-omap3/mem.h
+index cba4c6f..63cdba1 100644
+--- a/include/asm/arch-omap3/mem.h
++++ b/include/asm/arch-omap3/mem.h
+@@ -46,6 +46,7 @@ typedef enum {
+ #define MMC_NAND            4
+ #define MMC_ONENAND         5
+ #define GPMC_NONE           6
++#define GPMC_ONENAND_TRY    7
+ 
+ #endif
+ 
+@@ -71,7 +72,8 @@ typedef enum {
+ #define SDP_SDRC_MDCFG_0_DDR   (0x02582019|B_ALL) /* Infin ddr module */
+ #else
+ #define SDP_SDRC_MDCFG_0_DDR   (0x02584019|B_ALL)
+-#define SDP_SDRC_MDCFG_0_DDR_XM        (0x03588019|B_ALL)
++#define SDP_SDRC_MDCFG_0_DDR_MICRON_XM (0x03588019|B_ALL)
++#define SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM        (0x04590019|B_ALL)
+ #endif
+ 
+ #define SDP_SDRC_MR_0_DDR              0x00000032
+@@ -252,12 +254,47 @@ typedef enum {
+                (MICRON_TDPL_200 << 6) | (MICRON_TDAL_200))
+ 
+ #define MICRON_TWTR_200   2
+-#define MICRON_TCKE_200   1
++#define MICRON_TCKE_200   4
+ #define MICRON_TXP_200    2
+ #define MICRON_XSR_200   23
+ #define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | (MICRON_XSR_200 << 0)) | \
+                                (MICRON_TXP_200 << 8) | (MICRON_TWTR_200 << 16)
+ 
++/* NUMONYX part of IGEP0020 (165MHz optimized) 6.06ns
++ *   ACTIMA
++ *      TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
++ *      TDPL (Twr) = 15/6 = 2.5 -> 3
++ *      TRRD = 12/6 = 2
++ *      TRCD = 22.5/6 = 3.75 -> 4
++ *      TRP  = 18/6 = 3
++ *      TRAS = 42/6 = 7
++ *      TRC  = 60/6 = 10
++ *      TRFC = 140/6 = 23.3 -> 24
++ *   ACTIMB
++ *     TWTR = 2
++ *     TCKE = 2
++ *     TXSR = 200/6 =  33.3 -> 34
++ *     TXP  = 1.0 + 1.1 = 2.1 -> 3 ¿?
++ */
++#define NUMONYX_TDAL_165   6
++#define NUMONYX_TDPL_165   3
++#define NUMONYX_TRRD_165   2
++#define NUMONYX_TRCD_165   4
++#define NUMONYX_TRP_165    3
++#define NUMONYX_TRAS_165   7
++#define NUMONYX_TRC_165   10
++#define NUMONYX_TRFC_165  24
++#define NUMONYX_V_ACTIMA_165 ((NUMONYX_TRFC_165 << 27) | (NUMONYX_TRC_165 << 22) | (NUMONYX_TRAS_165 << 18) \
++               | (NUMONYX_TRP_165 << 15) | (NUMONYX_TRCD_165 << 12) |(NUMONYX_TRRD_165 << 9) | \
++               (NUMONYX_TDPL_165 << 6) | (NUMONYX_TDAL_165))
++
++#define NUMONYX_TWTR_165   2
++#define NUMONYX_TCKE_165   2
++#define NUMONYX_TXP_165    3
++#define NUMONYX_XSR_165    34
++#define NUMONYX_V_ACTIMB_165 ((NUMONYX_TCKE_165 << 12) | (NUMONYX_XSR_165 << 0)) | \
++                               (NUMONYX_TXP_165 << 8) | (NUMONYX_TWTR_165 << 16)
++
+ /* New and compatability speed defines */
+ #if defined(PRCM_CLK_CFG2_200MHZ) || defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B)
+ # define L3_100MHZ   /* Use with <= 100MHz SDRAM */
+@@ -276,6 +313,8 @@ typedef enum {
+ #elif  defined(L3_165MHZ)
+ # define MICRON_SDRC_ACTIM_CTRLA_0     MICRON_V_ACTIMA_165
+ # define MICRON_SDRC_ACTIM_CTRLB_0     MICRON_V_ACTIMB_165
++# define NUMONYX_SDRC_ACTIM_CTRLA_0    NUMONYX_V_ACTIMA_165
++# define NUMONYX_SDRC_ACTIM_CTRLB_0    NUMONYX_V_ACTIMB_165
+ #endif
+ 
+ 
+-- 
+1.6.1
+
diff --git a/recipes-bsp/x-load/x-load.inc b/recipes-bsp/x-load/x-load.inc
new file mode 100644
index 00000000..8743243e
--- /dev/null
+++ b/recipes-bsp/x-load/x-load.inc
@@ -0,0 +1,57 @@
+DESCRIPTION = "x-load bootloader loader"
+SECTION = "bootloaders"
+PRIORITY = "optional"
+LICENSE = "GPLv2+"
+
+DEPENDS = "signgp-native"
+
+PARALLEL_MAKE=""
+
+EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
+
+XLOAD_MACHINE ?= "${MACHINE}_config"
+
+XLOAD_IMAGE ?= "x-load-${MACHINE}-${PV}-${PR}.bin.ift"
+XLOAD_SYMLINK ?= "x-load-${MACHINE}.bin.ift"
+XLOAD_USB_IMAGE ?= "x-load-usb-${MACHINE}-${PV}-${PR}.bin"
+XLOAD_USB_SYMLINK ?= "x-load-usb-${MACHINE}.bin"
+MLO_IMAGE ?= "MLO-${MACHINE}-${PV}-${PR}"
+MLO_SYMLINK ?= "MLO-${MACHINE}"
+MLO_SYMLINK_NOMACHINE ?= "MLO"
+XLOAD_LOAD_ADDRESS ?= 0x40200800
+
+do_compile () {
+        unset LDFLAGS
+        unset CFLAGS
+        unset CPPFLAGS
+        oe_runmake distclean
+        oe_runmake ${XLOAD_MACHINE}
+        oe_runmake
+}
+
+do_install () {
+        signGP ${S}/x-load.bin ${XLOAD_LOAD_ADDRESS}
+
+        install -d ${D}/boot
+        install ${S}/x-load.bin.ift ${D}/boot/${MLO_IMAGE}
+        ln -sf ${MLO_IMAGE} ${D}/boot/${MLO_SYMLINK_NOMACHINE} 
+}
+
+FILES_${PN} = "/boot"
+
+do_deploy () {
+        install -d ${DEPLOY_DIR_IMAGE}
+        install ${S}/x-load.bin.ift ${DEPLOY_DIR_IMAGE}/${XLOAD_IMAGE}
+        install ${S}/x-load.bin ${DEPLOY_DIR_IMAGE}/${XLOAD_USB_IMAGE}  
+        install ${S}/x-load.bin.ift ${DEPLOY_DIR_IMAGE}/${MLO_IMAGE}
+
+        cd ${DEPLOY_DIR_IMAGE}
+        rm -f ${XLOAD_SYMLINK}
+        ln -sf ${XLOAD_IMAGE} ${XLOAD_SYMLINK}
+        rm -f ${XLOAD_USB_SYMLINK}
+        ln -sf ${XLOAD_USB_IMAGE} ${XLOAD_USB_SYMLINK}  
+        rm -f ${MLO_SYMLINK}
+        ln -sf ${MLO_IMAGE} ${MLO_SYMLINK}
+}
+do_deploy[dirs] = "${S}"
+addtask deploy before do_build after do_install
diff --git a/recipes-bsp/x-load/x-load_git.bb b/recipes-bsp/x-load/x-load_git.bb
new file mode 100644
index 00000000..f45bac95
--- /dev/null
+++ b/recipes-bsp/x-load/x-load_git.bb
@@ -0,0 +1,22 @@
+require x-load.inc
+
+DEFAULT_PREFERENCE_omap3-pandora = "-1"
+
+FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/x-load-git"
+
+SRCREV_pn-${PN} = "1c9276af4d6a5b7014a7630a1abeddf3b3177563"
+
+PV = "1.44+${PR}+gitr${SRCREV}"
+PR ="r16"
+PE = "1"
+
+SRC_URI = "git://gitorious.org/x-load-omap3/mainline.git;branch=master;protocol=git"
+
+SRC_URI_append_beagleboard = " \
+                              file://name.patch \
+                              file://bb8547fcbc54ecc7a75f9ad45a31042a04d8a2ce.patch \
+                              file://xm-mem.patch \
+                             "
+S = "${WORKDIR}/git"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"