diff options
Diffstat (limited to 'recipes-security/libseccomp/files/0004-tests-add-ppc64-support-to-the-regression-tests.patch')
-rw-r--r-- | recipes-security/libseccomp/files/0004-tests-add-ppc64-support-to-the-regression-tests.patch | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/recipes-security/libseccomp/files/0004-tests-add-ppc64-support-to-the-regression-tests.patch b/recipes-security/libseccomp/files/0004-tests-add-ppc64-support-to-the-regression-tests.patch new file mode 100644 index 0000000..e1d4f41 --- /dev/null +++ b/recipes-security/libseccomp/files/0004-tests-add-ppc64-support-to-the-regression-tests.patch | |||
@@ -0,0 +1,118 @@ | |||
1 | From e7deb140a59c1ca3c4eed5967ba288464f077944 Mon Sep 17 00:00:00 2001 | ||
2 | From: Paul Moore <pmoore@redhat.com> | ||
3 | Date: Fri, 26 Sep 2014 13:14:12 -0400 | ||
4 | Subject: [PATCH 04/11] tests: add ppc64 support to the regression tests | ||
5 | |||
6 | Signed-off-by: Paul Moore <pmoore@redhat.com> | ||
7 | --- | ||
8 | tests/16-sim-arch_basic.c | 3 +++ | ||
9 | tests/16-sim-arch_basic.py | 1 + | ||
10 | tests/23-sim-arch_all_le_basic.c | 3 +++ | ||
11 | tests/23-sim-arch_all_le_basic.py | 1 + | ||
12 | tests/26-sim-arch_all_be_basic.c | 3 +++ | ||
13 | tests/26-sim-arch_all_be_basic.py | 1 + | ||
14 | tests/regression | 10 ++++++++-- | ||
15 | 7 files changed, 20 insertions(+), 2 deletions(-) | ||
16 | |||
17 | diff --git a/tests/16-sim-arch_basic.c b/tests/16-sim-arch_basic.c | ||
18 | index 9771913..09df44b 100644 | ||
19 | --- a/tests/16-sim-arch_basic.c | ||
20 | +++ b/tests/16-sim-arch_basic.c | ||
21 | @@ -68,6 +68,9 @@ int main(int argc, char *argv[]) | ||
22 | rc = seccomp_arch_add(ctx, SCMP_ARCH_MIPSEL64N32); | ||
23 | if (rc != 0) | ||
24 | goto out; | ||
25 | + rc = seccomp_arch_add(ctx, SCMP_ARCH_PPC64LE); | ||
26 | + if (rc != 0) | ||
27 | + goto out; | ||
28 | |||
29 | rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1, | ||
30 | SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO)); | ||
31 | diff --git a/tests/16-sim-arch_basic.py b/tests/16-sim-arch_basic.py | ||
32 | index 57a5ac3..d9e1939 100755 | ||
33 | --- a/tests/16-sim-arch_basic.py | ||
34 | +++ b/tests/16-sim-arch_basic.py | ||
35 | @@ -39,6 +39,7 @@ def test(args): | ||
36 | f.add_arch(Arch("mipsel")) | ||
37 | f.add_arch(Arch("mipsel64")) | ||
38 | f.add_arch(Arch("mipsel64n32")) | ||
39 | + f.add_arch(Arch("ppc64le")) | ||
40 | f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno())) | ||
41 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno())) | ||
42 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno())) | ||
43 | diff --git a/tests/23-sim-arch_all_le_basic.c b/tests/23-sim-arch_all_le_basic.c | ||
44 | index eeb8556..9f67ed6 100644 | ||
45 | --- a/tests/23-sim-arch_all_le_basic.c | ||
46 | +++ b/tests/23-sim-arch_all_le_basic.c | ||
47 | @@ -68,6 +68,9 @@ int main(int argc, char *argv[]) | ||
48 | rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("mipsel64n32")); | ||
49 | if (rc != 0) | ||
50 | goto out; | ||
51 | + rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("ppc64le")); | ||
52 | + if (rc != 0) | ||
53 | + goto out; | ||
54 | |||
55 | rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1, | ||
56 | SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO)); | ||
57 | diff --git a/tests/23-sim-arch_all_le_basic.py b/tests/23-sim-arch_all_le_basic.py | ||
58 | index 36ab139..212ff50 100755 | ||
59 | --- a/tests/23-sim-arch_all_le_basic.py | ||
60 | +++ b/tests/23-sim-arch_all_le_basic.py | ||
61 | @@ -39,6 +39,7 @@ def test(args): | ||
62 | f.add_arch(Arch("mipsel")) | ||
63 | f.add_arch(Arch("mipsel64")) | ||
64 | f.add_arch(Arch("mipsel64n32")) | ||
65 | + f.add_arch(Arch("ppc64le")) | ||
66 | f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno())) | ||
67 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno())) | ||
68 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno())) | ||
69 | diff --git a/tests/26-sim-arch_all_be_basic.c b/tests/26-sim-arch_all_be_basic.c | ||
70 | index a951b3c..1a44525 100644 | ||
71 | --- a/tests/26-sim-arch_all_be_basic.c | ||
72 | +++ b/tests/26-sim-arch_all_be_basic.c | ||
73 | @@ -52,6 +52,9 @@ int main(int argc, char *argv[]) | ||
74 | rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("mips64n32")); | ||
75 | if (rc != 0) | ||
76 | goto out; | ||
77 | + rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("ppc64")); | ||
78 | + if (rc != 0) | ||
79 | + goto out; | ||
80 | |||
81 | rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1, | ||
82 | SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO)); | ||
83 | diff --git a/tests/26-sim-arch_all_be_basic.py b/tests/26-sim-arch_all_be_basic.py | ||
84 | index 1347406..cba2dea 100755 | ||
85 | --- a/tests/26-sim-arch_all_be_basic.py | ||
86 | +++ b/tests/26-sim-arch_all_be_basic.py | ||
87 | @@ -33,6 +33,7 @@ def test(args): | ||
88 | f.add_arch(Arch("mips")) | ||
89 | f.add_arch(Arch("mips64")) | ||
90 | f.add_arch(Arch("mips64n32")) | ||
91 | + f.add_arch(Arch("ppc64")) | ||
92 | f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno())) | ||
93 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno())) | ||
94 | f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno())) | ||
95 | diff --git a/tests/regression b/tests/regression | ||
96 | index 428bdf2..3ab6171 100755 | ||
97 | --- a/tests/regression | ||
98 | +++ b/tests/regression | ||
99 | @@ -21,8 +21,14 @@ | ||
100 | # along with this library; if not, see <http://www.gnu.org/licenses>. | ||
101 | # | ||
102 | |||
103 | -GLBL_ARCH_LE_SUPPORT="x86 x86_64 x32 arm aarch64 mipsel mipsel64 mipsel64n32" | ||
104 | -GLBL_ARCH_BE_SUPPORT="mips mips64 mips64n32" | ||
105 | +GLBL_ARCH_LE_SUPPORT=" \ | ||
106 | + x86 x86_64 x32 \ | ||
107 | + arm aarch64 \ | ||
108 | + mipsel mipsel64 mipsel64n32 \ | ||
109 | + ppc64le" | ||
110 | +GLBL_ARCH_BE_SUPPORT=" \ | ||
111 | + mips mips64 mips64n32 \ | ||
112 | + ppc64" | ||
113 | |||
114 | GLBL_SYS_ARCH="../tools/scmp_arch_detect" | ||
115 | GLBL_SYS_RESOLVER="../tools/scmp_sys_resolver" | ||
116 | -- | ||
117 | 2.3.5 | ||
118 | |||