diff options
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106803.patch')
-rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106803.patch | 201 |
1 files changed, 0 insertions, 201 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106803.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106803.patch deleted file mode 100644 index 5b36959b6b..0000000000 --- a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106803.patch +++ /dev/null | |||
@@ -1,201 +0,0 @@ | |||
1 | 2011-09-12 Richard Sandiford <richard.sandiford@linaro.org> | ||
2 | |||
3 | gcc/ | ||
4 | PR target/49030 | ||
5 | * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare. | ||
6 | * config/arm/arm.c (maybe_get_arm_condition_code): New function, | ||
7 | reusing the old code from get_arm_condition_code. Return ARM_NV | ||
8 | for invalid comparison codes. | ||
9 | (get_arm_condition_code): Redefine in terms of | ||
10 | maybe_get_arm_condition_code. | ||
11 | * config/arm/predicates.md (arm_comparison_operator): Use | ||
12 | maybe_get_arm_condition_code. | ||
13 | |||
14 | gcc/testsuite/ | ||
15 | PR target/49030 | ||
16 | * gcc.dg/torture/pr49030.c: New test. | ||
17 | |||
18 | === modified file 'gcc/config/arm/arm-protos.h' | ||
19 | --- old/gcc/config/arm/arm-protos.h 2011-08-25 13:26:58 +0000 | ||
20 | +++ new/gcc/config/arm/arm-protos.h 2011-09-12 11:03:11 +0000 | ||
21 | @@ -179,6 +179,7 @@ | ||
22 | #endif | ||
23 | extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); | ||
24 | #ifdef RTX_CODE | ||
25 | +extern enum arm_cond_code maybe_get_arm_condition_code (rtx); | ||
26 | extern void thumb1_final_prescan_insn (rtx); | ||
27 | extern void thumb2_final_prescan_insn (rtx); | ||
28 | extern const char *thumb_load_double_from_address (rtx *); | ||
29 | |||
30 | === modified file 'gcc/config/arm/arm.c' | ||
31 | --- old/gcc/config/arm/arm.c 2011-09-06 12:57:56 +0000 | ||
32 | +++ new/gcc/config/arm/arm.c 2011-09-12 11:03:11 +0000 | ||
33 | @@ -17494,10 +17494,10 @@ | ||
34 | decremented/zeroed by arm_asm_output_opcode as the insns are output. */ | ||
35 | |||
36 | /* Returns the index of the ARM condition code string in | ||
37 | - `arm_condition_codes'. COMPARISON should be an rtx like | ||
38 | - `(eq (...) (...))'. */ | ||
39 | -static enum arm_cond_code | ||
40 | -get_arm_condition_code (rtx comparison) | ||
41 | + `arm_condition_codes', or ARM_NV if the comparison is invalid. | ||
42 | + COMPARISON should be an rtx like `(eq (...) (...))'. */ | ||
43 | +enum arm_cond_code | ||
44 | +maybe_get_arm_condition_code (rtx comparison) | ||
45 | { | ||
46 | enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); | ||
47 | enum arm_cond_code code; | ||
48 | @@ -17521,11 +17521,11 @@ | ||
49 | case CC_DLTUmode: code = ARM_CC; | ||
50 | |||
51 | dominance: | ||
52 | - gcc_assert (comp_code == EQ || comp_code == NE); | ||
53 | - | ||
54 | if (comp_code == EQ) | ||
55 | return ARM_INVERSE_CONDITION_CODE (code); | ||
56 | - return code; | ||
57 | + if (comp_code == NE) | ||
58 | + return code; | ||
59 | + return ARM_NV; | ||
60 | |||
61 | case CC_NOOVmode: | ||
62 | switch (comp_code) | ||
63 | @@ -17534,7 +17534,7 @@ | ||
64 | case EQ: return ARM_EQ; | ||
65 | case GE: return ARM_PL; | ||
66 | case LT: return ARM_MI; | ||
67 | - default: gcc_unreachable (); | ||
68 | + default: return ARM_NV; | ||
69 | } | ||
70 | |||
71 | case CC_Zmode: | ||
72 | @@ -17542,7 +17542,7 @@ | ||
73 | { | ||
74 | case NE: return ARM_NE; | ||
75 | case EQ: return ARM_EQ; | ||
76 | - default: gcc_unreachable (); | ||
77 | + default: return ARM_NV; | ||
78 | } | ||
79 | |||
80 | case CC_Nmode: | ||
81 | @@ -17550,7 +17550,7 @@ | ||
82 | { | ||
83 | case NE: return ARM_MI; | ||
84 | case EQ: return ARM_PL; | ||
85 | - default: gcc_unreachable (); | ||
86 | + default: return ARM_NV; | ||
87 | } | ||
88 | |||
89 | case CCFPEmode: | ||
90 | @@ -17575,7 +17575,7 @@ | ||
91 | /* UNEQ and LTGT do not have a representation. */ | ||
92 | case UNEQ: /* Fall through. */ | ||
93 | case LTGT: /* Fall through. */ | ||
94 | - default: gcc_unreachable (); | ||
95 | + default: return ARM_NV; | ||
96 | } | ||
97 | |||
98 | case CC_SWPmode: | ||
99 | @@ -17591,7 +17591,7 @@ | ||
100 | case GTU: return ARM_CC; | ||
101 | case LEU: return ARM_CS; | ||
102 | case LTU: return ARM_HI; | ||
103 | - default: gcc_unreachable (); | ||
104 | + default: return ARM_NV; | ||
105 | } | ||
106 | |||
107 | case CC_Cmode: | ||
108 | @@ -17599,7 +17599,7 @@ | ||
109 | { | ||
110 | case LTU: return ARM_CS; | ||
111 | case GEU: return ARM_CC; | ||
112 | - default: gcc_unreachable (); | ||
113 | + default: return ARM_NV; | ||
114 | } | ||
115 | |||
116 | case CC_CZmode: | ||
117 | @@ -17611,7 +17611,7 @@ | ||
118 | case GTU: return ARM_HI; | ||
119 | case LEU: return ARM_LS; | ||
120 | case LTU: return ARM_CC; | ||
121 | - default: gcc_unreachable (); | ||
122 | + default: return ARM_NV; | ||
123 | } | ||
124 | |||
125 | case CC_NCVmode: | ||
126 | @@ -17621,7 +17621,7 @@ | ||
127 | case LT: return ARM_LT; | ||
128 | case GEU: return ARM_CS; | ||
129 | case LTU: return ARM_CC; | ||
130 | - default: gcc_unreachable (); | ||
131 | + default: return ARM_NV; | ||
132 | } | ||
133 | |||
134 | case CCmode: | ||
135 | @@ -17637,13 +17637,22 @@ | ||
136 | case GTU: return ARM_HI; | ||
137 | case LEU: return ARM_LS; | ||
138 | case LTU: return ARM_CC; | ||
139 | - default: gcc_unreachable (); | ||
140 | + default: return ARM_NV; | ||
141 | } | ||
142 | |||
143 | default: gcc_unreachable (); | ||
144 | } | ||
145 | } | ||
146 | |||
147 | +/* Like maybe_get_arm_condition_code, but never return ARM_NV. */ | ||
148 | +static enum arm_cond_code | ||
149 | +get_arm_condition_code (rtx comparison) | ||
150 | +{ | ||
151 | + enum arm_cond_code code = maybe_get_arm_condition_code (comparison); | ||
152 | + gcc_assert (code != ARM_NV); | ||
153 | + return code; | ||
154 | +} | ||
155 | + | ||
156 | /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed | ||
157 | instructions. */ | ||
158 | void | ||
159 | |||
160 | === modified file 'gcc/config/arm/predicates.md' | ||
161 | --- old/gcc/config/arm/predicates.md 2011-08-13 08:40:36 +0000 | ||
162 | +++ new/gcc/config/arm/predicates.md 2011-09-05 09:40:19 +0000 | ||
163 | @@ -242,10 +242,9 @@ | ||
164 | ;; True for integer comparisons and, if FP is active, for comparisons | ||
165 | ;; other than LTGT or UNEQ. | ||
166 | (define_special_predicate "arm_comparison_operator" | ||
167 | - (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu") | ||
168 | - (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT | ||
169 | - && (TARGET_FPA || TARGET_VFP)") | ||
170 | - (match_code "unordered,ordered,unlt,unle,unge,ungt")))) | ||
171 | + (and (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu, | ||
172 | + unordered,ordered,unlt,unle,unge,ungt") | ||
173 | + (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) | ||
174 | |||
175 | (define_special_predicate "lt_ge_comparison_operator" | ||
176 | (match_code "lt,ge")) | ||
177 | |||
178 | === added file 'gcc/testsuite/gcc.dg/torture/pr49030.c' | ||
179 | --- old/gcc/testsuite/gcc.dg/torture/pr49030.c 1970-01-01 00:00:00 +0000 | ||
180 | +++ new/gcc/testsuite/gcc.dg/torture/pr49030.c 2011-09-05 09:40:19 +0000 | ||
181 | @@ -0,0 +1,19 @@ | ||
182 | +void | ||
183 | +sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples, | ||
184 | + unsigned long dst_skip) | ||
185 | +{ | ||
186 | + long long y; | ||
187 | + while (nsamples--) | ||
188 | + { | ||
189 | + y = (long long) (*src * 8388608.0f) << 8; | ||
190 | + if (y > 2147483647) { | ||
191 | + *(int *) dst = 2147483647; | ||
192 | + } else if (y < -2147483647 - 1) { | ||
193 | + *(int *) dst = -2147483647 - 1; | ||
194 | + } else { | ||
195 | + *(int *) dst = (int) y; | ||
196 | + } | ||
197 | + dst += dst_skip; | ||
198 | + src++; | ||
199 | + } | ||
200 | +} | ||
201 | |||