diff options
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch')
-rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch | 76 |
1 files changed, 0 insertions, 76 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch deleted file mode 100644 index 02db2b4e7e..0000000000 --- a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | 2010-05-25 Julian Brown <julian@codesourcery.com> | ||
2 | |||
3 | gcc/ | ||
4 | * config/arm/arm.c (arm_tune_cortex_a5): New. | ||
5 | (arm_override_options): Set above. Set max_insns_skipped to 1 for | ||
6 | Cortex-A5. | ||
7 | * config/arm/arm.h (arm_tune_cortex_a5): Add declaration. | ||
8 | (BRANCH_COST): Set to zero for Cortex-A5 unless optimising for | ||
9 | size. | ||
10 | |||
11 | 2010-07-26 Julian Brown <julian@codesourcery.com> | ||
12 | |||
13 | Merge from Sourcery G++ 4.4: | ||
14 | |||
15 | 2009-08-26 Julian Brown <julian@codesourcery.com> | ||
16 | |||
17 | gcc/config/arm/ | ||
18 | |||
19 | === modified file 'gcc/config/arm/arm.c' | ||
20 | --- old/gcc/config/arm/arm.c 2010-08-12 14:08:29 +0000 | ||
21 | +++ new/gcc/config/arm/arm.c 2010-08-12 16:18:41 +0000 | ||
22 | @@ -671,6 +671,9 @@ | ||
23 | This typically means an ARM6 or ARM7 with MMU or MPU. */ | ||
24 | int arm_tune_wbuf = 0; | ||
25 | |||
26 | +/* Nonzero if tuning for Cortex-A5. */ | ||
27 | +int arm_tune_cortex_a5 = 0; | ||
28 | + | ||
29 | /* Nonzero if tuning for Cortex-A9. */ | ||
30 | int arm_tune_cortex_a9 = 0; | ||
31 | |||
32 | @@ -1582,6 +1585,7 @@ | ||
33 | arm_tune_xscale = (tune_flags & FL_XSCALE) != 0; | ||
34 | arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0; | ||
35 | arm_arch_hwdiv = (insn_flags & FL_DIV) != 0; | ||
36 | + arm_tune_cortex_a5 = (arm_tune == cortexa5) != 0; | ||
37 | arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; | ||
38 | |||
39 | /* If we are not using the default (ARM mode) section anchor offset | ||
40 | @@ -1880,6 +1884,11 @@ | ||
41 | that is worth skipping is shorter. */ | ||
42 | if (arm_tune_strongarm) | ||
43 | max_insns_skipped = 3; | ||
44 | + | ||
45 | + /* Branches can be dual-issued on Cortex-A5, so conditional execution is | ||
46 | + less appealing. */ | ||
47 | + if (arm_tune_cortex_a5) | ||
48 | + max_insns_skipped = 1; | ||
49 | } | ||
50 | |||
51 | /* Hot/Cold partitioning is not currently supported, since we can't | ||
52 | |||
53 | === modified file 'gcc/config/arm/arm.h' | ||
54 | --- old/gcc/config/arm/arm.h 2010-08-05 16:34:46 +0000 | ||
55 | +++ new/gcc/config/arm/arm.h 2010-08-12 16:18:41 +0000 | ||
56 | @@ -435,6 +435,9 @@ | ||
57 | /* Nonzero if tuning for stores via the write buffer. */ | ||
58 | extern int arm_tune_wbuf; | ||
59 | |||
60 | +/* Nonzero if tuning for Cortex-A5. */ | ||
61 | +extern int arm_tune_cortex_a5; | ||
62 | + | ||
63 | /* Nonzero if tuning for Cortex-A9. */ | ||
64 | extern int arm_tune_cortex_a9; | ||
65 | |||
66 | @@ -2222,7 +2225,8 @@ | ||
67 | /* Try to generate sequences that don't involve branches, we can then use | ||
68 | conditional instructions */ | ||
69 | #define BRANCH_COST(speed_p, predictable_p) \ | ||
70 | - (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \ | ||
71 | + (TARGET_32BIT ? ((arm_tune_cortex_a5 && !optimize_size) ? 0 \ | ||
72 | + : (TARGET_THUMB2 && optimize_size ? 1 : 4)) \ | ||
73 | : (optimize > 0 ? 2 : 0)) | ||
74 | |||
75 | /* Position Independent Code. */ | ||
76 | |||