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-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch40
1 files changed, 40 insertions, 0 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch
new file mode 100644
index 000000000..db53255de
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch
@@ -0,0 +1,40 @@
1 2011-02-02 Richard Sandiford <richard.sandiford@linaro.org>
2
3 gcc/testsuite/
4 PR target/47553
5 * gcc.target/arm/neon-vld-1.c: New test.
6 gcc/
7 PR target/47553
8 * config/arm/predicates.md (neon_lane_number): Accept 0..15.
9
10=== modified file 'gcc/config/arm/predicates.md'
11--- old/gcc/config/arm/predicates.md 2011-02-08 12:07:29 +0000
12+++ new/gcc/config/arm/predicates.md 2011-03-02 12:28:41 +0000
13@@ -607,7 +607,7 @@
14 ;; TODO: We could check lane numbers more precisely based on the mode.
15 (define_predicate "neon_lane_number"
16 (and (match_code "const_int")
17- (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
18+ (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
19 ;; Predicates for named expanders that overlap multiple ISAs.
20
21 (define_predicate "cmpdi_operand"
22
23=== added file 'gcc/testsuite/gcc.target/arm/neon-vld-1.c'
24--- old/gcc/testsuite/gcc.target/arm/neon-vld-1.c 1970-01-01 00:00:00 +0000
25+++ new/gcc/testsuite/gcc.target/arm/neon-vld-1.c 2011-02-02 13:57:54 +0000
26@@ -0,0 +1,13 @@
27+/* { dg-do compile } */
28+/* { dg-require-effective-target arm_neon_ok } */
29+/* { dg-options "-O1" } */
30+/* { dg-add-options arm_neon } */
31+
32+#include <arm_neon.h>
33+
34+uint8x16_t
35+foo (uint8_t *a, uint8x16_t b)
36+{
37+ vst1q_lane_u8 (a, b, 14);
38+ return vld1q_lane_u8 (a + 0x100, b, 15);
39+}
40