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authorKhem Raj <raj.khem@gmail.com>2011-06-18 00:37:23 +0000
committerKoen Kooi <koen@dominion.thruhere.net>2011-06-19 11:01:12 +0200
commit7d954ed266bef307285383c42d2070a8ef3b62a3 (patch)
treeb4c69f59f400106c9f12be310f914a14ad0835cc /meta-oe/recipes-devtools/gcc
parentc85efd2281af4556854107768d7583a8208b6647 (diff)
downloadmeta-openembedded-7d954ed266bef307285383c42d2070a8ef3b62a3.tar.gz
gcc-4.5: Upgrade to latest gcc-4_5-branch and linaro 4.5
Additionally fix ppc build break caused by linaro android config patches. Angstrom console-image built clean from scratch for arm ppc mips x86 x86_64 Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Diffstat (limited to 'meta-oe/recipes-devtools/gcc')
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5.inc32
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-config-fix.patch227
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-include-config-linux.h.patch73
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch278
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99503.patch6070
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99504.patch26
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99506.patch21
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99507.patch20
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99510.patch24
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99511.patch582
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99514.patch32
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99516.patch45
12 files changed, 7213 insertions, 217 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5.inc b/meta-oe/recipes-devtools/gcc/gcc-4.5.inc
index 7c166f25e2..774ee514f3 100644
--- a/meta-oe/recipes-devtools/gcc/gcc-4.5.inc
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5.inc
@@ -14,14 +14,21 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \
14 14
15 15
16PV = "4.5" 16PV = "4.5"
17INC_PR = "r36" 17INC_PR = "r37"
18# BINV should point to minor release
19BINV = "${PV}.3"
20 18
21SRC_URI[md5sum] = "8e0b5c12212e185f3e4383106bfa9cc6" 19# BINV should be incremented after updating to a revision
22SRC_URI[sha256sum] = "0a8847af44a9b33813b199997a73139517c96adfd519eaf24c79d4d9d09f65de" 20# after a minor gcc release (e.g. 4.5.1 or 4.5.2) has been made
21# the value will be minor-release+1 e.g. if minor release was
22# 4.5.1 then the value below will be 2 which will mean 4.5.2
23# which will be next minor release and so on.
23 24
24SRC_URI = "${GNU_MIRROR}/gcc/gcc-${BINV}/gcc-${BINV}.tar.bz2 \ 25BINV = "${PV}.4"
26
27SRCREV = 175127
28BRANCH = "gcc-4_5-branch"
29PR_append = "+svnr${SRCPV}"
30
31SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH};proto=http \
25 file://gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch \ 32 file://gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch \
26 file://100-uclibc-conf.patch \ 33 file://100-uclibc-conf.patch \
27 file://gcc-uclibc-locale-ctype_touplow_t.patch \ 34 file://gcc-uclibc-locale-ctype_touplow_t.patch \
@@ -177,6 +184,15 @@ SRC_URI = "${GNU_MIRROR}/gcc/gcc-${BINV}/gcc-${BINV}.tar.bz2 \
177 file://linaro/gcc-4.5-linaro-r99495.patch \ 184 file://linaro/gcc-4.5-linaro-r99495.patch \
178 file://linaro/gcc-4.5-linaro-r99498.patch \ 185 file://linaro/gcc-4.5-linaro-r99498.patch \
179 file://linaro/gcc-4.5-linaro-r99502.patch \ 186 file://linaro/gcc-4.5-linaro-r99502.patch \
187 file://linaro/gcc-4.5-linaro-r99503.patch \
188 file://linaro/gcc-4.5-linaro-r99504.patch \
189 file://linaro/gcc-4.5-linaro-r99506.patch \
190 file://linaro/gcc-4.5-linaro-r99507.patch \
191 file://linaro/gcc-4.5-linaro-r99510.patch \
192 file://linaro/gcc-4.5-linaro-r99511.patch \
193 file://linaro/gcc-4.5-linaro-r99514.patch \
194 file://linaro/gcc-4.5-linaro-r99516.patch \
195 \
180 file://more-epilogues.patch \ 196 file://more-epilogues.patch \
181 file://gcc-scalar-widening-pr45847.patch \ 197 file://gcc-scalar-widening-pr45847.patch \
182 file://gcc-arm-volatile-bitfield-fix.patch \ 198 file://gcc-arm-volatile-bitfield-fix.patch \
@@ -198,13 +214,15 @@ SRC_URI = "${GNU_MIRROR}/gcc/gcc-${BINV}/gcc-${BINV}.tar.bz2 \
198 file://COLLECT_GCC_OPTIONS.patch \ 214 file://COLLECT_GCC_OPTIONS.patch \
199 file://gcc-poison-dir-extend.patch \ 215 file://gcc-poison-dir-extend.patch \
200 file://gcc-poison-parameters.patch \ 216 file://gcc-poison-parameters.patch \
217 file://gcc-ppc-config-fix.patch \
218 file://gcc-ppc-include-config-linux.h.patch \
201 " 219 "
202 220
203# Language Overrides 221# Language Overrides
204FORTRAN = "" 222FORTRAN = ""
205JAVA = "" 223JAVA = ""
206 224
207S = "${WORKDIR}/gcc-${BINV}" 225S = "${WORKDIR}/${BRANCH}"
208 226
209#EXTRA_OECONF_BASE = " --enable-cheaders=c_std \ 227#EXTRA_OECONF_BASE = " --enable-cheaders=c_std \
210# --enable-libssp \ 228# --enable-libssp \
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-config-fix.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-config-fix.patch
new file mode 100644
index 0000000000..9c2c298882
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-config-fix.patch
@@ -0,0 +1,227 @@
1commit de784bee66a1ec1d0dad00d9eedbe9b1667dd883
2Author: jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>
3Date: Mon Dec 20 15:29:31 2010 +0000
4
5 * config/rs6000/freebsd.h (SVR4_ASM_SPEC): Don't define.
6 (DBX_REGISTER_NUMBER): Define.
7 * config/rs6000/lynx.h (DBX_REGISTER_NUMBER): Define.
8 * config/rs6000/netbsd.h (DBX_REGISTER_NUMBER): Define.
9 * config/rs6000/sysv4.h (SIZE_TYPE): Define.
10 (ASM_SPEC): Define without using SVR4_ASM_SPEC.
11 (DBX_REGISTER_NUMBER): Undefine.
12 * config.gcc (powerpc-*-eabispe*, powerpc-*-eabisimaltivec*,
13 powerpc-*-eabisim*, powerpc-*-elf*, powerpc-*-eabialtivec*,
14 powerpc-xilinx-eabi*, powerpc-*-eabi*, powerpc-*-rtems*,
15 powerpc-*-linux* | powerpc64-*-linux*, powerpc64-*-gnu*,
16 powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*,
17 powerpc-wrs-vxworks|powerpc-wrs-vxworksae, powerpcle-*-elf*,
18 powerpcle-*-eabisim*, powerpcle-*-eabi*): Don't use svr4.h.
19
20
21 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@168085 138bc75d-0d04-0410-961f-82ee72b054a4
22
23Index: gcc-4.5.3/gcc/config.gcc
24===================================================================
25--- gcc-4.5.3.orig/gcc/config.gcc 2011-06-15 21:18:55.000000000 -0700
26+++ gcc-4.5.3/gcc/config.gcc 2011-06-16 15:01:07.945285352 -0700
27@@ -1989,53 +1989,53 @@
28 extra_options="${extra_options} rs6000/sysv4.opt"
29 ;;
30 powerpc-*-eabispe*)
31- tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabispe.h"
32+ tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabispe.h"
33 extra_options="${extra_options} rs6000/sysv4.opt"
34 tmake_file="rs6000/t-spe rs6000/t-ppccomm"
35 use_gcc_stdint=wrap
36 ;;
37 powerpc-*-eabisimaltivec*)
38- tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h rs6000/eabialtivec.h"
39+ tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h rs6000/eabialtivec.h"
40 extra_options="${extra_options} rs6000/sysv4.opt"
41 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcendian rs6000/t-ppccomm"
42 use_gcc_stdint=wrap
43 ;;
44 powerpc-*-eabisim*)
45- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h"
46+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h"
47 extra_options="${extra_options} rs6000/sysv4.opt"
48 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
49 use_gcc_stdint=wrap
50 ;;
51 powerpc-*-elf*)
52- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h"
53+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h"
54 extra_options="${extra_options} rs6000/sysv4.opt"
55 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
56 ;;
57 powerpc-*-eabialtivec*)
58- tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabialtivec.h"
59+ tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabialtivec.h"
60 extra_options="${extra_options} rs6000/sysv4.opt"
61 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcendian rs6000/t-ppccomm"
62 use_gcc_stdint=wrap
63 ;;
64 powerpc-xilinx-eabi*)
65- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/singlefp.h rs6000/xfpu.h rs6000/xilinx.h"
66+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/singlefp.h rs6000/xfpu.h rs6000/xilinx.h"
67 extra_options="${extra_options} rs6000/sysv4.opt"
68 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm rs6000/t-xilinx"
69 use_gcc_stdint=wrap
70 ;;
71 powerpc-*-eabi*)
72- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
73+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
74 extra_options="${extra_options} rs6000/sysv4.opt"
75 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
76 use_gcc_stdint=wrap
77 ;;
78 powerpc-*-rtems*)
79- tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/rtems.h rtems.h"
80+ tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/rtems.h rtems.h"
81 extra_options="${extra_options} rs6000/sysv4.opt"
82 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-rtems t-rtems rs6000/t-ppccomm"
83 ;;
84 powerpc-*-linux* | powerpc64-*-linux*)
85- tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
86+ tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h rs6000/sysv4.h"
87 extra_options="${extra_options} rs6000/sysv4.opt"
88 tmake_file="t-dfprules rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
89 maybe_biarch=yes
90@@ -2079,12 +2079,12 @@
91 fi
92 ;;
93 powerpc64-*-gnu*)
94- tm_file="${tm_file} elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/default64.h rs6000/linux64.h rs6000/gnu.h glibc-stdint.h"
95+ tm_file="${tm_file} elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/default64.h rs6000/linux64.h rs6000/gnu.h glibc-stdint.h"
96 extra_options="${extra_options} rs6000/sysv4.opt rs6000/linux64.opt"
97 tmake_file="t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu"
98 ;;
99 powerpc-*-gnu-gnualtivec*)
100- tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h glibc-stdint.h"
101+ tm_file="${cpu_type}/${cpu_type}.h elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h glibc-stdint.h"
102 extra_options="${extra_options} rs6000/sysv4.opt"
103 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcos t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu rs6000/t-ppccomm"
104 if test x$enable_threads = xyes; then
105@@ -2092,7 +2092,7 @@
106 fi
107 ;;
108 powerpc-*-gnu*)
109- tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/gnu.h glibc-stdint.h"
110+ tm_file="${cpu_type}/${cpu_type}.h elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/gnu.h glibc-stdint.h"
111 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcos t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu rs6000/t-ppccomm"
112 extra_options="${extra_options} rs6000/sysv4.opt"
113 if test x$enable_threads = xyes; then
114@@ -2100,7 +2100,7 @@
115 fi
116 ;;
117 powerpc-wrs-vxworks|powerpc-wrs-vxworksae)
118- tm_file="${tm_file} elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
119+ tm_file="${tm_file} elfos.h freebsd-spec.h rs6000/sysv4.h"
120 tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppccomm rs6000/t-vxworks"
121 extra_options="${extra_options} rs6000/sysv4.opt"
122 extra_headers=ppc-asm.h
123@@ -2126,18 +2126,18 @@
124 gas=yes
125 ;;
126 powerpcle-*-elf*)
127- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h"
128+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h"
129 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
130 extra_options="${extra_options} rs6000/sysv4.opt"
131 ;;
132 powerpcle-*-eabisim*)
133- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h"
134+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h rs6000/e500.h rs6000/eabisim.h"
135 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
136 extra_options="${extra_options} rs6000/sysv4.opt"
137 use_gcc_stdint=wrap
138 ;;
139 powerpcle-*-eabi*)
140- tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h rs6000/e500.h"
141+ tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h rs6000/e500.h"
142 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
143 extra_options="${extra_options} rs6000/sysv4.opt"
144 use_gcc_stdint=wrap
145Index: gcc-4.5.3/gcc/config/rs6000/freebsd.h
146===================================================================
147--- gcc-4.5.3.orig/gcc/config/rs6000/freebsd.h 2009-08-10 11:23:57.000000000 -0700
148+++ gcc-4.5.3/gcc/config/rs6000/freebsd.h 2011-06-16 15:02:02.775285339 -0700
149@@ -69,6 +69,4 @@
150 /* Override rs6000.h definition. */
151 #undef ASM_APP_OFF
152 #define ASM_APP_OFF "#NO_APP\n"
153-/* Define SVR4_ASM_SPEC, we use GAS by default. See svr4.h for details. */
154-#define SVR4_ASM_SPEC \
155- "%{v:-V} %{Wa,*:%*}"
156+#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)
157Index: gcc-4.5.3/gcc/config/rs6000/lynx.h
158===================================================================
159--- gcc-4.5.3.orig/gcc/config/rs6000/lynx.h 2007-08-02 03:49:31.000000000 -0700
160+++ gcc-4.5.3/gcc/config/rs6000/lynx.h 2011-06-16 15:01:07.945285352 -0700
161@@ -1,5 +1,5 @@
162 /* Definitions for Rs6000 running LynxOS.
163- Copyright (C) 1995, 1996, 2000, 2002, 2003, 2004, 2005, 2007
164+ Copyright (C) 1995, 1996, 2000, 2002, 2003, 2004, 2005, 2007, 2010
165 Free Software Foundation, Inc.
166 Contributed by David Henkel-Wallace, Cygnus Support (gumby@cygnus.com)
167 Rewritten by Adam Nemet, LynuxWorks Inc.
168@@ -105,6 +105,8 @@
169 #undef HAVE_AS_TLS
170 #define HAVE_AS_TLS 0
171
172+#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)
173+
174 #ifdef CRT_BEGIN
175 /* This function is part of crtbegin*.o which is at the beginning of
176 the link and is called from .fini which is usually toward the end
177Index: gcc-4.5.3/gcc/config/rs6000/netbsd.h
178===================================================================
179--- gcc-4.5.3.orig/gcc/config/rs6000/netbsd.h 2009-02-20 07:20:38.000000000 -0800
180+++ gcc-4.5.3/gcc/config/rs6000/netbsd.h 2011-06-16 15:01:07.945285352 -0700
181@@ -1,6 +1,6 @@
182 /* Definitions of target machine for GNU compiler,
183 for PowerPC NetBSD systems.
184- Copyright 2002, 2003, 2007, 2008 Free Software Foundation, Inc.
185+ Copyright 2002, 2003, 2007, 2008, 2010 Free Software Foundation, Inc.
186 Contributed by Wasabi Systems, Inc.
187
188 This file is part of GCC.
189@@ -89,3 +89,5 @@
190
191 #undef TARGET_VERSION
192 #define TARGET_VERSION fprintf (stderr, " (NetBSD/powerpc ELF)");
193+
194+#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)
195Index: gcc-4.5.3/gcc/config/rs6000/sysv4.h
196===================================================================
197--- gcc-4.5.3.orig/gcc/config/rs6000/sysv4.h 2011-06-15 21:18:57.000000000 -0700
198+++ gcc-4.5.3/gcc/config/rs6000/sysv4.h 2011-06-16 15:01:07.945285352 -0700
199@@ -293,6 +293,10 @@
200 #define RESTORE_FP_PREFIX "_restfpr_"
201 #define RESTORE_FP_SUFFIX ""
202
203+/* Type used for size_t, as a string used in a declaration. */
204+#undef SIZE_TYPE
205+#define SIZE_TYPE "unsigned int"
206+
207 /* Type used for ptrdiff_t, as a string used in a declaration. */
208 #define PTRDIFF_TYPE "int"
209
210@@ -588,9 +592,8 @@
211 /* Override svr4.h definition. */
212 #undef ASM_SPEC
213 #define ASM_SPEC "%(asm_cpu) \
214-%{,assembler|,assembler-with-cpp: %{mregnames} %{mno-regnames}}" \
215-SVR4_ASM_SPEC \
216-"%{mrelocatable} %{mrelocatable-lib} %{fpic|fpie|fPIC|fPIE:-K PIC} \
217+%{,assembler|,assembler-with-cpp: %{mregnames} %{mno-regnames}} \
218+%{mrelocatable} %{mrelocatable-lib} %{fpic|fpie|fPIC|fPIE:-K PIC} \
219 %{memb|msdata=eabi: -memb} \
220 %{mlittle|mlittle-endian:-mlittle; \
221 mbig|mbig-endian :-mbig; \
222@@ -1127,3 +1130,5 @@
223
224 /* This target uses the sysv4.opt file. */
225 #define TARGET_USES_SYSV4_OPT 1
226+
227+#undef DBX_REGISTER_NUMBER
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-include-config-linux.h.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-include-config-linux.h.patch
new file mode 100644
index 0000000000..97364d9b14
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ppc-include-config-linux.h.patch
@@ -0,0 +1,73 @@
1The patch is a solution for https://bugs.launchpad.net/ubuntu/+source/gcc-4.5/+bug/768921
2
3-Khem
4
5Index: gcc-4_5-branch/gcc/config.gcc
6===================================================================
7--- gcc-4_5-branch.orig/gcc/config.gcc 2011-06-16 21:23:22.000000000 -0700
8+++ gcc-4_5-branch/gcc/config.gcc 2011-06-16 21:51:20.845279713 -0700
9@@ -2035,7 +2035,7 @@
10 tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-rtems t-rtems rs6000/t-ppccomm"
11 ;;
12 powerpc-*-linux* | powerpc64-*-linux*)
13- tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h rs6000/sysv4.h"
14+ tm_file="${tm_file} dbxelf.h elfos.h linux.h freebsd-spec.h rs6000/sysv4.h"
15 extra_options="${extra_options} rs6000/sysv4.opt"
16 tmake_file="t-dfprules rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
17 maybe_biarch=yes
18Index: gcc-4_5-branch/gcc/config/rs6000/sysv4.h
19===================================================================
20--- gcc-4_5-branch.orig/gcc/config/rs6000/sysv4.h 2011-06-16 21:23:22.000000000 -0700
21+++ gcc-4_5-branch/gcc/config/rs6000/sysv4.h 2011-06-16 22:08:49.425279473 -0700
22@@ -620,6 +620,7 @@
23 #define CC1_SECURE_PLT_DEFAULT_SPEC ""
24 #endif
25
26+#undef CC1_SPEC
27 /* Pass -G xxx to the compiler and set correct endian mode. */
28 #define CC1_SPEC "%{G*} %(cc1_cpu) \
29 %{mlittle|mlittle-endian: %(cc1_endian_little); \
30@@ -903,22 +904,13 @@
31 #define LINK_START_LINUX_SPEC ""
32
33 #define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
34-#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
35-#if DEFAULT_LIBC == LIBC_UCLIBC
36-#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
37-#elif DEFAULT_LIBC == LIBC_GLIBC
38-#define CHOOSE_DYNAMIC_LINKER(G, U) "%{muclibc:" U ";:" G "}"
39-#else
40-#error "Unsupported DEFAULT_LIBC"
41-#endif
42-#define LINUX_DYNAMIC_LINKER \
43- CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER)
44
45 #define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \
46 %{rdynamic:-export-dynamic} \
47 %{!dynamic-linker:-dynamic-linker " LINUX_DYNAMIC_LINKER "}}}"
48
49 #if defined(HAVE_LD_EH_FRAME_HDR)
50+# undef LINK_EH_SPEC
51 # define LINK_EH_SPEC "--no-add-needed %{!static:--eh-frame-hdr} "
52 #endif
53
54@@ -1113,6 +1105,7 @@
55 be stacked, so that invocations of #pragma pack(pop)' will return
56 to the previous value. */
57
58+#undef HANDLE_PRAGMA_PACK_PUSH_POP
59 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
60
61 /* Select a format to encode pointers in exception handling data. CODE
62Index: gcc-4_5-branch/gcc/config/freebsd-spec.h
63===================================================================
64--- gcc-4_5-branch.orig/gcc/config/freebsd-spec.h 2011-06-16 17:59:03.000000000 -0700
65+++ gcc-4_5-branch/gcc/config/freebsd-spec.h 2011-06-16 22:11:34.145279435 -0700
66@@ -154,6 +154,7 @@
67 #endif
68
69 #if defined(HAVE_LD_EH_FRAME_HDR)
70+#undef LINK_EH_SPEC
71 #define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
72 #endif
73
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
index aa9d6aa368..ec0eebdf04 100644
--- a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
@@ -98,8 +98,8 @@
98=== added file 'gcc/config/arm/arm-ldmstm.ml' 98=== added file 'gcc/config/arm/arm-ldmstm.ml'
99Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml 99Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
100=================================================================== 100===================================================================
101--- /dev/null 101--- /dev/null 1970-01-01 00:00:00.000000000 +0000
102+++ gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml 102+++ gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml 2011-06-16 18:46:26.355282255 -0700
103@@ -0,0 +1,333 @@ 103@@ -0,0 +1,333 @@
104+(* Auto-generate ARM ldm/stm patterns 104+(* Auto-generate ARM ldm/stm patterns
105+ Copyright (C) 2010 Free Software Foundation, Inc. 105+ Copyright (C) 2010 Free Software Foundation, Inc.
@@ -436,9 +436,9 @@ Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
436+ patterns (); 436+ patterns ();
437Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h 437Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
438=================================================================== 438===================================================================
439--- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h 439--- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h 2011-06-16 18:46:18.000000000 -0700
440+++ gcc-4_5-branch/gcc/config/arm/arm-protos.h 440+++ gcc-4_5-branch/gcc/config/arm/arm-protos.h 2011-06-16 18:46:26.355282255 -0700
441@@ -100,14 +100,11 @@ extern int symbol_mentioned_p (rtx); 441@@ -99,14 +99,11 @@
442 extern int label_mentioned_p (rtx); 442 extern int label_mentioned_p (rtx);
443 extern RTX_CODE minmax_code (rtx); 443 extern RTX_CODE minmax_code (rtx);
444 extern int adjacent_mem_locations (rtx, rtx); 444 extern int adjacent_mem_locations (rtx, rtx);
@@ -460,9 +460,9 @@ Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
460 extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx, 460 extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
461Index: gcc-4_5-branch/gcc/config/arm/arm.c 461Index: gcc-4_5-branch/gcc/config/arm/arm.c
462=================================================================== 462===================================================================
463--- gcc-4_5-branch.orig/gcc/config/arm/arm.c 463--- gcc-4_5-branch.orig/gcc/config/arm/arm.c 2011-06-16 18:46:23.000000000 -0700
464+++ gcc-4_5-branch/gcc/config/arm/arm.c 464+++ gcc-4_5-branch/gcc/config/arm/arm.c 2011-06-16 18:46:26.365282255 -0700
465@@ -753,6 +753,12 @@ static const char * const arm_condition_ 465@@ -753,6 +753,12 @@
466 "hi", "ls", "ge", "lt", "gt", "le", "al", "nv" 466 "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
467 }; 467 };
468 468
@@ -475,7 +475,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
475 #define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl") 475 #define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl")
476 #define streq(string1, string2) (strcmp (string1, string2) == 0) 476 #define streq(string1, string2) (strcmp (string1, string2) == 0)
477 477
478@@ -9680,24 +9686,125 @@ adjacent_mem_locations (rtx a, rtx b) 478@@ -9668,24 +9674,125 @@
479 return 0; 479 return 0;
480 } 480 }
481 481
@@ -612,7 +612,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
612 612
613 /* Loop over the operands and check that the memory references are 613 /* Loop over the operands and check that the memory references are
614 suitable (i.e. immediate offsets from the same base register). At 614 suitable (i.e. immediate offsets from the same base register). At
615@@ -9735,32 +9842,30 @@ load_multiple_sequence (rtx *operands, i 615@@ -9723,32 +9830,30 @@
616 if (i == 0) 616 if (i == 0)
617 { 617 {
618 base_reg = REGNO (reg); 618 base_reg = REGNO (reg);
@@ -659,7 +659,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
659 } 659 }
660 else 660 else
661 /* Not a suitable memory address. */ 661 /* Not a suitable memory address. */
662@@ -9769,167 +9874,90 @@ load_multiple_sequence (rtx *operands, i 662@@ -9757,167 +9862,90 @@
663 663
664 /* All the useful information has now been extracted from the 664 /* All the useful information has now been extracted from the
665 operands into unsorted_regs and unsorted_offsets; additionally, 665 operands into unsorted_regs and unsorted_offsets; additionally,
@@ -888,7 +888,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
888 888
889 /* Loop over the operands and check that the memory references are 889 /* Loop over the operands and check that the memory references are
890 suitable (i.e. immediate offsets from the same base register). At 890 suitable (i.e. immediate offsets from the same base register). At
891@@ -9964,32 +9992,32 @@ store_multiple_sequence (rtx *operands, 891@@ -9952,32 +9980,32 @@
892 && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1)) 892 && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
893 == CONST_INT))) 893 == CONST_INT)))
894 { 894 {
@@ -937,7 +937,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
937 } 937 }
938 else 938 else
939 /* Not a suitable memory address. */ 939 /* Not a suitable memory address. */
940@@ -9998,111 +10026,65 @@ store_multiple_sequence (rtx *operands, 940@@ -9986,111 +10014,65 @@
941 941
942 /* All the useful information has now been extracted from the 942 /* All the useful information has now been extracted from the
943 operands into unsorted_regs and unsorted_offsets; additionally, 943 operands into unsorted_regs and unsorted_offsets; additionally,
@@ -1087,7 +1087,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1087 1087
1088 /* XScale has load-store double instructions, but they have stricter 1088 /* XScale has load-store double instructions, but they have stricter
1089 alignment requirements than load-store multiple, so we cannot 1089 alignment requirements than load-store multiple, so we cannot
1090@@ -10139,18 +10121,10 @@ arm_gen_load_multiple (int base_regno, i 1090@@ -10127,18 +10109,10 @@
1091 start_sequence (); 1091 start_sequence ();
1092 1092
1093 for (i = 0; i < count; i++) 1093 for (i = 0; i < count; i++)
@@ -1109,7 +1109,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1109 1109
1110 seq = get_insns (); 1110 seq = get_insns ();
1111 end_sequence (); 1111 end_sequence ();
1112@@ -10159,41 +10133,40 @@ arm_gen_load_multiple (int base_regno, i 1112@@ -10147,41 +10121,40 @@
1113 } 1113 }
1114 1114
1115 result = gen_rtx_PARALLEL (VOIDmode, 1115 result = gen_rtx_PARALLEL (VOIDmode,
@@ -1170,7 +1170,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1170 the pros/cons of ldm/stm usage for XScale. */ 1170 the pros/cons of ldm/stm usage for XScale. */
1171 if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size)) 1171 if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
1172 { 1172 {
1173@@ -10202,18 +10175,10 @@ arm_gen_store_multiple (int base_regno, 1173@@ -10190,18 +10163,10 @@
1174 start_sequence (); 1174 start_sequence ();
1175 1175
1176 for (i = 0; i < count; i++) 1176 for (i = 0; i < count; i++)
@@ -1192,7 +1192,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1192 1192
1193 seq = get_insns (); 1193 seq = get_insns ();
1194 end_sequence (); 1194 end_sequence ();
1195@@ -10222,29 +10187,319 @@ arm_gen_store_multiple (int base_regno, 1195@@ -10210,29 +10175,319 @@
1196 } 1196 }
1197 1197
1198 result = gen_rtx_PARALLEL (VOIDmode, 1198 result = gen_rtx_PARALLEL (VOIDmode,
@@ -1522,7 +1522,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1522 } 1522 }
1523 1523
1524 int 1524 int
1525@@ -10280,20 +10535,21 @@ arm_gen_movmemqi (rtx *operands) 1525@@ -10268,20 +10523,21 @@
1526 for (i = 0; in_words_to_go >= 2; i+=4) 1526 for (i = 0; in_words_to_go >= 2; i+=4)
1527 { 1527 {
1528 if (in_words_to_go > 4) 1528 if (in_words_to_go > 4)
@@ -1554,9 +1554,9 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.c
1554 dstbase, &dstoffset)); 1554 dstbase, &dstoffset));
1555Index: gcc-4_5-branch/gcc/config/arm/arm.h 1555Index: gcc-4_5-branch/gcc/config/arm/arm.h
1556=================================================================== 1556===================================================================
1557--- gcc-4_5-branch.orig/gcc/config/arm/arm.h 1557--- gcc-4_5-branch.orig/gcc/config/arm/arm.h 2011-06-16 18:46:20.000000000 -0700
1558+++ gcc-4_5-branch/gcc/config/arm/arm.h 1558+++ gcc-4_5-branch/gcc/config/arm/arm.h 2011-06-16 18:46:26.375282255 -0700
1559@@ -1143,6 +1143,9 @@ extern int arm_structure_size_boundary; 1559@@ -1143,6 +1143,9 @@
1560 ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \ 1560 ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
1561 || (MODE) == CImode || (MODE) == XImode) 1561 || (MODE) == CImode || (MODE) == XImode)
1562 1562
@@ -1566,7 +1566,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.h
1566 /* The order in which register should be allocated. It is good to use ip 1566 /* The order in which register should be allocated. It is good to use ip
1567 since no saving is required (though calls clobber it) and it never contains 1567 since no saving is required (though calls clobber it) and it never contains
1568 function parameters. It is quite good to use lr since other calls may 1568 function parameters. It is quite good to use lr since other calls may
1569@@ -2823,4 +2826,8 @@ enum arm_builtins 1569@@ -2821,4 +2824,8 @@
1570 #define NEED_INDICATE_EXEC_STACK 0 1570 #define NEED_INDICATE_EXEC_STACK 0
1571 #endif 1571 #endif
1572 1572
@@ -1577,8 +1577,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.h
1577 #endif /* ! GCC_ARM_H */ 1577 #endif /* ! GCC_ARM_H */
1578Index: gcc-4_5-branch/gcc/config/arm/arm.md 1578Index: gcc-4_5-branch/gcc/config/arm/arm.md
1579=================================================================== 1579===================================================================
1580--- gcc-4_5-branch.orig/gcc/config/arm/arm.md 1580--- gcc-4_5-branch.orig/gcc/config/arm/arm.md 2011-06-16 18:46:23.000000000 -0700
1581+++ gcc-4_5-branch/gcc/config/arm/arm.md 1581+++ gcc-4_5-branch/gcc/config/arm/arm.md 2011-06-16 18:46:26.375282255 -0700
1582@@ -6282,7 +6282,7 @@ 1582@@ -6282,7 +6282,7 @@
1583 1583
1584 ;; load- and store-multiple insns 1584 ;; load- and store-multiple insns
@@ -1847,7 +1847,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
1847 1847
1848 ;; Move a block of memory if it is word aligned and MORE than 2 words long. 1848 ;; Move a block of memory if it is word aligned and MORE than 2 words long.
1849 ;; We could let this apply for blocks of less than this, but it clobbers so 1849 ;; We could let this apply for blocks of less than this, but it clobbers so
1850@@ -9031,8 +8804,8 @@ 1850@@ -9025,8 +8798,8 @@
1851 if (REGNO (reg) == R0_REGNUM) 1851 if (REGNO (reg) == R0_REGNUM)
1852 { 1852 {
1853 /* On thumb we have to use a write-back instruction. */ 1853 /* On thumb we have to use a write-back instruction. */
@@ -1858,7 +1858,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
1858 size = TARGET_ARM ? 16 : 0; 1858 size = TARGET_ARM ? 16 : 0;
1859 } 1859 }
1860 else 1860 else
1861@@ -9078,8 +8851,8 @@ 1861@@ -9072,8 +8845,8 @@
1862 if (REGNO (reg) == R0_REGNUM) 1862 if (REGNO (reg) == R0_REGNUM)
1863 { 1863 {
1864 /* On thumb we have to use a write-back instruction. */ 1864 /* On thumb we have to use a write-back instruction. */
@@ -1869,7 +1869,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
1869 size = TARGET_ARM ? 16 : 0; 1869 size = TARGET_ARM ? 16 : 0;
1870 } 1870 }
1871 else 1871 else
1872@@ -10672,87 +10445,6 @@ 1872@@ -10666,87 +10439,6 @@
1873 "" 1873 ""
1874 ) 1874 )
1875 1875
@@ -1957,7 +1957,7 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
1957 (define_split 1957 (define_split
1958 [(set (match_operand:SI 0 "s_register_operand" "") 1958 [(set (match_operand:SI 0 "s_register_operand" "")
1959 (and:SI (ge:SI (match_operand:SI 1 "s_register_operand" "") 1959 (and:SI (ge:SI (match_operand:SI 1 "s_register_operand" "")
1960@@ -11554,6 +11246,8 @@ 1960@@ -11549,6 +11241,8 @@
1961 " 1961 "
1962 ) 1962 )
1963 1963
@@ -1968,8 +1968,8 @@ Index: gcc-4_5-branch/gcc/config/arm/arm.md
1968 ;; Load the Maverick co-processor patterns 1968 ;; Load the Maverick co-processor patterns
1969Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md 1969Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md
1970=================================================================== 1970===================================================================
1971--- /dev/null 1971--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1972+++ gcc-4_5-branch/gcc/config/arm/ldmstm.md 1972+++ gcc-4_5-branch/gcc/config/arm/ldmstm.md 2011-06-16 18:46:26.375282255 -0700
1973@@ -0,0 +1,1191 @@ 1973@@ -0,0 +1,1191 @@
1974+/* ARM ldm/stm instruction patterns. This file was automatically generated 1974+/* ARM ldm/stm instruction patterns. This file was automatically generated
1975+ using arm-ldmstm.ml. Please do not edit manually. 1975+ using arm-ldmstm.ml. Please do not edit manually.
@@ -3164,8 +3164,8 @@ Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md
3164+ 3164+
3165Index: gcc-4_5-branch/gcc/config/arm/predicates.md 3165Index: gcc-4_5-branch/gcc/config/arm/predicates.md
3166=================================================================== 3166===================================================================
3167--- gcc-4_5-branch.orig/gcc/config/arm/predicates.md 3167--- gcc-4_5-branch.orig/gcc/config/arm/predicates.md 2011-06-16 18:46:18.000000000 -0700
3168+++ gcc-4_5-branch/gcc/config/arm/predicates.md 3168+++ gcc-4_5-branch/gcc/config/arm/predicates.md 2011-06-16 18:46:26.375282255 -0700
3169@@ -211,6 +211,11 @@ 3169@@ -211,6 +211,11 @@
3170 (and (match_code "ior,xor,and") 3170 (and (match_code "ior,xor,and")
3171 (match_test "mode == GET_MODE (op)"))) 3171 (match_test "mode == GET_MODE (op)")))
@@ -3314,9 +3314,9 @@ Index: gcc-4_5-branch/gcc/config/arm/predicates.md
3314 return true; 3314 return true;
3315Index: gcc-4_5-branch/gcc/config/i386/i386.md 3315Index: gcc-4_5-branch/gcc/config/i386/i386.md
3316=================================================================== 3316===================================================================
3317--- gcc-4_5-branch.orig/gcc/config/i386/i386.md 3317--- gcc-4_5-branch.orig/gcc/config/i386/i386.md 2011-06-16 18:46:21.000000000 -0700
3318+++ gcc-4_5-branch/gcc/config/i386/i386.md 3318+++ gcc-4_5-branch/gcc/config/i386/i386.md 2011-06-16 18:46:26.385282255 -0700
3319@@ -4934,6 +4934,7 @@ 3319@@ -4960,6 +4960,7 @@
3320 (set (match_operand:SSEMODEI24 2 "register_operand" "") 3320 (set (match_operand:SSEMODEI24 2 "register_operand" "")
3321 (fix:SSEMODEI24 (match_dup 0)))] 3321 (fix:SSEMODEI24 (match_dup 0)))]
3322 "TARGET_SHORTEN_X87_SSE 3322 "TARGET_SHORTEN_X87_SSE
@@ -3324,7 +3324,7 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
3324 && peep2_reg_dead_p (2, operands[0])" 3324 && peep2_reg_dead_p (2, operands[0])"
3325 [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))] 3325 [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))]
3326 "") 3326 "")
3327@@ -20036,15 +20037,14 @@ 3327@@ -20057,15 +20058,14 @@
3328 ;; leal (%edx,%eax,4), %eax 3328 ;; leal (%edx,%eax,4), %eax
3329 3329
3330 (define_peephole2 3330 (define_peephole2
@@ -3345,7 +3345,7 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
3345 (clobber (reg:CC FLAGS_REG))])] 3345 (clobber (reg:CC FLAGS_REG))])]
3346 "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3 3346 "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3
3347 /* Validate MODE for lea. */ 3347 /* Validate MODE for lea. */
3348@@ -20053,31 +20053,27 @@ 3348@@ -20074,31 +20074,27 @@
3349 || GET_MODE (operands[0]) == HImode)) 3349 || GET_MODE (operands[0]) == HImode))
3350 || GET_MODE (operands[0]) == SImode 3350 || GET_MODE (operands[0]) == SImode
3351 || (TARGET_64BIT && GET_MODE (operands[0]) == DImode)) 3351 || (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
@@ -3389,87 +3389,11 @@ Index: gcc-4_5-branch/gcc/config/i386/i386.md
3389 operands[0] = dest; 3389 operands[0] = dest;
3390 }) 3390 })
3391 3391
3392Index: gcc-4_5-branch/gcc/df-problems.c
3393===================================================================
3394--- gcc-4_5-branch.orig/gcc/df-problems.c
3395+++ gcc-4_5-branch/gcc/df-problems.c
3396@@ -3748,9 +3748,22 @@ df_simulate_find_defs (rtx insn, bitmap
3397 for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
3398 {
3399 df_ref def = *def_rec;
3400- /* If the def is to only part of the reg, it does
3401- not kill the other defs that reach here. */
3402- if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
3403+ bitmap_set_bit (defs, DF_REF_REGNO (def));
3404+ }
3405+}
3406+
3407+/* Find the set of real DEFs, which are not clobbers, for INSN. */
3408+
3409+void
3410+df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
3411+{
3412+ df_ref *def_rec;
3413+ unsigned int uid = INSN_UID (insn);
3414+
3415+ for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
3416+ {
3417+ df_ref def = *def_rec;
3418+ if (!(DF_REF_FLAGS (def) & (DF_REF_MUST_CLOBBER | DF_REF_MAY_CLOBBER)))
3419 bitmap_set_bit (defs, DF_REF_REGNO (def));
3420 }
3421 }
3422@@ -3921,7 +3934,7 @@ df_simulate_initialize_forwards (basic_b
3423 {
3424 df_ref def = *def_rec;
3425 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
3426- bitmap_clear_bit (live, DF_REF_REGNO (def));
3427+ bitmap_set_bit (live, DF_REF_REGNO (def));
3428 }
3429 }
3430
3431@@ -3942,7 +3955,7 @@ df_simulate_one_insn_forwards (basic_blo
3432 while here the scan is performed forwards! So, first assume that the
3433 def is live, and if this is not true REG_UNUSED notes will rectify the
3434 situation. */
3435- df_simulate_find_defs (insn, live);
3436+ df_simulate_find_noclobber_defs (insn, live);
3437
3438 /* Clear all of the registers that go dead. */
3439 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
3440Index: gcc-4_5-branch/gcc/df.h
3441===================================================================
3442--- gcc-4_5-branch.orig/gcc/df.h
3443+++ gcc-4_5-branch/gcc/df.h
3444@@ -978,6 +978,7 @@ extern void df_note_add_problem (void);
3445 extern void df_md_add_problem (void);
3446 extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);
3447 extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);
3448+extern void df_simulate_find_noclobber_defs (rtx, bitmap);
3449 extern void df_simulate_find_defs (rtx, bitmap);
3450 extern void df_simulate_defs (rtx, bitmap);
3451 extern void df_simulate_uses (rtx, bitmap);
3452Index: gcc-4_5-branch/gcc/fwprop.c
3453===================================================================
3454--- gcc-4_5-branch.orig/gcc/fwprop.c
3455+++ gcc-4_5-branch/gcc/fwprop.c
3456@@ -228,7 +228,10 @@ single_def_use_enter_block (struct dom_w
3457
3458 process_uses (df_get_artificial_uses (bb_index), DF_REF_AT_TOP);
3459 process_defs (df_get_artificial_defs (bb_index), DF_REF_AT_TOP);
3460- df_simulate_initialize_forwards (bb, local_lr);
3461+
3462+ /* We don't call df_simulate_initialize_forwards, as it may overestimate
3463+ the live registers if there are unused artificial defs. We prefer
3464+ liveness to be underestimated. */
3465
3466 FOR_BB_INSNS (bb, insn)
3467 if (INSN_P (insn))
3468Index: gcc-4_5-branch/gcc/genoutput.c 3392Index: gcc-4_5-branch/gcc/genoutput.c
3469=================================================================== 3393===================================================================
3470--- gcc-4_5-branch.orig/gcc/genoutput.c 3394--- gcc-4_5-branch.orig/gcc/genoutput.c 2011-06-16 17:59:04.000000000 -0700
3471+++ gcc-4_5-branch/gcc/genoutput.c 3395+++ gcc-4_5-branch/gcc/genoutput.c 2011-06-16 18:46:26.385282255 -0700
3472@@ -266,6 +266,8 @@ output_operand_data (void) 3396@@ -266,6 +266,8 @@
3473 3397
3474 printf (" %d,\n", d->strict_low); 3398 printf (" %d,\n", d->strict_low);
3475 3399
@@ -3480,9 +3404,9 @@ Index: gcc-4_5-branch/gcc/genoutput.c
3480 printf(" },\n"); 3404 printf(" },\n");
3481Index: gcc-4_5-branch/gcc/genrecog.c 3405Index: gcc-4_5-branch/gcc/genrecog.c
3482=================================================================== 3406===================================================================
3483--- gcc-4_5-branch.orig/gcc/genrecog.c 3407--- gcc-4_5-branch.orig/gcc/genrecog.c 2011-06-16 17:59:04.000000000 -0700
3484+++ gcc-4_5-branch/gcc/genrecog.c 3408+++ gcc-4_5-branch/gcc/genrecog.c 2011-06-16 18:46:26.395282255 -0700
3485@@ -1782,20 +1782,11 @@ change_state (const char *oldpos, const 3409@@ -1782,20 +1782,11 @@
3486 int odepth = strlen (oldpos); 3410 int odepth = strlen (oldpos);
3487 int ndepth = strlen (newpos); 3411 int ndepth = strlen (newpos);
3488 int depth; 3412 int depth;
@@ -3503,77 +3427,11 @@ Index: gcc-4_5-branch/gcc/genrecog.c
3503 /* Go down to desired level. */ 3427 /* Go down to desired level. */
3504 while (depth < ndepth) 3428 while (depth < ndepth)
3505 { 3429 {
3506Index: gcc-4_5-branch/gcc/ifcvt.c
3507===================================================================
3508--- gcc-4_5-branch.orig/gcc/ifcvt.c
3509+++ gcc-4_5-branch/gcc/ifcvt.c
3510@@ -4011,6 +4011,7 @@ dead_or_predicable (basic_block test_bb,
3511 basic_block new_dest = dest_edge->dest;
3512 rtx head, end, jump, earliest = NULL_RTX, old_dest;
3513 bitmap merge_set = NULL;
3514+ bitmap merge_set_noclobber = NULL;
3515 /* Number of pending changes. */
3516 int n_validated_changes = 0;
3517 rtx new_dest_label;
3518@@ -4169,6 +4170,7 @@ dead_or_predicable (basic_block test_bb,
3519 end of the block. */
3520
3521 merge_set = BITMAP_ALLOC (&reg_obstack);
3522+ merge_set_noclobber = BITMAP_ALLOC (&reg_obstack);
3523
3524 /* If we allocated new pseudos (e.g. in the conditional move
3525 expander called from noce_emit_cmove), we must resize the
3526@@ -4187,6 +4189,7 @@ dead_or_predicable (basic_block test_bb,
3527 df_ref def = *def_rec;
3528 bitmap_set_bit (merge_set, DF_REF_REGNO (def));
3529 }
3530+ df_simulate_find_noclobber_defs (insn, merge_set_noclobber);
3531 }
3532 }
3533
3534@@ -4197,7 +4200,7 @@ dead_or_predicable (basic_block test_bb,
3535 unsigned i;
3536 bitmap_iterator bi;
3537
3538- EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
3539+ EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)
3540 {
3541 if (i < FIRST_PSEUDO_REGISTER
3542 && ! fixed_regs[i]
3543@@ -4233,7 +4236,7 @@ dead_or_predicable (basic_block test_bb,
3544 TEST_SET & DF_LIVE_IN (merge_bb)
3545 are empty. */
3546
3547- if (bitmap_intersect_p (merge_set, test_set)
3548+ if (bitmap_intersect_p (merge_set_noclobber, test_set)
3549 || bitmap_intersect_p (merge_set, test_live)
3550 || bitmap_intersect_p (test_set, df_get_live_in (merge_bb)))
3551 intersect = true;
3552@@ -4320,6 +4323,7 @@ dead_or_predicable (basic_block test_bb,
3553 remove_reg_equal_equiv_notes_for_regno (i);
3554
3555 BITMAP_FREE (merge_set);
3556+ BITMAP_FREE (merge_set_noclobber);
3557 }
3558
3559 reorder_insns (head, end, PREV_INSN (earliest));
3560@@ -4340,7 +4344,10 @@ dead_or_predicable (basic_block test_bb,
3561 cancel_changes (0);
3562 fail:
3563 if (merge_set)
3564- BITMAP_FREE (merge_set);
3565+ {
3566+ BITMAP_FREE (merge_set);
3567+ BITMAP_FREE (merge_set_noclobber);
3568+ }
3569 return FALSE;
3570 }
3571
3572Index: gcc-4_5-branch/gcc/recog.c 3430Index: gcc-4_5-branch/gcc/recog.c
3573=================================================================== 3431===================================================================
3574--- gcc-4_5-branch.orig/gcc/recog.c 3432--- gcc-4_5-branch.orig/gcc/recog.c 2011-06-16 18:46:02.000000000 -0700
3575+++ gcc-4_5-branch/gcc/recog.c 3433+++ gcc-4_5-branch/gcc/recog.c 2011-06-16 18:46:26.395282255 -0700
3576@@ -2082,6 +2082,7 @@ extract_insn (rtx insn) 3434@@ -2082,6 +2082,7 @@
3577 recog_data.operand_loc, 3435 recog_data.operand_loc,
3578 recog_data.constraints, 3436 recog_data.constraints,
3579 recog_data.operand_mode, NULL); 3437 recog_data.operand_mode, NULL);
@@ -3581,7 +3439,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3581 if (noperands > 0) 3439 if (noperands > 0)
3582 { 3440 {
3583 const char *p = recog_data.constraints[0]; 3441 const char *p = recog_data.constraints[0];
3584@@ -2111,6 +2112,7 @@ extract_insn (rtx insn) 3442@@ -2111,6 +2112,7 @@
3585 for (i = 0; i < noperands; i++) 3443 for (i = 0; i < noperands; i++)
3586 { 3444 {
3587 recog_data.constraints[i] = insn_data[icode].operand[i].constraint; 3445 recog_data.constraints[i] = insn_data[icode].operand[i].constraint;
@@ -3589,7 +3447,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3589 recog_data.operand_mode[i] = insn_data[icode].operand[i].mode; 3447 recog_data.operand_mode[i] = insn_data[icode].operand[i].mode;
3590 /* VOIDmode match_operands gets mode from their real operand. */ 3448 /* VOIDmode match_operands gets mode from their real operand. */
3591 if (recog_data.operand_mode[i] == VOIDmode) 3449 if (recog_data.operand_mode[i] == VOIDmode)
3592@@ -2909,6 +2911,10 @@ struct peep2_insn_data 3450@@ -2909,6 +2911,10 @@
3593 3451
3594 static struct peep2_insn_data peep2_insn_data[MAX_INSNS_PER_PEEP2 + 1]; 3452 static struct peep2_insn_data peep2_insn_data[MAX_INSNS_PER_PEEP2 + 1];
3595 static int peep2_current; 3453 static int peep2_current;
@@ -3600,7 +3458,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3600 /* The number of instructions available to match a peep2. */ 3458 /* The number of instructions available to match a peep2. */
3601 int peep2_current_count; 3459 int peep2_current_count;
3602 3460
3603@@ -2917,6 +2923,16 @@ int peep2_current_count; 3461@@ -2917,6 +2923,16 @@
3604 DF_LIVE_OUT for the block. */ 3462 DF_LIVE_OUT for the block. */
3605 #define PEEP2_EOB pc_rtx 3463 #define PEEP2_EOB pc_rtx
3606 3464
@@ -3617,7 +3475,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3617 /* Return the Nth non-note insn after `current', or return NULL_RTX if it 3475 /* Return the Nth non-note insn after `current', or return NULL_RTX if it
3618 does not exist. Used by the recognizer to find the next insn to match 3476 does not exist. Used by the recognizer to find the next insn to match
3619 in a multi-insn pattern. */ 3477 in a multi-insn pattern. */
3620@@ -2926,9 +2942,7 @@ peep2_next_insn (int n) 3478@@ -2926,9 +2942,7 @@
3621 { 3479 {
3622 gcc_assert (n <= peep2_current_count); 3480 gcc_assert (n <= peep2_current_count);
3623 3481
@@ -3628,7 +3486,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3628 3486
3629 return peep2_insn_data[n].insn; 3487 return peep2_insn_data[n].insn;
3630 } 3488 }
3631@@ -2941,9 +2955,7 @@ peep2_regno_dead_p (int ofs, int regno) 3489@@ -2941,9 +2955,7 @@
3632 { 3490 {
3633 gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1); 3491 gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
3634 3492
@@ -3639,7 +3497,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3639 3497
3640 gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX); 3498 gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
3641 3499
3642@@ -2959,9 +2971,7 @@ peep2_reg_dead_p (int ofs, rtx reg) 3500@@ -2959,9 +2971,7 @@
3643 3501
3644 gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1); 3502 gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
3645 3503
@@ -3650,7 +3508,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3650 3508
3651 gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX); 3509 gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
3652 3510
3653@@ -2996,12 +3006,8 @@ peep2_find_free_register (int from, int 3511@@ -2996,12 +3006,8 @@
3654 gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1); 3512 gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1);
3655 gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1); 3513 gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1);
3656 3514
@@ -3665,7 +3523,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3665 3523
3666 gcc_assert (peep2_insn_data[from].insn != NULL_RTX); 3524 gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
3667 REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before); 3525 REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before);
3668@@ -3010,8 +3016,7 @@ peep2_find_free_register (int from, int 3526@@ -3010,8 +3016,7 @@
3669 { 3527 {
3670 HARD_REG_SET this_live; 3528 HARD_REG_SET this_live;
3671 3529
@@ -3675,7 +3533,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3675 gcc_assert (peep2_insn_data[from].insn != NULL_RTX); 3533 gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
3676 REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before); 3534 REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
3677 IOR_HARD_REG_SET (live, this_live); 3535 IOR_HARD_REG_SET (live, this_live);
3678@@ -3104,19 +3109,234 @@ peep2_reinit_state (regset live) 3536@@ -3104,19 +3109,234 @@
3679 COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live); 3537 COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live);
3680 } 3538 }
3681 3539
@@ -3913,7 +3771,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3913 df_analyze (); 3771 df_analyze ();
3914 3772
3915 /* Initialize the regsets we're going to use. */ 3773 /* Initialize the regsets we're going to use. */
3916@@ -3126,214 +3346,59 @@ peephole2_optimize (void) 3774@@ -3126,214 +3346,59 @@
3917 3775
3918 FOR_EACH_BB_REVERSE (bb) 3776 FOR_EACH_BB_REVERSE (bb)
3919 { 3777 {
@@ -3950,7 +3808,9 @@ Index: gcc-4_5-branch/gcc/recog.c
3950- peep2_insn_data[peep2_current].insn = insn; 3808- peep2_insn_data[peep2_current].insn = insn;
3951- df_simulate_one_insn_backwards (bb, insn, live); 3809- df_simulate_one_insn_backwards (bb, insn, live);
3952- COPY_REG_SET (peep2_insn_data[peep2_current].live_before, live); 3810- COPY_REG_SET (peep2_insn_data[peep2_current].live_before, live);
3953- 3811+ rtx attempt, head;
3812+ int match_len;
3813
3954- if (RTX_FRAME_RELATED_P (insn)) 3814- if (RTX_FRAME_RELATED_P (insn))
3955- { 3815- {
3956- /* If an insn has RTX_FRAME_RELATED_P set, peephole 3816- /* If an insn has RTX_FRAME_RELATED_P set, peephole
@@ -3972,9 +3832,7 @@ Index: gcc-4_5-branch/gcc/recog.c
3972- { 3832- {
3973- int j; 3833- int j;
3974- rtx old_insn, new_insn, note; 3834- rtx old_insn, new_insn, note;
3975+ rtx attempt, head; 3835-
3976+ int match_len;
3977
3978- j = i + peep2_current; 3836- j = i + peep2_current;
3979- if (j >= MAX_INSNS_PER_PEEP2 + 1) 3837- if (j >= MAX_INSNS_PER_PEEP2 + 1)
3980- j -= MAX_INSNS_PER_PEEP2 + 1; 3838- j -= MAX_INSNS_PER_PEEP2 + 1;
@@ -4170,7 +4028,7 @@ Index: gcc-4_5-branch/gcc/recog.c
4170 } 4028 }
4171 } 4029 }
4172 4030
4173@@ -3341,7 +3406,7 @@ peephole2_optimize (void) 4031@@ -3341,7 +3406,7 @@
4174 for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) 4032 for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
4175 BITMAP_FREE (peep2_insn_data[i].live_before); 4033 BITMAP_FREE (peep2_insn_data[i].live_before);
4176 BITMAP_FREE (live); 4034 BITMAP_FREE (live);
@@ -4181,9 +4039,9 @@ Index: gcc-4_5-branch/gcc/recog.c
4181 #endif /* HAVE_peephole2 */ 4039 #endif /* HAVE_peephole2 */
4182Index: gcc-4_5-branch/gcc/recog.h 4040Index: gcc-4_5-branch/gcc/recog.h
4183=================================================================== 4041===================================================================
4184--- gcc-4_5-branch.orig/gcc/recog.h 4042--- gcc-4_5-branch.orig/gcc/recog.h 2011-06-16 17:59:04.000000000 -0700
4185+++ gcc-4_5-branch/gcc/recog.h 4043+++ gcc-4_5-branch/gcc/recog.h 2011-06-16 18:46:26.405282255 -0700
4186@@ -194,6 +194,9 @@ struct recog_data 4044@@ -194,6 +194,9 @@
4187 /* Gives the constraint string for operand N. */ 4045 /* Gives the constraint string for operand N. */
4188 const char *constraints[MAX_RECOG_OPERANDS]; 4046 const char *constraints[MAX_RECOG_OPERANDS];
4189 4047
@@ -4193,7 +4051,7 @@ Index: gcc-4_5-branch/gcc/recog.h
4193 /* Gives the mode of operand N. */ 4051 /* Gives the mode of operand N. */
4194 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 4052 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
4195 4053
4196@@ -260,6 +263,8 @@ struct insn_operand_data 4054@@ -260,6 +263,8 @@
4197 4055
4198 const char strict_low; 4056 const char strict_low;
4199 4057
@@ -4204,9 +4062,9 @@ Index: gcc-4_5-branch/gcc/recog.h
4204 4062
4205Index: gcc-4_5-branch/gcc/reload.c 4063Index: gcc-4_5-branch/gcc/reload.c
4206=================================================================== 4064===================================================================
4207--- gcc-4_5-branch.orig/gcc/reload.c 4065--- gcc-4_5-branch.orig/gcc/reload.c 2011-06-16 17:59:04.000000000 -0700
4208+++ gcc-4_5-branch/gcc/reload.c 4066+++ gcc-4_5-branch/gcc/reload.c 2011-06-16 18:46:26.405282255 -0700
4209@@ -3631,7 +3631,7 @@ find_reloads (rtx insn, int replace, int 4067@@ -3631,7 +3631,7 @@
4210 || modified[j] != RELOAD_WRITE) 4068 || modified[j] != RELOAD_WRITE)
4211 && j != i 4069 && j != i
4212 /* Ignore things like match_operator operands. */ 4070 /* Ignore things like match_operator operands. */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99503.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99503.patch
new file mode 100644
index 0000000000..abbd95b4db
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99503.patch
@@ -0,0 +1,6070 @@
12011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
2
3 gcc/testsuite/
4 From Richard Earnshaw <rearnsha@arm.com>
5
6 PR target/46329
7 * gcc.target/arm/pr46329.c: New test.
8
9 gcc/
10 PR target/46329
11 * config/arm/arm.c (arm_legitimate_constant_p_1): Return false
12 for all Neon struct constants.
13
142011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
15
16 gcc/
17 * doc/tm.texi (LEGITIMATE_CONSTANT_P): Replace with...
18 (TARGET_LEGITIMATE_CONSTANT_P): ...this.
19 * target.h (gcc_target): Add legitimate_constant_p.
20 * target-def.h (TARGET_LEGITIMATE_CONSTANT_P): Define.
21 (TARGET_INITIALIZER): Include it.
22 * calls.c (precompute_register_parameters): Replace uses of
23 LEGITIMATE_CONSTANT_P with targetm.legitimate_constant_p.
24 (emit_library_call_value_1): Likewise.
25 * expr.c (move_block_to_reg, can_store_by_pieces, emit_move_insn)
26 (compress_float_constant, emit_push_insn, expand_expr_real_1): Likewise.
27 * recog.c (general_operand, immediate_operand): Likewise.
28 * reload.c (find_reloads_toplev, find_reloads_address_part): Likewise.
29 * reload1.c (init_eliminable_invariants): Likewise.
30 * targhooks.h (default_legitimate_constant_p); Declare.
31 * targhooks.c (default_legitimate_constant_p): New function.
32
33 * config/arm/arm-protos.h (arm_cannot_force_const_mem): Delete.
34 * config/arm/arm.h (ARM_LEGITIMATE_CONSTANT_P): Likewise.
35 (THUMB_LEGITIMATE_CONSTANT_P, LEGITIMATE_CONSTANT_P): Likewise.
36 * config/arm/arm.c (TARGET_LEGITIMATE_CONSTANT_P): Define.
37 (arm_legitimate_constant_p_1, thumb_legitimate_constant_p)
38 (arm_legitimate_constant_p): New functions.
39 (arm_cannot_force_const_mem): Make static.
40
412011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
42
43 gcc/
44 * hooks.h (hook_bool_mode_uhwi_false): Declare.
45 * hooks.c (hook_bool_mode_uhwi_false): New function.
46 * doc/tm.texi (TARGET_ARRAY_MODE_SUPPORTED_P): Document.
47 * target.h (array_mode_supported_p): New hook.
48 * target-def.h (TARGET_ARRAY_MODE_SUPPORTED_P): Define if undefined.
49 (TARGET_INITIALIZER): Include it.
50 * stor-layout.c (mode_for_array): New function.
51 (layout_type): Use it.
52 * config/arm/arm.c (arm_array_mode_supported_p): New function.
53 (TARGET_ARRAY_MODE_SUPPORTED_P): Define.
54
552011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
56
57 gcc/testsuite/
58 Backport from mainline:
59
60 2011-04-12 Richard Sandiford <richard.sandiford@linaro.org>
61
62 * gcc.target/arm/neon-vld3-1.c: New test.
63 * gcc.target/arm/neon-vst3-1.c: New test.
64 * gcc.target/arm/neon/v*.c: Regenerate.
65
66 gcc/
67 Backport from mainline:
68
69 2011-04-12 Richard Sandiford <richard.sandiford@linaro.org>
70
71 * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the
72 size of a '%A' memory reference.
73 (T_DREG, T_QREG): New neon_builtin_type_bits.
74 (arm_init_neon_builtins): Assert that the load and store operands
75 are neon_struct_operands.
76 (locate_neon_builtin_icode): Provide the neon_builtin_type_bits.
77 (NEON_ARG_MEMORY): New builtin_arg.
78 (neon_dereference_pointer): New function.
79 (arm_expand_neon_args): Add a neon_builtin_type_bits argument.
80 Handle NEON_ARG_MEMORY.
81 (arm_expand_neon_builtin): Update after above interface changes.
82 Use NEON_ARG_MEMORY for loads and stores.
83 * config/arm/predicates.md (neon_struct_operand): New predicate.
84 * config/arm/neon.md (V_two_elem): Tweak formatting.
85 (V_three_elem): Use BLKmode for accesses that have no associated mode.
86 (neon_vld1<mode>, neon_vld1_dup<mode>)
87 (neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>)
88 (neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>)
89 (neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>)
90 (neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>)
91 (neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>)
92 (neon_vst4<mode>): Replace pointer operand with a memory operand.
93 Use %A in the output template.
94 (neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>)
95 (neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>)
96 (neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve
97 the width of the memory access. Remove post-increment.
98 * config/arm/neon-testgen.ml: Allow addresses to have an alignment.
99
1002011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
101
102 gcc/
103 Backport from mainline:
104
105 2011-03-30 Richard Sandiford <richard.sandiford@linaro.org>
106 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
107
108 PR target/43590
109 * config/arm/neon.md (neon_vld3qa<mode>, neon_vld4qa<mode>): Remove
110 operand 1 and reshuffle the operands to match.
111 (neon_vld3<mode>, neon_vld4<mode>): Update accordingly.
112
113=== modified file 'gcc/calls.c'
114--- old/gcc/calls.c 2010-11-04 12:43:52 +0000
115+++ new/gcc/calls.c 2011-04-20 10:07:36 +0000
116@@ -674,7 +674,7 @@
117 /* If the value is a non-legitimate constant, force it into a
118 pseudo now. TLS symbols sometimes need a call to resolve. */
119 if (CONSTANT_P (args[i].value)
120- && !LEGITIMATE_CONSTANT_P (args[i].value))
121+ && !targetm.legitimate_constant_p (args[i].mode, args[i].value))
122 args[i].value = force_reg (args[i].mode, args[i].value);
123
124 /* If we are to promote the function arg to a wider mode,
125@@ -3413,7 +3413,8 @@
126
127 /* Make sure it is a reasonable operand for a move or push insn. */
128 if (!REG_P (addr) && !MEM_P (addr)
129- && ! (CONSTANT_P (addr) && LEGITIMATE_CONSTANT_P (addr)))
130+ && !(CONSTANT_P (addr)
131+ && targetm.legitimate_constant_p (Pmode, addr)))
132 addr = force_operand (addr, NULL_RTX);
133
134 argvec[count].value = addr;
135@@ -3453,7 +3454,7 @@
136
137 /* Make sure it is a reasonable operand for a move or push insn. */
138 if (!REG_P (val) && !MEM_P (val)
139- && ! (CONSTANT_P (val) && LEGITIMATE_CONSTANT_P (val)))
140+ && !(CONSTANT_P (val) && targetm.legitimate_constant_p (mode, val)))
141 val = force_operand (val, NULL_RTX);
142
143 if (pass_by_reference (&args_so_far, mode, NULL_TREE, 1))
144
145=== modified file 'gcc/config/arm/arm-protos.h'
146--- old/gcc/config/arm/arm-protos.h 2011-02-08 12:07:29 +0000
147+++ new/gcc/config/arm/arm-protos.h 2011-04-20 10:07:36 +0000
148@@ -81,7 +81,6 @@
149 extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx,
150 bool);
151 extern bool arm_tls_referenced_p (rtx);
152-extern bool arm_cannot_force_const_mem (rtx);
153
154 extern int cirrus_memory_offset (rtx);
155 extern int arm_coproc_mem_operand (rtx, bool);
156
157=== modified file 'gcc/config/arm/arm.c'
158--- old/gcc/config/arm/arm.c 2011-03-02 11:29:06 +0000
159+++ new/gcc/config/arm/arm.c 2011-04-20 10:10:50 +0000
160@@ -140,6 +140,8 @@
161 static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT,
162 tree);
163 static bool arm_have_conditional_execution (void);
164+static bool arm_cannot_force_const_mem (rtx);
165+static bool arm_legitimate_constant_p (enum machine_mode, rtx);
166 static bool arm_rtx_costs_1 (rtx, enum rtx_code, int*, bool);
167 static bool arm_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *);
168 static bool thumb2_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *);
169@@ -222,6 +224,8 @@
170 static tree arm_promoted_type (const_tree t);
171 static tree arm_convert_to_type (tree type, tree expr);
172 static bool arm_scalar_mode_supported_p (enum machine_mode);
173+static bool arm_array_mode_supported_p (enum machine_mode,
174+ unsigned HOST_WIDE_INT);
175 static bool arm_frame_pointer_required (void);
176 static bool arm_can_eliminate (const int, const int);
177 static void arm_asm_trampoline_template (FILE *);
178@@ -355,6 +359,8 @@
179 #define TARGET_SHIFT_TRUNCATION_MASK arm_shift_truncation_mask
180 #undef TARGET_VECTOR_MODE_SUPPORTED_P
181 #define TARGET_VECTOR_MODE_SUPPORTED_P arm_vector_mode_supported_p
182+#undef TARGET_ARRAY_MODE_SUPPORTED_P
183+#define TARGET_ARRAY_MODE_SUPPORTED_P arm_array_mode_supported_p
184
185 #undef TARGET_MACHINE_DEPENDENT_REORG
186 #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg
187@@ -467,6 +473,9 @@
188 #undef TARGET_HAVE_CONDITIONAL_EXECUTION
189 #define TARGET_HAVE_CONDITIONAL_EXECUTION arm_have_conditional_execution
190
191+#undef TARGET_LEGITIMATE_CONSTANT_P
192+#define TARGET_LEGITIMATE_CONSTANT_P arm_legitimate_constant_p
193+
194 #undef TARGET_CANNOT_FORCE_CONST_MEM
195 #define TARGET_CANNOT_FORCE_CONST_MEM arm_cannot_force_const_mem
196
197@@ -6447,9 +6456,47 @@
198 return for_each_rtx (&x, arm_tls_operand_p_1, NULL);
199 }
200
201+/* Implement TARGET_LEGITIMATE_CONSTANT_P.
202+
203+ On the ARM, allow any integer (invalid ones are removed later by insn
204+ patterns), nice doubles and symbol_refs which refer to the function's
205+ constant pool XXX.
206+
207+ When generating pic allow anything. */
208+
209+static bool
210+arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x)
211+{
212+ /* At present, we have no support for Neon structure constants, so forbid
213+ them here. It might be possible to handle simple cases like 0 and -1
214+ in future. */
215+ if (TARGET_NEON && VALID_NEON_STRUCT_MODE (mode))
216+ return false;
217+
218+ return flag_pic || !label_mentioned_p (x);
219+}
220+
221+static bool
222+thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
223+{
224+ return (GET_CODE (x) == CONST_INT
225+ || GET_CODE (x) == CONST_DOUBLE
226+ || CONSTANT_ADDRESS_P (x)
227+ || flag_pic);
228+}
229+
230+static bool
231+arm_legitimate_constant_p (enum machine_mode mode, rtx x)
232+{
233+ return (!arm_cannot_force_const_mem (x)
234+ && (TARGET_32BIT
235+ ? arm_legitimate_constant_p_1 (mode, x)
236+ : thumb_legitimate_constant_p (mode, x)));
237+}
238+
239 /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */
240
241-bool
242+static bool
243 arm_cannot_force_const_mem (rtx x)
244 {
245 rtx base, offset;
246@@ -16847,7 +16894,7 @@
247 {
248 rtx addr;
249 bool postinc = FALSE;
250- unsigned align, modesize, align_bits;
251+ unsigned align, memsize, align_bits;
252
253 gcc_assert (GET_CODE (x) == MEM);
254 addr = XEXP (x, 0);
255@@ -16862,12 +16909,12 @@
256 instruction (for some alignments) as an aid to the memory subsystem
257 of the target. */
258 align = MEM_ALIGN (x) >> 3;
259- modesize = GET_MODE_SIZE (GET_MODE (x));
260+ memsize = INTVAL (MEM_SIZE (x));
261
262 /* Only certain alignment specifiers are supported by the hardware. */
263- if (modesize == 16 && (align % 32) == 0)
264+ if (memsize == 16 && (align % 32) == 0)
265 align_bits = 256;
266- else if ((modesize == 8 || modesize == 16) && (align % 16) == 0)
267+ else if ((memsize == 8 || memsize == 16) && (align % 16) == 0)
268 align_bits = 128;
269 else if ((align % 8) == 0)
270 align_bits = 64;
271@@ -16875,7 +16922,7 @@
272 align_bits = 0;
273
274 if (align_bits != 0)
275- asm_fprintf (stream, ", :%d", align_bits);
276+ asm_fprintf (stream, ":%d", align_bits);
277
278 asm_fprintf (stream, "]");
279
280@@ -18398,12 +18445,14 @@
281 T_V2SI = 0x0004,
282 T_V2SF = 0x0008,
283 T_DI = 0x0010,
284+ T_DREG = 0x001F,
285 T_V16QI = 0x0020,
286 T_V8HI = 0x0040,
287 T_V4SI = 0x0080,
288 T_V4SF = 0x0100,
289 T_V2DI = 0x0200,
290 T_TI = 0x0400,
291+ T_QREG = 0x07E0,
292 T_EI = 0x0800,
293 T_OI = 0x1000
294 };
295@@ -19049,10 +19098,9 @@
296 if (is_load && k == 1)
297 {
298 /* Neon load patterns always have the memory operand
299- (a SImode pointer) in the operand 1 position. We
300- want a const pointer to the element type in that
301- position. */
302- gcc_assert (insn_data[icode].operand[k].mode == SImode);
303+ in the operand 1 position. */
304+ gcc_assert (insn_data[icode].operand[k].predicate
305+ == neon_struct_operand);
306
307 switch (1 << j)
308 {
309@@ -19087,10 +19135,9 @@
310 else if (is_store && k == 0)
311 {
312 /* Similarly, Neon store patterns use operand 0 as
313- the memory location to store to (a SImode pointer).
314- Use a pointer to the element type of the store in
315- that position. */
316- gcc_assert (insn_data[icode].operand[k].mode == SImode);
317+ the memory location to store to. */
318+ gcc_assert (insn_data[icode].operand[k].predicate
319+ == neon_struct_operand);
320
321 switch (1 << j)
322 {
323@@ -19410,10 +19457,11 @@
324 }
325
326 static enum insn_code
327-locate_neon_builtin_icode (int fcode, neon_itype *itype)
328+locate_neon_builtin_icode (int fcode, neon_itype *itype,
329+ enum neon_builtin_type_bits *type_bit)
330 {
331 neon_builtin_datum key, *found;
332- int idx;
333+ int idx, type, ntypes;
334
335 key.base_fcode = fcode;
336 found = (neon_builtin_datum *)
337@@ -19426,20 +19474,83 @@
338 if (itype)
339 *itype = found->itype;
340
341+ if (type_bit)
342+ {
343+ ntypes = 0;
344+ for (type = 0; type < T_MAX; type++)
345+ if (found->bits & (1 << type))
346+ {
347+ if (ntypes == idx)
348+ break;
349+ ntypes++;
350+ }
351+ gcc_assert (type < T_MAX);
352+ *type_bit = (enum neon_builtin_type_bits) (1 << type);
353+ }
354 return found->codes[idx];
355 }
356
357 typedef enum {
358 NEON_ARG_COPY_TO_REG,
359 NEON_ARG_CONSTANT,
360+ NEON_ARG_MEMORY,
361 NEON_ARG_STOP
362 } builtin_arg;
363
364 #define NEON_MAX_BUILTIN_ARGS 5
365
366+/* EXP is a pointer argument to a Neon load or store intrinsic. Derive
367+ and return an expression for the accessed memory.
368+
369+ The intrinsic function operates on a block of registers that has
370+ mode REG_MODE. This block contains vectors of type TYPE_BIT.
371+ The function references the memory at EXP in mode MEM_MODE;
372+ this mode may be BLKmode if no more suitable mode is available. */
373+
374+static tree
375+neon_dereference_pointer (tree exp, enum machine_mode mem_mode,
376+ enum machine_mode reg_mode,
377+ enum neon_builtin_type_bits type_bit)
378+{
379+ HOST_WIDE_INT reg_size, vector_size, nvectors, nelems;
380+ tree elem_type, upper_bound, array_type;
381+
382+ /* Work out the size of the register block in bytes. */
383+ reg_size = GET_MODE_SIZE (reg_mode);
384+
385+ /* Work out the size of each vector in bytes. */
386+ gcc_assert (type_bit & (T_DREG | T_QREG));
387+ vector_size = (type_bit & T_QREG ? 16 : 8);
388+
389+ /* Work out how many vectors there are. */
390+ gcc_assert (reg_size % vector_size == 0);
391+ nvectors = reg_size / vector_size;
392+
393+ /* Work out how many elements are being loaded or stored.
394+ MEM_MODE == REG_MODE implies a one-to-one mapping between register
395+ and memory elements; anything else implies a lane load or store. */
396+ if (mem_mode == reg_mode)
397+ nelems = vector_size * nvectors;
398+ else
399+ nelems = nvectors;
400+
401+ /* Work out the type of each element. */
402+ gcc_assert (POINTER_TYPE_P (TREE_TYPE (exp)));
403+ elem_type = TREE_TYPE (TREE_TYPE (exp));
404+
405+ /* Create a type that describes the full access. */
406+ upper_bound = build_int_cst (size_type_node, nelems - 1);
407+ array_type = build_array_type (elem_type, build_index_type (upper_bound));
408+
409+ /* Dereference EXP using that type. */
410+ exp = convert (build_pointer_type (array_type), exp);
411+ return fold_build1 (INDIRECT_REF, array_type, exp);
412+}
413+
414 /* Expand a Neon builtin. */
415 static rtx
416 arm_expand_neon_args (rtx target, int icode, int have_retval,
417+ enum neon_builtin_type_bits type_bit,
418 tree exp, ...)
419 {
420 va_list ap;
421@@ -19448,7 +19559,9 @@
422 rtx op[NEON_MAX_BUILTIN_ARGS];
423 enum machine_mode tmode = insn_data[icode].operand[0].mode;
424 enum machine_mode mode[NEON_MAX_BUILTIN_ARGS];
425+ enum machine_mode other_mode;
426 int argc = 0;
427+ int opno;
428
429 if (have_retval
430 && (!target
431@@ -19466,26 +19579,46 @@
432 break;
433 else
434 {
435+ opno = argc + have_retval;
436+ mode[argc] = insn_data[icode].operand[opno].mode;
437 arg[argc] = CALL_EXPR_ARG (exp, argc);
438+ if (thisarg == NEON_ARG_MEMORY)
439+ {
440+ other_mode = insn_data[icode].operand[1 - opno].mode;
441+ arg[argc] = neon_dereference_pointer (arg[argc], mode[argc],
442+ other_mode, type_bit);
443+ }
444 op[argc] = expand_normal (arg[argc]);
445- mode[argc] = insn_data[icode].operand[argc + have_retval].mode;
446
447 switch (thisarg)
448 {
449 case NEON_ARG_COPY_TO_REG:
450 /*gcc_assert (GET_MODE (op[argc]) == mode[argc]);*/
451- if (!(*insn_data[icode].operand[argc + have_retval].predicate)
452+ if (!(*insn_data[icode].operand[opno].predicate)
453 (op[argc], mode[argc]))
454 op[argc] = copy_to_mode_reg (mode[argc], op[argc]);
455 break;
456
457 case NEON_ARG_CONSTANT:
458 /* FIXME: This error message is somewhat unhelpful. */
459- if (!(*insn_data[icode].operand[argc + have_retval].predicate)
460+ if (!(*insn_data[icode].operand[opno].predicate)
461 (op[argc], mode[argc]))
462 error ("argument must be a constant");
463 break;
464
465+ case NEON_ARG_MEMORY:
466+ gcc_assert (MEM_P (op[argc]));
467+ PUT_MODE (op[argc], mode[argc]);
468+ /* ??? arm_neon.h uses the same built-in functions for signed
469+ and unsigned accesses, casting where necessary. This isn't
470+ alias safe. */
471+ set_mem_alias_set (op[argc], 0);
472+ if (!(*insn_data[icode].operand[opno].predicate)
473+ (op[argc], mode[argc]))
474+ op[argc] = (replace_equiv_address
475+ (op[argc], force_reg (Pmode, XEXP (op[argc], 0))));
476+ break;
477+
478 case NEON_ARG_STOP:
479 gcc_unreachable ();
480 }
481@@ -19564,14 +19697,15 @@
482 arm_expand_neon_builtin (int fcode, tree exp, rtx target)
483 {
484 neon_itype itype;
485- enum insn_code icode = locate_neon_builtin_icode (fcode, &itype);
486+ enum neon_builtin_type_bits type_bit;
487+ enum insn_code icode = locate_neon_builtin_icode (fcode, &itype, &type_bit);
488
489 switch (itype)
490 {
491 case NEON_UNOP:
492 case NEON_CONVERT:
493 case NEON_DUPLANE:
494- return arm_expand_neon_args (target, icode, 1, exp,
495+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
496 NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP);
497
498 case NEON_BINOP:
499@@ -19581,90 +19715,90 @@
500 case NEON_SCALARMULH:
501 case NEON_SHIFTINSERT:
502 case NEON_LOGICBINOP:
503- return arm_expand_neon_args (target, icode, 1, exp,
504+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
505 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
506 NEON_ARG_STOP);
507
508 case NEON_TERNOP:
509- return arm_expand_neon_args (target, icode, 1, exp,
510+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
511 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
512 NEON_ARG_CONSTANT, NEON_ARG_STOP);
513
514 case NEON_GETLANE:
515 case NEON_FIXCONV:
516 case NEON_SHIFTIMM:
517- return arm_expand_neon_args (target, icode, 1, exp,
518+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
519 NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT,
520 NEON_ARG_STOP);
521
522 case NEON_CREATE:
523- return arm_expand_neon_args (target, icode, 1, exp,
524+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
525 NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
526
527 case NEON_DUP:
528 case NEON_SPLIT:
529 case NEON_REINTERP:
530- return arm_expand_neon_args (target, icode, 1, exp,
531+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
532 NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
533
534 case NEON_COMBINE:
535 case NEON_VTBL:
536- return arm_expand_neon_args (target, icode, 1, exp,
537+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
538 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
539
540 case NEON_RESULTPAIR:
541- return arm_expand_neon_args (target, icode, 0, exp,
542+ return arm_expand_neon_args (target, icode, 0, type_bit, exp,
543 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
544 NEON_ARG_STOP);
545
546 case NEON_LANEMUL:
547 case NEON_LANEMULL:
548 case NEON_LANEMULH:
549- return arm_expand_neon_args (target, icode, 1, exp,
550+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
551 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
552 NEON_ARG_CONSTANT, NEON_ARG_STOP);
553
554 case NEON_LANEMAC:
555- return arm_expand_neon_args (target, icode, 1, exp,
556+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
557 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
558 NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP);
559
560 case NEON_SHIFTACC:
561- return arm_expand_neon_args (target, icode, 1, exp,
562+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
563 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
564 NEON_ARG_CONSTANT, NEON_ARG_STOP);
565
566 case NEON_SCALARMAC:
567- return arm_expand_neon_args (target, icode, 1, exp,
568+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
569 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
570 NEON_ARG_CONSTANT, NEON_ARG_STOP);
571
572 case NEON_SELECT:
573 case NEON_VTBX:
574- return arm_expand_neon_args (target, icode, 1, exp,
575+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
576 NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG,
577 NEON_ARG_STOP);
578
579 case NEON_LOAD1:
580 case NEON_LOADSTRUCT:
581- return arm_expand_neon_args (target, icode, 1, exp,
582- NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
583+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
584+ NEON_ARG_MEMORY, NEON_ARG_STOP);
585
586 case NEON_LOAD1LANE:
587 case NEON_LOADSTRUCTLANE:
588- return arm_expand_neon_args (target, icode, 1, exp,
589- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
590+ return arm_expand_neon_args (target, icode, 1, type_bit, exp,
591+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
592 NEON_ARG_STOP);
593
594 case NEON_STORE1:
595 case NEON_STORESTRUCT:
596- return arm_expand_neon_args (target, icode, 0, exp,
597- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
598+ return arm_expand_neon_args (target, icode, 0, type_bit, exp,
599+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP);
600
601 case NEON_STORE1LANE:
602 case NEON_STORESTRUCTLANE:
603- return arm_expand_neon_args (target, icode, 0, exp,
604- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
605+ return arm_expand_neon_args (target, icode, 0, type_bit, exp,
606+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT,
607 NEON_ARG_STOP);
608 }
609
610@@ -22349,6 +22483,20 @@
611 return false;
612 }
613
614+/* Implements target hook array_mode_supported_p. */
615+
616+static bool
617+arm_array_mode_supported_p (enum machine_mode mode,
618+ unsigned HOST_WIDE_INT nelems)
619+{
620+ if (TARGET_NEON
621+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
622+ && (nelems >= 2 && nelems <= 4))
623+ return true;
624+
625+ return false;
626+}
627+
628 /* Implement TARGET_SHIFT_TRUNCATION_MASK. SImode shifts use normal
629 ARM insns and therefore guarantee that the shift count is modulo 256.
630 DImode shifts (those implemented by lib1funcs.asm or by optabs.c)
631
632=== modified file 'gcc/config/arm/arm.h'
633--- old/gcc/config/arm/arm.h 2011-02-08 12:07:29 +0000
634+++ new/gcc/config/arm/arm.h 2011-04-20 10:07:36 +0000
635@@ -1996,27 +1996,6 @@
636 #define TARGET_DEFAULT_WORD_RELOCATIONS 0
637 #endif
638
639-/* Nonzero if the constant value X is a legitimate general operand.
640- It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
641-
642- On the ARM, allow any integer (invalid ones are removed later by insn
643- patterns), nice doubles and symbol_refs which refer to the function's
644- constant pool XXX.
645-
646- When generating pic allow anything. */
647-#define ARM_LEGITIMATE_CONSTANT_P(X) (flag_pic || ! label_mentioned_p (X))
648-
649-#define THUMB_LEGITIMATE_CONSTANT_P(X) \
650- ( GET_CODE (X) == CONST_INT \
651- || GET_CODE (X) == CONST_DOUBLE \
652- || CONSTANT_ADDRESS_P (X) \
653- || flag_pic)
654-
655-#define LEGITIMATE_CONSTANT_P(X) \
656- (!arm_cannot_force_const_mem (X) \
657- && (TARGET_32BIT ? ARM_LEGITIMATE_CONSTANT_P (X) \
658- : THUMB_LEGITIMATE_CONSTANT_P (X)))
659-
660 #ifndef SUBTARGET_NAME_ENCODING_LENGTHS
661 #define SUBTARGET_NAME_ENCODING_LENGTHS
662 #endif
663
664=== modified file 'gcc/config/arm/neon-testgen.ml'
665--- old/gcc/config/arm/neon-testgen.ml 2010-08-20 13:27:11 +0000
666+++ new/gcc/config/arm/neon-testgen.ml 2011-04-20 10:00:39 +0000
667@@ -177,7 +177,7 @@
668 let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in
669 "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}"
670 | (PtrTo elt | CstPtrTo elt) ->
671- "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]"
672+ "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]"
673 | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
674 | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
675 | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]"
676
677=== modified file 'gcc/config/arm/neon.md'
678--- old/gcc/config/arm/neon.md 2010-11-04 11:47:50 +0000
679+++ new/gcc/config/arm/neon.md 2011-04-20 10:00:39 +0000
680@@ -259,20 +259,18 @@
681
682 ;; Mode of pair of elements for each vector mode, to define transfer
683 ;; size for structure lane/dup loads and stores.
684-(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI")
685- (V4HI "SI") (V8HI "SI")
686+(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI")
687+ (V4HI "SI") (V8HI "SI")
688 (V2SI "V2SI") (V4SI "V2SI")
689 (V2SF "V2SF") (V4SF "V2SF")
690 (DI "V2DI") (V2DI "V2DI")])
691
692 ;; Similar, for three elements.
693-;; ??? Should we define extra modes so that sizes of all three-element
694-;; accesses can be accurately represented?
695-(define_mode_attr V_three_elem [(V8QI "SI") (V16QI "SI")
696- (V4HI "V4HI") (V8HI "V4HI")
697- (V2SI "V4SI") (V4SI "V4SI")
698- (V2SF "V4SF") (V4SF "V4SF")
699- (DI "EI") (V2DI "EI")])
700+(define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK")
701+ (V4HI "BLK") (V8HI "BLK")
702+ (V2SI "BLK") (V4SI "BLK")
703+ (V2SF "BLK") (V4SF "BLK")
704+ (DI "EI") (V2DI "EI")])
705
706 ;; Similar, for four elements.
707 (define_mode_attr V_four_elem [(V8QI "SI") (V16QI "SI")
708@@ -4567,16 +4565,16 @@
709
710 (define_insn "neon_vld1<mode>"
711 [(set (match_operand:VDQX 0 "s_register_operand" "=w")
712- (unspec:VDQX [(mem:VDQX (match_operand:SI 1 "s_register_operand" "r"))]
713+ (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand" "Um")]
714 UNSPEC_VLD1))]
715 "TARGET_NEON"
716- "vld1.<V_sz_elem>\t%h0, [%1]"
717+ "vld1.<V_sz_elem>\t%h0, %A1"
718 [(set_attr "neon_type" "neon_vld1_1_2_regs")]
719 )
720
721 (define_insn "neon_vld1_lane<mode>"
722 [(set (match_operand:VDX 0 "s_register_operand" "=w")
723- (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))
724+ (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
725 (match_operand:VDX 2 "s_register_operand" "0")
726 (match_operand:SI 3 "immediate_operand" "i")]
727 UNSPEC_VLD1_LANE))]
728@@ -4587,9 +4585,9 @@
729 if (lane < 0 || lane >= max)
730 error ("lane out of range");
731 if (max == 1)
732- return "vld1.<V_sz_elem>\t%P0, [%1]";
733+ return "vld1.<V_sz_elem>\t%P0, %A1";
734 else
735- return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]";
736+ return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1";
737 }
738 [(set (attr "neon_type")
739 (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2))
740@@ -4599,7 +4597,7 @@
741
742 (define_insn "neon_vld1_lane<mode>"
743 [(set (match_operand:VQX 0 "s_register_operand" "=w")
744- (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))
745+ (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
746 (match_operand:VQX 2 "s_register_operand" "0")
747 (match_operand:SI 3 "immediate_operand" "i")]
748 UNSPEC_VLD1_LANE))]
749@@ -4618,9 +4616,9 @@
750 }
751 operands[0] = gen_rtx_REG (<V_HALF>mode, regno);
752 if (max == 2)
753- return "vld1.<V_sz_elem>\t%P0, [%1]";
754+ return "vld1.<V_sz_elem>\t%P0, %A1";
755 else
756- return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]";
757+ return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1";
758 }
759 [(set (attr "neon_type")
760 (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2))
761@@ -4630,14 +4628,14 @@
762
763 (define_insn "neon_vld1_dup<mode>"
764 [(set (match_operand:VDX 0 "s_register_operand" "=w")
765- (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))]
766+ (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")]
767 UNSPEC_VLD1_DUP))]
768 "TARGET_NEON"
769 {
770 if (GET_MODE_NUNITS (<MODE>mode) > 1)
771- return "vld1.<V_sz_elem>\t{%P0[]}, [%1]";
772+ return "vld1.<V_sz_elem>\t{%P0[]}, %A1";
773 else
774- return "vld1.<V_sz_elem>\t%h0, [%1]";
775+ return "vld1.<V_sz_elem>\t%h0, %A1";
776 }
777 [(set (attr "neon_type")
778 (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
779@@ -4647,14 +4645,14 @@
780
781 (define_insn "neon_vld1_dup<mode>"
782 [(set (match_operand:VQX 0 "s_register_operand" "=w")
783- (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))]
784+ (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")]
785 UNSPEC_VLD1_DUP))]
786 "TARGET_NEON"
787 {
788 if (GET_MODE_NUNITS (<MODE>mode) > 2)
789- return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, [%1]";
790+ return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, %A1";
791 else
792- return "vld1.<V_sz_elem>\t%h0, [%1]";
793+ return "vld1.<V_sz_elem>\t%h0, %A1";
794 }
795 [(set (attr "neon_type")
796 (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
797@@ -4663,15 +4661,15 @@
798 )
799
800 (define_insn "neon_vst1<mode>"
801- [(set (mem:VDQX (match_operand:SI 0 "s_register_operand" "r"))
802+ [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um")
803 (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")]
804 UNSPEC_VST1))]
805 "TARGET_NEON"
806- "vst1.<V_sz_elem>\t%h1, [%0]"
807+ "vst1.<V_sz_elem>\t%h1, %A0"
808 [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
809
810 (define_insn "neon_vst1_lane<mode>"
811- [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r"))
812+ [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
813 (vec_select:<V_elem>
814 (match_operand:VDX 1 "s_register_operand" "w")
815 (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))]
816@@ -4682,9 +4680,9 @@
817 if (lane < 0 || lane >= max)
818 error ("lane out of range");
819 if (max == 1)
820- return "vst1.<V_sz_elem>\t{%P1}, [%0]";
821+ return "vst1.<V_sz_elem>\t{%P1}, %A0";
822 else
823- return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]";
824+ return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0";
825 }
826 [(set (attr "neon_type")
827 (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 1))
828@@ -4692,7 +4690,7 @@
829 (const_string "neon_vst1_vst2_lane")))])
830
831 (define_insn "neon_vst1_lane<mode>"
832- [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r"))
833+ [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
834 (vec_select:<V_elem>
835 (match_operand:VQX 1 "s_register_operand" "w")
836 (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))]
837@@ -4711,24 +4709,24 @@
838 }
839 operands[1] = gen_rtx_REG (<V_HALF>mode, regno);
840 if (max == 2)
841- return "vst1.<V_sz_elem>\t{%P1}, [%0]";
842+ return "vst1.<V_sz_elem>\t{%P1}, %A0";
843 else
844- return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]";
845+ return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0";
846 }
847 [(set_attr "neon_type" "neon_vst1_vst2_lane")]
848 )
849
850 (define_insn "neon_vld2<mode>"
851 [(set (match_operand:TI 0 "s_register_operand" "=w")
852- (unspec:TI [(mem:TI (match_operand:SI 1 "s_register_operand" "r"))
853+ (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um")
854 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
855 UNSPEC_VLD2))]
856 "TARGET_NEON"
857 {
858 if (<V_sz_elem> == 64)
859- return "vld1.64\t%h0, [%1]";
860+ return "vld1.64\t%h0, %A1";
861 else
862- return "vld2.<V_sz_elem>\t%h0, [%1]";
863+ return "vld2.<V_sz_elem>\t%h0, %A1";
864 }
865 [(set (attr "neon_type")
866 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
867@@ -4738,16 +4736,16 @@
868
869 (define_insn "neon_vld2<mode>"
870 [(set (match_operand:OI 0 "s_register_operand" "=w")
871- (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r"))
872+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
873 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
874 UNSPEC_VLD2))]
875 "TARGET_NEON"
876- "vld2.<V_sz_elem>\t%h0, [%1]"
877+ "vld2.<V_sz_elem>\t%h0, %A1"
878 [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")])
879
880 (define_insn "neon_vld2_lane<mode>"
881 [(set (match_operand:TI 0 "s_register_operand" "=w")
882- (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
883+ (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
884 (match_operand:TI 2 "s_register_operand" "0")
885 (match_operand:SI 3 "immediate_operand" "i")
886 (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
887@@ -4764,7 +4762,7 @@
888 ops[1] = gen_rtx_REG (DImode, regno + 2);
889 ops[2] = operands[1];
890 ops[3] = operands[3];
891- output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops);
892+ output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
893 return "";
894 }
895 [(set_attr "neon_type" "neon_vld1_vld2_lane")]
896@@ -4772,7 +4770,7 @@
897
898 (define_insn "neon_vld2_lane<mode>"
899 [(set (match_operand:OI 0 "s_register_operand" "=w")
900- (unspec:OI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
901+ (unspec:OI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
902 (match_operand:OI 2 "s_register_operand" "0")
903 (match_operand:SI 3 "immediate_operand" "i")
904 (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
905@@ -4794,7 +4792,7 @@
906 ops[1] = gen_rtx_REG (DImode, regno + 4);
907 ops[2] = operands[1];
908 ops[3] = GEN_INT (lane);
909- output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops);
910+ output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
911 return "";
912 }
913 [(set_attr "neon_type" "neon_vld1_vld2_lane")]
914@@ -4802,15 +4800,15 @@
915
916 (define_insn "neon_vld2_dup<mode>"
917 [(set (match_operand:TI 0 "s_register_operand" "=w")
918- (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r"))
919+ (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
920 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
921 UNSPEC_VLD2_DUP))]
922 "TARGET_NEON"
923 {
924 if (GET_MODE_NUNITS (<MODE>mode) > 1)
925- return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, [%1]";
926+ return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, %A1";
927 else
928- return "vld1.<V_sz_elem>\t%h0, [%1]";
929+ return "vld1.<V_sz_elem>\t%h0, %A1";
930 }
931 [(set (attr "neon_type")
932 (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
933@@ -4819,16 +4817,16 @@
934 )
935
936 (define_insn "neon_vst2<mode>"
937- [(set (mem:TI (match_operand:SI 0 "s_register_operand" "r"))
938+ [(set (match_operand:TI 0 "neon_struct_operand" "=Um")
939 (unspec:TI [(match_operand:TI 1 "s_register_operand" "w")
940 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
941 UNSPEC_VST2))]
942 "TARGET_NEON"
943 {
944 if (<V_sz_elem> == 64)
945- return "vst1.64\t%h1, [%0]";
946+ return "vst1.64\t%h1, %A0";
947 else
948- return "vst2.<V_sz_elem>\t%h1, [%0]";
949+ return "vst2.<V_sz_elem>\t%h1, %A0";
950 }
951 [(set (attr "neon_type")
952 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
953@@ -4837,17 +4835,17 @@
954 )
955
956 (define_insn "neon_vst2<mode>"
957- [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r"))
958+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
959 (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
960 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
961 UNSPEC_VST2))]
962 "TARGET_NEON"
963- "vst2.<V_sz_elem>\t%h1, [%0]"
964+ "vst2.<V_sz_elem>\t%h1, %A0"
965 [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]
966 )
967
968 (define_insn "neon_vst2_lane<mode>"
969- [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r"))
970+ [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
971 (unspec:<V_two_elem>
972 [(match_operand:TI 1 "s_register_operand" "w")
973 (match_operand:SI 2 "immediate_operand" "i")
974@@ -4865,14 +4863,14 @@
975 ops[1] = gen_rtx_REG (DImode, regno);
976 ops[2] = gen_rtx_REG (DImode, regno + 2);
977 ops[3] = operands[2];
978- output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops);
979+ output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
980 return "";
981 }
982 [(set_attr "neon_type" "neon_vst1_vst2_lane")]
983 )
984
985 (define_insn "neon_vst2_lane<mode>"
986- [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r"))
987+ [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
988 (unspec:<V_two_elem>
989 [(match_operand:OI 1 "s_register_operand" "w")
990 (match_operand:SI 2 "immediate_operand" "i")
991@@ -4895,7 +4893,7 @@
992 ops[1] = gen_rtx_REG (DImode, regno);
993 ops[2] = gen_rtx_REG (DImode, regno + 4);
994 ops[3] = GEN_INT (lane);
995- output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops);
996+ output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
997 return "";
998 }
999 [(set_attr "neon_type" "neon_vst1_vst2_lane")]
1000@@ -4903,15 +4901,15 @@
1001
1002 (define_insn "neon_vld3<mode>"
1003 [(set (match_operand:EI 0 "s_register_operand" "=w")
1004- (unspec:EI [(mem:EI (match_operand:SI 1 "s_register_operand" "r"))
1005+ (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um")
1006 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1007 UNSPEC_VLD3))]
1008 "TARGET_NEON"
1009 {
1010 if (<V_sz_elem> == 64)
1011- return "vld1.64\t%h0, [%1]";
1012+ return "vld1.64\t%h0, %A1";
1013 else
1014- return "vld3.<V_sz_elem>\t%h0, [%1]";
1015+ return "vld3.<V_sz_elem>\t%h0, %A1";
1016 }
1017 [(set (attr "neon_type")
1018 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
1019@@ -4920,27 +4918,25 @@
1020 )
1021
1022 (define_expand "neon_vld3<mode>"
1023- [(match_operand:CI 0 "s_register_operand" "=w")
1024- (match_operand:SI 1 "s_register_operand" "+r")
1025+ [(match_operand:CI 0 "s_register_operand")
1026+ (match_operand:CI 1 "neon_struct_operand")
1027 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1028 "TARGET_NEON"
1029 {
1030- emit_insn (gen_neon_vld3qa<mode> (operands[0], operands[0],
1031- operands[1], operands[1]));
1032- emit_insn (gen_neon_vld3qb<mode> (operands[0], operands[0],
1033- operands[1], operands[1]));
1034+ rtx mem;
1035+
1036+ mem = adjust_address (operands[1], EImode, 0);
1037+ emit_insn (gen_neon_vld3qa<mode> (operands[0], mem));
1038+ mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
1039+ emit_insn (gen_neon_vld3qb<mode> (operands[0], mem, operands[0]));
1040 DONE;
1041 })
1042
1043 (define_insn "neon_vld3qa<mode>"
1044 [(set (match_operand:CI 0 "s_register_operand" "=w")
1045- (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2"))
1046- (match_operand:CI 1 "s_register_operand" "0")
1047+ (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
1048 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1049- UNSPEC_VLD3A))
1050- (set (match_operand:SI 2 "s_register_operand" "=r")
1051- (plus:SI (match_dup 3)
1052- (const_int 24)))]
1053+ UNSPEC_VLD3A))]
1054 "TARGET_NEON"
1055 {
1056 int regno = REGNO (operands[0]);
1057@@ -4948,8 +4944,8 @@
1058 ops[0] = gen_rtx_REG (DImode, regno);
1059 ops[1] = gen_rtx_REG (DImode, regno + 4);
1060 ops[2] = gen_rtx_REG (DImode, regno + 8);
1061- ops[3] = operands[2];
1062- output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops);
1063+ ops[3] = operands[1];
1064+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops);
1065 return "";
1066 }
1067 [(set_attr "neon_type" "neon_vld3_vld4")]
1068@@ -4957,13 +4953,10 @@
1069
1070 (define_insn "neon_vld3qb<mode>"
1071 [(set (match_operand:CI 0 "s_register_operand" "=w")
1072- (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2"))
1073- (match_operand:CI 1 "s_register_operand" "0")
1074+ (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
1075+ (match_operand:CI 2 "s_register_operand" "0")
1076 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1077- UNSPEC_VLD3B))
1078- (set (match_operand:SI 2 "s_register_operand" "=r")
1079- (plus:SI (match_dup 3)
1080- (const_int 24)))]
1081+ UNSPEC_VLD3B))]
1082 "TARGET_NEON"
1083 {
1084 int regno = REGNO (operands[0]);
1085@@ -4971,8 +4964,8 @@
1086 ops[0] = gen_rtx_REG (DImode, regno + 2);
1087 ops[1] = gen_rtx_REG (DImode, regno + 6);
1088 ops[2] = gen_rtx_REG (DImode, regno + 10);
1089- ops[3] = operands[2];
1090- output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops);
1091+ ops[3] = operands[1];
1092+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops);
1093 return "";
1094 }
1095 [(set_attr "neon_type" "neon_vld3_vld4")]
1096@@ -4980,7 +4973,7 @@
1097
1098 (define_insn "neon_vld3_lane<mode>"
1099 [(set (match_operand:EI 0 "s_register_operand" "=w")
1100- (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
1101+ (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
1102 (match_operand:EI 2 "s_register_operand" "0")
1103 (match_operand:SI 3 "immediate_operand" "i")
1104 (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1105@@ -4998,7 +4991,7 @@
1106 ops[2] = gen_rtx_REG (DImode, regno + 4);
1107 ops[3] = operands[1];
1108 ops[4] = operands[3];
1109- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]",
1110+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3",
1111 ops);
1112 return "";
1113 }
1114@@ -5007,7 +5000,7 @@
1115
1116 (define_insn "neon_vld3_lane<mode>"
1117 [(set (match_operand:CI 0 "s_register_operand" "=w")
1118- (unspec:CI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
1119+ (unspec:CI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
1120 (match_operand:CI 2 "s_register_operand" "0")
1121 (match_operand:SI 3 "immediate_operand" "i")
1122 (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1123@@ -5030,7 +5023,7 @@
1124 ops[2] = gen_rtx_REG (DImode, regno + 8);
1125 ops[3] = operands[1];
1126 ops[4] = GEN_INT (lane);
1127- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]",
1128+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3",
1129 ops);
1130 return "";
1131 }
1132@@ -5039,7 +5032,7 @@
1133
1134 (define_insn "neon_vld3_dup<mode>"
1135 [(set (match_operand:EI 0 "s_register_operand" "=w")
1136- (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r"))
1137+ (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
1138 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1139 UNSPEC_VLD3_DUP))]
1140 "TARGET_NEON"
1141@@ -5052,11 +5045,11 @@
1142 ops[1] = gen_rtx_REG (DImode, regno + 2);
1143 ops[2] = gen_rtx_REG (DImode, regno + 4);
1144 ops[3] = operands[1];
1145- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, [%3]", ops);
1146+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, %A3", ops);
1147 return "";
1148 }
1149 else
1150- return "vld1.<V_sz_elem>\t%h0, [%1]";
1151+ return "vld1.<V_sz_elem>\t%h0, %A1";
1152 }
1153 [(set (attr "neon_type")
1154 (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
1155@@ -5064,16 +5057,16 @@
1156 (const_string "neon_vld1_1_2_regs")))])
1157
1158 (define_insn "neon_vst3<mode>"
1159- [(set (mem:EI (match_operand:SI 0 "s_register_operand" "r"))
1160+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
1161 (unspec:EI [(match_operand:EI 1 "s_register_operand" "w")
1162 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1163 UNSPEC_VST3))]
1164 "TARGET_NEON"
1165 {
1166 if (<V_sz_elem> == 64)
1167- return "vst1.64\t%h1, [%0]";
1168+ return "vst1.64\t%h1, %A0";
1169 else
1170- return "vst3.<V_sz_elem>\t%h1, [%0]";
1171+ return "vst3.<V_sz_elem>\t%h1, %A0";
1172 }
1173 [(set (attr "neon_type")
1174 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
1175@@ -5081,62 +5074,60 @@
1176 (const_string "neon_vst2_4_regs_vst3_vst4")))])
1177
1178 (define_expand "neon_vst3<mode>"
1179- [(match_operand:SI 0 "s_register_operand" "+r")
1180- (match_operand:CI 1 "s_register_operand" "w")
1181+ [(match_operand:CI 0 "neon_struct_operand")
1182+ (match_operand:CI 1 "s_register_operand")
1183 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1184 "TARGET_NEON"
1185 {
1186- emit_insn (gen_neon_vst3qa<mode> (operands[0], operands[0], operands[1]));
1187- emit_insn (gen_neon_vst3qb<mode> (operands[0], operands[0], operands[1]));
1188+ rtx mem;
1189+
1190+ mem = adjust_address (operands[0], EImode, 0);
1191+ emit_insn (gen_neon_vst3qa<mode> (mem, operands[1]));
1192+ mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode));
1193+ emit_insn (gen_neon_vst3qb<mode> (mem, operands[1]));
1194 DONE;
1195 })
1196
1197 (define_insn "neon_vst3qa<mode>"
1198- [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0"))
1199- (unspec:EI [(match_operand:CI 2 "s_register_operand" "w")
1200+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
1201+ (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
1202 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1203- UNSPEC_VST3A))
1204- (set (match_operand:SI 0 "s_register_operand" "=r")
1205- (plus:SI (match_dup 1)
1206- (const_int 24)))]
1207+ UNSPEC_VST3A))]
1208 "TARGET_NEON"
1209 {
1210- int regno = REGNO (operands[2]);
1211+ int regno = REGNO (operands[1]);
1212 rtx ops[4];
1213 ops[0] = operands[0];
1214 ops[1] = gen_rtx_REG (DImode, regno);
1215 ops[2] = gen_rtx_REG (DImode, regno + 4);
1216 ops[3] = gen_rtx_REG (DImode, regno + 8);
1217- output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops);
1218+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops);
1219 return "";
1220 }
1221 [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
1222 )
1223
1224 (define_insn "neon_vst3qb<mode>"
1225- [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0"))
1226- (unspec:EI [(match_operand:CI 2 "s_register_operand" "w")
1227+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
1228+ (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
1229 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1230- UNSPEC_VST3B))
1231- (set (match_operand:SI 0 "s_register_operand" "=r")
1232- (plus:SI (match_dup 1)
1233- (const_int 24)))]
1234+ UNSPEC_VST3B))]
1235 "TARGET_NEON"
1236 {
1237- int regno = REGNO (operands[2]);
1238+ int regno = REGNO (operands[1]);
1239 rtx ops[4];
1240 ops[0] = operands[0];
1241 ops[1] = gen_rtx_REG (DImode, regno + 2);
1242 ops[2] = gen_rtx_REG (DImode, regno + 6);
1243 ops[3] = gen_rtx_REG (DImode, regno + 10);
1244- output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops);
1245+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops);
1246 return "";
1247 }
1248 [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
1249 )
1250
1251 (define_insn "neon_vst3_lane<mode>"
1252- [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r"))
1253+ [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
1254 (unspec:<V_three_elem>
1255 [(match_operand:EI 1 "s_register_operand" "w")
1256 (match_operand:SI 2 "immediate_operand" "i")
1257@@ -5155,7 +5146,7 @@
1258 ops[2] = gen_rtx_REG (DImode, regno + 2);
1259 ops[3] = gen_rtx_REG (DImode, regno + 4);
1260 ops[4] = operands[2];
1261- output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]",
1262+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0",
1263 ops);
1264 return "";
1265 }
1266@@ -5163,7 +5154,7 @@
1267 )
1268
1269 (define_insn "neon_vst3_lane<mode>"
1270- [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r"))
1271+ [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
1272 (unspec:<V_three_elem>
1273 [(match_operand:CI 1 "s_register_operand" "w")
1274 (match_operand:SI 2 "immediate_operand" "i")
1275@@ -5187,7 +5178,7 @@
1276 ops[2] = gen_rtx_REG (DImode, regno + 4);
1277 ops[3] = gen_rtx_REG (DImode, regno + 8);
1278 ops[4] = GEN_INT (lane);
1279- output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]",
1280+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0",
1281 ops);
1282 return "";
1283 }
1284@@ -5195,15 +5186,15 @@
1285
1286 (define_insn "neon_vld4<mode>"
1287 [(set (match_operand:OI 0 "s_register_operand" "=w")
1288- (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r"))
1289+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
1290 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1291 UNSPEC_VLD4))]
1292 "TARGET_NEON"
1293 {
1294 if (<V_sz_elem> == 64)
1295- return "vld1.64\t%h0, [%1]";
1296+ return "vld1.64\t%h0, %A1";
1297 else
1298- return "vld4.<V_sz_elem>\t%h0, [%1]";
1299+ return "vld4.<V_sz_elem>\t%h0, %A1";
1300 }
1301 [(set (attr "neon_type")
1302 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
1303@@ -5212,27 +5203,25 @@
1304 )
1305
1306 (define_expand "neon_vld4<mode>"
1307- [(match_operand:XI 0 "s_register_operand" "=w")
1308- (match_operand:SI 1 "s_register_operand" "+r")
1309+ [(match_operand:XI 0 "s_register_operand")
1310+ (match_operand:XI 1 "neon_struct_operand")
1311 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1312 "TARGET_NEON"
1313 {
1314- emit_insn (gen_neon_vld4qa<mode> (operands[0], operands[0],
1315- operands[1], operands[1]));
1316- emit_insn (gen_neon_vld4qb<mode> (operands[0], operands[0],
1317- operands[1], operands[1]));
1318+ rtx mem;
1319+
1320+ mem = adjust_address (operands[1], OImode, 0);
1321+ emit_insn (gen_neon_vld4qa<mode> (operands[0], mem));
1322+ mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
1323+ emit_insn (gen_neon_vld4qb<mode> (operands[0], mem, operands[0]));
1324 DONE;
1325 })
1326
1327 (define_insn "neon_vld4qa<mode>"
1328 [(set (match_operand:XI 0 "s_register_operand" "=w")
1329- (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2"))
1330- (match_operand:XI 1 "s_register_operand" "0")
1331+ (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
1332 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1333- UNSPEC_VLD4A))
1334- (set (match_operand:SI 2 "s_register_operand" "=r")
1335- (plus:SI (match_dup 3)
1336- (const_int 32)))]
1337+ UNSPEC_VLD4A))]
1338 "TARGET_NEON"
1339 {
1340 int regno = REGNO (operands[0]);
1341@@ -5241,8 +5230,8 @@
1342 ops[1] = gen_rtx_REG (DImode, regno + 4);
1343 ops[2] = gen_rtx_REG (DImode, regno + 8);
1344 ops[3] = gen_rtx_REG (DImode, regno + 12);
1345- ops[4] = operands[2];
1346- output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops);
1347+ ops[4] = operands[1];
1348+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops);
1349 return "";
1350 }
1351 [(set_attr "neon_type" "neon_vld3_vld4")]
1352@@ -5250,13 +5239,10 @@
1353
1354 (define_insn "neon_vld4qb<mode>"
1355 [(set (match_operand:XI 0 "s_register_operand" "=w")
1356- (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2"))
1357- (match_operand:XI 1 "s_register_operand" "0")
1358+ (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
1359+ (match_operand:XI 2 "s_register_operand" "0")
1360 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1361- UNSPEC_VLD4B))
1362- (set (match_operand:SI 2 "s_register_operand" "=r")
1363- (plus:SI (match_dup 3)
1364- (const_int 32)))]
1365+ UNSPEC_VLD4B))]
1366 "TARGET_NEON"
1367 {
1368 int regno = REGNO (operands[0]);
1369@@ -5265,8 +5251,8 @@
1370 ops[1] = gen_rtx_REG (DImode, regno + 6);
1371 ops[2] = gen_rtx_REG (DImode, regno + 10);
1372 ops[3] = gen_rtx_REG (DImode, regno + 14);
1373- ops[4] = operands[2];
1374- output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops);
1375+ ops[4] = operands[1];
1376+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops);
1377 return "";
1378 }
1379 [(set_attr "neon_type" "neon_vld3_vld4")]
1380@@ -5274,7 +5260,7 @@
1381
1382 (define_insn "neon_vld4_lane<mode>"
1383 [(set (match_operand:OI 0 "s_register_operand" "=w")
1384- (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
1385+ (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
1386 (match_operand:OI 2 "s_register_operand" "0")
1387 (match_operand:SI 3 "immediate_operand" "i")
1388 (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1389@@ -5293,7 +5279,7 @@
1390 ops[3] = gen_rtx_REG (DImode, regno + 6);
1391 ops[4] = operands[1];
1392 ops[5] = operands[3];
1393- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]",
1394+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
1395 ops);
1396 return "";
1397 }
1398@@ -5302,7 +5288,7 @@
1399
1400 (define_insn "neon_vld4_lane<mode>"
1401 [(set (match_operand:XI 0 "s_register_operand" "=w")
1402- (unspec:XI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
1403+ (unspec:XI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
1404 (match_operand:XI 2 "s_register_operand" "0")
1405 (match_operand:SI 3 "immediate_operand" "i")
1406 (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1407@@ -5326,7 +5312,7 @@
1408 ops[3] = gen_rtx_REG (DImode, regno + 12);
1409 ops[4] = operands[1];
1410 ops[5] = GEN_INT (lane);
1411- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]",
1412+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
1413 ops);
1414 return "";
1415 }
1416@@ -5335,7 +5321,7 @@
1417
1418 (define_insn "neon_vld4_dup<mode>"
1419 [(set (match_operand:OI 0 "s_register_operand" "=w")
1420- (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r"))
1421+ (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
1422 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1423 UNSPEC_VLD4_DUP))]
1424 "TARGET_NEON"
1425@@ -5349,12 +5335,12 @@
1426 ops[2] = gen_rtx_REG (DImode, regno + 4);
1427 ops[3] = gen_rtx_REG (DImode, regno + 6);
1428 ops[4] = operands[1];
1429- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, [%4]",
1430+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
1431 ops);
1432 return "";
1433 }
1434 else
1435- return "vld1.<V_sz_elem>\t%h0, [%1]";
1436+ return "vld1.<V_sz_elem>\t%h0, %A1";
1437 }
1438 [(set (attr "neon_type")
1439 (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1"))
1440@@ -5363,16 +5349,16 @@
1441 )
1442
1443 (define_insn "neon_vst4<mode>"
1444- [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r"))
1445+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
1446 (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
1447 (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1448 UNSPEC_VST4))]
1449 "TARGET_NEON"
1450 {
1451 if (<V_sz_elem> == 64)
1452- return "vst1.64\t%h1, [%0]";
1453+ return "vst1.64\t%h1, %A0";
1454 else
1455- return "vst4.<V_sz_elem>\t%h1, [%0]";
1456+ return "vst4.<V_sz_elem>\t%h1, %A0";
1457 }
1458 [(set (attr "neon_type")
1459 (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64"))
1460@@ -5381,64 +5367,62 @@
1461 )
1462
1463 (define_expand "neon_vst4<mode>"
1464- [(match_operand:SI 0 "s_register_operand" "+r")
1465- (match_operand:XI 1 "s_register_operand" "w")
1466+ [(match_operand:XI 0 "neon_struct_operand")
1467+ (match_operand:XI 1 "s_register_operand")
1468 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1469 "TARGET_NEON"
1470 {
1471- emit_insn (gen_neon_vst4qa<mode> (operands[0], operands[0], operands[1]));
1472- emit_insn (gen_neon_vst4qb<mode> (operands[0], operands[0], operands[1]));
1473+ rtx mem;
1474+
1475+ mem = adjust_address (operands[0], OImode, 0);
1476+ emit_insn (gen_neon_vst4qa<mode> (mem, operands[1]));
1477+ mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
1478+ emit_insn (gen_neon_vst4qb<mode> (mem, operands[1]));
1479 DONE;
1480 })
1481
1482 (define_insn "neon_vst4qa<mode>"
1483- [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0"))
1484- (unspec:OI [(match_operand:XI 2 "s_register_operand" "w")
1485+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
1486+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
1487 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1488- UNSPEC_VST4A))
1489- (set (match_operand:SI 0 "s_register_operand" "=r")
1490- (plus:SI (match_dup 1)
1491- (const_int 32)))]
1492+ UNSPEC_VST4A))]
1493 "TARGET_NEON"
1494 {
1495- int regno = REGNO (operands[2]);
1496+ int regno = REGNO (operands[1]);
1497 rtx ops[5];
1498 ops[0] = operands[0];
1499 ops[1] = gen_rtx_REG (DImode, regno);
1500 ops[2] = gen_rtx_REG (DImode, regno + 4);
1501 ops[3] = gen_rtx_REG (DImode, regno + 8);
1502 ops[4] = gen_rtx_REG (DImode, regno + 12);
1503- output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops);
1504+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
1505 return "";
1506 }
1507 [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
1508 )
1509
1510 (define_insn "neon_vst4qb<mode>"
1511- [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0"))
1512- (unspec:OI [(match_operand:XI 2 "s_register_operand" "w")
1513+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
1514+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
1515 (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
1516- UNSPEC_VST4B))
1517- (set (match_operand:SI 0 "s_register_operand" "=r")
1518- (plus:SI (match_dup 1)
1519- (const_int 32)))]
1520+ UNSPEC_VST4B))]
1521 "TARGET_NEON"
1522 {
1523- int regno = REGNO (operands[2]);
1524+ int regno = REGNO (operands[1]);
1525 rtx ops[5];
1526 ops[0] = operands[0];
1527 ops[1] = gen_rtx_REG (DImode, regno + 2);
1528 ops[2] = gen_rtx_REG (DImode, regno + 6);
1529 ops[3] = gen_rtx_REG (DImode, regno + 10);
1530 ops[4] = gen_rtx_REG (DImode, regno + 14);
1531- output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops);
1532+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
1533 return "";
1534 }
1535 [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")]
1536 )
1537
1538 (define_insn "neon_vst4_lane<mode>"
1539- [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r"))
1540+ [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
1541 (unspec:<V_four_elem>
1542 [(match_operand:OI 1 "s_register_operand" "w")
1543 (match_operand:SI 2 "immediate_operand" "i")
1544@@ -5458,7 +5442,7 @@
1545 ops[3] = gen_rtx_REG (DImode, regno + 4);
1546 ops[4] = gen_rtx_REG (DImode, regno + 6);
1547 ops[5] = operands[2];
1548- output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]",
1549+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
1550 ops);
1551 return "";
1552 }
1553@@ -5466,7 +5450,7 @@
1554 )
1555
1556 (define_insn "neon_vst4_lane<mode>"
1557- [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r"))
1558+ [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
1559 (unspec:<V_four_elem>
1560 [(match_operand:XI 1 "s_register_operand" "w")
1561 (match_operand:SI 2 "immediate_operand" "i")
1562@@ -5491,7 +5475,7 @@
1563 ops[3] = gen_rtx_REG (DImode, regno + 8);
1564 ops[4] = gen_rtx_REG (DImode, regno + 12);
1565 ops[5] = GEN_INT (lane);
1566- output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]",
1567+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
1568 ops);
1569 return "";
1570 }
1571
1572=== modified file 'gcc/config/arm/predicates.md'
1573--- old/gcc/config/arm/predicates.md 2011-04-06 12:29:08 +0000
1574+++ new/gcc/config/arm/predicates.md 2011-04-20 10:00:39 +0000
1575@@ -681,3 +681,7 @@
1576 }
1577 return true;
1578 })
1579+
1580+(define_special_predicate "neon_struct_operand"
1581+ (and (match_code "mem")
1582+ (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)")))
1583
1584=== modified file 'gcc/doc/tm.texi'
1585--- old/gcc/doc/tm.texi 2011-02-08 10:51:58 +0000
1586+++ new/gcc/doc/tm.texi 2011-04-20 10:07:36 +0000
1587@@ -2642,8 +2642,8 @@
1588 register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when
1589 @var{x} is a floating-point constant. If the constant can't be loaded
1590 into any kind of register, code generation will be better if
1591-@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
1592-of using @code{PREFERRED_RELOAD_CLASS}.
1593+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead
1594+of using @code{TARGET_PREFERRED_RELOAD_CLASS}.
1595
1596 If an insn has pseudos in it after register allocation, reload will go
1597 through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS}
1598@@ -4367,6 +4367,34 @@
1599 must have move patterns for this mode.
1600 @end deftypefn
1601
1602+@deftypefn {Target Hook} bool TARGET_ARRAY_MODE_SUPPORTED_P (enum machine_mode @var{mode}, unsigned HOST_WIDE_INT @var{nelems})
1603+Return true if GCC should try to use a scalar mode to store an array
1604+of @var{nelems} elements, given that each element has mode @var{mode}.
1605+Returning true here overrides the usual @code{MAX_FIXED_MODE} limit
1606+and allows GCC to use any defined integer mode.
1607+
1608+One use of this hook is to support vector load and store operations
1609+that operate on several homogeneous vectors. For example, ARM Neon
1610+has operations like:
1611+
1612+@smallexample
1613+int8x8x3_t vld3_s8 (const int8_t *)
1614+@end smallexample
1615+
1616+where the return type is defined as:
1617+
1618+@smallexample
1619+typedef struct int8x8x3_t
1620+@{
1621+ int8x8_t val[3];
1622+@} int8x8x3_t;
1623+@end smallexample
1624+
1625+If this hook allows @code{val} to have a scalar mode, then
1626+@code{int8x8x3_t} can have the same mode. GCC can then store
1627+@code{int8x8x3_t}s in registers rather than forcing them onto the stack.
1628+@end deftypefn
1629+
1630 @node Scalar Return
1631 @subsection How Scalar Function Values Are Returned
1632 @cindex return values in registers
1633@@ -5600,13 +5628,13 @@
1634 You may assume that @var{addr} is a valid address for the machine.
1635 @end defmac
1636
1637-@defmac LEGITIMATE_CONSTANT_P (@var{x})
1638-A C expression that is nonzero if @var{x} is a legitimate constant for
1639-an immediate operand on the target machine. You can assume that
1640-@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact,
1641-@samp{1} is a suitable definition for this macro on machines where
1642-anything @code{CONSTANT_P} is valid.
1643-@end defmac
1644+@deftypefn {Target Hook} bool TARGET_LEGITIMATE_CONSTANT_P (enum machine_mode @var{mode}, rtx @var{x})
1645+This hook returns true if @var{x} is a legitimate constant for a
1646+@var{mode}-mode immediate operand on the target machine. You can assume that
1647+@var{x} satisfies @code{CONSTANT_P}, so you need not check this.
1648+
1649+The default definition returns true.
1650+@end deftypefn
1651
1652 @deftypefn {Target Hook} rtx TARGET_DELEGITIMIZE_ADDRESS (rtx @var{x})
1653 This hook is used to undo the possibly obfuscating effects of the
1654
1655=== modified file 'gcc/expr.c'
1656--- old/gcc/expr.c 2011-03-23 12:22:13 +0000
1657+++ new/gcc/expr.c 2011-04-20 10:07:36 +0000
1658@@ -1537,7 +1537,7 @@
1659 if (nregs == 0)
1660 return;
1661
1662- if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1663+ if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1664 x = validize_mem (force_const_mem (mode, x));
1665
1666 /* See if the machine can do this with a load multiple insn. */
1667@@ -2366,7 +2366,7 @@
1668 offset -= size;
1669
1670 cst = (*constfun) (constfundata, offset, mode);
1671- if (!LEGITIMATE_CONSTANT_P (cst))
1672+ if (!targetm.legitimate_constant_p (mode, cst))
1673 return 0;
1674
1675 if (!reverse)
1676@@ -3440,7 +3440,7 @@
1677
1678 y_cst = y;
1679
1680- if (!LEGITIMATE_CONSTANT_P (y))
1681+ if (!targetm.legitimate_constant_p (mode, y))
1682 {
1683 y = force_const_mem (mode, y);
1684
1685@@ -3496,7 +3496,7 @@
1686
1687 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
1688
1689- if (LEGITIMATE_CONSTANT_P (y))
1690+ if (targetm.legitimate_constant_p (dstmode, y))
1691 oldcost = rtx_cost (y, SET, speed);
1692 else
1693 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
1694@@ -3519,7 +3519,7 @@
1695
1696 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
1697
1698- if (LEGITIMATE_CONSTANT_P (trunc_y))
1699+ if (targetm.legitimate_constant_p (srcmode, trunc_y))
1700 {
1701 /* Skip if the target needs extra instructions to perform
1702 the extension. */
1703@@ -3932,7 +3932,7 @@
1704 by setting SKIP to 0. */
1705 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
1706
1707- if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1708+ if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1709 x = validize_mem (force_const_mem (mode, x));
1710
1711 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
1712@@ -8951,7 +8951,7 @@
1713 constant and we don't need a memory reference. */
1714 if (CONSTANT_P (op0)
1715 && mode2 != BLKmode
1716- && LEGITIMATE_CONSTANT_P (op0)
1717+ && targetm.legitimate_constant_p (mode2, op0)
1718 && !must_force_mem)
1719 op0 = force_reg (mode2, op0);
1720
1721
1722=== modified file 'gcc/hooks.c'
1723--- old/gcc/hooks.c 2009-11-26 01:52:19 +0000
1724+++ new/gcc/hooks.c 2011-04-20 10:06:58 +0000
1725@@ -86,6 +86,15 @@
1726 return true;
1727 }
1728
1729+/* Generic hook that takes (enum machine_mode, unsigned HOST_WIDE_INT)
1730+ and returns false. */
1731+bool
1732+hook_bool_mode_uhwi_false (enum machine_mode mode ATTRIBUTE_UNUSED,
1733+ unsigned HOST_WIDE_INT value ATTRIBUTE_UNUSED)
1734+{
1735+ return false;
1736+}
1737+
1738 /* Generic hook that takes (FILE *, const char *) and does nothing. */
1739 void
1740 hook_void_FILEptr_constcharptr (FILE *a ATTRIBUTE_UNUSED, const char *b ATTRIBUTE_UNUSED)
1741
1742=== modified file 'gcc/hooks.h'
1743--- old/gcc/hooks.h 2009-11-26 01:52:19 +0000
1744+++ new/gcc/hooks.h 2011-04-20 10:06:58 +0000
1745@@ -32,6 +32,8 @@
1746 extern bool hook_bool_mode_false (enum machine_mode);
1747 extern bool hook_bool_mode_const_rtx_false (enum machine_mode, const_rtx);
1748 extern bool hook_bool_mode_const_rtx_true (enum machine_mode, const_rtx);
1749+extern bool hook_bool_mode_uhwi_false (enum machine_mode,
1750+ unsigned HOST_WIDE_INT);
1751 extern bool hook_bool_tree_false (tree);
1752 extern bool hook_bool_const_tree_false (const_tree);
1753 extern bool hook_bool_tree_true (tree);
1754
1755=== modified file 'gcc/recog.c'
1756--- old/gcc/recog.c 2011-02-08 12:07:29 +0000
1757+++ new/gcc/recog.c 2011-04-20 10:07:36 +0000
1758@@ -932,7 +932,9 @@
1759 return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode
1760 || mode == VOIDmode)
1761 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
1762- && LEGITIMATE_CONSTANT_P (op));
1763+ && targetm.legitimate_constant_p (mode == VOIDmode
1764+ ? GET_MODE (op)
1765+ : mode, op));
1766
1767 /* Except for certain constants with VOIDmode, already checked for,
1768 OP's mode must match MODE if MODE specifies a mode. */
1769@@ -1109,7 +1111,9 @@
1770 && (GET_MODE (op) == mode || mode == VOIDmode
1771 || GET_MODE (op) == VOIDmode)
1772 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
1773- && LEGITIMATE_CONSTANT_P (op));
1774+ && targetm.legitimate_constant_p (mode == VOIDmode
1775+ ? GET_MODE (op)
1776+ : mode, op));
1777 }
1778
1779 /* Returns 1 if OP is an operand that is a CONST_INT. */
1780@@ -1175,7 +1179,9 @@
1781 return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode
1782 || mode == VOIDmode)
1783 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
1784- && LEGITIMATE_CONSTANT_P (op));
1785+ && targetm.legitimate_constant_p (mode == VOIDmode
1786+ ? GET_MODE (op)
1787+ : mode, op));
1788 }
1789
1790 if (GET_MODE (op) != mode && mode != VOIDmode)
1791
1792=== modified file 'gcc/reload.c'
1793--- old/gcc/reload.c 2011-02-08 12:07:29 +0000
1794+++ new/gcc/reload.c 2011-04-20 10:07:36 +0000
1795@@ -4739,7 +4739,8 @@
1796 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
1797 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
1798 gcc_assert (tem);
1799- if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem))
1800+ if (CONSTANT_P (tem)
1801+ && !targetm.legitimate_constant_p (GET_MODE (x), tem))
1802 {
1803 tem = force_const_mem (GET_MODE (x), tem);
1804 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
1805@@ -6061,7 +6062,7 @@
1806 enum reload_type type, int ind_levels)
1807 {
1808 if (CONSTANT_P (x)
1809- && (! LEGITIMATE_CONSTANT_P (x)
1810+ && (!targetm.legitimate_constant_p (mode, x)
1811 || PREFERRED_RELOAD_CLASS (x, rclass) == NO_REGS))
1812 {
1813 x = force_const_mem (mode, x);
1814@@ -6071,7 +6072,7 @@
1815
1816 else if (GET_CODE (x) == PLUS
1817 && CONSTANT_P (XEXP (x, 1))
1818- && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
1819+ && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
1820 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), rclass) == NO_REGS))
1821 {
1822 rtx tem;
1823
1824=== modified file 'gcc/reload1.c'
1825--- old/gcc/reload1.c 2011-03-02 13:30:06 +0000
1826+++ new/gcc/reload1.c 2011-04-20 10:07:36 +0000
1827@@ -4164,6 +4164,9 @@
1828 }
1829 else if (function_invariant_p (x))
1830 {
1831+ enum machine_mode mode;
1832+
1833+ mode = GET_MODE (SET_DEST (set));
1834 if (GET_CODE (x) == PLUS)
1835 {
1836 /* This is PLUS of frame pointer and a constant,
1837@@ -4176,12 +4179,11 @@
1838 reg_equiv_invariant[i] = x;
1839 num_eliminable_invariants++;
1840 }
1841- else if (LEGITIMATE_CONSTANT_P (x))
1842+ else if (targetm.legitimate_constant_p (mode, x))
1843 reg_equiv_constant[i] = x;
1844 else
1845 {
1846- reg_equiv_memory_loc[i]
1847- = force_const_mem (GET_MODE (SET_DEST (set)), x);
1848+ reg_equiv_memory_loc[i] = force_const_mem (mode, x);
1849 if (! reg_equiv_memory_loc[i])
1850 reg_equiv_init[i] = NULL_RTX;
1851 }
1852
1853=== modified file 'gcc/stor-layout.c'
1854--- old/gcc/stor-layout.c 2011-04-06 12:29:08 +0000
1855+++ new/gcc/stor-layout.c 2011-04-20 10:06:58 +0000
1856@@ -507,6 +507,34 @@
1857 return MIN (BIGGEST_ALIGNMENT, MAX (1, mode_base_align[mode]*BITS_PER_UNIT));
1858 }
1859
1860+/* Return the natural mode of an array, given that it is SIZE bytes in
1861+ total and has elements of type ELEM_TYPE. */
1862+
1863+static enum machine_mode
1864+mode_for_array (tree elem_type, tree size)
1865+{
1866+ tree elem_size;
1867+ unsigned HOST_WIDE_INT int_size, int_elem_size;
1868+ bool limit_p;
1869+
1870+ /* One-element arrays get the component type's mode. */
1871+ elem_size = TYPE_SIZE (elem_type);
1872+ if (simple_cst_equal (size, elem_size))
1873+ return TYPE_MODE (elem_type);
1874+
1875+ limit_p = true;
1876+ if (host_integerp (size, 1) && host_integerp (elem_size, 1))
1877+ {
1878+ int_size = tree_low_cst (size, 1);
1879+ int_elem_size = tree_low_cst (elem_size, 1);
1880+ if (int_elem_size > 0
1881+ && int_size % int_elem_size == 0
1882+ && targetm.array_mode_supported_p (TYPE_MODE (elem_type),
1883+ int_size / int_elem_size))
1884+ limit_p = false;
1885+ }
1886+ return mode_for_size_tree (size, MODE_INT, limit_p);
1887+}
1888
1889 /* Subroutine of layout_decl: Force alignment required for the data type.
1890 But if the decl itself wants greater alignment, don't override that. */
1891@@ -2044,14 +2072,8 @@
1892 && (TYPE_MODE (TREE_TYPE (type)) != BLKmode
1893 || TYPE_NO_FORCE_BLK (TREE_TYPE (type))))
1894 {
1895- /* One-element arrays get the component type's mode. */
1896- if (simple_cst_equal (TYPE_SIZE (type),
1897- TYPE_SIZE (TREE_TYPE (type))))
1898- SET_TYPE_MODE (type, TYPE_MODE (TREE_TYPE (type)));
1899- else
1900- SET_TYPE_MODE (type, mode_for_size_tree (TYPE_SIZE (type),
1901- MODE_INT, 1));
1902-
1903+ SET_TYPE_MODE (type, mode_for_array (TREE_TYPE (type),
1904+ TYPE_SIZE (type)));
1905 if (TYPE_MODE (type) != BLKmode
1906 && STRICT_ALIGNMENT && TYPE_ALIGN (type) < BIGGEST_ALIGNMENT
1907 && TYPE_ALIGN (type) < GET_MODE_ALIGNMENT (TYPE_MODE (type)))
1908
1909=== modified file 'gcc/target-def.h'
1910--- old/gcc/target-def.h 2010-08-10 13:31:21 +0000
1911+++ new/gcc/target-def.h 2011-04-20 10:07:36 +0000
1912@@ -553,12 +553,17 @@
1913 #define TARGET_VECTOR_MODE_SUPPORTED_P hook_bool_mode_false
1914 #endif
1915
1916+#ifndef TARGET_ARRAY_MODE_SUPPORTED_P
1917+#define TARGET_ARRAY_MODE_SUPPORTED_P hook_bool_mode_uhwi_false
1918+#endif
1919+
1920 /* In hooks.c. */
1921 #define TARGET_CANNOT_MODIFY_JUMPS_P hook_bool_void_false
1922 #define TARGET_BRANCH_TARGET_REGISTER_CLASS \
1923 default_branch_target_register_class
1924 #define TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED hook_bool_bool_false
1925 #define TARGET_HAVE_CONDITIONAL_EXECUTION default_have_conditional_execution
1926+#define TARGET_LEGITIMATE_CONSTANT_P default_legitimate_constant_p
1927 #define TARGET_CANNOT_FORCE_CONST_MEM hook_bool_rtx_false
1928 #define TARGET_CANNOT_COPY_INSN_P NULL
1929 #define TARGET_COMMUTATIVE_P hook_bool_const_rtx_commutative_p
1930@@ -961,6 +966,7 @@
1931 TARGET_BRANCH_TARGET_REGISTER_CLASS, \
1932 TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED, \
1933 TARGET_HAVE_CONDITIONAL_EXECUTION, \
1934+ TARGET_LEGITIMATE_CONSTANT_P, \
1935 TARGET_CANNOT_FORCE_CONST_MEM, \
1936 TARGET_CANNOT_COPY_INSN_P, \
1937 TARGET_COMMUTATIVE_P, \
1938@@ -985,6 +991,7 @@
1939 TARGET_ADDR_SPACE_HOOKS, \
1940 TARGET_SCALAR_MODE_SUPPORTED_P, \
1941 TARGET_VECTOR_MODE_SUPPORTED_P, \
1942+ TARGET_ARRAY_MODE_SUPPORTED_P, \
1943 TARGET_RTX_COSTS, \
1944 TARGET_ADDRESS_COST, \
1945 TARGET_ALLOCATE_INITIAL_VALUE, \
1946
1947=== modified file 'gcc/target.h'
1948--- old/gcc/target.h 2010-08-10 13:31:21 +0000
1949+++ new/gcc/target.h 2011-04-20 10:07:36 +0000
1950@@ -645,7 +645,10 @@
1951 /* Return true if the target supports conditional execution. */
1952 bool (* have_conditional_execution) (void);
1953
1954- /* True if the constant X cannot be placed in the constant pool. */
1955+ /* See tm.texi. */
1956+ bool (* legitimate_constant_p) (enum machine_mode, rtx);
1957+
1958+ /* True if the constant X cannot be placed in the constant pool. */
1959 bool (* cannot_force_const_mem) (rtx);
1960
1961 /* True if the insn X cannot be duplicated. */
1962@@ -764,6 +767,9 @@
1963 for further details. */
1964 bool (* vector_mode_supported_p) (enum machine_mode mode);
1965
1966+ /* See tm.texi. */
1967+ bool (* array_mode_supported_p) (enum machine_mode, unsigned HOST_WIDE_INT);
1968+
1969 /* Compute a (partial) cost for rtx X. Return true if the complete
1970 cost has been computed, and false if subexpressions should be
1971 scanned. In either case, *TOTAL contains the cost result. */
1972
1973=== modified file 'gcc/targhooks.c'
1974--- old/gcc/targhooks.c 2010-03-27 10:27:39 +0000
1975+++ new/gcc/targhooks.c 2011-04-20 10:07:36 +0000
1976@@ -1008,4 +1008,15 @@
1977 #endif
1978 }
1979
1980+bool
1981+default_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED,
1982+ rtx x ATTRIBUTE_UNUSED)
1983+{
1984+#ifdef LEGITIMATE_CONSTANT_P
1985+ return LEGITIMATE_CONSTANT_P (x);
1986+#else
1987+ return true;
1988+#endif
1989+}
1990+
1991 #include "gt-targhooks.h"
1992
1993=== modified file 'gcc/targhooks.h'
1994--- old/gcc/targhooks.h 2010-03-27 10:27:39 +0000
1995+++ new/gcc/targhooks.h 2011-04-20 10:07:36 +0000
1996@@ -132,3 +132,4 @@
1997 extern rtx default_addr_space_convert (rtx, tree, tree);
1998 extern unsigned int default_case_values_threshold (void);
1999 extern bool default_have_conditional_execution (void);
2000+extern bool default_legitimate_constant_p (enum machine_mode, rtx);
2001
2002=== added file 'gcc/testsuite/gcc.target/arm/neon-vld3-1.c'
2003--- old/gcc/testsuite/gcc.target/arm/neon-vld3-1.c 1970-01-01 00:00:00 +0000
2004+++ new/gcc/testsuite/gcc.target/arm/neon-vld3-1.c 2011-04-20 10:00:39 +0000
2005@@ -0,0 +1,27 @@
2006+/* { dg-do run } */
2007+/* { dg-require-effective-target arm_neon_hw } */
2008+/* { dg-options "-O2" } */
2009+/* { dg-add-options arm_neon } */
2010+
2011+#include "arm_neon.h"
2012+
2013+uint32_t buffer[12];
2014+
2015+void __attribute__((noinline))
2016+foo (uint32_t *a)
2017+{
2018+ uint32x4x3_t x;
2019+
2020+ x = vld3q_u32 (a);
2021+ x.val[0] = vaddq_u32 (x.val[0], x.val[1]);
2022+ vst3q_u32 (a, x);
2023+}
2024+
2025+int
2026+main (void)
2027+{
2028+ buffer[0] = 1;
2029+ buffer[1] = 2;
2030+ foo (buffer);
2031+ return buffer[0] != 3;
2032+}
2033
2034=== added file 'gcc/testsuite/gcc.target/arm/neon-vst3-1.c'
2035--- old/gcc/testsuite/gcc.target/arm/neon-vst3-1.c 1970-01-01 00:00:00 +0000
2036+++ new/gcc/testsuite/gcc.target/arm/neon-vst3-1.c 2011-04-20 10:00:39 +0000
2037@@ -0,0 +1,25 @@
2038+/* { dg-do run } */
2039+/* { dg-require-effective-target arm_neon_hw } */
2040+/* { dg-options "-O2" } */
2041+/* { dg-add-options arm_neon } */
2042+
2043+#include "arm_neon.h"
2044+
2045+uint32_t buffer[64];
2046+
2047+void __attribute__((noinline))
2048+foo (uint32_t *a)
2049+{
2050+ uint32x4x3_t x;
2051+
2052+ x = vld3q_u32 (a);
2053+ a[35] = 1;
2054+ vst3q_lane_u32 (a + 32, x, 1);
2055+}
2056+
2057+int
2058+main (void)
2059+{
2060+ foo (buffer);
2061+ return buffer[35] != 1;
2062+}
2063
2064=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c'
2065--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2010-08-20 13:27:11 +0000
2066+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2011-04-20 10:00:39 +0000
2067@@ -15,5 +15,5 @@
2068 out_float32x4_t = vld1q_dup_f32 (0);
2069 }
2070
2071-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2072+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2073 /* { dg-final { cleanup-saved-temps } } */
2074
2075=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c'
2076--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2010-08-20 13:27:11 +0000
2077+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2011-04-20 10:00:39 +0000
2078@@ -15,5 +15,5 @@
2079 out_poly16x8_t = vld1q_dup_p16 (0);
2080 }
2081
2082-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2083+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2084 /* { dg-final { cleanup-saved-temps } } */
2085
2086=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c'
2087--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2010-08-20 13:27:11 +0000
2088+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2011-04-20 10:00:39 +0000
2089@@ -15,5 +15,5 @@
2090 out_poly8x16_t = vld1q_dup_p8 (0);
2091 }
2092
2093-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2094+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2095 /* { dg-final { cleanup-saved-temps } } */
2096
2097=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c'
2098--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2010-08-20 13:27:11 +0000
2099+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2011-04-20 10:00:39 +0000
2100@@ -15,5 +15,5 @@
2101 out_int16x8_t = vld1q_dup_s16 (0);
2102 }
2103
2104-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2105+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2106 /* { dg-final { cleanup-saved-temps } } */
2107
2108=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c'
2109--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2010-08-20 13:27:11 +0000
2110+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2011-04-20 10:00:39 +0000
2111@@ -15,5 +15,5 @@
2112 out_int32x4_t = vld1q_dup_s32 (0);
2113 }
2114
2115-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2116+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2117 /* { dg-final { cleanup-saved-temps } } */
2118
2119=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c'
2120--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2010-08-20 13:27:11 +0000
2121+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2011-04-20 10:00:39 +0000
2122@@ -15,5 +15,5 @@
2123 out_int64x2_t = vld1q_dup_s64 (0);
2124 }
2125
2126-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2127+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2128 /* { dg-final { cleanup-saved-temps } } */
2129
2130=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c'
2131--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2010-08-20 13:27:11 +0000
2132+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2011-04-20 10:00:39 +0000
2133@@ -15,5 +15,5 @@
2134 out_int8x16_t = vld1q_dup_s8 (0);
2135 }
2136
2137-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2138+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2139 /* { dg-final { cleanup-saved-temps } } */
2140
2141=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c'
2142--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2010-08-20 13:27:11 +0000
2143+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2011-04-20 10:00:39 +0000
2144@@ -15,5 +15,5 @@
2145 out_uint16x8_t = vld1q_dup_u16 (0);
2146 }
2147
2148-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2149+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2150 /* { dg-final { cleanup-saved-temps } } */
2151
2152=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c'
2153--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2010-08-20 13:27:11 +0000
2154+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2011-04-20 10:00:39 +0000
2155@@ -15,5 +15,5 @@
2156 out_uint32x4_t = vld1q_dup_u32 (0);
2157 }
2158
2159-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2160+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2161 /* { dg-final { cleanup-saved-temps } } */
2162
2163=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c'
2164--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2010-08-20 13:27:11 +0000
2165+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2011-04-20 10:00:39 +0000
2166@@ -15,5 +15,5 @@
2167 out_uint64x2_t = vld1q_dup_u64 (0);
2168 }
2169
2170-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2171+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2172 /* { dg-final { cleanup-saved-temps } } */
2173
2174=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c'
2175--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2010-08-20 13:27:11 +0000
2176+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2011-04-20 10:00:39 +0000
2177@@ -15,5 +15,5 @@
2178 out_uint8x16_t = vld1q_dup_u8 (0);
2179 }
2180
2181-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2182+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2183 /* { dg-final { cleanup-saved-temps } } */
2184
2185=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c'
2186--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2010-08-20 13:27:11 +0000
2187+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2011-04-20 10:00:39 +0000
2188@@ -16,5 +16,5 @@
2189 out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
2190 }
2191
2192-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2193+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2194 /* { dg-final { cleanup-saved-temps } } */
2195
2196=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c'
2197--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2010-08-20 13:27:11 +0000
2198+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2011-04-20 10:00:39 +0000
2199@@ -16,5 +16,5 @@
2200 out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
2201 }
2202
2203-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2204+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2205 /* { dg-final { cleanup-saved-temps } } */
2206
2207=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c'
2208--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2010-08-20 13:27:11 +0000
2209+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2011-04-20 10:00:39 +0000
2210@@ -16,5 +16,5 @@
2211 out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
2212 }
2213
2214-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2215+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2216 /* { dg-final { cleanup-saved-temps } } */
2217
2218=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c'
2219--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2010-08-20 13:27:11 +0000
2220+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2011-04-20 10:00:39 +0000
2221@@ -16,5 +16,5 @@
2222 out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
2223 }
2224
2225-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2226+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2227 /* { dg-final { cleanup-saved-temps } } */
2228
2229=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c'
2230--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2010-08-20 13:27:11 +0000
2231+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2011-04-20 10:00:39 +0000
2232@@ -16,5 +16,5 @@
2233 out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
2234 }
2235
2236-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2237+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2238 /* { dg-final { cleanup-saved-temps } } */
2239
2240=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c'
2241--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2010-08-20 13:27:11 +0000
2242+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2011-04-20 10:00:39 +0000
2243@@ -16,5 +16,5 @@
2244 out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
2245 }
2246
2247-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2248+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2249 /* { dg-final { cleanup-saved-temps } } */
2250
2251=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c'
2252--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2010-08-20 13:27:11 +0000
2253+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2011-04-20 10:00:39 +0000
2254@@ -16,5 +16,5 @@
2255 out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
2256 }
2257
2258-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2259+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2260 /* { dg-final { cleanup-saved-temps } } */
2261
2262=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c'
2263--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2010-08-20 13:27:11 +0000
2264+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2011-04-20 10:00:39 +0000
2265@@ -16,5 +16,5 @@
2266 out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
2267 }
2268
2269-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2270+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2271 /* { dg-final { cleanup-saved-temps } } */
2272
2273=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c'
2274--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2010-08-20 13:27:11 +0000
2275+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2011-04-20 10:00:39 +0000
2276@@ -16,5 +16,5 @@
2277 out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
2278 }
2279
2280-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2281+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2282 /* { dg-final { cleanup-saved-temps } } */
2283
2284=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c'
2285--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2010-08-20 13:27:11 +0000
2286+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2011-04-20 10:00:39 +0000
2287@@ -16,5 +16,5 @@
2288 out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
2289 }
2290
2291-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2292+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2293 /* { dg-final { cleanup-saved-temps } } */
2294
2295=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c'
2296--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2010-08-20 13:27:11 +0000
2297+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2011-04-20 10:00:39 +0000
2298@@ -16,5 +16,5 @@
2299 out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
2300 }
2301
2302-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2303+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2304 /* { dg-final { cleanup-saved-temps } } */
2305
2306=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c'
2307--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2010-08-20 13:27:11 +0000
2308+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2011-04-20 10:00:39 +0000
2309@@ -15,5 +15,5 @@
2310 out_float32x4_t = vld1q_f32 (0);
2311 }
2312
2313-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2314+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2315 /* { dg-final { cleanup-saved-temps } } */
2316
2317=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c'
2318--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2010-08-20 13:27:11 +0000
2319+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2011-04-20 10:00:39 +0000
2320@@ -15,5 +15,5 @@
2321 out_poly16x8_t = vld1q_p16 (0);
2322 }
2323
2324-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2325+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2326 /* { dg-final { cleanup-saved-temps } } */
2327
2328=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c'
2329--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2010-08-20 13:27:11 +0000
2330+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2011-04-20 10:00:39 +0000
2331@@ -15,5 +15,5 @@
2332 out_poly8x16_t = vld1q_p8 (0);
2333 }
2334
2335-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2336+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2337 /* { dg-final { cleanup-saved-temps } } */
2338
2339=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c'
2340--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2010-08-20 13:27:11 +0000
2341+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2011-04-20 10:00:39 +0000
2342@@ -15,5 +15,5 @@
2343 out_int16x8_t = vld1q_s16 (0);
2344 }
2345
2346-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2347+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2348 /* { dg-final { cleanup-saved-temps } } */
2349
2350=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c'
2351--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2010-08-20 13:27:11 +0000
2352+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2011-04-20 10:00:39 +0000
2353@@ -15,5 +15,5 @@
2354 out_int32x4_t = vld1q_s32 (0);
2355 }
2356
2357-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2358+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2359 /* { dg-final { cleanup-saved-temps } } */
2360
2361=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c'
2362--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2010-08-20 13:27:11 +0000
2363+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2011-04-20 10:00:39 +0000
2364@@ -15,5 +15,5 @@
2365 out_int64x2_t = vld1q_s64 (0);
2366 }
2367
2368-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2369+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2370 /* { dg-final { cleanup-saved-temps } } */
2371
2372=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c'
2373--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2010-08-20 13:27:11 +0000
2374+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2011-04-20 10:00:39 +0000
2375@@ -15,5 +15,5 @@
2376 out_int8x16_t = vld1q_s8 (0);
2377 }
2378
2379-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2380+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2381 /* { dg-final { cleanup-saved-temps } } */
2382
2383=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c'
2384--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2010-08-20 13:27:11 +0000
2385+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2011-04-20 10:00:39 +0000
2386@@ -15,5 +15,5 @@
2387 out_uint16x8_t = vld1q_u16 (0);
2388 }
2389
2390-/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2391+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2392 /* { dg-final { cleanup-saved-temps } } */
2393
2394=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c'
2395--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2010-08-20 13:27:11 +0000
2396+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2011-04-20 10:00:39 +0000
2397@@ -15,5 +15,5 @@
2398 out_uint32x4_t = vld1q_u32 (0);
2399 }
2400
2401-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2402+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2403 /* { dg-final { cleanup-saved-temps } } */
2404
2405=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c'
2406--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2010-08-20 13:27:11 +0000
2407+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2011-04-20 10:00:39 +0000
2408@@ -15,5 +15,5 @@
2409 out_uint64x2_t = vld1q_u64 (0);
2410 }
2411
2412-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2413+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2414 /* { dg-final { cleanup-saved-temps } } */
2415
2416=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c'
2417--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2010-08-20 13:27:11 +0000
2418+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2011-04-20 10:00:39 +0000
2419@@ -15,5 +15,5 @@
2420 out_uint8x16_t = vld1q_u8 (0);
2421 }
2422
2423-/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2424+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2425 /* { dg-final { cleanup-saved-temps } } */
2426
2427=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c'
2428--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2010-08-20 13:27:11 +0000
2429+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2011-04-20 10:00:39 +0000
2430@@ -15,5 +15,5 @@
2431 out_float32x2_t = vld1_dup_f32 (0);
2432 }
2433
2434-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2435+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2436 /* { dg-final { cleanup-saved-temps } } */
2437
2438=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c'
2439--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2010-08-20 13:27:11 +0000
2440+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2011-04-20 10:00:39 +0000
2441@@ -15,5 +15,5 @@
2442 out_poly16x4_t = vld1_dup_p16 (0);
2443 }
2444
2445-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2446+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2447 /* { dg-final { cleanup-saved-temps } } */
2448
2449=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c'
2450--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2010-08-20 13:27:11 +0000
2451+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2011-04-20 10:00:39 +0000
2452@@ -15,5 +15,5 @@
2453 out_poly8x8_t = vld1_dup_p8 (0);
2454 }
2455
2456-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2457+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2458 /* { dg-final { cleanup-saved-temps } } */
2459
2460=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c'
2461--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2010-08-20 13:27:11 +0000
2462+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2011-04-20 10:00:39 +0000
2463@@ -15,5 +15,5 @@
2464 out_int16x4_t = vld1_dup_s16 (0);
2465 }
2466
2467-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2468+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2469 /* { dg-final { cleanup-saved-temps } } */
2470
2471=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c'
2472--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2010-08-20 13:27:11 +0000
2473+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2011-04-20 10:00:39 +0000
2474@@ -15,5 +15,5 @@
2475 out_int32x2_t = vld1_dup_s32 (0);
2476 }
2477
2478-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2479+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2480 /* { dg-final { cleanup-saved-temps } } */
2481
2482=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c'
2483--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2010-08-20 13:27:11 +0000
2484+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2011-04-20 10:00:39 +0000
2485@@ -15,5 +15,5 @@
2486 out_int64x1_t = vld1_dup_s64 (0);
2487 }
2488
2489-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2490+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2491 /* { dg-final { cleanup-saved-temps } } */
2492
2493=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c'
2494--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2010-08-20 13:27:11 +0000
2495+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2011-04-20 10:00:39 +0000
2496@@ -15,5 +15,5 @@
2497 out_int8x8_t = vld1_dup_s8 (0);
2498 }
2499
2500-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2501+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2502 /* { dg-final { cleanup-saved-temps } } */
2503
2504=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c'
2505--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2010-08-20 13:27:11 +0000
2506+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2011-04-20 10:00:39 +0000
2507@@ -15,5 +15,5 @@
2508 out_uint16x4_t = vld1_dup_u16 (0);
2509 }
2510
2511-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2512+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2513 /* { dg-final { cleanup-saved-temps } } */
2514
2515=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c'
2516--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2010-08-20 13:27:11 +0000
2517+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2011-04-20 10:00:39 +0000
2518@@ -15,5 +15,5 @@
2519 out_uint32x2_t = vld1_dup_u32 (0);
2520 }
2521
2522-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2523+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2524 /* { dg-final { cleanup-saved-temps } } */
2525
2526=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c'
2527--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2010-08-20 13:27:11 +0000
2528+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2011-04-20 10:00:39 +0000
2529@@ -15,5 +15,5 @@
2530 out_uint64x1_t = vld1_dup_u64 (0);
2531 }
2532
2533-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2534+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2535 /* { dg-final { cleanup-saved-temps } } */
2536
2537=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c'
2538--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2010-08-20 13:27:11 +0000
2539+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2011-04-20 10:00:39 +0000
2540@@ -15,5 +15,5 @@
2541 out_uint8x8_t = vld1_dup_u8 (0);
2542 }
2543
2544-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2545+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2546 /* { dg-final { cleanup-saved-temps } } */
2547
2548=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c'
2549--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2010-08-20 13:27:11 +0000
2550+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2011-04-20 10:00:39 +0000
2551@@ -16,5 +16,5 @@
2552 out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
2553 }
2554
2555-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2556+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2557 /* { dg-final { cleanup-saved-temps } } */
2558
2559=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c'
2560--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2010-08-20 13:27:11 +0000
2561+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2011-04-20 10:00:39 +0000
2562@@ -16,5 +16,5 @@
2563 out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
2564 }
2565
2566-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2567+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2568 /* { dg-final { cleanup-saved-temps } } */
2569
2570=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c'
2571--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2010-08-20 13:27:11 +0000
2572+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2011-04-20 10:00:39 +0000
2573@@ -16,5 +16,5 @@
2574 out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
2575 }
2576
2577-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2578+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2579 /* { dg-final { cleanup-saved-temps } } */
2580
2581=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c'
2582--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2010-08-20 13:27:11 +0000
2583+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2011-04-20 10:00:39 +0000
2584@@ -16,5 +16,5 @@
2585 out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
2586 }
2587
2588-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2589+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2590 /* { dg-final { cleanup-saved-temps } } */
2591
2592=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c'
2593--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2010-08-20 13:27:11 +0000
2594+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2011-04-20 10:00:39 +0000
2595@@ -16,5 +16,5 @@
2596 out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
2597 }
2598
2599-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2600+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2601 /* { dg-final { cleanup-saved-temps } } */
2602
2603=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c'
2604--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2010-08-20 13:27:11 +0000
2605+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2011-04-20 10:00:39 +0000
2606@@ -16,5 +16,5 @@
2607 out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
2608 }
2609
2610-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2611+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2612 /* { dg-final { cleanup-saved-temps } } */
2613
2614=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c'
2615--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2010-08-20 13:27:11 +0000
2616+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2011-04-20 10:00:39 +0000
2617@@ -16,5 +16,5 @@
2618 out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
2619 }
2620
2621-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2622+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2623 /* { dg-final { cleanup-saved-temps } } */
2624
2625=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c'
2626--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2010-08-20 13:27:11 +0000
2627+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2011-04-20 10:00:39 +0000
2628@@ -16,5 +16,5 @@
2629 out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
2630 }
2631
2632-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2633+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2634 /* { dg-final { cleanup-saved-temps } } */
2635
2636=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c'
2637--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2010-08-20 13:27:11 +0000
2638+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2011-04-20 10:00:39 +0000
2639@@ -16,5 +16,5 @@
2640 out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
2641 }
2642
2643-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2644+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2645 /* { dg-final { cleanup-saved-temps } } */
2646
2647=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c'
2648--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2010-08-20 13:27:11 +0000
2649+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2011-04-20 10:00:39 +0000
2650@@ -16,5 +16,5 @@
2651 out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
2652 }
2653
2654-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2655+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2656 /* { dg-final { cleanup-saved-temps } } */
2657
2658=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c'
2659--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2010-08-20 13:27:11 +0000
2660+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2011-04-20 10:00:39 +0000
2661@@ -16,5 +16,5 @@
2662 out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
2663 }
2664
2665-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2666+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2667 /* { dg-final { cleanup-saved-temps } } */
2668
2669=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1f32.c'
2670--- old/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2010-08-20 13:27:11 +0000
2671+++ new/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2011-04-20 10:00:39 +0000
2672@@ -15,5 +15,5 @@
2673 out_float32x2_t = vld1_f32 (0);
2674 }
2675
2676-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2677+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2678 /* { dg-final { cleanup-saved-temps } } */
2679
2680=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p16.c'
2681--- old/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2010-08-20 13:27:11 +0000
2682+++ new/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2011-04-20 10:00:39 +0000
2683@@ -15,5 +15,5 @@
2684 out_poly16x4_t = vld1_p16 (0);
2685 }
2686
2687-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2688+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2689 /* { dg-final { cleanup-saved-temps } } */
2690
2691=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p8.c'
2692--- old/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2010-08-20 13:27:11 +0000
2693+++ new/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2011-04-20 10:00:39 +0000
2694@@ -15,5 +15,5 @@
2695 out_poly8x8_t = vld1_p8 (0);
2696 }
2697
2698-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2699+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2700 /* { dg-final { cleanup-saved-temps } } */
2701
2702=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s16.c'
2703--- old/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2010-08-20 13:27:11 +0000
2704+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2011-04-20 10:00:39 +0000
2705@@ -15,5 +15,5 @@
2706 out_int16x4_t = vld1_s16 (0);
2707 }
2708
2709-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2710+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2711 /* { dg-final { cleanup-saved-temps } } */
2712
2713=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s32.c'
2714--- old/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2010-08-20 13:27:11 +0000
2715+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2011-04-20 10:00:39 +0000
2716@@ -15,5 +15,5 @@
2717 out_int32x2_t = vld1_s32 (0);
2718 }
2719
2720-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2721+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2722 /* { dg-final { cleanup-saved-temps } } */
2723
2724=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s64.c'
2725--- old/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2010-08-20 13:27:11 +0000
2726+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2011-04-20 10:00:39 +0000
2727@@ -15,5 +15,5 @@
2728 out_int64x1_t = vld1_s64 (0);
2729 }
2730
2731-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2732+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2733 /* { dg-final { cleanup-saved-temps } } */
2734
2735=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s8.c'
2736--- old/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2010-08-20 13:27:11 +0000
2737+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2011-04-20 10:00:39 +0000
2738@@ -15,5 +15,5 @@
2739 out_int8x8_t = vld1_s8 (0);
2740 }
2741
2742-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2743+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2744 /* { dg-final { cleanup-saved-temps } } */
2745
2746=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u16.c'
2747--- old/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2010-08-20 13:27:11 +0000
2748+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2011-04-20 10:00:39 +0000
2749@@ -15,5 +15,5 @@
2750 out_uint16x4_t = vld1_u16 (0);
2751 }
2752
2753-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2754+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2755 /* { dg-final { cleanup-saved-temps } } */
2756
2757=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u32.c'
2758--- old/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2010-08-20 13:27:11 +0000
2759+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2011-04-20 10:00:39 +0000
2760@@ -15,5 +15,5 @@
2761 out_uint32x2_t = vld1_u32 (0);
2762 }
2763
2764-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2765+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2766 /* { dg-final { cleanup-saved-temps } } */
2767
2768=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u64.c'
2769--- old/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2010-08-20 13:27:11 +0000
2770+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2011-04-20 10:00:39 +0000
2771@@ -15,5 +15,5 @@
2772 out_uint64x1_t = vld1_u64 (0);
2773 }
2774
2775-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2776+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2777 /* { dg-final { cleanup-saved-temps } } */
2778
2779=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u8.c'
2780--- old/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2010-08-20 13:27:11 +0000
2781+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2011-04-20 10:00:39 +0000
2782@@ -15,5 +15,5 @@
2783 out_uint8x8_t = vld1_u8 (0);
2784 }
2785
2786-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2787+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2788 /* { dg-final { cleanup-saved-temps } } */
2789
2790=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c'
2791--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2010-08-20 13:27:11 +0000
2792+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2011-04-20 10:00:39 +0000
2793@@ -16,5 +16,5 @@
2794 out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
2795 }
2796
2797-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2798+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2799 /* { dg-final { cleanup-saved-temps } } */
2800
2801=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c'
2802--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2010-08-20 13:27:11 +0000
2803+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2011-04-20 10:00:39 +0000
2804@@ -16,5 +16,5 @@
2805 out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
2806 }
2807
2808-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2809+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2810 /* { dg-final { cleanup-saved-temps } } */
2811
2812=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c'
2813--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2010-08-20 13:27:11 +0000
2814+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2011-04-20 10:00:39 +0000
2815@@ -16,5 +16,5 @@
2816 out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
2817 }
2818
2819-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2820+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2821 /* { dg-final { cleanup-saved-temps } } */
2822
2823=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c'
2824--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2010-08-20 13:27:11 +0000
2825+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2011-04-20 10:00:39 +0000
2826@@ -16,5 +16,5 @@
2827 out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
2828 }
2829
2830-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2831+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2832 /* { dg-final { cleanup-saved-temps } } */
2833
2834=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c'
2835--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2010-08-20 13:27:11 +0000
2836+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2011-04-20 10:00:39 +0000
2837@@ -16,5 +16,5 @@
2838 out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
2839 }
2840
2841-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2842+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2843 /* { dg-final { cleanup-saved-temps } } */
2844
2845=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c'
2846--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2010-08-20 13:27:11 +0000
2847+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2011-04-20 10:00:39 +0000
2848@@ -16,5 +16,5 @@
2849 out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
2850 }
2851
2852-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2853+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2854 /* { dg-final { cleanup-saved-temps } } */
2855
2856=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c'
2857--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2010-08-20 13:27:11 +0000
2858+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2011-04-20 10:00:39 +0000
2859@@ -15,6 +15,6 @@
2860 out_float32x4x2_t = vld2q_f32 (0);
2861 }
2862
2863-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2864-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2865+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2866+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2867 /* { dg-final { cleanup-saved-temps } } */
2868
2869=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c'
2870--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2010-08-20 13:27:11 +0000
2871+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2011-04-20 10:00:39 +0000
2872@@ -15,6 +15,6 @@
2873 out_poly16x8x2_t = vld2q_p16 (0);
2874 }
2875
2876-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2877-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2878+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2879+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2880 /* { dg-final { cleanup-saved-temps } } */
2881
2882=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c'
2883--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2010-08-20 13:27:11 +0000
2884+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2011-04-20 10:00:39 +0000
2885@@ -15,6 +15,6 @@
2886 out_poly8x16x2_t = vld2q_p8 (0);
2887 }
2888
2889-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2890-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2891+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2892+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2893 /* { dg-final { cleanup-saved-temps } } */
2894
2895=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c'
2896--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2010-08-20 13:27:11 +0000
2897+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2011-04-20 10:00:39 +0000
2898@@ -15,6 +15,6 @@
2899 out_int16x8x2_t = vld2q_s16 (0);
2900 }
2901
2902-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2903-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2904+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2905+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2906 /* { dg-final { cleanup-saved-temps } } */
2907
2908=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c'
2909--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2010-08-20 13:27:11 +0000
2910+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2011-04-20 10:00:39 +0000
2911@@ -15,6 +15,6 @@
2912 out_int32x4x2_t = vld2q_s32 (0);
2913 }
2914
2915-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2916-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2917+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2918+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2919 /* { dg-final { cleanup-saved-temps } } */
2920
2921=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c'
2922--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2010-08-20 13:27:11 +0000
2923+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2011-04-20 10:00:39 +0000
2924@@ -15,6 +15,6 @@
2925 out_int8x16x2_t = vld2q_s8 (0);
2926 }
2927
2928-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2929-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2930+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2931+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2932 /* { dg-final { cleanup-saved-temps } } */
2933
2934=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c'
2935--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2010-08-20 13:27:11 +0000
2936+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2011-04-20 10:00:39 +0000
2937@@ -15,6 +15,6 @@
2938 out_uint16x8x2_t = vld2q_u16 (0);
2939 }
2940
2941-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2942-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2943+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2944+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2945 /* { dg-final { cleanup-saved-temps } } */
2946
2947=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c'
2948--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2010-08-20 13:27:11 +0000
2949+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2011-04-20 10:00:39 +0000
2950@@ -15,6 +15,6 @@
2951 out_uint32x4x2_t = vld2q_u32 (0);
2952 }
2953
2954-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2955-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2956+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2957+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2958 /* { dg-final { cleanup-saved-temps } } */
2959
2960=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c'
2961--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2010-08-20 13:27:11 +0000
2962+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2011-04-20 10:00:39 +0000
2963@@ -15,6 +15,6 @@
2964 out_uint8x16x2_t = vld2q_u8 (0);
2965 }
2966
2967-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2968-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2969+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2970+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2971 /* { dg-final { cleanup-saved-temps } } */
2972
2973=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c'
2974--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2010-08-20 13:27:11 +0000
2975+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2011-04-20 10:00:39 +0000
2976@@ -15,5 +15,5 @@
2977 out_float32x2x2_t = vld2_dup_f32 (0);
2978 }
2979
2980-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2981+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2982 /* { dg-final { cleanup-saved-temps } } */
2983
2984=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c'
2985--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2010-08-20 13:27:11 +0000
2986+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2011-04-20 10:00:39 +0000
2987@@ -15,5 +15,5 @@
2988 out_poly16x4x2_t = vld2_dup_p16 (0);
2989 }
2990
2991-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
2992+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
2993 /* { dg-final { cleanup-saved-temps } } */
2994
2995=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c'
2996--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2010-08-20 13:27:11 +0000
2997+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2011-04-20 10:00:39 +0000
2998@@ -15,5 +15,5 @@
2999 out_poly8x8x2_t = vld2_dup_p8 (0);
3000 }
3001
3002-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3003+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3004 /* { dg-final { cleanup-saved-temps } } */
3005
3006=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c'
3007--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2010-08-20 13:27:11 +0000
3008+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2011-04-20 10:00:39 +0000
3009@@ -15,5 +15,5 @@
3010 out_int16x4x2_t = vld2_dup_s16 (0);
3011 }
3012
3013-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3014+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3015 /* { dg-final { cleanup-saved-temps } } */
3016
3017=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c'
3018--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2010-08-20 13:27:11 +0000
3019+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2011-04-20 10:00:39 +0000
3020@@ -15,5 +15,5 @@
3021 out_int32x2x2_t = vld2_dup_s32 (0);
3022 }
3023
3024-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3025+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3026 /* { dg-final { cleanup-saved-temps } } */
3027
3028=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c'
3029--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2010-08-20 13:27:11 +0000
3030+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2011-04-20 10:00:39 +0000
3031@@ -15,5 +15,5 @@
3032 out_int64x1x2_t = vld2_dup_s64 (0);
3033 }
3034
3035-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3036+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3037 /* { dg-final { cleanup-saved-temps } } */
3038
3039=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c'
3040--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2010-08-20 13:27:11 +0000
3041+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2011-04-20 10:00:39 +0000
3042@@ -15,5 +15,5 @@
3043 out_int8x8x2_t = vld2_dup_s8 (0);
3044 }
3045
3046-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3047+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3048 /* { dg-final { cleanup-saved-temps } } */
3049
3050=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c'
3051--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2010-08-20 13:27:11 +0000
3052+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2011-04-20 10:00:39 +0000
3053@@ -15,5 +15,5 @@
3054 out_uint16x4x2_t = vld2_dup_u16 (0);
3055 }
3056
3057-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3058+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3059 /* { dg-final { cleanup-saved-temps } } */
3060
3061=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c'
3062--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2010-08-20 13:27:11 +0000
3063+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2011-04-20 10:00:39 +0000
3064@@ -15,5 +15,5 @@
3065 out_uint32x2x2_t = vld2_dup_u32 (0);
3066 }
3067
3068-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3069+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3070 /* { dg-final { cleanup-saved-temps } } */
3071
3072=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c'
3073--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2010-08-20 13:27:11 +0000
3074+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2011-04-20 10:00:39 +0000
3075@@ -15,5 +15,5 @@
3076 out_uint64x1x2_t = vld2_dup_u64 (0);
3077 }
3078
3079-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3080+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3081 /* { dg-final { cleanup-saved-temps } } */
3082
3083=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c'
3084--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2010-08-20 13:27:11 +0000
3085+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2011-04-20 10:00:39 +0000
3086@@ -15,5 +15,5 @@
3087 out_uint8x8x2_t = vld2_dup_u8 (0);
3088 }
3089
3090-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3091+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3092 /* { dg-final { cleanup-saved-temps } } */
3093
3094=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c'
3095--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2010-08-20 13:27:11 +0000
3096+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2011-04-20 10:00:39 +0000
3097@@ -16,5 +16,5 @@
3098 out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1);
3099 }
3100
3101-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3102+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3103 /* { dg-final { cleanup-saved-temps } } */
3104
3105=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c'
3106--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2010-08-20 13:27:11 +0000
3107+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2011-04-20 10:00:39 +0000
3108@@ -16,5 +16,5 @@
3109 out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1);
3110 }
3111
3112-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3113+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3114 /* { dg-final { cleanup-saved-temps } } */
3115
3116=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c'
3117--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2010-08-20 13:27:11 +0000
3118+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2011-04-20 10:00:39 +0000
3119@@ -16,5 +16,5 @@
3120 out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1);
3121 }
3122
3123-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3124+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3125 /* { dg-final { cleanup-saved-temps } } */
3126
3127=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c'
3128--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2010-08-20 13:27:11 +0000
3129+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2011-04-20 10:00:39 +0000
3130@@ -16,5 +16,5 @@
3131 out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1);
3132 }
3133
3134-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3135+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3136 /* { dg-final { cleanup-saved-temps } } */
3137
3138=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c'
3139--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2010-08-20 13:27:11 +0000
3140+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2011-04-20 10:00:39 +0000
3141@@ -16,5 +16,5 @@
3142 out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1);
3143 }
3144
3145-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3146+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3147 /* { dg-final { cleanup-saved-temps } } */
3148
3149=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c'
3150--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2010-08-20 13:27:11 +0000
3151+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2011-04-20 10:00:39 +0000
3152@@ -16,5 +16,5 @@
3153 out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1);
3154 }
3155
3156-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3157+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3158 /* { dg-final { cleanup-saved-temps } } */
3159
3160=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c'
3161--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2010-08-20 13:27:11 +0000
3162+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2011-04-20 10:00:39 +0000
3163@@ -16,5 +16,5 @@
3164 out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1);
3165 }
3166
3167-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3168+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3169 /* { dg-final { cleanup-saved-temps } } */
3170
3171=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c'
3172--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2010-08-20 13:27:11 +0000
3173+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2011-04-20 10:00:39 +0000
3174@@ -16,5 +16,5 @@
3175 out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1);
3176 }
3177
3178-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3179+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3180 /* { dg-final { cleanup-saved-temps } } */
3181
3182=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c'
3183--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2010-08-20 13:27:11 +0000
3184+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2011-04-20 10:00:39 +0000
3185@@ -16,5 +16,5 @@
3186 out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1);
3187 }
3188
3189-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3190+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3191 /* { dg-final { cleanup-saved-temps } } */
3192
3193=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2f32.c'
3194--- old/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2010-08-20 13:27:11 +0000
3195+++ new/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2011-04-20 10:00:39 +0000
3196@@ -15,5 +15,5 @@
3197 out_float32x2x2_t = vld2_f32 (0);
3198 }
3199
3200-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3201+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3202 /* { dg-final { cleanup-saved-temps } } */
3203
3204=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p16.c'
3205--- old/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2010-08-20 13:27:11 +0000
3206+++ new/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2011-04-20 10:00:39 +0000
3207@@ -15,5 +15,5 @@
3208 out_poly16x4x2_t = vld2_p16 (0);
3209 }
3210
3211-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3212+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3213 /* { dg-final { cleanup-saved-temps } } */
3214
3215=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p8.c'
3216--- old/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2010-08-20 13:27:11 +0000
3217+++ new/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2011-04-20 10:00:39 +0000
3218@@ -15,5 +15,5 @@
3219 out_poly8x8x2_t = vld2_p8 (0);
3220 }
3221
3222-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3223+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3224 /* { dg-final { cleanup-saved-temps } } */
3225
3226=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s16.c'
3227--- old/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2010-08-20 13:27:11 +0000
3228+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2011-04-20 10:00:39 +0000
3229@@ -15,5 +15,5 @@
3230 out_int16x4x2_t = vld2_s16 (0);
3231 }
3232
3233-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3234+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3235 /* { dg-final { cleanup-saved-temps } } */
3236
3237=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s32.c'
3238--- old/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2010-08-20 13:27:11 +0000
3239+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2011-04-20 10:00:39 +0000
3240@@ -15,5 +15,5 @@
3241 out_int32x2x2_t = vld2_s32 (0);
3242 }
3243
3244-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3245+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3246 /* { dg-final { cleanup-saved-temps } } */
3247
3248=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s64.c'
3249--- old/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2010-08-20 13:27:11 +0000
3250+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2011-04-20 10:00:39 +0000
3251@@ -15,5 +15,5 @@
3252 out_int64x1x2_t = vld2_s64 (0);
3253 }
3254
3255-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3256+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3257 /* { dg-final { cleanup-saved-temps } } */
3258
3259=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s8.c'
3260--- old/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2010-08-20 13:27:11 +0000
3261+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2011-04-20 10:00:39 +0000
3262@@ -15,5 +15,5 @@
3263 out_int8x8x2_t = vld2_s8 (0);
3264 }
3265
3266-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3267+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3268 /* { dg-final { cleanup-saved-temps } } */
3269
3270=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u16.c'
3271--- old/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2010-08-20 13:27:11 +0000
3272+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2011-04-20 10:00:39 +0000
3273@@ -15,5 +15,5 @@
3274 out_uint16x4x2_t = vld2_u16 (0);
3275 }
3276
3277-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3278+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3279 /* { dg-final { cleanup-saved-temps } } */
3280
3281=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u32.c'
3282--- old/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2010-08-20 13:27:11 +0000
3283+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2011-04-20 10:00:39 +0000
3284@@ -15,5 +15,5 @@
3285 out_uint32x2x2_t = vld2_u32 (0);
3286 }
3287
3288-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3289+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3290 /* { dg-final { cleanup-saved-temps } } */
3291
3292=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u64.c'
3293--- old/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2010-08-20 13:27:11 +0000
3294+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2011-04-20 10:00:39 +0000
3295@@ -15,5 +15,5 @@
3296 out_uint64x1x2_t = vld2_u64 (0);
3297 }
3298
3299-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3300+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3301 /* { dg-final { cleanup-saved-temps } } */
3302
3303=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u8.c'
3304--- old/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2010-08-20 13:27:11 +0000
3305+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2011-04-20 10:00:39 +0000
3306@@ -15,5 +15,5 @@
3307 out_uint8x8x2_t = vld2_u8 (0);
3308 }
3309
3310-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3311+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3312 /* { dg-final { cleanup-saved-temps } } */
3313
3314=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c'
3315--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2010-08-20 13:27:11 +0000
3316+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2011-04-20 10:00:39 +0000
3317@@ -16,5 +16,5 @@
3318 out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1);
3319 }
3320
3321-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3322+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3323 /* { dg-final { cleanup-saved-temps } } */
3324
3325=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c'
3326--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2010-08-20 13:27:11 +0000
3327+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2011-04-20 10:00:39 +0000
3328@@ -16,5 +16,5 @@
3329 out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1);
3330 }
3331
3332-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3333+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3334 /* { dg-final { cleanup-saved-temps } } */
3335
3336=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c'
3337--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2010-08-20 13:27:11 +0000
3338+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2011-04-20 10:00:39 +0000
3339@@ -16,5 +16,5 @@
3340 out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1);
3341 }
3342
3343-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3344+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3345 /* { dg-final { cleanup-saved-temps } } */
3346
3347=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c'
3348--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2010-08-20 13:27:11 +0000
3349+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2011-04-20 10:00:39 +0000
3350@@ -16,5 +16,5 @@
3351 out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1);
3352 }
3353
3354-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3355+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3356 /* { dg-final { cleanup-saved-temps } } */
3357
3358=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c'
3359--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2010-08-20 13:27:11 +0000
3360+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2011-04-20 10:00:39 +0000
3361@@ -16,5 +16,5 @@
3362 out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1);
3363 }
3364
3365-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3366+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3367 /* { dg-final { cleanup-saved-temps } } */
3368
3369=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c'
3370--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2010-08-20 13:27:11 +0000
3371+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2011-04-20 10:00:39 +0000
3372@@ -16,5 +16,5 @@
3373 out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1);
3374 }
3375
3376-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3377+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3378 /* { dg-final { cleanup-saved-temps } } */
3379
3380=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c'
3381--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2010-08-20 13:27:11 +0000
3382+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2011-04-20 10:00:39 +0000
3383@@ -15,6 +15,6 @@
3384 out_float32x4x3_t = vld3q_f32 (0);
3385 }
3386
3387-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3388-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3389+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3390+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3391 /* { dg-final { cleanup-saved-temps } } */
3392
3393=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c'
3394--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2010-08-20 13:27:11 +0000
3395+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2011-04-20 10:00:39 +0000
3396@@ -15,6 +15,6 @@
3397 out_poly16x8x3_t = vld3q_p16 (0);
3398 }
3399
3400-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3401-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3402+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3403+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3404 /* { dg-final { cleanup-saved-temps } } */
3405
3406=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c'
3407--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2010-08-20 13:27:11 +0000
3408+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2011-04-20 10:00:39 +0000
3409@@ -15,6 +15,6 @@
3410 out_poly8x16x3_t = vld3q_p8 (0);
3411 }
3412
3413-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3414-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3415+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3416+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3417 /* { dg-final { cleanup-saved-temps } } */
3418
3419=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c'
3420--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2010-08-20 13:27:11 +0000
3421+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2011-04-20 10:00:39 +0000
3422@@ -15,6 +15,6 @@
3423 out_int16x8x3_t = vld3q_s16 (0);
3424 }
3425
3426-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3427-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3428+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3429+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3430 /* { dg-final { cleanup-saved-temps } } */
3431
3432=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c'
3433--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2010-08-20 13:27:11 +0000
3434+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2011-04-20 10:00:39 +0000
3435@@ -15,6 +15,6 @@
3436 out_int32x4x3_t = vld3q_s32 (0);
3437 }
3438
3439-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3440-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3441+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3442+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3443 /* { dg-final { cleanup-saved-temps } } */
3444
3445=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c'
3446--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2010-08-20 13:27:11 +0000
3447+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2011-04-20 10:00:39 +0000
3448@@ -15,6 +15,6 @@
3449 out_int8x16x3_t = vld3q_s8 (0);
3450 }
3451
3452-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3453-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3454+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3455+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3456 /* { dg-final { cleanup-saved-temps } } */
3457
3458=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c'
3459--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2010-08-20 13:27:11 +0000
3460+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2011-04-20 10:00:39 +0000
3461@@ -15,6 +15,6 @@
3462 out_uint16x8x3_t = vld3q_u16 (0);
3463 }
3464
3465-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3466-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3467+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3468+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3469 /* { dg-final { cleanup-saved-temps } } */
3470
3471=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c'
3472--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2010-08-20 13:27:11 +0000
3473+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2011-04-20 10:00:39 +0000
3474@@ -15,6 +15,6 @@
3475 out_uint32x4x3_t = vld3q_u32 (0);
3476 }
3477
3478-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3479-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3480+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3481+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3482 /* { dg-final { cleanup-saved-temps } } */
3483
3484=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c'
3485--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2010-08-20 13:27:11 +0000
3486+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2011-04-20 10:00:39 +0000
3487@@ -15,6 +15,6 @@
3488 out_uint8x16x3_t = vld3q_u8 (0);
3489 }
3490
3491-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3492-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3493+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3494+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3495 /* { dg-final { cleanup-saved-temps } } */
3496
3497=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c'
3498--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2010-08-20 13:27:11 +0000
3499+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2011-04-20 10:00:39 +0000
3500@@ -15,5 +15,5 @@
3501 out_float32x2x3_t = vld3_dup_f32 (0);
3502 }
3503
3504-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3505+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3506 /* { dg-final { cleanup-saved-temps } } */
3507
3508=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c'
3509--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2010-08-20 13:27:11 +0000
3510+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2011-04-20 10:00:39 +0000
3511@@ -15,5 +15,5 @@
3512 out_poly16x4x3_t = vld3_dup_p16 (0);
3513 }
3514
3515-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3516+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3517 /* { dg-final { cleanup-saved-temps } } */
3518
3519=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c'
3520--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2010-08-20 13:27:11 +0000
3521+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2011-04-20 10:00:39 +0000
3522@@ -15,5 +15,5 @@
3523 out_poly8x8x3_t = vld3_dup_p8 (0);
3524 }
3525
3526-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3527+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3528 /* { dg-final { cleanup-saved-temps } } */
3529
3530=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c'
3531--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2010-08-20 13:27:11 +0000
3532+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2011-04-20 10:00:39 +0000
3533@@ -15,5 +15,5 @@
3534 out_int16x4x3_t = vld3_dup_s16 (0);
3535 }
3536
3537-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3538+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3539 /* { dg-final { cleanup-saved-temps } } */
3540
3541=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c'
3542--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2010-08-20 13:27:11 +0000
3543+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2011-04-20 10:00:39 +0000
3544@@ -15,5 +15,5 @@
3545 out_int32x2x3_t = vld3_dup_s32 (0);
3546 }
3547
3548-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3549+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3550 /* { dg-final { cleanup-saved-temps } } */
3551
3552=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c'
3553--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2010-08-20 13:27:11 +0000
3554+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2011-04-20 10:00:39 +0000
3555@@ -15,5 +15,5 @@
3556 out_int64x1x3_t = vld3_dup_s64 (0);
3557 }
3558
3559-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3560+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3561 /* { dg-final { cleanup-saved-temps } } */
3562
3563=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c'
3564--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2010-08-20 13:27:11 +0000
3565+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2011-04-20 10:00:39 +0000
3566@@ -15,5 +15,5 @@
3567 out_int8x8x3_t = vld3_dup_s8 (0);
3568 }
3569
3570-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3571+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3572 /* { dg-final { cleanup-saved-temps } } */
3573
3574=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c'
3575--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2010-08-20 13:27:11 +0000
3576+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2011-04-20 10:00:39 +0000
3577@@ -15,5 +15,5 @@
3578 out_uint16x4x3_t = vld3_dup_u16 (0);
3579 }
3580
3581-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3582+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3583 /* { dg-final { cleanup-saved-temps } } */
3584
3585=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c'
3586--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2010-08-20 13:27:11 +0000
3587+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2011-04-20 10:00:39 +0000
3588@@ -15,5 +15,5 @@
3589 out_uint32x2x3_t = vld3_dup_u32 (0);
3590 }
3591
3592-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3593+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3594 /* { dg-final { cleanup-saved-temps } } */
3595
3596=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c'
3597--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2010-08-20 13:27:11 +0000
3598+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2011-04-20 10:00:39 +0000
3599@@ -15,5 +15,5 @@
3600 out_uint64x1x3_t = vld3_dup_u64 (0);
3601 }
3602
3603-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3604+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3605 /* { dg-final { cleanup-saved-temps } } */
3606
3607=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c'
3608--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2010-08-20 13:27:11 +0000
3609+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2011-04-20 10:00:39 +0000
3610@@ -15,5 +15,5 @@
3611 out_uint8x8x3_t = vld3_dup_u8 (0);
3612 }
3613
3614-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3615+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3616 /* { dg-final { cleanup-saved-temps } } */
3617
3618=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c'
3619--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2010-08-20 13:27:11 +0000
3620+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2011-04-20 10:00:39 +0000
3621@@ -16,5 +16,5 @@
3622 out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1);
3623 }
3624
3625-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3626+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3627 /* { dg-final { cleanup-saved-temps } } */
3628
3629=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c'
3630--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2010-08-20 13:27:11 +0000
3631+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2011-04-20 10:00:39 +0000
3632@@ -16,5 +16,5 @@
3633 out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1);
3634 }
3635
3636-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3637+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3638 /* { dg-final { cleanup-saved-temps } } */
3639
3640=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c'
3641--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2010-08-20 13:27:11 +0000
3642+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2011-04-20 10:00:39 +0000
3643@@ -16,5 +16,5 @@
3644 out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1);
3645 }
3646
3647-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3648+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3649 /* { dg-final { cleanup-saved-temps } } */
3650
3651=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c'
3652--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2010-08-20 13:27:11 +0000
3653+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2011-04-20 10:00:39 +0000
3654@@ -16,5 +16,5 @@
3655 out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
3656 }
3657
3658-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3659+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3660 /* { dg-final { cleanup-saved-temps } } */
3661
3662=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c'
3663--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2010-08-20 13:27:11 +0000
3664+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2011-04-20 10:00:39 +0000
3665@@ -16,5 +16,5 @@
3666 out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1);
3667 }
3668
3669-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3670+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3671 /* { dg-final { cleanup-saved-temps } } */
3672
3673=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c'
3674--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2010-08-20 13:27:11 +0000
3675+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2011-04-20 10:00:39 +0000
3676@@ -16,5 +16,5 @@
3677 out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1);
3678 }
3679
3680-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3681+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3682 /* { dg-final { cleanup-saved-temps } } */
3683
3684=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c'
3685--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2010-08-20 13:27:11 +0000
3686+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2011-04-20 10:00:39 +0000
3687@@ -16,5 +16,5 @@
3688 out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1);
3689 }
3690
3691-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3692+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3693 /* { dg-final { cleanup-saved-temps } } */
3694
3695=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c'
3696--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2010-08-20 13:27:11 +0000
3697+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2011-04-20 10:00:39 +0000
3698@@ -16,5 +16,5 @@
3699 out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1);
3700 }
3701
3702-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3703+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3704 /* { dg-final { cleanup-saved-temps } } */
3705
3706=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c'
3707--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2010-08-20 13:27:11 +0000
3708+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2011-04-20 10:00:39 +0000
3709@@ -16,5 +16,5 @@
3710 out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1);
3711 }
3712
3713-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3714+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3715 /* { dg-final { cleanup-saved-temps } } */
3716
3717=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3f32.c'
3718--- old/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2010-08-20 13:27:11 +0000
3719+++ new/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2011-04-20 10:00:39 +0000
3720@@ -15,5 +15,5 @@
3721 out_float32x2x3_t = vld3_f32 (0);
3722 }
3723
3724-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3725+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3726 /* { dg-final { cleanup-saved-temps } } */
3727
3728=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p16.c'
3729--- old/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2010-08-20 13:27:11 +0000
3730+++ new/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2011-04-20 10:00:39 +0000
3731@@ -15,5 +15,5 @@
3732 out_poly16x4x3_t = vld3_p16 (0);
3733 }
3734
3735-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3736+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3737 /* { dg-final { cleanup-saved-temps } } */
3738
3739=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p8.c'
3740--- old/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2010-08-20 13:27:11 +0000
3741+++ new/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2011-04-20 10:00:39 +0000
3742@@ -15,5 +15,5 @@
3743 out_poly8x8x3_t = vld3_p8 (0);
3744 }
3745
3746-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3747+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3748 /* { dg-final { cleanup-saved-temps } } */
3749
3750=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s16.c'
3751--- old/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2010-08-20 13:27:11 +0000
3752+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2011-04-20 10:00:39 +0000
3753@@ -15,5 +15,5 @@
3754 out_int16x4x3_t = vld3_s16 (0);
3755 }
3756
3757-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3758+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3759 /* { dg-final { cleanup-saved-temps } } */
3760
3761=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s32.c'
3762--- old/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2010-08-20 13:27:11 +0000
3763+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2011-04-20 10:00:39 +0000
3764@@ -15,5 +15,5 @@
3765 out_int32x2x3_t = vld3_s32 (0);
3766 }
3767
3768-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3769+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3770 /* { dg-final { cleanup-saved-temps } } */
3771
3772=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s64.c'
3773--- old/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2010-08-20 13:27:11 +0000
3774+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2011-04-20 10:00:39 +0000
3775@@ -15,5 +15,5 @@
3776 out_int64x1x3_t = vld3_s64 (0);
3777 }
3778
3779-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3780+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3781 /* { dg-final { cleanup-saved-temps } } */
3782
3783=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s8.c'
3784--- old/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2010-08-20 13:27:11 +0000
3785+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2011-04-20 10:00:39 +0000
3786@@ -15,5 +15,5 @@
3787 out_int8x8x3_t = vld3_s8 (0);
3788 }
3789
3790-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3791+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3792 /* { dg-final { cleanup-saved-temps } } */
3793
3794=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u16.c'
3795--- old/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2010-08-20 13:27:11 +0000
3796+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2011-04-20 10:00:39 +0000
3797@@ -15,5 +15,5 @@
3798 out_uint16x4x3_t = vld3_u16 (0);
3799 }
3800
3801-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3802+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3803 /* { dg-final { cleanup-saved-temps } } */
3804
3805=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u32.c'
3806--- old/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2010-08-20 13:27:11 +0000
3807+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2011-04-20 10:00:39 +0000
3808@@ -15,5 +15,5 @@
3809 out_uint32x2x3_t = vld3_u32 (0);
3810 }
3811
3812-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3813+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3814 /* { dg-final { cleanup-saved-temps } } */
3815
3816=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u64.c'
3817--- old/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2010-08-20 13:27:11 +0000
3818+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2011-04-20 10:00:39 +0000
3819@@ -15,5 +15,5 @@
3820 out_uint64x1x3_t = vld3_u64 (0);
3821 }
3822
3823-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3824+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3825 /* { dg-final { cleanup-saved-temps } } */
3826
3827=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u8.c'
3828--- old/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2010-08-20 13:27:11 +0000
3829+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2011-04-20 10:00:39 +0000
3830@@ -15,5 +15,5 @@
3831 out_uint8x8x3_t = vld3_u8 (0);
3832 }
3833
3834-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3835+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3836 /* { dg-final { cleanup-saved-temps } } */
3837
3838=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c'
3839--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2010-08-20 13:27:11 +0000
3840+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2011-04-20 10:00:39 +0000
3841@@ -16,5 +16,5 @@
3842 out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1);
3843 }
3844
3845-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3846+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3847 /* { dg-final { cleanup-saved-temps } } */
3848
3849=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c'
3850--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2010-08-20 13:27:11 +0000
3851+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2011-04-20 10:00:39 +0000
3852@@ -16,5 +16,5 @@
3853 out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1);
3854 }
3855
3856-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3857+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3858 /* { dg-final { cleanup-saved-temps } } */
3859
3860=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c'
3861--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2010-08-20 13:27:11 +0000
3862+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2011-04-20 10:00:39 +0000
3863@@ -16,5 +16,5 @@
3864 out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1);
3865 }
3866
3867-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3868+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3869 /* { dg-final { cleanup-saved-temps } } */
3870
3871=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c'
3872--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2010-08-20 13:27:11 +0000
3873+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2011-04-20 10:00:39 +0000
3874@@ -16,5 +16,5 @@
3875 out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1);
3876 }
3877
3878-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3879+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3880 /* { dg-final { cleanup-saved-temps } } */
3881
3882=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c'
3883--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2010-08-20 13:27:11 +0000
3884+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2011-04-20 10:00:39 +0000
3885@@ -16,5 +16,5 @@
3886 out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1);
3887 }
3888
3889-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3890+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3891 /* { dg-final { cleanup-saved-temps } } */
3892
3893=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c'
3894--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2010-08-20 13:27:11 +0000
3895+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2011-04-20 10:00:39 +0000
3896@@ -16,5 +16,5 @@
3897 out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1);
3898 }
3899
3900-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3901+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3902 /* { dg-final { cleanup-saved-temps } } */
3903
3904=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c'
3905--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2010-08-20 13:27:11 +0000
3906+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2011-04-20 10:00:39 +0000
3907@@ -15,6 +15,6 @@
3908 out_float32x4x4_t = vld4q_f32 (0);
3909 }
3910
3911-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3912-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3913+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3914+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3915 /* { dg-final { cleanup-saved-temps } } */
3916
3917=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c'
3918--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2010-08-20 13:27:11 +0000
3919+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2011-04-20 10:00:39 +0000
3920@@ -15,6 +15,6 @@
3921 out_poly16x8x4_t = vld4q_p16 (0);
3922 }
3923
3924-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3925-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3926+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3927+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3928 /* { dg-final { cleanup-saved-temps } } */
3929
3930=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c'
3931--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2010-08-20 13:27:11 +0000
3932+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2011-04-20 10:00:39 +0000
3933@@ -15,6 +15,6 @@
3934 out_poly8x16x4_t = vld4q_p8 (0);
3935 }
3936
3937-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3938-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3939+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3940+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3941 /* { dg-final { cleanup-saved-temps } } */
3942
3943=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c'
3944--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2010-08-20 13:27:11 +0000
3945+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2011-04-20 10:00:39 +0000
3946@@ -15,6 +15,6 @@
3947 out_int16x8x4_t = vld4q_s16 (0);
3948 }
3949
3950-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3951-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3952+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3953+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3954 /* { dg-final { cleanup-saved-temps } } */
3955
3956=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c'
3957--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2010-08-20 13:27:11 +0000
3958+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2011-04-20 10:00:39 +0000
3959@@ -15,6 +15,6 @@
3960 out_int32x4x4_t = vld4q_s32 (0);
3961 }
3962
3963-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3964-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3965+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3966+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3967 /* { dg-final { cleanup-saved-temps } } */
3968
3969=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c'
3970--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2010-08-20 13:27:11 +0000
3971+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2011-04-20 10:00:39 +0000
3972@@ -15,6 +15,6 @@
3973 out_int8x16x4_t = vld4q_s8 (0);
3974 }
3975
3976-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3977-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3978+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3979+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3980 /* { dg-final { cleanup-saved-temps } } */
3981
3982=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c'
3983--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2010-08-20 13:27:11 +0000
3984+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2011-04-20 10:00:39 +0000
3985@@ -15,6 +15,6 @@
3986 out_uint16x8x4_t = vld4q_u16 (0);
3987 }
3988
3989-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3990-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
3991+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3992+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
3993 /* { dg-final { cleanup-saved-temps } } */
3994
3995=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c'
3996--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2010-08-20 13:27:11 +0000
3997+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2011-04-20 10:00:39 +0000
3998@@ -15,6 +15,6 @@
3999 out_uint32x4x4_t = vld4q_u32 (0);
4000 }
4001
4002-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4003-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4004+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4005+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4006 /* { dg-final { cleanup-saved-temps } } */
4007
4008=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c'
4009--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2010-08-20 13:27:11 +0000
4010+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2011-04-20 10:00:39 +0000
4011@@ -15,6 +15,6 @@
4012 out_uint8x16x4_t = vld4q_u8 (0);
4013 }
4014
4015-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4016-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4017+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4018+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4019 /* { dg-final { cleanup-saved-temps } } */
4020
4021=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c'
4022--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2010-08-20 13:27:11 +0000
4023+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2011-04-20 10:00:39 +0000
4024@@ -15,5 +15,5 @@
4025 out_float32x2x4_t = vld4_dup_f32 (0);
4026 }
4027
4028-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4029+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4030 /* { dg-final { cleanup-saved-temps } } */
4031
4032=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c'
4033--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2010-08-20 13:27:11 +0000
4034+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2011-04-20 10:00:39 +0000
4035@@ -15,5 +15,5 @@
4036 out_poly16x4x4_t = vld4_dup_p16 (0);
4037 }
4038
4039-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4040+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4041 /* { dg-final { cleanup-saved-temps } } */
4042
4043=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c'
4044--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2010-08-20 13:27:11 +0000
4045+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2011-04-20 10:00:39 +0000
4046@@ -15,5 +15,5 @@
4047 out_poly8x8x4_t = vld4_dup_p8 (0);
4048 }
4049
4050-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4051+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4052 /* { dg-final { cleanup-saved-temps } } */
4053
4054=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c'
4055--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2010-08-20 13:27:11 +0000
4056+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2011-04-20 10:00:39 +0000
4057@@ -15,5 +15,5 @@
4058 out_int16x4x4_t = vld4_dup_s16 (0);
4059 }
4060
4061-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4062+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4063 /* { dg-final { cleanup-saved-temps } } */
4064
4065=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c'
4066--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2010-08-20 13:27:11 +0000
4067+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2011-04-20 10:00:39 +0000
4068@@ -15,5 +15,5 @@
4069 out_int32x2x4_t = vld4_dup_s32 (0);
4070 }
4071
4072-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4073+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4074 /* { dg-final { cleanup-saved-temps } } */
4075
4076=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c'
4077--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2010-08-20 13:27:11 +0000
4078+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2011-04-20 10:00:39 +0000
4079@@ -15,5 +15,5 @@
4080 out_int64x1x4_t = vld4_dup_s64 (0);
4081 }
4082
4083-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4084+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4085 /* { dg-final { cleanup-saved-temps } } */
4086
4087=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c'
4088--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2010-08-20 13:27:11 +0000
4089+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2011-04-20 10:00:39 +0000
4090@@ -15,5 +15,5 @@
4091 out_int8x8x4_t = vld4_dup_s8 (0);
4092 }
4093
4094-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4095+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4096 /* { dg-final { cleanup-saved-temps } } */
4097
4098=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c'
4099--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2010-08-20 13:27:11 +0000
4100+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2011-04-20 10:00:39 +0000
4101@@ -15,5 +15,5 @@
4102 out_uint16x4x4_t = vld4_dup_u16 (0);
4103 }
4104
4105-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4106+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4107 /* { dg-final { cleanup-saved-temps } } */
4108
4109=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c'
4110--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2010-08-20 13:27:11 +0000
4111+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2011-04-20 10:00:39 +0000
4112@@ -15,5 +15,5 @@
4113 out_uint32x2x4_t = vld4_dup_u32 (0);
4114 }
4115
4116-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4117+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4118 /* { dg-final { cleanup-saved-temps } } */
4119
4120=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c'
4121--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2010-08-20 13:27:11 +0000
4122+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2011-04-20 10:00:39 +0000
4123@@ -15,5 +15,5 @@
4124 out_uint64x1x4_t = vld4_dup_u64 (0);
4125 }
4126
4127-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4128+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4129 /* { dg-final { cleanup-saved-temps } } */
4130
4131=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c'
4132--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2010-08-20 13:27:11 +0000
4133+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2011-04-20 10:00:39 +0000
4134@@ -15,5 +15,5 @@
4135 out_uint8x8x4_t = vld4_dup_u8 (0);
4136 }
4137
4138-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4139+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4140 /* { dg-final { cleanup-saved-temps } } */
4141
4142=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c'
4143--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2010-08-20 13:27:11 +0000
4144+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2011-04-20 10:00:39 +0000
4145@@ -16,5 +16,5 @@
4146 out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1);
4147 }
4148
4149-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4150+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4151 /* { dg-final { cleanup-saved-temps } } */
4152
4153=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c'
4154--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2010-08-20 13:27:11 +0000
4155+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2011-04-20 10:00:39 +0000
4156@@ -16,5 +16,5 @@
4157 out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1);
4158 }
4159
4160-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4161+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4162 /* { dg-final { cleanup-saved-temps } } */
4163
4164=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c'
4165--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2010-08-20 13:27:11 +0000
4166+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2011-04-20 10:00:39 +0000
4167@@ -16,5 +16,5 @@
4168 out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1);
4169 }
4170
4171-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4172+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4173 /* { dg-final { cleanup-saved-temps } } */
4174
4175=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c'
4176--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2010-08-20 13:27:11 +0000
4177+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2011-04-20 10:00:39 +0000
4178@@ -16,5 +16,5 @@
4179 out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1);
4180 }
4181
4182-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4183+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4184 /* { dg-final { cleanup-saved-temps } } */
4185
4186=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c'
4187--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2010-08-20 13:27:11 +0000
4188+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2011-04-20 10:00:39 +0000
4189@@ -16,5 +16,5 @@
4190 out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1);
4191 }
4192
4193-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4194+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4195 /* { dg-final { cleanup-saved-temps } } */
4196
4197=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c'
4198--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2010-08-20 13:27:11 +0000
4199+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2011-04-20 10:00:39 +0000
4200@@ -16,5 +16,5 @@
4201 out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1);
4202 }
4203
4204-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4205+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4206 /* { dg-final { cleanup-saved-temps } } */
4207
4208=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c'
4209--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2010-08-20 13:27:11 +0000
4210+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2011-04-20 10:00:39 +0000
4211@@ -16,5 +16,5 @@
4212 out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1);
4213 }
4214
4215-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4216+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4217 /* { dg-final { cleanup-saved-temps } } */
4218
4219=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c'
4220--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2010-08-20 13:27:11 +0000
4221+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2011-04-20 10:00:39 +0000
4222@@ -16,5 +16,5 @@
4223 out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
4224 }
4225
4226-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4227+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4228 /* { dg-final { cleanup-saved-temps } } */
4229
4230=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c'
4231--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2010-08-20 13:27:11 +0000
4232+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2011-04-20 10:00:39 +0000
4233@@ -16,5 +16,5 @@
4234 out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1);
4235 }
4236
4237-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4238+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4239 /* { dg-final { cleanup-saved-temps } } */
4240
4241=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4f32.c'
4242--- old/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2010-08-20 13:27:11 +0000
4243+++ new/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2011-04-20 10:00:39 +0000
4244@@ -15,5 +15,5 @@
4245 out_float32x2x4_t = vld4_f32 (0);
4246 }
4247
4248-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4249+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4250 /* { dg-final { cleanup-saved-temps } } */
4251
4252=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p16.c'
4253--- old/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2010-08-20 13:27:11 +0000
4254+++ new/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2011-04-20 10:00:39 +0000
4255@@ -15,5 +15,5 @@
4256 out_poly16x4x4_t = vld4_p16 (0);
4257 }
4258
4259-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4260+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4261 /* { dg-final { cleanup-saved-temps } } */
4262
4263=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p8.c'
4264--- old/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2010-08-20 13:27:11 +0000
4265+++ new/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2011-04-20 10:00:39 +0000
4266@@ -15,5 +15,5 @@
4267 out_poly8x8x4_t = vld4_p8 (0);
4268 }
4269
4270-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4271+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4272 /* { dg-final { cleanup-saved-temps } } */
4273
4274=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s16.c'
4275--- old/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2010-08-20 13:27:11 +0000
4276+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2011-04-20 10:00:39 +0000
4277@@ -15,5 +15,5 @@
4278 out_int16x4x4_t = vld4_s16 (0);
4279 }
4280
4281-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4282+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4283 /* { dg-final { cleanup-saved-temps } } */
4284
4285=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s32.c'
4286--- old/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2010-08-20 13:27:11 +0000
4287+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2011-04-20 10:00:39 +0000
4288@@ -15,5 +15,5 @@
4289 out_int32x2x4_t = vld4_s32 (0);
4290 }
4291
4292-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4293+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4294 /* { dg-final { cleanup-saved-temps } } */
4295
4296=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s64.c'
4297--- old/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2010-08-20 13:27:11 +0000
4298+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2011-04-20 10:00:39 +0000
4299@@ -15,5 +15,5 @@
4300 out_int64x1x4_t = vld4_s64 (0);
4301 }
4302
4303-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4304+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4305 /* { dg-final { cleanup-saved-temps } } */
4306
4307=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s8.c'
4308--- old/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2010-08-20 13:27:11 +0000
4309+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2011-04-20 10:00:39 +0000
4310@@ -15,5 +15,5 @@
4311 out_int8x8x4_t = vld4_s8 (0);
4312 }
4313
4314-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4315+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4316 /* { dg-final { cleanup-saved-temps } } */
4317
4318=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u16.c'
4319--- old/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2010-08-20 13:27:11 +0000
4320+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2011-04-20 10:00:39 +0000
4321@@ -15,5 +15,5 @@
4322 out_uint16x4x4_t = vld4_u16 (0);
4323 }
4324
4325-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4326+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4327 /* { dg-final { cleanup-saved-temps } } */
4328
4329=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u32.c'
4330--- old/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2010-08-20 13:27:11 +0000
4331+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2011-04-20 10:00:39 +0000
4332@@ -15,5 +15,5 @@
4333 out_uint32x2x4_t = vld4_u32 (0);
4334 }
4335
4336-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4337+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4338 /* { dg-final { cleanup-saved-temps } } */
4339
4340=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u64.c'
4341--- old/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2010-08-20 13:27:11 +0000
4342+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2011-04-20 10:00:39 +0000
4343@@ -15,5 +15,5 @@
4344 out_uint64x1x4_t = vld4_u64 (0);
4345 }
4346
4347-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4348+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4349 /* { dg-final { cleanup-saved-temps } } */
4350
4351=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u8.c'
4352--- old/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2010-08-20 13:27:11 +0000
4353+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2011-04-20 10:00:39 +0000
4354@@ -15,5 +15,5 @@
4355 out_uint8x8x4_t = vld4_u8 (0);
4356 }
4357
4358-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4359+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4360 /* { dg-final { cleanup-saved-temps } } */
4361
4362=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c'
4363--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2010-08-20 13:27:11 +0000
4364+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2011-04-20 10:00:39 +0000
4365@@ -16,5 +16,5 @@
4366 vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
4367 }
4368
4369-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4370+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4371 /* { dg-final { cleanup-saved-temps } } */
4372
4373=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c'
4374--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2010-08-20 13:27:11 +0000
4375+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2011-04-20 10:00:39 +0000
4376@@ -16,5 +16,5 @@
4377 vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
4378 }
4379
4380-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4381+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4382 /* { dg-final { cleanup-saved-temps } } */
4383
4384=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c'
4385--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2010-08-20 13:27:11 +0000
4386+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2011-04-20 10:00:39 +0000
4387@@ -16,5 +16,5 @@
4388 vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
4389 }
4390
4391-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4392+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4393 /* { dg-final { cleanup-saved-temps } } */
4394
4395=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c'
4396--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2010-08-20 13:27:11 +0000
4397+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2011-04-20 10:00:39 +0000
4398@@ -16,5 +16,5 @@
4399 vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
4400 }
4401
4402-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4403+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4404 /* { dg-final { cleanup-saved-temps } } */
4405
4406=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c'
4407--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2010-08-20 13:27:11 +0000
4408+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2011-04-20 10:00:39 +0000
4409@@ -16,5 +16,5 @@
4410 vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
4411 }
4412
4413-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4414+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4415 /* { dg-final { cleanup-saved-temps } } */
4416
4417=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c'
4418--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2010-08-20 13:27:11 +0000
4419+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2011-04-20 10:00:39 +0000
4420@@ -16,5 +16,5 @@
4421 vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1);
4422 }
4423
4424-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4425+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4426 /* { dg-final { cleanup-saved-temps } } */
4427
4428=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c'
4429--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2010-08-20 13:27:11 +0000
4430+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2011-04-20 10:00:39 +0000
4431@@ -16,5 +16,5 @@
4432 vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
4433 }
4434
4435-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4436+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4437 /* { dg-final { cleanup-saved-temps } } */
4438
4439=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c'
4440--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2010-08-20 13:27:11 +0000
4441+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2011-04-20 10:00:39 +0000
4442@@ -16,5 +16,5 @@
4443 vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
4444 }
4445
4446-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4447+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4448 /* { dg-final { cleanup-saved-temps } } */
4449
4450=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c'
4451--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2010-08-20 13:27:11 +0000
4452+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2011-04-20 10:00:39 +0000
4453@@ -16,5 +16,5 @@
4454 vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
4455 }
4456
4457-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4458+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4459 /* { dg-final { cleanup-saved-temps } } */
4460
4461=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c'
4462--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2010-08-20 13:27:11 +0000
4463+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2011-04-20 10:00:39 +0000
4464@@ -16,5 +16,5 @@
4465 vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1);
4466 }
4467
4468-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4469+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4470 /* { dg-final { cleanup-saved-temps } } */
4471
4472=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c'
4473--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2010-08-20 13:27:11 +0000
4474+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2011-04-20 10:00:39 +0000
4475@@ -16,5 +16,5 @@
4476 vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
4477 }
4478
4479-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4480+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4481 /* { dg-final { cleanup-saved-temps } } */
4482
4483=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c'
4484--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2010-08-20 13:27:11 +0000
4485+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2011-04-20 10:00:39 +0000
4486@@ -16,5 +16,5 @@
4487 vst1q_f32 (arg0_float32_t, arg1_float32x4_t);
4488 }
4489
4490-/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4491+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4492 /* { dg-final { cleanup-saved-temps } } */
4493
4494=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c'
4495--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2010-08-20 13:27:11 +0000
4496+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2011-04-20 10:00:39 +0000
4497@@ -16,5 +16,5 @@
4498 vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t);
4499 }
4500
4501-/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4502+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4503 /* { dg-final { cleanup-saved-temps } } */
4504
4505=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c'
4506--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2010-08-20 13:27:11 +0000
4507+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2011-04-20 10:00:39 +0000
4508@@ -16,5 +16,5 @@
4509 vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t);
4510 }
4511
4512-/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4513+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4514 /* { dg-final { cleanup-saved-temps } } */
4515
4516=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c'
4517--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2010-08-20 13:27:11 +0000
4518+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2011-04-20 10:00:39 +0000
4519@@ -16,5 +16,5 @@
4520 vst1q_s16 (arg0_int16_t, arg1_int16x8_t);
4521 }
4522
4523-/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4524+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4525 /* { dg-final { cleanup-saved-temps } } */
4526
4527=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c'
4528--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2010-08-20 13:27:11 +0000
4529+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2011-04-20 10:00:39 +0000
4530@@ -16,5 +16,5 @@
4531 vst1q_s32 (arg0_int32_t, arg1_int32x4_t);
4532 }
4533
4534-/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4535+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4536 /* { dg-final { cleanup-saved-temps } } */
4537
4538=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c'
4539--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2010-08-20 13:27:11 +0000
4540+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2011-04-20 10:00:39 +0000
4541@@ -16,5 +16,5 @@
4542 vst1q_s64 (arg0_int64_t, arg1_int64x2_t);
4543 }
4544
4545-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4546+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4547 /* { dg-final { cleanup-saved-temps } } */
4548
4549=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c'
4550--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2010-08-20 13:27:11 +0000
4551+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2011-04-20 10:00:39 +0000
4552@@ -16,5 +16,5 @@
4553 vst1q_s8 (arg0_int8_t, arg1_int8x16_t);
4554 }
4555
4556-/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4557+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4558 /* { dg-final { cleanup-saved-temps } } */
4559
4560=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c'
4561--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2010-08-20 13:27:11 +0000
4562+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2011-04-20 10:00:39 +0000
4563@@ -16,5 +16,5 @@
4564 vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t);
4565 }
4566
4567-/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4568+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4569 /* { dg-final { cleanup-saved-temps } } */
4570
4571=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c'
4572--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2010-08-20 13:27:11 +0000
4573+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2011-04-20 10:00:39 +0000
4574@@ -16,5 +16,5 @@
4575 vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t);
4576 }
4577
4578-/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4579+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4580 /* { dg-final { cleanup-saved-temps } } */
4581
4582=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c'
4583--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2010-08-20 13:27:11 +0000
4584+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2011-04-20 10:00:39 +0000
4585@@ -16,5 +16,5 @@
4586 vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t);
4587 }
4588
4589-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4590+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4591 /* { dg-final { cleanup-saved-temps } } */
4592
4593=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c'
4594--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2010-08-20 13:27:11 +0000
4595+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2011-04-20 10:00:39 +0000
4596@@ -16,5 +16,5 @@
4597 vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t);
4598 }
4599
4600-/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4601+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4602 /* { dg-final { cleanup-saved-temps } } */
4603
4604=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c'
4605--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2010-08-20 13:27:11 +0000
4606+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2011-04-20 10:00:39 +0000
4607@@ -16,5 +16,5 @@
4608 vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
4609 }
4610
4611-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4612+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4613 /* { dg-final { cleanup-saved-temps } } */
4614
4615=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c'
4616--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2010-08-20 13:27:11 +0000
4617+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2011-04-20 10:00:39 +0000
4618@@ -16,5 +16,5 @@
4619 vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
4620 }
4621
4622-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4623+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4624 /* { dg-final { cleanup-saved-temps } } */
4625
4626=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c'
4627--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2010-08-20 13:27:11 +0000
4628+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2011-04-20 10:00:39 +0000
4629@@ -16,5 +16,5 @@
4630 vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
4631 }
4632
4633-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4634+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4635 /* { dg-final { cleanup-saved-temps } } */
4636
4637=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c'
4638--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2010-08-20 13:27:11 +0000
4639+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2011-04-20 10:00:39 +0000
4640@@ -16,5 +16,5 @@
4641 vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
4642 }
4643
4644-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4645+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4646 /* { dg-final { cleanup-saved-temps } } */
4647
4648=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c'
4649--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2010-08-20 13:27:11 +0000
4650+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2011-04-20 10:00:39 +0000
4651@@ -16,5 +16,5 @@
4652 vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
4653 }
4654
4655-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4656+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4657 /* { dg-final { cleanup-saved-temps } } */
4658
4659=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c'
4660--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2010-08-20 13:27:11 +0000
4661+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2011-04-20 10:00:39 +0000
4662@@ -16,5 +16,5 @@
4663 vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
4664 }
4665
4666-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4667+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4668 /* { dg-final { cleanup-saved-temps } } */
4669
4670=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c'
4671--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2010-08-20 13:27:11 +0000
4672+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2011-04-20 10:00:39 +0000
4673@@ -16,5 +16,5 @@
4674 vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
4675 }
4676
4677-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4678+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4679 /* { dg-final { cleanup-saved-temps } } */
4680
4681=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c'
4682--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2010-08-20 13:27:11 +0000
4683+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2011-04-20 10:00:39 +0000
4684@@ -16,5 +16,5 @@
4685 vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
4686 }
4687
4688-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4689+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4690 /* { dg-final { cleanup-saved-temps } } */
4691
4692=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c'
4693--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2010-08-20 13:27:11 +0000
4694+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2011-04-20 10:00:39 +0000
4695@@ -16,5 +16,5 @@
4696 vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
4697 }
4698
4699-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4700+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4701 /* { dg-final { cleanup-saved-temps } } */
4702
4703=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c'
4704--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2010-08-20 13:27:11 +0000
4705+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2011-04-20 10:00:39 +0000
4706@@ -16,5 +16,5 @@
4707 vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
4708 }
4709
4710-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4711+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4712 /* { dg-final { cleanup-saved-temps } } */
4713
4714=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c'
4715--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2010-08-20 13:27:11 +0000
4716+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2011-04-20 10:00:39 +0000
4717@@ -16,5 +16,5 @@
4718 vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
4719 }
4720
4721-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4722+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4723 /* { dg-final { cleanup-saved-temps } } */
4724
4725=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1f32.c'
4726--- old/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2010-08-20 13:27:11 +0000
4727+++ new/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2011-04-20 10:00:39 +0000
4728@@ -16,5 +16,5 @@
4729 vst1_f32 (arg0_float32_t, arg1_float32x2_t);
4730 }
4731
4732-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4733+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4734 /* { dg-final { cleanup-saved-temps } } */
4735
4736=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p16.c'
4737--- old/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2010-08-20 13:27:11 +0000
4738+++ new/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2011-04-20 10:00:39 +0000
4739@@ -16,5 +16,5 @@
4740 vst1_p16 (arg0_poly16_t, arg1_poly16x4_t);
4741 }
4742
4743-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4744+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4745 /* { dg-final { cleanup-saved-temps } } */
4746
4747=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p8.c'
4748--- old/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2010-08-20 13:27:11 +0000
4749+++ new/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2011-04-20 10:00:39 +0000
4750@@ -16,5 +16,5 @@
4751 vst1_p8 (arg0_poly8_t, arg1_poly8x8_t);
4752 }
4753
4754-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4755+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4756 /* { dg-final { cleanup-saved-temps } } */
4757
4758=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s16.c'
4759--- old/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2010-08-20 13:27:11 +0000
4760+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2011-04-20 10:00:39 +0000
4761@@ -16,5 +16,5 @@
4762 vst1_s16 (arg0_int16_t, arg1_int16x4_t);
4763 }
4764
4765-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4766+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4767 /* { dg-final { cleanup-saved-temps } } */
4768
4769=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s32.c'
4770--- old/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2010-08-20 13:27:11 +0000
4771+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2011-04-20 10:00:39 +0000
4772@@ -16,5 +16,5 @@
4773 vst1_s32 (arg0_int32_t, arg1_int32x2_t);
4774 }
4775
4776-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4777+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4778 /* { dg-final { cleanup-saved-temps } } */
4779
4780=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s64.c'
4781--- old/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2010-08-20 13:27:11 +0000
4782+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2011-04-20 10:00:39 +0000
4783@@ -16,5 +16,5 @@
4784 vst1_s64 (arg0_int64_t, arg1_int64x1_t);
4785 }
4786
4787-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4788+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4789 /* { dg-final { cleanup-saved-temps } } */
4790
4791=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s8.c'
4792--- old/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2010-08-20 13:27:11 +0000
4793+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2011-04-20 10:00:39 +0000
4794@@ -16,5 +16,5 @@
4795 vst1_s8 (arg0_int8_t, arg1_int8x8_t);
4796 }
4797
4798-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4799+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4800 /* { dg-final { cleanup-saved-temps } } */
4801
4802=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u16.c'
4803--- old/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2010-08-20 13:27:11 +0000
4804+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2011-04-20 10:00:39 +0000
4805@@ -16,5 +16,5 @@
4806 vst1_u16 (arg0_uint16_t, arg1_uint16x4_t);
4807 }
4808
4809-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4810+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4811 /* { dg-final { cleanup-saved-temps } } */
4812
4813=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u32.c'
4814--- old/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2010-08-20 13:27:11 +0000
4815+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2011-04-20 10:00:39 +0000
4816@@ -16,5 +16,5 @@
4817 vst1_u32 (arg0_uint32_t, arg1_uint32x2_t);
4818 }
4819
4820-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4821+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4822 /* { dg-final { cleanup-saved-temps } } */
4823
4824=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u64.c'
4825--- old/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2010-08-20 13:27:11 +0000
4826+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2011-04-20 10:00:39 +0000
4827@@ -16,5 +16,5 @@
4828 vst1_u64 (arg0_uint64_t, arg1_uint64x1_t);
4829 }
4830
4831-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4832+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4833 /* { dg-final { cleanup-saved-temps } } */
4834
4835=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u8.c'
4836--- old/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2010-08-20 13:27:11 +0000
4837+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2011-04-20 10:00:39 +0000
4838@@ -16,5 +16,5 @@
4839 vst1_u8 (arg0_uint8_t, arg1_uint8x8_t);
4840 }
4841
4842-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4843+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4844 /* { dg-final { cleanup-saved-temps } } */
4845
4846=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c'
4847--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2010-08-20 13:27:11 +0000
4848+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2011-04-20 10:00:39 +0000
4849@@ -16,5 +16,5 @@
4850 vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1);
4851 }
4852
4853-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4854+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4855 /* { dg-final { cleanup-saved-temps } } */
4856
4857=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c'
4858--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2010-08-20 13:27:11 +0000
4859+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2011-04-20 10:00:39 +0000
4860@@ -16,5 +16,5 @@
4861 vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1);
4862 }
4863
4864-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4865+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4866 /* { dg-final { cleanup-saved-temps } } */
4867
4868=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c'
4869--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2010-08-20 13:27:11 +0000
4870+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2011-04-20 10:00:39 +0000
4871@@ -16,5 +16,5 @@
4872 vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1);
4873 }
4874
4875-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4876+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4877 /* { dg-final { cleanup-saved-temps } } */
4878
4879=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c'
4880--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2010-08-20 13:27:11 +0000
4881+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2011-04-20 10:00:39 +0000
4882@@ -16,5 +16,5 @@
4883 vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1);
4884 }
4885
4886-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4887+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4888 /* { dg-final { cleanup-saved-temps } } */
4889
4890=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c'
4891--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2010-08-20 13:27:11 +0000
4892+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2011-04-20 10:00:39 +0000
4893@@ -16,5 +16,5 @@
4894 vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1);
4895 }
4896
4897-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4898+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4899 /* { dg-final { cleanup-saved-temps } } */
4900
4901=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c'
4902--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2010-08-20 13:27:11 +0000
4903+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2011-04-20 10:00:39 +0000
4904@@ -16,5 +16,5 @@
4905 vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1);
4906 }
4907
4908-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4909+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4910 /* { dg-final { cleanup-saved-temps } } */
4911
4912=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c'
4913--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2010-08-20 13:27:11 +0000
4914+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2011-04-20 10:00:39 +0000
4915@@ -16,6 +16,6 @@
4916 vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t);
4917 }
4918
4919-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4920-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4921+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4922+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4923 /* { dg-final { cleanup-saved-temps } } */
4924
4925=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c'
4926--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2010-08-20 13:27:11 +0000
4927+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2011-04-20 10:00:39 +0000
4928@@ -16,6 +16,6 @@
4929 vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t);
4930 }
4931
4932-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4933-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4934+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4935+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4936 /* { dg-final { cleanup-saved-temps } } */
4937
4938=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c'
4939--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2010-08-20 13:27:11 +0000
4940+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2011-04-20 10:00:39 +0000
4941@@ -16,6 +16,6 @@
4942 vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t);
4943 }
4944
4945-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4946-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4947+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4948+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4949 /* { dg-final { cleanup-saved-temps } } */
4950
4951=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c'
4952--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2010-08-20 13:27:11 +0000
4953+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2011-04-20 10:00:39 +0000
4954@@ -16,6 +16,6 @@
4955 vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t);
4956 }
4957
4958-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4959-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4960+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4961+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4962 /* { dg-final { cleanup-saved-temps } } */
4963
4964=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c'
4965--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2010-08-20 13:27:11 +0000
4966+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2011-04-20 10:00:39 +0000
4967@@ -16,6 +16,6 @@
4968 vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t);
4969 }
4970
4971-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4972-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4973+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4974+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4975 /* { dg-final { cleanup-saved-temps } } */
4976
4977=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c'
4978--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2010-08-20 13:27:11 +0000
4979+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2011-04-20 10:00:39 +0000
4980@@ -16,6 +16,6 @@
4981 vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t);
4982 }
4983
4984-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4985-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4986+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4987+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
4988 /* { dg-final { cleanup-saved-temps } } */
4989
4990=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c'
4991--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2010-08-20 13:27:11 +0000
4992+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2011-04-20 10:00:39 +0000
4993@@ -16,6 +16,6 @@
4994 vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t);
4995 }
4996
4997-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4998-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
4999+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5000+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5001 /* { dg-final { cleanup-saved-temps } } */
5002
5003=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c'
5004--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2010-08-20 13:27:11 +0000
5005+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2011-04-20 10:00:39 +0000
5006@@ -16,6 +16,6 @@
5007 vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t);
5008 }
5009
5010-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5011-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5012+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5013+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5014 /* { dg-final { cleanup-saved-temps } } */
5015
5016=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c'
5017--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2010-08-20 13:27:11 +0000
5018+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2011-04-20 10:00:39 +0000
5019@@ -16,6 +16,6 @@
5020 vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t);
5021 }
5022
5023-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5024-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5025+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5026+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5027 /* { dg-final { cleanup-saved-temps } } */
5028
5029=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c'
5030--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2010-08-20 13:27:11 +0000
5031+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2011-04-20 10:00:39 +0000
5032@@ -16,5 +16,5 @@
5033 vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1);
5034 }
5035
5036-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5037+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5038 /* { dg-final { cleanup-saved-temps } } */
5039
5040=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c'
5041--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2010-08-20 13:27:11 +0000
5042+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2011-04-20 10:00:39 +0000
5043@@ -16,5 +16,5 @@
5044 vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1);
5045 }
5046
5047-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5048+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5049 /* { dg-final { cleanup-saved-temps } } */
5050
5051=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c'
5052--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2010-08-20 13:27:11 +0000
5053+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2011-04-20 10:00:39 +0000
5054@@ -16,5 +16,5 @@
5055 vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1);
5056 }
5057
5058-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5059+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5060 /* { dg-final { cleanup-saved-temps } } */
5061
5062=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c'
5063--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2010-08-20 13:27:11 +0000
5064+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2011-04-20 10:00:39 +0000
5065@@ -16,5 +16,5 @@
5066 vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1);
5067 }
5068
5069-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5070+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5071 /* { dg-final { cleanup-saved-temps } } */
5072
5073=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c'
5074--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2010-08-20 13:27:11 +0000
5075+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2011-04-20 10:00:39 +0000
5076@@ -16,5 +16,5 @@
5077 vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1);
5078 }
5079
5080-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5081+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5082 /* { dg-final { cleanup-saved-temps } } */
5083
5084=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c'
5085--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2010-08-20 13:27:11 +0000
5086+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2011-04-20 10:00:39 +0000
5087@@ -16,5 +16,5 @@
5088 vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1);
5089 }
5090
5091-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5092+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5093 /* { dg-final { cleanup-saved-temps } } */
5094
5095=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c'
5096--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2010-08-20 13:27:11 +0000
5097+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2011-04-20 10:00:39 +0000
5098@@ -16,5 +16,5 @@
5099 vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1);
5100 }
5101
5102-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5103+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5104 /* { dg-final { cleanup-saved-temps } } */
5105
5106=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c'
5107--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2010-08-20 13:27:11 +0000
5108+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2011-04-20 10:00:39 +0000
5109@@ -16,5 +16,5 @@
5110 vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1);
5111 }
5112
5113-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5114+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5115 /* { dg-final { cleanup-saved-temps } } */
5116
5117=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c'
5118--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2010-08-20 13:27:11 +0000
5119+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2011-04-20 10:00:39 +0000
5120@@ -16,5 +16,5 @@
5121 vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1);
5122 }
5123
5124-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5125+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5126 /* { dg-final { cleanup-saved-temps } } */
5127
5128=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2f32.c'
5129--- old/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2010-08-20 13:27:11 +0000
5130+++ new/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2011-04-20 10:00:39 +0000
5131@@ -16,5 +16,5 @@
5132 vst2_f32 (arg0_float32_t, arg1_float32x2x2_t);
5133 }
5134
5135-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5136+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5137 /* { dg-final { cleanup-saved-temps } } */
5138
5139=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p16.c'
5140--- old/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2010-08-20 13:27:11 +0000
5141+++ new/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2011-04-20 10:00:39 +0000
5142@@ -16,5 +16,5 @@
5143 vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t);
5144 }
5145
5146-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5147+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5148 /* { dg-final { cleanup-saved-temps } } */
5149
5150=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p8.c'
5151--- old/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2010-08-20 13:27:11 +0000
5152+++ new/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2011-04-20 10:00:39 +0000
5153@@ -16,5 +16,5 @@
5154 vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t);
5155 }
5156
5157-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5158+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5159 /* { dg-final { cleanup-saved-temps } } */
5160
5161=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s16.c'
5162--- old/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2010-08-20 13:27:11 +0000
5163+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2011-04-20 10:00:39 +0000
5164@@ -16,5 +16,5 @@
5165 vst2_s16 (arg0_int16_t, arg1_int16x4x2_t);
5166 }
5167
5168-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5169+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5170 /* { dg-final { cleanup-saved-temps } } */
5171
5172=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s32.c'
5173--- old/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2010-08-20 13:27:11 +0000
5174+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2011-04-20 10:00:39 +0000
5175@@ -16,5 +16,5 @@
5176 vst2_s32 (arg0_int32_t, arg1_int32x2x2_t);
5177 }
5178
5179-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5180+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5181 /* { dg-final { cleanup-saved-temps } } */
5182
5183=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s64.c'
5184--- old/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2010-08-20 13:27:11 +0000
5185+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2011-04-20 10:00:39 +0000
5186@@ -16,5 +16,5 @@
5187 vst2_s64 (arg0_int64_t, arg1_int64x1x2_t);
5188 }
5189
5190-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5191+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5192 /* { dg-final { cleanup-saved-temps } } */
5193
5194=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s8.c'
5195--- old/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2010-08-20 13:27:11 +0000
5196+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2011-04-20 10:00:39 +0000
5197@@ -16,5 +16,5 @@
5198 vst2_s8 (arg0_int8_t, arg1_int8x8x2_t);
5199 }
5200
5201-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5202+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5203 /* { dg-final { cleanup-saved-temps } } */
5204
5205=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u16.c'
5206--- old/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2010-08-20 13:27:11 +0000
5207+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2011-04-20 10:00:39 +0000
5208@@ -16,5 +16,5 @@
5209 vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t);
5210 }
5211
5212-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5213+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5214 /* { dg-final { cleanup-saved-temps } } */
5215
5216=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u32.c'
5217--- old/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2010-08-20 13:27:11 +0000
5218+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2011-04-20 10:00:39 +0000
5219@@ -16,5 +16,5 @@
5220 vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t);
5221 }
5222
5223-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5224+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5225 /* { dg-final { cleanup-saved-temps } } */
5226
5227=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u64.c'
5228--- old/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2010-08-20 13:27:11 +0000
5229+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2011-04-20 10:00:39 +0000
5230@@ -16,5 +16,5 @@
5231 vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t);
5232 }
5233
5234-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5235+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5236 /* { dg-final { cleanup-saved-temps } } */
5237
5238=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u8.c'
5239--- old/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2010-08-20 13:27:11 +0000
5240+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2011-04-20 10:00:39 +0000
5241@@ -16,5 +16,5 @@
5242 vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t);
5243 }
5244
5245-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5246+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5247 /* { dg-final { cleanup-saved-temps } } */
5248
5249=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c'
5250--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2010-08-20 13:27:11 +0000
5251+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2011-04-20 10:00:39 +0000
5252@@ -16,5 +16,5 @@
5253 vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1);
5254 }
5255
5256-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5257+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5258 /* { dg-final { cleanup-saved-temps } } */
5259
5260=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c'
5261--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2010-08-20 13:27:11 +0000
5262+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2011-04-20 10:00:39 +0000
5263@@ -16,5 +16,5 @@
5264 vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1);
5265 }
5266
5267-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5268+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5269 /* { dg-final { cleanup-saved-temps } } */
5270
5271=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c'
5272--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2010-08-20 13:27:11 +0000
5273+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2011-04-20 10:00:39 +0000
5274@@ -16,5 +16,5 @@
5275 vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1);
5276 }
5277
5278-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5279+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5280 /* { dg-final { cleanup-saved-temps } } */
5281
5282=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c'
5283--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2010-08-20 13:27:11 +0000
5284+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2011-04-20 10:00:39 +0000
5285@@ -16,5 +16,5 @@
5286 vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1);
5287 }
5288
5289-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5290+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5291 /* { dg-final { cleanup-saved-temps } } */
5292
5293=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c'
5294--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2010-08-20 13:27:11 +0000
5295+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2011-04-20 10:00:39 +0000
5296@@ -16,5 +16,5 @@
5297 vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1);
5298 }
5299
5300-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5301+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5302 /* { dg-final { cleanup-saved-temps } } */
5303
5304=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c'
5305--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2010-08-20 13:27:11 +0000
5306+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2011-04-20 10:00:39 +0000
5307@@ -16,5 +16,5 @@
5308 vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1);
5309 }
5310
5311-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5312+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5313 /* { dg-final { cleanup-saved-temps } } */
5314
5315=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c'
5316--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2010-08-20 13:27:11 +0000
5317+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2011-04-20 10:00:39 +0000
5318@@ -16,6 +16,6 @@
5319 vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
5320 }
5321
5322-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5323-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5324+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5325+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5326 /* { dg-final { cleanup-saved-temps } } */
5327
5328=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c'
5329--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2010-08-20 13:27:11 +0000
5330+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2011-04-20 10:00:39 +0000
5331@@ -16,6 +16,6 @@
5332 vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t);
5333 }
5334
5335-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5336-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5337+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5338+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5339 /* { dg-final { cleanup-saved-temps } } */
5340
5341=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c'
5342--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2010-08-20 13:27:11 +0000
5343+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2011-04-20 10:00:39 +0000
5344@@ -16,6 +16,6 @@
5345 vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t);
5346 }
5347
5348-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5349-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5350+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5351+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5352 /* { dg-final { cleanup-saved-temps } } */
5353
5354=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c'
5355--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2010-08-20 13:27:11 +0000
5356+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2011-04-20 10:00:39 +0000
5357@@ -16,6 +16,6 @@
5358 vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t);
5359 }
5360
5361-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5362-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5363+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5364+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5365 /* { dg-final { cleanup-saved-temps } } */
5366
5367=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c'
5368--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2010-08-20 13:27:11 +0000
5369+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2011-04-20 10:00:39 +0000
5370@@ -16,6 +16,6 @@
5371 vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t);
5372 }
5373
5374-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5375-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5376+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5377+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5378 /* { dg-final { cleanup-saved-temps } } */
5379
5380=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c'
5381--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2010-08-20 13:27:11 +0000
5382+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2011-04-20 10:00:39 +0000
5383@@ -16,6 +16,6 @@
5384 vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t);
5385 }
5386
5387-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5388-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5389+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5390+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5391 /* { dg-final { cleanup-saved-temps } } */
5392
5393=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c'
5394--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2010-08-20 13:27:11 +0000
5395+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2011-04-20 10:00:39 +0000
5396@@ -16,6 +16,6 @@
5397 vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t);
5398 }
5399
5400-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5401-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5402+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5403+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5404 /* { dg-final { cleanup-saved-temps } } */
5405
5406=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c'
5407--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2010-08-20 13:27:11 +0000
5408+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2011-04-20 10:00:39 +0000
5409@@ -16,6 +16,6 @@
5410 vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t);
5411 }
5412
5413-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5414-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5415+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5416+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5417 /* { dg-final { cleanup-saved-temps } } */
5418
5419=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c'
5420--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2010-08-20 13:27:11 +0000
5421+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2011-04-20 10:00:39 +0000
5422@@ -16,6 +16,6 @@
5423 vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t);
5424 }
5425
5426-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5427-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5428+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5429+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5430 /* { dg-final { cleanup-saved-temps } } */
5431
5432=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c'
5433--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2010-08-20 13:27:11 +0000
5434+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2011-04-20 10:00:39 +0000
5435@@ -16,5 +16,5 @@
5436 vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1);
5437 }
5438
5439-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5440+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5441 /* { dg-final { cleanup-saved-temps } } */
5442
5443=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c'
5444--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2010-08-20 13:27:11 +0000
5445+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2011-04-20 10:00:39 +0000
5446@@ -16,5 +16,5 @@
5447 vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1);
5448 }
5449
5450-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5451+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5452 /* { dg-final { cleanup-saved-temps } } */
5453
5454=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c'
5455--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2010-08-20 13:27:11 +0000
5456+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2011-04-20 10:00:39 +0000
5457@@ -16,5 +16,5 @@
5458 vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1);
5459 }
5460
5461-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5462+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5463 /* { dg-final { cleanup-saved-temps } } */
5464
5465=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c'
5466--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2010-08-20 13:27:11 +0000
5467+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2011-04-20 10:00:39 +0000
5468@@ -16,5 +16,5 @@
5469 vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1);
5470 }
5471
5472-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5473+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5474 /* { dg-final { cleanup-saved-temps } } */
5475
5476=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c'
5477--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2010-08-20 13:27:11 +0000
5478+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2011-04-20 10:00:39 +0000
5479@@ -16,5 +16,5 @@
5480 vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1);
5481 }
5482
5483-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5484+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5485 /* { dg-final { cleanup-saved-temps } } */
5486
5487=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c'
5488--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2010-08-20 13:27:11 +0000
5489+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2011-04-20 10:00:39 +0000
5490@@ -16,5 +16,5 @@
5491 vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1);
5492 }
5493
5494-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5495+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5496 /* { dg-final { cleanup-saved-temps } } */
5497
5498=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c'
5499--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2010-08-20 13:27:11 +0000
5500+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2011-04-20 10:00:39 +0000
5501@@ -16,5 +16,5 @@
5502 vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1);
5503 }
5504
5505-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5506+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5507 /* { dg-final { cleanup-saved-temps } } */
5508
5509=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c'
5510--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2010-08-20 13:27:11 +0000
5511+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2011-04-20 10:00:39 +0000
5512@@ -16,5 +16,5 @@
5513 vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1);
5514 }
5515
5516-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5517+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5518 /* { dg-final { cleanup-saved-temps } } */
5519
5520=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c'
5521--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2010-08-20 13:27:11 +0000
5522+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2011-04-20 10:00:39 +0000
5523@@ -16,5 +16,5 @@
5524 vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1);
5525 }
5526
5527-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5528+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5529 /* { dg-final { cleanup-saved-temps } } */
5530
5531=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3f32.c'
5532--- old/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2010-08-20 13:27:11 +0000
5533+++ new/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2011-04-20 10:00:39 +0000
5534@@ -16,5 +16,5 @@
5535 vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
5536 }
5537
5538-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5539+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5540 /* { dg-final { cleanup-saved-temps } } */
5541
5542=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p16.c'
5543--- old/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2010-08-20 13:27:11 +0000
5544+++ new/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2011-04-20 10:00:39 +0000
5545@@ -16,5 +16,5 @@
5546 vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
5547 }
5548
5549-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5550+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5551 /* { dg-final { cleanup-saved-temps } } */
5552
5553=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p8.c'
5554--- old/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2010-08-20 13:27:11 +0000
5555+++ new/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2011-04-20 10:00:39 +0000
5556@@ -16,5 +16,5 @@
5557 vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
5558 }
5559
5560-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5561+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5562 /* { dg-final { cleanup-saved-temps } } */
5563
5564=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s16.c'
5565--- old/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2010-08-20 13:27:11 +0000
5566+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2011-04-20 10:00:39 +0000
5567@@ -16,5 +16,5 @@
5568 vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
5569 }
5570
5571-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5572+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5573 /* { dg-final { cleanup-saved-temps } } */
5574
5575=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s32.c'
5576--- old/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2010-08-20 13:27:11 +0000
5577+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2011-04-20 10:00:39 +0000
5578@@ -16,5 +16,5 @@
5579 vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
5580 }
5581
5582-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5583+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5584 /* { dg-final { cleanup-saved-temps } } */
5585
5586=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s64.c'
5587--- old/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2010-08-20 13:27:11 +0000
5588+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2011-04-20 10:00:39 +0000
5589@@ -16,5 +16,5 @@
5590 vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
5591 }
5592
5593-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5594+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5595 /* { dg-final { cleanup-saved-temps } } */
5596
5597=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s8.c'
5598--- old/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2010-08-20 13:27:11 +0000
5599+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2011-04-20 10:00:39 +0000
5600@@ -16,5 +16,5 @@
5601 vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
5602 }
5603
5604-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5605+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5606 /* { dg-final { cleanup-saved-temps } } */
5607
5608=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u16.c'
5609--- old/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2010-08-20 13:27:11 +0000
5610+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2011-04-20 10:00:39 +0000
5611@@ -16,5 +16,5 @@
5612 vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
5613 }
5614
5615-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5616+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5617 /* { dg-final { cleanup-saved-temps } } */
5618
5619=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u32.c'
5620--- old/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2010-08-20 13:27:11 +0000
5621+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2011-04-20 10:00:39 +0000
5622@@ -16,5 +16,5 @@
5623 vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
5624 }
5625
5626-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5627+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5628 /* { dg-final { cleanup-saved-temps } } */
5629
5630=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u64.c'
5631--- old/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2010-08-20 13:27:11 +0000
5632+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2011-04-20 10:00:39 +0000
5633@@ -16,5 +16,5 @@
5634 vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
5635 }
5636
5637-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5638+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5639 /* { dg-final { cleanup-saved-temps } } */
5640
5641=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u8.c'
5642--- old/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2010-08-20 13:27:11 +0000
5643+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2011-04-20 10:00:39 +0000
5644@@ -16,5 +16,5 @@
5645 vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
5646 }
5647
5648-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5649+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5650 /* { dg-final { cleanup-saved-temps } } */
5651
5652=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c'
5653--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2010-08-20 13:27:11 +0000
5654+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2011-04-20 10:00:39 +0000
5655@@ -16,5 +16,5 @@
5656 vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1);
5657 }
5658
5659-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5660+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5661 /* { dg-final { cleanup-saved-temps } } */
5662
5663=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c'
5664--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2010-08-20 13:27:11 +0000
5665+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2011-04-20 10:00:39 +0000
5666@@ -16,5 +16,5 @@
5667 vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1);
5668 }
5669
5670-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5671+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5672 /* { dg-final { cleanup-saved-temps } } */
5673
5674=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c'
5675--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2010-08-20 13:27:11 +0000
5676+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2011-04-20 10:00:39 +0000
5677@@ -16,5 +16,5 @@
5678 vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1);
5679 }
5680
5681-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5682+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5683 /* { dg-final { cleanup-saved-temps } } */
5684
5685=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c'
5686--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2010-08-20 13:27:11 +0000
5687+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2011-04-20 10:00:39 +0000
5688@@ -16,5 +16,5 @@
5689 vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1);
5690 }
5691
5692-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5693+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5694 /* { dg-final { cleanup-saved-temps } } */
5695
5696=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c'
5697--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2010-08-20 13:27:11 +0000
5698+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2011-04-20 10:00:39 +0000
5699@@ -16,5 +16,5 @@
5700 vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
5701 }
5702
5703-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5704+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5705 /* { dg-final { cleanup-saved-temps } } */
5706
5707=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c'
5708--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2010-08-20 13:27:11 +0000
5709+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2011-04-20 10:00:39 +0000
5710@@ -16,5 +16,5 @@
5711 vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1);
5712 }
5713
5714-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5715+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5716 /* { dg-final { cleanup-saved-temps } } */
5717
5718=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c'
5719--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2010-08-20 13:27:11 +0000
5720+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2011-04-20 10:00:39 +0000
5721@@ -16,6 +16,6 @@
5722 vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t);
5723 }
5724
5725-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5726-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5727+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5728+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5729 /* { dg-final { cleanup-saved-temps } } */
5730
5731=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c'
5732--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2010-08-20 13:27:11 +0000
5733+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2011-04-20 10:00:39 +0000
5734@@ -16,6 +16,6 @@
5735 vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t);
5736 }
5737
5738-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5739-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5740+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5741+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5742 /* { dg-final { cleanup-saved-temps } } */
5743
5744=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c'
5745--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2010-08-20 13:27:11 +0000
5746+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2011-04-20 10:00:39 +0000
5747@@ -16,6 +16,6 @@
5748 vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t);
5749 }
5750
5751-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5752-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5753+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5754+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5755 /* { dg-final { cleanup-saved-temps } } */
5756
5757=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c'
5758--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2010-08-20 13:27:11 +0000
5759+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2011-04-20 10:00:39 +0000
5760@@ -16,6 +16,6 @@
5761 vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t);
5762 }
5763
5764-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5765-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5766+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5767+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5768 /* { dg-final { cleanup-saved-temps } } */
5769
5770=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c'
5771--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2010-08-20 13:27:11 +0000
5772+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2011-04-20 10:00:39 +0000
5773@@ -16,6 +16,6 @@
5774 vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t);
5775 }
5776
5777-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5778-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5779+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5780+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5781 /* { dg-final { cleanup-saved-temps } } */
5782
5783=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c'
5784--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2010-08-20 13:27:11 +0000
5785+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2011-04-20 10:00:39 +0000
5786@@ -16,6 +16,6 @@
5787 vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t);
5788 }
5789
5790-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5791-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5792+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5793+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5794 /* { dg-final { cleanup-saved-temps } } */
5795
5796=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c'
5797--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2010-08-20 13:27:11 +0000
5798+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2011-04-20 10:00:39 +0000
5799@@ -16,6 +16,6 @@
5800 vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t);
5801 }
5802
5803-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5804-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5805+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5806+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5807 /* { dg-final { cleanup-saved-temps } } */
5808
5809=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c'
5810--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2010-08-20 13:27:11 +0000
5811+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2011-04-20 10:00:39 +0000
5812@@ -16,6 +16,6 @@
5813 vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t);
5814 }
5815
5816-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5817-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5818+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5819+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5820 /* { dg-final { cleanup-saved-temps } } */
5821
5822=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c'
5823--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2010-08-20 13:27:11 +0000
5824+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2011-04-20 10:00:39 +0000
5825@@ -16,6 +16,6 @@
5826 vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t);
5827 }
5828
5829-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5830-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5831+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5832+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5833 /* { dg-final { cleanup-saved-temps } } */
5834
5835=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c'
5836--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2010-08-20 13:27:11 +0000
5837+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2011-04-20 10:00:39 +0000
5838@@ -16,5 +16,5 @@
5839 vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1);
5840 }
5841
5842-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5843+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5844 /* { dg-final { cleanup-saved-temps } } */
5845
5846=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c'
5847--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2010-08-20 13:27:11 +0000
5848+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2011-04-20 10:00:39 +0000
5849@@ -16,5 +16,5 @@
5850 vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1);
5851 }
5852
5853-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5854+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5855 /* { dg-final { cleanup-saved-temps } } */
5856
5857=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c'
5858--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2010-08-20 13:27:11 +0000
5859+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2011-04-20 10:00:39 +0000
5860@@ -16,5 +16,5 @@
5861 vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1);
5862 }
5863
5864-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5865+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5866 /* { dg-final { cleanup-saved-temps } } */
5867
5868=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c'
5869--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2010-08-20 13:27:11 +0000
5870+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2011-04-20 10:00:39 +0000
5871@@ -16,5 +16,5 @@
5872 vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1);
5873 }
5874
5875-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5876+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5877 /* { dg-final { cleanup-saved-temps } } */
5878
5879=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c'
5880--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2010-08-20 13:27:11 +0000
5881+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2011-04-20 10:00:39 +0000
5882@@ -16,5 +16,5 @@
5883 vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1);
5884 }
5885
5886-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5887+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5888 /* { dg-final { cleanup-saved-temps } } */
5889
5890=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c'
5891--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2010-08-20 13:27:11 +0000
5892+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2011-04-20 10:00:39 +0000
5893@@ -16,5 +16,5 @@
5894 vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1);
5895 }
5896
5897-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5898+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5899 /* { dg-final { cleanup-saved-temps } } */
5900
5901=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c'
5902--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2010-08-20 13:27:11 +0000
5903+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2011-04-20 10:00:39 +0000
5904@@ -16,5 +16,5 @@
5905 vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1);
5906 }
5907
5908-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5909+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5910 /* { dg-final { cleanup-saved-temps } } */
5911
5912=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c'
5913--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2010-08-20 13:27:11 +0000
5914+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2011-04-20 10:00:39 +0000
5915@@ -16,5 +16,5 @@
5916 vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1);
5917 }
5918
5919-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5920+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5921 /* { dg-final { cleanup-saved-temps } } */
5922
5923=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c'
5924--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2010-08-20 13:27:11 +0000
5925+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2011-04-20 10:00:39 +0000
5926@@ -16,5 +16,5 @@
5927 vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1);
5928 }
5929
5930-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5931+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5932 /* { dg-final { cleanup-saved-temps } } */
5933
5934=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4f32.c'
5935--- old/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2010-08-20 13:27:11 +0000
5936+++ new/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2011-04-20 10:00:39 +0000
5937@@ -16,5 +16,5 @@
5938 vst4_f32 (arg0_float32_t, arg1_float32x2x4_t);
5939 }
5940
5941-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5942+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5943 /* { dg-final { cleanup-saved-temps } } */
5944
5945=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p16.c'
5946--- old/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2010-08-20 13:27:11 +0000
5947+++ new/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2011-04-20 10:00:39 +0000
5948@@ -16,5 +16,5 @@
5949 vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t);
5950 }
5951
5952-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5953+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5954 /* { dg-final { cleanup-saved-temps } } */
5955
5956=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p8.c'
5957--- old/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2010-08-20 13:27:11 +0000
5958+++ new/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2011-04-20 10:00:39 +0000
5959@@ -16,5 +16,5 @@
5960 vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t);
5961 }
5962
5963-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5964+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5965 /* { dg-final { cleanup-saved-temps } } */
5966
5967=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s16.c'
5968--- old/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2010-08-20 13:27:11 +0000
5969+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2011-04-20 10:00:39 +0000
5970@@ -16,5 +16,5 @@
5971 vst4_s16 (arg0_int16_t, arg1_int16x4x4_t);
5972 }
5973
5974-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5975+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5976 /* { dg-final { cleanup-saved-temps } } */
5977
5978=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s32.c'
5979--- old/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2010-08-20 13:27:11 +0000
5980+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2011-04-20 10:00:39 +0000
5981@@ -16,5 +16,5 @@
5982 vst4_s32 (arg0_int32_t, arg1_int32x2x4_t);
5983 }
5984
5985-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5986+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5987 /* { dg-final { cleanup-saved-temps } } */
5988
5989=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s64.c'
5990--- old/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2010-08-20 13:27:11 +0000
5991+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2011-04-20 10:00:39 +0000
5992@@ -16,5 +16,5 @@
5993 vst4_s64 (arg0_int64_t, arg1_int64x1x4_t);
5994 }
5995
5996-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
5997+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
5998 /* { dg-final { cleanup-saved-temps } } */
5999
6000=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s8.c'
6001--- old/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2010-08-20 13:27:11 +0000
6002+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2011-04-20 10:00:39 +0000
6003@@ -16,5 +16,5 @@
6004 vst4_s8 (arg0_int8_t, arg1_int8x8x4_t);
6005 }
6006
6007-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
6008+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
6009 /* { dg-final { cleanup-saved-temps } } */
6010
6011=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u16.c'
6012--- old/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2010-08-20 13:27:11 +0000
6013+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2011-04-20 10:00:39 +0000
6014@@ -16,5 +16,5 @@
6015 vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t);
6016 }
6017
6018-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
6019+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
6020 /* { dg-final { cleanup-saved-temps } } */
6021
6022=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u32.c'
6023--- old/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2010-08-20 13:27:11 +0000
6024+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2011-04-20 10:00:39 +0000
6025@@ -16,5 +16,5 @@
6026 vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t);
6027 }
6028
6029-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
6030+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
6031 /* { dg-final { cleanup-saved-temps } } */
6032
6033=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u64.c'
6034--- old/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2010-08-20 13:27:11 +0000
6035+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2011-04-20 10:00:39 +0000
6036@@ -16,5 +16,5 @@
6037 vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t);
6038 }
6039
6040-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
6041+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
6042 /* { dg-final { cleanup-saved-temps } } */
6043
6044=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u8.c'
6045--- old/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2010-08-20 13:27:11 +0000
6046+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2011-04-20 10:00:39 +0000
6047@@ -16,5 +16,5 @@
6048 vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t);
6049 }
6050
6051-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@.*\)?\n" } } */
6052+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@.*\)?\n" } } */
6053 /* { dg-final { cleanup-saved-temps } } */
6054
6055=== added file 'gcc/testsuite/gcc.target/arm/pr46329.c'
6056--- old/gcc/testsuite/gcc.target/arm/pr46329.c 1970-01-01 00:00:00 +0000
6057+++ new/gcc/testsuite/gcc.target/arm/pr46329.c 2011-05-03 12:49:58 +0000
6058@@ -0,0 +1,11 @@
6059+/* { dg-do compile } */
6060+/* { dg-require-effective-target arm_neon_ok } */
6061+/* { dg-options "-O2" } */
6062+/* { dg-add-options arm_neon } */
6063+
6064+int __attribute__ ((vector_size (32))) x;
6065+void
6066+foo (void)
6067+{
6068+ x <<= x;
6069+}
6070
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99504.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99504.patch
new file mode 100644
index 0000000000..b287c4da31
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99504.patch
@@ -0,0 +1,26 @@
1Remove the following
2
3 2011-04-20 Richard Sandiford <richard.sandiford@linaro.org>
4
5 gcc/testsuite/
6 From Richard Earnshaw <rearnsha@arm.com>
7
8 PR target/46329
9 * gcc.target/arm/pr46329.c: New test.
10
11=== removed file 'gcc/testsuite/gcc.target/arm/pr46329.c'
12--- old/gcc/testsuite/gcc.target/arm/pr46329.c 2011-05-03 12:49:58 +0000
13+++ new/gcc/testsuite/gcc.target/arm/pr46329.c 1970-01-01 00:00:00 +0000
14@@ -1,11 +0,0 @@
15-/* { dg-do compile } */
16-/* { dg-require-effective-target arm_neon_ok } */
17-/* { dg-options "-O2" } */
18-/* { dg-add-options arm_neon } */
19-
20-int __attribute__ ((vector_size (32))) x;
21-void
22-foo (void)
23-{
24- x <<= x;
25-}
26
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99506.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99506.patch
new file mode 100644
index 0000000000..9432f4c0a5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99506.patch
@@ -0,0 +1,21 @@
12011-05-06 Richard Sandiford <richard.sandiford@linaro.org>
2
3 gcc/
4 From Sergey Grechanik <mouseentity@ispras.ru>, approved for mainline
5
6 * config/arm/arm.c (coproc_secondary_reload_class): Return NO_REGS
7 for constant vectors.
8
9=== modified file 'gcc/config/arm/arm.c'
10--- old/gcc/config/arm/arm.c 2011-04-20 10:10:50 +0000
11+++ new/gcc/config/arm/arm.c 2011-05-04 15:13:02 +0000
12@@ -9353,7 +9353,7 @@
13 /* The neon move patterns handle all legitimate vector and struct
14 addresses. */
15 if (TARGET_NEON
16- && MEM_P (x)
17+ && (MEM_P (x) || GET_CODE (x) == CONST_VECTOR)
18 && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
19 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
20 || VALID_NEON_STRUCT_MODE (mode)))
21
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99507.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99507.patch
new file mode 100644
index 0000000000..f3d5eee6e7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99507.patch
@@ -0,0 +1,20 @@
12011-05-03 Tom de Vries <tom@codesourcery.com>
2
3 gcc/
4 * stmt.c (set_jump_prob): Make robust against *inv_scale == 0.
5
6=== modified file 'gcc/stmt.c'
7--- old/gcc/stmt.c 2011-02-07 13:23:30 +0000
8+++ new/gcc/stmt.c 2011-05-06 19:17:34 +0000
9@@ -2312,7 +2312,9 @@
10 set_jump_prob (rtx jump, int prob, int *inv_scale)
11 {
12 /* j[i] = p[i] * scale / REG_BR_PROB_BASE. */
13- int jump_prob = prob * REG_BR_PROB_BASE / *inv_scale;
14+ int jump_prob = (*inv_scale > 0
15+ ? prob * REG_BR_PROB_BASE / *inv_scale
16+ : REG_BR_PROB_BASE / 2);
17 /* f[i] = REG_BR_PROB_BASE - j[i]. */
18 int fallthrough_prob = REG_BR_PROB_BASE - jump_prob;
19
20
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99510.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99510.patch
new file mode 100644
index 0000000000..b4e4e883ac
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99510.patch
@@ -0,0 +1,24 @@
12011-05-13 Michael Hope <michael.hope@linaro.org>
2
3 gcc/
4 Backport from mainline:
5
6 2011-05-05 Michael Hope <michael.hope@linaro.org>
7
8 PR pch/45979
9 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for
10 __ARM_EABI__ hosts.
11
12=== modified file 'gcc/config/host-linux.c'
13--- old/gcc/config/host-linux.c 2009-02-20 15:20:38 +0000
14+++ new/gcc/config/host-linux.c 2011-05-06 20:16:10 +0000
15@@ -86,6 +86,8 @@
16 # define TRY_EMPTY_VM_SPACE 0x60000000
17 #elif defined(__mc68000__)
18 # define TRY_EMPTY_VM_SPACE 0x40000000
19+#elif defined(__ARM_EABI__)
20+# define TRY_EMPTY_VM_SPACE 0x60000000
21 #else
22 # define TRY_EMPTY_VM_SPACE 0
23 #endif
24
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99511.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99511.patch
new file mode 100644
index 0000000000..8d096c25d0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99511.patch
@@ -0,0 +1,582 @@
12011-05-13 Revital Eres <revital.eres@linaro.org>
2
3 gcc/
4 * loop-doloop.c (doloop_condition_get): Support new form of
5 doloop pattern and use prev_nondebug_insn instead of PREV_INSN.
6 * config/arm/thumb2.md (*thumb2_addsi3_compare0): Remove "*".
7 (doloop_end): New.
8 * config/arm/arm.md (*addsi3_compare0): Remove "*".
9 * params.def (sms-min-sc): New param flag.
10 * doc/invoke.texi (sms-min-sc): Document it.
11 * ddg.c (create_ddg_dep_from_intra_loop_link): If a true dep edge
12 enters the branch create an anti edge in the opposite direction
13 to prevent the creation of reg-moves.
14 (get_node_of_insn_uid, check_closing_branch_deps): Delete
15 functions.
16 (create_ddg): Restore previous definition and implementation.
17 * ddg.h (create_ddg): Restore previous definition.
18 * modulo-sched.c: Adjust comment to reflect the fact we are
19 scheduling closing branch.
20 (PS_STAGE_COUNT): Rename to CALC_STAGE_COUNT and redefine.
21 (stage_count): New field in struct partial_schedule.
22 (calculate_stage_count): New function.
23 (normalize_sched_times): Rename to reset_sched_times and handle
24 incrementing the sched time of the nodes by a constant value
25 passed as parameter.
26 (duplicate_insns_of_cycles): Skip closing branch.
27 (sms_schedule_by_order): Schedule closing branch.
28 (ps_insn_find_column): Handle closing branch.
29 (sms_schedule): Call reset_sched_times and adjust the code to
30 support scheduling of the closing branch. Use sms-min-sc.
31 Support new form of doloop pattern.
32 (ps_insert_empty_row): Update calls to normalize_sched_times
33 and rotate_partial_schedule functions.
34 (mark_doloop_insns): Remove.
35
36=== modified file 'gcc/ddg.c'
37--- old/gcc/ddg.c 2011-03-24 07:45:38 +0000
38+++ new/gcc/ddg.c 2011-05-11 08:00:14 +0000
39@@ -60,8 +60,6 @@
40 static ddg_edge_ptr create_ddg_edge (ddg_node_ptr, ddg_node_ptr, dep_type,
41 dep_data_type, int, int);
42 static void add_edge_to_ddg (ddg_ptr g, ddg_edge_ptr);
43-static ddg_node_ptr get_node_of_insn_uid (ddg_ptr, int);
44-
45
46 /* Auxiliary variable for mem_read_insn_p/mem_write_insn_p. */
47 static bool mem_ref_p;
48@@ -199,6 +197,11 @@
49 }
50 }
51
52+ /* If a true dep edge enters the branch create an anti edge in the
53+ opposite direction to prevent the creation of reg-moves. */
54+ if ((DEP_TYPE (link) == REG_DEP_TRUE) && JUMP_P (dest_node->insn))
55+ create_ddg_dep_no_link (g, dest_node, src_node, ANTI_DEP, REG_DEP, 1);
56+
57 latency = dep_cost (link);
58 e = create_ddg_edge (src_node, dest_node, t, dt, latency, distance);
59 add_edge_to_ddg (g, e);
60@@ -452,65 +455,12 @@
61 sched_free_deps (head, tail, false);
62 }
63
64-/* Given DOLOOP_INSNS which holds the instructions that
65- belong to the do-loop part; mark closing_branch_deps field in ddg G
66- as TRUE if the do-loop part's instructions are dependent on the other
67- loop instructions. Otherwise mark it as FALSE. */
68-static void
69-check_closing_branch_deps (ddg_ptr g, sbitmap doloop_insns)
70-{
71- sbitmap_iterator sbi;
72- unsigned int u = 0;
73-
74- EXECUTE_IF_SET_IN_SBITMAP (doloop_insns, 0, u, sbi)
75- {
76- ddg_edge_ptr e;
77- ddg_node_ptr u_node = get_node_of_insn_uid (g, u);
78-
79- gcc_assert (u_node);
80-
81- for (e = u_node->in; e != 0; e = e->next_in)
82- {
83- ddg_node_ptr v_node = e->src;
84-
85- if (((unsigned int) INSN_UID (v_node->insn) == u)
86- || DEBUG_INSN_P (v_node->insn))
87- continue;
88-
89- /* Ignore dependencies between memory writes and the
90- jump. */
91- if (JUMP_P (u_node->insn)
92- && e->type == OUTPUT_DEP
93- && mem_write_insn_p (v_node->insn))
94- continue;
95- if (!TEST_BIT (doloop_insns, INSN_UID (v_node->insn)))
96- {
97- g->closing_branch_deps = 1;
98- return;
99- }
100- }
101- for (e = u_node->out; e != 0; e = e->next_out)
102- {
103- ddg_node_ptr v_node = e->dest;
104-
105- if (((unsigned int) INSN_UID (v_node->insn) == u)
106- || DEBUG_INSN_P (v_node->insn))
107- continue;
108- if (!TEST_BIT (doloop_insns, INSN_UID (v_node->insn)))
109- {
110- g->closing_branch_deps = 1;
111- return;
112- }
113- }
114- }
115- g->closing_branch_deps = 0;
116-}
117
118 /* Given a basic block, create its DDG and return a pointer to a variable
119 of ddg type that represents it.
120 Initialize the ddg structure fields to the appropriate values. */
121 ddg_ptr
122-create_ddg (basic_block bb, sbitmap doloop_insns)
123+create_ddg (basic_block bb, int closing_branch_deps)
124 {
125 ddg_ptr g;
126 rtx insn, first_note;
127@@ -520,6 +470,7 @@
128 g = (ddg_ptr) xcalloc (1, sizeof (struct ddg));
129
130 g->bb = bb;
131+ g->closing_branch_deps = closing_branch_deps;
132
133 /* Count the number of insns in the BB. */
134 for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
135@@ -592,11 +543,6 @@
136 /* Build the data dependency graph. */
137 build_intra_loop_deps (g);
138 build_inter_loop_deps (g);
139-
140- /* Check whether the do-loop part is decoupled from the other loop
141- instructions. */
142- check_closing_branch_deps (g, doloop_insns);
143-
144 return g;
145 }
146
147@@ -890,18 +836,6 @@
148 return NULL;
149 }
150
151-/* Given the uid of an instruction UID return the node that represents it. */
152-static ddg_node_ptr
153-get_node_of_insn_uid (ddg_ptr g, int uid)
154-{
155- int i;
156-
157- for (i = 0; i < g->num_nodes; i++)
158- if (uid == INSN_UID (g->nodes[i].insn))
159- return &g->nodes[i];
160- return NULL;
161-}
162-
163 /* Given a set OPS of nodes in the DDG, find the set of their successors
164 which are not in OPS, and set their bits in SUCC. Bits corresponding to
165 OPS are cleared from SUCC. Leaves the other bits in SUCC unchanged. */
166
167=== modified file 'gcc/ddg.h'
168--- old/gcc/ddg.h 2011-03-24 07:45:38 +0000
169+++ new/gcc/ddg.h 2011-05-11 08:00:14 +0000
170@@ -167,7 +167,7 @@
171 };
172
173
174-ddg_ptr create_ddg (basic_block, sbitmap);
175+ddg_ptr create_ddg (basic_block, int closing_branch_deps);
176 void free_ddg (ddg_ptr);
177
178 void print_ddg (FILE *, ddg_ptr);
179
180=== modified file 'gcc/doc/invoke.texi'
181--- old/gcc/doc/invoke.texi 2011-04-17 23:04:58 +0000
182+++ new/gcc/doc/invoke.texi 2011-05-11 08:00:14 +0000
183@@ -8430,6 +8430,10 @@
184 The maximum number of best instructions in the ready list that are considered
185 for renaming in the selective scheduler. The default value is 2.
186
187+@item sms-min-sc
188+The minimum value of stage count that swing modulo scheduler will
189+generate. The default value is 2.
190+
191 @item max-last-value-rtl
192 The maximum size measured as number of RTLs that can be recorded in an expression
193 in combiner for a pseudo register as last known value of that register. The default
194
195=== modified file 'gcc/modulo-sched.c'
196--- old/gcc/modulo-sched.c 2011-03-24 07:45:38 +0000
197+++ new/gcc/modulo-sched.c 2011-05-11 08:00:14 +0000
198@@ -84,14 +84,13 @@
199 II cycles (i.e. use register copies to prevent a def from overwriting
200 itself before reaching the use).
201
202- SMS works with countable loops (1) whose control part can be easily
203- decoupled from the rest of the loop and (2) whose loop count can
204- be easily adjusted. This is because we peel a constant number of
205- iterations into a prologue and epilogue for which we want to avoid
206- emitting the control part, and a kernel which is to iterate that
207- constant number of iterations less than the original loop. So the
208- control part should be a set of insns clearly identified and having
209- its own iv, not otherwise used in the loop (at-least for now), which
210+ SMS works with countable loops whose loop count can be easily
211+ adjusted. This is because we peel a constant number of iterations
212+ into a prologue and epilogue for which we want to avoid emitting
213+ the control part, and a kernel which is to iterate that constant
214+ number of iterations less than the original loop. So the control
215+ part should be a set of insns clearly identified and having its
216+ own iv, not otherwise used in the loop (at-least for now), which
217 initializes a register before the loop to the number of iterations.
218 Currently SMS relies on the do-loop pattern to recognize such loops,
219 where (1) the control part comprises of all insns defining and/or
220@@ -116,7 +115,7 @@
221
222 /* The number of different iterations the nodes in ps span, assuming
223 the stage boundaries are placed efficiently. */
224-#define CALC_STAGE_COUNT(min_cycle,max_cycle,ii) ((max_cycle - min_cycle \
225+#define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \
226 + 1 + ii - 1) / ii)
227 /* The stage count of ps. */
228 #define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count)
229@@ -200,7 +199,6 @@
230 static void duplicate_insns_of_cycles (partial_schedule_ptr,
231 int, int, int, rtx);
232 static int calculate_stage_count (partial_schedule_ptr ps);
233-
234 #define SCHED_ASAP(x) (((node_sched_params_ptr)(x)->aux.info)->asap)
235 #define SCHED_TIME(x) (((node_sched_params_ptr)(x)->aux.info)->time)
236 #define SCHED_FIRST_REG_MOVE(x) \
237@@ -318,7 +316,7 @@
238 : prev_nondebug_insn (tail));
239
240 for (insn = head; insn != first_insn_not_to_check; insn = NEXT_INSN (insn))
241- if (reg_mentioned_p (reg, insn) && NONDEBUG_INSN_P (insn))
242+ if (reg_mentioned_p (reg, insn) && !DEBUG_INSN_P (insn))
243 {
244 if (dump_file)
245 {
246@@ -337,24 +335,6 @@
247 #endif
248 }
249
250-/* Mark in DOLOOP_INSNS the instructions that belong to the do-loop part.
251- Use TAIL to recognize that part. */
252-static void
253-mark_doloop_insns (sbitmap doloop_insns, rtx tail)
254-{
255- rtx first_insn_not_to_check, insn;
256-
257- /* This is the first instruction which belongs the doloop part. */
258- first_insn_not_to_check = (GET_CODE (PATTERN (tail)) == PARALLEL ? tail
259- : prev_nondebug_insn (tail));
260-
261- sbitmap_zero (doloop_insns);
262- for (insn = first_insn_not_to_check; insn != NEXT_INSN (tail);
263- insn = NEXT_INSN (insn))
264- if (NONDEBUG_INSN_P (insn))
265- SET_BIT (doloop_insns, INSN_UID (insn));
266-}
267-
268 /* Check if COUNT_REG is set to a constant in the PRE_HEADER block, so
269 that the number of iterations is a compile-time constant. If so,
270 return the rtx that sets COUNT_REG to a constant, and set COUNT to
271@@ -607,44 +587,42 @@
272 ddg_node_ptr u = crr_insn->node;
273 int normalized_time = SCHED_TIME (u) - amount;
274 int new_min_cycle = PS_MIN_CYCLE (ps) - amount;
275- /* The first cycle in row zero after the rotation. */
276- int new_first_cycle_in_row_zero =
277- new_min_cycle + ii - SMODULO (new_min_cycle, ii);
278+ int sc_until_cycle_zero, stage;
279
280- if (dump_file)
281- fprintf (dump_file, "crr_insn->node=%d, crr_insn->cycle=%d,\
282- min_cycle=%d\n", crr_insn->node->cuid, SCHED_TIME
283- (u), ps->min_cycle);
284+ if (dump_file)
285+ {
286+ /* Print the scheduling times after the rotation. */
287+ fprintf (dump_file, "crr_insn->node=%d (insn id %d), "
288+ "crr_insn->cycle=%d, min_cycle=%d", crr_insn->node->cuid,
289+ INSN_UID (crr_insn->node->insn), SCHED_TIME (u),
290+ normalized_time);
291+ if (JUMP_P (crr_insn->node->insn))
292+ fprintf (dump_file, " (branch)");
293+ fprintf (dump_file, "\n");
294+ }
295+
296 gcc_assert (SCHED_TIME (u) >= ps->min_cycle);
297 gcc_assert (SCHED_TIME (u) <= ps->max_cycle);
298 SCHED_TIME (u) = normalized_time;
299- crr_insn->cycle = normalized_time;
300 SCHED_ROW (u) = SMODULO (normalized_time, ii);
301-
302- /* If min_cycle is in row zero after the rotation then
303- the stage count can be calculated by dividing the cycle
304- with ii. Otherwise, the calculation is done by dividing the
305- SMSed kernel into two intervals:
306-
307- 1) min_cycle <= interval 0 < first_cycle_in_row_zero
308- 2) first_cycle_in_row_zero <= interval 1 < max_cycle
309-
310- Cycles in interval 0 are in stage 0. The stage of cycles
311- in interval 1 should be added by 1 to take interval 0 into
312- account. */
313- if (SMODULO (new_min_cycle, ii) == 0)
314- SCHED_STAGE (u) = normalized_time / ii;
315- else
316- {
317- if (crr_insn->cycle < new_first_cycle_in_row_zero)
318- SCHED_STAGE (u) = 0;
319- else
320- SCHED_STAGE (u) =
321- ((SCHED_TIME (u) - new_first_cycle_in_row_zero) / ii) + 1;
322+
323+ /* The calculation of stage count is done adding the number
324+ of stages before cycle zero and after cycle zero. */
325+ sc_until_cycle_zero = CALC_STAGE_COUNT (-1, new_min_cycle, ii);
326+
327+ if (SCHED_TIME (u) < 0)
328+ {
329+ stage = CALC_STAGE_COUNT (-1, SCHED_TIME (u), ii);
330+ SCHED_STAGE (u) = sc_until_cycle_zero - stage;
331+ }
332+ else
333+ {
334+ stage = CALC_STAGE_COUNT (SCHED_TIME (u), 0, ii);
335+ SCHED_STAGE (u) = sc_until_cycle_zero + stage - 1;
336 }
337 }
338 }
339-
340+
341 /* Set SCHED_COLUMN of each node according to its position in PS. */
342 static void
343 set_columns_for_ps (partial_schedule_ptr ps)
344@@ -694,8 +672,8 @@
345
346 /* Do not duplicate any insn which refers to count_reg as it
347 belongs to the control part.
348- If closing_branch_deps is true the closing branch is scheduled
349- as well and thus should be ignored.
350+ The closing branch is scheduled as well and thus should
351+ be ignored.
352 TODO: This should be done by analyzing the control part of
353 the loop. */
354 if (reg_mentioned_p (count_reg, u_node->insn)
355@@ -945,8 +923,7 @@
356 basic_block condition_bb = NULL;
357 edge latch_edge;
358 gcov_type trip_count = 0;
359- sbitmap doloop_insns;
360-
361+
362 loop_optimizer_init (LOOPS_HAVE_PREHEADERS
363 | LOOPS_HAVE_RECORDED_EXITS);
364 if (number_of_loops () <= 1)
365@@ -971,7 +948,6 @@
366 setup_sched_infos ();
367 haifa_sched_init ();
368
369- doloop_insns = sbitmap_alloc (get_max_uid () + 1);
370 /* Allocate memory to hold the DDG array one entry for each loop.
371 We use loop->num as index into this array. */
372 g_arr = XCNEWVEC (ddg_ptr, number_of_loops ());
373@@ -1104,16 +1080,18 @@
374
375 continue;
376 }
377- mark_doloop_insns (doloop_insns, tail);
378- if (! (g = create_ddg (bb, doloop_insns)))
379+
380+ /* Always schedule the closing branch with the rest of the
381+ instructions. The branch is rotated to be in row ii-1 at the
382+ end of the scheduling procedure to make sure it's the last
383+ instruction in the iteration. */
384+ if (! (g = create_ddg (bb, 1)))
385 {
386 if (dump_file)
387 fprintf (dump_file, "SMS create_ddg failed\n");
388 continue;
389 }
390- if (dump_file)
391- fprintf (dump_file, "SMS closing_branch_deps: %d\n",
392- g->closing_branch_deps);
393+
394 g_arr[loop->num] = g;
395 if (dump_file)
396 fprintf (dump_file, "...OK\n");
397@@ -1215,16 +1193,17 @@
398
399 ps = sms_schedule_by_order (g, mii, maxii, node_order);
400
401- if (ps)
402- {
403- stage_count = calculate_stage_count (ps);
404- gcc_assert(stage_count >= 1);
405- PS_STAGE_COUNT(ps) = stage_count;
406- }
407-
408- /* Stage count of 1 means that there is no interleaving between
409- iterations, let the scheduling passes do the job. */
410- if (stage_count <= 1
411+ if (ps)
412+ {
413+ stage_count = calculate_stage_count (ps);
414+ gcc_assert(stage_count >= 1);
415+ PS_STAGE_COUNT(ps) = stage_count;
416+ }
417+
418+ /* The default value of PARAM_SMS_MIN_SC is 2 as stage count of
419+ 1 means that there is no interleaving between iterations thus
420+ we let the scheduling passes do the job in this case. */
421+ if (stage_count < (unsigned) PARAM_VALUE (PARAM_SMS_MIN_SC)
422 || (count_init && (loop_count <= stage_count))
423 || (flag_branch_probabilities && (trip_count <= stage_count)))
424 {
425@@ -1242,21 +1221,12 @@
426 else
427 {
428 struct undo_replace_buff_elem *reg_move_replaces;
429- int amount;
430-
431- /* Set the stage boundaries. If the DDG is built with closing_branch_deps,
432- the closing_branch was scheduled and should appear in the last (ii-1)
433- row. Otherwise, we are free to schedule the branch, and we let nodes
434- that were scheduled at the first PS_MIN_CYCLE cycle appear in the first
435- row; this should reduce stage_count to minimum.
436- TODO: Revisit the issue of scheduling the insns of the
437- control part relative to the branch when the control part
438- has more than one insn. */
439- amount = (g->closing_branch_deps)? SCHED_TIME (g->closing_branch) + 1:
440- PS_MIN_CYCLE (ps);
441+ int amount = SCHED_TIME (g->closing_branch) + 1;
442+
443+ /* Set the stage boundaries. The closing_branch was scheduled
444+ and should appear in the last (ii-1) row. */
445 reset_sched_times (ps, amount);
446 rotate_partial_schedule (ps, amount);
447-
448 set_columns_for_ps (ps);
449
450 canon_loop (loop);
451@@ -1267,13 +1237,8 @@
452 "SMS succeeded %d %d (with ii, sc)\n", ps->ii,
453 stage_count);
454 print_partial_schedule (ps, dump_file);
455- if (!g->closing_branch_deps)
456- fprintf (dump_file,
457- "SMS Branch (%d) will later be scheduled at \
458- cycle %d.\n",
459- g->closing_branch->cuid, PS_MIN_CYCLE (ps) - 1);
460- }
461-
462+ }
463+
464 /* case the BCT count is not known , Do loop-versioning */
465 if (count_reg && ! count_init)
466 {
467@@ -1318,7 +1283,6 @@
468 }
469
470 free (g_arr);
471- sbitmap_free (doloop_insns);
472
473 /* Release scheduler data, needed until now because of DFA. */
474 haifa_sched_finish ();
475@@ -1826,13 +1790,6 @@
476 RESET_BIT (tobe_scheduled, u);
477 continue;
478 }
479- /* Closing branch handled later unless closing_branch_deps
480- is true. */
481- if (JUMP_P (insn) && !g->closing_branch_deps)
482- {
483- RESET_BIT (tobe_scheduled, u);
484- continue;
485- }
486
487 if (TEST_BIT (sched_nodes, u))
488 continue;
489@@ -2675,9 +2632,9 @@
490 last_in_row = next_ps_i;
491 }
492
493- /* If closing_branch_deps is true we are scheduling the closing
494- branch as well. Make sure there is no dependent instruction after
495- it as the branch should be the last instruction. */
496+ /* The closing branch is scheduled as well. Make sure there is no
497+ dependent instruction after it as the branch should be the last
498+ instruction in the row. */
499 if (JUMP_P (ps_i->node->insn))
500 {
501 if (first_must_follow)
502@@ -2918,51 +2875,21 @@
503 return ps_i;
504 }
505
506-/* Calculate the stage count of the partial schedule PS. */
507+/* Calculate the stage count of the partial schedule PS. The calculation
508+ takes into account the rotation to bring the closing branch to row
509+ ii-1. */
510 int
511 calculate_stage_count (partial_schedule_ptr ps)
512 {
513- int stage_count;
514-
515- /* If closing_branch_deps is false then the stage
516- boundaries are placed efficiently, meaning that min_cycle will be
517- placed at row 0. Otherwise, the closing branch will be placed in
518- row ii-1. For the later case we assume the final SMSed kernel can
519- be divided into two intervals. This assumption is used for the
520- stage count calculation:
521-
522- 1) min_cycle <= interval 0 < first_cycle_in_row_zero
523- 2) first_cycle_in_row_zero <= interval 1 < max_cycle
524- */
525- stage_count =
526- CALC_STAGE_COUNT (PS_MIN_CYCLE (ps), PS_MAX_CYCLE (ps), ps->ii);
527- if (ps->g->closing_branch_deps)
528- {
529- int new_min_cycle;
530- int new_min_cycle_row;
531- int rotation_amount = SCHED_TIME (ps->g->closing_branch) + 1;
532-
533- /* This is the new value of min_cycle after the final rotation to
534- bring closing branch into row ii-1. */
535- new_min_cycle = PS_MIN_CYCLE (ps) - rotation_amount;
536- /* This is the row which the the new min_cycle will be placed in. */
537- new_min_cycle_row = SMODULO (new_min_cycle, ps->ii);
538- /* If the row of min_cycle is zero then interval 0 is empty.
539- Otherwise, we need to calculate interval 1 and add it by one
540- to take interval 0 into account. */
541- if (new_min_cycle_row != 0)
542- {
543- int new_max_cycle, first_cycle_in_row_zero;
544-
545- new_max_cycle = PS_MAX_CYCLE (ps) - rotation_amount;
546- first_cycle_in_row_zero =
547- new_min_cycle + ps->ii - new_min_cycle_row;
548-
549- stage_count =
550- CALC_STAGE_COUNT (first_cycle_in_row_zero, new_max_cycle,
551- ps->ii) + 1;
552- }
553- }
554+ int rotation_amount = (SCHED_TIME (ps->g->closing_branch)) + 1;
555+ int new_min_cycle = PS_MIN_CYCLE (ps) - rotation_amount;
556+ int new_max_cycle = PS_MAX_CYCLE (ps) - rotation_amount;
557+ int stage_count = CALC_STAGE_COUNT (-1, new_min_cycle, ps->ii);
558+
559+ /* The calculation of stage count is done adding the number of stages
560+ before cycle zero and after cycle zero. */
561+ stage_count += CALC_STAGE_COUNT (new_max_cycle, 0, ps->ii);
562+
563 return stage_count;
564 }
565
566
567=== modified file 'gcc/params.def'
568--- old/gcc/params.def 2011-02-01 14:20:13 +0000
569+++ new/gcc/params.def 2011-05-11 08:00:14 +0000
570@@ -324,6 +324,11 @@
571 "sms-max-ii-factor",
572 "A factor for tuning the upper bound that swing modulo scheduler uses for scheduling a loop",
573 100, 0, 0)
574+/* The minimum value of stage count that swing modulo scheduler will generate. */
575+DEFPARAM(PARAM_SMS_MIN_SC,
576+ "sms-min-sc",
577+ "The minimum value of stage count that swing modulo scheduler will generate.",
578+ 2, 1, 1)
579 DEFPARAM(PARAM_SMS_DFA_HISTORY,
580 "sms-dfa-history",
581 "The number of cycles the swing modulo scheduler considers when checking conflicts using DFA",
582
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99514.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99514.patch
new file mode 100644
index 0000000000..3fe9bbca52
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99514.patch
@@ -0,0 +1,32 @@
12011-05-19 Revital Eres <revital.eres@linaro.org>
2
3 gcc/
4 * ddg.c (free_ddg_all_sccs): Free sccs field in struct
5 ddg_all_sccs.
6 * modulo-sched.c (sms_schedule): Avoid unfreed
7 memory when SMS fails.
8
9=== modified file 'gcc/ddg.c'
10--- old/gcc/ddg.c 2011-05-11 08:00:14 +0000
11+++ new/gcc/ddg.c 2011-05-13 16:16:22 +0000
12@@ -978,6 +978,7 @@
13 for (i = 0; i < all_sccs->num_sccs; i++)
14 free_scc (all_sccs->sccs[i]);
15
16+ free (all_sccs->sccs);
17 free (all_sccs);
18 }
19
20
21=== modified file 'gcc/modulo-sched.c'
22--- old/gcc/modulo-sched.c 2011-05-11 08:00:14 +0000
23+++ new/gcc/modulo-sched.c 2011-05-13 16:16:22 +0000
24@@ -1216,7 +1216,6 @@
25 fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, trip_count);
26 fprintf (dump_file, ")\n");
27 }
28- continue;
29 }
30 else
31 {
32
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99516.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99516.patch
new file mode 100644
index 0000000000..e058eb15e0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99516.patch
@@ -0,0 +1,45 @@
12011-06-09 Chung-Lin Tang <cltang@codesourcery.com>
2
3 LP:748138
4
5 gcc/
6 * cfgrtl.c (try_redirect_by_replacing_jump): Treat EXIT_BLOCK_PTR case
7 separately before call to redirect_jump(). Add assertion.
8 (patch_jump_insn): Same.
9
10=== modified file 'gcc/cfgrtl.c'
11--- old/gcc/cfgrtl.c 2011-02-08 10:51:58 +0000
12+++ new/gcc/cfgrtl.c 2011-05-12 08:56:07 +0000
13@@ -835,11 +835,10 @@
14 if (dump_file)
15 fprintf (dump_file, "Redirecting jump %i from %i to %i.\n",
16 INSN_UID (insn), e->dest->index, target->index);
17- if (!redirect_jump (insn, block_label (target), 0))
18- {
19- gcc_assert (target == EXIT_BLOCK_PTR);
20- return NULL;
21- }
22+ if (target == EXIT_BLOCK_PTR)
23+ return NULL;
24+ if (! redirect_jump (insn, block_label (target), 0))
25+ gcc_unreachable ();
26 }
27
28 /* Cannot do anything for target exit block. */
29@@ -1019,11 +1018,10 @@
30 /* If the substitution doesn't succeed, die. This can happen
31 if the back end emitted unrecognizable instructions or if
32 target is exit block on some arches. */
33- if (!redirect_jump (insn, block_label (new_bb), 0))
34- {
35- gcc_assert (new_bb == EXIT_BLOCK_PTR);
36- return false;
37- }
38+ if (new_bb == EXIT_BLOCK_PTR)
39+ return false;
40+ if (! redirect_jump (insn, block_label (new_bb), 0))
41+ gcc_unreachable ();
42 }
43 }
44 return true;
45
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