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authorKoen Kooi <koen@dominion.thruhere.net>2011-03-17 21:41:22 +0100
committerKoen Kooi <koen@dominion.thruhere.net>2011-03-17 21:41:22 +0100
commitc58cc7d3796dcee6e93885c835ed04cb566abeb2 (patch)
tree3eea4d4ef6a4ef79e0f4e025d7012c1a5cc38835 /meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch
parenteec6ab97f712e06eb52c9f7c99e19ffab3ce9d74 (diff)
downloadmeta-openembedded-c58cc7d3796dcee6e93885c835ed04cb566abeb2.tar.gz
move layer into meta-oe in preparation for future splits
As per TSC decision Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Diffstat (limited to 'meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch')
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch
new file mode 100644
index 000000000..580d4f472
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch
@@ -0,0 +1,38 @@
12011-01-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2
3 Backport from FSF mainline
4
5 2011-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
6
7 * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually
8 include.
9 (cortex_a9_dp): Handle neon types correctly.
10
11=== modified file 'gcc/config/arm/cortex-a9.md'
12Index: gcc-4_5-branch/gcc/config/arm/cortex-a9.md
13===================================================================
14--- gcc-4_5-branch.orig/gcc/config/arm/cortex-a9.md
15+++ gcc-4_5-branch/gcc/config/arm/cortex-a9.md
16@@ -79,10 +79,11 @@ cortex_a9_p1_e2 + cortex_a9_p0_e1 + cort
17 ;; which can go down E2 without any problem.
18 (define_insn_reservation "cortex_a9_dp" 2
19 (and (eq_attr "tune" "cortexa9")
20- (ior (eq_attr "type" "alu")
21- (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
22- (eq_attr "insn" "mov"))
23- (eq_attr "neon_type" "none"))))
24+ (ior (and (eq_attr "type" "alu")
25+ (eq_attr "neon_type" "none"))
26+ (and (and (eq_attr "type" "alu_shift_reg, alu_shift")
27+ (eq_attr "insn" "mov"))
28+ (eq_attr "neon_type" "none"))))
29 "cortex_a9_p0_default|cortex_a9_p1_default")
30
31 ;; An instruction using the shifter will go down E1.
32@@ -263,3 +264,6 @@ cortex_a9_store3_4, cortex_a9_store1_2,
33 (and (eq_attr "tune" "cortexa9")
34 (eq_attr "type" "fdivd"))
35 "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
36+
37+;; Include Neon pipeline description
38+(include "cortex-a9-neon.md")