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authorMartin Jansa <Martin.Jansa@gmail.com>2013-04-19 16:01:52 +0200
committerMartin Jansa <Martin.Jansa@gmail.com>2013-04-29 10:51:08 +0200
commit6970589fe80bf2286d87aea08abf7380ece12586 (patch)
treefe19c77a740112a415e3260574a12dc820f25993 /meta-oe/recipes-core
parentdb8e72e1f5ea2059f2b294c5e3e65feb329dfe03 (diff)
downloadmeta-openembedded-6970589fe80bf2286d87aea08abf7380ece12586.tar.gz
llvm2.9: try to fix thumb build and disable it after failure
* khem: could you check what I'm doing wrong? This is out of my league.. Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Diffstat (limited to 'meta-oe/recipes-core')
-rw-r--r--meta-oe/recipes-core/llvm/llvm2.9/0019-issue6065.patch35
-rw-r--r--meta-oe/recipes-core/llvm/llvm2.9_2.9.bb9
2 files changed, 44 insertions, 0 deletions
diff --git a/meta-oe/recipes-core/llvm/llvm2.9/0019-issue6065.patch b/meta-oe/recipes-core/llvm/llvm2.9/0019-issue6065.patch
new file mode 100644
index 000000000..aff3d1d06
--- /dev/null
+++ b/meta-oe/recipes-core/llvm/llvm2.9/0019-issue6065.patch
@@ -0,0 +1,35 @@
1--- llvm-2.9.orig/lib/Target/ARM/ARMJITInfo.cpp 2013-04-19 14:49:28.063566919 +0200
2+++ llvm-2.9/lib/Target/ARM/ARMJITInfo.cpp 2013-04-19 15:24:31.065435029 +0200
3@@ -59,7 +59,17 @@
4 // for the real target function right now. We have to act as if this
5 // whole compilation callback doesn't exist as far as the caller is
6 // concerned, so we can't just preserve the callee saved regs.
7+ // stmdb introduced in http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?diff_format=h&r1=57911&r2=57910&pathrev=57911
8+ // but fails on armv4t
9+ // | {standard input}: Assembler messages:
10+ // | {standard input}:22: Error: selected processor does not support Thumb mode `stmdb sp!,{r0,r1,r2,r3,lr}'
11+ // | {standard input}:31: Error: lo register required -- `ldmia sp!,{r0,r1,r2,r3,lr}'
12+ // | {standard input}:32: Error: lo register required -- `ldr pc,[sp],#4'
13+#ifndef __thumb__
14 "stmdb sp!, {r0, r1, r2, r3, lr}\n"
15+#else
16+ "push {r0, r1, r2, r3, lr}\n"
17+#endif
18 #if (defined(__VFP_FP__) && !defined(__SOFTFP__))
19 "fstmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n"
20 #endif
21@@ -99,8 +109,14 @@
22 // The above twiddling of the saved return addresses allows us to
23 // deallocate everything, including the LR the stub saved, with two
24 // updating load instructions.
25+#ifndef __thumb__
26 "ldmia sp!, {r0, r1, r2, r3, lr}\n"
27 "ldr pc, [sp], #4\n"
28+#else
29+ // thumb dont allow lr and pc to be poped in the same instruction.
30+ "pop {r0, r1, r2, r3, lr}\n"
31+ "pop {pc}\n"
32+#endif
33 );
34 #else // Not an ARM host
35 void ARMCompilationCallback() {
diff --git a/meta-oe/recipes-core/llvm/llvm2.9_2.9.bb b/meta-oe/recipes-core/llvm/llvm2.9_2.9.bb
index d5b8c0149..dc7f873bd 100644
--- a/meta-oe/recipes-core/llvm/llvm2.9_2.9.bb
+++ b/meta-oe/recipes-core/llvm/llvm2.9_2.9.bb
@@ -4,6 +4,15 @@ PR = "${INC_PR}.0"
4 4
5SRC_URI += "file://0035-gcc-4.7.patch" 5SRC_URI += "file://0035-gcc-4.7.patch"
6 6
7# 0019-issue6065.patch is still needed but a bit modified, because it was resolved by
8# http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?r1=120304&r2=124694&pathrev=124694
9# http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?diff_format=h&r1=57911&r2=57910&pathrev=57911
10# and still it fails with
11# {standard input}:31: Error: invalid register list to push/pop instruction -- `pop {r0,r1,r2,r3,lr}'
12# make[2]: *** [lib/Target/ARM/CMakeFiles/LLVMARMCodeGen.dir/ARMJITInfo.cpp.o] Error 1
13# SRC_URI += "file://0019-issue6065.patch"
14ARM_INSTRUCTION_SET = "arm"
15
7SRC_URI_append_libc-uclibc = " file://arm_fenv_uclibc.patch " 16SRC_URI_append_libc-uclibc = " file://arm_fenv_uclibc.patch "
8 17
9PARALLEL_MAKE_virtclass-native = "" 18PARALLEL_MAKE_virtclass-native = ""