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authorKhem Raj <raj.khem@gmail.com>2017-06-30 05:59:56 -0700
committerMartin Jansa <Martin.Jansa@gmail.com>2017-07-14 23:43:22 +0200
commit36aa6edabf82a2db25c35acf4b3e1130714a4045 (patch)
tree25fe615eefb1ef3af3333cdb28f544e0be5715d3
parentf5cab49989e9e0cab54f4ddb95b1d37fdcb2ac55 (diff)
downloadmeta-openembedded-36aa6edabf82a2db25c35acf4b3e1130714a4045.tar.gz
uim: Add support for aarch64
Backport patch from https://github.com/uim/libgcroots/pull/1 Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
-rw-r--r--meta-oe/recipes-support/uim/uim/0001-Add-support-for-aarch64.patch82
-rw-r--r--meta-oe/recipes-support/uim/uim_1.8.6.bb1
2 files changed, 83 insertions, 0 deletions
diff --git a/meta-oe/recipes-support/uim/uim/0001-Add-support-for-aarch64.patch b/meta-oe/recipes-support/uim/uim/0001-Add-support-for-aarch64.patch
new file mode 100644
index 000000000..4b1249436
--- /dev/null
+++ b/meta-oe/recipes-support/uim/uim/0001-Add-support-for-aarch64.patch
@@ -0,0 +1,82 @@
1From 24fd52cc45f7b5ff45afe072f5fbe66485df8c8e Mon Sep 17 00:00:00 2001
2From: Andreas Schwab <schwab@suse.de>
3Date: Wed, 29 Oct 2014 14:18:28 +0100
4Subject: [PATCH] Add support for aarch64
5
6* include/private/gcconfig.h: Add support for aarch64.
7---
8 sigscheme/libgcroots/include/private/gcconfig.h | 37 +++++++++++++++++++++++++
9 1 file changed, 37 insertions(+)
10
11diff --git a/sigscheme/libgcroots/include/private/gcconfig.h b/sigscheme/libgcroots/include/private/gcconfig.h
12index 4d42b03..0f13db6 100644
13--- a/sigscheme/libgcroots/include/private/gcconfig.h
14+++ b/sigscheme/libgcroots/include/private/gcconfig.h
15@@ -62,6 +62,13 @@
16 # endif
17
18 /* Determine the machine type: */
19+# if defined(__aarch64__)
20+# define AARCH64
21+# if !defined(LINUX)
22+# define NOSYS
23+# define mach_type_known
24+# endif
25+# endif
26 # if defined(__arm__) || defined(__thumb__)
27 # define ARM32
28 # if !defined(LINUX) && !defined(NETBSD)
29@@ -231,6 +238,10 @@
30 # define IA64
31 # define mach_type_known
32 # endif
33+# if defined(LINUX) && defined(__aarch64__)
34+# define AARCH64
35+# define mach_type_known
36+# endif
37 # if defined(LINUX) && defined(__arm__)
38 # define ARM32
39 # define mach_type_known
40@@ -504,6 +515,7 @@
41 /* running Amdahl UTS4 */
42 /* S390 ==> 390-like machine */
43 /* running LINUX */
44+ /* AARCH64 ==> ARM AArch64 */
45 /* ARM32 ==> Intel StrongARM */
46 /* IA64 ==> Intel IPF */
47 /* (e.g. Itanium) */
48@@ -1724,6 +1736,31 @@
49 # endif
50 # endif
51
52+# ifdef AARCH64
53+# define CPP_WORDSZ 64
54+# define MACH_TYPE "AARCH64"
55+# define ALIGNMENT 8
56+# ifndef HBLKSIZE
57+# define HBLKSIZE 4096
58+# endif
59+# ifdef LINUX
60+# define OS_TYPE "LINUX"
61+# define LINUX_STACKBOTTOM
62+# define DYNAMIC_LOADING
63+ extern int __data_start[];
64+# define DATASTART ((ptr_t)__data_start)
65+ extern char _end[];
66+# define DATAEND ((ptr_t)(&_end))
67+# endif
68+# ifdef NOSYS
69+ /* __data_start is usually defined in the target linker script. */
70+ extern int __data_start[];
71+# define DATASTART ((ptr_t)__data_start)
72+ extern void *__stack_base__;
73+# define STACKBOTTOM ((ptr_t)__stack_base__)
74+# endif
75+# endif
76+
77 # ifdef ARM32
78 # define CPP_WORDSZ 32
79 # define MACH_TYPE "ARM32"
80--
812.13.2
82
diff --git a/meta-oe/recipes-support/uim/uim_1.8.6.bb b/meta-oe/recipes-support/uim/uim_1.8.6.bb
index 76a41252d..ed846b968 100644
--- a/meta-oe/recipes-support/uim/uim_1.8.6.bb
+++ b/meta-oe/recipes-support/uim/uim_1.8.6.bb
@@ -8,6 +8,7 @@ SRC_URI = "http://uim.googlecode.com/files/uim-${PV}.tar.bz2"
8 8
9SRC_URI_append_class-target = " file://uim-module-manager.patch \ 9SRC_URI_append_class-target = " file://uim-module-manager.patch \
10 file://0001-fix-bug-for-cross-compile.patch \ 10 file://0001-fix-bug-for-cross-compile.patch \
11 file://0001-Add-support-for-aarch64.patch \
11" 12"
12SRC_URI[md5sum] = "ecea4c597bab1fd4ba98ea84edcece59" 13SRC_URI[md5sum] = "ecea4c597bab1fd4ba98ea84edcece59"
13SRC_URI[sha256sum] = "7b1ea803c73f3478917166f04f67cce6e45ad7ea5ab6df99b948c17eb1cb235f" 14SRC_URI[sha256sum] = "7b1ea803c73f3478917166f04f67cce6e45ad7ea5ab6df99b948c17eb1cb235f"