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1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn83xx-linux.dtsi"
53
54/ {
55 soc@0 {
56 uaa0: serial@87e028000000 {
57 compatible = "arm,pl011", "arm,primecell";
58 reg = <0x87e0 0x28000000 0x0 0x1000>;
59 interrupts = <0 5 4>;
60 clocks = <&refclkuaa>;
61 clock-names = "apb_pclk";
62 uboot,skip-init;
63 };
64
65 uaa1: serial@87e029000000 {
66 compatible = "arm,pl011", "arm,primecell";
67 reg = <0x87e0 0x29000000 0x0 0x1000>;
68 interrupts = <0 6 4>;
69 clocks = <&refclkuaa>;
70 clock-names = "apb_pclk";
71 uboot,skip-init;
72 };
73
74 uaa2: serial@87e02a000000 {
75 compatible = "arm,pl011", "arm,primecell";
76 reg = <0x87e0 0x2a000000 0x0 0x1000>;
77 interrupts = <0 7 4>;
78 clocks = <&refclkuaa>;
79 clock-names = "apb_pclk";
80 uboot,skip-init;
81 };
82
83 uaa3: serial@87e02b000000 {
84 compatible = "arm,pl011", "arm,primecell";
85 reg = <0x87e0 0x2b000000 0x0 0x1000>;
86 interrupts = <0 8 4>;
87 clocks = <&refclkuaa>;
88 clock-names = "apb_pclk";
89 uboot,skip-init;
90 };
91
92 pci@848000000000 {
93 mrml-bridge0@1,0 {
94 mdio-nexus@1,3 {
95 mdio0@87e005003800 {
96 compatible = "cavium,thunder-8890-mdio";
97 #address-cells = <1>;
98 #size-cells = <0>;
99 reg = <0x87e0 0x05003800 0x0 0x30>;
100
101 sgmii00: sgmii00 {
102 qlm-mode = "0x000,sgmii";
103 reg = <0> ;
104 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
105 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
106 marvell,reg-init = <3 0x10 0 0x8665>,
107 <3 0x11 0 0x00aa>,
108 <3 0x12 0 0x4105>,
109 <3 0x13 0 0x8a08>;
110
111 };
112 sgmii01: sgmii01 {
113 qlm-mode = "0x001,sgmii";
114 reg = <1> ;
115 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
116 marvell,reg-init = <3 0x10 0 0x8665>,
117 <3 0x11 0 0x00aa>,
118 <3 0x12 0 0x4105>,
119 <3 0x13 0 0x8a08>;
120 };
121 sgmii02: sgmii02 {
122 qlm-mode = "0x002,sgmii";
123 reg = <2> ;
124 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
125 marvell,reg-init = <3 0x10 0 0x8665>,
126 <3 0x11 0 0x00aa>,
127 <3 0x12 0 0x4105>,
128 <3 0x13 0 0x8a08>;
129 };
130 sgmii03: sgmii03 {
131 qlm-mode = "0x003,sgmii";
132 reg = <3> ;
133 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
134 marvell,reg-init = <3 0x10 0 0x8665>,
135 <3 0x11 0 0x00aa>,
136 <3 0x12 0 0x4105>,
137 <3 0x13 0 0x8a08>;
138 };
139 xfi00: xfi00 {
140 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
141 reg = <0> ;
142 compatible = "cortina,cs4223-slice";
143 };
144 xfi01: xfi01 {
145 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
146 reg = <1> ;
147 compatible = "cortina,cs4223-slice";
148 };
149 xfi02: xfi02 {
150 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
151 reg = <2> ;
152 compatible = "cortina,cs4223-slice";
153 };
154 xfi03: xfi03 {
155 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
156 reg = <3> ;
157 compatible = "cortina,cs4223-slice";
158 };
159 xlaui00: xlaui00 {
160 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
161 reg = <0> ;
162 compatible = "cortina,cs4223-slice";
163 };
164 xaui00: xaui00 {
165 qlm-mode = "0x000,xaui";
166 reg = <0> ;
167 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
168 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
169 };
170 rxaui00: rxaui00 {
171 qlm-mode = "0x000,rxaui";
172 reg = <0> ;
173 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
174 };
175 rxaui01: rxaui01 {
176 qlm-mode = "0x001,rxaui";
177 reg = <1> ;
178 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
179 };
180 qsgmii00: qsgmii00 {
181 qlm-mode = "0x000,qsgmii";
182 reg = <0> ;
183 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
184 };
185 qsgmii01: qsgmii01 {
186 qlm-mode = "0x001,qsgmii";
187 reg = <1> ;
188 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
189 };
190 qsgmii02: qsgmii02 {
191 qlm-mode = "0x002,qsgmii";
192 reg = <2> ;
193 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
194 };
195 qsgmii03: qsgmii03 {
196 qlm-mode = "0x003,qsgmii";
197 reg = <3> ;
198 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
199 };
200
201 sgmii10: sgmii10 {
202 qlm-mode = "0x010,sgmii";
203 reg = <8> ;
204 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
205 marvell,reg-init = <3 0x10 0 0x8665>,
206 <3 0x11 0 0x00aa>,
207 <3 0x12 0 0x4105>,
208 <3 0x13 0 0x8a08>;
209 };
210 sgmii11: sgmii11 {
211 qlm-mode = "0x011,sgmii";
212 reg = <9> ;
213 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
214 marvell,reg-init = <3 0x10 0 0x8665>,
215 <3 0x11 0 0x00aa>,
216 <3 0x12 0 0x4105>,
217 <3 0x13 0 0x8a08>;
218 };
219 sgmii12: sgmii12 {
220 qlm-mode = "0x012,sgmii";
221 reg = <2> ;
222 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
223 marvell,reg-init = <3 0x10 0 0x8665>,
224 <3 0x11 0 0x00aa>,
225 <3 0x12 0 0x4105>,
226 <3 0x13 0 0x8a08>;
227 };
228 sgmii13: sgmii13 {
229 qlm-mode = "0x013,sgmii";
230 reg = <3> ;
231 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
232 marvell,reg-init = <3 0x10 0 0x8665>,
233 <3 0x11 0 0x00aa>,
234 <3 0x12 0 0x4105>,
235 <3 0x13 0 0x8a08>;
236 };
237 xfi10: xfi10 {
238 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
239 reg = <8> ;
240 compatible = "cortina,cs4223-slice";
241 };
242 xfi11: xfi11 {
243 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
244 reg = <9> ;
245 compatible = "cortina,cs4223-slice";
246 };
247 xfi12: xfi12 {
248 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
249 reg = <10> ;
250 compatible = "cortina,cs4223-slice";
251 };
252 xfi13: xfi13 {
253 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
254 reg = <11> ;
255 compatible = "cortina,cs4223-slice";
256 };
257 xlaui10: xlaui10 {
258 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
259 reg = <8> ;
260 compatible = "cortina,cs4223-slice";
261 };
262 xaui10: xaui10 {
263 qlm-mode = "0x010,xaui";
264 reg = <8> ;
265 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
266 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
267 };
268 rxaui10: rxaui10 {
269 qlm-mode = "0x010,rxaui";
270 reg = <8> ;
271 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
272 };
273 rxaui11: rxaui11 {
274 qlm-mode = "0x011,rxaui";
275 reg = <9> ;
276 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
277 };
278 qsgmii10: qsgmii10 {
279 qlm-mode = "0x010,qsgmii";
280 reg = <8> ;
281 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
282 };
283 qsgmii11: qsgmii11 {
284 qlm-mode = "0x011,qsgmii";
285 reg = <9> ;
286 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
287 };
288 qsgmii12: qsgmii12 {
289 qlm-mode = "0x012,qsgmii";
290 reg = <10> ;
291 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
292 };
293 qsgmii13: qsgmii13 {
294 qlm-mode = "0x013,qsgmii";
295 reg = <11> ;
296 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
297 };
298 };
299
300 mdio1@87e005003880 {
301 compatible = "cavium,thunder-8890-mdio";
302 #address-cells = <1>;
303 #size-cells = <0>;
304 reg = <0x87e0 0x05003880 0x0 0x30>;
305
306 sgmii20: sgmii20 {
307 qlm-mode = "0x020,sgmii";
308 reg = <0> ;
309 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
310 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
311 marvell,reg-init = <3 0x10 0 0x8665>,
312 <3 0x11 0 0x00aa>,
313 <3 0x12 0 0x4105>,
314 <3 0x13 0 0x8a08>;
315
316 };
317 sgmii21: sgmii21 {
318 qlm-mode = "0x021,sgmii";
319 reg = <1> ;
320 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
321 marvell,reg-init = <3 0x10 0 0x8665>,
322 <3 0x11 0 0x00aa>,
323 <3 0x12 0 0x4105>,
324 <3 0x13 0 0x8a08>;
325 };
326 sgmii22: sgmii22 {
327 qlm-mode = "0x022,sgmii";
328 reg = <2> ;
329 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
330 marvell,reg-init = <3 0x10 0 0x8665>,
331 <3 0x11 0 0x00aa>,
332 <3 0x12 0 0x4105>,
333 <3 0x13 0 0x8a08>;
334 };
335 sgmii23: sgmii23 {
336 qlm-mode = "0x023,sgmii";
337 reg = <3> ;
338 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
339 marvell,reg-init = <3 0x10 0 0x8665>,
340 <3 0x11 0 0x00aa>,
341 <3 0x12 0 0x4105>,
342 <3 0x13 0 0x8a08>;
343 };
344 xfi20: xfi20 {
345 qlm-mode = "0x020,xfi","0x020,xfi-10g-kr";
346 reg = <0> ;
347 compatible = "cortina,cs4223-slice";
348 };
349 xfi21: xfi21 {
350 qlm-mode = "0x021,xfi","0x021,xfi-10g-kr";
351 reg = <1> ;
352 compatible = "cortina,cs4223-slice";
353 };
354 xfi22: xfi22 {
355 qlm-mode = "0x022,xfi","0x022,xfi-10g-kr";
356 reg = <2> ;
357 compatible = "cortina,cs4223-slice";
358 };
359 xfi23: xfi23 {
360 qlm-mode = "0x023,xfi","0x023,xfi-10g-kr";
361 reg = <3> ;
362 compatible = "cortina,cs4223-slice";
363 };
364 xlaui20: xlaui20 {
365 qlm-mode = "0x020,xlaui","0x020,xlaui-40g-kr";
366 reg = <0> ;
367 compatible = "cortina,cs4223-slice";
368 };
369 xaui20: xaui20 {
370 qlm-mode = "0x020,xaui";
371 reg = <0> ;
372 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
373 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
374 };
375 rxaui20: rxaui20 {
376 qlm-mode = "0x020,rxaui";
377 reg = <0> ;
378 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
379 };
380 rxaui21: rxaui21 {
381 qlm-mode = "0x021,rxaui";
382 reg = <1> ;
383 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
384 };
385 qsgmii20: qsgmii20 {
386 qlm-mode = "0x020,qsgmii";
387 reg = <0> ;
388 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
389 };
390 qsgmii21: qsgmii21 {
391 qlm-mode = "0x021,qsgmii";
392 reg = <1> ;
393 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
394 };
395 qsgmii22: qsgmii22 {
396 qlm-mode = "0x022,qsgmii";
397 reg = <2> ;
398 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
399 };
400 qsgmii23: qsgmii23 {
401 qlm-mode = "0x023,qsgmii";
402 reg = <3> ;
403 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
404 };
405
406 sgmii30: sgmii30 {
407 qlm-mode = "0x030,sgmii";
408 reg = <8> ;
409 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
410 marvell,reg-init = <3 0x10 0 0x8665>,
411 <3 0x11 0 0x00aa>,
412 <3 0x12 0 0x4105>,
413 <3 0x13 0 0x8a08>;
414 };
415 sgmii31: sgmii31 {
416 qlm-mode = "0x011,sgmii";
417 reg = <9> ;
418 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
419 marvell,reg-init = <3 0x10 0 0x8665>,
420 <3 0x11 0 0x00aa>,
421 <3 0x12 0 0x4105>,
422 <3 0x13 0 0x8a08>;
423 };
424 xfi30: xfi30 {
425 qlm-mode = "0x030,xfi","0x030,xfi-10g-kr";
426 reg = <8> ;
427 compatible = "cortina,cs4223-slice";
428 };
429 xfi31: xfi31 {
430 qlm-mode = "0x031,xfi","0x031,xfi-10g-kr";
431 reg = <9> ;
432 compatible = "cortina,cs4223-slice";
433 };
434 xfi32: xfi32 {
435 qlm-mode = "0x032,xfi","0x032,xfi-10g-kr";
436 reg = <10> ;
437 compatible = "cortina,cs4223-slice";
438 };
439 xfi33: xfi33 {
440 qlm-mode = "0x033,xfi","0x033,xfi-10g-kr";
441 reg = <11> ;
442 compatible = "cortina,cs4223-slice";
443 };
444 xlaui30: xlaui30 {
445 qlm-mode = "0x030,xlaui","0x030,xlaui-40g-kr";
446 reg = <8> ;
447 compatible = "cortina,cs4223-slice";
448 };
449 xaui30: xaui30 {
450 qlm-mode = "0x030,xaui";
451 reg = <8> ;
452 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
453 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
454 };
455 rxaui30: rxaui30 {
456 qlm-mode = "0x030,rxaui";
457 reg = <8> ;
458 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
459 };
460 rxaui31: rxaui31 {
461 qlm-mode = "0x031,rxaui";
462 reg = <9> ;
463 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
464 };
465 qsgmii30: qsgmii30 {
466 qlm-mode = "0x030,qsgmii";
467 reg = <8> ;
468 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
469 };
470 qsgmii31: qsgmii31 {
471 qlm-mode = "0x031,qsgmii";
472 reg = <9> ;
473 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
474 };
475 qsgmii32: qsgmii32 {
476 qlm-mode = "0x032,qsgmii";
477 reg = <10> ;
478 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
479 };
480 qsgmii33: qsgmii33 {
481 qlm-mode = "0x033,qsgmii";
482 reg = <11> ;
483 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
484 };
485 };
486 };
487 };
488 };
489 };
490};
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-06-10 19:35:53 +0000