| Commit message (Collapse) | Author | Age | Files | Lines |
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Correct the LINUX_VERSION to 3.10.35 and update machine branch
to use the latest SRCREV
Signed-off-by: Chan Wei Sern <wei.sern.chan@intel.com>
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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Added kernel v3.10-rt recipe for valleyisland BSP.
The kernel version supported in this recipe is 3.10.35.
Signed-off-by: Chan Wei Sern <wei.sern.chan@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
Acked-By: Nitin A Kamble <nitin.a.kamble@intel.com>
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Update MAINTAINERS to add "Ong Boon Leong" as maintainer
for MOHONPEAK.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
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Provide kernel version 3.10 recipe for mohonpeak BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
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Provide formfactor configuration for the mohonpeak BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
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Create new machines named 'mohonpeak32' and 'mohonpeak64'
for this platform.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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This layer provides support for Intel Atom Processor C2000
product line.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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Added Valley Island as one of the ISG-maintained BSP
and its maintainer.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>x
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Provide kernel v3.10 recipe for valleyisland BSP. Valley Island
BSP supports ACPI mode enumeration for its LPSS I/O devices. As PCI
related code are under development in feature branch, user will not
able to access LPSS I/O device drivers in PCI mode at this moment.
The kernel version supported in this recipe is 3.10.34.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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Provide formfactor configurations for the valleyisland bsp.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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Valley Island BSP supports both 32-bit and 64-bit configurations.
Create new machine configuraions named 'valleyisland-32' and
'valleyisland-64' for this BSP. This machine configurations are
set to support Intel open source graphics driver for Linux.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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This layer provides support for Intel Atom Processor E38XX product
line. This BSP layer are supporting Baytrail SoC on Valley Island
Development Kit, Bayley Bay CRB and Bakersport CRB.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
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Fixes [YOCTO 5679]
Bump the SRCREVs to address the lttng-modules build failure introduced
by the oe-core/poky commit:
lttng-modules: Update to 2.3.3 version
This updates the SRCREVs for crystalforest, haswell-wc, and romley which
were at different points than the rest of the BSPs in the layer.
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
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Update machine and meta branch to use latest SRCREV.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Acked-By: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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Remove typo in MAINTAINERS file for haswell-wc bsp.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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Provide kernel v3.8 and v3.10 recipe for haswell-wc BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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Provide a formfactor configuration for the haswell-wc BSP.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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Create a new machine named 'haswell-wc'.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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This layer provides support for 4th Gen Intel® Core™ Processor with
Mobile Intel QM87 and HM86 Chipsets.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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This creates meta-intel/meta-isg, a dedicated area within meta-intel
for ISG to house and maintain their ISG-specific BSPs.
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
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