| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
| |
Signed-off-by: California Sullivan <california.l.sullivan@intel.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
|
| |
|
|
|
|
|
|
| |
This makes it easier for others inheriting meta-intel to use their own
kernel.
Signed-off-by: California Sullivan <california.l.sullivan@intel.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
|
| |
|
|
|
|
|
|
| |
This address a boot issue based on using the new bootimg code that
makes a distiction between Live and VM type of image so they can
co-exisit.
Signed-off-by: Saul Wold <sgw@linux.intel.com>
|
| |
|
|
|
|
|
| |
This information is the same across all meta-intel supported MACHINEs,
so we can move it to a shared location.
Signed-off-by: California Sullivan <california.l.sullivan@intel.com>
|
| |
|
|
|
|
|
| |
This is handled in oe-core now, remove the redundant code.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
|
| |
|
|
|
|
|
| |
LSB images prefer to build with LTSI. Update to 3.14, now that 3.10 has
been removed.
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With this change, Intel microcode support can be enabled or disabled
for any BSP by controlling the MACHINE_FEATURES variable.
Any BSP from the meta-intel layer can enable Intel microcode loading
support by adding the following line in the machine configuration.
MACHINE_FEATURES += "intel-ucode"
This change keeps the intel-microcode feature disabled by default; it
can however be enabled as an "opt-in" feature via the MACHINE_FEATURES
variable.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
|
| |
|
|
|
|
|
|
| |
v3.10 is now the latest LTSI kernel. Use it for all the poky-lsb
images, so that it gets validation in the QA cycles.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
|
| |
|
|
|
|
|
|
| |
As all the EMGD based BSPs have been retired, there is no need for the
proprietary EMGD support in the meta-intel layer.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
|
| |
|
|
|
|
|
|
| |
For the BSPs using the meta-intel.inc file enable the early boot-time kernel
as well as the user space microcode loading support.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
|
| |
|
|
|
|
|
|
|
| |
This is to enable ASPEED Technology graphic card
that is bundled inside certain Intel customer reference
board.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Acked-By: Nitin A Kamble <nitin.a.kamble@intel.com>
|
| |
|
|
|
|
|
| |
To be consistent with the renaming in oe-core, use X86 instead of IA32
in the XSERVER_X86* variables.
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
|
| |
|
|
|
|
|
|
|
|
| |
BSPs using emgd graphics stack need to use older version
of xserver. And these older xserver recipes still use modules which need
to be specified in the meta-intel.inc.
This is needed in addition to Ross's xorg packaging fixes in oecore.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
| |
|
|
|
|
| |
XAA has been dropped, so we need to drop the xaa module.
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
|
|
Move a couple intel-specific variables into a new meta-intel.inc
include file. meta-intel.inc is meant to contain variables and
definitions that only make sense and are only available if the
meta-intel layer is included in bblayers.conf.
This is in preparation for moving the rest into oe-core.
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
|
