diff options
Diffstat (limited to 'dynamic-layers/clang-layer/recipes-devtools/clang/files/llvm11-0007-ispc-11_0_11_1_disable-A-B-A-B-in-InstCombine.patch')
-rw-r--r-- | dynamic-layers/clang-layer/recipes-devtools/clang/files/llvm11-0007-ispc-11_0_11_1_disable-A-B-A-B-in-InstCombine.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/dynamic-layers/clang-layer/recipes-devtools/clang/files/llvm11-0007-ispc-11_0_11_1_disable-A-B-A-B-in-InstCombine.patch b/dynamic-layers/clang-layer/recipes-devtools/clang/files/llvm11-0007-ispc-11_0_11_1_disable-A-B-A-B-in-InstCombine.patch new file mode 100644 index 00000000..dcf26bc9 --- /dev/null +++ b/dynamic-layers/clang-layer/recipes-devtools/clang/files/llvm11-0007-ispc-11_0_11_1_disable-A-B-A-B-in-InstCombine.patch | |||
@@ -0,0 +1,47 @@ | |||
1 | From ef2b930a8e33078449737a93e7d522b2280ec58c Mon Sep 17 00:00:00 2001 | ||
2 | From: Naveen Saini <naveen.kumar.saini@intel.com> | ||
3 | Date: Fri, 27 Aug 2021 11:39:16 +0800 | ||
4 | Subject: [PATCH 1/2] This patch is needed for ISPC for Gen only | ||
5 | |||
6 | Transformation of add to or is not safe for VC backend. | ||
7 | |||
8 | Upstream-Status: Backport [Taken from ispc,https://github.com/ispc/ispc/blob/v1.16.1/llvm_patches/11_0_11_1_disable-A-B-A-B-in-InstCombine.patch] | ||
9 | |||
10 | Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com> | ||
11 | --- | ||
12 | .../lib/Transforms/InstCombine/InstCombineAddSub.cpp | 12 ++++++++---- | ||
13 | 1 file changed, 8 insertions(+), 4 deletions(-) | ||
14 | |||
15 | diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp | ||
16 | index a7f5e0a7774d..bf02b0f70827 100644 | ||
17 | --- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp | ||
18 | +++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp | ||
19 | @@ -15,6 +15,7 @@ | ||
20 | #include "llvm/ADT/APInt.h" | ||
21 | #include "llvm/ADT/STLExtras.h" | ||
22 | #include "llvm/ADT/SmallVector.h" | ||
23 | +#include "llvm/ADT/Triple.h" | ||
24 | #include "llvm/Analysis/InstructionSimplify.h" | ||
25 | #include "llvm/Analysis/ValueTracking.h" | ||
26 | #include "llvm/IR/Constant.h" | ||
27 | @@ -1324,10 +1325,13 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) { | ||
28 | return BinaryOperator::CreateSRem(RHS, NewRHS); | ||
29 | } | ||
30 | } | ||
31 | - | ||
32 | - // A+B --> A|B iff A and B have no bits set in common. | ||
33 | - if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT)) | ||
34 | - return BinaryOperator::CreateOr(LHS, RHS); | ||
35 | + | ||
36 | + // Disable this transformation for ISPC SPIR-V | ||
37 | + if (!Triple(I.getModule()->getTargetTriple()).isSPIR()) { | ||
38 | + // A+B --> A|B iff A and B have no bits set in common. | ||
39 | + if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT)) | ||
40 | + return BinaryOperator::CreateOr(LHS, RHS); | ||
41 | + } | ||
42 | |||
43 | // FIXME: We already did a check for ConstantInt RHS above this. | ||
44 | // FIXME: Is this pattern covered by another fold? No regression tests fail on | ||
45 | -- | ||
46 | 2.17.1 | ||
47 | |||