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| author | Tom Zanussi <tom.zanussi@intel.com> | 2010-12-15 15:42:38 -0600 |
|---|---|---|
| committer | Saul Wold <sgw@linux.intel.com> | 2011-01-03 16:45:27 -0800 |
| commit | ef1c55927c75b4fa0a12796bb21d52dd9fefcfdb (patch) | |
| tree | fb0a2a717f8d448a5f1455d4a9d67a9eb79741b3 /meta-n450/docs | |
| parent | 7059fe6442b0cf480261fbcdea3e5ba404afef27 (diff) | |
| download | meta-intel-ef1c55927c75b4fa0a12796bb21d52dd9fefcfdb.tar.gz | |
meta-crownbay: update crownbay SRCREVs
Update crownbay machine and meta SRCREVs to point the correct place in
the kernel tree.
In keeping with the 'self-contained' aspect of the BSP, also keep it
in the meta-crownbay layer.
Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>
Diffstat (limited to 'meta-n450/docs')
0 files changed, 0 insertions, 0 deletions