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authorSaul Wold <sgw@linux.intel.com>2015-10-01 15:06:22 (GMT)
committerSaul Wold <sgw@linux.intel.com>2015-10-02 15:14:48 (GMT)
commit0d73402b4f350b8a11458c8b1e22ab927e0a015f (patch)
treede99e71987a5ded2423f74d11011bea4aee94949
parent217a3eb2c87ad46839bb09c8f9e8b31557dd6dc2 (diff)
downloadmeta-intel-0d73402b4f350b8a11458c8b1e22ab927e0a015f.tar.gz
intel-quark-common: Add no-asm config to openssl
This causes the build to not use Assembly code which contains invalid CMOV instructions. Signed-off-by: Saul Wold <sgw@linux.intel.com>
-rw-r--r--conf/machine/include/intel-quark-common.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/conf/machine/include/intel-quark-common.inc b/conf/machine/include/intel-quark-common.inc
index ac518be..f7cfe14 100644
--- a/conf/machine/include/intel-quark-common.inc
+++ b/conf/machine/include/intel-quark-common.inc
@@ -9,3 +9,4 @@ require conf/machine/include/x86-base.inc
9# gnutls padlock code uses CMOV instruction in assembly which 9# gnutls padlock code uses CMOV instruction in assembly which
10# is not valid for Quark. 10# is not valid for Quark.
11EXTRA_OECONF_append_pn-gnutls_intel-quark = " --disable-padlock" 11EXTRA_OECONF_append_pn-gnutls_intel-quark = " --disable-padlock"
12EXTRA_OECONF_append_pn-openssl_intel-quark = " no-asm"