diff options
Diffstat (limited to 'recipes-bsp/u-boot/u-boot-2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch')
-rw-r--r-- | recipes-bsp/u-boot/u-boot-2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/recipes-bsp/u-boot/u-boot-2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch b/recipes-bsp/u-boot/u-boot-2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch new file mode 100644 index 0000000..65b13bc --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-2012.04.01/0025-i.MX6-Add-ANATOP-regulator-init.patch | |||
@@ -0,0 +1,84 @@ | |||
1 | From 15616b5ca6f7dc2b728930cfc729d787869edc9e Mon Sep 17 00:00:00 2001 | ||
2 | From: Dirk Behme <dirk.behme@de.bosch.com> | ||
3 | Date: Wed, 2 May 2012 02:12:17 +0000 | ||
4 | Subject: [PATCH 25/56] i.MX6: Add ANATOP regulator init | ||
5 | |||
6 | Init the core regulator voltage to 1.2V. This is required for the correct | ||
7 | functioning of the GPU and when the ARM LDO is set to 1.225V. This is a | ||
8 | workaround to fix some memory clock jitter. | ||
9 | |||
10 | Note: This should be but can't be done in the DCD. The bootloader | ||
11 | prevents access to the ANATOP registers. | ||
12 | |||
13 | Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> | ||
14 | CC: Jason Chen <b02280@freescale.com> | ||
15 | CC: Jason Liu <r64343@freescale.com> | ||
16 | CC: Ranjani Vaidyanathan <ra5478@freescale.com> | ||
17 | CC: Stefano Babic <sbabic@denx.de> | ||
18 | CC: Fabio Estevam <festevam@gmail.com> | ||
19 | --- | ||
20 | arch/arm/cpu/armv7/mx6/soc.c | 30 +++++++++++++++++++++++++++++ | ||
21 | arch/arm/include/asm/arch-mx6/sys_proto.h | 2 ++ | ||
22 | 2 files changed, 32 insertions(+) | ||
23 | |||
24 | diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c | ||
25 | index 543b2cc..90f2088 100644 | ||
26 | --- a/arch/arm/cpu/armv7/mx6/soc.c | ||
27 | +++ b/arch/arm/cpu/armv7/mx6/soc.c | ||
28 | @@ -77,10 +77,40 @@ void init_aips(void) | ||
29 | writel(0x00000000, &aips2->opacr4); | ||
30 | } | ||
31 | |||
32 | +/* | ||
33 | + * Set the VDDSOC | ||
34 | + * | ||
35 | + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) and set | ||
36 | + * them to the specified millivolt level. | ||
37 | + * Possible values are from 0.725V to 1.450V in steps of | ||
38 | + * 0.025V (25mV). | ||
39 | + */ | ||
40 | +void set_vddsoc(u32 mv) | ||
41 | +{ | ||
42 | + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; | ||
43 | + u32 val, reg = readl(&anatop->reg_core); | ||
44 | + | ||
45 | + if (mv < 725) | ||
46 | + val = 0x00; /* Power gated off */ | ||
47 | + else if (mv > 1450) | ||
48 | + val = 0x1F; /* Power FET switched full on. No regulation */ | ||
49 | + else | ||
50 | + val = (mv - 700) / 25; | ||
51 | + | ||
52 | + /* | ||
53 | + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) | ||
54 | + * and set them to the calculated value (0.7V + val * 0.25V) | ||
55 | + */ | ||
56 | + reg = (reg & ~(0x1F << 18)) | (val << 18); | ||
57 | + writel(reg, &anatop->reg_core); | ||
58 | +} | ||
59 | + | ||
60 | int arch_cpu_init(void) | ||
61 | { | ||
62 | init_aips(); | ||
63 | |||
64 | + set_vddsoc(1200); /* Set VDDSOC to 1.2V */ | ||
65 | + | ||
66 | return 0; | ||
67 | } | ||
68 | #endif | ||
69 | diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h | ||
70 | index 69687a8..711b30d 100644 | ||
71 | --- a/arch/arm/include/asm/arch-mx6/sys_proto.h | ||
72 | +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h | ||
73 | @@ -28,6 +28,8 @@ | ||
74 | |||
75 | u32 get_cpu_rev(void); | ||
76 | |||
77 | +void set_vddsoc(u32 mv); | ||
78 | + | ||
79 | /* | ||
80 | * Initializes on-chip ethernet controllers. | ||
81 | * to override, implement board_eth_init() | ||
82 | -- | ||
83 | 1.7.10 | ||
84 | |||