diff options
author | Otavio Salvador <otavio@ossystems.com.br> | 2012-09-18 12:23:25 -0300 |
---|---|---|
committer | Otavio Salvador <otavio@ossystems.com.br> | 2012-09-18 12:23:25 -0300 |
commit | 43398c73e1a26546927301d74724eeca67d6cf7c (patch) | |
tree | 94eb7fadd2f086bdede22c5953c17682fbc46ec7 /recipes-kernel/linux/linux-imx-2.6.35.3 | |
parent | 8e96b7e39cdb30ccdaf402a04b7ff4cec7414611 (diff) | |
download | meta-fsl-arm-43398c73e1a26546927301d74724eeca67d6cf7c.tar.gz |
Revert "linux-imx (2.6.35.3): mx5: Fix IPU hang when framebuffer is enabled in U-boot"
This reverts commit e7f3146191b4a5c4e160ae1b585ec4fd8f99e6b0.
Diffstat (limited to 'recipes-kernel/linux/linux-imx-2.6.35.3')
-rw-r--r-- | recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch | 59 |
1 files changed, 0 insertions, 59 deletions
diff --git a/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch b/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch deleted file mode 100644 index fa94faf..0000000 --- a/recipes-kernel/linux/linux-imx-2.6.35.3/mx5-fix-hang-with-framebuffer.patch +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | From 3bd0148cfe28a9908ff4cbb7b542d309107591a4 Mon Sep 17 00:00:00 2001 | ||
2 | From: Fabio Estevam <fabio.estevam@freescale.com> | ||
3 | Date: Wed, 5 Sep 2012 19:54:54 -0300 | ||
4 | Subject: [PATCH 1/2] ARM: mach-mx5: Fix IPU hang when framebuffer is enabled | ||
5 | in U-boot | ||
6 | |||
7 | If bootloader enableds framebuffer, it is necessary to turn off IPU early in | ||
8 | the boot process to avoid kernel hang. | ||
9 | |||
10 | Suggested-by: Troy Kisky <troy.kisky@boundarydevices.com> | ||
11 | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> | ||
12 | --- | ||
13 | arch/arm/mach-mx5/clock.c | 16 ++++++++++++++++ | ||
14 | 1 file changed, 16 insertions(+) | ||
15 | |||
16 | diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c | ||
17 | index 4559876..4d5a2cc 100644 | ||
18 | --- a/arch/arm/mach-mx5/clock.c | ||
19 | +++ b/arch/arm/mach-mx5/clock.c | ||
20 | @@ -4453,6 +4453,20 @@ static void clk_tree_init(void) | ||
21 | } | ||
22 | } | ||
23 | |||
24 | +#define IPU_CONF 0x000 | ||
25 | +#define IPU_DISP_GEN 0x0C4 | ||
26 | + | ||
27 | +void turn_off_display(int physical_base) | ||
28 | +{ | ||
29 | + void __iomem *ipuc = ioremap(physical_base, SZ_4K); | ||
30 | + if (ipuc) { | ||
31 | + /* clear DI0/DI1 counter release */ | ||
32 | + unsigned reg = __raw_readl(ipuc + IPU_DISP_GEN); | ||
33 | + __raw_writel(reg & ~(3 << 24), ipuc + IPU_DISP_GEN); | ||
34 | + __raw_writel(0, ipuc + IPU_CONF); | ||
35 | + iounmap(ipuc); | ||
36 | + } | ||
37 | +} | ||
38 | |||
39 | int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2) | ||
40 | { | ||
41 | @@ -4462,6 +4476,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long | ||
42 | int wp_cnt = 0; | ||
43 | u32 pll1_rate; | ||
44 | |||
45 | + turn_off_display(MX51_IPU_CTRL_BASE_ADDR + ((512 - 32) << 20)); | ||
46 | pll1_base = ioremap(PLL1_BASE_ADDR, SZ_4K); | ||
47 | pll2_base = ioremap(PLL2_BASE_ADDR, SZ_4K); | ||
48 | pll3_base = ioremap(PLL3_BASE_ADDR, SZ_4K); | ||
49 | @@ -4782,6 +4797,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long | ||
50 | int i = 0, j = 0, reg; | ||
51 | u32 pll1_rate; | ||
52 | |||
53 | + turn_off_display(MX53_IPU_CTRL_BASE_ADDR + ((128 - 32) << 20)); | ||
54 | pll1_base = ioremap(MX53_BASE_ADDR(PLL1_BASE_ADDR), SZ_4K); | ||
55 | pll2_base = ioremap(MX53_BASE_ADDR(PLL2_BASE_ADDR), SZ_4K); | ||
56 | pll3_base = ioremap(MX53_BASE_ADDR(PLL3_BASE_ADDR), SZ_4K); | ||
57 | -- | ||
58 | 1.7.10.4 | ||
59 | |||