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author | Otavio Salvador <otavio@ossystems.com.br> | 2015-11-05 19:49:27 -0200 |
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committer | Otavio Salvador <otavio@ossystems.com.br> | 2015-11-05 21:50:41 -0200 |
commit | 9fce6750b6b36efde82ea87c8a9bdf876bc56a22 (patch) | |
tree | 98e2f300a17da6e09ebfbad8079f05363a08681f | |
parent | 425be329f0c3e071d2f8eb12581e3c6e9c08173d (diff) | |
download | meta-fsl-arm-9fce6750b6b36efde82ea87c8a9bdf876bc56a22.tar.gz |
u-boot-fslc: Update revision to 1b6aee7
This includes following backported changes from 2016.01 development tree:
1b6aee7 mx7dsabresd: add secure boot support
54021ea imx: hab: add mx7 secure boot support
eea967b imx: hab: use read_fuse for secure boot settings
cca95ea arm: imx: add secure boot fuse details for imx7 SoC
5ef219e arm: imx: add secure boot fuse details for imx6 SoC
b2842cc imx: hab: add secure boot fuse details
31454f2 imx: hab: rework unified rom section for mx7
9ac3e4b imx: hab: use unified rom section for mx6sx and mx6ul
20235de imx: hab: rework secure boot support for imx6
8574461 imx: cpu: move common chip revision id's
a0c37ef imx: mx6sabresd: add i.MX6DQP Sabresd support
93bcc5f imx35, flea3: add FIT image support
10ca202 ts4800: add CONFIG_OF_LIBFDT
4198580 arm, imx6, aristainetos2: set gpr register after reset
e06ab75 arm, imx: add some gpr register defines
8af784c driver: misc: add MXC_OCOTP Kconfig entry
a022163 imx-common: timer: clean up code
Besides those, it also include:
4238786 cgtqmx6eval: Fix SPL support
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
-rw-r--r-- | recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb | 2 | ||||
-rw-r--r-- | recipes-bsp/u-boot/u-boot-fslc_2015.10.bb | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb index ecbf2a3..c8c9a43 100644 --- a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb +++ b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb | |||
@@ -7,7 +7,7 @@ PROVIDES = "u-boot-mxsboot" | |||
7 | 7 | ||
8 | PV = "v2015.10+git${SRCPV}" | 8 | PV = "v2015.10+git${SRCPV}" |
9 | 9 | ||
10 | SRCREV = "23575d2d1b958952c42348e4aee96969eab3e1f2" | 10 | SRCREV = "1b6aee73e60023ae4ba16b11ce7bc23e0e8552f7" |
11 | SRCBRANCH = "2015.10+fslc" | 11 | SRCBRANCH = "2015.10+fslc" |
12 | 12 | ||
13 | SRC_URI = "git://github.com/Freescale/u-boot-fslc.git;branch=${SRCBRANCH}" | 13 | SRC_URI = "git://github.com/Freescale/u-boot-fslc.git;branch=${SRCBRANCH}" |
diff --git a/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb b/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb index ac76378..d326abe 100644 --- a/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb +++ b/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb | |||
@@ -2,5 +2,5 @@ include u-boot-fslc.inc | |||
2 | 2 | ||
3 | PV = "v2015.10+git${SRCPV}" | 3 | PV = "v2015.10+git${SRCPV}" |
4 | 4 | ||
5 | SRCREV = "23575d2d1b958952c42348e4aee96969eab3e1f2" | 5 | SRCREV = "1b6aee73e60023ae4ba16b11ce7bc23e0e8552f7" |
6 | SRCBRANCH = "2015.10+fslc" | 6 | SRCBRANCH = "2015.10+fslc" |