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authorOtavio Salvador <otavio@ossystems.com.br>2013-07-02 11:52:51 -0300
committerOtavio Salvador <otavio@ossystems.com.br>2013-07-02 14:49:18 -0300
commitdaf582c93a7283fb0af3b25fe2ada48f4c9985c4 (patch)
tree7b56a35cf620a458a17e8734b3699d685f2dafa1
parentda13ed0a4b965f69174dca218dce687f7ce0010d (diff)
downloadmeta-fsl-arm-daf582c93a7283fb0af3b25fe2ada48f4c9985c4.tar.gz
perf: Disable FPU tune for i.MX5 SoCs to workaround GCC ICE
GCC 4.8 currently ICE when building perf for i.MX5 SoCs and we can workaround it disabling the FPU tunning for it. This is a temporary solution until GCC fixes this in an upcoming release. GCC bugzilla: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57748 Change-Id: I5a23e6b57695a90e9750f0fa28c419b260c83be2 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
-rw-r--r--recipes-kernel/perf/perf.bbappend3
1 files changed, 3 insertions, 0 deletions
diff --git a/recipes-kernel/perf/perf.bbappend b/recipes-kernel/perf/perf.bbappend
new file mode 100644
index 0000000..604e2b4
--- /dev/null
+++ b/recipes-kernel/perf/perf.bbappend
@@ -0,0 +1,3 @@
1# FIXME: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57748
2TUNE_CCARGS_mx5 := "${@oe_filter_out('-mfpu=neon', '${TUNE_CCARGS}', d)}"
3