diff options
Diffstat (limited to 'recipes-kernel/linux/linux-congatec-3.0.35')
11 files changed, 17089 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0001-Add-linux-support-for-congatec-evaluation-board-qmx6q.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0001-Add-linux-support-for-congatec-evaluation-board-qmx6q.patch new file mode 100644 index 0000000..1262df0 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0001-Add-linux-support-for-congatec-evaluation-board-qmx6q.patch | |||
@@ -0,0 +1,7213 @@ | |||
1 | From 8848547bb783e01a9f00104b0d4fb1366893c245 Mon Sep 17 00:00:00 2001 | ||
2 | From: Leo Sartre <lsartre@adeneo-embedded.com> | ||
3 | Date: Wed, 29 May 2013 09:46:23 +0200 | ||
4 | Subject: [PATCH] Add support for congatec evaluation board qmx6q and qmx6qdl | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | Add support for congatec Qeval board, patch originaly written by | ||
8 | Congatec team, some minor changes and cleanup were applied to make it | ||
9 | work with the bsp 4.1 release. | ||
10 | --- | ||
11 | arch/arm/configs/qmx6_defconfig | 2659 +++++++++++++++++++++++++++ | ||
12 | arch/arm/configs/qmx6_updater_defconfig | 2367 ++++++++++++++++++++++++ | ||
13 | arch/arm/mach-mx6/Kconfig | 35 + | ||
14 | arch/arm/mach-mx6/Makefile | 2 + | ||
15 | arch/arm/mach-mx6/board-mx6dl_qmx6.h | 199 ++ | ||
16 | arch/arm/mach-mx6/board-mx6q_qmx6.c | 979 ++++++++++ | ||
17 | arch/arm/mach-mx6/board-mx6q_qmx6.h | 199 ++ | ||
18 | arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c | 422 +++++ | ||
19 | arch/arm/plat-mxc/include/mach/esdhc.h | 1 + | ||
20 | arch/arm/tools/mach-types | 1 + | ||
21 | drivers/mmc/host/sdhci-esdhc-imx.c | 5 +- | ||
22 | drivers/net/fec.c | 32 +- | ||
23 | drivers/net/phy/micrel.c | 23 + | ||
24 | include/linux/micrel_phy.h | 1 + | ||
25 | sound/soc/imx/Kconfig | 2 +- | ||
26 | sound/soc/imx/imx-sgtl5000.c | 2 +- | ||
27 | 16 files changed, 6910 insertions(+), 19 deletions(-) | ||
28 | create mode 100644 arch/arm/configs/qmx6_defconfig | ||
29 | create mode 100644 arch/arm/configs/qmx6_updater_defconfig | ||
30 | create mode 100644 arch/arm/mach-mx6/board-mx6dl_qmx6.h | ||
31 | create mode 100644 arch/arm/mach-mx6/board-mx6q_qmx6.c | ||
32 | create mode 100644 arch/arm/mach-mx6/board-mx6q_qmx6.h | ||
33 | create mode 100644 arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c | ||
34 | |||
35 | diff --git a/arch/arm/configs/qmx6_defconfig b/arch/arm/configs/qmx6_defconfig | ||
36 | new file mode 100644 | ||
37 | index 0000000..9aeb4a5 | ||
38 | --- /dev/null | ||
39 | +++ b/arch/arm/configs/qmx6_defconfig | ||
40 | @@ -0,0 +1,2659 @@ | ||
41 | +# | ||
42 | +# Automatically generated make config: don't edit | ||
43 | +# Linux/arm 3.0.15 Kernel Configuration | ||
44 | +# | ||
45 | +CONFIG_ARM=y | ||
46 | +CONFIG_HAVE_PWM=y | ||
47 | +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
48 | +CONFIG_HAVE_SCHED_CLOCK=y | ||
49 | +CONFIG_GENERIC_GPIO=y | ||
50 | +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set | ||
51 | +CONFIG_GENERIC_CLOCKEVENTS=y | ||
52 | +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y | ||
53 | +CONFIG_KTIME_SCALAR=y | ||
54 | +CONFIG_HAVE_PROC_CPU=y | ||
55 | +CONFIG_STACKTRACE_SUPPORT=y | ||
56 | +CONFIG_LOCKDEP_SUPPORT=y | ||
57 | +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
58 | +CONFIG_HARDIRQS_SW_RESEND=y | ||
59 | +CONFIG_GENERIC_IRQ_PROBE=y | ||
60 | +CONFIG_GENERIC_LOCKBREAK=y | ||
61 | +CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
62 | +CONFIG_ARCH_HAS_CPUFREQ=y | ||
63 | +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
64 | +CONFIG_GENERIC_HWEIGHT=y | ||
65 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
66 | +CONFIG_ZONE_DMA=y | ||
67 | +CONFIG_NEED_DMA_MAP_STATE=y | ||
68 | +CONFIG_FIQ=y | ||
69 | +CONFIG_VECTORS_BASE=0xffff0000 | ||
70 | +# CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
71 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
72 | +CONFIG_HAVE_IRQ_WORK=y | ||
73 | +CONFIG_IRQ_WORK=y | ||
74 | + | ||
75 | +# | ||
76 | +# General setup | ||
77 | +# | ||
78 | +CONFIG_EXPERIMENTAL=y | ||
79 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
80 | +CONFIG_CROSS_COMPILE="" | ||
81 | +CONFIG_LOCALVERSION="" | ||
82 | +CONFIG_LOCALVERSION_AUTO=y | ||
83 | +CONFIG_HAVE_KERNEL_GZIP=y | ||
84 | +CONFIG_HAVE_KERNEL_LZMA=y | ||
85 | +CONFIG_HAVE_KERNEL_LZO=y | ||
86 | +CONFIG_KERNEL_GZIP=y | ||
87 | +# CONFIG_KERNEL_LZMA is not set | ||
88 | +# CONFIG_KERNEL_LZO is not set | ||
89 | +CONFIG_DEFAULT_HOSTNAME="(none)" | ||
90 | +CONFIG_SWAP=y | ||
91 | +CONFIG_SYSVIPC=y | ||
92 | +CONFIG_SYSVIPC_SYSCTL=y | ||
93 | +# CONFIG_POSIX_MQUEUE is not set | ||
94 | +# CONFIG_BSD_PROCESS_ACCT is not set | ||
95 | +# CONFIG_FHANDLE is not set | ||
96 | +# CONFIG_TASKSTATS is not set | ||
97 | +# CONFIG_AUDIT is not set | ||
98 | +CONFIG_HAVE_GENERIC_HARDIRQS=y | ||
99 | + | ||
100 | +# | ||
101 | +# IRQ subsystem | ||
102 | +# | ||
103 | +CONFIG_GENERIC_HARDIRQS=y | ||
104 | +CONFIG_HAVE_SPARSE_IRQ=y | ||
105 | +CONFIG_GENERIC_IRQ_SHOW=y | ||
106 | +# CONFIG_SPARSE_IRQ is not set | ||
107 | + | ||
108 | +# | ||
109 | +# RCU Subsystem | ||
110 | +# | ||
111 | +CONFIG_TREE_PREEMPT_RCU=y | ||
112 | +CONFIG_PREEMPT_RCU=y | ||
113 | +# CONFIG_RCU_TRACE is not set | ||
114 | +CONFIG_RCU_FANOUT=32 | ||
115 | +# CONFIG_RCU_FANOUT_EXACT is not set | ||
116 | +# CONFIG_TREE_RCU_TRACE is not set | ||
117 | +# CONFIG_RCU_BOOST is not set | ||
118 | +CONFIG_IKCONFIG=y | ||
119 | +CONFIG_IKCONFIG_PROC=y | ||
120 | +CONFIG_LOG_BUF_SHIFT=14 | ||
121 | +# CONFIG_CGROUPS is not set | ||
122 | +# CONFIG_NAMESPACES is not set | ||
123 | +# CONFIG_SCHED_AUTOGROUP is not set | ||
124 | +# CONFIG_SYSFS_DEPRECATED is not set | ||
125 | +# CONFIG_RELAY is not set | ||
126 | +CONFIG_BLK_DEV_INITRD=y | ||
127 | +CONFIG_INITRAMFS_SOURCE="" | ||
128 | +CONFIG_RD_GZIP=y | ||
129 | +# CONFIG_RD_BZIP2 is not set | ||
130 | +# CONFIG_RD_LZMA is not set | ||
131 | +# CONFIG_RD_XZ is not set | ||
132 | +# CONFIG_RD_LZO is not set | ||
133 | +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
134 | +CONFIG_SYSCTL=y | ||
135 | +CONFIG_ANON_INODES=y | ||
136 | +CONFIG_EXPERT=y | ||
137 | +CONFIG_UID16=y | ||
138 | +CONFIG_SYSCTL_SYSCALL=y | ||
139 | +CONFIG_KALLSYMS=y | ||
140 | +CONFIG_HOTPLUG=y | ||
141 | +CONFIG_PRINTK=y | ||
142 | +CONFIG_BUG=y | ||
143 | +CONFIG_ELF_CORE=y | ||
144 | +CONFIG_BASE_FULL=y | ||
145 | +CONFIG_FUTEX=y | ||
146 | +CONFIG_EPOLL=y | ||
147 | +CONFIG_SIGNALFD=y | ||
148 | +CONFIG_TIMERFD=y | ||
149 | +CONFIG_EVENTFD=y | ||
150 | +CONFIG_SHMEM=y | ||
151 | +CONFIG_AIO=y | ||
152 | +CONFIG_EMBEDDED=y | ||
153 | +CONFIG_HAVE_PERF_EVENTS=y | ||
154 | +CONFIG_PERF_USE_VMALLOC=y | ||
155 | + | ||
156 | +# | ||
157 | +# Kernel Performance Events And Counters | ||
158 | +# | ||
159 | +CONFIG_PERF_EVENTS=y | ||
160 | +# CONFIG_PERF_COUNTERS is not set | ||
161 | +CONFIG_VM_EVENT_COUNTERS=y | ||
162 | +CONFIG_SLUB_DEBUG=y | ||
163 | +CONFIG_COMPAT_BRK=y | ||
164 | +# CONFIG_SLAB is not set | ||
165 | +CONFIG_SLUB=y | ||
166 | +# CONFIG_SLOB is not set | ||
167 | +# CONFIG_PROFILING is not set | ||
168 | +CONFIG_HAVE_OPROFILE=y | ||
169 | +# CONFIG_KPROBES is not set | ||
170 | +CONFIG_HAVE_KPROBES=y | ||
171 | +CONFIG_HAVE_KRETPROBES=y | ||
172 | +CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
173 | +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | ||
174 | +CONFIG_HAVE_CLK=y | ||
175 | +CONFIG_HAVE_DMA_API_DEBUG=y | ||
176 | +CONFIG_HAVE_HW_BREAKPOINT=y | ||
177 | + | ||
178 | +# | ||
179 | +# GCOV-based kernel profiling | ||
180 | +# | ||
181 | +# CONFIG_GCOV_KERNEL is not set | ||
182 | +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
183 | +CONFIG_SLABINFO=y | ||
184 | +CONFIG_RT_MUTEXES=y | ||
185 | +CONFIG_BASE_SMALL=0 | ||
186 | +CONFIG_MODULES=y | ||
187 | +# CONFIG_MODULE_FORCE_LOAD is not set | ||
188 | +CONFIG_MODULE_UNLOAD=y | ||
189 | +CONFIG_MODULE_FORCE_UNLOAD=y | ||
190 | +CONFIG_MODVERSIONS=y | ||
191 | +# CONFIG_MODULE_SRCVERSION_ALL is not set | ||
192 | +CONFIG_STOP_MACHINE=y | ||
193 | +CONFIG_BLOCK=y | ||
194 | +CONFIG_LBDAF=y | ||
195 | +# CONFIG_BLK_DEV_BSG is not set | ||
196 | +# CONFIG_BLK_DEV_INTEGRITY is not set | ||
197 | + | ||
198 | +# | ||
199 | +# IO Schedulers | ||
200 | +# | ||
201 | +CONFIG_IOSCHED_NOOP=y | ||
202 | +CONFIG_IOSCHED_DEADLINE=y | ||
203 | +CONFIG_IOSCHED_CFQ=y | ||
204 | +# CONFIG_DEFAULT_DEADLINE is not set | ||
205 | +CONFIG_DEFAULT_CFQ=y | ||
206 | +# CONFIG_DEFAULT_NOOP is not set | ||
207 | +CONFIG_DEFAULT_IOSCHED="cfq" | ||
208 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
209 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
210 | +# CONFIG_INLINE_SPIN_LOCK is not set | ||
211 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
212 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
213 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
214 | +# CONFIG_INLINE_SPIN_UNLOCK is not set | ||
215 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
216 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
217 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
218 | +# CONFIG_INLINE_READ_TRYLOCK is not set | ||
219 | +# CONFIG_INLINE_READ_LOCK is not set | ||
220 | +# CONFIG_INLINE_READ_LOCK_BH is not set | ||
221 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
222 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
223 | +# CONFIG_INLINE_READ_UNLOCK is not set | ||
224 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
225 | +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
226 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
227 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
228 | +# CONFIG_INLINE_WRITE_LOCK is not set | ||
229 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
230 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
231 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
232 | +# CONFIG_INLINE_WRITE_UNLOCK is not set | ||
233 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
234 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
235 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
236 | +CONFIG_MUTEX_SPIN_ON_OWNER=y | ||
237 | +CONFIG_FREEZER=y | ||
238 | + | ||
239 | +# | ||
240 | +# System Type | ||
241 | +# | ||
242 | +CONFIG_MMU=y | ||
243 | +# CONFIG_ARCH_INTEGRATOR is not set | ||
244 | +# CONFIG_ARCH_REALVIEW is not set | ||
245 | +# CONFIG_ARCH_VERSATILE is not set | ||
246 | +# CONFIG_ARCH_VEXPRESS is not set | ||
247 | +# CONFIG_ARCH_AT91 is not set | ||
248 | +# CONFIG_ARCH_BCMRING is not set | ||
249 | +# CONFIG_ARCH_CLPS711X is not set | ||
250 | +# CONFIG_ARCH_CNS3XXX is not set | ||
251 | +# CONFIG_ARCH_GEMINI is not set | ||
252 | +# CONFIG_ARCH_EBSA110 is not set | ||
253 | +# CONFIG_ARCH_EP93XX is not set | ||
254 | +# CONFIG_ARCH_FOOTBRIDGE is not set | ||
255 | +CONFIG_ARCH_MXC=y | ||
256 | +# CONFIG_ARCH_MXS is not set | ||
257 | +# CONFIG_ARCH_NETX is not set | ||
258 | +# CONFIG_ARCH_H720X is not set | ||
259 | +# CONFIG_ARCH_IOP13XX is not set | ||
260 | +# CONFIG_ARCH_IOP32X is not set | ||
261 | +# CONFIG_ARCH_IOP33X is not set | ||
262 | +# CONFIG_ARCH_IXP23XX is not set | ||
263 | +# CONFIG_ARCH_IXP2000 is not set | ||
264 | +# CONFIG_ARCH_IXP4XX is not set | ||
265 | +# CONFIG_ARCH_DOVE is not set | ||
266 | +# CONFIG_ARCH_KIRKWOOD is not set | ||
267 | +# CONFIG_ARCH_LOKI is not set | ||
268 | +# CONFIG_ARCH_LPC32XX is not set | ||
269 | +# CONFIG_ARCH_MV78XX0 is not set | ||
270 | +# CONFIG_ARCH_ORION5X is not set | ||
271 | +# CONFIG_ARCH_MMP is not set | ||
272 | +# CONFIG_ARCH_KS8695 is not set | ||
273 | +# CONFIG_ARCH_W90X900 is not set | ||
274 | +# CONFIG_ARCH_NUC93X is not set | ||
275 | +# CONFIG_ARCH_TEGRA is not set | ||
276 | +# CONFIG_ARCH_PNX4008 is not set | ||
277 | +# CONFIG_ARCH_PXA is not set | ||
278 | +# CONFIG_ARCH_MSM is not set | ||
279 | +# CONFIG_ARCH_SHMOBILE is not set | ||
280 | +# CONFIG_ARCH_RPC is not set | ||
281 | +# CONFIG_ARCH_SA1100 is not set | ||
282 | +# CONFIG_ARCH_S3C2410 is not set | ||
283 | +# CONFIG_ARCH_S3C64XX is not set | ||
284 | +# CONFIG_ARCH_S5P64X0 is not set | ||
285 | +# CONFIG_ARCH_S5PC100 is not set | ||
286 | +# CONFIG_ARCH_S5PV210 is not set | ||
287 | +# CONFIG_ARCH_EXYNOS4 is not set | ||
288 | +# CONFIG_ARCH_SHARK is not set | ||
289 | +# CONFIG_ARCH_TCC_926 is not set | ||
290 | +# CONFIG_ARCH_U300 is not set | ||
291 | +# CONFIG_ARCH_U8500 is not set | ||
292 | +# CONFIG_ARCH_NOMADIK is not set | ||
293 | +# CONFIG_ARCH_DAVINCI is not set | ||
294 | +# CONFIG_ARCH_OMAP is not set | ||
295 | +# CONFIG_PLAT_SPEAR is not set | ||
296 | +# CONFIG_ARCH_VT8500 is not set | ||
297 | +CONFIG_GPIO_PCA953X=y | ||
298 | +# CONFIG_KEYBOARD_GPIO_POLLED is not set | ||
299 | +CONFIG_IMX_HAVE_PLATFORM_DMA=y | ||
300 | +CONFIG_IMX_HAVE_PLATFORM_FEC=y | ||
301 | +CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y | ||
302 | +CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y | ||
303 | +CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y | ||
304 | +CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y | ||
305 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y | ||
306 | +CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y | ||
307 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y | ||
308 | +CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y | ||
309 | +CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y | ||
310 | +CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y | ||
311 | +CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y | ||
312 | +CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y | ||
313 | +CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y | ||
314 | +CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y | ||
315 | +CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y | ||
316 | +CONFIG_IMX_HAVE_PLATFORM_AHCI=y | ||
317 | +CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y | ||
318 | +CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y | ||
319 | +CONFIG_IMX_HAVE_PLATFORM_LDB=y | ||
320 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y | ||
321 | +CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y | ||
322 | +CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y | ||
323 | +CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y | ||
324 | +CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y | ||
325 | +CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y | ||
326 | +CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y | ||
327 | +CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y | ||
328 | +CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y | ||
329 | +CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y | ||
330 | +CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y | ||
331 | + | ||
332 | +# | ||
333 | +# Freescale MXC Implementations | ||
334 | +# | ||
335 | +# CONFIG_ARCH_MX1 is not set | ||
336 | +# CONFIG_ARCH_MX2 is not set | ||
337 | +# CONFIG_ARCH_MX25 is not set | ||
338 | +# CONFIG_ARCH_MX3 is not set | ||
339 | +# CONFIG_ARCH_MX503 is not set | ||
340 | +# CONFIG_ARCH_MX51 is not set | ||
341 | +CONFIG_ARCH_MX6=y | ||
342 | +CONFIG_ARCH_MX6Q=y | ||
343 | +CONFIG_FORCE_MAX_ZONEORDER=14 | ||
344 | +CONFIG_SOC_IMX6Q=y | ||
345 | +# CONFIG_MACH_MX6Q_ARM2 is not set | ||
346 | +# CONFIG_MACH_MX6Q_SABRELITE is not set | ||
347 | +CONFIG_MACH_MX6Q_QMX6=y | ||
348 | +# CONFIG_MACH_MX6Q_SABRESD is not set | ||
349 | +# CONFIG_MACH_MX6Q_SABREAUTO is not set | ||
350 | + | ||
351 | +# | ||
352 | +# MX6 Options: | ||
353 | +# | ||
354 | +# CONFIG_IMX_PCIE is not set | ||
355 | +CONFIG_ISP1504_MXC=y | ||
356 | +# CONFIG_MXC_IRQ_PRIOR is not set | ||
357 | +CONFIG_MXC_PWM=y | ||
358 | +# CONFIG_MXC_DEBUG_BOARD is not set | ||
359 | +CONFIG_ARCH_MXC_IOMUX_V3=y | ||
360 | +CONFIG_ARCH_MXC_AUDMUX_V2=y | ||
361 | +CONFIG_IRAM_ALLOC=y | ||
362 | +CONFIG_CLK_DEBUG=y | ||
363 | +CONFIG_DMA_ZONE_SIZE=184 | ||
364 | + | ||
365 | +# | ||
366 | +# System MMU | ||
367 | +# | ||
368 | + | ||
369 | +# | ||
370 | +# Processor Type | ||
371 | +# | ||
372 | +CONFIG_CPU_V7=y | ||
373 | +CONFIG_CPU_32v6K=y | ||
374 | +CONFIG_CPU_32v7=y | ||
375 | +CONFIG_CPU_ABRT_EV7=y | ||
376 | +CONFIG_CPU_PABRT_V7=y | ||
377 | +CONFIG_CPU_CACHE_V7=y | ||
378 | +CONFIG_CPU_CACHE_VIPT=y | ||
379 | +CONFIG_CPU_COPY_V6=y | ||
380 | +CONFIG_CPU_TLB_V7=y | ||
381 | +CONFIG_CPU_HAS_ASID=y | ||
382 | +CONFIG_CPU_CP15=y | ||
383 | +CONFIG_CPU_CP15_MMU=y | ||
384 | + | ||
385 | +# | ||
386 | +# Processor Features | ||
387 | +# | ||
388 | +CONFIG_ARM_THUMB=y | ||
389 | +# CONFIG_ARM_THUMBEE is not set | ||
390 | +# CONFIG_SWP_EMULATE is not set | ||
391 | +# CONFIG_CPU_ICACHE_DISABLE is not set | ||
392 | +# CONFIG_CPU_DCACHE_DISABLE is not set | ||
393 | +# CONFIG_CPU_BPREDICT_DISABLE is not set | ||
394 | +CONFIG_OUTER_CACHE=y | ||
395 | +CONFIG_OUTER_CACHE_SYNC=y | ||
396 | +CONFIG_CACHE_L2X0=y | ||
397 | +CONFIG_CACHE_PL310=y | ||
398 | +CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
399 | +CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
400 | +CONFIG_CPU_HAS_PMU=y | ||
401 | +# CONFIG_ARM_ERRATA_430973 is not set | ||
402 | +# CONFIG_ARM_ERRATA_458693 is not set | ||
403 | +# CONFIG_ARM_ERRATA_460075 is not set | ||
404 | +# CONFIG_ARM_ERRATA_742230 is not set | ||
405 | +# CONFIG_ARM_ERRATA_742231 is not set | ||
406 | +# CONFIG_PL310_ERRATA_588369 is not set | ||
407 | +# CONFIG_ARM_ERRATA_720789 is not set | ||
408 | +# CONFIG_PL310_ERRATA_727915 is not set | ||
409 | +CONFIG_ARM_ERRATA_743622=y | ||
410 | +CONFIG_ARM_ERRATA_751472=y | ||
411 | +# CONFIG_ARM_ERRATA_753970 is not set | ||
412 | +CONFIG_ARM_ERRATA_754322=y | ||
413 | +# CONFIG_ARM_ERRATA_754327 is not set | ||
414 | +CONFIG_ARM_GIC=y | ||
415 | + | ||
416 | +# | ||
417 | +# Bus support | ||
418 | +# | ||
419 | +# CONFIG_PCI_SYSCALL is not set | ||
420 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | ||
421 | +# CONFIG_PCCARD is not set | ||
422 | +CONFIG_ARM_ERRATA_764369=y | ||
423 | +# CONFIG_PL310_ERRATA_769419 is not set | ||
424 | + | ||
425 | +# | ||
426 | +# Kernel Features | ||
427 | +# | ||
428 | +CONFIG_TICK_ONESHOT=y | ||
429 | +CONFIG_NO_HZ=y | ||
430 | +CONFIG_HIGH_RES_TIMERS=y | ||
431 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
432 | +CONFIG_SMP=y | ||
433 | +CONFIG_SMP_ON_UP=y | ||
434 | +CONFIG_HAVE_ARM_SCU=y | ||
435 | +CONFIG_HAVE_ARM_TWD=y | ||
436 | +# CONFIG_VMSPLIT_3G is not set | ||
437 | +CONFIG_VMSPLIT_2G=y | ||
438 | +# CONFIG_VMSPLIT_1G is not set | ||
439 | +CONFIG_PAGE_OFFSET=0x80000000 | ||
440 | +CONFIG_NR_CPUS=4 | ||
441 | +CONFIG_HOTPLUG_CPU=y | ||
442 | +CONFIG_LOCAL_TIMERS=y | ||
443 | +# CONFIG_PREEMPT_NONE is not set | ||
444 | +# CONFIG_PREEMPT_VOLUNTARY is not set | ||
445 | +CONFIG_PREEMPT=y | ||
446 | +CONFIG_HZ=100 | ||
447 | +# CONFIG_THUMB2_KERNEL is not set | ||
448 | +CONFIG_AEABI=y | ||
449 | +# CONFIG_OABI_COMPAT is not set | ||
450 | +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
451 | +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
452 | +CONFIG_HAVE_ARCH_PFN_VALID=y | ||
453 | +CONFIG_HIGHMEM=y | ||
454 | +# CONFIG_HIGHPTE is not set | ||
455 | +CONFIG_HW_PERF_EVENTS=y | ||
456 | +CONFIG_SELECT_MEMORY_MODEL=y | ||
457 | +CONFIG_FLATMEM_MANUAL=y | ||
458 | +CONFIG_FLATMEM=y | ||
459 | +CONFIG_FLAT_NODE_MEM_MAP=y | ||
460 | +CONFIG_HAVE_MEMBLOCK=y | ||
461 | +CONFIG_PAGEFLAGS_EXTENDED=y | ||
462 | +CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
463 | +CONFIG_COMPACTION=y | ||
464 | +CONFIG_MIGRATION=y | ||
465 | +# CONFIG_PHYS_ADDR_T_64BIT is not set | ||
466 | +CONFIG_ZONE_DMA_FLAG=1 | ||
467 | +CONFIG_BOUNCE=y | ||
468 | +CONFIG_VIRT_TO_BUS=y | ||
469 | +CONFIG_KSM=y | ||
470 | +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
471 | +# CONFIG_CLEANCACHE is not set | ||
472 | +CONFIG_ALIGNMENT_TRAP=y | ||
473 | +# CONFIG_UACCESS_WITH_MEMCPY is not set | ||
474 | +# CONFIG_SECCOMP is not set | ||
475 | +# CONFIG_CC_STACKPROTECTOR is not set | ||
476 | +# CONFIG_DEPRECATED_PARAM_STRUCT is not set | ||
477 | + | ||
478 | +# | ||
479 | +# Boot options | ||
480 | +# | ||
481 | +# CONFIG_USE_OF is not set | ||
482 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
483 | +CONFIG_ZBOOT_ROM_BSS=0x0 | ||
484 | +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" | ||
485 | +CONFIG_CMDLINE_FROM_BOOTLOADER=y | ||
486 | +# CONFIG_CMDLINE_EXTEND is not set | ||
487 | +# CONFIG_CMDLINE_FORCE is not set | ||
488 | +# CONFIG_XIP_KERNEL is not set | ||
489 | +# CONFIG_KEXEC is not set | ||
490 | +# CONFIG_CRASH_DUMP is not set | ||
491 | +# CONFIG_AUTO_ZRELADDR is not set | ||
492 | + | ||
493 | +# | ||
494 | +# CPU Power Management | ||
495 | +# | ||
496 | + | ||
497 | +# | ||
498 | +# CPU Frequency scaling | ||
499 | +# | ||
500 | +CONFIG_CPU_FREQ=y | ||
501 | +CONFIG_CPU_FREQ_TABLE=y | ||
502 | +CONFIG_CPU_FREQ_STAT=y | ||
503 | +# CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
504 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
505 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
506 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
507 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
508 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
509 | +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y | ||
510 | +# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set | ||
511 | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
512 | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
513 | +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
514 | +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y | ||
515 | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | ||
516 | +CONFIG_CPU_FREQ_IMX=y | ||
517 | +# CONFIG_CPU_IDLE is not set | ||
518 | + | ||
519 | +# | ||
520 | +# Floating point emulation | ||
521 | +# | ||
522 | + | ||
523 | +# | ||
524 | +# At least one emulation must be selected | ||
525 | +# | ||
526 | +CONFIG_VFP=y | ||
527 | +CONFIG_VFPv3=y | ||
528 | +CONFIG_NEON=y | ||
529 | + | ||
530 | +# | ||
531 | +# Userspace binary formats | ||
532 | +# | ||
533 | +CONFIG_BINFMT_ELF=y | ||
534 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
535 | +CONFIG_HAVE_AOUT=y | ||
536 | +# CONFIG_BINFMT_AOUT is not set | ||
537 | +# CONFIG_BINFMT_MISC is not set | ||
538 | + | ||
539 | +# | ||
540 | +# Power management options | ||
541 | +# | ||
542 | +CONFIG_SUSPEND=y | ||
543 | +# CONFIG_PM_TEST_SUSPEND is not set | ||
544 | +CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y | ||
545 | +CONFIG_SUSPEND_FREEZER=y | ||
546 | +CONFIG_PM_SLEEP=y | ||
547 | +CONFIG_PM_SLEEP_SMP=y | ||
548 | +CONFIG_PM_RUNTIME=y | ||
549 | +CONFIG_PM=y | ||
550 | +CONFIG_PM_DEBUG=y | ||
551 | +# CONFIG_PM_ADVANCED_DEBUG is not set | ||
552 | +CONFIG_CAN_PM_TRACE=y | ||
553 | +CONFIG_APM_EMULATION=y | ||
554 | +CONFIG_PM_RUNTIME_CLK=y | ||
555 | +CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
556 | +CONFIG_NET=y | ||
557 | + | ||
558 | +# | ||
559 | +# Networking options | ||
560 | +# | ||
561 | +CONFIG_PACKET=y | ||
562 | +CONFIG_UNIX=y | ||
563 | +CONFIG_XFRM=y | ||
564 | +# CONFIG_XFRM_USER is not set | ||
565 | +# CONFIG_XFRM_SUB_POLICY is not set | ||
566 | +# CONFIG_XFRM_MIGRATE is not set | ||
567 | +# CONFIG_XFRM_STATISTICS is not set | ||
568 | +# CONFIG_NET_KEY is not set | ||
569 | +CONFIG_INET=y | ||
570 | +CONFIG_IP_MULTICAST=y | ||
571 | +# CONFIG_IP_ADVANCED_ROUTER is not set | ||
572 | +CONFIG_IP_PNP=y | ||
573 | +CONFIG_IP_PNP_DHCP=y | ||
574 | +CONFIG_IP_PNP_BOOTP=y | ||
575 | +# CONFIG_IP_PNP_RARP is not set | ||
576 | +# CONFIG_NET_IPIP is not set | ||
577 | +# CONFIG_NET_IPGRE_DEMUX is not set | ||
578 | +# CONFIG_IP_MROUTE is not set | ||
579 | +# CONFIG_ARPD is not set | ||
580 | +# CONFIG_SYN_COOKIES is not set | ||
581 | +# CONFIG_INET_AH is not set | ||
582 | +# CONFIG_INET_ESP is not set | ||
583 | +# CONFIG_INET_IPCOMP is not set | ||
584 | +# CONFIG_INET_XFRM_TUNNEL is not set | ||
585 | +# CONFIG_INET_TUNNEL is not set | ||
586 | +CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
587 | +CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
588 | +CONFIG_INET_XFRM_MODE_BEET=y | ||
589 | +# CONFIG_INET_LRO is not set | ||
590 | +CONFIG_INET_DIAG=y | ||
591 | +CONFIG_INET_TCP_DIAG=y | ||
592 | +# CONFIG_TCP_CONG_ADVANCED is not set | ||
593 | +CONFIG_TCP_CONG_CUBIC=y | ||
594 | +CONFIG_DEFAULT_TCP_CONG="cubic" | ||
595 | +# CONFIG_TCP_MD5SIG is not set | ||
596 | +# CONFIG_IPV6 is not set | ||
597 | +# CONFIG_NETWORK_SECMARK is not set | ||
598 | +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set | ||
599 | +# CONFIG_NETFILTER is not set | ||
600 | +# CONFIG_IP_DCCP is not set | ||
601 | +# CONFIG_IP_SCTP is not set | ||
602 | +# CONFIG_RDS is not set | ||
603 | +# CONFIG_TIPC is not set | ||
604 | +# CONFIG_ATM is not set | ||
605 | +# CONFIG_L2TP is not set | ||
606 | +# CONFIG_BRIDGE is not set | ||
607 | +# CONFIG_NET_DSA is not set | ||
608 | +# CONFIG_VLAN_8021Q is not set | ||
609 | +# CONFIG_DECNET is not set | ||
610 | +# CONFIG_LLC2 is not set | ||
611 | +# CONFIG_IPX is not set | ||
612 | +# CONFIG_ATALK is not set | ||
613 | +# CONFIG_X25 is not set | ||
614 | +# CONFIG_LAPB is not set | ||
615 | +# CONFIG_ECONET is not set | ||
616 | +# CONFIG_WAN_ROUTER is not set | ||
617 | +# CONFIG_PHONET is not set | ||
618 | +# CONFIG_IEEE802154 is not set | ||
619 | +# CONFIG_NET_SCHED is not set | ||
620 | +# CONFIG_DCB is not set | ||
621 | +# CONFIG_BATMAN_ADV is not set | ||
622 | +CONFIG_RPS=y | ||
623 | +CONFIG_RFS_ACCEL=y | ||
624 | +CONFIG_XPS=y | ||
625 | + | ||
626 | +# | ||
627 | +# Network testing | ||
628 | +# | ||
629 | +# CONFIG_NET_PKTGEN is not set | ||
630 | +# CONFIG_HAMRADIO is not set | ||
631 | +CONFIG_CAN=y | ||
632 | +CONFIG_CAN_RAW=y | ||
633 | +CONFIG_CAN_BCM=y | ||
634 | + | ||
635 | +# | ||
636 | +# CAN Device Drivers | ||
637 | +# | ||
638 | +CONFIG_CAN_VCAN=y | ||
639 | +# CONFIG_CAN_SLCAN is not set | ||
640 | +CONFIG_CAN_DEV=y | ||
641 | +CONFIG_CAN_CALC_BITTIMING=y | ||
642 | +# CONFIG_CAN_MCP251X is not set | ||
643 | +CONFIG_HAVE_CAN_FLEXCAN=y | ||
644 | +CONFIG_CAN_FLEXCAN=y | ||
645 | +# CONFIG_CAN_SJA1000 is not set | ||
646 | +# CONFIG_CAN_C_CAN is not set | ||
647 | + | ||
648 | +# | ||
649 | +# CAN USB interfaces | ||
650 | +# | ||
651 | +# CONFIG_CAN_EMS_USB is not set | ||
652 | +# CONFIG_CAN_ESD_USB2 is not set | ||
653 | +# CONFIG_CAN_SOFTING is not set | ||
654 | +# CONFIG_CAN_DEBUG_DEVICES is not set | ||
655 | +# CONFIG_IRDA is not set | ||
656 | +CONFIG_BT=y | ||
657 | +CONFIG_BT_L2CAP=y | ||
658 | +CONFIG_BT_SCO=y | ||
659 | +CONFIG_BT_RFCOMM=y | ||
660 | +CONFIG_BT_RFCOMM_TTY=y | ||
661 | +CONFIG_BT_BNEP=y | ||
662 | +CONFIG_BT_BNEP_MC_FILTER=y | ||
663 | +CONFIG_BT_BNEP_PROTO_FILTER=y | ||
664 | +CONFIG_BT_HIDP=y | ||
665 | + | ||
666 | +# | ||
667 | +# Bluetooth device drivers | ||
668 | +# | ||
669 | +CONFIG_BT_HCIBTUSB=y | ||
670 | +# CONFIG_BT_HCIBTSDIO is not set | ||
671 | +CONFIG_BT_HCIUART=y | ||
672 | +# CONFIG_BT_HCIUART_H4 is not set | ||
673 | +# CONFIG_BT_HCIUART_BCSP is not set | ||
674 | +CONFIG_BT_HCIUART_ATH3K=y | ||
675 | +# CONFIG_BT_HCIUART_LL is not set | ||
676 | +# CONFIG_BT_HCIBCM203X is not set | ||
677 | +# CONFIG_BT_HCIBPA10X is not set | ||
678 | +# CONFIG_BT_HCIBFUSB is not set | ||
679 | +CONFIG_BT_HCIVHCI=y | ||
680 | +# CONFIG_BT_MRVL is not set | ||
681 | +# CONFIG_BT_ATH3K is not set | ||
682 | +# CONFIG_AF_RXRPC is not set | ||
683 | +CONFIG_WIRELESS=y | ||
684 | +CONFIG_WIRELESS_EXT=y | ||
685 | +CONFIG_WEXT_CORE=y | ||
686 | +CONFIG_WEXT_PROC=y | ||
687 | +CONFIG_WEXT_SPY=y | ||
688 | +CONFIG_WEXT_PRIV=y | ||
689 | +CONFIG_CFG80211=y | ||
690 | +# CONFIG_NL80211_TESTMODE is not set | ||
691 | +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
692 | +# CONFIG_CFG80211_REG_DEBUG is not set | ||
693 | +CONFIG_CFG80211_DEFAULT_PS=y | ||
694 | +# CONFIG_CFG80211_DEBUGFS is not set | ||
695 | +# CONFIG_CFG80211_INTERNAL_REGDB is not set | ||
696 | +CONFIG_CFG80211_WEXT=y | ||
697 | +CONFIG_WIRELESS_EXT_SYSFS=y | ||
698 | +CONFIG_LIB80211=y | ||
699 | +CONFIG_LIB80211_CRYPT_WEP=y | ||
700 | +CONFIG_LIB80211_CRYPT_CCMP=y | ||
701 | +CONFIG_LIB80211_CRYPT_TKIP=y | ||
702 | +# CONFIG_LIB80211_DEBUG is not set | ||
703 | +# CONFIG_MAC80211 is not set | ||
704 | +# CONFIG_WIMAX is not set | ||
705 | +CONFIG_RFKILL=y | ||
706 | +CONFIG_RFKILL_INPUT=y | ||
707 | +# CONFIG_RFKILL_REGULATOR is not set | ||
708 | +# CONFIG_RFKILL_GPIO is not set | ||
709 | +# CONFIG_NET_9P is not set | ||
710 | +# CONFIG_CAIF is not set | ||
711 | +# CONFIG_CEPH_LIB is not set | ||
712 | + | ||
713 | +# | ||
714 | +# Device Drivers | ||
715 | +# | ||
716 | + | ||
717 | +# | ||
718 | +# Generic Driver Options | ||
719 | +# | ||
720 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
721 | +# CONFIG_DEVTMPFS is not set | ||
722 | +CONFIG_STANDALONE=y | ||
723 | +CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
724 | +CONFIG_FW_LOADER=y | ||
725 | +CONFIG_FIRMWARE_IN_KERNEL=y | ||
726 | +CONFIG_EXTRA_FIRMWARE="" | ||
727 | +# CONFIG_SYS_HYPERVISOR is not set | ||
728 | +CONFIG_CONNECTOR=y | ||
729 | +CONFIG_PROC_EVENTS=y | ||
730 | +CONFIG_MTD=y | ||
731 | +# CONFIG_MTD_DEBUG is not set | ||
732 | +# CONFIG_MTD_TESTS is not set | ||
733 | +# CONFIG_MTD_REDBOOT_PARTS is not set | ||
734 | +CONFIG_MTD_CMDLINE_PARTS=y | ||
735 | +# CONFIG_MTD_AFS_PARTS is not set | ||
736 | +# CONFIG_MTD_AR7_PARTS is not set | ||
737 | + | ||
738 | +# | ||
739 | +# User Modules And Translation Layers | ||
740 | +# | ||
741 | +CONFIG_MTD_CHAR=y | ||
742 | +CONFIG_MTD_BLKDEVS=y | ||
743 | +CONFIG_MTD_BLOCK=y | ||
744 | +# CONFIG_FTL is not set | ||
745 | +# CONFIG_NFTL is not set | ||
746 | +# CONFIG_INFTL is not set | ||
747 | +# CONFIG_RFD_FTL is not set | ||
748 | +# CONFIG_SSFDC is not set | ||
749 | +# CONFIG_SM_FTL is not set | ||
750 | +# CONFIG_MTD_OOPS is not set | ||
751 | +# CONFIG_MTD_SWAP is not set | ||
752 | + | ||
753 | +# | ||
754 | +# RAM/ROM/Flash chip drivers | ||
755 | +# | ||
756 | +# CONFIG_MTD_CFI is not set | ||
757 | +# CONFIG_MTD_JEDECPROBE is not set | ||
758 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
759 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
760 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
761 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
762 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
763 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
764 | +CONFIG_MTD_CFI_I1=y | ||
765 | +CONFIG_MTD_CFI_I2=y | ||
766 | +# CONFIG_MTD_CFI_I4 is not set | ||
767 | +# CONFIG_MTD_CFI_I8 is not set | ||
768 | +# CONFIG_MTD_RAM is not set | ||
769 | +# CONFIG_MTD_ROM is not set | ||
770 | +# CONFIG_MTD_ABSENT is not set | ||
771 | + | ||
772 | +# | ||
773 | +# Mapping drivers for chip access | ||
774 | +# | ||
775 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
776 | +# CONFIG_MTD_PLATRAM is not set | ||
777 | + | ||
778 | +# | ||
779 | +# Self-contained MTD device drivers | ||
780 | +# | ||
781 | +# CONFIG_MTD_DATAFLASH is not set | ||
782 | +CONFIG_MTD_M25P80=y | ||
783 | +CONFIG_M25PXX_USE_FAST_READ=y | ||
784 | +# CONFIG_MTD_SST25L is not set | ||
785 | +# CONFIG_MTD_SLRAM is not set | ||
786 | +# CONFIG_MTD_PHRAM is not set | ||
787 | +# CONFIG_MTD_MTDRAM is not set | ||
788 | +# CONFIG_MTD_BLOCK2MTD is not set | ||
789 | + | ||
790 | +# | ||
791 | +# Disk-On-Chip Device Drivers | ||
792 | +# | ||
793 | +# CONFIG_MTD_DOC2000 is not set | ||
794 | +# CONFIG_MTD_DOC2001 is not set | ||
795 | +# CONFIG_MTD_DOC2001PLUS is not set | ||
796 | +CONFIG_MTD_NAND_ECC=y | ||
797 | +# CONFIG_MTD_NAND_ECC_SMC is not set | ||
798 | +CONFIG_MTD_NAND=y | ||
799 | +# CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
800 | +# CONFIG_MTD_NAND_ECC_BCH is not set | ||
801 | +# CONFIG_MTD_SM_COMMON is not set | ||
802 | +# CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
803 | +# CONFIG_MTD_NAND_GPIO is not set | ||
804 | +CONFIG_MTD_NAND_IDS=y | ||
805 | +# CONFIG_MTD_NAND_DISKONCHIP is not set | ||
806 | +# CONFIG_MTD_NAND_NANDSIM is not set | ||
807 | +# CONFIG_MTD_NAND_GPMI_NAND is not set | ||
808 | +# CONFIG_MTD_NAND_PLATFORM is not set | ||
809 | +# CONFIG_MTD_ALAUDA is not set | ||
810 | +# CONFIG_MTD_ONENAND is not set | ||
811 | + | ||
812 | +# | ||
813 | +# LPDDR flash memory drivers | ||
814 | +# | ||
815 | +# CONFIG_MTD_LPDDR is not set | ||
816 | +CONFIG_MTD_UBI=y | ||
817 | +CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
818 | +CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
819 | +# CONFIG_MTD_UBI_GLUEBI is not set | ||
820 | +# CONFIG_MTD_UBI_DEBUG is not set | ||
821 | +# CONFIG_PARPORT is not set | ||
822 | +CONFIG_BLK_DEV=y | ||
823 | +# CONFIG_BLK_DEV_COW_COMMON is not set | ||
824 | +CONFIG_BLK_DEV_LOOP=y | ||
825 | +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
826 | +# CONFIG_BLK_DEV_DRBD is not set | ||
827 | +# CONFIG_BLK_DEV_NBD is not set | ||
828 | +# CONFIG_BLK_DEV_UB is not set | ||
829 | +CONFIG_BLK_DEV_RAM=y | ||
830 | +CONFIG_BLK_DEV_RAM_COUNT=16 | ||
831 | +CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
832 | +# CONFIG_BLK_DEV_XIP is not set | ||
833 | +# CONFIG_CDROM_PKTCDVD is not set | ||
834 | +# CONFIG_ATA_OVER_ETH is not set | ||
835 | +# CONFIG_MG_DISK is not set | ||
836 | +# CONFIG_BLK_DEV_RBD is not set | ||
837 | +# CONFIG_SENSORS_LIS3LV02D is not set | ||
838 | +CONFIG_MISC_DEVICES=y | ||
839 | +# CONFIG_AD525X_DPOT is not set | ||
840 | +# CONFIG_INTEL_MID_PTI is not set | ||
841 | +# CONFIG_ICS932S401 is not set | ||
842 | +# CONFIG_ENCLOSURE_SERVICES is not set | ||
843 | +# CONFIG_APDS9802ALS is not set | ||
844 | +# CONFIG_ISL29003 is not set | ||
845 | +# CONFIG_ISL29020 is not set | ||
846 | +# CONFIG_SENSORS_TSL2550 is not set | ||
847 | +# CONFIG_SENSORS_BH1780 is not set | ||
848 | +# CONFIG_SENSORS_BH1770 is not set | ||
849 | +# CONFIG_SENSORS_APDS990X is not set | ||
850 | +# CONFIG_HMC6352 is not set | ||
851 | +# CONFIG_DS1682 is not set | ||
852 | +# CONFIG_TI_DAC7512 is not set | ||
853 | +# CONFIG_BMP085 is not set | ||
854 | +CONFIG_MXS_PERFMON=m | ||
855 | +# CONFIG_C2PORT is not set | ||
856 | + | ||
857 | +# | ||
858 | +# EEPROM support | ||
859 | +# | ||
860 | +# CONFIG_EEPROM_AT24 is not set | ||
861 | +# CONFIG_EEPROM_AT25 is not set | ||
862 | +# CONFIG_EEPROM_LEGACY is not set | ||
863 | +# CONFIG_EEPROM_MAX6875 is not set | ||
864 | +# CONFIG_EEPROM_93CX6 is not set | ||
865 | +# CONFIG_IWMC3200TOP is not set | ||
866 | + | ||
867 | +# | ||
868 | +# Texas Instruments shared transport line discipline | ||
869 | +# | ||
870 | +# CONFIG_TI_ST is not set | ||
871 | +# CONFIG_SENSORS_LIS3_SPI is not set | ||
872 | +# CONFIG_SENSORS_LIS3_I2C is not set | ||
873 | +CONFIG_HAVE_IDE=y | ||
874 | +# CONFIG_IDE is not set | ||
875 | + | ||
876 | +# | ||
877 | +# SCSI device support | ||
878 | +# | ||
879 | +CONFIG_SCSI_MOD=y | ||
880 | +# CONFIG_RAID_ATTRS is not set | ||
881 | +CONFIG_SCSI=y | ||
882 | +CONFIG_SCSI_DMA=y | ||
883 | +# CONFIG_SCSI_TGT is not set | ||
884 | +# CONFIG_SCSI_NETLINK is not set | ||
885 | +CONFIG_SCSI_PROC_FS=y | ||
886 | + | ||
887 | +# | ||
888 | +# SCSI support type (disk, tape, CD-ROM) | ||
889 | +# | ||
890 | +CONFIG_BLK_DEV_SD=y | ||
891 | +# CONFIG_CHR_DEV_ST is not set | ||
892 | +# CONFIG_CHR_DEV_OSST is not set | ||
893 | +# CONFIG_BLK_DEV_SR is not set | ||
894 | +# CONFIG_CHR_DEV_SG is not set | ||
895 | +# CONFIG_CHR_DEV_SCH is not set | ||
896 | +CONFIG_SCSI_MULTI_LUN=y | ||
897 | +# CONFIG_SCSI_CONSTANTS is not set | ||
898 | +# CONFIG_SCSI_LOGGING is not set | ||
899 | +# CONFIG_SCSI_SCAN_ASYNC is not set | ||
900 | +CONFIG_SCSI_WAIT_SCAN=m | ||
901 | + | ||
902 | +# | ||
903 | +# SCSI Transports | ||
904 | +# | ||
905 | +# CONFIG_SCSI_SPI_ATTRS is not set | ||
906 | +# CONFIG_SCSI_FC_ATTRS is not set | ||
907 | +# CONFIG_SCSI_ISCSI_ATTRS is not set | ||
908 | +# CONFIG_SCSI_SAS_ATTRS is not set | ||
909 | +# CONFIG_SCSI_SAS_LIBSAS is not set | ||
910 | +# CONFIG_SCSI_SRP_ATTRS is not set | ||
911 | +CONFIG_SCSI_LOWLEVEL=y | ||
912 | +# CONFIG_ISCSI_TCP is not set | ||
913 | +# CONFIG_ISCSI_BOOT_SYSFS is not set | ||
914 | +# CONFIG_LIBFC is not set | ||
915 | +# CONFIG_LIBFCOE is not set | ||
916 | +# CONFIG_SCSI_DEBUG is not set | ||
917 | +# CONFIG_SCSI_DH is not set | ||
918 | +# CONFIG_SCSI_OSD_INITIATOR is not set | ||
919 | +CONFIG_ATA=y | ||
920 | +# CONFIG_ATA_NONSTANDARD is not set | ||
921 | +CONFIG_ATA_VERBOSE_ERROR=y | ||
922 | +# CONFIG_SATA_PMP is not set | ||
923 | + | ||
924 | +# | ||
925 | +# Controllers with non-SFF native interface | ||
926 | +# | ||
927 | +CONFIG_SATA_AHCI_PLATFORM=y | ||
928 | +CONFIG_ATA_SFF=y | ||
929 | + | ||
930 | +# | ||
931 | +# SFF controllers with custom DMA interface | ||
932 | +# | ||
933 | +CONFIG_ATA_BMDMA=y | ||
934 | + | ||
935 | +# | ||
936 | +# SATA SFF controllers with BMDMA | ||
937 | +# | ||
938 | +# CONFIG_SATA_MV is not set | ||
939 | + | ||
940 | +# | ||
941 | +# PATA SFF controllers with BMDMA | ||
942 | +# | ||
943 | +# CONFIG_PATA_ARASAN_CF is not set | ||
944 | + | ||
945 | +# | ||
946 | +# PIO-only SFF controllers | ||
947 | +# | ||
948 | +# CONFIG_PATA_PLATFORM is not set | ||
949 | + | ||
950 | +# | ||
951 | +# Generic fallback / legacy drivers | ||
952 | +# | ||
953 | +# CONFIG_MD is not set | ||
954 | +# CONFIG_TARGET_CORE is not set | ||
955 | +CONFIG_NETDEVICES=y | ||
956 | +# CONFIG_DUMMY is not set | ||
957 | +# CONFIG_BONDING is not set | ||
958 | +# CONFIG_MACVLAN is not set | ||
959 | +# CONFIG_EQUALIZER is not set | ||
960 | +# CONFIG_TUN is not set | ||
961 | +# CONFIG_VETH is not set | ||
962 | +CONFIG_MII=y | ||
963 | +CONFIG_PHYLIB=y | ||
964 | + | ||
965 | +# | ||
966 | +# MII PHY device drivers | ||
967 | +# | ||
968 | +# CONFIG_MARVELL_PHY is not set | ||
969 | +# CONFIG_DAVICOM_PHY is not set | ||
970 | +# CONFIG_QSEMI_PHY is not set | ||
971 | +# CONFIG_LXT_PHY is not set | ||
972 | +# CONFIG_CICADA_PHY is not set | ||
973 | +# CONFIG_VITESSE_PHY is not set | ||
974 | +# CONFIG_SMSC_PHY is not set | ||
975 | +# CONFIG_BROADCOM_PHY is not set | ||
976 | +# CONFIG_ICPLUS_PHY is not set | ||
977 | +# CONFIG_REALTEK_PHY is not set | ||
978 | +# CONFIG_NATIONAL_PHY is not set | ||
979 | +# CONFIG_STE10XP is not set | ||
980 | +# CONFIG_LSI_ET1011C_PHY is not set | ||
981 | +CONFIG_MICREL_PHY=y | ||
982 | +# CONFIG_FIXED_PHY is not set | ||
983 | +# CONFIG_MDIO_BITBANG is not set | ||
984 | +CONFIG_NET_ETHERNET=y | ||
985 | +# CONFIG_AX88796 is not set | ||
986 | +# CONFIG_SMC91X is not set | ||
987 | +# CONFIG_DM9000 is not set | ||
988 | +# CONFIG_ENC28J60 is not set | ||
989 | +# CONFIG_ETHOC is not set | ||
990 | +# CONFIG_SMC911X is not set | ||
991 | +CONFIG_SMSC911X=y | ||
992 | +# CONFIG_SMSC911X_ARCH_HOOKS is not set | ||
993 | +# CONFIG_DNET is not set | ||
994 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
995 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
996 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | ||
997 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
998 | +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
999 | +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
1000 | +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
1001 | +# CONFIG_B44 is not set | ||
1002 | +# CONFIG_KS8842 is not set | ||
1003 | +# CONFIG_KS8851 is not set | ||
1004 | +# CONFIG_KS8851_MLL is not set | ||
1005 | +CONFIG_FEC=y | ||
1006 | +# CONFIG_FEC_1588 is not set | ||
1007 | +# CONFIG_FTMAC100 is not set | ||
1008 | +# CONFIG_NETDEV_1000 is not set | ||
1009 | +# CONFIG_NETDEV_10000 is not set | ||
1010 | +CONFIG_WLAN=y | ||
1011 | +# CONFIG_USB_ZD1201 is not set | ||
1012 | +# CONFIG_USB_NET_RNDIS_WLAN is not set | ||
1013 | +CONFIG_ATH_COMMON=m | ||
1014 | +# CONFIG_ATH_DEBUG is not set | ||
1015 | +CONFIG_ATH6KL=m | ||
1016 | +# CONFIG_ATH6KL_DEBUG is not set | ||
1017 | +CONFIG_HOSTAP=y | ||
1018 | +# CONFIG_HOSTAP_FIRMWARE is not set | ||
1019 | +# CONFIG_IWM is not set | ||
1020 | +# CONFIG_LIBERTAS is not set | ||
1021 | +# CONFIG_MWIFIEX is not set | ||
1022 | + | ||
1023 | +# | ||
1024 | +# Enable WiMAX (Networking options) to see the WiMAX drivers | ||
1025 | +# | ||
1026 | + | ||
1027 | +# | ||
1028 | +# USB Network Adapters | ||
1029 | +# | ||
1030 | +# CONFIG_USB_CATC is not set | ||
1031 | +# CONFIG_USB_KAWETH is not set | ||
1032 | +# CONFIG_USB_PEGASUS is not set | ||
1033 | +# CONFIG_USB_RTL8150 is not set | ||
1034 | +# CONFIG_USB_USBNET is not set | ||
1035 | +# CONFIG_USB_HSO is not set | ||
1036 | +# CONFIG_USB_IPHETH is not set | ||
1037 | +# CONFIG_WAN is not set | ||
1038 | + | ||
1039 | +# | ||
1040 | +# CAIF transport drivers | ||
1041 | +# | ||
1042 | +# CONFIG_PPP is not set | ||
1043 | +# CONFIG_SLIP is not set | ||
1044 | +# CONFIG_NETCONSOLE is not set | ||
1045 | +# CONFIG_NETPOLL is not set | ||
1046 | +# CONFIG_NET_POLL_CONTROLLER is not set | ||
1047 | +# CONFIG_ISDN is not set | ||
1048 | +# CONFIG_PHONE is not set | ||
1049 | + | ||
1050 | +# | ||
1051 | +# Input device support | ||
1052 | +# | ||
1053 | +CONFIG_INPUT=y | ||
1054 | +# CONFIG_INPUT_FF_MEMLESS is not set | ||
1055 | +CONFIG_INPUT_POLLDEV=y | ||
1056 | +# CONFIG_INPUT_SPARSEKMAP is not set | ||
1057 | + | ||
1058 | +# | ||
1059 | +# Userland interfaces | ||
1060 | +# | ||
1061 | +CONFIG_INPUT_MOUSEDEV=y | ||
1062 | +CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
1063 | +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
1064 | +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
1065 | +# CONFIG_INPUT_JOYDEV is not set | ||
1066 | +CONFIG_INPUT_EVDEV=y | ||
1067 | +# CONFIG_INPUT_EVBUG is not set | ||
1068 | +# CONFIG_INPUT_APMPOWER is not set | ||
1069 | + | ||
1070 | +# | ||
1071 | +# Input Device Drivers | ||
1072 | +# | ||
1073 | +CONFIG_INPUT_KEYBOARD=y | ||
1074 | +# CONFIG_KEYBOARD_ADP5588 is not set | ||
1075 | +# CONFIG_KEYBOARD_ADP5589 is not set | ||
1076 | +CONFIG_KEYBOARD_ATKBD=y | ||
1077 | +# CONFIG_KEYBOARD_QT1070 is not set | ||
1078 | +# CONFIG_KEYBOARD_QT2160 is not set | ||
1079 | +# CONFIG_KEYBOARD_LKKBD is not set | ||
1080 | +CONFIG_KEYBOARD_GPIO=y | ||
1081 | +# CONFIG_KEYBOARD_TCA6416 is not set | ||
1082 | +# CONFIG_KEYBOARD_MATRIX is not set | ||
1083 | +# CONFIG_KEYBOARD_LM8323 is not set | ||
1084 | +# CONFIG_KEYBOARD_MAX7359 is not set | ||
1085 | +# CONFIG_KEYBOARD_MCS is not set | ||
1086 | +# CONFIG_KEYBOARD_MPR121 is not set | ||
1087 | +# CONFIG_KEYBOARD_IMX is not set | ||
1088 | +# CONFIG_KEYBOARD_NEWTON is not set | ||
1089 | +# CONFIG_KEYBOARD_OPENCORES is not set | ||
1090 | +# CONFIG_KEYBOARD_STOWAWAY is not set | ||
1091 | +# CONFIG_KEYBOARD_SUNKBD is not set | ||
1092 | +# CONFIG_KEYBOARD_XTKBD is not set | ||
1093 | +# CONFIG_KEYBOARD_MXC is not set | ||
1094 | +# CONFIG_INPUT_MOUSE is not set | ||
1095 | +# CONFIG_INPUT_JOYSTICK is not set | ||
1096 | +# CONFIG_INPUT_TABLET is not set | ||
1097 | +CONFIG_INPUT_TOUCHSCREEN=y | ||
1098 | +# CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
1099 | +# CONFIG_TOUCHSCREEN_AD7877 is not set | ||
1100 | +# CONFIG_TOUCHSCREEN_AD7879 is not set | ||
1101 | +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set | ||
1102 | +# CONFIG_TOUCHSCREEN_BU21013 is not set | ||
1103 | +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set | ||
1104 | +# CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
1105 | +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
1106 | +# CONFIG_TOUCHSCREEN_EETI is not set | ||
1107 | +CONFIG_TOUCHSCREEN_EGALAX=y | ||
1108 | +# CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
1109 | +# CONFIG_TOUCHSCREEN_GUNZE is not set | ||
1110 | +# CONFIG_TOUCHSCREEN_ELO is not set | ||
1111 | +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
1112 | +# CONFIG_TOUCHSCREEN_MAX11801 is not set | ||
1113 | +# CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
1114 | +# CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
1115 | +# CONFIG_TOUCHSCREEN_INEXIO is not set | ||
1116 | +# CONFIG_TOUCHSCREEN_MK712 is not set | ||
1117 | +# CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
1118 | +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
1119 | +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
1120 | +# CONFIG_TOUCHSCREEN_WM97XX is not set | ||
1121 | +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
1122 | +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
1123 | +# CONFIG_TOUCHSCREEN_TSC2005 is not set | ||
1124 | +# CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
1125 | +# CONFIG_TOUCHSCREEN_W90X900 is not set | ||
1126 | +# CONFIG_TOUCHSCREEN_ST1232 is not set | ||
1127 | +# CONFIG_TOUCHSCREEN_P1003 is not set | ||
1128 | +# CONFIG_TOUCHSCREEN_TPS6507X is not set | ||
1129 | +CONFIG_INPUT_MISC=y | ||
1130 | +# CONFIG_INPUT_AD714X is not set | ||
1131 | +# CONFIG_INPUT_ATI_REMOTE is not set | ||
1132 | +# CONFIG_INPUT_ATI_REMOTE2 is not set | ||
1133 | +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
1134 | +# CONFIG_INPUT_POWERMATE is not set | ||
1135 | +# CONFIG_INPUT_YEALINK is not set | ||
1136 | +# CONFIG_INPUT_CM109 is not set | ||
1137 | +CONFIG_INPUT_UINPUT=y | ||
1138 | +# CONFIG_INPUT_PCF8574 is not set | ||
1139 | +# CONFIG_INPUT_PWM_BEEPER is not set | ||
1140 | +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
1141 | +# CONFIG_INPUT_ADXL34X is not set | ||
1142 | +# CONFIG_INPUT_CMA3000 is not set | ||
1143 | +CONFIG_INPUT_ISL29023=y | ||
1144 | + | ||
1145 | +# | ||
1146 | +# Hardware I/O ports | ||
1147 | +# | ||
1148 | +CONFIG_SERIO=y | ||
1149 | +CONFIG_SERIO_SERPORT=y | ||
1150 | +CONFIG_SERIO_LIBPS2=y | ||
1151 | +# CONFIG_SERIO_RAW is not set | ||
1152 | +# CONFIG_SERIO_ALTERA_PS2 is not set | ||
1153 | +# CONFIG_SERIO_PS2MULT is not set | ||
1154 | +# CONFIG_GAMEPORT is not set | ||
1155 | + | ||
1156 | +# | ||
1157 | +# Character devices | ||
1158 | +# | ||
1159 | +CONFIG_VT=y | ||
1160 | +CONFIG_CONSOLE_TRANSLATIONS=y | ||
1161 | +CONFIG_VT_CONSOLE=y | ||
1162 | +CONFIG_HW_CONSOLE=y | ||
1163 | +# CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
1164 | +CONFIG_UNIX98_PTYS=y | ||
1165 | +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
1166 | +CONFIG_LEGACY_PTYS=y | ||
1167 | +CONFIG_LEGACY_PTY_COUNT=256 | ||
1168 | +# CONFIG_SERIAL_NONSTANDARD is not set | ||
1169 | +# CONFIG_N_GSM is not set | ||
1170 | +# CONFIG_TRACE_SINK is not set | ||
1171 | +CONFIG_DEVKMEM=y | ||
1172 | + | ||
1173 | +# | ||
1174 | +# Serial drivers | ||
1175 | +# | ||
1176 | +# CONFIG_SERIAL_8250 is not set | ||
1177 | + | ||
1178 | +# | ||
1179 | +# Non-8250 serial port support | ||
1180 | +# | ||
1181 | +# CONFIG_SERIAL_MAX3100 is not set | ||
1182 | +# CONFIG_SERIAL_MAX3107 is not set | ||
1183 | +CONFIG_SERIAL_IMX=y | ||
1184 | +CONFIG_SERIAL_IMX_CONSOLE=y | ||
1185 | +CONFIG_SERIAL_CORE=y | ||
1186 | +CONFIG_SERIAL_CORE_CONSOLE=y | ||
1187 | +# CONFIG_SERIAL_TIMBERDALE is not set | ||
1188 | +# CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
1189 | +# CONFIG_SERIAL_ALTERA_UART is not set | ||
1190 | +# CONFIG_SERIAL_IFX6X60 is not set | ||
1191 | +# CONFIG_SERIAL_XILINX_PS_UART is not set | ||
1192 | +# CONFIG_TTY_PRINTK is not set | ||
1193 | +CONFIG_FSL_OTP=y | ||
1194 | +# CONFIG_HVC_DCC is not set | ||
1195 | +# CONFIG_IPMI_HANDLER is not set | ||
1196 | +CONFIG_HW_RANDOM=y | ||
1197 | +# CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
1198 | +# CONFIG_R3964 is not set | ||
1199 | +# CONFIG_RAW_DRIVER is not set | ||
1200 | +# CONFIG_TCG_TPM is not set | ||
1201 | +# CONFIG_RAMOOPS is not set | ||
1202 | +CONFIG_MXS_VIIM=y | ||
1203 | +CONFIG_I2C=y | ||
1204 | +CONFIG_I2C_BOARDINFO=y | ||
1205 | +CONFIG_I2C_COMPAT=y | ||
1206 | +CONFIG_I2C_CHARDEV=y | ||
1207 | +# CONFIG_I2C_MUX is not set | ||
1208 | +CONFIG_I2C_HELPER_AUTO=y | ||
1209 | + | ||
1210 | +# | ||
1211 | +# I2C Hardware Bus support | ||
1212 | +# | ||
1213 | + | ||
1214 | +# | ||
1215 | +# I2C system bus drivers (mostly embedded / system-on-chip) | ||
1216 | +# | ||
1217 | +# CONFIG_I2C_DESIGNWARE is not set | ||
1218 | +# CONFIG_I2C_GPIO is not set | ||
1219 | +CONFIG_I2C_IMX=y | ||
1220 | +# CONFIG_I2C_OCORES is not set | ||
1221 | +# CONFIG_I2C_PCA_PLATFORM is not set | ||
1222 | +# CONFIG_I2C_PXA_PCI is not set | ||
1223 | +# CONFIG_I2C_SIMTEC is not set | ||
1224 | +# CONFIG_I2C_XILINX is not set | ||
1225 | + | ||
1226 | +# | ||
1227 | +# External I2C/SMBus adapter drivers | ||
1228 | +# | ||
1229 | +# CONFIG_I2C_DIOLAN_U2C is not set | ||
1230 | +# CONFIG_I2C_PARPORT_LIGHT is not set | ||
1231 | +# CONFIG_I2C_TAOS_EVM is not set | ||
1232 | +# CONFIG_I2C_TINY_USB is not set | ||
1233 | + | ||
1234 | +# | ||
1235 | +# Other I2C/SMBus bus drivers | ||
1236 | +# | ||
1237 | +# CONFIG_I2C_STUB is not set | ||
1238 | +# CONFIG_I2C_DEBUG_CORE is not set | ||
1239 | +# CONFIG_I2C_DEBUG_ALGO is not set | ||
1240 | +# CONFIG_I2C_DEBUG_BUS is not set | ||
1241 | +CONFIG_SPI=y | ||
1242 | +CONFIG_SPI_MASTER=y | ||
1243 | + | ||
1244 | +# | ||
1245 | +# SPI Master Controller Drivers | ||
1246 | +# | ||
1247 | +# CONFIG_SPI_ALTERA is not set | ||
1248 | +CONFIG_SPI_BITBANG=y | ||
1249 | +# CONFIG_SPI_GPIO is not set | ||
1250 | +CONFIG_SPI_IMX_VER_2_3=y | ||
1251 | +CONFIG_SPI_IMX=y | ||
1252 | +# CONFIG_SPI_OC_TINY is not set | ||
1253 | +# CONFIG_SPI_PXA2XX_PCI is not set | ||
1254 | +# CONFIG_SPI_XILINX is not set | ||
1255 | +# CONFIG_SPI_DESIGNWARE is not set | ||
1256 | + | ||
1257 | +# | ||
1258 | +# SPI Protocol Masters | ||
1259 | +# | ||
1260 | +# CONFIG_SPI_SPIDEV is not set | ||
1261 | +# CONFIG_SPI_TLE62X0 is not set | ||
1262 | + | ||
1263 | +# | ||
1264 | +# PPS support | ||
1265 | +# | ||
1266 | +# CONFIG_PPS is not set | ||
1267 | + | ||
1268 | +# | ||
1269 | +# PPS generators support | ||
1270 | +# | ||
1271 | + | ||
1272 | +# | ||
1273 | +# PTP clock support | ||
1274 | +# | ||
1275 | + | ||
1276 | +# | ||
1277 | +# Enable Device Drivers -> PPS to see the PTP clock options. | ||
1278 | +# | ||
1279 | +CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
1280 | +CONFIG_GPIOLIB=y | ||
1281 | +CONFIG_GPIO_SYSFS=y | ||
1282 | + | ||
1283 | +# | ||
1284 | +# Memory mapped GPIO drivers: | ||
1285 | +# | ||
1286 | +# CONFIG_GPIO_BASIC_MMIO is not set | ||
1287 | +# CONFIG_GPIO_IT8761E is not set | ||
1288 | + | ||
1289 | +# | ||
1290 | +# I2C GPIO expanders: | ||
1291 | +# | ||
1292 | +# CONFIG_GPIO_MAX7300 is not set | ||
1293 | +# CONFIG_GPIO_MAX732X is not set | ||
1294 | +# CONFIG_GPIO_PCA953X_IRQ is not set | ||
1295 | +# CONFIG_GPIO_PCF857X is not set | ||
1296 | +# CONFIG_GPIO_SX150X is not set | ||
1297 | +# CONFIG_GPIO_WM8994 is not set | ||
1298 | +# CONFIG_GPIO_ADP5588 is not set | ||
1299 | + | ||
1300 | +# | ||
1301 | +# PCI GPIO expanders: | ||
1302 | +# | ||
1303 | + | ||
1304 | +# | ||
1305 | +# SPI GPIO expanders: | ||
1306 | +# | ||
1307 | +# CONFIG_GPIO_MAX7301 is not set | ||
1308 | +# CONFIG_GPIO_MCP23S08 is not set | ||
1309 | +# CONFIG_GPIO_MC33880 is not set | ||
1310 | +# CONFIG_GPIO_74X164 is not set | ||
1311 | + | ||
1312 | +# | ||
1313 | +# AC97 GPIO expanders: | ||
1314 | +# | ||
1315 | + | ||
1316 | +# | ||
1317 | +# MODULbus GPIO expanders: | ||
1318 | +# | ||
1319 | +# CONFIG_W1 is not set | ||
1320 | +CONFIG_POWER_SUPPLY=y | ||
1321 | +# CONFIG_POWER_SUPPLY_DEBUG is not set | ||
1322 | +# CONFIG_PDA_POWER is not set | ||
1323 | +# CONFIG_APM_POWER is not set | ||
1324 | +# CONFIG_TEST_POWER is not set | ||
1325 | +# CONFIG_BATTERY_DS2780 is not set | ||
1326 | +# CONFIG_BATTERY_DS2782 is not set | ||
1327 | +# CONFIG_BATTERY_BQ20Z75 is not set | ||
1328 | +# CONFIG_BATTERY_BQ27x00 is not set | ||
1329 | +# CONFIG_BATTERY_MAX17040 is not set | ||
1330 | +# CONFIG_BATTERY_MAX17042 is not set | ||
1331 | +# CONFIG_CHARGER_ISP1704 is not set | ||
1332 | +CONFIG_CHARGER_MAX8903=y | ||
1333 | +# CONFIG_CHARGER_GPIO is not set | ||
1334 | +CONFIG_HWMON=y | ||
1335 | +# CONFIG_HWMON_VID is not set | ||
1336 | +# CONFIG_HWMON_DEBUG_CHIP is not set | ||
1337 | + | ||
1338 | +# | ||
1339 | +# Native drivers | ||
1340 | +# | ||
1341 | +# CONFIG_SENSORS_AD7414 is not set | ||
1342 | +# CONFIG_SENSORS_AD7418 is not set | ||
1343 | +# CONFIG_SENSORS_ADCXX is not set | ||
1344 | +# CONFIG_SENSORS_ADM1021 is not set | ||
1345 | +# CONFIG_SENSORS_ADM1025 is not set | ||
1346 | +# CONFIG_SENSORS_ADM1026 is not set | ||
1347 | +# CONFIG_SENSORS_ADM1029 is not set | ||
1348 | +# CONFIG_SENSORS_ADM1031 is not set | ||
1349 | +# CONFIG_SENSORS_ADM9240 is not set | ||
1350 | +# CONFIG_SENSORS_ADT7411 is not set | ||
1351 | +# CONFIG_SENSORS_ADT7462 is not set | ||
1352 | +# CONFIG_SENSORS_ADT7470 is not set | ||
1353 | +# CONFIG_SENSORS_ADT7475 is not set | ||
1354 | +# CONFIG_SENSORS_ASC7621 is not set | ||
1355 | +# CONFIG_SENSORS_ATXP1 is not set | ||
1356 | +# CONFIG_SENSORS_DS620 is not set | ||
1357 | +# CONFIG_SENSORS_DS1621 is not set | ||
1358 | +# CONFIG_SENSORS_F71805F is not set | ||
1359 | +# CONFIG_SENSORS_F71882FG is not set | ||
1360 | +# CONFIG_SENSORS_F75375S is not set | ||
1361 | +# CONFIG_SENSORS_G760A is not set | ||
1362 | +# CONFIG_SENSORS_GL518SM is not set | ||
1363 | +# CONFIG_SENSORS_GL520SM is not set | ||
1364 | +# CONFIG_SENSORS_GPIO_FAN is not set | ||
1365 | +# CONFIG_SENSORS_IT87 is not set | ||
1366 | +# CONFIG_SENSORS_JC42 is not set | ||
1367 | +# CONFIG_SENSORS_LINEAGE is not set | ||
1368 | +# CONFIG_SENSORS_LM63 is not set | ||
1369 | +# CONFIG_SENSORS_LM70 is not set | ||
1370 | +# CONFIG_SENSORS_LM73 is not set | ||
1371 | +# CONFIG_SENSORS_LM75 is not set | ||
1372 | +# CONFIG_SENSORS_LM77 is not set | ||
1373 | +# CONFIG_SENSORS_LM78 is not set | ||
1374 | +# CONFIG_SENSORS_LM80 is not set | ||
1375 | +# CONFIG_SENSORS_LM83 is not set | ||
1376 | +# CONFIG_SENSORS_LM85 is not set | ||
1377 | +# CONFIG_SENSORS_LM87 is not set | ||
1378 | +# CONFIG_SENSORS_LM90 is not set | ||
1379 | +# CONFIG_SENSORS_LM92 is not set | ||
1380 | +# CONFIG_SENSORS_LM93 is not set | ||
1381 | +# CONFIG_SENSORS_LTC4151 is not set | ||
1382 | +# CONFIG_SENSORS_LTC4215 is not set | ||
1383 | +# CONFIG_SENSORS_LTC4245 is not set | ||
1384 | +# CONFIG_SENSORS_LTC4261 is not set | ||
1385 | +# CONFIG_SENSORS_LM95241 is not set | ||
1386 | +# CONFIG_SENSORS_MAX1111 is not set | ||
1387 | +# CONFIG_SENSORS_MAX16065 is not set | ||
1388 | +# CONFIG_SENSORS_MAX1619 is not set | ||
1389 | +# CONFIG_SENSORS_MAX6639 is not set | ||
1390 | +# CONFIG_SENSORS_MAX6642 is not set | ||
1391 | +# CONFIG_SENSORS_MAX17135 is not set | ||
1392 | +# CONFIG_SENSORS_MAX6650 is not set | ||
1393 | +# CONFIG_SENSORS_PC87360 is not set | ||
1394 | +# CONFIG_SENSORS_PC87427 is not set | ||
1395 | +# CONFIG_SENSORS_PCF8591 is not set | ||
1396 | +# CONFIG_PMBUS is not set | ||
1397 | +# CONFIG_SENSORS_SHT15 is not set | ||
1398 | +# CONFIG_SENSORS_SHT21 is not set | ||
1399 | +# CONFIG_SENSORS_SMM665 is not set | ||
1400 | +# CONFIG_SENSORS_DME1737 is not set | ||
1401 | +# CONFIG_SENSORS_EMC1403 is not set | ||
1402 | +# CONFIG_SENSORS_EMC2103 is not set | ||
1403 | +# CONFIG_SENSORS_EMC6W201 is not set | ||
1404 | +# CONFIG_SENSORS_SMSC47M1 is not set | ||
1405 | +# CONFIG_SENSORS_SMSC47M192 is not set | ||
1406 | +# CONFIG_SENSORS_SMSC47B397 is not set | ||
1407 | +# CONFIG_SENSORS_SCH5627 is not set | ||
1408 | +# CONFIG_SENSORS_ADS1015 is not set | ||
1409 | +# CONFIG_SENSORS_ADS7828 is not set | ||
1410 | +# CONFIG_SENSORS_ADS7871 is not set | ||
1411 | +# CONFIG_SENSORS_AMC6821 is not set | ||
1412 | +# CONFIG_SENSORS_THMC50 is not set | ||
1413 | +# CONFIG_SENSORS_TMP102 is not set | ||
1414 | +# CONFIG_SENSORS_TMP401 is not set | ||
1415 | +# CONFIG_SENSORS_TMP421 is not set | ||
1416 | +# CONFIG_SENSORS_VT1211 is not set | ||
1417 | +# CONFIG_SENSORS_W83781D is not set | ||
1418 | +# CONFIG_SENSORS_W83791D is not set | ||
1419 | +# CONFIG_SENSORS_W83792D is not set | ||
1420 | +# CONFIG_SENSORS_W83793 is not set | ||
1421 | +# CONFIG_SENSORS_W83795 is not set | ||
1422 | +# CONFIG_SENSORS_W83L785TS is not set | ||
1423 | +# CONFIG_SENSORS_W83L786NG is not set | ||
1424 | +# CONFIG_SENSORS_W83627HF is not set | ||
1425 | +# CONFIG_SENSORS_W83627EHF is not set | ||
1426 | +CONFIG_SENSORS_MAG3110=y | ||
1427 | +# CONFIG_MXC_MMA8450 is not set | ||
1428 | +CONFIG_MXC_MMA8451=y | ||
1429 | +CONFIG_THERMAL=y | ||
1430 | +# CONFIG_THERMAL_HWMON is not set | ||
1431 | +CONFIG_WATCHDOG=y | ||
1432 | +CONFIG_WATCHDOG_NOWAYOUT=y | ||
1433 | + | ||
1434 | +# | ||
1435 | +# Watchdog Device Drivers | ||
1436 | +# | ||
1437 | +# CONFIG_SOFT_WATCHDOG is not set | ||
1438 | +# CONFIG_MPCORE_WATCHDOG is not set | ||
1439 | +# CONFIG_MAX63XX_WATCHDOG is not set | ||
1440 | +CONFIG_IMX2_WDT=y | ||
1441 | + | ||
1442 | +# | ||
1443 | +# USB-based Watchdog Cards | ||
1444 | +# | ||
1445 | +# CONFIG_USBPCWATCHDOG is not set | ||
1446 | +CONFIG_SSB_POSSIBLE=y | ||
1447 | + | ||
1448 | +# | ||
1449 | +# Sonics Silicon Backplane | ||
1450 | +# | ||
1451 | +# CONFIG_SSB is not set | ||
1452 | +CONFIG_BCMA_POSSIBLE=y | ||
1453 | + | ||
1454 | +# | ||
1455 | +# Broadcom specific AMBA | ||
1456 | +# | ||
1457 | +# CONFIG_BCMA is not set | ||
1458 | +CONFIG_MFD_SUPPORT=y | ||
1459 | +CONFIG_MFD_CORE=y | ||
1460 | +# CONFIG_MFD_88PM860X is not set | ||
1461 | +# CONFIG_MFD_SM501 is not set | ||
1462 | +# CONFIG_MFD_ASIC3 is not set | ||
1463 | +# CONFIG_HTC_EGPIO is not set | ||
1464 | +# CONFIG_HTC_PASIC3 is not set | ||
1465 | +# CONFIG_HTC_I2CPLD is not set | ||
1466 | +# CONFIG_UCB1400_CORE is not set | ||
1467 | +# CONFIG_TPS6105X is not set | ||
1468 | +# CONFIG_TPS65010 is not set | ||
1469 | +# CONFIG_TPS6507X is not set | ||
1470 | +# CONFIG_MFD_TPS6586X is not set | ||
1471 | +# CONFIG_TWL4030_CORE is not set | ||
1472 | +# CONFIG_MFD_STMPE is not set | ||
1473 | +# CONFIG_MFD_TC3589X is not set | ||
1474 | +# CONFIG_MFD_TMIO is not set | ||
1475 | +# CONFIG_MFD_T7L66XB is not set | ||
1476 | +# CONFIG_MFD_TC6387XB is not set | ||
1477 | +# CONFIG_MFD_TC6393XB is not set | ||
1478 | +# CONFIG_PMIC_DA903X is not set | ||
1479 | +# CONFIG_PMIC_ADP5520 is not set | ||
1480 | +# CONFIG_MFD_MAX8925 is not set | ||
1481 | +# CONFIG_MFD_MAX8997 is not set | ||
1482 | +# CONFIG_MFD_MAX8998 is not set | ||
1483 | +# CONFIG_MFD_WM8400 is not set | ||
1484 | +# CONFIG_MFD_WM831X_I2C is not set | ||
1485 | +# CONFIG_MFD_WM831X_SPI is not set | ||
1486 | +# CONFIG_MFD_WM8350_I2C is not set | ||
1487 | +CONFIG_MFD_WM8994=y | ||
1488 | +# CONFIG_MFD_PCF50633 is not set | ||
1489 | +# CONFIG_PMIC_DIALOG is not set | ||
1490 | +# CONFIG_MFD_MC_PMIC is not set | ||
1491 | +# CONFIG_MFD_MC34708 is not set | ||
1492 | +CONFIG_MFD_PFUZE=y | ||
1493 | +# CONFIG_MFD_MC13XXX is not set | ||
1494 | +# CONFIG_ABX500_CORE is not set | ||
1495 | +# CONFIG_EZX_PCAP is not set | ||
1496 | +# CONFIG_MFD_WL1273_CORE is not set | ||
1497 | +# CONFIG_MFD_TPS65910 is not set | ||
1498 | +# CONFIG_MFD_MAX17135 is not set | ||
1499 | +CONFIG_MFD_MXC_HDMI=y | ||
1500 | +CONFIG_REGULATOR=y | ||
1501 | +# CONFIG_REGULATOR_DEBUG is not set | ||
1502 | +# CONFIG_REGULATOR_DUMMY is not set | ||
1503 | +CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
1504 | +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
1505 | +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
1506 | +# CONFIG_REGULATOR_BQ24022 is not set | ||
1507 | +# CONFIG_REGULATOR_MAX1586 is not set | ||
1508 | +# CONFIG_REGULATOR_MAX8649 is not set | ||
1509 | +# CONFIG_REGULATOR_MAX8660 is not set | ||
1510 | +# CONFIG_REGULATOR_MAX8952 is not set | ||
1511 | +# CONFIG_REGULATOR_WM8994 is not set | ||
1512 | +# CONFIG_REGULATOR_LP3971 is not set | ||
1513 | +# CONFIG_REGULATOR_LP3972 is not set | ||
1514 | +# CONFIG_REGULATOR_MC34708 is not set | ||
1515 | +CONFIG_REGULATOR_PFUZE100=y | ||
1516 | +# CONFIG_REGULATOR_TPS65023 is not set | ||
1517 | +# CONFIG_REGULATOR_TPS6507X is not set | ||
1518 | +# CONFIG_REGULATOR_ISL6271A is not set | ||
1519 | +# CONFIG_REGULATOR_AD5398 is not set | ||
1520 | +CONFIG_REGULATOR_ANATOP=y | ||
1521 | +# CONFIG_REGULATOR_TPS6524X is not set | ||
1522 | +CONFIG_MEDIA_SUPPORT=y | ||
1523 | + | ||
1524 | +# | ||
1525 | +# Multimedia core support | ||
1526 | +# | ||
1527 | +# CONFIG_MEDIA_CONTROLLER is not set | ||
1528 | +CONFIG_VIDEO_DEV=y | ||
1529 | +CONFIG_VIDEO_V4L2_COMMON=y | ||
1530 | +# CONFIG_DVB_CORE is not set | ||
1531 | +CONFIG_VIDEO_MEDIA=y | ||
1532 | + | ||
1533 | +# | ||
1534 | +# Multimedia drivers | ||
1535 | +# | ||
1536 | +# CONFIG_RC_CORE is not set | ||
1537 | +# CONFIG_MEDIA_ATTACH is not set | ||
1538 | +CONFIG_MEDIA_TUNER=y | ||
1539 | +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
1540 | +CONFIG_MEDIA_TUNER_SIMPLE=y | ||
1541 | +CONFIG_MEDIA_TUNER_TDA8290=y | ||
1542 | +CONFIG_MEDIA_TUNER_TDA827X=y | ||
1543 | +CONFIG_MEDIA_TUNER_TDA18271=y | ||
1544 | +CONFIG_MEDIA_TUNER_TDA9887=y | ||
1545 | +CONFIG_MEDIA_TUNER_TEA5761=y | ||
1546 | +CONFIG_MEDIA_TUNER_TEA5767=y | ||
1547 | +CONFIG_MEDIA_TUNER_MT20XX=y | ||
1548 | +CONFIG_MEDIA_TUNER_XC2028=y | ||
1549 | +CONFIG_MEDIA_TUNER_XC5000=y | ||
1550 | +CONFIG_MEDIA_TUNER_MC44S803=y | ||
1551 | +CONFIG_VIDEO_V4L2=y | ||
1552 | +CONFIG_VIDEOBUF_GEN=y | ||
1553 | +CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
1554 | +CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
1555 | +# CONFIG_VIDEO_ADV_DEBUG is not set | ||
1556 | +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
1557 | +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
1558 | + | ||
1559 | +# | ||
1560 | +# Encoders, decoders, sensors and other helper chips | ||
1561 | +# | ||
1562 | + | ||
1563 | +# | ||
1564 | +# Audio decoders, processors and mixers | ||
1565 | +# | ||
1566 | +# CONFIG_VIDEO_TVAUDIO is not set | ||
1567 | +# CONFIG_VIDEO_TDA7432 is not set | ||
1568 | +# CONFIG_VIDEO_TDA9840 is not set | ||
1569 | +# CONFIG_VIDEO_TEA6415C is not set | ||
1570 | +# CONFIG_VIDEO_TEA6420 is not set | ||
1571 | +# CONFIG_VIDEO_MSP3400 is not set | ||
1572 | +# CONFIG_VIDEO_CS5345 is not set | ||
1573 | +# CONFIG_VIDEO_CS53L32A is not set | ||
1574 | +# CONFIG_VIDEO_TLV320AIC23B is not set | ||
1575 | +# CONFIG_VIDEO_WM8775 is not set | ||
1576 | +# CONFIG_VIDEO_WM8739 is not set | ||
1577 | +# CONFIG_VIDEO_VP27SMPX is not set | ||
1578 | + | ||
1579 | +# | ||
1580 | +# RDS decoders | ||
1581 | +# | ||
1582 | +# CONFIG_VIDEO_SAA6588 is not set | ||
1583 | + | ||
1584 | +# | ||
1585 | +# Video decoders | ||
1586 | +# | ||
1587 | +# CONFIG_VIDEO_ADV7180 is not set | ||
1588 | +# CONFIG_VIDEO_BT819 is not set | ||
1589 | +# CONFIG_VIDEO_BT856 is not set | ||
1590 | +# CONFIG_VIDEO_BT866 is not set | ||
1591 | +# CONFIG_VIDEO_KS0127 is not set | ||
1592 | +# CONFIG_VIDEO_SAA7110 is not set | ||
1593 | +# CONFIG_VIDEO_SAA711X is not set | ||
1594 | +# CONFIG_VIDEO_SAA7191 is not set | ||
1595 | +# CONFIG_VIDEO_TVP514X is not set | ||
1596 | +# CONFIG_VIDEO_TVP5150 is not set | ||
1597 | +# CONFIG_VIDEO_TVP7002 is not set | ||
1598 | +# CONFIG_VIDEO_VPX3220 is not set | ||
1599 | + | ||
1600 | +# | ||
1601 | +# Video and audio decoders | ||
1602 | +# | ||
1603 | +# CONFIG_VIDEO_SAA717X is not set | ||
1604 | +# CONFIG_VIDEO_CX25840 is not set | ||
1605 | + | ||
1606 | +# | ||
1607 | +# MPEG video encoders | ||
1608 | +# | ||
1609 | +# CONFIG_VIDEO_CX2341X is not set | ||
1610 | + | ||
1611 | +# | ||
1612 | +# Video encoders | ||
1613 | +# | ||
1614 | +# CONFIG_VIDEO_SAA7127 is not set | ||
1615 | +# CONFIG_VIDEO_SAA7185 is not set | ||
1616 | +# CONFIG_VIDEO_ADV7170 is not set | ||
1617 | +# CONFIG_VIDEO_ADV7175 is not set | ||
1618 | +# CONFIG_VIDEO_ADV7343 is not set | ||
1619 | +# CONFIG_VIDEO_AK881X is not set | ||
1620 | + | ||
1621 | +# | ||
1622 | +# Camera sensor devices | ||
1623 | +# | ||
1624 | +# CONFIG_VIDEO_OV7670 is not set | ||
1625 | +# CONFIG_VIDEO_MT9V011 is not set | ||
1626 | +# CONFIG_VIDEO_TCM825X is not set | ||
1627 | + | ||
1628 | +# | ||
1629 | +# Video improvement chips | ||
1630 | +# | ||
1631 | +# CONFIG_VIDEO_UPD64031A is not set | ||
1632 | +# CONFIG_VIDEO_UPD64083 is not set | ||
1633 | + | ||
1634 | +# | ||
1635 | +# Miscelaneous helper chips | ||
1636 | +# | ||
1637 | +# CONFIG_VIDEO_THS7303 is not set | ||
1638 | +# CONFIG_VIDEO_M52790 is not set | ||
1639 | +# CONFIG_VIDEO_VIVI is not set | ||
1640 | +CONFIG_VIDEO_MXC_CAMERA=m | ||
1641 | + | ||
1642 | +# | ||
1643 | +# MXC Camera/V4L2 PRP Features support | ||
1644 | +# | ||
1645 | +CONFIG_VIDEO_MXC_IPU_CAMERA=y | ||
1646 | +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set | ||
1647 | +# CONFIG_MXC_CAMERA_MICRON111 is not set | ||
1648 | +# CONFIG_MXC_CAMERA_OV2640 is not set | ||
1649 | +CONFIG_MXC_CAMERA_OV3640=m | ||
1650 | +CONFIG_MXC_CAMERA_OV5640=m | ||
1651 | +CONFIG_MXC_CAMERA_OV5640_MIPI=m | ||
1652 | +CONFIG_MXC_CAMERA_OV8820_MIPI=m | ||
1653 | +CONFIG_MXC_CAMERA_OV5642=m | ||
1654 | +CONFIG_MXC_CAMERA_SENSOR_CLK=m | ||
1655 | +CONFIG_MXC_IPU_PRP_VF_SDC=m | ||
1656 | +CONFIG_MXC_IPU_PRP_ENC=m | ||
1657 | +CONFIG_MXC_IPU_CSI_ENC=m | ||
1658 | +CONFIG_VIDEO_MXC_OUTPUT=y | ||
1659 | +CONFIG_VIDEO_MXC_IPU_OUTPUT=y | ||
1660 | +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set | ||
1661 | +# CONFIG_VIDEO_MXC_OPL is not set | ||
1662 | +# CONFIG_VIDEO_CPIA2 is not set | ||
1663 | +# CONFIG_VIDEO_TIMBERDALE is not set | ||
1664 | +# CONFIG_VIDEO_SR030PC30 is not set | ||
1665 | +# CONFIG_VIDEO_NOON010PC30 is not set | ||
1666 | +# CONFIG_SOC_CAMERA is not set | ||
1667 | +CONFIG_V4L_USB_DRIVERS=y | ||
1668 | +CONFIG_USB_VIDEO_CLASS=m | ||
1669 | +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
1670 | +CONFIG_USB_GSPCA=m | ||
1671 | +# CONFIG_USB_M5602 is not set | ||
1672 | +# CONFIG_USB_STV06XX is not set | ||
1673 | +# CONFIG_USB_GL860 is not set | ||
1674 | +# CONFIG_USB_GSPCA_BENQ is not set | ||
1675 | +# CONFIG_USB_GSPCA_CONEX is not set | ||
1676 | +# CONFIG_USB_GSPCA_CPIA1 is not set | ||
1677 | +# CONFIG_USB_GSPCA_ETOMS is not set | ||
1678 | +# CONFIG_USB_GSPCA_FINEPIX is not set | ||
1679 | +# CONFIG_USB_GSPCA_JEILINJ is not set | ||
1680 | +# CONFIG_USB_GSPCA_KINECT is not set | ||
1681 | +# CONFIG_USB_GSPCA_KONICA is not set | ||
1682 | +# CONFIG_USB_GSPCA_MARS is not set | ||
1683 | +# CONFIG_USB_GSPCA_MR97310A is not set | ||
1684 | +# CONFIG_USB_GSPCA_NW80X is not set | ||
1685 | +# CONFIG_USB_GSPCA_OV519 is not set | ||
1686 | +# CONFIG_USB_GSPCA_OV534 is not set | ||
1687 | +# CONFIG_USB_GSPCA_OV534_9 is not set | ||
1688 | +# CONFIG_USB_GSPCA_PAC207 is not set | ||
1689 | +# CONFIG_USB_GSPCA_PAC7302 is not set | ||
1690 | +# CONFIG_USB_GSPCA_PAC7311 is not set | ||
1691 | +# CONFIG_USB_GSPCA_SN9C2028 is not set | ||
1692 | +# CONFIG_USB_GSPCA_SN9C20X is not set | ||
1693 | +# CONFIG_USB_GSPCA_SONIXB is not set | ||
1694 | +# CONFIG_USB_GSPCA_SONIXJ is not set | ||
1695 | +# CONFIG_USB_GSPCA_SPCA500 is not set | ||
1696 | +# CONFIG_USB_GSPCA_SPCA501 is not set | ||
1697 | +# CONFIG_USB_GSPCA_SPCA505 is not set | ||
1698 | +# CONFIG_USB_GSPCA_SPCA506 is not set | ||
1699 | +# CONFIG_USB_GSPCA_SPCA508 is not set | ||
1700 | +# CONFIG_USB_GSPCA_SPCA561 is not set | ||
1701 | +# CONFIG_USB_GSPCA_SPCA1528 is not set | ||
1702 | +# CONFIG_USB_GSPCA_SQ905 is not set | ||
1703 | +# CONFIG_USB_GSPCA_SQ905C is not set | ||
1704 | +# CONFIG_USB_GSPCA_SQ930X is not set | ||
1705 | +# CONFIG_USB_GSPCA_STK014 is not set | ||
1706 | +# CONFIG_USB_GSPCA_STV0680 is not set | ||
1707 | +# CONFIG_USB_GSPCA_SUNPLUS is not set | ||
1708 | +# CONFIG_USB_GSPCA_T613 is not set | ||
1709 | +# CONFIG_USB_GSPCA_TV8532 is not set | ||
1710 | +# CONFIG_USB_GSPCA_VC032X is not set | ||
1711 | +# CONFIG_USB_GSPCA_VICAM is not set | ||
1712 | +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set | ||
1713 | +# CONFIG_USB_GSPCA_ZC3XX is not set | ||
1714 | +# CONFIG_VIDEO_PVRUSB2 is not set | ||
1715 | +# CONFIG_VIDEO_HDPVR is not set | ||
1716 | +# CONFIG_VIDEO_USBVISION is not set | ||
1717 | +# CONFIG_USB_ET61X251 is not set | ||
1718 | +# CONFIG_USB_SN9C102 is not set | ||
1719 | +# CONFIG_USB_PWC is not set | ||
1720 | +# CONFIG_USB_ZR364XX is not set | ||
1721 | +# CONFIG_USB_STKWEBCAM is not set | ||
1722 | +# CONFIG_USB_S2255 is not set | ||
1723 | +# CONFIG_V4L_MEM2MEM_DRIVERS is not set | ||
1724 | +# CONFIG_RADIO_ADAPTERS is not set | ||
1725 | + | ||
1726 | +# | ||
1727 | +# Graphics support | ||
1728 | +# | ||
1729 | +# CONFIG_DRM is not set | ||
1730 | +# CONFIG_VGASTATE is not set | ||
1731 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
1732 | +CONFIG_FB=y | ||
1733 | +# CONFIG_FIRMWARE_EDID is not set | ||
1734 | +# CONFIG_FB_DDC is not set | ||
1735 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1736 | +CONFIG_FB_CFB_FILLRECT=y | ||
1737 | +CONFIG_FB_CFB_COPYAREA=y | ||
1738 | +CONFIG_FB_CFB_IMAGEBLIT=y | ||
1739 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
1740 | +# CONFIG_FB_SYS_FILLRECT is not set | ||
1741 | +# CONFIG_FB_SYS_COPYAREA is not set | ||
1742 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | ||
1743 | +# CONFIG_FB_FOREIGN_ENDIAN is not set | ||
1744 | +# CONFIG_FB_SYS_FOPS is not set | ||
1745 | +# CONFIG_FB_WMT_GE_ROPS is not set | ||
1746 | +CONFIG_FB_DEFERRED_IO=y | ||
1747 | +# CONFIG_FB_SVGALIB is not set | ||
1748 | +# CONFIG_FB_MACMODES is not set | ||
1749 | +# CONFIG_FB_BACKLIGHT is not set | ||
1750 | +CONFIG_FB_MODE_HELPERS=y | ||
1751 | +# CONFIG_FB_TILEBLITTING is not set | ||
1752 | + | ||
1753 | +# | ||
1754 | +# Frame buffer hardware drivers | ||
1755 | +# | ||
1756 | +# CONFIG_FB_UVESA is not set | ||
1757 | +# CONFIG_FB_S1D13XXX is not set | ||
1758 | +# CONFIG_FB_TMIO is not set | ||
1759 | +# CONFIG_FB_UDL is not set | ||
1760 | +# CONFIG_FB_VIRTUAL is not set | ||
1761 | +# CONFIG_FB_METRONOME is not set | ||
1762 | +# CONFIG_FB_BROADSHEET is not set | ||
1763 | +CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
1764 | +# CONFIG_LCD_CLASS_DEVICE is not set | ||
1765 | +CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
1766 | +# CONFIG_BACKLIGHT_GENERIC is not set | ||
1767 | +CONFIG_BACKLIGHT_PWM=y | ||
1768 | +# CONFIG_BACKLIGHT_ADP8860 is not set | ||
1769 | +# CONFIG_BACKLIGHT_ADP8870 is not set | ||
1770 | + | ||
1771 | +# | ||
1772 | +# Display device support | ||
1773 | +# | ||
1774 | +# CONFIG_DISPLAY_SUPPORT is not set | ||
1775 | +CONFIG_FB_MXC=y | ||
1776 | +CONFIG_FB_MXC_EDID=y | ||
1777 | +CONFIG_FB_MXC_SYNC_PANEL=y | ||
1778 | +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set | ||
1779 | +CONFIG_FB_MXC_LDB=y | ||
1780 | +CONFIG_FB_MXC_MIPI_DSI=y | ||
1781 | +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y | ||
1782 | +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set | ||
1783 | +# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set | ||
1784 | +# CONFIG_FB_MXC_SII902X is not set | ||
1785 | +# CONFIG_FB_MXC_CH7026 is not set | ||
1786 | +# CONFIG_FB_MXC_TVOUT_CH7024 is not set | ||
1787 | +# CONFIG_FB_MXC_ASYNC_PANEL is not set | ||
1788 | +CONFIG_FB_MXC_EINK_PANEL=y | ||
1789 | +# CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE is not set | ||
1790 | +# CONFIG_FB_MXC_ELCDIF_FB is not set | ||
1791 | +CONFIG_FB_MXC_HDMI=y | ||
1792 | + | ||
1793 | +# | ||
1794 | +# Console display driver support | ||
1795 | +# | ||
1796 | +CONFIG_DUMMY_CONSOLE=y | ||
1797 | +CONFIG_FRAMEBUFFER_CONSOLE=y | ||
1798 | +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
1799 | +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
1800 | +CONFIG_FONTS=y | ||
1801 | +# CONFIG_FONT_8x8 is not set | ||
1802 | +CONFIG_FONT_8x16=y | ||
1803 | +# CONFIG_FONT_6x11 is not set | ||
1804 | +# CONFIG_FONT_7x14 is not set | ||
1805 | +# CONFIG_FONT_PEARL_8x8 is not set | ||
1806 | +# CONFIG_FONT_ACORN_8x8 is not set | ||
1807 | +# CONFIG_FONT_MINI_4x6 is not set | ||
1808 | +# CONFIG_FONT_SUN8x16 is not set | ||
1809 | +# CONFIG_FONT_SUN12x22 is not set | ||
1810 | +# CONFIG_FONT_10x18 is not set | ||
1811 | +CONFIG_LOGO=y | ||
1812 | +CONFIG_LOGO_LINUX_MONO=y | ||
1813 | +CONFIG_LOGO_LINUX_VGA16=y | ||
1814 | +CONFIG_LOGO_LINUX_CLUT224=y | ||
1815 | +CONFIG_SOUND=y | ||
1816 | +# CONFIG_SOUND_OSS_CORE is not set | ||
1817 | +CONFIG_SND=y | ||
1818 | +CONFIG_SND_TIMER=y | ||
1819 | +CONFIG_SND_PCM=y | ||
1820 | +CONFIG_SND_HWDEP=y | ||
1821 | +CONFIG_SND_RAWMIDI=y | ||
1822 | +CONFIG_SND_JACK=y | ||
1823 | +# CONFIG_SND_SEQUENCER is not set | ||
1824 | +# CONFIG_SND_MIXER_OSS is not set | ||
1825 | +# CONFIG_SND_PCM_OSS is not set | ||
1826 | +# CONFIG_SND_HRTIMER is not set | ||
1827 | +# CONFIG_SND_DYNAMIC_MINORS is not set | ||
1828 | +CONFIG_SND_SUPPORT_OLD_API=y | ||
1829 | +CONFIG_SND_VERBOSE_PROCFS=y | ||
1830 | +# CONFIG_SND_VERBOSE_PRINTK is not set | ||
1831 | +# CONFIG_SND_DEBUG is not set | ||
1832 | +# CONFIG_SND_RAWMIDI_SEQ is not set | ||
1833 | +# CONFIG_SND_OPL3_LIB_SEQ is not set | ||
1834 | +# CONFIG_SND_OPL4_LIB_SEQ is not set | ||
1835 | +# CONFIG_SND_SBAWE_SEQ is not set | ||
1836 | +# CONFIG_SND_EMU10K1_SEQ is not set | ||
1837 | +CONFIG_SND_DRIVERS=y | ||
1838 | +# CONFIG_SND_DUMMY is not set | ||
1839 | +# CONFIG_SND_ALOOP is not set | ||
1840 | +# CONFIG_SND_MTPAV is not set | ||
1841 | +# CONFIG_SND_SERIAL_U16550 is not set | ||
1842 | +# CONFIG_SND_MPU401 is not set | ||
1843 | +CONFIG_SND_ARM=y | ||
1844 | +CONFIG_SND_SPI=y | ||
1845 | +CONFIG_SND_USB=y | ||
1846 | +CONFIG_SND_USB_AUDIO=y | ||
1847 | +# CONFIG_SND_USB_UA101 is not set | ||
1848 | +# CONFIG_SND_USB_CAIAQ is not set | ||
1849 | +# CONFIG_SND_USB_6FIRE is not set | ||
1850 | +CONFIG_SND_SOC=y | ||
1851 | +# CONFIG_SND_SOC_CACHE_LZO is not set | ||
1852 | +CONFIG_SND_SOC_AC97_BUS=y | ||
1853 | +CONFIG_SND_IMX_SOC=y | ||
1854 | +CONFIG_SND_MXC_SOC_MX2=y | ||
1855 | +CONFIG_SND_MXC_SOC_SPDIF_DAI=y | ||
1856 | +CONFIG_SND_SOC_IMX_SGTL5000=y | ||
1857 | +CONFIG_SND_SOC_IMX_WM8958=y | ||
1858 | +CONFIG_SND_SOC_IMX_WM8962=y | ||
1859 | +CONFIG_SND_SOC_IMX_SPDIF=y | ||
1860 | +CONFIG_SND_SOC_IMX_HDMI=y | ||
1861 | +CONFIG_SND_SOC_I2C_AND_SPI=y | ||
1862 | +# CONFIG_SND_SOC_ALL_CODECS is not set | ||
1863 | +CONFIG_SND_SOC_WM_HUBS=y | ||
1864 | +CONFIG_SND_SOC_MXC_HDMI=y | ||
1865 | +CONFIG_SND_SOC_MXC_SPDIF=y | ||
1866 | +CONFIG_SND_SOC_SGTL5000=y | ||
1867 | +CONFIG_SND_SOC_WM8962=y | ||
1868 | +CONFIG_SND_SOC_WM8994=y | ||
1869 | +# CONFIG_SOUND_PRIME is not set | ||
1870 | +CONFIG_AC97_BUS=y | ||
1871 | +CONFIG_HID_SUPPORT=y | ||
1872 | +CONFIG_HID=y | ||
1873 | +CONFIG_HIDRAW=y | ||
1874 | + | ||
1875 | +# | ||
1876 | +# USB Input Devices | ||
1877 | +# | ||
1878 | +CONFIG_USB_HID=y | ||
1879 | +# CONFIG_HID_PID is not set | ||
1880 | +# CONFIG_USB_HIDDEV is not set | ||
1881 | + | ||
1882 | +# | ||
1883 | +# Special HID drivers | ||
1884 | +# | ||
1885 | +CONFIG_HID_A4TECH=m | ||
1886 | +# CONFIG_HID_ACRUX is not set | ||
1887 | +CONFIG_HID_APPLE=m | ||
1888 | +CONFIG_HID_BELKIN=m | ||
1889 | +CONFIG_HID_CHERRY=m | ||
1890 | +CONFIG_HID_CHICONY=m | ||
1891 | +# CONFIG_HID_PRODIKEYS is not set | ||
1892 | +CONFIG_HID_CYPRESS=m | ||
1893 | +# CONFIG_HID_DRAGONRISE is not set | ||
1894 | +# CONFIG_HID_EMS_FF is not set | ||
1895 | +# CONFIG_HID_ELECOM is not set | ||
1896 | +CONFIG_HID_EZKEY=m | ||
1897 | +# CONFIG_HID_KEYTOUCH is not set | ||
1898 | +# CONFIG_HID_KYE is not set | ||
1899 | +# CONFIG_HID_UCLOGIC is not set | ||
1900 | +# CONFIG_HID_WALTOP is not set | ||
1901 | +CONFIG_HID_GYRATION=m | ||
1902 | +# CONFIG_HID_TWINHAN is not set | ||
1903 | +# CONFIG_HID_KENSINGTON is not set | ||
1904 | +# CONFIG_HID_LCPOWER is not set | ||
1905 | +CONFIG_HID_LOGITECH=m | ||
1906 | +# CONFIG_LOGITECH_FF is not set | ||
1907 | +# CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1908 | +# CONFIG_LOGIG940_FF is not set | ||
1909 | +# CONFIG_LOGIWII_FF is not set | ||
1910 | +# CONFIG_HID_MAGICMOUSE is not set | ||
1911 | +CONFIG_HID_MICROSOFT=m | ||
1912 | +CONFIG_HID_MONTEREY=m | ||
1913 | +# CONFIG_HID_MULTITOUCH is not set | ||
1914 | +# CONFIG_HID_NTRIG is not set | ||
1915 | +# CONFIG_HID_ORTEK is not set | ||
1916 | +CONFIG_HID_PANTHERLORD=m | ||
1917 | +# CONFIG_PANTHERLORD_FF is not set | ||
1918 | +CONFIG_HID_PETALYNX=m | ||
1919 | +# CONFIG_HID_PICOLCD is not set | ||
1920 | +# CONFIG_HID_QUANTA is not set | ||
1921 | +# CONFIG_HID_ROCCAT is not set | ||
1922 | +# CONFIG_HID_ROCCAT_ARVO is not set | ||
1923 | +# CONFIG_HID_ROCCAT_KONE is not set | ||
1924 | +# CONFIG_HID_ROCCAT_KONEPLUS is not set | ||
1925 | +# CONFIG_HID_ROCCAT_KOVAPLUS is not set | ||
1926 | +# CONFIG_HID_ROCCAT_PYRA is not set | ||
1927 | +CONFIG_HID_SAMSUNG=m | ||
1928 | +CONFIG_HID_SONY=m | ||
1929 | +CONFIG_HID_SUNPLUS=m | ||
1930 | +# CONFIG_HID_GREENASIA is not set | ||
1931 | +# CONFIG_HID_SMARTJOYPLUS is not set | ||
1932 | +# CONFIG_HID_TOPSEED is not set | ||
1933 | +# CONFIG_HID_THRUSTMASTER is not set | ||
1934 | +# CONFIG_HID_WACOM is not set | ||
1935 | +# CONFIG_HID_ZEROPLUS is not set | ||
1936 | +# CONFIG_HID_ZYDACRON is not set | ||
1937 | +CONFIG_USB_SUPPORT=y | ||
1938 | +CONFIG_USB_ARCH_HAS_HCD=y | ||
1939 | +# CONFIG_USB_ARCH_HAS_OHCI is not set | ||
1940 | +CONFIG_USB_ARCH_HAS_EHCI=y | ||
1941 | +CONFIG_USB=y | ||
1942 | +# CONFIG_USB_DEBUG is not set | ||
1943 | +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1944 | + | ||
1945 | +# | ||
1946 | +# Miscellaneous USB options | ||
1947 | +# | ||
1948 | +# CONFIG_USB_DEVICEFS is not set | ||
1949 | +# CONFIG_USB_DEVICE_CLASS is not set | ||
1950 | +# CONFIG_USB_DYNAMIC_MINORS is not set | ||
1951 | +CONFIG_USB_SUSPEND=y | ||
1952 | +CONFIG_USB_OTG=y | ||
1953 | +# CONFIG_USB_OTG_WHITELIST is not set | ||
1954 | +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1955 | +# CONFIG_USB_MON is not set | ||
1956 | +# CONFIG_USB_WUSB is not set | ||
1957 | +# CONFIG_USB_WUSB_CBAF is not set | ||
1958 | + | ||
1959 | +# | ||
1960 | +# USB Host Controller Drivers | ||
1961 | +# | ||
1962 | +# CONFIG_USB_C67X00_HCD is not set | ||
1963 | +CONFIG_USB_EHCI_HCD=y | ||
1964 | +CONFIG_USB_EHCI_ARC=y | ||
1965 | +CONFIG_USB_EHCI_ARC_OTG=y | ||
1966 | +# CONFIG_USB_EHCI_ARC_HSIC is not set | ||
1967 | +# CONFIG_USB_STATIC_IRAM is not set | ||
1968 | +CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
1969 | +# CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1970 | +# CONFIG_USB_EHCI_MXC is not set | ||
1971 | +# CONFIG_USB_OXU210HP_HCD is not set | ||
1972 | +# CONFIG_USB_ISP116X_HCD is not set | ||
1973 | +# CONFIG_USB_ISP1760_HCD is not set | ||
1974 | +# CONFIG_USB_ISP1362_HCD is not set | ||
1975 | +# CONFIG_USB_SL811_HCD is not set | ||
1976 | +# CONFIG_USB_R8A66597_HCD is not set | ||
1977 | +# CONFIG_USB_HWA_HCD is not set | ||
1978 | +# CONFIG_USB_MUSB_HDRC is not set | ||
1979 | + | ||
1980 | +# | ||
1981 | +# USB Device Class drivers | ||
1982 | +# | ||
1983 | +# CONFIG_USB_ACM is not set | ||
1984 | +# CONFIG_USB_PRINTER is not set | ||
1985 | +# CONFIG_USB_WDM is not set | ||
1986 | +# CONFIG_USB_TMC is not set | ||
1987 | + | ||
1988 | +# | ||
1989 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1990 | +# | ||
1991 | + | ||
1992 | +# | ||
1993 | +# also be needed; see USB_STORAGE Help for more info | ||
1994 | +# | ||
1995 | +CONFIG_USB_STORAGE=y | ||
1996 | +# CONFIG_USB_STORAGE_DEBUG is not set | ||
1997 | +# CONFIG_USB_STORAGE_REALTEK is not set | ||
1998 | +# CONFIG_USB_STORAGE_DATAFAB is not set | ||
1999 | +# CONFIG_USB_STORAGE_FREECOM is not set | ||
2000 | +# CONFIG_USB_STORAGE_ISD200 is not set | ||
2001 | +# CONFIG_USB_STORAGE_USBAT is not set | ||
2002 | +# CONFIG_USB_STORAGE_SDDR09 is not set | ||
2003 | +# CONFIG_USB_STORAGE_SDDR55 is not set | ||
2004 | +# CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
2005 | +# CONFIG_USB_STORAGE_ALAUDA is not set | ||
2006 | +# CONFIG_USB_STORAGE_ONETOUCH is not set | ||
2007 | +# CONFIG_USB_STORAGE_KARMA is not set | ||
2008 | +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
2009 | +# CONFIG_USB_STORAGE_ENE_UB6250 is not set | ||
2010 | +# CONFIG_USB_UAS is not set | ||
2011 | +# CONFIG_USB_LIBUSUAL is not set | ||
2012 | + | ||
2013 | +# | ||
2014 | +# USB Imaging devices | ||
2015 | +# | ||
2016 | +# CONFIG_USB_MDC800 is not set | ||
2017 | +# CONFIG_USB_MICROTEK is not set | ||
2018 | + | ||
2019 | +# | ||
2020 | +# USB port drivers | ||
2021 | +# | ||
2022 | +# CONFIG_USB_SERIAL is not set | ||
2023 | + | ||
2024 | +# | ||
2025 | +# USB Miscellaneous drivers | ||
2026 | +# | ||
2027 | +# CONFIG_USB_EMI62 is not set | ||
2028 | +# CONFIG_USB_EMI26 is not set | ||
2029 | +# CONFIG_USB_ADUTUX is not set | ||
2030 | +# CONFIG_USB_SEVSEG is not set | ||
2031 | +# CONFIG_USB_RIO500 is not set | ||
2032 | +# CONFIG_USB_LEGOTOWER is not set | ||
2033 | +# CONFIG_USB_LCD is not set | ||
2034 | +# CONFIG_USB_LED is not set | ||
2035 | +# CONFIG_USB_CYPRESS_CY7C63 is not set | ||
2036 | +# CONFIG_USB_CYTHERM is not set | ||
2037 | +# CONFIG_USB_IDMOUSE is not set | ||
2038 | +# CONFIG_USB_FTDI_ELAN is not set | ||
2039 | +# CONFIG_USB_APPLEDISPLAY is not set | ||
2040 | +# CONFIG_USB_SISUSBVGA is not set | ||
2041 | +# CONFIG_USB_LD is not set | ||
2042 | +# CONFIG_USB_TRANCEVIBRATOR is not set | ||
2043 | +# CONFIG_USB_IOWARRIOR is not set | ||
2044 | +# CONFIG_USB_TEST is not set | ||
2045 | +# CONFIG_USB_ISIGHTFW is not set | ||
2046 | +# CONFIG_USB_YUREX is not set | ||
2047 | +CONFIG_USB_GADGET=y | ||
2048 | +# CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
2049 | +# CONFIG_USB_GADGET_DEBUG_FS is not set | ||
2050 | +CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
2051 | +CONFIG_USB_GADGET_SELECTED=y | ||
2052 | +CONFIG_USB_GADGET_ARC=y | ||
2053 | +CONFIG_USB_ARC=y | ||
2054 | +# CONFIG_USB_GADGET_FSL_USB2 is not set | ||
2055 | +# CONFIG_USB_GADGET_FUSB300 is not set | ||
2056 | +# CONFIG_USB_GADGET_R8A66597 is not set | ||
2057 | +# CONFIG_USB_GADGET_PXA_U2O is not set | ||
2058 | +# CONFIG_USB_GADGET_M66592 is not set | ||
2059 | +# CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
2060 | +CONFIG_USB_GADGET_DUALSPEED=y | ||
2061 | +# CONFIG_USB_ZERO is not set | ||
2062 | +CONFIG_USB_AUDIO=m | ||
2063 | +CONFIG_USB_ETH=m | ||
2064 | +CONFIG_USB_ETH_RNDIS=y | ||
2065 | +# CONFIG_USB_ETH_EEM is not set | ||
2066 | +# CONFIG_USB_G_NCM is not set | ||
2067 | +# CONFIG_USB_GADGETFS is not set | ||
2068 | +# CONFIG_USB_FUNCTIONFS is not set | ||
2069 | +CONFIG_USB_FILE_STORAGE=m | ||
2070 | +# CONFIG_FSL_UTP is not set | ||
2071 | +# CONFIG_USB_FILE_STORAGE_TEST is not set | ||
2072 | +# CONFIG_USB_MASS_STORAGE is not set | ||
2073 | +CONFIG_USB_G_SERIAL=m | ||
2074 | +# CONFIG_USB_MIDI_GADGET is not set | ||
2075 | +# CONFIG_USB_G_PRINTER is not set | ||
2076 | +# CONFIG_USB_CDC_COMPOSITE is not set | ||
2077 | +# CONFIG_USB_G_MULTI is not set | ||
2078 | +# CONFIG_USB_G_HID is not set | ||
2079 | +# CONFIG_USB_G_DBGP is not set | ||
2080 | +# CONFIG_USB_G_WEBCAM is not set | ||
2081 | + | ||
2082 | +# | ||
2083 | +# OTG and related infrastructure | ||
2084 | +# | ||
2085 | +CONFIG_USB_OTG_UTILS=y | ||
2086 | +# CONFIG_USB_GPIO_VBUS is not set | ||
2087 | +# CONFIG_USB_ULPI is not set | ||
2088 | +# CONFIG_NOP_USB_XCEIV is not set | ||
2089 | +CONFIG_MXC_OTG=y | ||
2090 | +CONFIG_MMC=y | ||
2091 | +# CONFIG_MMC_DEBUG is not set | ||
2092 | +CONFIG_MMC_UNSAFE_RESUME=y | ||
2093 | +# CONFIG_MMC_CLKGATE is not set | ||
2094 | + | ||
2095 | +# | ||
2096 | +# MMC/SD/SDIO Card Drivers | ||
2097 | +# | ||
2098 | +CONFIG_MMC_BLOCK=y | ||
2099 | +CONFIG_MMC_BLOCK_MINORS=8 | ||
2100 | +CONFIG_MMC_BLOCK_BOUNCE=y | ||
2101 | +# CONFIG_SDIO_UART is not set | ||
2102 | +# CONFIG_MMC_TEST is not set | ||
2103 | + | ||
2104 | +# | ||
2105 | +# MMC/SD/SDIO Host Controller Drivers | ||
2106 | +# | ||
2107 | +CONFIG_MMC_SDHCI=y | ||
2108 | +CONFIG_MMC_SDHCI_IO_ACCESSORS=y | ||
2109 | +CONFIG_MMC_SDHCI_PLTFM=y | ||
2110 | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
2111 | +# CONFIG_MMC_DW is not set | ||
2112 | +# CONFIG_MMC_VUB300 is not set | ||
2113 | +# CONFIG_MMC_USHC is not set | ||
2114 | +# CONFIG_MEMSTICK is not set | ||
2115 | +CONFIG_NEW_LEDS=y | ||
2116 | +CONFIG_LEDS_CLASS=y | ||
2117 | + | ||
2118 | +# | ||
2119 | +# LED drivers | ||
2120 | +# | ||
2121 | +# CONFIG_LEDS_LM3530 is not set | ||
2122 | +# CONFIG_LEDS_PCA9532 is not set | ||
2123 | +# CONFIG_LEDS_GPIO is not set | ||
2124 | +# CONFIG_LEDS_LP3944 is not set | ||
2125 | +# CONFIG_LEDS_LP5521 is not set | ||
2126 | +# CONFIG_LEDS_LP5523 is not set | ||
2127 | +# CONFIG_LEDS_PCA955X is not set | ||
2128 | +# CONFIG_LEDS_DAC124S085 is not set | ||
2129 | +# CONFIG_LEDS_PWM is not set | ||
2130 | +# CONFIG_LEDS_REGULATOR is not set | ||
2131 | +# CONFIG_LEDS_BD2802 is not set | ||
2132 | +# CONFIG_LEDS_LT3593 is not set | ||
2133 | +# CONFIG_LEDS_TRIGGERS is not set | ||
2134 | + | ||
2135 | +# | ||
2136 | +# LED Triggers | ||
2137 | +# | ||
2138 | + | ||
2139 | +# | ||
2140 | +# LED Triggers | ||
2141 | +# | ||
2142 | +# CONFIG_NFC_DEVICES is not set | ||
2143 | +# CONFIG_ACCESSIBILITY is not set | ||
2144 | +CONFIG_RTC_LIB=y | ||
2145 | +CONFIG_RTC_CLASS=y | ||
2146 | +CONFIG_RTC_HCTOSYS=y | ||
2147 | +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
2148 | +# CONFIG_RTC_DEBUG is not set | ||
2149 | + | ||
2150 | +# | ||
2151 | +# RTC interfaces | ||
2152 | +# | ||
2153 | +CONFIG_RTC_INTF_SYSFS=y | ||
2154 | +CONFIG_RTC_INTF_PROC=y | ||
2155 | +CONFIG_RTC_INTF_DEV=y | ||
2156 | +CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
2157 | +# CONFIG_RTC_DRV_TEST is not set | ||
2158 | + | ||
2159 | +# | ||
2160 | +# I2C RTC drivers | ||
2161 | +# | ||
2162 | +# CONFIG_RTC_DRV_DS1307 is not set | ||
2163 | +# CONFIG_RTC_DRV_DS1374 is not set | ||
2164 | +# CONFIG_RTC_DRV_DS1672 is not set | ||
2165 | +# CONFIG_RTC_DRV_DS3232 is not set | ||
2166 | +# CONFIG_RTC_DRV_MAX6900 is not set | ||
2167 | +# CONFIG_RTC_DRV_RS5C372 is not set | ||
2168 | +# CONFIG_RTC_DRV_ISL1208 is not set | ||
2169 | +# CONFIG_RTC_DRV_ISL12022 is not set | ||
2170 | +# CONFIG_RTC_DRV_X1205 is not set | ||
2171 | +# CONFIG_RTC_DRV_PCF8563 is not set | ||
2172 | +# CONFIG_RTC_DRV_PCF8583 is not set | ||
2173 | +# CONFIG_RTC_DRV_M41T80 is not set | ||
2174 | +# CONFIG_RTC_DRV_BQ32K is not set | ||
2175 | +# CONFIG_RTC_DRV_S35390A is not set | ||
2176 | +# CONFIG_RTC_DRV_FM3130 is not set | ||
2177 | +# CONFIG_RTC_DRV_RX8581 is not set | ||
2178 | +# CONFIG_RTC_DRV_RX8025 is not set | ||
2179 | +# CONFIG_RTC_DRV_EM3027 is not set | ||
2180 | +# CONFIG_RTC_DRV_RV3029C2 is not set | ||
2181 | + | ||
2182 | +# | ||
2183 | +# SPI RTC drivers | ||
2184 | +# | ||
2185 | +# CONFIG_RTC_DRV_M41T93 is not set | ||
2186 | +# CONFIG_RTC_DRV_M41T94 is not set | ||
2187 | +# CONFIG_RTC_DRV_DS1305 is not set | ||
2188 | +# CONFIG_RTC_DRV_DS1390 is not set | ||
2189 | +# CONFIG_RTC_DRV_MAX6902 is not set | ||
2190 | +# CONFIG_RTC_DRV_R9701 is not set | ||
2191 | +# CONFIG_RTC_DRV_RS5C348 is not set | ||
2192 | +# CONFIG_RTC_DRV_DS3234 is not set | ||
2193 | +# CONFIG_RTC_DRV_PCF2123 is not set | ||
2194 | + | ||
2195 | +# | ||
2196 | +# Platform RTC drivers | ||
2197 | +# | ||
2198 | +# CONFIG_RTC_DRV_CMOS is not set | ||
2199 | +# CONFIG_RTC_DRV_DS1286 is not set | ||
2200 | +# CONFIG_RTC_DRV_DS1511 is not set | ||
2201 | +# CONFIG_RTC_DRV_DS1553 is not set | ||
2202 | +# CONFIG_RTC_DRV_DS1742 is not set | ||
2203 | +# CONFIG_RTC_DRV_STK17TA8 is not set | ||
2204 | +# CONFIG_RTC_DRV_M48T86 is not set | ||
2205 | +# CONFIG_RTC_DRV_M48T35 is not set | ||
2206 | +# CONFIG_RTC_DRV_M48T59 is not set | ||
2207 | +# CONFIG_RTC_DRV_MSM6242 is not set | ||
2208 | +# CONFIG_RTC_MXC is not set | ||
2209 | +# CONFIG_RTC_DRV_MXC_V2 is not set | ||
2210 | +CONFIG_RTC_DRV_SNVS=y | ||
2211 | +# CONFIG_RTC_DRV_BQ4802 is not set | ||
2212 | +# CONFIG_RTC_DRV_RP5C01 is not set | ||
2213 | +# CONFIG_RTC_DRV_V3020 is not set | ||
2214 | + | ||
2215 | +# | ||
2216 | +# on-CPU RTC drivers | ||
2217 | +# | ||
2218 | +CONFIG_DMADEVICES=y | ||
2219 | +# CONFIG_DMADEVICES_DEBUG is not set | ||
2220 | + | ||
2221 | +# | ||
2222 | +# DMA Devices | ||
2223 | +# | ||
2224 | +# CONFIG_DW_DMAC is not set | ||
2225 | +CONFIG_MXC_PXP_V2=y | ||
2226 | +CONFIG_MXC_PXP_CLIENT_DEVICE=y | ||
2227 | +# CONFIG_TIMB_DMA is not set | ||
2228 | +CONFIG_IMX_SDMA=y | ||
2229 | +# CONFIG_MXS_DMA is not set | ||
2230 | +CONFIG_DMA_ENGINE=y | ||
2231 | + | ||
2232 | +# | ||
2233 | +# DMA Clients | ||
2234 | +# | ||
2235 | +# CONFIG_NET_DMA is not set | ||
2236 | +# CONFIG_ASYNC_TX_DMA is not set | ||
2237 | +# CONFIG_DMATEST is not set | ||
2238 | +# CONFIG_AUXDISPLAY is not set | ||
2239 | +# CONFIG_UIO is not set | ||
2240 | +# CONFIG_STAGING is not set | ||
2241 | +CONFIG_CLKDEV_LOOKUP=y | ||
2242 | +CONFIG_CLKSRC_MMIO=y | ||
2243 | + | ||
2244 | +# | ||
2245 | +# MXC support drivers | ||
2246 | +# | ||
2247 | +CONFIG_MXC_IPU=y | ||
2248 | +CONFIG_MXC_IPU_V3=y | ||
2249 | +CONFIG_MXC_IPU_V3H=y | ||
2250 | + | ||
2251 | +# | ||
2252 | +# MXC SSI support | ||
2253 | +# | ||
2254 | +# CONFIG_MXC_SSI is not set | ||
2255 | + | ||
2256 | +# | ||
2257 | +# MXC Digital Audio Multiplexer support | ||
2258 | +# | ||
2259 | +# CONFIG_MXC_DAM is not set | ||
2260 | + | ||
2261 | +# | ||
2262 | +# MXC PMIC support | ||
2263 | +# | ||
2264 | +# CONFIG_MXC_PMIC_MC13783 is not set | ||
2265 | +# CONFIG_MXC_PMIC_MC13892 is not set | ||
2266 | +# CONFIG_MXC_PMIC_MC34704 is not set | ||
2267 | +# CONFIG_MXC_PMIC_MC9SDZ60 is not set | ||
2268 | +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set | ||
2269 | + | ||
2270 | +# | ||
2271 | +# MXC Security Drivers | ||
2272 | +# | ||
2273 | +# CONFIG_MXC_SECURITY_SCC is not set | ||
2274 | +# CONFIG_MXC_SECURITY_RNG is not set | ||
2275 | + | ||
2276 | +# | ||
2277 | +# MXC MPEG4 Encoder Kernel module support | ||
2278 | +# | ||
2279 | +# CONFIG_MXC_HMP4E is not set | ||
2280 | + | ||
2281 | +# | ||
2282 | +# MXC HARDWARE EVENT | ||
2283 | +# | ||
2284 | +# CONFIG_MXC_HWEVENT is not set | ||
2285 | + | ||
2286 | +# | ||
2287 | +# MXC VPU(Video Processing Unit) support | ||
2288 | +# | ||
2289 | +CONFIG_MXC_VPU=y | ||
2290 | +# CONFIG_MXC_VPU_DEBUG is not set | ||
2291 | + | ||
2292 | +# | ||
2293 | +# MXC Asynchronous Sample Rate Converter support | ||
2294 | +# | ||
2295 | +CONFIG_MXC_ASRC=y | ||
2296 | + | ||
2297 | +# | ||
2298 | +# MXC Bluetooth support | ||
2299 | +# | ||
2300 | + | ||
2301 | +# | ||
2302 | +# Broadcom GPS ioctrl support | ||
2303 | +# | ||
2304 | + | ||
2305 | +# | ||
2306 | +# MXC Media Local Bus Driver | ||
2307 | +# | ||
2308 | +CONFIG_MXC_MLB=y | ||
2309 | +CONFIG_MXC_MLB150=m | ||
2310 | + | ||
2311 | +# | ||
2312 | +# i.MX ADC support | ||
2313 | +# | ||
2314 | +# CONFIG_IMX_ADC is not set | ||
2315 | + | ||
2316 | +# | ||
2317 | +# MXC Vivante GPU support | ||
2318 | +# | ||
2319 | +CONFIG_MXC_GPU_VIV=m | ||
2320 | + | ||
2321 | +# | ||
2322 | +# ANATOP_THERMAL | ||
2323 | +# | ||
2324 | +CONFIG_ANATOP_THERMAL=y | ||
2325 | + | ||
2326 | +# | ||
2327 | +# MXC MIPI Support | ||
2328 | +# | ||
2329 | +CONFIG_MXC_MIPI_CSI2=y | ||
2330 | + | ||
2331 | +# | ||
2332 | +# File systems | ||
2333 | +# | ||
2334 | +CONFIG_EXT2_FS=y | ||
2335 | +# CONFIG_EXT2_FS_XATTR is not set | ||
2336 | +# CONFIG_EXT2_FS_XIP is not set | ||
2337 | +CONFIG_EXT3_FS=y | ||
2338 | +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
2339 | +CONFIG_EXT3_FS_XATTR=y | ||
2340 | +# CONFIG_EXT3_FS_POSIX_ACL is not set | ||
2341 | +# CONFIG_EXT3_FS_SECURITY is not set | ||
2342 | +CONFIG_EXT4_FS=y | ||
2343 | +CONFIG_EXT4_FS_XATTR=y | ||
2344 | +# CONFIG_EXT4_FS_POSIX_ACL is not set | ||
2345 | +# CONFIG_EXT4_FS_SECURITY is not set | ||
2346 | +# CONFIG_EXT4_DEBUG is not set | ||
2347 | +CONFIG_JBD=y | ||
2348 | +# CONFIG_JBD_DEBUG is not set | ||
2349 | +CONFIG_JBD2=y | ||
2350 | +# CONFIG_JBD2_DEBUG is not set | ||
2351 | +CONFIG_FS_MBCACHE=y | ||
2352 | +# CONFIG_REISERFS_FS is not set | ||
2353 | +# CONFIG_JFS_FS is not set | ||
2354 | +# CONFIG_XFS_FS is not set | ||
2355 | +# CONFIG_GFS2_FS is not set | ||
2356 | +# CONFIG_BTRFS_FS is not set | ||
2357 | +# CONFIG_NILFS2_FS is not set | ||
2358 | +# CONFIG_FS_POSIX_ACL is not set | ||
2359 | +CONFIG_FILE_LOCKING=y | ||
2360 | +CONFIG_FSNOTIFY=y | ||
2361 | +CONFIG_DNOTIFY=y | ||
2362 | +CONFIG_INOTIFY_USER=y | ||
2363 | +# CONFIG_FANOTIFY is not set | ||
2364 | +# CONFIG_QUOTA is not set | ||
2365 | +# CONFIG_QUOTACTL is not set | ||
2366 | +CONFIG_AUTOFS4_FS=m | ||
2367 | +# CONFIG_FUSE_FS is not set | ||
2368 | + | ||
2369 | +# | ||
2370 | +# Caches | ||
2371 | +# | ||
2372 | +# CONFIG_FSCACHE is not set | ||
2373 | + | ||
2374 | +# | ||
2375 | +# CD-ROM/DVD Filesystems | ||
2376 | +# | ||
2377 | +# CONFIG_ISO9660_FS is not set | ||
2378 | +# CONFIG_UDF_FS is not set | ||
2379 | + | ||
2380 | +# | ||
2381 | +# DOS/FAT/NT Filesystems | ||
2382 | +# | ||
2383 | +CONFIG_FAT_FS=y | ||
2384 | +CONFIG_MSDOS_FS=y | ||
2385 | +CONFIG_VFAT_FS=y | ||
2386 | +CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
2387 | +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
2388 | +# CONFIG_NTFS_FS is not set | ||
2389 | + | ||
2390 | +# | ||
2391 | +# Pseudo filesystems | ||
2392 | +# | ||
2393 | +CONFIG_PROC_FS=y | ||
2394 | +CONFIG_PROC_SYSCTL=y | ||
2395 | +CONFIG_PROC_PAGE_MONITOR=y | ||
2396 | +CONFIG_SYSFS=y | ||
2397 | +CONFIG_TMPFS=y | ||
2398 | +# CONFIG_TMPFS_POSIX_ACL is not set | ||
2399 | +# CONFIG_TMPFS_XATTR is not set | ||
2400 | +# CONFIG_HUGETLB_PAGE is not set | ||
2401 | +# CONFIG_CONFIGFS_FS is not set | ||
2402 | +CONFIG_MISC_FILESYSTEMS=y | ||
2403 | +# CONFIG_ADFS_FS is not set | ||
2404 | +# CONFIG_AFFS_FS is not set | ||
2405 | +# CONFIG_HFS_FS is not set | ||
2406 | +# CONFIG_HFSPLUS_FS is not set | ||
2407 | +# CONFIG_BEFS_FS is not set | ||
2408 | +# CONFIG_BFS_FS is not set | ||
2409 | +# CONFIG_EFS_FS is not set | ||
2410 | +CONFIG_JFFS2_FS=y | ||
2411 | +CONFIG_JFFS2_FS_DEBUG=0 | ||
2412 | +CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
2413 | +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
2414 | +# CONFIG_JFFS2_SUMMARY is not set | ||
2415 | +# CONFIG_JFFS2_FS_XATTR is not set | ||
2416 | +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
2417 | +CONFIG_JFFS2_ZLIB=y | ||
2418 | +# CONFIG_JFFS2_LZO is not set | ||
2419 | +CONFIG_JFFS2_RTIME=y | ||
2420 | +# CONFIG_JFFS2_RUBIN is not set | ||
2421 | +CONFIG_UBIFS_FS=y | ||
2422 | +# CONFIG_UBIFS_FS_XATTR is not set | ||
2423 | +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | ||
2424 | +CONFIG_UBIFS_FS_LZO=y | ||
2425 | +CONFIG_UBIFS_FS_ZLIB=y | ||
2426 | +# CONFIG_UBIFS_FS_DEBUG is not set | ||
2427 | +# CONFIG_LOGFS is not set | ||
2428 | +CONFIG_CRAMFS=y | ||
2429 | +# CONFIG_SQUASHFS is not set | ||
2430 | +# CONFIG_VXFS_FS is not set | ||
2431 | +# CONFIG_MINIX_FS is not set | ||
2432 | +# CONFIG_OMFS_FS is not set | ||
2433 | +# CONFIG_HPFS_FS is not set | ||
2434 | +# CONFIG_QNX4FS_FS is not set | ||
2435 | +# CONFIG_ROMFS_FS is not set | ||
2436 | +# CONFIG_PSTORE is not set | ||
2437 | +# CONFIG_SYSV_FS is not set | ||
2438 | +# CONFIG_UFS_FS is not set | ||
2439 | +CONFIG_NETWORK_FILESYSTEMS=y | ||
2440 | +CONFIG_NFS_FS=y | ||
2441 | +CONFIG_NFS_V3=y | ||
2442 | +# CONFIG_NFS_V3_ACL is not set | ||
2443 | +# CONFIG_NFS_V4 is not set | ||
2444 | +CONFIG_ROOT_NFS=y | ||
2445 | +# CONFIG_NFSD is not set | ||
2446 | +CONFIG_LOCKD=y | ||
2447 | +CONFIG_LOCKD_V4=y | ||
2448 | +CONFIG_NFS_COMMON=y | ||
2449 | +CONFIG_SUNRPC=y | ||
2450 | +# CONFIG_CEPH_FS is not set | ||
2451 | +# CONFIG_CIFS is not set | ||
2452 | +# CONFIG_NCP_FS is not set | ||
2453 | +# CONFIG_CODA_FS is not set | ||
2454 | +# CONFIG_AFS_FS is not set | ||
2455 | + | ||
2456 | +# | ||
2457 | +# Partition Types | ||
2458 | +# | ||
2459 | +CONFIG_PARTITION_ADVANCED=y | ||
2460 | +# CONFIG_ACORN_PARTITION is not set | ||
2461 | +# CONFIG_OSF_PARTITION is not set | ||
2462 | +# CONFIG_AMIGA_PARTITION is not set | ||
2463 | +# CONFIG_ATARI_PARTITION is not set | ||
2464 | +# CONFIG_MAC_PARTITION is not set | ||
2465 | +CONFIG_MSDOS_PARTITION=y | ||
2466 | +# CONFIG_BSD_DISKLABEL is not set | ||
2467 | +# CONFIG_MINIX_SUBPARTITION is not set | ||
2468 | +# CONFIG_SOLARIS_X86_PARTITION is not set | ||
2469 | +# CONFIG_UNIXWARE_DISKLABEL is not set | ||
2470 | +# CONFIG_LDM_PARTITION is not set | ||
2471 | +# CONFIG_SGI_PARTITION is not set | ||
2472 | +# CONFIG_ULTRIX_PARTITION is not set | ||
2473 | +# CONFIG_SUN_PARTITION is not set | ||
2474 | +# CONFIG_KARMA_PARTITION is not set | ||
2475 | +CONFIG_EFI_PARTITION=y | ||
2476 | +# CONFIG_SYSV68_PARTITION is not set | ||
2477 | +CONFIG_NLS=y | ||
2478 | +CONFIG_NLS_DEFAULT="iso8859-1" | ||
2479 | +CONFIG_NLS_CODEPAGE_437=y | ||
2480 | +# CONFIG_NLS_CODEPAGE_737 is not set | ||
2481 | +# CONFIG_NLS_CODEPAGE_775 is not set | ||
2482 | +# CONFIG_NLS_CODEPAGE_850 is not set | ||
2483 | +# CONFIG_NLS_CODEPAGE_852 is not set | ||
2484 | +# CONFIG_NLS_CODEPAGE_855 is not set | ||
2485 | +# CONFIG_NLS_CODEPAGE_857 is not set | ||
2486 | +# CONFIG_NLS_CODEPAGE_860 is not set | ||
2487 | +# CONFIG_NLS_CODEPAGE_861 is not set | ||
2488 | +# CONFIG_NLS_CODEPAGE_862 is not set | ||
2489 | +# CONFIG_NLS_CODEPAGE_863 is not set | ||
2490 | +# CONFIG_NLS_CODEPAGE_864 is not set | ||
2491 | +# CONFIG_NLS_CODEPAGE_865 is not set | ||
2492 | +# CONFIG_NLS_CODEPAGE_866 is not set | ||
2493 | +# CONFIG_NLS_CODEPAGE_869 is not set | ||
2494 | +# CONFIG_NLS_CODEPAGE_936 is not set | ||
2495 | +# CONFIG_NLS_CODEPAGE_950 is not set | ||
2496 | +# CONFIG_NLS_CODEPAGE_932 is not set | ||
2497 | +# CONFIG_NLS_CODEPAGE_949 is not set | ||
2498 | +# CONFIG_NLS_CODEPAGE_874 is not set | ||
2499 | +# CONFIG_NLS_ISO8859_8 is not set | ||
2500 | +# CONFIG_NLS_CODEPAGE_1250 is not set | ||
2501 | +# CONFIG_NLS_CODEPAGE_1251 is not set | ||
2502 | +CONFIG_NLS_ASCII=m | ||
2503 | +CONFIG_NLS_ISO8859_1=y | ||
2504 | +# CONFIG_NLS_ISO8859_2 is not set | ||
2505 | +# CONFIG_NLS_ISO8859_3 is not set | ||
2506 | +# CONFIG_NLS_ISO8859_4 is not set | ||
2507 | +# CONFIG_NLS_ISO8859_5 is not set | ||
2508 | +# CONFIG_NLS_ISO8859_6 is not set | ||
2509 | +# CONFIG_NLS_ISO8859_7 is not set | ||
2510 | +# CONFIG_NLS_ISO8859_9 is not set | ||
2511 | +# CONFIG_NLS_ISO8859_13 is not set | ||
2512 | +# CONFIG_NLS_ISO8859_14 is not set | ||
2513 | +# CONFIG_NLS_ISO8859_15 is not set | ||
2514 | +# CONFIG_NLS_KOI8_R is not set | ||
2515 | +# CONFIG_NLS_KOI8_U is not set | ||
2516 | +CONFIG_NLS_UTF8=m | ||
2517 | + | ||
2518 | +# | ||
2519 | +# Kernel hacking | ||
2520 | +# | ||
2521 | +# CONFIG_PRINTK_TIME is not set | ||
2522 | +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 | ||
2523 | +CONFIG_ENABLE_WARN_DEPRECATED=y | ||
2524 | +CONFIG_ENABLE_MUST_CHECK=y | ||
2525 | +CONFIG_FRAME_WARN=1024 | ||
2526 | +# CONFIG_MAGIC_SYSRQ is not set | ||
2527 | +# CONFIG_STRIP_ASM_SYMS is not set | ||
2528 | +# CONFIG_UNUSED_SYMBOLS is not set | ||
2529 | +CONFIG_DEBUG_FS=y | ||
2530 | +# CONFIG_HEADERS_CHECK is not set | ||
2531 | +# CONFIG_DEBUG_SECTION_MISMATCH is not set | ||
2532 | +# CONFIG_DEBUG_KERNEL is not set | ||
2533 | +# CONFIG_HARDLOCKUP_DETECTOR is not set | ||
2534 | +# CONFIG_SLUB_DEBUG_ON is not set | ||
2535 | +# CONFIG_SLUB_STATS is not set | ||
2536 | +# CONFIG_SPARSE_RCU_POINTER is not set | ||
2537 | +CONFIG_DEBUG_BUGVERBOSE=y | ||
2538 | +# CONFIG_DEBUG_MEMORY_INIT is not set | ||
2539 | +CONFIG_RCU_CPU_STALL_TIMEOUT=60 | ||
2540 | +CONFIG_RCU_CPU_STALL_VERBOSE=y | ||
2541 | +# CONFIG_LKDTM is not set | ||
2542 | +CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
2543 | +CONFIG_HAVE_FUNCTION_TRACER=y | ||
2544 | +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
2545 | +CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
2546 | +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
2547 | +CONFIG_HAVE_C_RECORDMCOUNT=y | ||
2548 | +CONFIG_TRACING_SUPPORT=y | ||
2549 | +# CONFIG_FTRACE is not set | ||
2550 | +# CONFIG_DYNAMIC_DEBUG is not set | ||
2551 | +# CONFIG_DMA_API_DEBUG is not set | ||
2552 | +# CONFIG_ATOMIC64_SELFTEST is not set | ||
2553 | +# CONFIG_SAMPLES is not set | ||
2554 | +CONFIG_HAVE_ARCH_KGDB=y | ||
2555 | +# CONFIG_TEST_KSTRTOX is not set | ||
2556 | +# CONFIG_STRICT_DEVMEM is not set | ||
2557 | +CONFIG_ARM_UNWIND=y | ||
2558 | +# CONFIG_DEBUG_USER is not set | ||
2559 | +# CONFIG_OC_ETM is not set | ||
2560 | + | ||
2561 | +# | ||
2562 | +# Security options | ||
2563 | +# | ||
2564 | +# CONFIG_KEYS is not set | ||
2565 | +# CONFIG_SECURITY_DMESG_RESTRICT is not set | ||
2566 | +# CONFIG_SECURITY is not set | ||
2567 | +# CONFIG_SECURITYFS is not set | ||
2568 | +CONFIG_DEFAULT_SECURITY_DAC=y | ||
2569 | +CONFIG_DEFAULT_SECURITY="" | ||
2570 | +CONFIG_CRYPTO=y | ||
2571 | + | ||
2572 | +# | ||
2573 | +# Crypto core or helper | ||
2574 | +# | ||
2575 | +CONFIG_CRYPTO_ALGAPI=y | ||
2576 | +CONFIG_CRYPTO_ALGAPI2=y | ||
2577 | +CONFIG_CRYPTO_AEAD2=y | ||
2578 | +CONFIG_CRYPTO_BLKCIPHER=y | ||
2579 | +CONFIG_CRYPTO_BLKCIPHER2=y | ||
2580 | +CONFIG_CRYPTO_HASH=y | ||
2581 | +CONFIG_CRYPTO_HASH2=y | ||
2582 | +CONFIG_CRYPTO_RNG2=y | ||
2583 | +CONFIG_CRYPTO_PCOMP2=y | ||
2584 | +CONFIG_CRYPTO_MANAGER=y | ||
2585 | +CONFIG_CRYPTO_MANAGER2=y | ||
2586 | +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | ||
2587 | +# CONFIG_CRYPTO_GF128MUL is not set | ||
2588 | +# CONFIG_CRYPTO_NULL is not set | ||
2589 | +# CONFIG_CRYPTO_PCRYPT is not set | ||
2590 | +CONFIG_CRYPTO_WORKQUEUE=y | ||
2591 | +# CONFIG_CRYPTO_CRYPTD is not set | ||
2592 | +# CONFIG_CRYPTO_AUTHENC is not set | ||
2593 | +CONFIG_CRYPTO_TEST=m | ||
2594 | +# CONFIG_CRYPTO_CRYPTODEV is not set | ||
2595 | + | ||
2596 | +# | ||
2597 | +# Authenticated Encryption with Associated Data | ||
2598 | +# | ||
2599 | +# CONFIG_CRYPTO_CCM is not set | ||
2600 | +# CONFIG_CRYPTO_GCM is not set | ||
2601 | +# CONFIG_CRYPTO_SEQIV is not set | ||
2602 | + | ||
2603 | +# | ||
2604 | +# Block modes | ||
2605 | +# | ||
2606 | +CONFIG_CRYPTO_CBC=y | ||
2607 | +# CONFIG_CRYPTO_CTR is not set | ||
2608 | +# CONFIG_CRYPTO_CTS is not set | ||
2609 | +CONFIG_CRYPTO_ECB=y | ||
2610 | +# CONFIG_CRYPTO_LRW is not set | ||
2611 | +# CONFIG_CRYPTO_PCBC is not set | ||
2612 | +# CONFIG_CRYPTO_XTS is not set | ||
2613 | + | ||
2614 | +# | ||
2615 | +# Hash modes | ||
2616 | +# | ||
2617 | +# CONFIG_CRYPTO_HMAC is not set | ||
2618 | +# CONFIG_CRYPTO_XCBC is not set | ||
2619 | +# CONFIG_CRYPTO_VMAC is not set | ||
2620 | + | ||
2621 | +# | ||
2622 | +# Digest | ||
2623 | +# | ||
2624 | +# CONFIG_CRYPTO_CRC32C is not set | ||
2625 | +# CONFIG_CRYPTO_GHASH is not set | ||
2626 | +# CONFIG_CRYPTO_MD4 is not set | ||
2627 | +# CONFIG_CRYPTO_MD5 is not set | ||
2628 | +CONFIG_CRYPTO_MICHAEL_MIC=y | ||
2629 | +# CONFIG_CRYPTO_RMD128 is not set | ||
2630 | +# CONFIG_CRYPTO_RMD160 is not set | ||
2631 | +# CONFIG_CRYPTO_RMD256 is not set | ||
2632 | +# CONFIG_CRYPTO_RMD320 is not set | ||
2633 | +# CONFIG_CRYPTO_SHA1 is not set | ||
2634 | +# CONFIG_CRYPTO_SHA256 is not set | ||
2635 | +# CONFIG_CRYPTO_SHA512 is not set | ||
2636 | +# CONFIG_CRYPTO_TGR192 is not set | ||
2637 | +# CONFIG_CRYPTO_WP512 is not set | ||
2638 | + | ||
2639 | +# | ||
2640 | +# Ciphers | ||
2641 | +# | ||
2642 | +CONFIG_CRYPTO_AES=y | ||
2643 | +# CONFIG_CRYPTO_ANUBIS is not set | ||
2644 | +CONFIG_CRYPTO_ARC4=y | ||
2645 | +# CONFIG_CRYPTO_BLOWFISH is not set | ||
2646 | +# CONFIG_CRYPTO_CAMELLIA is not set | ||
2647 | +# CONFIG_CRYPTO_CAST5 is not set | ||
2648 | +# CONFIG_CRYPTO_CAST6 is not set | ||
2649 | +# CONFIG_CRYPTO_DES is not set | ||
2650 | +# CONFIG_CRYPTO_FCRYPT is not set | ||
2651 | +# CONFIG_CRYPTO_KHAZAD is not set | ||
2652 | +# CONFIG_CRYPTO_SALSA20 is not set | ||
2653 | +# CONFIG_CRYPTO_SEED is not set | ||
2654 | +# CONFIG_CRYPTO_SERPENT is not set | ||
2655 | +# CONFIG_CRYPTO_TEA is not set | ||
2656 | +# CONFIG_CRYPTO_TWOFISH is not set | ||
2657 | + | ||
2658 | +# | ||
2659 | +# Compression | ||
2660 | +# | ||
2661 | +CONFIG_CRYPTO_DEFLATE=y | ||
2662 | +# CONFIG_CRYPTO_ZLIB is not set | ||
2663 | +CONFIG_CRYPTO_LZO=y | ||
2664 | + | ||
2665 | +# | ||
2666 | +# Random Number Generation | ||
2667 | +# | ||
2668 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
2669 | +# CONFIG_CRYPTO_USER_API_HASH is not set | ||
2670 | +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set | ||
2671 | +CONFIG_CRYPTO_HW=y | ||
2672 | +# CONFIG_BINARY_PRINTF is not set | ||
2673 | + | ||
2674 | +# | ||
2675 | +# Library routines | ||
2676 | +# | ||
2677 | +CONFIG_BITREVERSE=y | ||
2678 | +CONFIG_RATIONAL=y | ||
2679 | +CONFIG_CRC_CCITT=m | ||
2680 | +CONFIG_CRC16=y | ||
2681 | +# CONFIG_CRC_T10DIF is not set | ||
2682 | +# CONFIG_CRC_ITU_T is not set | ||
2683 | +CONFIG_CRC32=y | ||
2684 | +# CONFIG_CRC7 is not set | ||
2685 | +# CONFIG_LIBCRC32C is not set | ||
2686 | +CONFIG_ZLIB_INFLATE=y | ||
2687 | +CONFIG_ZLIB_DEFLATE=y | ||
2688 | +CONFIG_LZO_COMPRESS=y | ||
2689 | +CONFIG_LZO_DECOMPRESS=y | ||
2690 | +# CONFIG_XZ_DEC is not set | ||
2691 | +# CONFIG_XZ_DEC_BCJ is not set | ||
2692 | +CONFIG_DECOMPRESS_GZIP=y | ||
2693 | +CONFIG_GENERIC_ALLOCATOR=y | ||
2694 | +CONFIG_HAS_IOMEM=y | ||
2695 | +CONFIG_HAS_IOPORT=y | ||
2696 | +CONFIG_HAS_DMA=y | ||
2697 | +CONFIG_CPU_RMAP=y | ||
2698 | +CONFIG_NLATTR=y | ||
2699 | +# CONFIG_AVERAGE is not set | ||
2700 | diff --git a/arch/arm/configs/qmx6_updater_defconfig b/arch/arm/configs/qmx6_updater_defconfig | ||
2701 | new file mode 100644 | ||
2702 | index 0000000..0b0c165 | ||
2703 | --- /dev/null | ||
2704 | +++ b/arch/arm/configs/qmx6_updater_defconfig | ||
2705 | @@ -0,0 +1,2367 @@ | ||
2706 | +# | ||
2707 | +# Automatically generated make config: don't edit | ||
2708 | +# Linux/arm 3.0.15 Kernel Configuration | ||
2709 | +# | ||
2710 | +CONFIG_ARM=y | ||
2711 | +CONFIG_HAVE_PWM=y | ||
2712 | +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
2713 | +CONFIG_HAVE_SCHED_CLOCK=y | ||
2714 | +CONFIG_GENERIC_GPIO=y | ||
2715 | +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set | ||
2716 | +CONFIG_GENERIC_CLOCKEVENTS=y | ||
2717 | +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y | ||
2718 | +CONFIG_KTIME_SCALAR=y | ||
2719 | +CONFIG_HAVE_PROC_CPU=y | ||
2720 | +CONFIG_STACKTRACE_SUPPORT=y | ||
2721 | +CONFIG_LOCKDEP_SUPPORT=y | ||
2722 | +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
2723 | +CONFIG_HARDIRQS_SW_RESEND=y | ||
2724 | +CONFIG_GENERIC_IRQ_PROBE=y | ||
2725 | +CONFIG_GENERIC_LOCKBREAK=y | ||
2726 | +CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
2727 | +CONFIG_ARCH_HAS_CPUFREQ=y | ||
2728 | +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
2729 | +CONFIG_GENERIC_HWEIGHT=y | ||
2730 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
2731 | +CONFIG_ZONE_DMA=y | ||
2732 | +CONFIG_NEED_DMA_MAP_STATE=y | ||
2733 | +CONFIG_FIQ=y | ||
2734 | +CONFIG_VECTORS_BASE=0xffff0000 | ||
2735 | +# CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
2736 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
2737 | +CONFIG_HAVE_IRQ_WORK=y | ||
2738 | +CONFIG_IRQ_WORK=y | ||
2739 | + | ||
2740 | +# | ||
2741 | +# General setup | ||
2742 | +# | ||
2743 | +CONFIG_EXPERIMENTAL=y | ||
2744 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
2745 | +CONFIG_CROSS_COMPILE="" | ||
2746 | +CONFIG_LOCALVERSION="" | ||
2747 | +CONFIG_LOCALVERSION_AUTO=y | ||
2748 | +CONFIG_HAVE_KERNEL_GZIP=y | ||
2749 | +CONFIG_HAVE_KERNEL_LZMA=y | ||
2750 | +CONFIG_HAVE_KERNEL_LZO=y | ||
2751 | +CONFIG_KERNEL_GZIP=y | ||
2752 | +# CONFIG_KERNEL_LZMA is not set | ||
2753 | +# CONFIG_KERNEL_LZO is not set | ||
2754 | +CONFIG_DEFAULT_HOSTNAME="(none)" | ||
2755 | +CONFIG_SWAP=y | ||
2756 | +CONFIG_SYSVIPC=y | ||
2757 | +CONFIG_SYSVIPC_SYSCTL=y | ||
2758 | +# CONFIG_POSIX_MQUEUE is not set | ||
2759 | +# CONFIG_BSD_PROCESS_ACCT is not set | ||
2760 | +# CONFIG_FHANDLE is not set | ||
2761 | +# CONFIG_TASKSTATS is not set | ||
2762 | +# CONFIG_AUDIT is not set | ||
2763 | +CONFIG_HAVE_GENERIC_HARDIRQS=y | ||
2764 | + | ||
2765 | +# | ||
2766 | +# IRQ subsystem | ||
2767 | +# | ||
2768 | +CONFIG_GENERIC_HARDIRQS=y | ||
2769 | +CONFIG_HAVE_SPARSE_IRQ=y | ||
2770 | +CONFIG_GENERIC_IRQ_SHOW=y | ||
2771 | +# CONFIG_SPARSE_IRQ is not set | ||
2772 | + | ||
2773 | +# | ||
2774 | +# RCU Subsystem | ||
2775 | +# | ||
2776 | +CONFIG_TREE_PREEMPT_RCU=y | ||
2777 | +CONFIG_PREEMPT_RCU=y | ||
2778 | +# CONFIG_RCU_TRACE is not set | ||
2779 | +CONFIG_RCU_FANOUT=32 | ||
2780 | +# CONFIG_RCU_FANOUT_EXACT is not set | ||
2781 | +# CONFIG_TREE_RCU_TRACE is not set | ||
2782 | +# CONFIG_RCU_BOOST is not set | ||
2783 | +CONFIG_IKCONFIG=y | ||
2784 | +CONFIG_IKCONFIG_PROC=y | ||
2785 | +CONFIG_LOG_BUF_SHIFT=14 | ||
2786 | +# CONFIG_CGROUPS is not set | ||
2787 | +# CONFIG_NAMESPACES is not set | ||
2788 | +# CONFIG_SCHED_AUTOGROUP is not set | ||
2789 | +# CONFIG_SYSFS_DEPRECATED is not set | ||
2790 | +# CONFIG_RELAY is not set | ||
2791 | +CONFIG_BLK_DEV_INITRD=y | ||
2792 | +CONFIG_INITRAMFS_SOURCE="" | ||
2793 | +CONFIG_RD_GZIP=y | ||
2794 | +# CONFIG_RD_BZIP2 is not set | ||
2795 | +# CONFIG_RD_LZMA is not set | ||
2796 | +# CONFIG_RD_XZ is not set | ||
2797 | +# CONFIG_RD_LZO is not set | ||
2798 | +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
2799 | +CONFIG_SYSCTL=y | ||
2800 | +CONFIG_ANON_INODES=y | ||
2801 | +CONFIG_EXPERT=y | ||
2802 | +CONFIG_UID16=y | ||
2803 | +CONFIG_SYSCTL_SYSCALL=y | ||
2804 | +CONFIG_KALLSYMS=y | ||
2805 | +CONFIG_HOTPLUG=y | ||
2806 | +CONFIG_PRINTK=y | ||
2807 | +CONFIG_BUG=y | ||
2808 | +CONFIG_ELF_CORE=y | ||
2809 | +CONFIG_BASE_FULL=y | ||
2810 | +CONFIG_FUTEX=y | ||
2811 | +CONFIG_EPOLL=y | ||
2812 | +CONFIG_SIGNALFD=y | ||
2813 | +CONFIG_TIMERFD=y | ||
2814 | +CONFIG_EVENTFD=y | ||
2815 | +CONFIG_SHMEM=y | ||
2816 | +CONFIG_AIO=y | ||
2817 | +CONFIG_EMBEDDED=y | ||
2818 | +CONFIG_HAVE_PERF_EVENTS=y | ||
2819 | +CONFIG_PERF_USE_VMALLOC=y | ||
2820 | + | ||
2821 | +# | ||
2822 | +# Kernel Performance Events And Counters | ||
2823 | +# | ||
2824 | +CONFIG_PERF_EVENTS=y | ||
2825 | +# CONFIG_PERF_COUNTERS is not set | ||
2826 | +CONFIG_VM_EVENT_COUNTERS=y | ||
2827 | +CONFIG_SLUB_DEBUG=y | ||
2828 | +CONFIG_COMPAT_BRK=y | ||
2829 | +# CONFIG_SLAB is not set | ||
2830 | +CONFIG_SLUB=y | ||
2831 | +# CONFIG_SLOB is not set | ||
2832 | +# CONFIG_PROFILING is not set | ||
2833 | +CONFIG_HAVE_OPROFILE=y | ||
2834 | +# CONFIG_KPROBES is not set | ||
2835 | +CONFIG_HAVE_KPROBES=y | ||
2836 | +CONFIG_HAVE_KRETPROBES=y | ||
2837 | +CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
2838 | +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | ||
2839 | +CONFIG_HAVE_CLK=y | ||
2840 | +CONFIG_HAVE_DMA_API_DEBUG=y | ||
2841 | +CONFIG_HAVE_HW_BREAKPOINT=y | ||
2842 | + | ||
2843 | +# | ||
2844 | +# GCOV-based kernel profiling | ||
2845 | +# | ||
2846 | +# CONFIG_GCOV_KERNEL is not set | ||
2847 | +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
2848 | +CONFIG_SLABINFO=y | ||
2849 | +CONFIG_RT_MUTEXES=y | ||
2850 | +CONFIG_BASE_SMALL=0 | ||
2851 | +CONFIG_MODULES=y | ||
2852 | +# CONFIG_MODULE_FORCE_LOAD is not set | ||
2853 | +CONFIG_MODULE_UNLOAD=y | ||
2854 | +CONFIG_MODULE_FORCE_UNLOAD=y | ||
2855 | +CONFIG_MODVERSIONS=y | ||
2856 | +# CONFIG_MODULE_SRCVERSION_ALL is not set | ||
2857 | +CONFIG_STOP_MACHINE=y | ||
2858 | +CONFIG_BLOCK=y | ||
2859 | +CONFIG_LBDAF=y | ||
2860 | +# CONFIG_BLK_DEV_BSG is not set | ||
2861 | +# CONFIG_BLK_DEV_INTEGRITY is not set | ||
2862 | + | ||
2863 | +# | ||
2864 | +# IO Schedulers | ||
2865 | +# | ||
2866 | +CONFIG_IOSCHED_NOOP=y | ||
2867 | +CONFIG_IOSCHED_DEADLINE=y | ||
2868 | +CONFIG_IOSCHED_CFQ=y | ||
2869 | +# CONFIG_DEFAULT_DEADLINE is not set | ||
2870 | +CONFIG_DEFAULT_CFQ=y | ||
2871 | +# CONFIG_DEFAULT_NOOP is not set | ||
2872 | +CONFIG_DEFAULT_IOSCHED="cfq" | ||
2873 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
2874 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
2875 | +# CONFIG_INLINE_SPIN_LOCK is not set | ||
2876 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
2877 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
2878 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
2879 | +# CONFIG_INLINE_SPIN_UNLOCK is not set | ||
2880 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
2881 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
2882 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
2883 | +# CONFIG_INLINE_READ_TRYLOCK is not set | ||
2884 | +# CONFIG_INLINE_READ_LOCK is not set | ||
2885 | +# CONFIG_INLINE_READ_LOCK_BH is not set | ||
2886 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
2887 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
2888 | +# CONFIG_INLINE_READ_UNLOCK is not set | ||
2889 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
2890 | +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
2891 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
2892 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
2893 | +# CONFIG_INLINE_WRITE_LOCK is not set | ||
2894 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
2895 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
2896 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
2897 | +# CONFIG_INLINE_WRITE_UNLOCK is not set | ||
2898 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
2899 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
2900 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
2901 | +CONFIG_MUTEX_SPIN_ON_OWNER=y | ||
2902 | +CONFIG_FREEZER=y | ||
2903 | + | ||
2904 | +# | ||
2905 | +# System Type | ||
2906 | +# | ||
2907 | +CONFIG_MMU=y | ||
2908 | +# CONFIG_ARCH_INTEGRATOR is not set | ||
2909 | +# CONFIG_ARCH_REALVIEW is not set | ||
2910 | +# CONFIG_ARCH_VERSATILE is not set | ||
2911 | +# CONFIG_ARCH_VEXPRESS is not set | ||
2912 | +# CONFIG_ARCH_AT91 is not set | ||
2913 | +# CONFIG_ARCH_BCMRING is not set | ||
2914 | +# CONFIG_ARCH_CLPS711X is not set | ||
2915 | +# CONFIG_ARCH_CNS3XXX is not set | ||
2916 | +# CONFIG_ARCH_GEMINI is not set | ||
2917 | +# CONFIG_ARCH_EBSA110 is not set | ||
2918 | +# CONFIG_ARCH_EP93XX is not set | ||
2919 | +# CONFIG_ARCH_FOOTBRIDGE is not set | ||
2920 | +CONFIG_ARCH_MXC=y | ||
2921 | +# CONFIG_ARCH_MXS is not set | ||
2922 | +# CONFIG_ARCH_NETX is not set | ||
2923 | +# CONFIG_ARCH_H720X is not set | ||
2924 | +# CONFIG_ARCH_IOP13XX is not set | ||
2925 | +# CONFIG_ARCH_IOP32X is not set | ||
2926 | +# CONFIG_ARCH_IOP33X is not set | ||
2927 | +# CONFIG_ARCH_IXP23XX is not set | ||
2928 | +# CONFIG_ARCH_IXP2000 is not set | ||
2929 | +# CONFIG_ARCH_IXP4XX is not set | ||
2930 | +# CONFIG_ARCH_DOVE is not set | ||
2931 | +# CONFIG_ARCH_KIRKWOOD is not set | ||
2932 | +# CONFIG_ARCH_LOKI is not set | ||
2933 | +# CONFIG_ARCH_LPC32XX is not set | ||
2934 | +# CONFIG_ARCH_MV78XX0 is not set | ||
2935 | +# CONFIG_ARCH_ORION5X is not set | ||
2936 | +# CONFIG_ARCH_MMP is not set | ||
2937 | +# CONFIG_ARCH_KS8695 is not set | ||
2938 | +# CONFIG_ARCH_W90X900 is not set | ||
2939 | +# CONFIG_ARCH_NUC93X is not set | ||
2940 | +# CONFIG_ARCH_TEGRA is not set | ||
2941 | +# CONFIG_ARCH_PNX4008 is not set | ||
2942 | +# CONFIG_ARCH_PXA is not set | ||
2943 | +# CONFIG_ARCH_MSM is not set | ||
2944 | +# CONFIG_ARCH_SHMOBILE is not set | ||
2945 | +# CONFIG_ARCH_RPC is not set | ||
2946 | +# CONFIG_ARCH_SA1100 is not set | ||
2947 | +# CONFIG_ARCH_S3C2410 is not set | ||
2948 | +# CONFIG_ARCH_S3C64XX is not set | ||
2949 | +# CONFIG_ARCH_S5P64X0 is not set | ||
2950 | +# CONFIG_ARCH_S5PC100 is not set | ||
2951 | +# CONFIG_ARCH_S5PV210 is not set | ||
2952 | +# CONFIG_ARCH_EXYNOS4 is not set | ||
2953 | +# CONFIG_ARCH_SHARK is not set | ||
2954 | +# CONFIG_ARCH_TCC_926 is not set | ||
2955 | +# CONFIG_ARCH_U300 is not set | ||
2956 | +# CONFIG_ARCH_U8500 is not set | ||
2957 | +# CONFIG_ARCH_NOMADIK is not set | ||
2958 | +# CONFIG_ARCH_DAVINCI is not set | ||
2959 | +# CONFIG_ARCH_OMAP is not set | ||
2960 | +# CONFIG_PLAT_SPEAR is not set | ||
2961 | +# CONFIG_ARCH_VT8500 is not set | ||
2962 | +CONFIG_GPIO_PCA953X=y | ||
2963 | +CONFIG_IMX_HAVE_PLATFORM_DMA=y | ||
2964 | +CONFIG_IMX_HAVE_PLATFORM_MXC_MLB=y | ||
2965 | +CONFIG_IMX_HAVE_PLATFORM_FEC=y | ||
2966 | +CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y | ||
2967 | +CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y | ||
2968 | +CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y | ||
2969 | +CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y | ||
2970 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y | ||
2971 | +CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y | ||
2972 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y | ||
2973 | +CONFIG_IMX_HAVE_PLATFORM_IMX_ESAI=y | ||
2974 | +CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y | ||
2975 | +CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y | ||
2976 | +CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y | ||
2977 | +CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y | ||
2978 | +CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y | ||
2979 | +CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y | ||
2980 | +CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y | ||
2981 | +CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y | ||
2982 | +CONFIG_IMX_HAVE_PLATFORM_AHCI=y | ||
2983 | +CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y | ||
2984 | +CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y | ||
2985 | +CONFIG_IMX_HAVE_PLATFORM_PERFMON=y | ||
2986 | +CONFIG_IMX_HAVE_PLATFORM_LDB=y | ||
2987 | +CONFIG_IMX_HAVE_PLATFORM_IMX_PXP=y | ||
2988 | +# CONFIG_IMX_HAVE_PLATFORM_IMX_EPDC is not set | ||
2989 | +CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y | ||
2990 | +CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y | ||
2991 | +CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y | ||
2992 | +CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y | ||
2993 | +CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y | ||
2994 | +CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y | ||
2995 | +CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y | ||
2996 | +CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y | ||
2997 | +CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI=y | ||
2998 | +CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y | ||
2999 | + | ||
3000 | +# | ||
3001 | +# Freescale MXC Implementations | ||
3002 | +# | ||
3003 | +# CONFIG_ARCH_MX1 is not set | ||
3004 | +# CONFIG_ARCH_MX2 is not set | ||
3005 | +# CONFIG_ARCH_MX25 is not set | ||
3006 | +# CONFIG_ARCH_MX3 is not set | ||
3007 | +# CONFIG_ARCH_MX503 is not set | ||
3008 | +# CONFIG_ARCH_MX51 is not set | ||
3009 | +CONFIG_ARCH_MX6=y | ||
3010 | +CONFIG_ARCH_MX6Q=y | ||
3011 | +CONFIG_FORCE_MAX_ZONEORDER=13 | ||
3012 | +CONFIG_SOC_IMX6Q=y | ||
3013 | +# CONFIG_MACH_MX6Q_ARM2 is not set | ||
3014 | +# CONFIG_MACH_MX6Q_SABRELITE is not set | ||
3015 | +# CONFIG_MACH_MX6Q_SABRESD is not set | ||
3016 | +# CONFIG_MACH_MX6Q_SABREAUTO is not set | ||
3017 | +CONFIG_MACH_MX6Q_QMX6=y | ||
3018 | + | ||
3019 | +# | ||
3020 | +# MX6 Options: | ||
3021 | +# | ||
3022 | +# CONFIG_IMX_PCIE is not set | ||
3023 | +CONFIG_ISP1504_MXC=y | ||
3024 | +# CONFIG_MXC_IRQ_PRIOR is not set | ||
3025 | +CONFIG_MXC_PWM=y | ||
3026 | +# CONFIG_MXC_DEBUG_BOARD is not set | ||
3027 | +CONFIG_ARCH_MXC_IOMUX_V3=y | ||
3028 | +CONFIG_ARCH_MXC_AUDMUX_V2=y | ||
3029 | +CONFIG_IRAM_ALLOC=y | ||
3030 | +CONFIG_CLK_DEBUG=y | ||
3031 | +CONFIG_DMA_ZONE_SIZE=184 | ||
3032 | + | ||
3033 | +# | ||
3034 | +# System MMU | ||
3035 | +# | ||
3036 | + | ||
3037 | +# | ||
3038 | +# Processor Type | ||
3039 | +# | ||
3040 | +CONFIG_CPU_V7=y | ||
3041 | +CONFIG_CPU_32v6K=y | ||
3042 | +CONFIG_CPU_32v7=y | ||
3043 | +CONFIG_CPU_ABRT_EV7=y | ||
3044 | +CONFIG_CPU_PABRT_V7=y | ||
3045 | +CONFIG_CPU_CACHE_V7=y | ||
3046 | +CONFIG_CPU_CACHE_VIPT=y | ||
3047 | +CONFIG_CPU_COPY_V6=y | ||
3048 | +CONFIG_CPU_TLB_V7=y | ||
3049 | +CONFIG_CPU_HAS_ASID=y | ||
3050 | +CONFIG_CPU_CP15=y | ||
3051 | +CONFIG_CPU_CP15_MMU=y | ||
3052 | + | ||
3053 | +# | ||
3054 | +# Processor Features | ||
3055 | +# | ||
3056 | +CONFIG_ARM_THUMB=y | ||
3057 | +# CONFIG_ARM_THUMBEE is not set | ||
3058 | +# CONFIG_SWP_EMULATE is not set | ||
3059 | +# CONFIG_CPU_ICACHE_DISABLE is not set | ||
3060 | +# CONFIG_CPU_DCACHE_DISABLE is not set | ||
3061 | +# CONFIG_CPU_BPREDICT_DISABLE is not set | ||
3062 | +CONFIG_OUTER_CACHE=y | ||
3063 | +CONFIG_OUTER_CACHE_SYNC=y | ||
3064 | +CONFIG_CACHE_L2X0=y | ||
3065 | +CONFIG_CACHE_PL310=y | ||
3066 | +CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
3067 | +CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
3068 | +CONFIG_CPU_HAS_PMU=y | ||
3069 | +# CONFIG_ARM_ERRATA_430973 is not set | ||
3070 | +# CONFIG_ARM_ERRATA_458693 is not set | ||
3071 | +# CONFIG_ARM_ERRATA_460075 is not set | ||
3072 | +# CONFIG_ARM_ERRATA_742230 is not set | ||
3073 | +# CONFIG_ARM_ERRATA_742231 is not set | ||
3074 | +# CONFIG_PL310_ERRATA_588369 is not set | ||
3075 | +# CONFIG_ARM_ERRATA_720789 is not set | ||
3076 | +# CONFIG_PL310_ERRATA_727915 is not set | ||
3077 | +CONFIG_ARM_ERRATA_743622=y | ||
3078 | +CONFIG_ARM_ERRATA_751472=y | ||
3079 | +# CONFIG_ARM_ERRATA_753970 is not set | ||
3080 | +CONFIG_ARM_ERRATA_754322=y | ||
3081 | +# CONFIG_ARM_ERRATA_754327 is not set | ||
3082 | +CONFIG_ARM_GIC=y | ||
3083 | + | ||
3084 | +# | ||
3085 | +# Bus support | ||
3086 | +# | ||
3087 | +# CONFIG_PCI_SYSCALL is not set | ||
3088 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | ||
3089 | +# CONFIG_PCCARD is not set | ||
3090 | +# CONFIG_ARM_ERRATA_764369 is not set | ||
3091 | +# CONFIG_PL310_ERRATA_769419 is not set | ||
3092 | + | ||
3093 | +# | ||
3094 | +# Kernel Features | ||
3095 | +# | ||
3096 | +CONFIG_TICK_ONESHOT=y | ||
3097 | +CONFIG_NO_HZ=y | ||
3098 | +CONFIG_HIGH_RES_TIMERS=y | ||
3099 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
3100 | +CONFIG_SMP=y | ||
3101 | +CONFIG_SMP_ON_UP=y | ||
3102 | +CONFIG_HAVE_ARM_SCU=y | ||
3103 | +CONFIG_HAVE_ARM_TWD=y | ||
3104 | +# CONFIG_VMSPLIT_3G is not set | ||
3105 | +CONFIG_VMSPLIT_2G=y | ||
3106 | +# CONFIG_VMSPLIT_1G is not set | ||
3107 | +CONFIG_PAGE_OFFSET=0x80000000 | ||
3108 | +CONFIG_NR_CPUS=4 | ||
3109 | +CONFIG_HOTPLUG_CPU=y | ||
3110 | +CONFIG_LOCAL_TIMERS=y | ||
3111 | +# CONFIG_PREEMPT_NONE is not set | ||
3112 | +# CONFIG_PREEMPT_VOLUNTARY is not set | ||
3113 | +CONFIG_PREEMPT=y | ||
3114 | +CONFIG_HZ=100 | ||
3115 | +# CONFIG_THUMB2_KERNEL is not set | ||
3116 | +CONFIG_AEABI=y | ||
3117 | +# CONFIG_OABI_COMPAT is not set | ||
3118 | +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
3119 | +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
3120 | +CONFIG_HAVE_ARCH_PFN_VALID=y | ||
3121 | +CONFIG_HIGHMEM=y | ||
3122 | +# CONFIG_HIGHPTE is not set | ||
3123 | +CONFIG_HW_PERF_EVENTS=y | ||
3124 | +CONFIG_SELECT_MEMORY_MODEL=y | ||
3125 | +CONFIG_FLATMEM_MANUAL=y | ||
3126 | +CONFIG_FLATMEM=y | ||
3127 | +CONFIG_FLAT_NODE_MEM_MAP=y | ||
3128 | +CONFIG_HAVE_MEMBLOCK=y | ||
3129 | +CONFIG_PAGEFLAGS_EXTENDED=y | ||
3130 | +CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
3131 | +# CONFIG_COMPACTION is not set | ||
3132 | +# CONFIG_PHYS_ADDR_T_64BIT is not set | ||
3133 | +CONFIG_ZONE_DMA_FLAG=1 | ||
3134 | +CONFIG_BOUNCE=y | ||
3135 | +CONFIG_VIRT_TO_BUS=y | ||
3136 | +# CONFIG_KSM is not set | ||
3137 | +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
3138 | +# CONFIG_CLEANCACHE is not set | ||
3139 | +CONFIG_ALIGNMENT_TRAP=y | ||
3140 | +# CONFIG_UACCESS_WITH_MEMCPY is not set | ||
3141 | +# CONFIG_SECCOMP is not set | ||
3142 | +# CONFIG_CC_STACKPROTECTOR is not set | ||
3143 | +# CONFIG_DEPRECATED_PARAM_STRUCT is not set | ||
3144 | + | ||
3145 | +# | ||
3146 | +# Boot options | ||
3147 | +# | ||
3148 | +# CONFIG_USE_OF is not set | ||
3149 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
3150 | +CONFIG_ZBOOT_ROM_BSS=0x0 | ||
3151 | +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" | ||
3152 | +CONFIG_CMDLINE_FROM_BOOTLOADER=y | ||
3153 | +# CONFIG_CMDLINE_EXTEND is not set | ||
3154 | +# CONFIG_CMDLINE_FORCE is not set | ||
3155 | +# CONFIG_XIP_KERNEL is not set | ||
3156 | +# CONFIG_KEXEC is not set | ||
3157 | +# CONFIG_CRASH_DUMP is not set | ||
3158 | +# CONFIG_AUTO_ZRELADDR is not set | ||
3159 | + | ||
3160 | +# | ||
3161 | +# CPU Power Management | ||
3162 | +# | ||
3163 | + | ||
3164 | +# | ||
3165 | +# CPU Frequency scaling | ||
3166 | +# | ||
3167 | +CONFIG_CPU_FREQ=y | ||
3168 | +CONFIG_CPU_FREQ_TABLE=y | ||
3169 | +CONFIG_CPU_FREQ_STAT=y | ||
3170 | +# CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
3171 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
3172 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
3173 | +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y | ||
3174 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
3175 | +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
3176 | +# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set | ||
3177 | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
3178 | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
3179 | +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
3180 | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | ||
3181 | +CONFIG_CPU_FREQ_IMX=y | ||
3182 | +# CONFIG_CPU_IDLE is not set | ||
3183 | + | ||
3184 | +# | ||
3185 | +# Floating point emulation | ||
3186 | +# | ||
3187 | + | ||
3188 | +# | ||
3189 | +# At least one emulation must be selected | ||
3190 | +# | ||
3191 | +CONFIG_VFP=y | ||
3192 | +CONFIG_VFPv3=y | ||
3193 | +CONFIG_NEON=y | ||
3194 | + | ||
3195 | +# | ||
3196 | +# Userspace binary formats | ||
3197 | +# | ||
3198 | +CONFIG_BINFMT_ELF=y | ||
3199 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
3200 | +CONFIG_HAVE_AOUT=y | ||
3201 | +# CONFIG_BINFMT_AOUT is not set | ||
3202 | +# CONFIG_BINFMT_MISC is not set | ||
3203 | + | ||
3204 | +# | ||
3205 | +# Power management options | ||
3206 | +# | ||
3207 | +CONFIG_SUSPEND=y | ||
3208 | +# CONFIG_PM_TEST_SUSPEND is not set | ||
3209 | +CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y | ||
3210 | +CONFIG_SUSPEND_FREEZER=y | ||
3211 | +CONFIG_PM_SLEEP=y | ||
3212 | +CONFIG_PM_SLEEP_SMP=y | ||
3213 | +CONFIG_PM_RUNTIME=y | ||
3214 | +CONFIG_PM=y | ||
3215 | +CONFIG_PM_DEBUG=y | ||
3216 | +# CONFIG_PM_ADVANCED_DEBUG is not set | ||
3217 | +CONFIG_CAN_PM_TRACE=y | ||
3218 | +CONFIG_APM_EMULATION=y | ||
3219 | +CONFIG_PM_RUNTIME_CLK=y | ||
3220 | +CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
3221 | +CONFIG_NET=y | ||
3222 | + | ||
3223 | +# | ||
3224 | +# Networking options | ||
3225 | +# | ||
3226 | +CONFIG_PACKET=y | ||
3227 | +CONFIG_UNIX=y | ||
3228 | +CONFIG_XFRM=y | ||
3229 | +# CONFIG_XFRM_USER is not set | ||
3230 | +# CONFIG_XFRM_SUB_POLICY is not set | ||
3231 | +# CONFIG_XFRM_MIGRATE is not set | ||
3232 | +# CONFIG_XFRM_STATISTICS is not set | ||
3233 | +# CONFIG_NET_KEY is not set | ||
3234 | +CONFIG_INET=y | ||
3235 | +CONFIG_IP_MULTICAST=y | ||
3236 | +# CONFIG_IP_ADVANCED_ROUTER is not set | ||
3237 | +CONFIG_IP_PNP=y | ||
3238 | +CONFIG_IP_PNP_DHCP=y | ||
3239 | +CONFIG_IP_PNP_BOOTP=y | ||
3240 | +# CONFIG_IP_PNP_RARP is not set | ||
3241 | +# CONFIG_NET_IPIP is not set | ||
3242 | +# CONFIG_NET_IPGRE_DEMUX is not set | ||
3243 | +# CONFIG_IP_MROUTE is not set | ||
3244 | +# CONFIG_ARPD is not set | ||
3245 | +# CONFIG_SYN_COOKIES is not set | ||
3246 | +# CONFIG_INET_AH is not set | ||
3247 | +# CONFIG_INET_ESP is not set | ||
3248 | +# CONFIG_INET_IPCOMP is not set | ||
3249 | +# CONFIG_INET_XFRM_TUNNEL is not set | ||
3250 | +# CONFIG_INET_TUNNEL is not set | ||
3251 | +CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
3252 | +CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
3253 | +CONFIG_INET_XFRM_MODE_BEET=y | ||
3254 | +# CONFIG_INET_LRO is not set | ||
3255 | +CONFIG_INET_DIAG=y | ||
3256 | +CONFIG_INET_TCP_DIAG=y | ||
3257 | +# CONFIG_TCP_CONG_ADVANCED is not set | ||
3258 | +CONFIG_TCP_CONG_CUBIC=y | ||
3259 | +CONFIG_DEFAULT_TCP_CONG="cubic" | ||
3260 | +# CONFIG_TCP_MD5SIG is not set | ||
3261 | +# CONFIG_IPV6 is not set | ||
3262 | +# CONFIG_NETWORK_SECMARK is not set | ||
3263 | +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set | ||
3264 | +# CONFIG_NETFILTER is not set | ||
3265 | +# CONFIG_IP_DCCP is not set | ||
3266 | +# CONFIG_IP_SCTP is not set | ||
3267 | +# CONFIG_RDS is not set | ||
3268 | +# CONFIG_TIPC is not set | ||
3269 | +# CONFIG_ATM is not set | ||
3270 | +# CONFIG_L2TP is not set | ||
3271 | +# CONFIG_BRIDGE is not set | ||
3272 | +# CONFIG_NET_DSA is not set | ||
3273 | +# CONFIG_VLAN_8021Q is not set | ||
3274 | +# CONFIG_DECNET is not set | ||
3275 | +# CONFIG_LLC2 is not set | ||
3276 | +# CONFIG_IPX is not set | ||
3277 | +# CONFIG_ATALK is not set | ||
3278 | +# CONFIG_X25 is not set | ||
3279 | +# CONFIG_LAPB is not set | ||
3280 | +# CONFIG_ECONET is not set | ||
3281 | +# CONFIG_WAN_ROUTER is not set | ||
3282 | +# CONFIG_PHONET is not set | ||
3283 | +# CONFIG_IEEE802154 is not set | ||
3284 | +# CONFIG_NET_SCHED is not set | ||
3285 | +# CONFIG_DCB is not set | ||
3286 | +# CONFIG_BATMAN_ADV is not set | ||
3287 | +CONFIG_RPS=y | ||
3288 | +CONFIG_RFS_ACCEL=y | ||
3289 | +CONFIG_XPS=y | ||
3290 | + | ||
3291 | +# | ||
3292 | +# Network testing | ||
3293 | +# | ||
3294 | +# CONFIG_NET_PKTGEN is not set | ||
3295 | +# CONFIG_HAMRADIO is not set | ||
3296 | +CONFIG_CAN=y | ||
3297 | +CONFIG_CAN_RAW=y | ||
3298 | +CONFIG_CAN_BCM=y | ||
3299 | + | ||
3300 | +# | ||
3301 | +# CAN Device Drivers | ||
3302 | +# | ||
3303 | +CONFIG_CAN_VCAN=y | ||
3304 | +# CONFIG_CAN_SLCAN is not set | ||
3305 | +# CONFIG_CAN_DEV is not set | ||
3306 | +CONFIG_HAVE_CAN_FLEXCAN=y | ||
3307 | +CONFIG_CAN_DEBUG_DEVICES=y | ||
3308 | +# CONFIG_IRDA is not set | ||
3309 | +CONFIG_BT=y | ||
3310 | +CONFIG_BT_L2CAP=y | ||
3311 | +CONFIG_BT_SCO=y | ||
3312 | +CONFIG_BT_RFCOMM=y | ||
3313 | +CONFIG_BT_RFCOMM_TTY=y | ||
3314 | +CONFIG_BT_BNEP=y | ||
3315 | +CONFIG_BT_BNEP_MC_FILTER=y | ||
3316 | +CONFIG_BT_BNEP_PROTO_FILTER=y | ||
3317 | +CONFIG_BT_HIDP=y | ||
3318 | + | ||
3319 | +# | ||
3320 | +# Bluetooth device drivers | ||
3321 | +# | ||
3322 | +CONFIG_BT_HCIBTUSB=y | ||
3323 | +# CONFIG_BT_HCIBTSDIO is not set | ||
3324 | +# CONFIG_BT_HCIUART is not set | ||
3325 | +# CONFIG_BT_HCIBCM203X is not set | ||
3326 | +# CONFIG_BT_HCIBPA10X is not set | ||
3327 | +# CONFIG_BT_HCIBFUSB is not set | ||
3328 | +CONFIG_BT_HCIVHCI=y | ||
3329 | +# CONFIG_BT_MRVL is not set | ||
3330 | +# CONFIG_BT_ATH3K is not set | ||
3331 | +# CONFIG_AF_RXRPC is not set | ||
3332 | +CONFIG_WIRELESS=y | ||
3333 | +# CONFIG_CFG80211 is not set | ||
3334 | +# CONFIG_LIB80211 is not set | ||
3335 | + | ||
3336 | +# | ||
3337 | +# CFG80211 needs to be enabled for MAC80211 | ||
3338 | +# | ||
3339 | +# CONFIG_WIMAX is not set | ||
3340 | +CONFIG_RFKILL=y | ||
3341 | +CONFIG_RFKILL_INPUT=y | ||
3342 | +# CONFIG_RFKILL_REGULATOR is not set | ||
3343 | +# CONFIG_RFKILL_GPIO is not set | ||
3344 | +# CONFIG_NET_9P is not set | ||
3345 | +# CONFIG_CAIF is not set | ||
3346 | +# CONFIG_CEPH_LIB is not set | ||
3347 | + | ||
3348 | +# | ||
3349 | +# Device Drivers | ||
3350 | +# | ||
3351 | + | ||
3352 | +# | ||
3353 | +# Generic Driver Options | ||
3354 | +# | ||
3355 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
3356 | +# CONFIG_DEVTMPFS is not set | ||
3357 | +CONFIG_STANDALONE=y | ||
3358 | +CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
3359 | +CONFIG_FW_LOADER=y | ||
3360 | +CONFIG_FIRMWARE_IN_KERNEL=y | ||
3361 | +CONFIG_EXTRA_FIRMWARE="" | ||
3362 | +# CONFIG_SYS_HYPERVISOR is not set | ||
3363 | +CONFIG_CONNECTOR=y | ||
3364 | +CONFIG_PROC_EVENTS=y | ||
3365 | +CONFIG_MTD=y | ||
3366 | +# CONFIG_MTD_DEBUG is not set | ||
3367 | +# CONFIG_MTD_TESTS is not set | ||
3368 | +# CONFIG_MTD_REDBOOT_PARTS is not set | ||
3369 | +CONFIG_MTD_CMDLINE_PARTS=y | ||
3370 | +# CONFIG_MTD_AFS_PARTS is not set | ||
3371 | +# CONFIG_MTD_AR7_PARTS is not set | ||
3372 | + | ||
3373 | +# | ||
3374 | +# User Modules And Translation Layers | ||
3375 | +# | ||
3376 | +CONFIG_MTD_CHAR=y | ||
3377 | +CONFIG_MTD_BLKDEVS=y | ||
3378 | +CONFIG_MTD_BLOCK=y | ||
3379 | +# CONFIG_FTL is not set | ||
3380 | +# CONFIG_NFTL is not set | ||
3381 | +# CONFIG_INFTL is not set | ||
3382 | +# CONFIG_RFD_FTL is not set | ||
3383 | +# CONFIG_SSFDC is not set | ||
3384 | +# CONFIG_SM_FTL is not set | ||
3385 | +# CONFIG_MTD_OOPS is not set | ||
3386 | +# CONFIG_MTD_SWAP is not set | ||
3387 | + | ||
3388 | +# | ||
3389 | +# RAM/ROM/Flash chip drivers | ||
3390 | +# | ||
3391 | +# CONFIG_MTD_CFI is not set | ||
3392 | +# CONFIG_MTD_JEDECPROBE is not set | ||
3393 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
3394 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
3395 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
3396 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
3397 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
3398 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
3399 | +CONFIG_MTD_CFI_I1=y | ||
3400 | +CONFIG_MTD_CFI_I2=y | ||
3401 | +# CONFIG_MTD_CFI_I4 is not set | ||
3402 | +# CONFIG_MTD_CFI_I8 is not set | ||
3403 | +# CONFIG_MTD_RAM is not set | ||
3404 | +# CONFIG_MTD_ROM is not set | ||
3405 | +# CONFIG_MTD_ABSENT is not set | ||
3406 | + | ||
3407 | +# | ||
3408 | +# Mapping drivers for chip access | ||
3409 | +# | ||
3410 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
3411 | +# CONFIG_MTD_PLATRAM is not set | ||
3412 | + | ||
3413 | +# | ||
3414 | +# Self-contained MTD device drivers | ||
3415 | +# | ||
3416 | +# CONFIG_MTD_DATAFLASH is not set | ||
3417 | +CONFIG_MTD_M25P80=y | ||
3418 | +CONFIG_M25PXX_USE_FAST_READ=y | ||
3419 | +# CONFIG_MTD_SST25L is not set | ||
3420 | +# CONFIG_MTD_SLRAM is not set | ||
3421 | +# CONFIG_MTD_PHRAM is not set | ||
3422 | +# CONFIG_MTD_MTDRAM is not set | ||
3423 | +# CONFIG_MTD_BLOCK2MTD is not set | ||
3424 | + | ||
3425 | +# | ||
3426 | +# Disk-On-Chip Device Drivers | ||
3427 | +# | ||
3428 | +# CONFIG_MTD_DOC2000 is not set | ||
3429 | +# CONFIG_MTD_DOC2001 is not set | ||
3430 | +# CONFIG_MTD_DOC2001PLUS is not set | ||
3431 | +CONFIG_MTD_NAND_ECC=y | ||
3432 | +# CONFIG_MTD_NAND_ECC_SMC is not set | ||
3433 | +CONFIG_MTD_NAND=y | ||
3434 | +# CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
3435 | +# CONFIG_MTD_NAND_ECC_BCH is not set | ||
3436 | +# CONFIG_MTD_SM_COMMON is not set | ||
3437 | +# CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
3438 | +# CONFIG_MTD_NAND_GPIO is not set | ||
3439 | +CONFIG_MTD_NAND_IDS=y | ||
3440 | +# CONFIG_MTD_NAND_DISKONCHIP is not set | ||
3441 | +# CONFIG_MTD_NAND_NANDSIM is not set | ||
3442 | +# CONFIG_MTD_NAND_GPMI_NAND is not set | ||
3443 | +# CONFIG_MTD_NAND_PLATFORM is not set | ||
3444 | +# CONFIG_MTD_ALAUDA is not set | ||
3445 | +# CONFIG_MTD_ONENAND is not set | ||
3446 | + | ||
3447 | +# | ||
3448 | +# LPDDR flash memory drivers | ||
3449 | +# | ||
3450 | +# CONFIG_MTD_LPDDR is not set | ||
3451 | +CONFIG_MTD_UBI=y | ||
3452 | +CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
3453 | +CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
3454 | +# CONFIG_MTD_UBI_GLUEBI is not set | ||
3455 | +# CONFIG_MTD_UBI_DEBUG is not set | ||
3456 | +# CONFIG_PARPORT is not set | ||
3457 | +CONFIG_BLK_DEV=y | ||
3458 | +# CONFIG_BLK_DEV_COW_COMMON is not set | ||
3459 | +CONFIG_BLK_DEV_LOOP=y | ||
3460 | +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
3461 | +# CONFIG_BLK_DEV_DRBD is not set | ||
3462 | +# CONFIG_BLK_DEV_NBD is not set | ||
3463 | +# CONFIG_BLK_DEV_UB is not set | ||
3464 | +# CONFIG_BLK_DEV_RAM is not set | ||
3465 | +# CONFIG_CDROM_PKTCDVD is not set | ||
3466 | +# CONFIG_ATA_OVER_ETH is not set | ||
3467 | +# CONFIG_MG_DISK is not set | ||
3468 | +# CONFIG_BLK_DEV_RBD is not set | ||
3469 | +# CONFIG_SENSORS_LIS3LV02D is not set | ||
3470 | +# CONFIG_MISC_DEVICES is not set | ||
3471 | +CONFIG_HAVE_IDE=y | ||
3472 | +# CONFIG_IDE is not set | ||
3473 | + | ||
3474 | +# | ||
3475 | +# SCSI device support | ||
3476 | +# | ||
3477 | +CONFIG_SCSI_MOD=y | ||
3478 | +# CONFIG_RAID_ATTRS is not set | ||
3479 | +CONFIG_SCSI=y | ||
3480 | +CONFIG_SCSI_DMA=y | ||
3481 | +# CONFIG_SCSI_TGT is not set | ||
3482 | +# CONFIG_SCSI_NETLINK is not set | ||
3483 | +CONFIG_SCSI_PROC_FS=y | ||
3484 | + | ||
3485 | +# | ||
3486 | +# SCSI support type (disk, tape, CD-ROM) | ||
3487 | +# | ||
3488 | +CONFIG_BLK_DEV_SD=y | ||
3489 | +# CONFIG_CHR_DEV_ST is not set | ||
3490 | +# CONFIG_CHR_DEV_OSST is not set | ||
3491 | +# CONFIG_BLK_DEV_SR is not set | ||
3492 | +# CONFIG_CHR_DEV_SG is not set | ||
3493 | +# CONFIG_CHR_DEV_SCH is not set | ||
3494 | +CONFIG_SCSI_MULTI_LUN=y | ||
3495 | +# CONFIG_SCSI_CONSTANTS is not set | ||
3496 | +# CONFIG_SCSI_LOGGING is not set | ||
3497 | +# CONFIG_SCSI_SCAN_ASYNC is not set | ||
3498 | +CONFIG_SCSI_WAIT_SCAN=m | ||
3499 | + | ||
3500 | +# | ||
3501 | +# SCSI Transports | ||
3502 | +# | ||
3503 | +# CONFIG_SCSI_SPI_ATTRS is not set | ||
3504 | +# CONFIG_SCSI_FC_ATTRS is not set | ||
3505 | +# CONFIG_SCSI_ISCSI_ATTRS is not set | ||
3506 | +# CONFIG_SCSI_SAS_ATTRS is not set | ||
3507 | +# CONFIG_SCSI_SAS_LIBSAS is not set | ||
3508 | +# CONFIG_SCSI_SRP_ATTRS is not set | ||
3509 | +CONFIG_SCSI_LOWLEVEL=y | ||
3510 | +# CONFIG_ISCSI_TCP is not set | ||
3511 | +# CONFIG_ISCSI_BOOT_SYSFS is not set | ||
3512 | +# CONFIG_LIBFC is not set | ||
3513 | +# CONFIG_LIBFCOE is not set | ||
3514 | +# CONFIG_SCSI_DEBUG is not set | ||
3515 | +# CONFIG_SCSI_DH is not set | ||
3516 | +# CONFIG_SCSI_OSD_INITIATOR is not set | ||
3517 | +CONFIG_ATA=m | ||
3518 | +# CONFIG_ATA_NONSTANDARD is not set | ||
3519 | +CONFIG_ATA_VERBOSE_ERROR=y | ||
3520 | +# CONFIG_SATA_PMP is not set | ||
3521 | + | ||
3522 | +# | ||
3523 | +# Controllers with non-SFF native interface | ||
3524 | +# | ||
3525 | +CONFIG_SATA_AHCI_PLATFORM=m | ||
3526 | +CONFIG_ATA_SFF=y | ||
3527 | + | ||
3528 | +# | ||
3529 | +# SFF controllers with custom DMA interface | ||
3530 | +# | ||
3531 | +CONFIG_ATA_BMDMA=y | ||
3532 | + | ||
3533 | +# | ||
3534 | +# SATA SFF controllers with BMDMA | ||
3535 | +# | ||
3536 | +# CONFIG_SATA_MV is not set | ||
3537 | + | ||
3538 | +# | ||
3539 | +# PATA SFF controllers with BMDMA | ||
3540 | +# | ||
3541 | +# CONFIG_PATA_ARASAN_CF is not set | ||
3542 | + | ||
3543 | +# | ||
3544 | +# PIO-only SFF controllers | ||
3545 | +# | ||
3546 | +# CONFIG_PATA_PLATFORM is not set | ||
3547 | + | ||
3548 | +# | ||
3549 | +# Generic fallback / legacy drivers | ||
3550 | +# | ||
3551 | +# CONFIG_MD is not set | ||
3552 | +# CONFIG_TARGET_CORE is not set | ||
3553 | +CONFIG_NETDEVICES=y | ||
3554 | +# CONFIG_DUMMY is not set | ||
3555 | +# CONFIG_BONDING is not set | ||
3556 | +# CONFIG_MACVLAN is not set | ||
3557 | +# CONFIG_EQUALIZER is not set | ||
3558 | +# CONFIG_TUN is not set | ||
3559 | +# CONFIG_VETH is not set | ||
3560 | +CONFIG_MII=y | ||
3561 | +CONFIG_PHYLIB=y | ||
3562 | + | ||
3563 | +# | ||
3564 | +# MII PHY device drivers | ||
3565 | +# | ||
3566 | +# CONFIG_MARVELL_PHY is not set | ||
3567 | +# CONFIG_DAVICOM_PHY is not set | ||
3568 | +# CONFIG_QSEMI_PHY is not set | ||
3569 | +# CONFIG_LXT_PHY is not set | ||
3570 | +# CONFIG_CICADA_PHY is not set | ||
3571 | +# CONFIG_VITESSE_PHY is not set | ||
3572 | +# CONFIG_SMSC_PHY is not set | ||
3573 | +# CONFIG_BROADCOM_PHY is not set | ||
3574 | +# CONFIG_ICPLUS_PHY is not set | ||
3575 | +# CONFIG_REALTEK_PHY is not set | ||
3576 | +# CONFIG_NATIONAL_PHY is not set | ||
3577 | +# CONFIG_STE10XP is not set | ||
3578 | +# CONFIG_LSI_ET1011C_PHY is not set | ||
3579 | +CONFIG_MICREL_PHY=y | ||
3580 | +# CONFIG_FIXED_PHY is not set | ||
3581 | +# CONFIG_MDIO_BITBANG is not set | ||
3582 | +CONFIG_NET_ETHERNET=y | ||
3583 | +# CONFIG_AX88796 is not set | ||
3584 | +# CONFIG_SMC91X is not set | ||
3585 | +# CONFIG_DM9000 is not set | ||
3586 | +# CONFIG_ENC28J60 is not set | ||
3587 | +# CONFIG_ETHOC is not set | ||
3588 | +# CONFIG_SMC911X is not set | ||
3589 | +CONFIG_SMSC911X=y | ||
3590 | +# CONFIG_SMSC911X_ARCH_HOOKS is not set | ||
3591 | +# CONFIG_DNET is not set | ||
3592 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
3593 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
3594 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | ||
3595 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
3596 | +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
3597 | +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
3598 | +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
3599 | +# CONFIG_B44 is not set | ||
3600 | +# CONFIG_KS8842 is not set | ||
3601 | +# CONFIG_KS8851 is not set | ||
3602 | +# CONFIG_KS8851_MLL is not set | ||
3603 | +CONFIG_FEC=y | ||
3604 | +# CONFIG_FEC_1588 is not set | ||
3605 | +# CONFIG_FTMAC100 is not set | ||
3606 | +# CONFIG_NETDEV_1000 is not set | ||
3607 | +# CONFIG_NETDEV_10000 is not set | ||
3608 | +CONFIG_WLAN=y | ||
3609 | +# CONFIG_USB_ZD1201 is not set | ||
3610 | +# CONFIG_HOSTAP is not set | ||
3611 | + | ||
3612 | +# | ||
3613 | +# Enable WiMAX (Networking options) to see the WiMAX drivers | ||
3614 | +# | ||
3615 | + | ||
3616 | +# | ||
3617 | +# USB Network Adapters | ||
3618 | +# | ||
3619 | +# CONFIG_USB_CATC is not set | ||
3620 | +# CONFIG_USB_KAWETH is not set | ||
3621 | +# CONFIG_USB_PEGASUS is not set | ||
3622 | +# CONFIG_USB_RTL8150 is not set | ||
3623 | +# CONFIG_USB_USBNET is not set | ||
3624 | +# CONFIG_USB_HSO is not set | ||
3625 | +# CONFIG_USB_IPHETH is not set | ||
3626 | +# CONFIG_WAN is not set | ||
3627 | + | ||
3628 | +# | ||
3629 | +# CAIF transport drivers | ||
3630 | +# | ||
3631 | +# CONFIG_PPP is not set | ||
3632 | +# CONFIG_SLIP is not set | ||
3633 | +# CONFIG_NETCONSOLE is not set | ||
3634 | +# CONFIG_NETPOLL is not set | ||
3635 | +# CONFIG_NET_POLL_CONTROLLER is not set | ||
3636 | +# CONFIG_ISDN is not set | ||
3637 | +# CONFIG_PHONE is not set | ||
3638 | + | ||
3639 | +# | ||
3640 | +# Input device support | ||
3641 | +# | ||
3642 | +CONFIG_INPUT=y | ||
3643 | +# CONFIG_INPUT_FF_MEMLESS is not set | ||
3644 | +CONFIG_INPUT_POLLDEV=y | ||
3645 | +# CONFIG_INPUT_SPARSEKMAP is not set | ||
3646 | + | ||
3647 | +# | ||
3648 | +# Userland interfaces | ||
3649 | +# | ||
3650 | +CONFIG_INPUT_MOUSEDEV=y | ||
3651 | +CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
3652 | +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
3653 | +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
3654 | +# CONFIG_INPUT_JOYDEV is not set | ||
3655 | +CONFIG_INPUT_EVDEV=y | ||
3656 | +# CONFIG_INPUT_EVBUG is not set | ||
3657 | +# CONFIG_INPUT_APMPOWER is not set | ||
3658 | + | ||
3659 | +# | ||
3660 | +# Input Device Drivers | ||
3661 | +# | ||
3662 | +# CONFIG_INPUT_KEYBOARD is not set | ||
3663 | +# CONFIG_INPUT_MOUSE is not set | ||
3664 | +# CONFIG_INPUT_JOYSTICK is not set | ||
3665 | +# CONFIG_INPUT_TABLET is not set | ||
3666 | +CONFIG_INPUT_TOUCHSCREEN=y | ||
3667 | +# CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
3668 | +# CONFIG_TOUCHSCREEN_AD7877 is not set | ||
3669 | +# CONFIG_TOUCHSCREEN_AD7879 is not set | ||
3670 | +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set | ||
3671 | +# CONFIG_TOUCHSCREEN_BU21013 is not set | ||
3672 | +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set | ||
3673 | +# CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
3674 | +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
3675 | +# CONFIG_TOUCHSCREEN_EETI is not set | ||
3676 | +CONFIG_TOUCHSCREEN_EGALAX=y | ||
3677 | +# CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
3678 | +# CONFIG_TOUCHSCREEN_GUNZE is not set | ||
3679 | +# CONFIG_TOUCHSCREEN_ELO is not set | ||
3680 | +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
3681 | +# CONFIG_TOUCHSCREEN_MAX11801 is not set | ||
3682 | +# CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
3683 | +# CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
3684 | +# CONFIG_TOUCHSCREEN_INEXIO is not set | ||
3685 | +# CONFIG_TOUCHSCREEN_MK712 is not set | ||
3686 | +# CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
3687 | +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
3688 | +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
3689 | +# CONFIG_TOUCHSCREEN_WM97XX is not set | ||
3690 | +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
3691 | +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
3692 | +# CONFIG_TOUCHSCREEN_TSC2005 is not set | ||
3693 | +# CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
3694 | +# CONFIG_TOUCHSCREEN_W90X900 is not set | ||
3695 | +# CONFIG_TOUCHSCREEN_ST1232 is not set | ||
3696 | +# CONFIG_TOUCHSCREEN_P1003 is not set | ||
3697 | +# CONFIG_TOUCHSCREEN_TPS6507X is not set | ||
3698 | +CONFIG_INPUT_MISC=y | ||
3699 | +# CONFIG_INPUT_AD714X is not set | ||
3700 | +# CONFIG_INPUT_ATI_REMOTE is not set | ||
3701 | +# CONFIG_INPUT_ATI_REMOTE2 is not set | ||
3702 | +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
3703 | +# CONFIG_INPUT_POWERMATE is not set | ||
3704 | +# CONFIG_INPUT_YEALINK is not set | ||
3705 | +# CONFIG_INPUT_CM109 is not set | ||
3706 | +CONFIG_INPUT_UINPUT=y | ||
3707 | +# CONFIG_INPUT_PCF8574 is not set | ||
3708 | +# CONFIG_INPUT_PWM_BEEPER is not set | ||
3709 | +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
3710 | +# CONFIG_INPUT_ADXL34X is not set | ||
3711 | +# CONFIG_INPUT_CMA3000 is not set | ||
3712 | +# CONFIG_INPUT_ISL29023 is not set | ||
3713 | + | ||
3714 | +# | ||
3715 | +# Hardware I/O ports | ||
3716 | +# | ||
3717 | +# CONFIG_SERIO is not set | ||
3718 | +# CONFIG_GAMEPORT is not set | ||
3719 | + | ||
3720 | +# | ||
3721 | +# Character devices | ||
3722 | +# | ||
3723 | +CONFIG_VT=y | ||
3724 | +CONFIG_CONSOLE_TRANSLATIONS=y | ||
3725 | +CONFIG_VT_CONSOLE=y | ||
3726 | +CONFIG_HW_CONSOLE=y | ||
3727 | +# CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
3728 | +CONFIG_UNIX98_PTYS=y | ||
3729 | +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
3730 | +CONFIG_LEGACY_PTYS=y | ||
3731 | +CONFIG_LEGACY_PTY_COUNT=256 | ||
3732 | +# CONFIG_SERIAL_NONSTANDARD is not set | ||
3733 | +# CONFIG_N_GSM is not set | ||
3734 | +# CONFIG_TRACE_SINK is not set | ||
3735 | +CONFIG_DEVKMEM=y | ||
3736 | + | ||
3737 | +# | ||
3738 | +# Serial drivers | ||
3739 | +# | ||
3740 | +# CONFIG_SERIAL_8250 is not set | ||
3741 | + | ||
3742 | +# | ||
3743 | +# Non-8250 serial port support | ||
3744 | +# | ||
3745 | +# CONFIG_SERIAL_MAX3100 is not set | ||
3746 | +# CONFIG_SERIAL_MAX3107 is not set | ||
3747 | +CONFIG_SERIAL_IMX=y | ||
3748 | +CONFIG_SERIAL_IMX_CONSOLE=y | ||
3749 | +CONFIG_SERIAL_CORE=y | ||
3750 | +CONFIG_SERIAL_CORE_CONSOLE=y | ||
3751 | +# CONFIG_SERIAL_TIMBERDALE is not set | ||
3752 | +# CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
3753 | +# CONFIG_SERIAL_ALTERA_UART is not set | ||
3754 | +# CONFIG_SERIAL_IFX6X60 is not set | ||
3755 | +# CONFIG_SERIAL_XILINX_PS_UART is not set | ||
3756 | +# CONFIG_TTY_PRINTK is not set | ||
3757 | +CONFIG_FSL_OTP=y | ||
3758 | +# CONFIG_HVC_DCC is not set | ||
3759 | +# CONFIG_IPMI_HANDLER is not set | ||
3760 | +CONFIG_HW_RANDOM=y | ||
3761 | +# CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
3762 | +# CONFIG_R3964 is not set | ||
3763 | +# CONFIG_RAW_DRIVER is not set | ||
3764 | +# CONFIG_TCG_TPM is not set | ||
3765 | +# CONFIG_RAMOOPS is not set | ||
3766 | +CONFIG_MXS_VIIM=y | ||
3767 | +CONFIG_I2C=y | ||
3768 | +CONFIG_I2C_BOARDINFO=y | ||
3769 | +CONFIG_I2C_COMPAT=y | ||
3770 | +CONFIG_I2C_CHARDEV=y | ||
3771 | +# CONFIG_I2C_MUX is not set | ||
3772 | +CONFIG_I2C_HELPER_AUTO=y | ||
3773 | + | ||
3774 | +# | ||
3775 | +# I2C Hardware Bus support | ||
3776 | +# | ||
3777 | + | ||
3778 | +# | ||
3779 | +# I2C system bus drivers (mostly embedded / system-on-chip) | ||
3780 | +# | ||
3781 | +# CONFIG_I2C_DESIGNWARE is not set | ||
3782 | +# CONFIG_I2C_GPIO is not set | ||
3783 | +CONFIG_I2C_IMX=y | ||
3784 | +# CONFIG_I2C_OCORES is not set | ||
3785 | +# CONFIG_I2C_PCA_PLATFORM is not set | ||
3786 | +# CONFIG_I2C_PXA_PCI is not set | ||
3787 | +# CONFIG_I2C_SIMTEC is not set | ||
3788 | +# CONFIG_I2C_XILINX is not set | ||
3789 | + | ||
3790 | +# | ||
3791 | +# External I2C/SMBus adapter drivers | ||
3792 | +# | ||
3793 | +# CONFIG_I2C_DIOLAN_U2C is not set | ||
3794 | +# CONFIG_I2C_PARPORT_LIGHT is not set | ||
3795 | +# CONFIG_I2C_TAOS_EVM is not set | ||
3796 | +# CONFIG_I2C_TINY_USB is not set | ||
3797 | + | ||
3798 | +# | ||
3799 | +# Other I2C/SMBus bus drivers | ||
3800 | +# | ||
3801 | +# CONFIG_I2C_STUB is not set | ||
3802 | +# CONFIG_I2C_DEBUG_CORE is not set | ||
3803 | +# CONFIG_I2C_DEBUG_ALGO is not set | ||
3804 | +# CONFIG_I2C_DEBUG_BUS is not set | ||
3805 | +CONFIG_SPI=y | ||
3806 | +CONFIG_SPI_MASTER=y | ||
3807 | + | ||
3808 | +# | ||
3809 | +# SPI Master Controller Drivers | ||
3810 | +# | ||
3811 | +# CONFIG_SPI_ALTERA is not set | ||
3812 | +CONFIG_SPI_BITBANG=y | ||
3813 | +# CONFIG_SPI_GPIO is not set | ||
3814 | +CONFIG_SPI_IMX_VER_2_3=y | ||
3815 | +CONFIG_SPI_IMX=y | ||
3816 | +# CONFIG_SPI_OC_TINY is not set | ||
3817 | +# CONFIG_SPI_PXA2XX_PCI is not set | ||
3818 | +# CONFIG_SPI_XILINX is not set | ||
3819 | +# CONFIG_SPI_DESIGNWARE is not set | ||
3820 | + | ||
3821 | +# | ||
3822 | +# SPI Protocol Masters | ||
3823 | +# | ||
3824 | +# CONFIG_SPI_SPIDEV is not set | ||
3825 | +# CONFIG_SPI_TLE62X0 is not set | ||
3826 | + | ||
3827 | +# | ||
3828 | +# PPS support | ||
3829 | +# | ||
3830 | +# CONFIG_PPS is not set | ||
3831 | + | ||
3832 | +# | ||
3833 | +# PPS generators support | ||
3834 | +# | ||
3835 | + | ||
3836 | +# | ||
3837 | +# PTP clock support | ||
3838 | +# | ||
3839 | + | ||
3840 | +# | ||
3841 | +# Enable Device Drivers -> PPS to see the PTP clock options. | ||
3842 | +# | ||
3843 | +CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
3844 | +CONFIG_GPIOLIB=y | ||
3845 | +# CONFIG_GPIO_SYSFS is not set | ||
3846 | + | ||
3847 | +# | ||
3848 | +# Memory mapped GPIO drivers: | ||
3849 | +# | ||
3850 | +# CONFIG_GPIO_BASIC_MMIO is not set | ||
3851 | +# CONFIG_GPIO_IT8761E is not set | ||
3852 | + | ||
3853 | +# | ||
3854 | +# I2C GPIO expanders: | ||
3855 | +# | ||
3856 | +# CONFIG_GPIO_MAX7300 is not set | ||
3857 | +# CONFIG_GPIO_MAX732X is not set | ||
3858 | +# CONFIG_GPIO_PCA953X_IRQ is not set | ||
3859 | +# CONFIG_GPIO_PCF857X is not set | ||
3860 | +# CONFIG_GPIO_SX150X is not set | ||
3861 | +# CONFIG_GPIO_ADP5588 is not set | ||
3862 | + | ||
3863 | +# | ||
3864 | +# PCI GPIO expanders: | ||
3865 | +# | ||
3866 | + | ||
3867 | +# | ||
3868 | +# SPI GPIO expanders: | ||
3869 | +# | ||
3870 | +# CONFIG_GPIO_MAX7301 is not set | ||
3871 | +# CONFIG_GPIO_MCP23S08 is not set | ||
3872 | +# CONFIG_GPIO_MC33880 is not set | ||
3873 | +# CONFIG_GPIO_74X164 is not set | ||
3874 | + | ||
3875 | +# | ||
3876 | +# AC97 GPIO expanders: | ||
3877 | +# | ||
3878 | + | ||
3879 | +# | ||
3880 | +# MODULbus GPIO expanders: | ||
3881 | +# | ||
3882 | +# CONFIG_W1 is not set | ||
3883 | +# CONFIG_POWER_SUPPLY is not set | ||
3884 | +# CONFIG_HWMON is not set | ||
3885 | +CONFIG_THERMAL=y | ||
3886 | +CONFIG_WATCHDOG=y | ||
3887 | +CONFIG_WATCHDOG_NOWAYOUT=y | ||
3888 | + | ||
3889 | +# | ||
3890 | +# Watchdog Device Drivers | ||
3891 | +# | ||
3892 | +# CONFIG_SOFT_WATCHDOG is not set | ||
3893 | +# CONFIG_MAX63XX_WATCHDOG is not set | ||
3894 | +CONFIG_IMX2_WDT=y | ||
3895 | + | ||
3896 | +# | ||
3897 | +# USB-based Watchdog Cards | ||
3898 | +# | ||
3899 | +# CONFIG_USBPCWATCHDOG is not set | ||
3900 | +CONFIG_SSB_POSSIBLE=y | ||
3901 | + | ||
3902 | +# | ||
3903 | +# Sonics Silicon Backplane | ||
3904 | +# | ||
3905 | +# CONFIG_SSB is not set | ||
3906 | +CONFIG_BCMA_POSSIBLE=y | ||
3907 | + | ||
3908 | +# | ||
3909 | +# Broadcom specific AMBA | ||
3910 | +# | ||
3911 | +# CONFIG_BCMA is not set | ||
3912 | +CONFIG_MFD_SUPPORT=y | ||
3913 | +CONFIG_MFD_CORE=y | ||
3914 | +# CONFIG_MFD_88PM860X is not set | ||
3915 | +# CONFIG_MFD_SM501 is not set | ||
3916 | +# CONFIG_MFD_ASIC3 is not set | ||
3917 | +# CONFIG_HTC_EGPIO is not set | ||
3918 | +# CONFIG_HTC_PASIC3 is not set | ||
3919 | +# CONFIG_HTC_I2CPLD is not set | ||
3920 | +# CONFIG_UCB1400_CORE is not set | ||
3921 | +# CONFIG_TPS6105X is not set | ||
3922 | +# CONFIG_TPS65010 is not set | ||
3923 | +# CONFIG_TPS6507X is not set | ||
3924 | +# CONFIG_MFD_TPS6586X is not set | ||
3925 | +# CONFIG_TWL4030_CORE is not set | ||
3926 | +# CONFIG_MFD_STMPE is not set | ||
3927 | +# CONFIG_MFD_TC3589X is not set | ||
3928 | +# CONFIG_MFD_TMIO is not set | ||
3929 | +# CONFIG_MFD_T7L66XB is not set | ||
3930 | +# CONFIG_MFD_TC6387XB is not set | ||
3931 | +# CONFIG_MFD_TC6393XB is not set | ||
3932 | +# CONFIG_PMIC_DA903X is not set | ||
3933 | +# CONFIG_PMIC_ADP5520 is not set | ||
3934 | +# CONFIG_MFD_MAX8925 is not set | ||
3935 | +# CONFIG_MFD_MAX8997 is not set | ||
3936 | +# CONFIG_MFD_MAX8998 is not set | ||
3937 | +# CONFIG_MFD_WM8400 is not set | ||
3938 | +# CONFIG_MFD_WM831X_I2C is not set | ||
3939 | +# CONFIG_MFD_WM831X_SPI is not set | ||
3940 | +# CONFIG_MFD_WM8350_I2C is not set | ||
3941 | +# CONFIG_MFD_WM8994 is not set | ||
3942 | +# CONFIG_MFD_PCF50633 is not set | ||
3943 | +# CONFIG_PMIC_DIALOG is not set | ||
3944 | +# CONFIG_MFD_MC_PMIC is not set | ||
3945 | +# CONFIG_MFD_MC34708 is not set | ||
3946 | +CONFIG_MFD_PFUZE=y | ||
3947 | +# CONFIG_MFD_MC13XXX is not set | ||
3948 | +# CONFIG_ABX500_CORE is not set | ||
3949 | +# CONFIG_EZX_PCAP is not set | ||
3950 | +# CONFIG_MFD_WL1273_CORE is not set | ||
3951 | +# CONFIG_MFD_TPS65910 is not set | ||
3952 | +# CONFIG_MFD_MAX17135 is not set | ||
3953 | +CONFIG_MFD_MXC_HDMI=y | ||
3954 | +CONFIG_REGULATOR=y | ||
3955 | +# CONFIG_REGULATOR_DEBUG is not set | ||
3956 | +# CONFIG_REGULATOR_DUMMY is not set | ||
3957 | +CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
3958 | +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
3959 | +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
3960 | +# CONFIG_REGULATOR_BQ24022 is not set | ||
3961 | +# CONFIG_REGULATOR_MAX1586 is not set | ||
3962 | +# CONFIG_REGULATOR_MAX8649 is not set | ||
3963 | +# CONFIG_REGULATOR_MAX8660 is not set | ||
3964 | +# CONFIG_REGULATOR_MAX8952 is not set | ||
3965 | +# CONFIG_REGULATOR_LP3971 is not set | ||
3966 | +# CONFIG_REGULATOR_LP3972 is not set | ||
3967 | +# CONFIG_REGULATOR_MC34708 is not set | ||
3968 | +CONFIG_REGULATOR_PFUZE100=y | ||
3969 | +# CONFIG_REGULATOR_TPS65023 is not set | ||
3970 | +# CONFIG_REGULATOR_TPS6507X is not set | ||
3971 | +# CONFIG_REGULATOR_ISL6271A is not set | ||
3972 | +# CONFIG_REGULATOR_AD5398 is not set | ||
3973 | +CONFIG_REGULATOR_ANATOP=y | ||
3974 | +# CONFIG_REGULATOR_TPS6524X is not set | ||
3975 | +# CONFIG_REGULATOR_MAX17135 is not set | ||
3976 | +CONFIG_MEDIA_SUPPORT=y | ||
3977 | + | ||
3978 | +# | ||
3979 | +# Multimedia core support | ||
3980 | +# | ||
3981 | +# CONFIG_MEDIA_CONTROLLER is not set | ||
3982 | +CONFIG_VIDEO_DEV=y | ||
3983 | +CONFIG_VIDEO_V4L2_COMMON=y | ||
3984 | +# CONFIG_DVB_CORE is not set | ||
3985 | +CONFIG_VIDEO_MEDIA=y | ||
3986 | + | ||
3987 | +# | ||
3988 | +# Multimedia drivers | ||
3989 | +# | ||
3990 | +# CONFIG_RC_CORE is not set | ||
3991 | +# CONFIG_MEDIA_ATTACH is not set | ||
3992 | +CONFIG_MEDIA_TUNER=y | ||
3993 | +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
3994 | +CONFIG_MEDIA_TUNER_SIMPLE=y | ||
3995 | +CONFIG_MEDIA_TUNER_TDA8290=y | ||
3996 | +CONFIG_MEDIA_TUNER_TDA827X=y | ||
3997 | +CONFIG_MEDIA_TUNER_TDA18271=y | ||
3998 | +CONFIG_MEDIA_TUNER_TDA9887=y | ||
3999 | +CONFIG_MEDIA_TUNER_TEA5761=y | ||
4000 | +CONFIG_MEDIA_TUNER_TEA5767=y | ||
4001 | +CONFIG_MEDIA_TUNER_MT20XX=y | ||
4002 | +CONFIG_MEDIA_TUNER_XC2028=y | ||
4003 | +CONFIG_MEDIA_TUNER_XC5000=y | ||
4004 | +CONFIG_MEDIA_TUNER_MC44S803=y | ||
4005 | +CONFIG_VIDEO_V4L2=y | ||
4006 | +CONFIG_VIDEOBUF_GEN=y | ||
4007 | +CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
4008 | +CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
4009 | +# CONFIG_VIDEO_ADV_DEBUG is not set | ||
4010 | +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
4011 | +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
4012 | + | ||
4013 | +# | ||
4014 | +# Encoders, decoders, sensors and other helper chips | ||
4015 | +# | ||
4016 | + | ||
4017 | +# | ||
4018 | +# Audio decoders, processors and mixers | ||
4019 | +# | ||
4020 | +# CONFIG_VIDEO_TVAUDIO is not set | ||
4021 | +# CONFIG_VIDEO_TDA7432 is not set | ||
4022 | +# CONFIG_VIDEO_TDA9840 is not set | ||
4023 | +# CONFIG_VIDEO_TEA6415C is not set | ||
4024 | +# CONFIG_VIDEO_TEA6420 is not set | ||
4025 | +# CONFIG_VIDEO_MSP3400 is not set | ||
4026 | +# CONFIG_VIDEO_CS5345 is not set | ||
4027 | +# CONFIG_VIDEO_CS53L32A is not set | ||
4028 | +# CONFIG_VIDEO_TLV320AIC23B is not set | ||
4029 | +# CONFIG_VIDEO_WM8775 is not set | ||
4030 | +# CONFIG_VIDEO_WM8739 is not set | ||
4031 | +# CONFIG_VIDEO_VP27SMPX is not set | ||
4032 | + | ||
4033 | +# | ||
4034 | +# RDS decoders | ||
4035 | +# | ||
4036 | +# CONFIG_VIDEO_SAA6588 is not set | ||
4037 | + | ||
4038 | +# | ||
4039 | +# Video decoders | ||
4040 | +# | ||
4041 | +# CONFIG_VIDEO_ADV7180 is not set | ||
4042 | +# CONFIG_VIDEO_BT819 is not set | ||
4043 | +# CONFIG_VIDEO_BT856 is not set | ||
4044 | +# CONFIG_VIDEO_BT866 is not set | ||
4045 | +# CONFIG_VIDEO_KS0127 is not set | ||
4046 | +# CONFIG_VIDEO_SAA7110 is not set | ||
4047 | +# CONFIG_VIDEO_SAA711X is not set | ||
4048 | +# CONFIG_VIDEO_SAA7191 is not set | ||
4049 | +# CONFIG_VIDEO_TVP514X is not set | ||
4050 | +# CONFIG_VIDEO_TVP5150 is not set | ||
4051 | +# CONFIG_VIDEO_TVP7002 is not set | ||
4052 | +# CONFIG_VIDEO_VPX3220 is not set | ||
4053 | + | ||
4054 | +# | ||
4055 | +# Video and audio decoders | ||
4056 | +# | ||
4057 | +# CONFIG_VIDEO_SAA717X is not set | ||
4058 | +# CONFIG_VIDEO_CX25840 is not set | ||
4059 | + | ||
4060 | +# | ||
4061 | +# MPEG video encoders | ||
4062 | +# | ||
4063 | +# CONFIG_VIDEO_CX2341X is not set | ||
4064 | + | ||
4065 | +# | ||
4066 | +# Video encoders | ||
4067 | +# | ||
4068 | +# CONFIG_VIDEO_SAA7127 is not set | ||
4069 | +# CONFIG_VIDEO_SAA7185 is not set | ||
4070 | +# CONFIG_VIDEO_ADV7170 is not set | ||
4071 | +# CONFIG_VIDEO_ADV7175 is not set | ||
4072 | +# CONFIG_VIDEO_ADV7343 is not set | ||
4073 | +# CONFIG_VIDEO_AK881X is not set | ||
4074 | + | ||
4075 | +# | ||
4076 | +# Camera sensor devices | ||
4077 | +# | ||
4078 | +# CONFIG_VIDEO_OV7670 is not set | ||
4079 | +# CONFIG_VIDEO_MT9V011 is not set | ||
4080 | +# CONFIG_VIDEO_TCM825X is not set | ||
4081 | + | ||
4082 | +# | ||
4083 | +# Video improvement chips | ||
4084 | +# | ||
4085 | +# CONFIG_VIDEO_UPD64031A is not set | ||
4086 | +# CONFIG_VIDEO_UPD64083 is not set | ||
4087 | + | ||
4088 | +# | ||
4089 | +# Miscelaneous helper chips | ||
4090 | +# | ||
4091 | +# CONFIG_VIDEO_THS7303 is not set | ||
4092 | +# CONFIG_VIDEO_M52790 is not set | ||
4093 | +# CONFIG_VIDEO_VIVI is not set | ||
4094 | +CONFIG_VIDEO_MXC_CAMERA=m | ||
4095 | + | ||
4096 | +# | ||
4097 | +# MXC Camera/V4L2 PRP Features support | ||
4098 | +# | ||
4099 | +CONFIG_VIDEO_MXC_IPU_CAMERA=y | ||
4100 | +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set | ||
4101 | +# CONFIG_MXC_CAMERA_MICRON111 is not set | ||
4102 | +# CONFIG_MXC_CAMERA_OV2640 is not set | ||
4103 | +CONFIG_MXC_CAMERA_OV3640=m | ||
4104 | +CONFIG_MXC_CAMERA_OV5640=m | ||
4105 | +# CONFIG_MXC_CAMERA_OV5640_MIPI is not set | ||
4106 | +# CONFIG_MXC_CAMERA_OV8820_MIPI is not set | ||
4107 | +CONFIG_MXC_CAMERA_OV5642=m | ||
4108 | +# CONFIG_MXC_TVIN_ADV7180 is not set | ||
4109 | +CONFIG_MXC_CAMERA_SENSOR_CLK=m | ||
4110 | +CONFIG_MXC_IPU_PRP_VF_SDC=m | ||
4111 | +CONFIG_MXC_IPU_PRP_ENC=m | ||
4112 | +CONFIG_MXC_IPU_CSI_ENC=m | ||
4113 | +CONFIG_VIDEO_MXC_OUTPUT=y | ||
4114 | +CONFIG_VIDEO_MXC_IPU_OUTPUT=y | ||
4115 | +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set | ||
4116 | +# CONFIG_VIDEO_MXC_OPL is not set | ||
4117 | +# CONFIG_VIDEO_CPIA2 is not set | ||
4118 | +# CONFIG_VIDEO_TIMBERDALE is not set | ||
4119 | +# CONFIG_VIDEO_SR030PC30 is not set | ||
4120 | +# CONFIG_VIDEO_NOON010PC30 is not set | ||
4121 | +# CONFIG_SOC_CAMERA is not set | ||
4122 | +# CONFIG_V4L_USB_DRIVERS is not set | ||
4123 | +# CONFIG_V4L_MEM2MEM_DRIVERS is not set | ||
4124 | +# CONFIG_RADIO_ADAPTERS is not set | ||
4125 | + | ||
4126 | +# | ||
4127 | +# Graphics support | ||
4128 | +# | ||
4129 | +# CONFIG_DRM is not set | ||
4130 | +# CONFIG_VGASTATE is not set | ||
4131 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
4132 | +CONFIG_FB=y | ||
4133 | +# CONFIG_FIRMWARE_EDID is not set | ||
4134 | +# CONFIG_FB_DDC is not set | ||
4135 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
4136 | +CONFIG_FB_CFB_FILLRECT=y | ||
4137 | +CONFIG_FB_CFB_COPYAREA=y | ||
4138 | +CONFIG_FB_CFB_IMAGEBLIT=y | ||
4139 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
4140 | +# CONFIG_FB_SYS_FILLRECT is not set | ||
4141 | +# CONFIG_FB_SYS_COPYAREA is not set | ||
4142 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | ||
4143 | +# CONFIG_FB_FOREIGN_ENDIAN is not set | ||
4144 | +# CONFIG_FB_SYS_FOPS is not set | ||
4145 | +# CONFIG_FB_WMT_GE_ROPS is not set | ||
4146 | +# CONFIG_FB_SVGALIB is not set | ||
4147 | +# CONFIG_FB_MACMODES is not set | ||
4148 | +# CONFIG_FB_BACKLIGHT is not set | ||
4149 | +CONFIG_FB_MODE_HELPERS=y | ||
4150 | +# CONFIG_FB_TILEBLITTING is not set | ||
4151 | + | ||
4152 | +# | ||
4153 | +# Frame buffer hardware drivers | ||
4154 | +# | ||
4155 | +# CONFIG_FB_UVESA is not set | ||
4156 | +# CONFIG_FB_S1D13XXX is not set | ||
4157 | +# CONFIG_FB_TMIO is not set | ||
4158 | +# CONFIG_FB_UDL is not set | ||
4159 | +# CONFIG_FB_VIRTUAL is not set | ||
4160 | +# CONFIG_FB_METRONOME is not set | ||
4161 | +# CONFIG_FB_BROADSHEET is not set | ||
4162 | +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
4163 | + | ||
4164 | +# | ||
4165 | +# Display device support | ||
4166 | +# | ||
4167 | +# CONFIG_DISPLAY_SUPPORT is not set | ||
4168 | +CONFIG_FB_MXC=y | ||
4169 | +CONFIG_FB_MXC_EDID=y | ||
4170 | +CONFIG_FB_MXC_SYNC_PANEL=y | ||
4171 | +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set | ||
4172 | +CONFIG_FB_MXC_LDB=y | ||
4173 | +# CONFIG_FB_MXC_MIPI_DSI is not set | ||
4174 | +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set | ||
4175 | +# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set | ||
4176 | +# CONFIG_FB_MXC_SII902X is not set | ||
4177 | +# CONFIG_FB_MXC_CH7026 is not set | ||
4178 | +# CONFIG_FB_MXC_TVOUT_CH7024 is not set | ||
4179 | +# CONFIG_FB_MXC_ASYNC_PANEL is not set | ||
4180 | +# CONFIG_FB_MXC_EINK_PANEL is not set | ||
4181 | +# CONFIG_FB_MXC_ELCDIF_FB is not set | ||
4182 | +CONFIG_FB_MXC_HDMI=y | ||
4183 | + | ||
4184 | +# | ||
4185 | +# Console display driver support | ||
4186 | +# | ||
4187 | +CONFIG_DUMMY_CONSOLE=y | ||
4188 | +CONFIG_FRAMEBUFFER_CONSOLE=y | ||
4189 | +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
4190 | +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
4191 | +CONFIG_FONTS=y | ||
4192 | +# CONFIG_FONT_8x8 is not set | ||
4193 | +CONFIG_FONT_8x16=y | ||
4194 | +# CONFIG_FONT_6x11 is not set | ||
4195 | +# CONFIG_FONT_7x14 is not set | ||
4196 | +# CONFIG_FONT_PEARL_8x8 is not set | ||
4197 | +# CONFIG_FONT_ACORN_8x8 is not set | ||
4198 | +# CONFIG_FONT_MINI_4x6 is not set | ||
4199 | +# CONFIG_FONT_SUN8x16 is not set | ||
4200 | +# CONFIG_FONT_SUN12x22 is not set | ||
4201 | +# CONFIG_FONT_10x18 is not set | ||
4202 | +CONFIG_LOGO=y | ||
4203 | +CONFIG_LOGO_LINUX_MONO=y | ||
4204 | +CONFIG_LOGO_LINUX_VGA16=y | ||
4205 | +CONFIG_LOGO_LINUX_CLUT224=y | ||
4206 | +CONFIG_SOUND=y | ||
4207 | +# CONFIG_SOUND_OSS_CORE is not set | ||
4208 | +CONFIG_SND=y | ||
4209 | +CONFIG_SND_TIMER=y | ||
4210 | +CONFIG_SND_PCM=y | ||
4211 | +CONFIG_SND_JACK=y | ||
4212 | +# CONFIG_SND_SEQUENCER is not set | ||
4213 | +# CONFIG_SND_MIXER_OSS is not set | ||
4214 | +# CONFIG_SND_PCM_OSS is not set | ||
4215 | +# CONFIG_SND_HRTIMER is not set | ||
4216 | +# CONFIG_SND_DYNAMIC_MINORS is not set | ||
4217 | +CONFIG_SND_SUPPORT_OLD_API=y | ||
4218 | +CONFIG_SND_VERBOSE_PROCFS=y | ||
4219 | +# CONFIG_SND_VERBOSE_PRINTK is not set | ||
4220 | +# CONFIG_SND_DEBUG is not set | ||
4221 | +# CONFIG_SND_RAWMIDI_SEQ is not set | ||
4222 | +# CONFIG_SND_OPL3_LIB_SEQ is not set | ||
4223 | +# CONFIG_SND_OPL4_LIB_SEQ is not set | ||
4224 | +# CONFIG_SND_SBAWE_SEQ is not set | ||
4225 | +# CONFIG_SND_EMU10K1_SEQ is not set | ||
4226 | +CONFIG_SND_DRIVERS=y | ||
4227 | +# CONFIG_SND_DUMMY is not set | ||
4228 | +# CONFIG_SND_ALOOP is not set | ||
4229 | +# CONFIG_SND_MTPAV is not set | ||
4230 | +# CONFIG_SND_SERIAL_U16550 is not set | ||
4231 | +# CONFIG_SND_MPU401 is not set | ||
4232 | +CONFIG_SND_ARM=y | ||
4233 | +CONFIG_SND_SPI=y | ||
4234 | +CONFIG_SND_USB=y | ||
4235 | +# CONFIG_SND_USB_AUDIO is not set | ||
4236 | +# CONFIG_SND_USB_UA101 is not set | ||
4237 | +# CONFIG_SND_USB_CAIAQ is not set | ||
4238 | +# CONFIG_SND_USB_6FIRE is not set | ||
4239 | +CONFIG_SND_SOC=y | ||
4240 | +# CONFIG_SND_SOC_CACHE_LZO is not set | ||
4241 | +CONFIG_SND_SOC_AC97_BUS=y | ||
4242 | +CONFIG_SND_IMX_SOC=y | ||
4243 | +CONFIG_SND_MXC_SOC_MX2=y | ||
4244 | +# CONFIG_SND_SOC_IMX_SGTL5000 is not set | ||
4245 | +CONFIG_SND_SOC_IMX_CS42888=y | ||
4246 | +# CONFIG_SND_SOC_IMX_SPDIF is not set | ||
4247 | +# CONFIG_SND_SOC_IMX_HDMI is not set | ||
4248 | +CONFIG_SND_SOC_I2C_AND_SPI=y | ||
4249 | +# CONFIG_SND_SOC_ALL_CODECS is not set | ||
4250 | +CONFIG_SND_SOC_CS42888=y | ||
4251 | +# CONFIG_SOUND_PRIME is not set | ||
4252 | +CONFIG_AC97_BUS=y | ||
4253 | +CONFIG_HID_SUPPORT=y | ||
4254 | +CONFIG_HID=y | ||
4255 | +# CONFIG_HIDRAW is not set | ||
4256 | + | ||
4257 | +# | ||
4258 | +# USB Input Devices | ||
4259 | +# | ||
4260 | +CONFIG_USB_HID=y | ||
4261 | +# CONFIG_HID_PID is not set | ||
4262 | +# CONFIG_USB_HIDDEV is not set | ||
4263 | + | ||
4264 | +# | ||
4265 | +# Special HID drivers | ||
4266 | +# | ||
4267 | +CONFIG_HID_A4TECH=m | ||
4268 | +# CONFIG_HID_ACRUX is not set | ||
4269 | +CONFIG_HID_APPLE=m | ||
4270 | +CONFIG_HID_BELKIN=m | ||
4271 | +CONFIG_HID_CHERRY=m | ||
4272 | +CONFIG_HID_CHICONY=m | ||
4273 | +# CONFIG_HID_PRODIKEYS is not set | ||
4274 | +CONFIG_HID_CYPRESS=m | ||
4275 | +# CONFIG_HID_DRAGONRISE is not set | ||
4276 | +# CONFIG_HID_EMS_FF is not set | ||
4277 | +# CONFIG_HID_ELECOM is not set | ||
4278 | +CONFIG_HID_EZKEY=m | ||
4279 | +# CONFIG_HID_KEYTOUCH is not set | ||
4280 | +# CONFIG_HID_KYE is not set | ||
4281 | +# CONFIG_HID_UCLOGIC is not set | ||
4282 | +# CONFIG_HID_WALTOP is not set | ||
4283 | +CONFIG_HID_GYRATION=m | ||
4284 | +# CONFIG_HID_TWINHAN is not set | ||
4285 | +# CONFIG_HID_KENSINGTON is not set | ||
4286 | +# CONFIG_HID_LCPOWER is not set | ||
4287 | +CONFIG_HID_LOGITECH=m | ||
4288 | +# CONFIG_LOGITECH_FF is not set | ||
4289 | +# CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
4290 | +# CONFIG_LOGIG940_FF is not set | ||
4291 | +# CONFIG_LOGIWII_FF is not set | ||
4292 | +# CONFIG_HID_MAGICMOUSE is not set | ||
4293 | +CONFIG_HID_MICROSOFT=m | ||
4294 | +CONFIG_HID_MONTEREY=m | ||
4295 | +# CONFIG_HID_MULTITOUCH is not set | ||
4296 | +# CONFIG_HID_NTRIG is not set | ||
4297 | +# CONFIG_HID_ORTEK is not set | ||
4298 | +CONFIG_HID_PANTHERLORD=m | ||
4299 | +# CONFIG_PANTHERLORD_FF is not set | ||
4300 | +CONFIG_HID_PETALYNX=m | ||
4301 | +# CONFIG_HID_PICOLCD is not set | ||
4302 | +# CONFIG_HID_QUANTA is not set | ||
4303 | +# CONFIG_HID_ROCCAT is not set | ||
4304 | +# CONFIG_HID_ROCCAT_ARVO is not set | ||
4305 | +# CONFIG_HID_ROCCAT_KONE is not set | ||
4306 | +# CONFIG_HID_ROCCAT_KONEPLUS is not set | ||
4307 | +# CONFIG_HID_ROCCAT_KOVAPLUS is not set | ||
4308 | +# CONFIG_HID_ROCCAT_PYRA is not set | ||
4309 | +CONFIG_HID_SAMSUNG=m | ||
4310 | +CONFIG_HID_SONY=m | ||
4311 | +CONFIG_HID_SUNPLUS=m | ||
4312 | +# CONFIG_HID_GREENASIA is not set | ||
4313 | +# CONFIG_HID_SMARTJOYPLUS is not set | ||
4314 | +# CONFIG_HID_TOPSEED is not set | ||
4315 | +# CONFIG_HID_THRUSTMASTER is not set | ||
4316 | +# CONFIG_HID_WACOM is not set | ||
4317 | +# CONFIG_HID_ZEROPLUS is not set | ||
4318 | +# CONFIG_HID_ZYDACRON is not set | ||
4319 | +CONFIG_USB_SUPPORT=y | ||
4320 | +CONFIG_USB_ARCH_HAS_HCD=y | ||
4321 | +# CONFIG_USB_ARCH_HAS_OHCI is not set | ||
4322 | +CONFIG_USB_ARCH_HAS_EHCI=y | ||
4323 | +CONFIG_USB=y | ||
4324 | +# CONFIG_USB_DEBUG is not set | ||
4325 | +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
4326 | + | ||
4327 | +# | ||
4328 | +# Miscellaneous USB options | ||
4329 | +# | ||
4330 | +# CONFIG_USB_DEVICEFS is not set | ||
4331 | +# CONFIG_USB_DEVICE_CLASS is not set | ||
4332 | +# CONFIG_USB_DYNAMIC_MINORS is not set | ||
4333 | +CONFIG_USB_SUSPEND=y | ||
4334 | +# CONFIG_USB_OTG is not set | ||
4335 | +# CONFIG_USB_OTG_WHITELIST is not set | ||
4336 | +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
4337 | +# CONFIG_USB_MON is not set | ||
4338 | +# CONFIG_USB_WUSB is not set | ||
4339 | +# CONFIG_USB_WUSB_CBAF is not set | ||
4340 | + | ||
4341 | +# | ||
4342 | +# USB Host Controller Drivers | ||
4343 | +# | ||
4344 | +# CONFIG_USB_C67X00_HCD is not set | ||
4345 | +# CONFIG_USB_EHCI_HCD is not set | ||
4346 | +# CONFIG_USB_OXU210HP_HCD is not set | ||
4347 | +# CONFIG_USB_ISP116X_HCD is not set | ||
4348 | +# CONFIG_USB_ISP1760_HCD is not set | ||
4349 | +# CONFIG_USB_ISP1362_HCD is not set | ||
4350 | +# CONFIG_USB_SL811_HCD is not set | ||
4351 | +# CONFIG_USB_R8A66597_HCD is not set | ||
4352 | +# CONFIG_USB_HWA_HCD is not set | ||
4353 | +# CONFIG_USB_MUSB_HDRC is not set | ||
4354 | + | ||
4355 | +# | ||
4356 | +# USB Device Class drivers | ||
4357 | +# | ||
4358 | +# CONFIG_USB_ACM is not set | ||
4359 | +# CONFIG_USB_PRINTER is not set | ||
4360 | +# CONFIG_USB_WDM is not set | ||
4361 | +# CONFIG_USB_TMC is not set | ||
4362 | + | ||
4363 | +# | ||
4364 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
4365 | +# | ||
4366 | + | ||
4367 | +# | ||
4368 | +# also be needed; see USB_STORAGE Help for more info | ||
4369 | +# | ||
4370 | +CONFIG_USB_STORAGE=y | ||
4371 | +# CONFIG_USB_STORAGE_DEBUG is not set | ||
4372 | +# CONFIG_USB_STORAGE_REALTEK is not set | ||
4373 | +# CONFIG_USB_STORAGE_DATAFAB is not set | ||
4374 | +# CONFIG_USB_STORAGE_FREECOM is not set | ||
4375 | +# CONFIG_USB_STORAGE_ISD200 is not set | ||
4376 | +# CONFIG_USB_STORAGE_USBAT is not set | ||
4377 | +# CONFIG_USB_STORAGE_SDDR09 is not set | ||
4378 | +# CONFIG_USB_STORAGE_SDDR55 is not set | ||
4379 | +# CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
4380 | +# CONFIG_USB_STORAGE_ALAUDA is not set | ||
4381 | +# CONFIG_USB_STORAGE_ONETOUCH is not set | ||
4382 | +# CONFIG_USB_STORAGE_KARMA is not set | ||
4383 | +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
4384 | +# CONFIG_USB_STORAGE_ENE_UB6250 is not set | ||
4385 | +# CONFIG_USB_UAS is not set | ||
4386 | +# CONFIG_USB_LIBUSUAL is not set | ||
4387 | + | ||
4388 | +# | ||
4389 | +# USB Imaging devices | ||
4390 | +# | ||
4391 | +# CONFIG_USB_MDC800 is not set | ||
4392 | +# CONFIG_USB_MICROTEK is not set | ||
4393 | + | ||
4394 | +# | ||
4395 | +# USB port drivers | ||
4396 | +# | ||
4397 | +# CONFIG_USB_SERIAL is not set | ||
4398 | + | ||
4399 | +# | ||
4400 | +# USB Miscellaneous drivers | ||
4401 | +# | ||
4402 | +# CONFIG_USB_EMI62 is not set | ||
4403 | +# CONFIG_USB_EMI26 is not set | ||
4404 | +# CONFIG_USB_ADUTUX is not set | ||
4405 | +# CONFIG_USB_SEVSEG is not set | ||
4406 | +# CONFIG_USB_RIO500 is not set | ||
4407 | +# CONFIG_USB_LEGOTOWER is not set | ||
4408 | +# CONFIG_USB_LCD is not set | ||
4409 | +# CONFIG_USB_LED is not set | ||
4410 | +# CONFIG_USB_CYPRESS_CY7C63 is not set | ||
4411 | +# CONFIG_USB_CYTHERM is not set | ||
4412 | +# CONFIG_USB_IDMOUSE is not set | ||
4413 | +# CONFIG_USB_FTDI_ELAN is not set | ||
4414 | +# CONFIG_USB_APPLEDISPLAY is not set | ||
4415 | +# CONFIG_USB_LD is not set | ||
4416 | +# CONFIG_USB_TRANCEVIBRATOR is not set | ||
4417 | +# CONFIG_USB_IOWARRIOR is not set | ||
4418 | +# CONFIG_USB_TEST is not set | ||
4419 | +# CONFIG_USB_ISIGHTFW is not set | ||
4420 | +# CONFIG_USB_YUREX is not set | ||
4421 | +CONFIG_USB_GADGET=y | ||
4422 | +# CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
4423 | +# CONFIG_USB_GADGET_DEBUG_FS is not set | ||
4424 | +CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
4425 | +CONFIG_USB_GADGET_SELECTED=y | ||
4426 | +CONFIG_USB_GADGET_ARC=y | ||
4427 | +CONFIG_USB_ARC=y | ||
4428 | +# CONFIG_USB_GADGET_FSL_USB2 is not set | ||
4429 | +# CONFIG_USB_GADGET_FUSB300 is not set | ||
4430 | +# CONFIG_USB_GADGET_R8A66597 is not set | ||
4431 | +# CONFIG_USB_GADGET_PXA_U2O is not set | ||
4432 | +# CONFIG_USB_GADGET_M66592 is not set | ||
4433 | +# CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
4434 | +CONFIG_USB_GADGET_DUALSPEED=y | ||
4435 | +# CONFIG_USB_ZERO is not set | ||
4436 | +# CONFIG_USB_AUDIO is not set | ||
4437 | +# CONFIG_USB_ETH is not set | ||
4438 | +# CONFIG_USB_G_NCM is not set | ||
4439 | +# CONFIG_USB_GADGETFS is not set | ||
4440 | +# CONFIG_USB_FUNCTIONFS is not set | ||
4441 | +CONFIG_USB_FILE_STORAGE=y | ||
4442 | +CONFIG_FSL_UTP=y | ||
4443 | +# CONFIG_USB_FILE_STORAGE_TEST is not set | ||
4444 | +# CONFIG_USB_MASS_STORAGE is not set | ||
4445 | +# CONFIG_USB_G_SERIAL is not set | ||
4446 | +# CONFIG_USB_MIDI_GADGET is not set | ||
4447 | +# CONFIG_USB_G_PRINTER is not set | ||
4448 | +# CONFIG_USB_CDC_COMPOSITE is not set | ||
4449 | +# CONFIG_USB_G_MULTI is not set | ||
4450 | +# CONFIG_USB_G_HID is not set | ||
4451 | +# CONFIG_USB_G_DBGP is not set | ||
4452 | +# CONFIG_USB_G_WEBCAM is not set | ||
4453 | + | ||
4454 | +# | ||
4455 | +# OTG and related infrastructure | ||
4456 | +# | ||
4457 | +CONFIG_USB_OTG_UTILS=y | ||
4458 | +# CONFIG_USB_GPIO_VBUS is not set | ||
4459 | +# CONFIG_USB_ULPI is not set | ||
4460 | +# CONFIG_NOP_USB_XCEIV is not set | ||
4461 | +CONFIG_MMC=y | ||
4462 | +# CONFIG_MMC_DEBUG is not set | ||
4463 | +CONFIG_MMC_UNSAFE_RESUME=y | ||
4464 | +# CONFIG_MMC_CLKGATE is not set | ||
4465 | + | ||
4466 | +# | ||
4467 | +# MMC/SD/SDIO Card Drivers | ||
4468 | +# | ||
4469 | +CONFIG_MMC_BLOCK=y | ||
4470 | +CONFIG_MMC_BLOCK_MINORS=8 | ||
4471 | +CONFIG_MMC_BLOCK_BOUNCE=y | ||
4472 | +# CONFIG_SDIO_UART is not set | ||
4473 | +# CONFIG_MMC_TEST is not set | ||
4474 | + | ||
4475 | +# | ||
4476 | +# MMC/SD/SDIO Host Controller Drivers | ||
4477 | +# | ||
4478 | +CONFIG_MMC_SDHCI=y | ||
4479 | +CONFIG_MMC_SDHCI_IO_ACCESSORS=y | ||
4480 | +CONFIG_MMC_SDHCI_PLTFM=y | ||
4481 | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
4482 | +# CONFIG_MMC_DW is not set | ||
4483 | +# CONFIG_MMC_VUB300 is not set | ||
4484 | +# CONFIG_MMC_USHC is not set | ||
4485 | +# CONFIG_MEMSTICK is not set | ||
4486 | +# CONFIG_NEW_LEDS is not set | ||
4487 | +# CONFIG_NFC_DEVICES is not set | ||
4488 | +# CONFIG_ACCESSIBILITY is not set | ||
4489 | +CONFIG_RTC_LIB=y | ||
4490 | +CONFIG_RTC_CLASS=y | ||
4491 | +CONFIG_RTC_HCTOSYS=y | ||
4492 | +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
4493 | +# CONFIG_RTC_DEBUG is not set | ||
4494 | + | ||
4495 | +# | ||
4496 | +# RTC interfaces | ||
4497 | +# | ||
4498 | +CONFIG_RTC_INTF_SYSFS=y | ||
4499 | +CONFIG_RTC_INTF_PROC=y | ||
4500 | +CONFIG_RTC_INTF_DEV=y | ||
4501 | +CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
4502 | +# CONFIG_RTC_DRV_TEST is not set | ||
4503 | + | ||
4504 | +# | ||
4505 | +# I2C RTC drivers | ||
4506 | +# | ||
4507 | +# CONFIG_RTC_DRV_DS1307 is not set | ||
4508 | +# CONFIG_RTC_DRV_DS1374 is not set | ||
4509 | +# CONFIG_RTC_DRV_DS1672 is not set | ||
4510 | +# CONFIG_RTC_DRV_DS3232 is not set | ||
4511 | +# CONFIG_RTC_DRV_MAX6900 is not set | ||
4512 | +# CONFIG_RTC_DRV_RS5C372 is not set | ||
4513 | +# CONFIG_RTC_DRV_ISL1208 is not set | ||
4514 | +# CONFIG_RTC_DRV_ISL12022 is not set | ||
4515 | +# CONFIG_RTC_DRV_X1205 is not set | ||
4516 | +# CONFIG_RTC_DRV_PCF8563 is not set | ||
4517 | +# CONFIG_RTC_DRV_PCF8583 is not set | ||
4518 | +# CONFIG_RTC_DRV_M41T80 is not set | ||
4519 | +# CONFIG_RTC_DRV_BQ32K is not set | ||
4520 | +# CONFIG_RTC_DRV_S35390A is not set | ||
4521 | +# CONFIG_RTC_DRV_FM3130 is not set | ||
4522 | +# CONFIG_RTC_DRV_RX8581 is not set | ||
4523 | +# CONFIG_RTC_DRV_RX8025 is not set | ||
4524 | +# CONFIG_RTC_DRV_EM3027 is not set | ||
4525 | +# CONFIG_RTC_DRV_RV3029C2 is not set | ||
4526 | + | ||
4527 | +# | ||
4528 | +# SPI RTC drivers | ||
4529 | +# | ||
4530 | +# CONFIG_RTC_DRV_M41T93 is not set | ||
4531 | +# CONFIG_RTC_DRV_M41T94 is not set | ||
4532 | +# CONFIG_RTC_DRV_DS1305 is not set | ||
4533 | +# CONFIG_RTC_DRV_DS1390 is not set | ||
4534 | +# CONFIG_RTC_DRV_MAX6902 is not set | ||
4535 | +# CONFIG_RTC_DRV_R9701 is not set | ||
4536 | +# CONFIG_RTC_DRV_RS5C348 is not set | ||
4537 | +# CONFIG_RTC_DRV_DS3234 is not set | ||
4538 | +# CONFIG_RTC_DRV_PCF2123 is not set | ||
4539 | + | ||
4540 | +# | ||
4541 | +# Platform RTC drivers | ||
4542 | +# | ||
4543 | +# CONFIG_RTC_DRV_CMOS is not set | ||
4544 | +# CONFIG_RTC_DRV_DS1286 is not set | ||
4545 | +# CONFIG_RTC_DRV_DS1511 is not set | ||
4546 | +# CONFIG_RTC_DRV_DS1553 is not set | ||
4547 | +# CONFIG_RTC_DRV_DS1742 is not set | ||
4548 | +# CONFIG_RTC_DRV_STK17TA8 is not set | ||
4549 | +# CONFIG_RTC_DRV_M48T86 is not set | ||
4550 | +# CONFIG_RTC_DRV_M48T35 is not set | ||
4551 | +# CONFIG_RTC_DRV_M48T59 is not set | ||
4552 | +# CONFIG_RTC_DRV_MSM6242 is not set | ||
4553 | +# CONFIG_RTC_MXC is not set | ||
4554 | +# CONFIG_RTC_DRV_MXC_V2 is not set | ||
4555 | +CONFIG_RTC_DRV_SNVS=y | ||
4556 | +# CONFIG_RTC_DRV_BQ4802 is not set | ||
4557 | +# CONFIG_RTC_DRV_RP5C01 is not set | ||
4558 | +# CONFIG_RTC_DRV_V3020 is not set | ||
4559 | + | ||
4560 | +# | ||
4561 | +# on-CPU RTC drivers | ||
4562 | +# | ||
4563 | +CONFIG_DMADEVICES=y | ||
4564 | +# CONFIG_DMADEVICES_DEBUG is not set | ||
4565 | + | ||
4566 | +# | ||
4567 | +# DMA Devices | ||
4568 | +# | ||
4569 | +# CONFIG_DW_DMAC is not set | ||
4570 | +# CONFIG_MXC_PXP is not set | ||
4571 | +# CONFIG_MXC_PXP_V2 is not set | ||
4572 | +# CONFIG_TIMB_DMA is not set | ||
4573 | +CONFIG_IMX_SDMA=y | ||
4574 | +# CONFIG_MXS_DMA is not set | ||
4575 | +CONFIG_DMA_ENGINE=y | ||
4576 | + | ||
4577 | +# | ||
4578 | +# DMA Clients | ||
4579 | +# | ||
4580 | +# CONFIG_NET_DMA is not set | ||
4581 | +# CONFIG_ASYNC_TX_DMA is not set | ||
4582 | +# CONFIG_DMATEST is not set | ||
4583 | +# CONFIG_AUXDISPLAY is not set | ||
4584 | +# CONFIG_UIO is not set | ||
4585 | +CONFIG_STAGING=y | ||
4586 | +# CONFIG_USBIP_CORE is not set | ||
4587 | +# CONFIG_ECHO is not set | ||
4588 | +# CONFIG_BRCMUTIL is not set | ||
4589 | +# CONFIG_ASUS_OLED is not set | ||
4590 | +# CONFIG_R8712U is not set | ||
4591 | +# CONFIG_TRANZPORT is not set | ||
4592 | +# CONFIG_POHMELFS is not set | ||
4593 | +# CONFIG_LINE6_USB is not set | ||
4594 | +# CONFIG_VT6656 is not set | ||
4595 | +# CONFIG_IIO is not set | ||
4596 | +# CONFIG_XVMALLOC is not set | ||
4597 | +# CONFIG_ZRAM is not set | ||
4598 | +# CONFIG_FB_SM7XX is not set | ||
4599 | +# CONFIG_EASYCAP is not set | ||
4600 | +CONFIG_MACH_NO_WESTBRIDGE=y | ||
4601 | +# CONFIG_USB_ENESTORAGE is not set | ||
4602 | +# CONFIG_BCM_WIMAX is not set | ||
4603 | +# CONFIG_FT1000 is not set | ||
4604 | + | ||
4605 | +# | ||
4606 | +# Speakup console speech | ||
4607 | +# | ||
4608 | +# CONFIG_SPEAKUP is not set | ||
4609 | +# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set | ||
4610 | +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set | ||
4611 | + | ||
4612 | +# | ||
4613 | +# Altera FPGA firmware download module | ||
4614 | +# | ||
4615 | +# CONFIG_ALTERA_STAPL is not set | ||
4616 | +CONFIG_CLKDEV_LOOKUP=y | ||
4617 | +CONFIG_CLKSRC_MMIO=y | ||
4618 | + | ||
4619 | +# | ||
4620 | +# MXC support drivers | ||
4621 | +# | ||
4622 | +CONFIG_MXC_IPU=y | ||
4623 | +CONFIG_MXC_IPU_V3=y | ||
4624 | +CONFIG_MXC_IPU_V3H=y | ||
4625 | + | ||
4626 | +# | ||
4627 | +# MXC SSI support | ||
4628 | +# | ||
4629 | +# CONFIG_MXC_SSI is not set | ||
4630 | + | ||
4631 | +# | ||
4632 | +# MXC Digital Audio Multiplexer support | ||
4633 | +# | ||
4634 | +# CONFIG_MXC_DAM is not set | ||
4635 | + | ||
4636 | +# | ||
4637 | +# MXC PMIC support | ||
4638 | +# | ||
4639 | +# CONFIG_MXC_PMIC_MC13783 is not set | ||
4640 | +# CONFIG_MXC_PMIC_MC13892 is not set | ||
4641 | +# CONFIG_MXC_PMIC_MC34704 is not set | ||
4642 | +# CONFIG_MXC_PMIC_MC9SDZ60 is not set | ||
4643 | +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set | ||
4644 | + | ||
4645 | +# | ||
4646 | +# MXC Security Drivers | ||
4647 | +# | ||
4648 | +# CONFIG_MXC_SECURITY_SCC is not set | ||
4649 | +# CONFIG_MXC_SECURITY_RNG is not set | ||
4650 | + | ||
4651 | +# | ||
4652 | +# MXC MPEG4 Encoder Kernel module support | ||
4653 | +# | ||
4654 | +# CONFIG_MXC_HMP4E is not set | ||
4655 | + | ||
4656 | +# | ||
4657 | +# MXC HARDWARE EVENT | ||
4658 | +# | ||
4659 | +# CONFIG_MXC_HWEVENT is not set | ||
4660 | + | ||
4661 | +# | ||
4662 | +# MXC VPU(Video Processing Unit) support | ||
4663 | +# | ||
4664 | +CONFIG_MXC_VPU=y | ||
4665 | +# CONFIG_MXC_VPU_DEBUG is not set | ||
4666 | + | ||
4667 | +# | ||
4668 | +# MXC Asynchronous Sample Rate Converter support | ||
4669 | +# | ||
4670 | +CONFIG_MXC_ASRC=y | ||
4671 | + | ||
4672 | +# | ||
4673 | +# MXC Bluetooth support | ||
4674 | +# | ||
4675 | + | ||
4676 | +# | ||
4677 | +# Broadcom GPS ioctrl support | ||
4678 | +# | ||
4679 | + | ||
4680 | +# | ||
4681 | +# MXC Media Local Bus Driver | ||
4682 | +# | ||
4683 | +# CONFIG_MXC_MLB150 is not set | ||
4684 | + | ||
4685 | +# | ||
4686 | +# i.MX ADC support | ||
4687 | +# | ||
4688 | +# CONFIG_IMX_ADC is not set | ||
4689 | + | ||
4690 | +# | ||
4691 | +# MXC Vivante GPU support | ||
4692 | +# | ||
4693 | +# CONFIG_MXC_GPU_VIV is not set | ||
4694 | + | ||
4695 | +# | ||
4696 | +# ANATOP_THERMAL | ||
4697 | +# | ||
4698 | +# CONFIG_ANATOP_THERMAL is not set | ||
4699 | + | ||
4700 | +# | ||
4701 | +# MXC MIPI Support | ||
4702 | +# | ||
4703 | +# CONFIG_MXC_MIPI_CSI2 is not set | ||
4704 | + | ||
4705 | +# | ||
4706 | +# File systems | ||
4707 | +# | ||
4708 | +CONFIG_EXT2_FS=y | ||
4709 | +# CONFIG_EXT2_FS_XATTR is not set | ||
4710 | +# CONFIG_EXT2_FS_XIP is not set | ||
4711 | +CONFIG_EXT3_FS=y | ||
4712 | +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
4713 | +CONFIG_EXT3_FS_XATTR=y | ||
4714 | +# CONFIG_EXT3_FS_POSIX_ACL is not set | ||
4715 | +# CONFIG_EXT3_FS_SECURITY is not set | ||
4716 | +CONFIG_EXT4_FS=y | ||
4717 | +CONFIG_EXT4_FS_XATTR=y | ||
4718 | +# CONFIG_EXT4_FS_POSIX_ACL is not set | ||
4719 | +# CONFIG_EXT4_FS_SECURITY is not set | ||
4720 | +# CONFIG_EXT4_DEBUG is not set | ||
4721 | +CONFIG_JBD=y | ||
4722 | +# CONFIG_JBD_DEBUG is not set | ||
4723 | +CONFIG_JBD2=y | ||
4724 | +# CONFIG_JBD2_DEBUG is not set | ||
4725 | +CONFIG_FS_MBCACHE=y | ||
4726 | +# CONFIG_REISERFS_FS is not set | ||
4727 | +# CONFIG_JFS_FS is not set | ||
4728 | +# CONFIG_XFS_FS is not set | ||
4729 | +# CONFIG_GFS2_FS is not set | ||
4730 | +# CONFIG_BTRFS_FS is not set | ||
4731 | +# CONFIG_NILFS2_FS is not set | ||
4732 | +# CONFIG_FS_POSIX_ACL is not set | ||
4733 | +CONFIG_FILE_LOCKING=y | ||
4734 | +CONFIG_FSNOTIFY=y | ||
4735 | +CONFIG_DNOTIFY=y | ||
4736 | +CONFIG_INOTIFY_USER=y | ||
4737 | +# CONFIG_FANOTIFY is not set | ||
4738 | +# CONFIG_QUOTA is not set | ||
4739 | +# CONFIG_QUOTACTL is not set | ||
4740 | +CONFIG_AUTOFS4_FS=m | ||
4741 | +# CONFIG_FUSE_FS is not set | ||
4742 | + | ||
4743 | +# | ||
4744 | +# Caches | ||
4745 | +# | ||
4746 | +# CONFIG_FSCACHE is not set | ||
4747 | + | ||
4748 | +# | ||
4749 | +# CD-ROM/DVD Filesystems | ||
4750 | +# | ||
4751 | +# CONFIG_ISO9660_FS is not set | ||
4752 | +# CONFIG_UDF_FS is not set | ||
4753 | + | ||
4754 | +# | ||
4755 | +# DOS/FAT/NT Filesystems | ||
4756 | +# | ||
4757 | +CONFIG_FAT_FS=y | ||
4758 | +CONFIG_MSDOS_FS=y | ||
4759 | +CONFIG_VFAT_FS=y | ||
4760 | +CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
4761 | +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
4762 | +# CONFIG_NTFS_FS is not set | ||
4763 | + | ||
4764 | +# | ||
4765 | +# Pseudo filesystems | ||
4766 | +# | ||
4767 | +CONFIG_PROC_FS=y | ||
4768 | +CONFIG_PROC_SYSCTL=y | ||
4769 | +CONFIG_PROC_PAGE_MONITOR=y | ||
4770 | +CONFIG_SYSFS=y | ||
4771 | +CONFIG_TMPFS=y | ||
4772 | +# CONFIG_TMPFS_POSIX_ACL is not set | ||
4773 | +# CONFIG_TMPFS_XATTR is not set | ||
4774 | +# CONFIG_HUGETLB_PAGE is not set | ||
4775 | +# CONFIG_CONFIGFS_FS is not set | ||
4776 | +CONFIG_MISC_FILESYSTEMS=y | ||
4777 | +# CONFIG_ADFS_FS is not set | ||
4778 | +# CONFIG_AFFS_FS is not set | ||
4779 | +# CONFIG_HFS_FS is not set | ||
4780 | +# CONFIG_HFSPLUS_FS is not set | ||
4781 | +# CONFIG_BEFS_FS is not set | ||
4782 | +# CONFIG_BFS_FS is not set | ||
4783 | +# CONFIG_EFS_FS is not set | ||
4784 | +CONFIG_JFFS2_FS=y | ||
4785 | +CONFIG_JFFS2_FS_DEBUG=0 | ||
4786 | +CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
4787 | +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
4788 | +# CONFIG_JFFS2_SUMMARY is not set | ||
4789 | +# CONFIG_JFFS2_FS_XATTR is not set | ||
4790 | +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
4791 | +CONFIG_JFFS2_ZLIB=y | ||
4792 | +# CONFIG_JFFS2_LZO is not set | ||
4793 | +CONFIG_JFFS2_RTIME=y | ||
4794 | +# CONFIG_JFFS2_RUBIN is not set | ||
4795 | +CONFIG_UBIFS_FS=y | ||
4796 | +# CONFIG_UBIFS_FS_XATTR is not set | ||
4797 | +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | ||
4798 | +CONFIG_UBIFS_FS_LZO=y | ||
4799 | +CONFIG_UBIFS_FS_ZLIB=y | ||
4800 | +# CONFIG_UBIFS_FS_DEBUG is not set | ||
4801 | +# CONFIG_LOGFS is not set | ||
4802 | +CONFIG_CRAMFS=y | ||
4803 | +# CONFIG_SQUASHFS is not set | ||
4804 | +# CONFIG_VXFS_FS is not set | ||
4805 | +# CONFIG_MINIX_FS is not set | ||
4806 | +# CONFIG_OMFS_FS is not set | ||
4807 | +# CONFIG_HPFS_FS is not set | ||
4808 | +# CONFIG_QNX4FS_FS is not set | ||
4809 | +# CONFIG_ROMFS_FS is not set | ||
4810 | +# CONFIG_PSTORE is not set | ||
4811 | +# CONFIG_SYSV_FS is not set | ||
4812 | +# CONFIG_UFS_FS is not set | ||
4813 | +CONFIG_NETWORK_FILESYSTEMS=y | ||
4814 | +CONFIG_NFS_FS=y | ||
4815 | +CONFIG_NFS_V3=y | ||
4816 | +# CONFIG_NFS_V3_ACL is not set | ||
4817 | +# CONFIG_NFS_V4 is not set | ||
4818 | +CONFIG_ROOT_NFS=y | ||
4819 | +# CONFIG_NFSD is not set | ||
4820 | +CONFIG_LOCKD=y | ||
4821 | +CONFIG_LOCKD_V4=y | ||
4822 | +CONFIG_NFS_COMMON=y | ||
4823 | +CONFIG_SUNRPC=y | ||
4824 | +# CONFIG_CEPH_FS is not set | ||
4825 | +# CONFIG_CIFS is not set | ||
4826 | +# CONFIG_NCP_FS is not set | ||
4827 | +# CONFIG_CODA_FS is not set | ||
4828 | +# CONFIG_AFS_FS is not set | ||
4829 | + | ||
4830 | +# | ||
4831 | +# Partition Types | ||
4832 | +# | ||
4833 | +CONFIG_PARTITION_ADVANCED=y | ||
4834 | +# CONFIG_ACORN_PARTITION is not set | ||
4835 | +# CONFIG_OSF_PARTITION is not set | ||
4836 | +# CONFIG_AMIGA_PARTITION is not set | ||
4837 | +# CONFIG_ATARI_PARTITION is not set | ||
4838 | +# CONFIG_MAC_PARTITION is not set | ||
4839 | +CONFIG_MSDOS_PARTITION=y | ||
4840 | +# CONFIG_BSD_DISKLABEL is not set | ||
4841 | +# CONFIG_MINIX_SUBPARTITION is not set | ||
4842 | +# CONFIG_SOLARIS_X86_PARTITION is not set | ||
4843 | +# CONFIG_UNIXWARE_DISKLABEL is not set | ||
4844 | +# CONFIG_LDM_PARTITION is not set | ||
4845 | +# CONFIG_SGI_PARTITION is not set | ||
4846 | +# CONFIG_ULTRIX_PARTITION is not set | ||
4847 | +# CONFIG_SUN_PARTITION is not set | ||
4848 | +# CONFIG_KARMA_PARTITION is not set | ||
4849 | +CONFIG_EFI_PARTITION=y | ||
4850 | +# CONFIG_SYSV68_PARTITION is not set | ||
4851 | +CONFIG_NLS=y | ||
4852 | +CONFIG_NLS_DEFAULT="iso8859-1" | ||
4853 | +CONFIG_NLS_CODEPAGE_437=y | ||
4854 | +# CONFIG_NLS_CODEPAGE_737 is not set | ||
4855 | +# CONFIG_NLS_CODEPAGE_775 is not set | ||
4856 | +# CONFIG_NLS_CODEPAGE_850 is not set | ||
4857 | +# CONFIG_NLS_CODEPAGE_852 is not set | ||
4858 | +# CONFIG_NLS_CODEPAGE_855 is not set | ||
4859 | +# CONFIG_NLS_CODEPAGE_857 is not set | ||
4860 | +# CONFIG_NLS_CODEPAGE_860 is not set | ||
4861 | +# CONFIG_NLS_CODEPAGE_861 is not set | ||
4862 | +# CONFIG_NLS_CODEPAGE_862 is not set | ||
4863 | +# CONFIG_NLS_CODEPAGE_863 is not set | ||
4864 | +# CONFIG_NLS_CODEPAGE_864 is not set | ||
4865 | +# CONFIG_NLS_CODEPAGE_865 is not set | ||
4866 | +# CONFIG_NLS_CODEPAGE_866 is not set | ||
4867 | +# CONFIG_NLS_CODEPAGE_869 is not set | ||
4868 | +# CONFIG_NLS_CODEPAGE_936 is not set | ||
4869 | +# CONFIG_NLS_CODEPAGE_950 is not set | ||
4870 | +# CONFIG_NLS_CODEPAGE_932 is not set | ||
4871 | +# CONFIG_NLS_CODEPAGE_949 is not set | ||
4872 | +# CONFIG_NLS_CODEPAGE_874 is not set | ||
4873 | +# CONFIG_NLS_ISO8859_8 is not set | ||
4874 | +# CONFIG_NLS_CODEPAGE_1250 is not set | ||
4875 | +# CONFIG_NLS_CODEPAGE_1251 is not set | ||
4876 | +CONFIG_NLS_ASCII=m | ||
4877 | +CONFIG_NLS_ISO8859_1=y | ||
4878 | +# CONFIG_NLS_ISO8859_2 is not set | ||
4879 | +# CONFIG_NLS_ISO8859_3 is not set | ||
4880 | +# CONFIG_NLS_ISO8859_4 is not set | ||
4881 | +# CONFIG_NLS_ISO8859_5 is not set | ||
4882 | +# CONFIG_NLS_ISO8859_6 is not set | ||
4883 | +# CONFIG_NLS_ISO8859_7 is not set | ||
4884 | +# CONFIG_NLS_ISO8859_9 is not set | ||
4885 | +# CONFIG_NLS_ISO8859_13 is not set | ||
4886 | +# CONFIG_NLS_ISO8859_14 is not set | ||
4887 | +# CONFIG_NLS_ISO8859_15 is not set | ||
4888 | +# CONFIG_NLS_KOI8_R is not set | ||
4889 | +# CONFIG_NLS_KOI8_U is not set | ||
4890 | +CONFIG_NLS_UTF8=m | ||
4891 | + | ||
4892 | +# | ||
4893 | +# Kernel hacking | ||
4894 | +# | ||
4895 | +# CONFIG_PRINTK_TIME is not set | ||
4896 | +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 | ||
4897 | +CONFIG_ENABLE_WARN_DEPRECATED=y | ||
4898 | +CONFIG_ENABLE_MUST_CHECK=y | ||
4899 | +CONFIG_FRAME_WARN=1024 | ||
4900 | +# CONFIG_MAGIC_SYSRQ is not set | ||
4901 | +# CONFIG_STRIP_ASM_SYMS is not set | ||
4902 | +# CONFIG_UNUSED_SYMBOLS is not set | ||
4903 | +CONFIG_DEBUG_FS=y | ||
4904 | +# CONFIG_HEADERS_CHECK is not set | ||
4905 | +# CONFIG_DEBUG_SECTION_MISMATCH is not set | ||
4906 | +# CONFIG_DEBUG_KERNEL is not set | ||
4907 | +# CONFIG_HARDLOCKUP_DETECTOR is not set | ||
4908 | +# CONFIG_SLUB_DEBUG_ON is not set | ||
4909 | +# CONFIG_SLUB_STATS is not set | ||
4910 | +# CONFIG_SPARSE_RCU_POINTER is not set | ||
4911 | +CONFIG_DEBUG_BUGVERBOSE=y | ||
4912 | +# CONFIG_DEBUG_MEMORY_INIT is not set | ||
4913 | +CONFIG_RCU_CPU_STALL_TIMEOUT=60 | ||
4914 | +CONFIG_RCU_CPU_STALL_VERBOSE=y | ||
4915 | +# CONFIG_LKDTM is not set | ||
4916 | +CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
4917 | +CONFIG_HAVE_FUNCTION_TRACER=y | ||
4918 | +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
4919 | +CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
4920 | +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
4921 | +CONFIG_HAVE_C_RECORDMCOUNT=y | ||
4922 | +CONFIG_TRACING_SUPPORT=y | ||
4923 | +# CONFIG_FTRACE is not set | ||
4924 | +# CONFIG_DYNAMIC_DEBUG is not set | ||
4925 | +# CONFIG_DMA_API_DEBUG is not set | ||
4926 | +# CONFIG_ATOMIC64_SELFTEST is not set | ||
4927 | +# CONFIG_SAMPLES is not set | ||
4928 | +CONFIG_HAVE_ARCH_KGDB=y | ||
4929 | +# CONFIG_TEST_KSTRTOX is not set | ||
4930 | +# CONFIG_STRICT_DEVMEM is not set | ||
4931 | +CONFIG_ARM_UNWIND=y | ||
4932 | +# CONFIG_DEBUG_USER is not set | ||
4933 | +# CONFIG_OC_ETM is not set | ||
4934 | + | ||
4935 | +# | ||
4936 | +# Security options | ||
4937 | +# | ||
4938 | +# CONFIG_KEYS is not set | ||
4939 | +# CONFIG_SECURITY_DMESG_RESTRICT is not set | ||
4940 | +# CONFIG_SECURITY is not set | ||
4941 | +# CONFIG_SECURITYFS is not set | ||
4942 | +CONFIG_DEFAULT_SECURITY_DAC=y | ||
4943 | +CONFIG_DEFAULT_SECURITY="" | ||
4944 | +CONFIG_CRYPTO=y | ||
4945 | + | ||
4946 | +# | ||
4947 | +# Crypto core or helper | ||
4948 | +# | ||
4949 | +CONFIG_CRYPTO_ALGAPI=y | ||
4950 | +CONFIG_CRYPTO_ALGAPI2=y | ||
4951 | +CONFIG_CRYPTO_AEAD2=y | ||
4952 | +CONFIG_CRYPTO_BLKCIPHER=y | ||
4953 | +CONFIG_CRYPTO_BLKCIPHER2=y | ||
4954 | +CONFIG_CRYPTO_HASH2=y | ||
4955 | +CONFIG_CRYPTO_RNG2=y | ||
4956 | +CONFIG_CRYPTO_PCOMP2=y | ||
4957 | +CONFIG_CRYPTO_MANAGER=y | ||
4958 | +CONFIG_CRYPTO_MANAGER2=y | ||
4959 | +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | ||
4960 | +# CONFIG_CRYPTO_GF128MUL is not set | ||
4961 | +# CONFIG_CRYPTO_NULL is not set | ||
4962 | +# CONFIG_CRYPTO_PCRYPT is not set | ||
4963 | +CONFIG_CRYPTO_WORKQUEUE=y | ||
4964 | +# CONFIG_CRYPTO_CRYPTD is not set | ||
4965 | +# CONFIG_CRYPTO_AUTHENC is not set | ||
4966 | +CONFIG_CRYPTO_TEST=m | ||
4967 | +CONFIG_CRYPTO_CRYPTODEV=y | ||
4968 | + | ||
4969 | +# | ||
4970 | +# Authenticated Encryption with Associated Data | ||
4971 | +# | ||
4972 | +# CONFIG_CRYPTO_CCM is not set | ||
4973 | +# CONFIG_CRYPTO_GCM is not set | ||
4974 | +# CONFIG_CRYPTO_SEQIV is not set | ||
4975 | + | ||
4976 | +# | ||
4977 | +# Block modes | ||
4978 | +# | ||
4979 | +CONFIG_CRYPTO_CBC=y | ||
4980 | +# CONFIG_CRYPTO_CTR is not set | ||
4981 | +# CONFIG_CRYPTO_CTS is not set | ||
4982 | +CONFIG_CRYPTO_ECB=y | ||
4983 | +# CONFIG_CRYPTO_LRW is not set | ||
4984 | +# CONFIG_CRYPTO_PCBC is not set | ||
4985 | +# CONFIG_CRYPTO_XTS is not set | ||
4986 | + | ||
4987 | +# | ||
4988 | +# Hash modes | ||
4989 | +# | ||
4990 | +# CONFIG_CRYPTO_HMAC is not set | ||
4991 | +# CONFIG_CRYPTO_XCBC is not set | ||
4992 | +# CONFIG_CRYPTO_VMAC is not set | ||
4993 | + | ||
4994 | +# | ||
4995 | +# Digest | ||
4996 | +# | ||
4997 | +# CONFIG_CRYPTO_CRC32C is not set | ||
4998 | +# CONFIG_CRYPTO_GHASH is not set | ||
4999 | +# CONFIG_CRYPTO_MD4 is not set | ||
5000 | +# CONFIG_CRYPTO_MD5 is not set | ||
5001 | +# CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
5002 | +# CONFIG_CRYPTO_RMD128 is not set | ||
5003 | +# CONFIG_CRYPTO_RMD160 is not set | ||
5004 | +# CONFIG_CRYPTO_RMD256 is not set | ||
5005 | +# CONFIG_CRYPTO_RMD320 is not set | ||
5006 | +# CONFIG_CRYPTO_SHA1 is not set | ||
5007 | +# CONFIG_CRYPTO_SHA256 is not set | ||
5008 | +# CONFIG_CRYPTO_SHA512 is not set | ||
5009 | +# CONFIG_CRYPTO_TGR192 is not set | ||
5010 | +# CONFIG_CRYPTO_WP512 is not set | ||
5011 | + | ||
5012 | +# | ||
5013 | +# Ciphers | ||
5014 | +# | ||
5015 | +CONFIG_CRYPTO_AES=y | ||
5016 | +# CONFIG_CRYPTO_ANUBIS is not set | ||
5017 | +# CONFIG_CRYPTO_ARC4 is not set | ||
5018 | +# CONFIG_CRYPTO_BLOWFISH is not set | ||
5019 | +# CONFIG_CRYPTO_CAMELLIA is not set | ||
5020 | +# CONFIG_CRYPTO_CAST5 is not set | ||
5021 | +# CONFIG_CRYPTO_CAST6 is not set | ||
5022 | +# CONFIG_CRYPTO_DES is not set | ||
5023 | +# CONFIG_CRYPTO_FCRYPT is not set | ||
5024 | +# CONFIG_CRYPTO_KHAZAD is not set | ||
5025 | +# CONFIG_CRYPTO_SALSA20 is not set | ||
5026 | +# CONFIG_CRYPTO_SEED is not set | ||
5027 | +# CONFIG_CRYPTO_SERPENT is not set | ||
5028 | +# CONFIG_CRYPTO_TEA is not set | ||
5029 | +# CONFIG_CRYPTO_TWOFISH is not set | ||
5030 | + | ||
5031 | +# | ||
5032 | +# Compression | ||
5033 | +# | ||
5034 | +CONFIG_CRYPTO_DEFLATE=y | ||
5035 | +# CONFIG_CRYPTO_ZLIB is not set | ||
5036 | +CONFIG_CRYPTO_LZO=y | ||
5037 | + | ||
5038 | +# | ||
5039 | +# Random Number Generation | ||
5040 | +# | ||
5041 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
5042 | +# CONFIG_CRYPTO_USER_API_HASH is not set | ||
5043 | +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set | ||
5044 | +CONFIG_CRYPTO_HW=y | ||
5045 | +# CONFIG_BINARY_PRINTF is not set | ||
5046 | + | ||
5047 | +# | ||
5048 | +# Library routines | ||
5049 | +# | ||
5050 | +CONFIG_BITREVERSE=y | ||
5051 | +CONFIG_RATIONAL=y | ||
5052 | +CONFIG_CRC_CCITT=m | ||
5053 | +CONFIG_CRC16=y | ||
5054 | +# CONFIG_CRC_T10DIF is not set | ||
5055 | +# CONFIG_CRC_ITU_T is not set | ||
5056 | +CONFIG_CRC32=y | ||
5057 | +# CONFIG_CRC7 is not set | ||
5058 | +# CONFIG_LIBCRC32C is not set | ||
5059 | +CONFIG_ZLIB_INFLATE=y | ||
5060 | +CONFIG_ZLIB_DEFLATE=y | ||
5061 | +CONFIG_LZO_COMPRESS=y | ||
5062 | +CONFIG_LZO_DECOMPRESS=y | ||
5063 | +# CONFIG_XZ_DEC is not set | ||
5064 | +# CONFIG_XZ_DEC_BCJ is not set | ||
5065 | +CONFIG_DECOMPRESS_GZIP=y | ||
5066 | +CONFIG_GENERIC_ALLOCATOR=y | ||
5067 | +CONFIG_HAS_IOMEM=y | ||
5068 | +CONFIG_HAS_IOPORT=y | ||
5069 | +CONFIG_HAS_DMA=y | ||
5070 | +CONFIG_CPU_RMAP=y | ||
5071 | +CONFIG_NLATTR=y | ||
5072 | +# CONFIG_AVERAGE is not set | ||
5073 | diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig | ||
5074 | index 64ce4d4..e6c2fca 100644 | ||
5075 | --- a/arch/arm/mach-mx6/Kconfig | ||
5076 | +++ b/arch/arm/mach-mx6/Kconfig | ||
5077 | @@ -180,6 +180,41 @@ config MACH_MX6Q_SABRELITE | ||
5078 | Include support for i.MX 6Quad SABRE Lite platform. This includes specific | ||
5079 | configurations for the board and its peripherals. | ||
5080 | |||
5081 | +config MACH_MX6Q_QMX6 | ||
5082 | + bool "Support Congatec i.MX 6Quad QMX6 platform" | ||
5083 | + select ARCH_MX6Q | ||
5084 | + select SOC_IMX6Q | ||
5085 | + select IMX_HAVE_PLATFORM_IMX_UART | ||
5086 | + select IMX_HAVE_PLATFORM_DMA | ||
5087 | + select IMX_HAVE_PLATFORM_FEC | ||
5088 | + select IMX_HAVE_PLATFORM_GPMI_NFC | ||
5089 | + select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | ||
5090 | + select IMX_HAVE_PLATFORM_SPI_IMX | ||
5091 | + select IMX_HAVE_PLATFORM_IMX_I2C | ||
5092 | + select IMX_HAVE_PLATFORM_VIV_GPU | ||
5093 | + select IMX_HAVE_PLATFORM_IMX_VPU | ||
5094 | + select IMX_HAVE_PLATFORM_IMX_DVFS | ||
5095 | + select IMX_HAVE_PLATFORM_IMX_SSI | ||
5096 | + select IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL | ||
5097 | + select IMX_HAVE_PLATFORM_FSL_USB2_UDC | ||
5098 | + select IMX_HAVE_PLATFORM_MXC_EHCI | ||
5099 | + select IMX_HAVE_PLATFORM_FSL_OTG | ||
5100 | + select IMX_HAVE_PLATFORM_FSL_USB_WAKEUP | ||
5101 | + select IMX_HAVE_PLATFORM_AHCI | ||
5102 | + select IMX_HAVE_PLATFORM_IMX_OCOTP | ||
5103 | + select IMX_HAVE_PLATFORM_IMX_VIIM | ||
5104 | + select IMX_HAVE_PLATFORM_IMX2_WDT | ||
5105 | + select IMX_HAVE_PLATFORM_IMX_SNVS_RTC | ||
5106 | + select IMX_HAVE_PLATFORM_IMX_PM | ||
5107 | + select IMX_HAVE_PLATFORM_MXC_HDMI | ||
5108 | + select IMX_HAVE_PLATFORM_IMX_ASRC | ||
5109 | + select IMX_HAVE_PLATFORM_FLEXCAN | ||
5110 | + select IMX_HAVE_PLATFORM_IMX_MIPI_CSI2 | ||
5111 | + select IMX_HAVE_PLATFORM_IMX_PCIE | ||
5112 | + help | ||
5113 | + Include support for Congatec i.MX 6Quad QMX6 platform. This includes specific | ||
5114 | + configurations for the board and its peripherals. | ||
5115 | + | ||
5116 | config MACH_MX6Q_SABRESD | ||
5117 | bool "Support i.MX 6Quad SABRESD platform" | ||
5118 | select ARCH_MX6Q | ||
5119 | diff --git a/arch/arm/mach-mx6/Makefile b/arch/arm/mach-mx6/Makefile | ||
5120 | index 8c1d754..b745797 100644 | ||
5121 | --- a/arch/arm/mach-mx6/Makefile | ||
5122 | +++ b/arch/arm/mach-mx6/Makefile | ||
5123 | @@ -1,6 +1,7 @@ | ||
5124 | # | ||
5125 | # Makefile for the linux kernel. | ||
5126 | # | ||
5127 | +CFLAGS_mx6q_qmx6_pmic_pfuze100.o += -DPFUZE100_FIRST_VERSION | ||
5128 | |||
5129 | # Object file lists. | ||
5130 | obj-y := cpu.o mm.o system.o devices.o dummy_gpio.o irq.o bus_freq.o usb_h2.o usb_h3.o\ | ||
5131 | @@ -12,6 +13,7 @@ obj-$(CONFIG_MACH_MX6Q_ARM2) += board-mx6q_arm2.o | ||
5132 | obj-$(CONFIG_MACH_MX6SL_ARM2) += board-mx6sl_arm2.o mx6sl_arm2_pmic_pfuze100.o | ||
5133 | obj-$(CONFIG_MACH_MX6SL_EVK) += board-mx6sl_evk.o mx6sl_evk_pmic_pfuze100.o | ||
5134 | obj-$(CONFIG_MACH_MX6Q_SABRELITE) += board-mx6q_sabrelite.o | ||
5135 | +obj-$(CONFIG_MACH_MX6Q_QMX6) += board-mx6q_qmx6.o mx6q_qmx6_pmic_pfuze100.o | ||
5136 | obj-$(CONFIG_MACH_MX6Q_SABRESD) += board-mx6q_sabresd.o mx6q_sabresd_pmic_pfuze100.o | ||
5137 | obj-$(CONFIG_MACH_MX6Q_SABREAUTO) += board-mx6q_sabreauto.o mx6q_sabreauto_pmic_pfuze100.o | ||
5138 | obj-$(CONFIG_MACH_MX6Q_HDMIDONGLE) += board-mx6q_hdmidongle.o | ||
5139 | diff --git a/arch/arm/mach-mx6/board-mx6dl_qmx6.h b/arch/arm/mach-mx6/board-mx6dl_qmx6.h | ||
5140 | new file mode 100644 | ||
5141 | index 0000000..b7f7e9a | ||
5142 | --- /dev/null | ||
5143 | +++ b/arch/arm/mach-mx6/board-mx6dl_qmx6.h | ||
5144 | @@ -0,0 +1,199 @@ | ||
5145 | +/* | ||
5146 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5147 | + * | ||
5148 | + * This program is free software; you can redistribute it and/or modify | ||
5149 | + * it under the terms of the GNU General Public License as published by | ||
5150 | + * the Free Software Foundation; either version 2 of the License, or | ||
5151 | + * (at your option) any later version. | ||
5152 | + | ||
5153 | + * This program is distributed in the hope that it will be useful, | ||
5154 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
5155 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
5156 | + * GNU General Public License for more details. | ||
5157 | + | ||
5158 | + * You should have received a copy of the GNU General Public License along | ||
5159 | + * with this program; if not, write to the Free Software Foundation, Inc., | ||
5160 | + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
5161 | + */ | ||
5162 | + | ||
5163 | +#ifndef _BOARD_MX6DL_QMX6_H | ||
5164 | +#define _BOARD_MX6DL_QMX6_H | ||
5165 | +#include <mach/iomux-mx6dl.h> | ||
5166 | + | ||
5167 | +static iomux_v3_cfg_t mx6dl_qmx6_pads[] = { | ||
5168 | + /* AUDMUX */ | ||
5169 | + MX6DL_PAD_DI0_PIN4__AUDMUX_AUD6_RXD, | ||
5170 | + MX6DL_PAD_DI0_PIN15__AUDMUX_AUD6_TXC, | ||
5171 | + MX6DL_PAD_DI0_PIN2__AUDMUX_AUD6_TXD, | ||
5172 | + MX6DL_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS, | ||
5173 | + | ||
5174 | + /* CAN1 */ | ||
5175 | + MX6DL_PAD_KEY_ROW2__CAN1_RXCAN, | ||
5176 | + MX6DL_PAD_KEY_COL2__CAN1_TXCAN, | ||
5177 | + MX6DL_PAD_GPIO_2__GPIO_1_2, /* PCIE_WAKE_B */ | ||
5178 | + | ||
5179 | + /* CCM */ | ||
5180 | + MX6DL_PAD_GPIO_0__GPIO_1_0, /* GPIO_0/Audio Ref. CLK */ | ||
5181 | + | ||
5182 | + /* ECSPI1 */ | ||
5183 | + MX6DL_PAD_EIM_D17__ECSPI1_MISO, | ||
5184 | + MX6DL_PAD_EIM_D18__ECSPI1_MOSI, | ||
5185 | + MX6DL_PAD_EIM_D16__ECSPI1_SCLK, | ||
5186 | + MX6DL_PAD_EIM_D19__GPIO_3_19, /*SS1*/ | ||
5187 | + | ||
5188 | + /* ENET */ | ||
5189 | + MX6DL_PAD_ENET_MDIO__ENET_MDIO, | ||
5190 | + MX6DL_PAD_ENET_MDC__ENET_MDC, | ||
5191 | + MX6DL_PAD_RGMII_TXC__ENET_RGMII_TXC, | ||
5192 | + MX6DL_PAD_RGMII_TD0__ENET_RGMII_TD0, | ||
5193 | + MX6DL_PAD_RGMII_TD1__ENET_RGMII_TD1, | ||
5194 | + MX6DL_PAD_RGMII_TD2__ENET_RGMII_TD2, | ||
5195 | + MX6DL_PAD_RGMII_TD3__ENET_RGMII_TD3, | ||
5196 | + MX6DL_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL, | ||
5197 | + MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK, | ||
5198 | + MX6DL_PAD_RGMII_RXC__ENET_RGMII_RXC, | ||
5199 | + MX6DL_PAD_RGMII_RD0__ENET_RGMII_RD0, | ||
5200 | + MX6DL_PAD_RGMII_RD1__ENET_RGMII_RD1, | ||
5201 | + MX6DL_PAD_RGMII_RD2__ENET_RGMII_RD2, | ||
5202 | + MX6DL_PAD_RGMII_RD3__ENET_RGMII_RD3, | ||
5203 | + MX6DL_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, | ||
5204 | + MX6DL_PAD_ENET_TX_EN__GPIO_1_28, /* Micrel RGMII Phy Interrupt */ | ||
5205 | + MX6DL_PAD_EIM_D23__GPIO_3_23, /* RGMII reset */ | ||
5206 | + | ||
5207 | + /* GPIO1 */ | ||
5208 | + MX6DL_PAD_ENET_RX_ER__SPDIF_IN1, /* SPDIF_IN */ | ||
5209 | + | ||
5210 | + /* GPIO2 */ | ||
5211 | + MX6DL_PAD_NANDF_D1__GPIO_2_1, /* J14 - Menu Button */ | ||
5212 | + MX6DL_PAD_NANDF_D2__GPIO_2_2, /* J14 - Back Button */ | ||
5213 | + MX6DL_PAD_NANDF_D3__GPIO_2_3, /* J14 - Search Button */ | ||
5214 | + MX6DL_PAD_NANDF_D4__GPIO_2_4, /* J14 - Home Button */ | ||
5215 | + MX6DL_PAD_EIM_A22__GPIO_2_16, /* J12 - Boot Mode Select */ | ||
5216 | + MX6DL_PAD_EIM_A21__GPIO_2_17, /* J12 - Boot Mode Select */ | ||
5217 | + MX6DL_PAD_EIM_A20__GPIO_2_18, /* J12 - Boot Mode Select */ | ||
5218 | + MX6DL_PAD_EIM_A19__GPIO_2_19, /* J12 - Boot Mode Select */ | ||
5219 | + MX6DL_PAD_EIM_A18__GPIO_2_20, /* J12 - Boot Mode Select */ | ||
5220 | + MX6DL_PAD_EIM_A17__GPIO_2_21, /* J12 - Boot Mode Select */ | ||
5221 | + MX6DL_PAD_EIM_A16__GPIO_2_22, /* J12 - Boot Mode Select */ | ||
5222 | + MX6DL_PAD_EIM_RW__GPIO_2_26, /* J12 - Boot Mode Select */ | ||
5223 | + MX6DL_PAD_EIM_LBA__GPIO_2_27, /* J12 - Boot Mode Select */ | ||
5224 | + MX6DL_PAD_EIM_EB0__GPIO_2_28, /* J12 - Boot Mode Select */ | ||
5225 | + MX6DL_PAD_EIM_EB1__GPIO_2_29, /* J12 - Boot Mode Select */ | ||
5226 | + MX6DL_PAD_EIM_EB3__GPIO_2_31, /* J12 - Boot Mode Select */ | ||
5227 | + | ||
5228 | + /* GPIO3 */ | ||
5229 | + MX6DL_PAD_EIM_DA0__GPIO_3_0, /* J12 - Boot Mode Select */ | ||
5230 | + MX6DL_PAD_EIM_DA1__GPIO_3_1, /* J12 - Boot Mode Select */ | ||
5231 | + MX6DL_PAD_EIM_DA2__GPIO_3_2, /* J12 - Boot Mode Select */ | ||
5232 | + MX6DL_PAD_EIM_DA3__GPIO_3_3, /* J12 - Boot Mode Select */ | ||
5233 | + MX6DL_PAD_EIM_DA4__GPIO_3_4, /* J12 - Boot Mode Select */ | ||
5234 | + MX6DL_PAD_EIM_DA5__GPIO_3_5, /* J12 - Boot Mode Select */ | ||
5235 | + MX6DL_PAD_EIM_DA6__GPIO_3_6, /* J12 - Boot Mode Select */ | ||
5236 | + MX6DL_PAD_EIM_DA7__GPIO_3_7, /* J12 - Boot Mode Select */ | ||
5237 | + MX6DL_PAD_EIM_DA8__GPIO_3_8, /* J12 - Boot Mode Select */ | ||
5238 | + MX6DL_PAD_EIM_DA9__GPIO_3_9, /* J12 - Boot Mode Select */ | ||
5239 | + MX6DL_PAD_EIM_DA10__GPIO_3_10, /* J12 - Boot Mode Select */ | ||
5240 | + MX6DL_PAD_EIM_DA11__GPIO_3_11, /* J12 - Boot Mode Select */ | ||
5241 | + MX6DL_PAD_EIM_DA12__GPIO_3_12, /* J12 - Boot Mode Select */ | ||
5242 | + MX6DL_PAD_EIM_DA13__GPIO_3_13, /* J12 - Boot Mode Select */ | ||
5243 | + MX6DL_PAD_EIM_DA14__GPIO_3_14, /* J12 - Boot Mode Select */ | ||
5244 | + MX6DL_PAD_EIM_DA15__GPIO_3_15, /* J12 - Boot Mode Select */ | ||
5245 | + | ||
5246 | + /* GPIO4 */ | ||
5247 | + MX6DL_PAD_GPIO_19__GPIO_4_5, /* Volume Down */ | ||
5248 | + | ||
5249 | + /* GPIO5 */ | ||
5250 | + MX6DL_PAD_EIM_WAIT__GPIO_5_0, /* J12 - Boot Mode Select */ | ||
5251 | + MX6DL_PAD_EIM_A24__GPIO_5_4, /* J12 - Boot Mode Select */ | ||
5252 | + | ||
5253 | + /* GPIO6 */ | ||
5254 | + MX6DL_PAD_EIM_A23__GPIO_6_6, /* J12 - Boot Mode Select */ | ||
5255 | + | ||
5256 | + /* GPIO7 */ | ||
5257 | + MX6DL_PAD_GPIO_17__GPIO_7_12, /* USB Hub Reset */ | ||
5258 | + MX6DL_PAD_GPIO_18__GPIO_7_13, /* Volume Up */ | ||
5259 | + | ||
5260 | + /* I2C1 - PRIMARY */ | ||
5261 | + MX6DL_PAD_EIM_D21__I2C1_SCL, /* GPIO3[21] */ | ||
5262 | + MX6DL_PAD_EIM_D28__I2C1_SDA, /* GPIO3[28] */ | ||
5263 | + | ||
5264 | + /* I2C2 - PMIC SDVO */ | ||
5265 | + MX6DL_PAD_KEY_COL3__I2C2_SCL, /* GPIO4[12] */ | ||
5266 | + MX6DL_PAD_KEY_ROW3__I2C2_SDA, /* GPIO4[13] */ | ||
5267 | + | ||
5268 | + /* I2C3 - Unused */ | ||
5269 | + MX6DL_PAD_GPIO_3__I2C3_SCL, | ||
5270 | + MX6DL_PAD_GPIO_6__I2C3_SDA, | ||
5271 | + | ||
5272 | + /* SUS_S3 */ | ||
5273 | + MX6DL_PAD_GPIO_5__GPIO_1_5, /* GPIO1[5] */ | ||
5274 | + | ||
5275 | + MX6DL_PAD_GPIO_16__GPIO_7_11, /* GPIO7[11] */ | ||
5276 | + | ||
5277 | + MX6DL_PAD_GPIO_7__GPIO_1_7, /* Display Connector GP */ | ||
5278 | + MX6DL_PAD_GPIO_9__GPIO_1_9, /* Display Connector GP */ | ||
5279 | + MX6DL_PAD_NANDF_D0__GPIO_2_0, /* Unused */ | ||
5280 | + | ||
5281 | + /* PWM1 */ | ||
5282 | + MX6DL_PAD_SD1_DAT3__PWM1_PWMO, /* GPIO1[21] */ | ||
5283 | + | ||
5284 | + /* PCIe RESET */ | ||
5285 | + MX6DL_PAD_SD1_DAT2__GPIO_1_19, /* GPIO1[19] */ | ||
5286 | + | ||
5287 | + /* PWM4 */ | ||
5288 | + MX6DL_PAD_SD1_CMD__PWM4_PWMO, /* GPIO1[18] */ | ||
5289 | + | ||
5290 | + /* UART1 */ | ||
5291 | + MX6DL_PAD_CSI0_DAT10__UART1_TXD, | ||
5292 | + MX6DL_PAD_CSI0_DAT11__UART1_RXD, | ||
5293 | + | ||
5294 | + /* UART2 for debug */ | ||
5295 | + MX6DL_PAD_EIM_D26__UART2_TXD, | ||
5296 | + MX6DL_PAD_EIM_D27__UART2_RXD, | ||
5297 | + | ||
5298 | + /* USBOTG ID pin */ | ||
5299 | + MX6DL_PAD_GPIO_1__USBOTG_ID, | ||
5300 | + | ||
5301 | + /* WATCHDOG */ | ||
5302 | + MX6DL_PAD_KEY_COL4__GPIO_4_14, | ||
5303 | + | ||
5304 | + /* USB OC pin */ | ||
5305 | + /* MX6DL_PAD_EIM_D30__USBOH3_USBH1_OC, TODO: to be checked */ | ||
5306 | + | ||
5307 | + /* USDHC2 */ | ||
5308 | + MX6DL_PAD_SD2_CLK__USDHC2_CLK, | ||
5309 | + MX6DL_PAD_SD2_CMD__USDHC2_CMD, | ||
5310 | + MX6DL_PAD_SD2_DAT0__USDHC2_DAT0, | ||
5311 | + MX6DL_PAD_SD2_DAT1__USDHC2_DAT1, | ||
5312 | + MX6DL_PAD_SD2_DAT2__USDHC2_DAT2, | ||
5313 | + MX6DL_PAD_SD2_DAT3__USDHC2_DAT3, | ||
5314 | + MX6DL_PAD_GPIO_4__GPIO_1_4, /* Card Detect */ | ||
5315 | + | ||
5316 | + /* USDHC3 */ | ||
5317 | + MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ, | ||
5318 | + MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ, | ||
5319 | + MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ, | ||
5320 | + MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ, | ||
5321 | + MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ, | ||
5322 | + MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ, | ||
5323 | + MX6DL_PAD_SD3_DAT4__USDHC3_DAT4_50MHZ, | ||
5324 | + MX6DL_PAD_SD3_DAT5__USDHC3_DAT5_50MHZ, | ||
5325 | + MX6DL_PAD_SD3_DAT6__USDHC3_DAT6_50MHZ, | ||
5326 | + MX6DL_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ, | ||
5327 | + | ||
5328 | + /* USDHC4 */ | ||
5329 | + MX6DL_PAD_SD4_CLK__USDHC4_CLK_50MHZ, | ||
5330 | + MX6DL_PAD_SD4_CMD__USDHC4_CMD_50MHZ, | ||
5331 | + MX6DL_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ, | ||
5332 | + MX6DL_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ, | ||
5333 | + MX6DL_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ, | ||
5334 | + MX6DL_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ, | ||
5335 | + MX6DL_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ, | ||
5336 | + MX6DL_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ, | ||
5337 | + MX6DL_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ, | ||
5338 | + MX6DL_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ, | ||
5339 | + MX6DL_PAD_NANDF_D6__GPIO_2_6, /* SD4_CD */ | ||
5340 | + MX6DL_PAD_NANDF_D7__GPIO_2_7, /* SD4_WP */ | ||
5341 | +}; | ||
5342 | + | ||
5343 | +#endif | ||
5344 | diff --git a/arch/arm/mach-mx6/board-mx6q_qmx6.c b/arch/arm/mach-mx6/board-mx6q_qmx6.c | ||
5345 | new file mode 100644 | ||
5346 | index 0000000..720ca7f | ||
5347 | --- /dev/null | ||
5348 | +++ b/arch/arm/mach-mx6/board-mx6q_qmx6.c | ||
5349 | @@ -0,0 +1,979 @@ | ||
5350 | +/* | ||
5351 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5352 | + * | ||
5353 | + * This program is free software; you can redistribute it and/or modify | ||
5354 | + * it under the terms of the GNU General Public License as published by | ||
5355 | + * the Free Software Foundation; either version 2 of the License, or | ||
5356 | + * (at your option) any later version. | ||
5357 | + | ||
5358 | + * This program is distributed in the hope that it will be useful, | ||
5359 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
5360 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
5361 | + * GNU General Public License for more details. | ||
5362 | + | ||
5363 | + * You should have received a copy of the GNU General Public License along | ||
5364 | + * with this program; if not, write to the Free Software Foundation, Inc., | ||
5365 | + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
5366 | + */ | ||
5367 | + | ||
5368 | +#include <linux/types.h> | ||
5369 | +#include <linux/sched.h> | ||
5370 | +#include <linux/delay.h> | ||
5371 | +#include <linux/pm.h> | ||
5372 | +#include <linux/interrupt.h> | ||
5373 | +#include <linux/irq.h> | ||
5374 | +#include <linux/init.h> | ||
5375 | +#include <linux/input.h> | ||
5376 | +#include <linux/nodemask.h> | ||
5377 | +#include <linux/clk.h> | ||
5378 | +#include <linux/platform_device.h> | ||
5379 | +#include <linux/fsl_devices.h> | ||
5380 | +#include <linux/spi/spi.h> | ||
5381 | +#include <linux/spi/flash.h> | ||
5382 | +#include <linux/i2c.h> | ||
5383 | +#include <linux/i2c/pca953x.h> | ||
5384 | +#include <linux/ata.h> | ||
5385 | +#include <linux/mtd/mtd.h> | ||
5386 | +#include <linux/mtd/map.h> | ||
5387 | +#include <linux/mtd/partitions.h> | ||
5388 | +#include <linux/regulator/consumer.h> | ||
5389 | +#include <linux/pmic_external.h> | ||
5390 | +#include <linux/pmic_status.h> | ||
5391 | +#include <linux/ipu.h> | ||
5392 | +#include <linux/mxcfb.h> | ||
5393 | +#include <linux/pwm_backlight.h> | ||
5394 | +#include <linux/fec.h> | ||
5395 | +#include <linux/memblock.h> | ||
5396 | +#include <linux/gpio.h> | ||
5397 | +#include <linux/etherdevice.h> | ||
5398 | +#include <linux/regulator/anatop-regulator.h> | ||
5399 | +#include <linux/regulator/consumer.h> | ||
5400 | +#include <linux/regulator/machine.h> | ||
5401 | +#include <linux/regulator/fixed.h> | ||
5402 | + | ||
5403 | +#include <mach/common.h> | ||
5404 | +#include <mach/hardware.h> | ||
5405 | +#include <mach/mxc_dvfs.h> | ||
5406 | +#include <mach/memory.h> | ||
5407 | +#include <mach/iomux-mx6q.h> | ||
5408 | +#include <mach/imx-uart.h> | ||
5409 | +#include <mach/viv_gpu.h> | ||
5410 | +#include <mach/ahci_sata.h> | ||
5411 | +#include <mach/ipu-v3.h> | ||
5412 | +#include <mach/mxc_hdmi.h> | ||
5413 | +#include <mach/mxc_asrc.h> | ||
5414 | + | ||
5415 | +#include <asm/irq.h> | ||
5416 | +#include <asm/setup.h> | ||
5417 | +#include <asm/mach-types.h> | ||
5418 | +#include <asm/mach/arch.h> | ||
5419 | +#include <asm/mach/time.h> | ||
5420 | + | ||
5421 | +#include "usb.h" | ||
5422 | +#include "devices-imx6q.h" | ||
5423 | +#include "crm_regs.h" | ||
5424 | +#include "cpu_op-mx6.h" | ||
5425 | +#include "board-mx6q_qmx6.h" | ||
5426 | +#include "board-mx6dl_qmx6.h" | ||
5427 | + | ||
5428 | +#define MX6Q_QMX6_VOLUME_UP_KEY IMX_GPIO_NR(7, 13) | ||
5429 | +#define MX6Q_QMX6_VOLUME_DOWN_KEY IMX_GPIO_NR(4, 5) | ||
5430 | +#define MX6Q_QMX6_MENU_KEY IMX_GPIO_NR(2, 1) | ||
5431 | +#define MX6Q_QMX6_BACK_KEY IMX_GPIO_NR(2, 2) | ||
5432 | +#define MX6Q_QMX6_SEARCH_KEY IMX_GPIO_NR(2, 3) | ||
5433 | +#define MX6Q_QMX6_HOME_KEY IMX_GPIO_NR(2, 4) | ||
5434 | +#define MX6Q_QMX6_ECSPI1_CS1 IMX_GPIO_NR(3, 19) | ||
5435 | +#define MX6Q_QMX6_USB_HUB_RESET IMX_GPIO_NR(7, 12) | ||
5436 | + | ||
5437 | +#define MX6Q_QMX6_SD4_CD IMX_GPIO_NR(2, 6) | ||
5438 | +#define MX6Q_QMX6_SD4_WP IMX_GPIO_NR(2, 7) | ||
5439 | +#define MX6Q_QMX6_SD2_CD IMX_GPIO_NR(1, 4) | ||
5440 | +#define MX6Q_QMX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) | ||
5441 | +#define MX6Q_QMX6_POWER_OFF IMX_GPIO_NR(2, 3) | ||
5442 | +#define MX6Q_QMX6_PCIE_WAKE_B IMX_GPIO_NR(1, 2) | ||
5443 | +#define MX6Q_QMX6_BLT_EN IMX_GPIO_NR(1, 9) | ||
5444 | + | ||
5445 | +#define MX6Q_QMX6_TCH_INT1 IMX_GPIO_NR(7, 11) | ||
5446 | +#define MX6Q_QMX6_CSI0_RST IMX_GPIO_NR(1, 8) | ||
5447 | +#define MX6Q_QMX6_PCIE_RST_B IMX_GPIO_NR(1, 20) | ||
5448 | +#define MX6Q_QMX6_CSI0_PWN IMX_GPIO_NR(6, 10) | ||
5449 | +#define MX6Q_QMX6_PFUZE_INT IMX_GPIO_NR(5, 16) | ||
5450 | + | ||
5451 | +void __init early_console_setup(unsigned long base, struct clk *clk); | ||
5452 | +extern int mx6q_qmx6_init_pfuze100(u32 int_gpio); | ||
5453 | + | ||
5454 | +static struct clk *sata_clk; | ||
5455 | +static int disable_ldb; | ||
5456 | + | ||
5457 | +extern char *gp_reg_id; | ||
5458 | +extern void mx6_cpu_regulator_init(void); | ||
5459 | + | ||
5460 | +static const struct esdhc_platform_data mx6q_qmx6_sd2_data __initconst = { | ||
5461 | + .cd_gpio = MX6Q_QMX6_SD2_CD, | ||
5462 | + | ||
5463 | + .keep_power_at_suspend = 1, | ||
5464 | + .support_8bit = 0, | ||
5465 | + .delay_line = 0, | ||
5466 | + .force_write_access = 1, | ||
5467 | +}; | ||
5468 | + | ||
5469 | +static const struct esdhc_platform_data mx6q_qmx6_sd3_data __initconst = { | ||
5470 | + .always_present = 1, | ||
5471 | + .cd_gpio = -1, | ||
5472 | + .keep_power_at_suspend = 1, | ||
5473 | + .support_8bit = 1, | ||
5474 | + .delay_line = 0, | ||
5475 | +}; | ||
5476 | + | ||
5477 | +static const struct esdhc_platform_data mx6q_qmx6_sd4_data __initconst = { | ||
5478 | + .cd_gpio = MX6Q_QMX6_SD4_CD, | ||
5479 | + .wp_gpio = MX6Q_QMX6_SD4_WP, | ||
5480 | + .keep_power_at_suspend = 1, | ||
5481 | + .support_8bit = 1, | ||
5482 | + .delay_line = 0, | ||
5483 | +}; | ||
5484 | + | ||
5485 | +static const struct anatop_thermal_platform_data | ||
5486 | + mx6q_qmx6_anatop_thermal_data __initconst = { | ||
5487 | + .name = "anatop_thermal", | ||
5488 | +}; | ||
5489 | + | ||
5490 | +static inline void mx6q_qmx6_init_uart(void) | ||
5491 | +{ | ||
5492 | + imx6q_add_imx_uart(0, NULL); | ||
5493 | + imx6q_add_imx_uart(1, NULL); | ||
5494 | +} | ||
5495 | + | ||
5496 | +static int mx6q_qmx6_fec_phy_init(struct phy_device *phydev) | ||
5497 | +{ | ||
5498 | + /* adjust KSZ9031 ethernet phy */ | ||
5499 | + | ||
5500 | + phy_write(phydev, 0x0d, 0x2); | ||
5501 | + phy_write(phydev, 0x0e, 0x4); | ||
5502 | + phy_write(phydev, 0x0d, 0xc002); | ||
5503 | + phy_write(phydev, 0x0e, 0x0000); | ||
5504 | + | ||
5505 | + phy_write(phydev, 0x0d, 0x2); | ||
5506 | + phy_write(phydev, 0x0e, 0x5); | ||
5507 | + phy_write(phydev, 0x0d, 0xc002); | ||
5508 | + phy_write(phydev, 0x0e, 0x0000); | ||
5509 | + | ||
5510 | + phy_write(phydev, 0x0d, 0x2); | ||
5511 | + phy_write(phydev, 0x0e, 0x6); | ||
5512 | + phy_write(phydev, 0x0d, 0xc002); | ||
5513 | + phy_write(phydev, 0x0e, 0xffff); | ||
5514 | + | ||
5515 | + phy_write(phydev, 0x0d, 0x2); | ||
5516 | + phy_write(phydev, 0x0e, 0x8); | ||
5517 | + phy_write(phydev, 0x0d, 0xc002); | ||
5518 | + phy_write(phydev, 0x0e, 0x3fff); | ||
5519 | + phy_write(phydev, 0x0d, 0x0); | ||
5520 | + | ||
5521 | + return 0; | ||
5522 | +} | ||
5523 | + | ||
5524 | +static struct fec_platform_data fec_data __initdata = { | ||
5525 | + .init = mx6q_qmx6_fec_phy_init, | ||
5526 | + .phy = PHY_INTERFACE_MODE_RGMII, | ||
5527 | +}; | ||
5528 | + | ||
5529 | +static int mx6q_qmx6_spi_cs[] = { | ||
5530 | + MX6Q_QMX6_ECSPI1_CS1, | ||
5531 | +}; | ||
5532 | + | ||
5533 | +static const struct spi_imx_master mx6q_qmx6_spi_data __initconst = { | ||
5534 | + .chipselect = mx6q_qmx6_spi_cs, | ||
5535 | + .num_chipselect = ARRAY_SIZE(mx6q_qmx6_spi_cs), | ||
5536 | +}; | ||
5537 | + | ||
5538 | +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | ||
5539 | +static struct mtd_partition imx6_qmx6_spi_nor_partitions[] = { | ||
5540 | + { | ||
5541 | + .name = "bootloader", | ||
5542 | + .offset = 0, | ||
5543 | + .size = 0x00040000, | ||
5544 | + }, | ||
5545 | + { | ||
5546 | + .name = "user", | ||
5547 | + .offset = MTDPART_OFS_APPEND, | ||
5548 | + .size = 0x003BC000, | ||
5549 | + }, | ||
5550 | + { | ||
5551 | + /* this 16KB area is used for congatec manufacturing purposes */ | ||
5552 | + /* we strongly recommend not to modify or destroy this area */ | ||
5553 | + .name = "reserved", | ||
5554 | + .offset = MTDPART_OFS_APPEND, | ||
5555 | + .size = 0x00004000, | ||
5556 | + .mask_flags = MTD_WRITEABLE, | ||
5557 | + }, | ||
5558 | +}; | ||
5559 | + | ||
5560 | +static struct flash_platform_data imx6_qmx6__spi_flash_data = { | ||
5561 | + .name = "m25p80", | ||
5562 | + .parts = imx6_qmx6_spi_nor_partitions, | ||
5563 | + .nr_parts = ARRAY_SIZE(imx6_qmx6_spi_nor_partitions), | ||
5564 | + .type = "sst25vf032b", | ||
5565 | +}; | ||
5566 | +#endif | ||
5567 | + | ||
5568 | +static struct spi_board_info imx6_qmx6_spi_nor_device[] __initdata = { | ||
5569 | +#if defined(CONFIG_MTD_M25P80) | ||
5570 | + { | ||
5571 | + .modalias = "m25p80", | ||
5572 | + .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | ||
5573 | + .bus_num = 0, | ||
5574 | + .chip_select = 0, | ||
5575 | + .platform_data = &imx6_qmx6__spi_flash_data, | ||
5576 | + }, | ||
5577 | +#endif | ||
5578 | +}; | ||
5579 | + | ||
5580 | +static void spi_device_init(void) | ||
5581 | +{ | ||
5582 | + spi_register_board_info(imx6_qmx6_spi_nor_device, | ||
5583 | + ARRAY_SIZE(imx6_qmx6_spi_nor_device)); | ||
5584 | +} | ||
5585 | + | ||
5586 | +static struct imx_ssi_platform_data mx6_qmx6_ssi_pdata = { | ||
5587 | + .flags = IMX_SSI_DMA | IMX_SSI_SYN, | ||
5588 | +}; | ||
5589 | + | ||
5590 | +static struct platform_device mx6_qmx6_audio_device = { | ||
5591 | + .name = "imx-sgtl5000", | ||
5592 | +}; | ||
5593 | + | ||
5594 | +static struct mxc_audio_platform_data mx6_qmx6_audio_data = { | ||
5595 | + .ssi_num = 1, | ||
5596 | + .src_port = 2, | ||
5597 | + .ext_port = 6, | ||
5598 | + .hp_gpio = -1, | ||
5599 | +}; | ||
5600 | +static int mx6_qmx6_sgtl5000_init(void) | ||
5601 | +{ | ||
5602 | + struct clk *clko; | ||
5603 | + struct clk *new_parent; | ||
5604 | + int rate; | ||
5605 | + | ||
5606 | + clko = clk_get(NULL, "clko_clk"); | ||
5607 | + if (IS_ERR(clko)) { | ||
5608 | + pr_err("can't get CLKO clock.\n"); | ||
5609 | + return PTR_ERR(clko); | ||
5610 | + } | ||
5611 | + new_parent = clk_get(NULL, "ahb"); | ||
5612 | + if (!IS_ERR(new_parent)) { | ||
5613 | + clk_set_parent(clko, new_parent); | ||
5614 | + clk_put(new_parent); | ||
5615 | + } | ||
5616 | + rate = clk_round_rate(clko, 16000000); | ||
5617 | + if (rate < 8000000 || rate > 27000000) { | ||
5618 | + pr_err("Error:SGTL5000 mclk freq %d out of range!\n", rate); | ||
5619 | + clk_put(clko); | ||
5620 | + return -1; | ||
5621 | + } | ||
5622 | + | ||
5623 | + mx6_qmx6_audio_data.sysclk = rate; | ||
5624 | + clk_set_rate(clko, rate); | ||
5625 | + clk_enable(clko); | ||
5626 | + return 0; | ||
5627 | +} | ||
5628 | +static struct imxi2c_platform_data mx6q_qmx6_i2c_data = { | ||
5629 | + .bitrate = 100000, | ||
5630 | +}; | ||
5631 | + | ||
5632 | +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { | ||
5633 | + { | ||
5634 | + I2C_BOARD_INFO("sgtl5000", 0x0a), | ||
5635 | + }, | ||
5636 | +}; | ||
5637 | + | ||
5638 | + | ||
5639 | +static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { | ||
5640 | + { | ||
5641 | + I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50), | ||
5642 | + }, | ||
5643 | +}; | ||
5644 | + | ||
5645 | +static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { | ||
5646 | + { | ||
5647 | + I2C_BOARD_INFO("mxc_ldb_i2c", 0x50), | ||
5648 | + .platform_data = (void *)0, | ||
5649 | + }, | ||
5650 | +}; | ||
5651 | +static void imx6q_qmx6_usbotg_vbus(bool on) | ||
5652 | +{ | ||
5653 | + if (on) | ||
5654 | + gpio_set_value(MX6Q_QMX6_USB_OTG_PWR, 1); | ||
5655 | + else | ||
5656 | + gpio_set_value(MX6Q_QMX6_USB_OTG_PWR, 0); | ||
5657 | +} | ||
5658 | + | ||
5659 | +static void __init imx6q_qmx6_init_usb(void) | ||
5660 | +{ | ||
5661 | + int ret = 0; | ||
5662 | + | ||
5663 | + imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR); | ||
5664 | + /* disable external charger detect, | ||
5665 | + * or it will affect signal quality at dp . | ||
5666 | + */ | ||
5667 | + ret = gpio_request(MX6Q_QMX6_USB_OTG_PWR, "usb-pwr"); | ||
5668 | + if (ret) { | ||
5669 | + pr_err("failed to get GPIO MX6Q_QMX6_USB_OTG_PWR: %d\n", | ||
5670 | + ret); | ||
5671 | + return; | ||
5672 | + } | ||
5673 | + gpio_direction_output(MX6Q_QMX6_USB_OTG_PWR, 0); | ||
5674 | + | ||
5675 | + mx6_set_otghost_vbus_func(imx6q_qmx6_usbotg_vbus); | ||
5676 | +} | ||
5677 | + | ||
5678 | +/* HW Initialization, if return 0, initialization is successful. */ | ||
5679 | +static int mx6q_qmx6_sata_init(struct device *dev, void __iomem *addr) | ||
5680 | +{ | ||
5681 | + u32 tmpdata; | ||
5682 | + int ret = 0; | ||
5683 | + struct clk *clk; | ||
5684 | + | ||
5685 | + sata_clk = clk_get(dev, "imx_sata_clk"); | ||
5686 | + if (IS_ERR(sata_clk)) { | ||
5687 | + dev_err(dev, "no sata clock.\n"); | ||
5688 | + return PTR_ERR(sata_clk); | ||
5689 | + } | ||
5690 | + ret = clk_enable(sata_clk); | ||
5691 | + if (ret) { | ||
5692 | + dev_err(dev, "can't enable sata clock.\n"); | ||
5693 | + goto put_sata_clk; | ||
5694 | + } | ||
5695 | + | ||
5696 | + /* Set PHY Paremeters, two steps to configure the GPR13, | ||
5697 | + * one write for rest of parameters, mask of first write is 0x07FFFFFD, | ||
5698 | + * and the other one write for setting the mpll_clk_off_b | ||
5699 | + *.rx_eq_val_0(iomuxc_gpr13[26:24]), | ||
5700 | + *.los_lvl(iomuxc_gpr13[23:19]), | ||
5701 | + *.rx_dpll_mode_0(iomuxc_gpr13[18:16]), | ||
5702 | + *.sata_speed(iomuxc_gpr13[15]), | ||
5703 | + *.mpll_ss_en(iomuxc_gpr13[14]), | ||
5704 | + *.tx_atten_0(iomuxc_gpr13[13:11]), | ||
5705 | + *.tx_boost_0(iomuxc_gpr13[10:7]), | ||
5706 | + *.tx_lvl(iomuxc_gpr13[6:2]), | ||
5707 | + *.mpll_ck_off(iomuxc_gpr13[1]), | ||
5708 | + *.tx_edgerate_0(iomuxc_gpr13[0]), | ||
5709 | + */ | ||
5710 | + tmpdata = readl(IOMUXC_GPR13); | ||
5711 | + writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13); | ||
5712 | + | ||
5713 | + /* enable SATA_PHY PLL */ | ||
5714 | + tmpdata = readl(IOMUXC_GPR13); | ||
5715 | + writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13); | ||
5716 | + | ||
5717 | + /* Get the AHB clock rate, and configure the TIMER1MS reg later */ | ||
5718 | + clk = clk_get(NULL, "ahb"); | ||
5719 | + if (IS_ERR(clk)) { | ||
5720 | + dev_err(dev, "no ahb clock.\n"); | ||
5721 | + ret = PTR_ERR(clk); | ||
5722 | + goto release_sata_clk; | ||
5723 | + } | ||
5724 | + tmpdata = clk_get_rate(clk) / 1000; | ||
5725 | + clk_put(clk); | ||
5726 | + | ||
5727 | + ret = sata_init(addr, tmpdata); | ||
5728 | + if (ret == 0) | ||
5729 | + return ret; | ||
5730 | + | ||
5731 | +release_sata_clk: | ||
5732 | + clk_disable(sata_clk); | ||
5733 | +put_sata_clk: | ||
5734 | + clk_put(sata_clk); | ||
5735 | + | ||
5736 | + return ret; | ||
5737 | +} | ||
5738 | + | ||
5739 | +static void mx6q_qmx6_sata_exit(struct device *dev) | ||
5740 | +{ | ||
5741 | + clk_disable(sata_clk); | ||
5742 | + clk_put(sata_clk); | ||
5743 | +} | ||
5744 | + | ||
5745 | +static struct ahci_platform_data mx6q_qmx6_sata_data = { | ||
5746 | + .init = mx6q_qmx6_sata_init, | ||
5747 | + .exit = mx6q_qmx6_sata_exit, | ||
5748 | +}; | ||
5749 | + | ||
5750 | +static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = { | ||
5751 | + .reserved_mem_size = SZ_128M, | ||
5752 | +}; | ||
5753 | + | ||
5754 | +static struct imx_asrc_platform_data imx_asrc_data = { | ||
5755 | + .channel_bits = 4, | ||
5756 | + .clk_map_ver = 2, | ||
5757 | +}; | ||
5758 | + | ||
5759 | +static struct ipuv3_fb_platform_data qmx6_fb_data[] = { | ||
5760 | + { /*fb0*/ | ||
5761 | + .disp_dev = "ldb", | ||
5762 | + .interface_pix_fmt = IPU_PIX_FMT_RGB666, | ||
5763 | + .mode_str = "LDB-XGA", | ||
5764 | + .default_bpp = 16, | ||
5765 | + .int_clk = false, | ||
5766 | + }, { | ||
5767 | + .disp_dev = "lcd", | ||
5768 | + .interface_pix_fmt = IPU_PIX_FMT_RGB565, | ||
5769 | + .mode_str = "CLAA-WVGA", | ||
5770 | + .default_bpp = 16, | ||
5771 | + .int_clk = false, | ||
5772 | + }, { | ||
5773 | + .disp_dev = "ldb", | ||
5774 | + .interface_pix_fmt = IPU_PIX_FMT_RGB666, | ||
5775 | + .mode_str = "LDB-SVGA", | ||
5776 | + .default_bpp = 16, | ||
5777 | + .int_clk = false, | ||
5778 | + }, { | ||
5779 | + .disp_dev = "ldb", | ||
5780 | + .interface_pix_fmt = IPU_PIX_FMT_RGB666, | ||
5781 | + .mode_str = "LDB-VGA", | ||
5782 | + .default_bpp = 16, | ||
5783 | + .int_clk = false, | ||
5784 | + }, | ||
5785 | +}; | ||
5786 | + | ||
5787 | +static void hdmi_init(int ipu_id, int disp_id) | ||
5788 | +{ | ||
5789 | + int hdmi_mux_setting; | ||
5790 | + | ||
5791 | + if ((ipu_id > 1) || (ipu_id < 0)) { | ||
5792 | + pr_err("Invalid IPU select for HDMI: %d. Set to 0\n", ipu_id); | ||
5793 | + ipu_id = 0; | ||
5794 | + } | ||
5795 | + | ||
5796 | + if ((disp_id > 1) || (disp_id < 0)) { | ||
5797 | + pr_err("Invalid DI select for HDMI: %d. Set to 0\n", disp_id); | ||
5798 | + disp_id = 0; | ||
5799 | + } | ||
5800 | + | ||
5801 | + /* Configure the connection between IPU1/2 and HDMI */ | ||
5802 | + hdmi_mux_setting = 2*ipu_id + disp_id; | ||
5803 | + | ||
5804 | + /* GPR3, bits 2-3 = HDMI_MUX_CTL */ | ||
5805 | + mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting); | ||
5806 | +} | ||
5807 | + | ||
5808 | +static struct fsl_mxc_hdmi_platform_data hdmi_data = { | ||
5809 | + .init = hdmi_init, | ||
5810 | +}; | ||
5811 | + | ||
5812 | +static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = { | ||
5813 | + .ipu_id = 0, | ||
5814 | + .disp_id = 0, | ||
5815 | +}; | ||
5816 | + | ||
5817 | +static struct fsl_mxc_lcd_platform_data lcdif_data = { | ||
5818 | + .ipu_id = 0, | ||
5819 | + .disp_id = 0, | ||
5820 | + .default_ifmt = IPU_PIX_FMT_RGB565, | ||
5821 | +}; | ||
5822 | + | ||
5823 | +static struct fsl_mxc_ldb_platform_data ldb_data = { | ||
5824 | + .ipu_id = 1, | ||
5825 | + .disp_id = 0, | ||
5826 | + .ext_ref = 1, | ||
5827 | + .mode = LDB_SEP0, | ||
5828 | + .sec_ipu_id = 1, | ||
5829 | + .sec_disp_id = 1, | ||
5830 | +}; | ||
5831 | + | ||
5832 | +static struct imx_ipuv3_platform_data ipu_data[] = { | ||
5833 | + { | ||
5834 | + .rev = 4, | ||
5835 | + .csi_clk[0] = "clko2_clk", | ||
5836 | + }, { | ||
5837 | + .rev = 4, | ||
5838 | + .csi_clk[0] = "clko2_clk", | ||
5839 | + }, | ||
5840 | +}; | ||
5841 | + | ||
5842 | +static struct fsl_mxc_capture_platform_data capture_data[] = { | ||
5843 | + { | ||
5844 | + .csi = 0, | ||
5845 | + .ipu = 0, | ||
5846 | + .mclk_source = 0, | ||
5847 | + .is_mipi = 0, | ||
5848 | + }, | ||
5849 | +}; | ||
5850 | + | ||
5851 | +static void qmx6_suspend_enter(void) | ||
5852 | +{ | ||
5853 | + /* suspend preparation */ | ||
5854 | + /* disable backlight */ | ||
5855 | + gpio_set_value(MX6Q_QMX6_BLT_EN, 0); | ||
5856 | +} | ||
5857 | + | ||
5858 | +static void qmx6_suspend_exit(void) | ||
5859 | +{ | ||
5860 | + /* resume restore */ | ||
5861 | + /* enable backlight */ | ||
5862 | + gpio_set_value(MX6Q_QMX6_BLT_EN, 1); | ||
5863 | +} | ||
5864 | +static const struct pm_platform_data mx6q_qmx6_pm_data __initconst = { | ||
5865 | + .name = "imx_pm", | ||
5866 | + .suspend_enter = qmx6_suspend_enter, | ||
5867 | + .suspend_exit = qmx6_suspend_exit, | ||
5868 | +}; | ||
5869 | + | ||
5870 | +static struct regulator_consumer_supply qmx6_vmmc_consumers[] = { | ||
5871 | + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"), | ||
5872 | + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"), | ||
5873 | + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"), | ||
5874 | +}; | ||
5875 | + | ||
5876 | +static struct regulator_init_data qmx6_vmmc_init = { | ||
5877 | + .num_consumer_supplies = ARRAY_SIZE(qmx6_vmmc_consumers), | ||
5878 | + .consumer_supplies = qmx6_vmmc_consumers, | ||
5879 | +}; | ||
5880 | + | ||
5881 | +static struct fixed_voltage_config qmx6_vmmc_reg_config = { | ||
5882 | + .supply_name = "vmmc", | ||
5883 | + .microvolts = 3300000, | ||
5884 | + .gpio = -1, | ||
5885 | + .init_data = &qmx6_vmmc_init, | ||
5886 | +}; | ||
5887 | + | ||
5888 | +static struct platform_device qmx6_vmmc_reg_devices = { | ||
5889 | + .name = "reg-fixed-voltage", | ||
5890 | + .id = 3, | ||
5891 | + .dev = { | ||
5892 | + .platform_data = &qmx6_vmmc_reg_config, | ||
5893 | + }, | ||
5894 | +}; | ||
5895 | + | ||
5896 | +#ifdef CONFIG_SND_SOC_SGTL5000 | ||
5897 | + | ||
5898 | +static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vdda = { | ||
5899 | + .supply = "VDDA", | ||
5900 | + .dev_name = "0-000a", | ||
5901 | +}; | ||
5902 | + | ||
5903 | +static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vddio = { | ||
5904 | + .supply = "VDDIO", | ||
5905 | + .dev_name = "0-000a", | ||
5906 | +}; | ||
5907 | + | ||
5908 | +static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vddd = { | ||
5909 | + .supply = "VDDD", | ||
5910 | + .dev_name = "0-000a", | ||
5911 | +}; | ||
5912 | + | ||
5913 | +static struct regulator_init_data sgtl5000_qmx6_vdda_reg_initdata = { | ||
5914 | + .num_consumer_supplies = 1, | ||
5915 | + .consumer_supplies = &sgtl5000_qmx6_consumer_vdda, | ||
5916 | +}; | ||
5917 | + | ||
5918 | +static struct regulator_init_data sgtl5000_qmx6_vddio_reg_initdata = { | ||
5919 | + .num_consumer_supplies = 1, | ||
5920 | + .consumer_supplies = &sgtl5000_qmx6_consumer_vddio, | ||
5921 | +}; | ||
5922 | + | ||
5923 | +static struct regulator_init_data sgtl5000_qmx6_vddd_reg_initdata = { | ||
5924 | + .num_consumer_supplies = 1, | ||
5925 | + .consumer_supplies = &sgtl5000_qmx6_consumer_vddd, | ||
5926 | +}; | ||
5927 | + | ||
5928 | +static struct fixed_voltage_config sgtl5000_qmx6_vdda_reg_config = { | ||
5929 | + .supply_name = "VDDA", | ||
5930 | + .microvolts = 2500000, | ||
5931 | + .gpio = -1, | ||
5932 | + .init_data = &sgtl5000_qmx6_vdda_reg_initdata, | ||
5933 | +}; | ||
5934 | + | ||
5935 | +static struct fixed_voltage_config sgtl5000_qmx6_vddio_reg_config = { | ||
5936 | + .supply_name = "VDDIO", | ||
5937 | + .microvolts = 3300000, | ||
5938 | + .gpio = -1, | ||
5939 | + .init_data = &sgtl5000_qmx6_vddio_reg_initdata, | ||
5940 | +}; | ||
5941 | + | ||
5942 | +static struct fixed_voltage_config sgtl5000_qmx6_vddd_reg_config = { | ||
5943 | + .supply_name = "VDDD", | ||
5944 | + .microvolts = 0, | ||
5945 | + .gpio = -1, | ||
5946 | + .init_data = &sgtl5000_qmx6_vddd_reg_initdata, | ||
5947 | +}; | ||
5948 | + | ||
5949 | +static struct platform_device sgtl5000_qmx6_vdda_reg_devices = { | ||
5950 | + .name = "reg-fixed-voltage", | ||
5951 | + .id = 0, | ||
5952 | + .dev = { | ||
5953 | + .platform_data = &sgtl5000_qmx6_vdda_reg_config, | ||
5954 | + }, | ||
5955 | +}; | ||
5956 | + | ||
5957 | +static struct platform_device sgtl5000_qmx6_vddio_reg_devices = { | ||
5958 | + .name = "reg-fixed-voltage", | ||
5959 | + .id = 1, | ||
5960 | + .dev = { | ||
5961 | + .platform_data = &sgtl5000_qmx6_vddio_reg_config, | ||
5962 | + }, | ||
5963 | +}; | ||
5964 | + | ||
5965 | +static struct platform_device sgtl5000_qmx6_vddd_reg_devices = { | ||
5966 | + .name = "reg-fixed-voltage", | ||
5967 | + .id = 2, | ||
5968 | + .dev = { | ||
5969 | + .platform_data = &sgtl5000_qmx6_vddd_reg_config, | ||
5970 | + }, | ||
5971 | +}; | ||
5972 | + | ||
5973 | +#endif /* CONFIG_SND_SOC_SGTL5000 */ | ||
5974 | + | ||
5975 | +static int imx6q_init_audio(void) | ||
5976 | +{ | ||
5977 | + mxc_register_device(&mx6_qmx6_audio_device, | ||
5978 | + &mx6_qmx6_audio_data); | ||
5979 | + imx6q_add_imx_ssi(1, &mx6_qmx6_ssi_pdata); | ||
5980 | +#ifdef CONFIG_SND_SOC_SGTL5000 | ||
5981 | + platform_device_register(&sgtl5000_qmx6_vdda_reg_devices); | ||
5982 | + platform_device_register(&sgtl5000_qmx6_vddio_reg_devices); | ||
5983 | + platform_device_register(&sgtl5000_qmx6_vddd_reg_devices); | ||
5984 | + mx6_qmx6_sgtl5000_init(); | ||
5985 | +#endif | ||
5986 | + return 0; | ||
5987 | + | ||
5988 | +} | ||
5989 | + | ||
5990 | +static void pcie_3v3_reset(void) | ||
5991 | +{ | ||
5992 | + /* reset miniPCIe */ | ||
5993 | + gpio_request(MX6Q_QMX6_PCIE_RST_B, "pcie_reset"); | ||
5994 | + gpio_direction_output(MX6Q_QMX6_PCIE_RST_B, 1); | ||
5995 | + | ||
5996 | + gpio_set_value(MX6Q_QMX6_PCIE_RST_B, 0); | ||
5997 | + /* The PCI Express Mini CEM specification states that PREST# is | ||
5998 | + deasserted minimum 1ms after 3.3vVaux has been applied and stable*/ | ||
5999 | + msleep(1); | ||
6000 | + gpio_set_value(MX6Q_QMX6_PCIE_RST_B, 1); | ||
6001 | +} | ||
6002 | + | ||
6003 | +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
6004 | +#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ | ||
6005 | +{ \ | ||
6006 | + .gpio = gpio_num, \ | ||
6007 | + .type = EV_KEY, \ | ||
6008 | + .code = ev_code, \ | ||
6009 | + .active_low = act_low, \ | ||
6010 | + .desc = "btn " descr, \ | ||
6011 | + .wakeup = wake, \ | ||
6012 | +} | ||
6013 | + | ||
6014 | +static struct gpio_keys_button imx6q_buttons[] = { | ||
6015 | + GPIO_BUTTON(MX6Q_QMX6_POWER_OFF, KEY_POWER, 1, "key-power", 1), | ||
6016 | + GPIO_BUTTON(MX6Q_QMX6_MENU_KEY, KEY_MENU, 1, "key-memu", 0), | ||
6017 | + GPIO_BUTTON(MX6Q_QMX6_HOME_KEY, KEY_HOME, 1, "key-home", 0), | ||
6018 | + GPIO_BUTTON(MX6Q_QMX6_BACK_KEY, KEY_BACK, 1, "key-back", 0), | ||
6019 | + GPIO_BUTTON(MX6Q_QMX6_VOLUME_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0), | ||
6020 | + GPIO_BUTTON(MX6Q_QMX6_VOLUME_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0), | ||
6021 | +}; | ||
6022 | + | ||
6023 | +static struct gpio_keys_platform_data imx6q_button_data = { | ||
6024 | + .buttons = imx6q_buttons, | ||
6025 | + .nbuttons = ARRAY_SIZE(imx6q_buttons), | ||
6026 | +}; | ||
6027 | + | ||
6028 | +static struct platform_device imx6q_button_device = { | ||
6029 | + .name = "gpio-keys", | ||
6030 | + .id = -1, | ||
6031 | + .num_resources = 0, | ||
6032 | + .dev = { | ||
6033 | + .platform_data = &imx6q_button_data, | ||
6034 | + } | ||
6035 | +}; | ||
6036 | + | ||
6037 | +static void __init imx6q_add_device_buttons(void) | ||
6038 | +{ | ||
6039 | + platform_device_register(&imx6q_button_device); | ||
6040 | +} | ||
6041 | +#else | ||
6042 | +static void __init imx6q_add_device_buttons(void) {} | ||
6043 | +#endif | ||
6044 | + | ||
6045 | +static struct platform_pwm_backlight_data mx6_qmx6_pwm_backlight_data = { | ||
6046 | + .pwm_id = 3, | ||
6047 | + .max_brightness = 255, | ||
6048 | + .dft_brightness = 128, | ||
6049 | + .pwm_period_ns = 50000, | ||
6050 | +}; | ||
6051 | + | ||
6052 | +static struct mxc_dvfs_platform_data qmx6_dvfscore_data = { | ||
6053 | + .reg_id = "cpu_vddgp", | ||
6054 | + .clk1_id = "cpu_clk", | ||
6055 | + .clk2_id = "gpc_dvfs_clk", | ||
6056 | + .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, | ||
6057 | + .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET, | ||
6058 | + .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET, | ||
6059 | + .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET, | ||
6060 | + .prediv_mask = 0x1F800, | ||
6061 | + .prediv_offset = 11, | ||
6062 | + .prediv_val = 3, | ||
6063 | + .div3ck_mask = 0xE0000000, | ||
6064 | + .div3ck_offset = 29, | ||
6065 | + .div3ck_val = 2, | ||
6066 | + .emac_val = 0x08, | ||
6067 | + .upthr_val = 25, | ||
6068 | + .dnthr_val = 9, | ||
6069 | + .pncthr_val = 33, | ||
6070 | + .upcnt_val = 10, | ||
6071 | + .dncnt_val = 10, | ||
6072 | + .delay_time = 80, | ||
6073 | +}; | ||
6074 | + | ||
6075 | +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, | ||
6076 | + char **cmdline, struct meminfo *mi) | ||
6077 | +{ | ||
6078 | + char *str; | ||
6079 | + struct tag *t; | ||
6080 | + int i = 0; | ||
6081 | + struct ipuv3_fb_platform_data *pdata_fb = qmx6_fb_data; | ||
6082 | + | ||
6083 | + for_each_tag(t, tags) { | ||
6084 | + if (t->hdr.tag == ATAG_CMDLINE) { | ||
6085 | + str = t->u.cmdline.cmdline; | ||
6086 | + str = strstr(str, "fbmem="); | ||
6087 | + if (str != NULL) { | ||
6088 | + str += 6; | ||
6089 | + pdata_fb[i++].res_size[0] = memparse(str, &str); | ||
6090 | + while (*str == ',' && | ||
6091 | + i < ARRAY_SIZE(qmx6_fb_data)) { | ||
6092 | + str++; | ||
6093 | + pdata_fb[i++].res_size[0] = memparse(str, &str); | ||
6094 | + } | ||
6095 | + } | ||
6096 | + break; | ||
6097 | + } | ||
6098 | + } | ||
6099 | +} | ||
6100 | + | ||
6101 | +#define SNVS_LPCR 0x38 | ||
6102 | +static void mx6_snvs_poweroff(void) | ||
6103 | +{ | ||
6104 | + | ||
6105 | + void __iomem *mx6_snvs_base = MX6_IO_ADDRESS(MX6Q_SNVS_BASE_ADDR); | ||
6106 | + u32 value; | ||
6107 | + value = readl(mx6_snvs_base + SNVS_LPCR); | ||
6108 | + /*set TOP and DP_EN bit*/ | ||
6109 | + writel(value | 0x60, mx6_snvs_base + SNVS_LPCR); | ||
6110 | +} | ||
6111 | + | ||
6112 | +static int __init early_disable_ldb(char *p) | ||
6113 | +{ | ||
6114 | + /*mipi dsi need pll3_pfd_540M as 540MHz, ldb will change to 454Mhz*/ | ||
6115 | + disable_ldb = 1; | ||
6116 | + return 0; | ||
6117 | +} | ||
6118 | + | ||
6119 | +early_param("disable_ldb", early_disable_ldb); | ||
6120 | + | ||
6121 | +static const struct imx_pcie_platform_data mx6_qmx6_pcie_data __initconst = { | ||
6122 | + .pcie_pwr_en = -1, | ||
6123 | + .pcie_rst = MX6Q_QMX6_PCIE_RST_B, | ||
6124 | + .pcie_wake_up = MX6Q_QMX6_PCIE_WAKE_B, | ||
6125 | + .pcie_dis = -1, | ||
6126 | +}; | ||
6127 | + | ||
6128 | +/* | ||
6129 | + * Board specific initialization. | ||
6130 | + */ | ||
6131 | +static void __init mx6_qmx6_board_init(void) | ||
6132 | +{ | ||
6133 | + int i; | ||
6134 | + int ret; | ||
6135 | + struct clk *clko2; | ||
6136 | + struct clk *new_parent; | ||
6137 | + int rate; | ||
6138 | + | ||
6139 | + if (cpu_is_mx6q()) | ||
6140 | + mxc_iomux_v3_setup_multiple_pads(mx6q_qmx6_pads, | ||
6141 | + ARRAY_SIZE(mx6q_qmx6_pads)); | ||
6142 | + else if (cpu_is_mx6dl()) { | ||
6143 | + mxc_iomux_v3_setup_multiple_pads(mx6dl_qmx6_pads, | ||
6144 | + ARRAY_SIZE(mx6dl_qmx6_pads)); | ||
6145 | + } | ||
6146 | + | ||
6147 | + gp_reg_id = qmx6_dvfscore_data.reg_id; | ||
6148 | + mx6q_qmx6_init_uart(); | ||
6149 | + | ||
6150 | + /* | ||
6151 | + * MX6DL/Solo only supports single IPU | ||
6152 | + * The following codes are used to change ipu id | ||
6153 | + * and display id information for MX6DL/Solo. Then | ||
6154 | + * register 1 IPU device and up to 2 displays for | ||
6155 | + * MX6DL/Solo | ||
6156 | + */ | ||
6157 | + if (cpu_is_mx6dl()) { | ||
6158 | + ldb_data.ipu_id = 0; | ||
6159 | + ldb_data.disp_id = 0; | ||
6160 | + ldb_data.sec_ipu_id = 0; | ||
6161 | + ldb_data.sec_disp_id = 1; | ||
6162 | + hdmi_core_data.disp_id = 1; | ||
6163 | + } | ||
6164 | + imx6q_add_mxc_hdmi_core(&hdmi_core_data); | ||
6165 | + | ||
6166 | + imx6q_add_ipuv3(0, &ipu_data[0]); | ||
6167 | + if (cpu_is_mx6q()) { | ||
6168 | + imx6q_add_ipuv3(1, &ipu_data[1]); | ||
6169 | + for (i = 0; i < ARRAY_SIZE(qmx6_fb_data); i++) | ||
6170 | + imx6q_add_ipuv3fb(i, &qmx6_fb_data[i]); | ||
6171 | + } else | ||
6172 | + for (i = 0; i < (ARRAY_SIZE(qmx6_fb_data) + 1) / 2; i++) | ||
6173 | + imx6q_add_ipuv3fb(i, &qmx6_fb_data[i]); | ||
6174 | + | ||
6175 | + imx6q_add_vdoa(); | ||
6176 | + imx6q_add_lcdif(&lcdif_data); | ||
6177 | + if (!disable_ldb) | ||
6178 | + imx6q_add_ldb(&ldb_data); | ||
6179 | + imx6q_add_v4l2_output(0); | ||
6180 | + imx6q_add_v4l2_capture(0, &capture_data[0]); | ||
6181 | + imx6q_add_imx_snvs_rtc(); | ||
6182 | + | ||
6183 | + imx6q_add_imx_i2c(0, &mx6q_qmx6_i2c_data); | ||
6184 | + imx6q_add_imx_i2c(1, &mx6q_qmx6_i2c_data); | ||
6185 | + imx6q_add_imx_i2c(2, &mx6q_qmx6_i2c_data); | ||
6186 | + i2c_register_board_info(0, mxc_i2c0_board_info, | ||
6187 | + ARRAY_SIZE(mxc_i2c0_board_info)); | ||
6188 | + i2c_register_board_info(1, mxc_i2c1_board_info, | ||
6189 | + ARRAY_SIZE(mxc_i2c1_board_info)); | ||
6190 | + i2c_register_board_info(2, mxc_i2c2_board_info, | ||
6191 | + ARRAY_SIZE(mxc_i2c2_board_info)); | ||
6192 | + ret = gpio_request(MX6Q_QMX6_PFUZE_INT, "pFUZE-int"); | ||
6193 | + if (ret) { | ||
6194 | + printk(KERN_ERR"request pFUZE-int error!!\n"); | ||
6195 | + return; | ||
6196 | + } else { | ||
6197 | + gpio_direction_input(MX6Q_QMX6_PFUZE_INT); | ||
6198 | + mx6q_qmx6_init_pfuze100(MX6Q_QMX6_PFUZE_INT); | ||
6199 | + } | ||
6200 | + | ||
6201 | + /* SPI */ | ||
6202 | + imx6q_add_ecspi(0, &mx6q_qmx6_spi_data); | ||
6203 | + spi_device_init(); | ||
6204 | + | ||
6205 | + imx6q_add_mxc_hdmi(&hdmi_data); | ||
6206 | + | ||
6207 | + imx6q_add_anatop_thermal_imx(1, &mx6q_qmx6_anatop_thermal_data); | ||
6208 | + imx6_init_fec(fec_data); | ||
6209 | + imx6q_add_pm_imx(0, &mx6q_qmx6_pm_data); | ||
6210 | + /* Move sd3 to first because sd3 connect to emmc. | ||
6211 | + Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1. | ||
6212 | + */ | ||
6213 | + imx6q_add_sdhci_usdhc_imx(1, &mx6q_qmx6_sd2_data); | ||
6214 | + imx6q_add_sdhci_usdhc_imx(2, &mx6q_qmx6_sd3_data); | ||
6215 | + imx6q_add_sdhci_usdhc_imx(3, &mx6q_qmx6_sd4_data); | ||
6216 | + | ||
6217 | + imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); | ||
6218 | + imx6q_qmx6_init_usb(); | ||
6219 | + /* SATA is not supported by MX6DL/Solo */ | ||
6220 | + if (cpu_is_mx6q()) | ||
6221 | + imx6q_add_ahci(0, &mx6q_qmx6_sata_data); | ||
6222 | + imx6q_add_vpu(); | ||
6223 | + imx6q_init_audio(); | ||
6224 | + platform_device_register(&qmx6_vmmc_reg_devices); | ||
6225 | + | ||
6226 | + imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); | ||
6227 | + imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); | ||
6228 | + imx6q_add_asrc(&imx_asrc_data); | ||
6229 | + | ||
6230 | + /* release USB Hub reset */ | ||
6231 | + gpio_set_value(MX6Q_QMX6_USB_HUB_RESET, 1); | ||
6232 | + | ||
6233 | + /* fan & backlight PWM */ | ||
6234 | + imx6q_add_mxc_pwm(0); | ||
6235 | + imx6q_add_mxc_pwm(3); | ||
6236 | + imx6q_add_mxc_pwm_backlight(3, &mx6_qmx6_pwm_backlight_data); | ||
6237 | + | ||
6238 | + /* switch on backlight */ | ||
6239 | + gpio_request(MX6Q_QMX6_BLT_EN, "backlight"); | ||
6240 | + gpio_direction_output(MX6Q_QMX6_BLT_EN, 1); | ||
6241 | + gpio_set_value(MX6Q_QMX6_BLT_EN, 1); | ||
6242 | + | ||
6243 | + imx6q_add_otp(); | ||
6244 | + imx6q_add_viim(); | ||
6245 | + imx6q_add_imx2_wdt(0, NULL); | ||
6246 | + imx6q_add_dma(); | ||
6247 | + | ||
6248 | + imx6q_add_dvfs_core(&qmx6_dvfscore_data); | ||
6249 | + | ||
6250 | + imx6q_add_device_buttons(); | ||
6251 | + | ||
6252 | + imx6q_add_hdmi_soc(); | ||
6253 | + imx6q_add_hdmi_soc_dai(); | ||
6254 | + | ||
6255 | + clko2 = clk_get(NULL, "clko2_clk"); | ||
6256 | + if (IS_ERR(clko2)) | ||
6257 | + pr_err("can't get CLKO2 clock.\n"); | ||
6258 | + | ||
6259 | + new_parent = clk_get(NULL, "osc_clk"); | ||
6260 | + if (!IS_ERR(new_parent)) { | ||
6261 | + clk_set_parent(clko2, new_parent); | ||
6262 | + clk_put(new_parent); | ||
6263 | + } | ||
6264 | + rate = clk_round_rate(clko2, 24000000); | ||
6265 | + clk_set_rate(clko2, rate); | ||
6266 | + clk_enable(clko2); | ||
6267 | + | ||
6268 | + pm_power_off = mx6_snvs_poweroff; | ||
6269 | + imx6q_add_busfreq(); | ||
6270 | + | ||
6271 | + imx6q_add_pcie(&mx6_qmx6_pcie_data); | ||
6272 | +} | ||
6273 | + | ||
6274 | +extern void __iomem *twd_base; | ||
6275 | +static void __init mx6_qmx6_timer_init(void) | ||
6276 | +{ | ||
6277 | + struct clk *uart_clk; | ||
6278 | +#ifdef CONFIG_LOCAL_TIMERS | ||
6279 | + twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256); | ||
6280 | + BUG_ON(!twd_base); | ||
6281 | +#endif | ||
6282 | + mx6_clocks_init(32768, 24000000, 0, 0); | ||
6283 | + | ||
6284 | + uart_clk = clk_get_sys("imx-uart.0", NULL); | ||
6285 | + early_console_setup(UART2_BASE_ADDR, uart_clk); | ||
6286 | +} | ||
6287 | + | ||
6288 | +static struct sys_timer mx6_qmx6_timer = { | ||
6289 | + .init = mx6_qmx6_timer_init, | ||
6290 | +}; | ||
6291 | + | ||
6292 | +static void __init mx6q_qmx6_reserve(void) | ||
6293 | +{ | ||
6294 | + phys_addr_t phys; | ||
6295 | + int i; | ||
6296 | + | ||
6297 | + if (imx6q_gpu_pdata.reserved_mem_size) { | ||
6298 | + phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size, | ||
6299 | + SZ_4K, SZ_1G); | ||
6300 | + memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size); | ||
6301 | + memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size); | ||
6302 | + imx6q_gpu_pdata.reserved_mem_base = phys; | ||
6303 | + } | ||
6304 | + | ||
6305 | + for (i = 0; i < ARRAY_SIZE(qmx6_fb_data); i++) | ||
6306 | + if (qmx6_fb_data[i].res_size[0]) { | ||
6307 | + /* reserve for background buffer */ | ||
6308 | + phys = memblock_alloc(qmx6_fb_data[i].res_size[0], | ||
6309 | + SZ_4K); | ||
6310 | + memblock_free(phys, qmx6_fb_data[i].res_size[0]); | ||
6311 | + memblock_remove(phys, qmx6_fb_data[i].res_size[0]); | ||
6312 | + qmx6_fb_data[i].res_base[0] = phys; | ||
6313 | + } | ||
6314 | +} | ||
6315 | + | ||
6316 | +/* | ||
6317 | + * initialize __mach_desc_MX6Q_QMX6 data structure. | ||
6318 | + */ | ||
6319 | +MACHINE_START(MX6Q_QMX6, "Congatec i.MX 6Quad QMX6 Board") | ||
6320 | + /* Maintainer: congatec */ | ||
6321 | + .boot_params = MX6_PHYS_OFFSET + 0x100, | ||
6322 | + .fixup = fixup_mxc_board, | ||
6323 | + .map_io = mx6_map_io, | ||
6324 | + .init_irq = mx6_init_irq, | ||
6325 | + .init_machine = mx6_qmx6_board_init, | ||
6326 | + .timer = &mx6_qmx6_timer, | ||
6327 | + .reserve = mx6q_qmx6_reserve, | ||
6328 | +MACHINE_END | ||
6329 | diff --git a/arch/arm/mach-mx6/board-mx6q_qmx6.h b/arch/arm/mach-mx6/board-mx6q_qmx6.h | ||
6330 | new file mode 100644 | ||
6331 | index 0000000..48829a3 | ||
6332 | --- /dev/null | ||
6333 | +++ b/arch/arm/mach-mx6/board-mx6q_qmx6.h | ||
6334 | @@ -0,0 +1,199 @@ | ||
6335 | +/* | ||
6336 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
6337 | + * | ||
6338 | + * This program is free software; you can redistribute it and/or modify | ||
6339 | + * it under the terms of the GNU General Public License as published by | ||
6340 | + * the Free Software Foundation; either version 2 of the License, or | ||
6341 | + * (at your option) any later version. | ||
6342 | + | ||
6343 | + * This program is distributed in the hope that it will be useful, | ||
6344 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
6345 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
6346 | + * GNU General Public License for more details. | ||
6347 | + | ||
6348 | + * You should have received a copy of the GNU General Public License along | ||
6349 | + * with this program; if not, write to the Free Software Foundation, Inc., | ||
6350 | + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
6351 | + */ | ||
6352 | + | ||
6353 | +#ifndef _BOARD_MX6Q_QMX6_H | ||
6354 | +#define _BOARD_MX6Q_QMX6_H | ||
6355 | +#include <mach/iomux-mx6q.h> | ||
6356 | + | ||
6357 | +static iomux_v3_cfg_t mx6q_qmx6_pads[] = { | ||
6358 | + /* AUDMUX */ | ||
6359 | + MX6Q_PAD_DI0_PIN4__AUDMUX_AUD6_RXD, | ||
6360 | + MX6Q_PAD_DI0_PIN15__AUDMUX_AUD6_TXC, | ||
6361 | + MX6Q_PAD_DI0_PIN2__AUDMUX_AUD6_TXD, | ||
6362 | + MX6Q_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS, | ||
6363 | + | ||
6364 | + /* CAN1 */ | ||
6365 | + MX6Q_PAD_KEY_ROW2__CAN1_RXCAN, | ||
6366 | + MX6Q_PAD_KEY_COL2__CAN1_TXCAN, | ||
6367 | + MX6Q_PAD_GPIO_2__GPIO_1_2, /* PCIE_WAKE_B */ | ||
6368 | + | ||
6369 | + /* CCM */ | ||
6370 | + MX6Q_PAD_GPIO_0__GPIO_1_0, /* GPIO_0/Audio Ref. CLK */ | ||
6371 | + | ||
6372 | + /* ECSPI1 */ | ||
6373 | + MX6Q_PAD_EIM_D17__ECSPI1_MISO, | ||
6374 | + MX6Q_PAD_EIM_D18__ECSPI1_MOSI, | ||
6375 | + MX6Q_PAD_EIM_D16__ECSPI1_SCLK, | ||
6376 | + MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/ | ||
6377 | + | ||
6378 | + /* ENET */ | ||
6379 | + MX6Q_PAD_ENET_MDIO__ENET_MDIO, | ||
6380 | + MX6Q_PAD_ENET_MDC__ENET_MDC, | ||
6381 | + MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC, | ||
6382 | + MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0, | ||
6383 | + MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1, | ||
6384 | + MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2, | ||
6385 | + MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3, | ||
6386 | + MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL, | ||
6387 | + MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK, | ||
6388 | + MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC, | ||
6389 | + MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0, | ||
6390 | + MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1, | ||
6391 | + MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2, | ||
6392 | + MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3, | ||
6393 | + MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, | ||
6394 | + MX6Q_PAD_ENET_TX_EN__GPIO_1_28, /* Micrel RGMII Phy Interrupt */ | ||
6395 | + MX6Q_PAD_EIM_D23__GPIO_3_23, /* RGMII reset */ | ||
6396 | + | ||
6397 | + /* GPIO1 */ | ||
6398 | + MX6Q_PAD_ENET_RX_ER__SPDIF_IN1, /* SPDIF_IN */ | ||
6399 | + | ||
6400 | + /* GPIO2 */ | ||
6401 | + MX6Q_PAD_NANDF_D1__GPIO_2_1, /* J14 - Menu Button */ | ||
6402 | + MX6Q_PAD_NANDF_D2__GPIO_2_2, /* J14 - Back Button */ | ||
6403 | + MX6Q_PAD_NANDF_D3__GPIO_2_3, /* J14 - Search Button */ | ||
6404 | + MX6Q_PAD_NANDF_D4__GPIO_2_4, /* J14 - Home Button */ | ||
6405 | + MX6Q_PAD_EIM_A22__GPIO_2_16, /* J12 - Boot Mode Select */ | ||
6406 | + MX6Q_PAD_EIM_A21__GPIO_2_17, /* J12 - Boot Mode Select */ | ||
6407 | + MX6Q_PAD_EIM_A20__GPIO_2_18, /* J12 - Boot Mode Select */ | ||
6408 | + MX6Q_PAD_EIM_A19__GPIO_2_19, /* J12 - Boot Mode Select */ | ||
6409 | + MX6Q_PAD_EIM_A18__GPIO_2_20, /* J12 - Boot Mode Select */ | ||
6410 | + MX6Q_PAD_EIM_A17__GPIO_2_21, /* J12 - Boot Mode Select */ | ||
6411 | + MX6Q_PAD_EIM_A16__GPIO_2_22, /* J12 - Boot Mode Select */ | ||
6412 | + MX6Q_PAD_EIM_RW__GPIO_2_26, /* J12 - Boot Mode Select */ | ||
6413 | + MX6Q_PAD_EIM_LBA__GPIO_2_27, /* J12 - Boot Mode Select */ | ||
6414 | + MX6Q_PAD_EIM_EB0__GPIO_2_28, /* J12 - Boot Mode Select */ | ||
6415 | + MX6Q_PAD_EIM_EB1__GPIO_2_29, /* J12 - Boot Mode Select */ | ||
6416 | + MX6Q_PAD_EIM_EB3__GPIO_2_31, /* J12 - Boot Mode Select */ | ||
6417 | + | ||
6418 | + /* GPIO3 */ | ||
6419 | + MX6Q_PAD_EIM_DA0__GPIO_3_0, /* J12 - Boot Mode Select */ | ||
6420 | + MX6Q_PAD_EIM_DA1__GPIO_3_1, /* J12 - Boot Mode Select */ | ||
6421 | + MX6Q_PAD_EIM_DA2__GPIO_3_2, /* J12 - Boot Mode Select */ | ||
6422 | + MX6Q_PAD_EIM_DA3__GPIO_3_3, /* J12 - Boot Mode Select */ | ||
6423 | + MX6Q_PAD_EIM_DA4__GPIO_3_4, /* J12 - Boot Mode Select */ | ||
6424 | + MX6Q_PAD_EIM_DA5__GPIO_3_5, /* J12 - Boot Mode Select */ | ||
6425 | + MX6Q_PAD_EIM_DA6__GPIO_3_6, /* J12 - Boot Mode Select */ | ||
6426 | + MX6Q_PAD_EIM_DA7__GPIO_3_7, /* J12 - Boot Mode Select */ | ||
6427 | + MX6Q_PAD_EIM_DA8__GPIO_3_8, /* J12 - Boot Mode Select */ | ||
6428 | + MX6Q_PAD_EIM_DA9__GPIO_3_9, /* J12 - Boot Mode Select */ | ||
6429 | + MX6Q_PAD_EIM_DA10__GPIO_3_10, /* J12 - Boot Mode Select */ | ||
6430 | + MX6Q_PAD_EIM_DA11__GPIO_3_11, /* J12 - Boot Mode Select */ | ||
6431 | + MX6Q_PAD_EIM_DA12__GPIO_3_12, /* J12 - Boot Mode Select */ | ||
6432 | + MX6Q_PAD_EIM_DA13__GPIO_3_13, /* J12 - Boot Mode Select */ | ||
6433 | + MX6Q_PAD_EIM_DA14__GPIO_3_14, /* J12 - Boot Mode Select */ | ||
6434 | + MX6Q_PAD_EIM_DA15__GPIO_3_15, /* J12 - Boot Mode Select */ | ||
6435 | + | ||
6436 | + /* GPIO4 */ | ||
6437 | + MX6Q_PAD_GPIO_19__GPIO_4_5, /* Volume Down */ | ||
6438 | + | ||
6439 | + /* GPIO5 */ | ||
6440 | + MX6Q_PAD_EIM_WAIT__GPIO_5_0, /* J12 - Boot Mode Select */ | ||
6441 | + MX6Q_PAD_EIM_A24__GPIO_5_4, /* J12 - Boot Mode Select */ | ||
6442 | + | ||
6443 | + /* GPIO6 */ | ||
6444 | + MX6Q_PAD_EIM_A23__GPIO_6_6, /* J12 - Boot Mode Select */ | ||
6445 | + | ||
6446 | + /* GPIO7 */ | ||
6447 | + MX6Q_PAD_GPIO_17__GPIO_7_12, /* USB Hub Reset */ | ||
6448 | + MX6Q_PAD_GPIO_18__GPIO_7_13, /* Volume Up */ | ||
6449 | + | ||
6450 | + /* I2C1 - PRIMARY */ | ||
6451 | + MX6Q_PAD_EIM_D21__I2C1_SCL, /* GPIO3[21] */ | ||
6452 | + MX6Q_PAD_EIM_D28__I2C1_SDA, /* GPIO3[28] */ | ||
6453 | + | ||
6454 | + /* I2C2 - PMIC SDVO */ | ||
6455 | + MX6Q_PAD_KEY_COL3__I2C2_SCL, /* GPIO4[12] */ | ||
6456 | + MX6Q_PAD_KEY_ROW3__I2C2_SDA, /* GPIO4[13] */ | ||
6457 | + | ||
6458 | + /* I2C3 - Unused */ | ||
6459 | + MX6Q_PAD_GPIO_3__I2C3_SCL, | ||
6460 | + MX6Q_PAD_GPIO_6__I2C3_SDA, | ||
6461 | + | ||
6462 | + /* SUS_S3 */ | ||
6463 | + MX6Q_PAD_GPIO_5__GPIO_1_5, /* GPIO1[5] */ | ||
6464 | + | ||
6465 | + MX6Q_PAD_GPIO_16__GPIO_7_11, /* GPIO7[11] */ | ||
6466 | + | ||
6467 | + MX6Q_PAD_GPIO_7__GPIO_1_7, /* Display Connector GP */ | ||
6468 | + MX6Q_PAD_GPIO_9__GPIO_1_9, /* Display Connector GP */ | ||
6469 | + MX6Q_PAD_NANDF_D0__GPIO_2_0, /* Unused */ | ||
6470 | + | ||
6471 | + /* PWM1 */ | ||
6472 | + MX6Q_PAD_SD1_DAT3__PWM1_PWMO, /* GPIO1[21] */ | ||
6473 | + | ||
6474 | + /* PCIe RESET */ | ||
6475 | + MX6Q_PAD_SD1_DAT2__GPIO_1_19, /* GPIO1[19] */ | ||
6476 | + | ||
6477 | + /* PWM4 */ | ||
6478 | + MX6Q_PAD_SD1_CMD__PWM4_PWMO, /* GPIO1[18] */ | ||
6479 | + | ||
6480 | + /* UART1 */ | ||
6481 | + MX6Q_PAD_CSI0_DAT10__UART1_TXD, | ||
6482 | + MX6Q_PAD_CSI0_DAT11__UART1_RXD, | ||
6483 | + | ||
6484 | + /* UART2 for debug */ | ||
6485 | + MX6Q_PAD_EIM_D26__UART2_TXD, | ||
6486 | + MX6Q_PAD_EIM_D27__UART2_RXD, | ||
6487 | + | ||
6488 | + /* USBOTG ID pin */ | ||
6489 | + MX6Q_PAD_GPIO_1__USBOTG_ID, | ||
6490 | + | ||
6491 | + /* WATCHDOG */ | ||
6492 | + MX6Q_PAD_KEY_COL4__GPIO_4_14, | ||
6493 | + | ||
6494 | + /* USB OC pin */ | ||
6495 | + /* MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC, TODO: to be checked */ | ||
6496 | + | ||
6497 | + /* USDHC2 */ | ||
6498 | + MX6Q_PAD_SD2_CLK__USDHC2_CLK, | ||
6499 | + MX6Q_PAD_SD2_CMD__USDHC2_CMD, | ||
6500 | + MX6Q_PAD_SD2_DAT0__USDHC2_DAT0, | ||
6501 | + MX6Q_PAD_SD2_DAT1__USDHC2_DAT1, | ||
6502 | + MX6Q_PAD_SD2_DAT2__USDHC2_DAT2, | ||
6503 | + MX6Q_PAD_SD2_DAT3__USDHC2_DAT3, | ||
6504 | + MX6Q_PAD_GPIO_4__GPIO_1_4, /* Card Detect */ | ||
6505 | + | ||
6506 | + /* USDHC3 */ | ||
6507 | + MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ, | ||
6508 | + MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ, | ||
6509 | + MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ, | ||
6510 | + MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ, | ||
6511 | + MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ, | ||
6512 | + MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ, | ||
6513 | + MX6Q_PAD_SD3_DAT4__USDHC3_DAT4_50MHZ, | ||
6514 | + MX6Q_PAD_SD3_DAT5__USDHC3_DAT5_50MHZ, | ||
6515 | + MX6Q_PAD_SD3_DAT6__USDHC3_DAT6_50MHZ, | ||
6516 | + MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ, | ||
6517 | + | ||
6518 | + /* USDHC4 */ | ||
6519 | + MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ, | ||
6520 | + MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ, | ||
6521 | + MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ, | ||
6522 | + MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ, | ||
6523 | + MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ, | ||
6524 | + MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ, | ||
6525 | + MX6Q_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ, | ||
6526 | + MX6Q_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ, | ||
6527 | + MX6Q_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ, | ||
6528 | + MX6Q_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ, | ||
6529 | + MX6Q_PAD_NANDF_D6__GPIO_2_6, /* SD4_CD */ | ||
6530 | + MX6Q_PAD_NANDF_D7__GPIO_2_7, /* SD4_WP */ | ||
6531 | +}; | ||
6532 | + | ||
6533 | +#endif | ||
6534 | diff --git a/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c | ||
6535 | new file mode 100644 | ||
6536 | index 0000000..1743ff8 | ||
6537 | --- /dev/null | ||
6538 | +++ b/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c | ||
6539 | @@ -0,0 +1,422 @@ | ||
6540 | +/* | ||
6541 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
6542 | + * | ||
6543 | + * This program is free software; you can redistribute it and/or modify | ||
6544 | + * it under the terms of the GNU General Public License as published by | ||
6545 | + * the Free Software Foundation; either version 2 of the License, or | ||
6546 | + * (at your option) any later version. | ||
6547 | + * | ||
6548 | + * This program is distributed in the hope that it will be useful, | ||
6549 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
6550 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
6551 | + * GNU General Public License for more details. | ||
6552 | + * | ||
6553 | + * You should have received a copy of the GNU General Public License | ||
6554 | + * along with this program; if not, write to the Free Software | ||
6555 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
6556 | + */ | ||
6557 | + | ||
6558 | +#include <linux/module.h> | ||
6559 | +#include <linux/init.h> | ||
6560 | +#include <linux/platform_device.h> | ||
6561 | +#include <linux/err.h> | ||
6562 | +#include <linux/i2c.h> | ||
6563 | +#include <linux/gpio.h> | ||
6564 | +#include <linux/regulator/machine.h> | ||
6565 | +#include <linux/mfd/pfuze.h> | ||
6566 | +#include <mach/irqs.h> | ||
6567 | + | ||
6568 | +/* | ||
6569 | + * Convenience conversion. | ||
6570 | + * Here atm, maybe there is somewhere better for this. | ||
6571 | + */ | ||
6572 | +#define mV_to_uV(mV) (mV * 1000) | ||
6573 | +#define uV_to_mV(uV) (uV / 1000) | ||
6574 | +#define V_to_uV(V) (mV_to_uV(V * 1000)) | ||
6575 | +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) | ||
6576 | + | ||
6577 | +#define PFUZE100_I2C_DEVICE_NAME "pfuze100" | ||
6578 | +/* 7-bit I2C bus slave address */ | ||
6579 | +#define PFUZE100_I2C_ADDR (0x08) | ||
6580 | + /*SWBST*/ | ||
6581 | +#define PFUZE100_SW1ASTANDBY 33 | ||
6582 | +#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x18) | ||
6583 | +#define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0) | ||
6584 | +#define PFUZE100_SW1BSTANDBY 40 | ||
6585 | +#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x18) | ||
6586 | +#define PFUZE100_SW1BSTANDBY_STBY_M (0x3f<<0) | ||
6587 | +#define PFUZE100_SW1CSTANDBY 47 | ||
6588 | +#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x18) | ||
6589 | +#define PFUZE100_SW1CSTANDBY_STBY_M (0x3f<<0) | ||
6590 | +#define PFUZE100_SW2STANDBY 54 | ||
6591 | +#define PFUZE100_SW2STANDBY_STBY_VAL 0x0 | ||
6592 | +#define PFUZE100_SW2STANDBY_STBY_M (0x3f<<0) | ||
6593 | +#define PFUZE100_SW3ASTANDBY 61 | ||
6594 | +#define PFUZE100_SW3ASTANDBY_STBY_VAL 0x0 | ||
6595 | +#define PFUZE100_SW3ASTANDBY_STBY_M (0x3f<<0) | ||
6596 | +#define PFUZE100_SW3BSTANDBY 68 | ||
6597 | +#define PFUZE100_SW3BSTANDBY_STBY_VAL 0x0 | ||
6598 | +#define PFUZE100_SW3BSTANDBY_STBY_M (0x3f<<0) | ||
6599 | +#define PFUZE100_SW4STANDBY 75 | ||
6600 | +#define PFUZE100_SW4STANDBY_STBY_VAL 0 | ||
6601 | +#define PFUZE100_SW4STANDBY_STBY_M (0x3f<<0) | ||
6602 | +#define PFUZE100_SWBSTCON1 102 | ||
6603 | +#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL (0x1<<2) | ||
6604 | +#define PFUZE100_SWBSTCON1_SWBSTMOD_M (0x3<<2) | ||
6605 | + | ||
6606 | + | ||
6607 | +static struct regulator_consumer_supply sw2_consumers[] = { | ||
6608 | + { | ||
6609 | + .supply = "MICVDD", | ||
6610 | + .dev_name = "0-001a", | ||
6611 | + } | ||
6612 | +}; | ||
6613 | +static struct regulator_consumer_supply sw4_consumers[] = { | ||
6614 | + { | ||
6615 | + .supply = "AUD_1V8", | ||
6616 | + } | ||
6617 | +}; | ||
6618 | +static struct regulator_consumer_supply swbst_consumers[] = { | ||
6619 | + { | ||
6620 | + .supply = "SWBST_5V", | ||
6621 | + } | ||
6622 | +}; | ||
6623 | +static struct regulator_consumer_supply vgen1_consumers[] = { | ||
6624 | + { | ||
6625 | + .supply = "VGEN1_1V5", | ||
6626 | + } | ||
6627 | +}; | ||
6628 | +static struct regulator_consumer_supply vgen2_consumers[] = { | ||
6629 | + { | ||
6630 | + .supply = "VGEN2_1V5", | ||
6631 | + } | ||
6632 | +}; | ||
6633 | +static struct regulator_consumer_supply vgen4_consumers[] = { | ||
6634 | + { | ||
6635 | + .supply = "DBVDD", | ||
6636 | + .dev_name = "0-001a", | ||
6637 | + }, | ||
6638 | + { | ||
6639 | + .supply = "AVDD", | ||
6640 | + .dev_name = "0-001a", | ||
6641 | + }, | ||
6642 | + { | ||
6643 | + .supply = "DCVDD", | ||
6644 | + .dev_name = "0-001a", | ||
6645 | + }, | ||
6646 | + { | ||
6647 | + .supply = "CPVDD", | ||
6648 | + .dev_name = "0-001a", | ||
6649 | + }, | ||
6650 | + { | ||
6651 | + .supply = "PLLVDD", | ||
6652 | + .dev_name = "0-001a", | ||
6653 | + } | ||
6654 | +}; | ||
6655 | +static struct regulator_consumer_supply vgen5_consumers[] = { | ||
6656 | + { | ||
6657 | + .supply = "VGEN5_2V8", | ||
6658 | + } | ||
6659 | +}; | ||
6660 | +static struct regulator_consumer_supply vgen6_consumers[] = { | ||
6661 | + { | ||
6662 | + .supply = "VGEN6_3V3", | ||
6663 | + } | ||
6664 | +}; | ||
6665 | + | ||
6666 | +static struct regulator_init_data sw1a_init = { | ||
6667 | + .constraints = { | ||
6668 | + .name = "PFUZE100_SW1A", | ||
6669 | +#ifdef PFUZE100_FIRST_VERSION | ||
6670 | + .min_uV = 650000, | ||
6671 | + .max_uV = 1437500, | ||
6672 | +#else | ||
6673 | + .min_uV = 300000, | ||
6674 | + .max_uV = 1875000, | ||
6675 | +#endif | ||
6676 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6677 | + .valid_modes_mask = 0, | ||
6678 | + .boot_on = 1, | ||
6679 | + .always_on = 1, | ||
6680 | + }, | ||
6681 | +}; | ||
6682 | + | ||
6683 | +static struct regulator_init_data sw1b_init = { | ||
6684 | + .constraints = { | ||
6685 | + .name = "PFUZE100_SW1B", | ||
6686 | + .min_uV = 300000, | ||
6687 | + .max_uV = 1875000, | ||
6688 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6689 | + .valid_modes_mask = 0, | ||
6690 | + .always_on = 1, | ||
6691 | + .boot_on = 1, | ||
6692 | + }, | ||
6693 | +}; | ||
6694 | + | ||
6695 | +static struct regulator_init_data sw1c_init = { | ||
6696 | + .constraints = { | ||
6697 | + .name = "PFUZE100_SW1C", | ||
6698 | + .min_uV = 300000, | ||
6699 | + .max_uV = 1875000, | ||
6700 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6701 | + .valid_modes_mask = 0, | ||
6702 | + .always_on = 1, | ||
6703 | + .boot_on = 1, | ||
6704 | + }, | ||
6705 | +}; | ||
6706 | + | ||
6707 | +static struct regulator_init_data sw2_init = { | ||
6708 | + .constraints = { | ||
6709 | + .name = "PFUZE100_SW2", | ||
6710 | +#if PFUZE100_SW2_VOL6 | ||
6711 | + .min_uV = 800000, | ||
6712 | + .max_uV = 3950000, | ||
6713 | +#else | ||
6714 | + .min_uV = 400000, | ||
6715 | + .max_uV = 1975000, | ||
6716 | +#endif | ||
6717 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6718 | + .valid_modes_mask = 0, | ||
6719 | + .always_on = 1, | ||
6720 | + .boot_on = 1, | ||
6721 | + }, | ||
6722 | + .num_consumer_supplies = ARRAY_SIZE(sw2_consumers), | ||
6723 | + .consumer_supplies = sw2_consumers, | ||
6724 | +}; | ||
6725 | + | ||
6726 | +static struct regulator_init_data sw3a_init = { | ||
6727 | + .constraints = { | ||
6728 | + .name = "PFUZE100_SW3A", | ||
6729 | +#if PFUZE100_SW3_VOL6 | ||
6730 | + .min_uV = 800000, | ||
6731 | + .max_uV = 3950000, | ||
6732 | +#else | ||
6733 | + .min_uV = 400000, | ||
6734 | + .max_uV = 1975000, | ||
6735 | +#endif | ||
6736 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6737 | + .valid_modes_mask = 0, | ||
6738 | + .always_on = 1, | ||
6739 | + .boot_on = 1, | ||
6740 | + }, | ||
6741 | +}; | ||
6742 | + | ||
6743 | +static struct regulator_init_data sw3b_init = { | ||
6744 | + .constraints = { | ||
6745 | + .name = "PFUZE100_SW3B", | ||
6746 | +#if PFUZE100_SW3_VOL6 | ||
6747 | + .min_uV = 800000, | ||
6748 | + .max_uV = 3950000, | ||
6749 | +#else | ||
6750 | + .min_uV = 400000, | ||
6751 | + .max_uV = 1975000, | ||
6752 | +#endif | ||
6753 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6754 | + .valid_modes_mask = 0, | ||
6755 | + .always_on = 1, | ||
6756 | + .boot_on = 1, | ||
6757 | + }, | ||
6758 | +}; | ||
6759 | + | ||
6760 | +static struct regulator_init_data sw4_init = { | ||
6761 | + .constraints = { | ||
6762 | + .name = "PFUZE100_SW4", | ||
6763 | +#if PFUZE100_SW4_VOL6 | ||
6764 | + .min_uV = 800000, | ||
6765 | + .max_uV = 3950000, | ||
6766 | +#else | ||
6767 | + .min_uV = 400000, | ||
6768 | + .max_uV = 1975000, | ||
6769 | +#endif | ||
6770 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6771 | + .valid_modes_mask = 0, | ||
6772 | + }, | ||
6773 | + .num_consumer_supplies = ARRAY_SIZE(sw4_consumers), | ||
6774 | + .consumer_supplies = sw4_consumers, | ||
6775 | +}; | ||
6776 | + | ||
6777 | +static struct regulator_init_data swbst_init = { | ||
6778 | + .constraints = { | ||
6779 | + .name = "PFUZE100_SWBST", | ||
6780 | + .min_uV = 5000000, | ||
6781 | + .max_uV = 5150000, | ||
6782 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6783 | + .valid_modes_mask = 0, | ||
6784 | + .always_on = 1, | ||
6785 | + .boot_on = 1, | ||
6786 | + }, | ||
6787 | + .num_consumer_supplies = ARRAY_SIZE(swbst_consumers), | ||
6788 | + .consumer_supplies = swbst_consumers, | ||
6789 | +}; | ||
6790 | + | ||
6791 | +static struct regulator_init_data vsnvs_init = { | ||
6792 | + .constraints = { | ||
6793 | + .name = "PFUZE100_VSNVS", | ||
6794 | + .min_uV = 1200000, | ||
6795 | + .max_uV = 3000000, | ||
6796 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
6797 | + .valid_modes_mask = 0, | ||
6798 | + .always_on = 1, | ||
6799 | + .boot_on = 1, | ||
6800 | + }, | ||
6801 | +}; | ||
6802 | + | ||
6803 | +static struct regulator_init_data vrefddr_init = { | ||
6804 | + .constraints = { | ||
6805 | + .name = "PFUZE100_VREFDDR", | ||
6806 | + .always_on = 1, | ||
6807 | + .boot_on = 1, | ||
6808 | + }, | ||
6809 | +}; | ||
6810 | + | ||
6811 | +static struct regulator_init_data vgen1_init = { | ||
6812 | + .constraints = { | ||
6813 | + .name = "PFUZE100_VGEN1", | ||
6814 | +#ifdef PFUZE100_FIRST_VERSION | ||
6815 | + .min_uV = 1200000, | ||
6816 | + .max_uV = 1550000, | ||
6817 | +#else | ||
6818 | + .min_uV = 800000, | ||
6819 | + .max_uV = 1550000, | ||
6820 | +#endif | ||
6821 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6822 | + REGULATOR_CHANGE_STATUS, | ||
6823 | + .valid_modes_mask = 0, | ||
6824 | + }, | ||
6825 | + .num_consumer_supplies = ARRAY_SIZE(vgen1_consumers), | ||
6826 | + .consumer_supplies = vgen1_consumers, | ||
6827 | +}; | ||
6828 | + | ||
6829 | +static struct regulator_init_data vgen2_init = { | ||
6830 | + .constraints = { | ||
6831 | + .name = "PFUZE100_VGEN2", | ||
6832 | +#ifdef PFUZE100_FIRST_VERSION | ||
6833 | + .min_uV = 1200000, | ||
6834 | + .max_uV = 1550000, | ||
6835 | +#else | ||
6836 | + .min_uV = 800000, | ||
6837 | + .max_uV = 1550000, | ||
6838 | +#endif | ||
6839 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6840 | + REGULATOR_CHANGE_STATUS, | ||
6841 | + .valid_modes_mask = 0, | ||
6842 | + }, | ||
6843 | + .num_consumer_supplies = ARRAY_SIZE(vgen2_consumers), | ||
6844 | + .consumer_supplies = vgen2_consumers, | ||
6845 | + | ||
6846 | +}; | ||
6847 | + | ||
6848 | +static struct regulator_init_data vgen3_init = { | ||
6849 | + .constraints = { | ||
6850 | + .name = "PFUZE100_VGEN3", | ||
6851 | + .min_uV = 1800000, | ||
6852 | + .max_uV = 3300000, | ||
6853 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6854 | + REGULATOR_CHANGE_STATUS, | ||
6855 | + .valid_modes_mask = 0, | ||
6856 | + }, | ||
6857 | +}; | ||
6858 | + | ||
6859 | +static struct regulator_init_data vgen4_init = { | ||
6860 | + .constraints = { | ||
6861 | + .name = "PFUZE100_VGEN4", | ||
6862 | + .min_uV = 1800000, | ||
6863 | + .max_uV = 3300000, | ||
6864 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6865 | + REGULATOR_CHANGE_STATUS, | ||
6866 | + .valid_modes_mask = 0, | ||
6867 | + .always_on = 1, | ||
6868 | + .boot_on = 1, | ||
6869 | + }, | ||
6870 | + .num_consumer_supplies = ARRAY_SIZE(vgen4_consumers), | ||
6871 | + .consumer_supplies = vgen4_consumers, | ||
6872 | +}; | ||
6873 | + | ||
6874 | +static struct regulator_init_data vgen5_init = { | ||
6875 | + .constraints = { | ||
6876 | + .name = "PFUZE100_VGEN5", | ||
6877 | + .min_uV = 1800000, | ||
6878 | + .max_uV = 3300000, | ||
6879 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6880 | + REGULATOR_CHANGE_STATUS, | ||
6881 | + .valid_modes_mask = 0, | ||
6882 | + .always_on = 1, | ||
6883 | + .boot_on = 1, | ||
6884 | + }, | ||
6885 | + .num_consumer_supplies = ARRAY_SIZE(vgen5_consumers), | ||
6886 | + .consumer_supplies = vgen5_consumers, | ||
6887 | +}; | ||
6888 | + | ||
6889 | +static struct regulator_init_data vgen6_init = { | ||
6890 | + .constraints = { | ||
6891 | + .name = "PFUZE100_VGEN6", | ||
6892 | + .min_uV = 1800000, | ||
6893 | + .max_uV = 3300000, | ||
6894 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
6895 | + REGULATOR_CHANGE_STATUS, | ||
6896 | + .valid_modes_mask = 0, | ||
6897 | + }, | ||
6898 | + .num_consumer_supplies = ARRAY_SIZE(vgen6_consumers), | ||
6899 | + .consumer_supplies = vgen6_consumers, | ||
6900 | +}; | ||
6901 | + | ||
6902 | +static int pfuze100_init(struct mc_pfuze *pfuze) | ||
6903 | +{ | ||
6904 | + int ret; | ||
6905 | + ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY, | ||
6906 | + PFUZE100_SW1ASTANDBY_STBY_M, | ||
6907 | + PFUZE100_SW1ASTANDBY_STBY_VAL); | ||
6908 | + if (ret) | ||
6909 | + goto err; | ||
6910 | + ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1BSTANDBY, | ||
6911 | + PFUZE100_SW1BSTANDBY_STBY_M, | ||
6912 | + PFUZE100_SW1BSTANDBY_STBY_VAL); | ||
6913 | + if (ret) | ||
6914 | + goto err; | ||
6915 | + ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY, | ||
6916 | + PFUZE100_SW1CSTANDBY_STBY_M, | ||
6917 | + PFUZE100_SW1CSTANDBY_STBY_VAL); | ||
6918 | + if (ret) | ||
6919 | + goto err; | ||
6920 | + return 0; | ||
6921 | +err: | ||
6922 | + printk(KERN_ERR "pfuze100 init error!\n"); | ||
6923 | + return -1; | ||
6924 | +} | ||
6925 | + | ||
6926 | +static struct pfuze_regulator_init_data mx6q_qmx6_pfuze100_regulators[] = { | ||
6927 | + {.id = PFUZE100_SW1A, .init_data = &sw1a_init}, | ||
6928 | + {.id = PFUZE100_SW1B, .init_data = &sw1b_init}, | ||
6929 | + {.id = PFUZE100_SW1C, .init_data = &sw1c_init}, | ||
6930 | + {.id = PFUZE100_SW2, .init_data = &sw2_init}, | ||
6931 | + {.id = PFUZE100_SW3A, .init_data = &sw3a_init}, | ||
6932 | + {.id = PFUZE100_SW3B, .init_data = &sw3b_init}, | ||
6933 | + {.id = PFUZE100_SW4, .init_data = &sw4_init}, | ||
6934 | + {.id = PFUZE100_SWBST, .init_data = &swbst_init}, | ||
6935 | + {.id = PFUZE100_VSNVS, .init_data = &vsnvs_init}, | ||
6936 | + {.id = PFUZE100_VREFDDR, .init_data = &vrefddr_init}, | ||
6937 | + {.id = PFUZE100_VGEN1, .init_data = &vgen1_init}, | ||
6938 | + {.id = PFUZE100_VGEN2, .init_data = &vgen2_init}, | ||
6939 | + {.id = PFUZE100_VGEN3, .init_data = &vgen3_init}, | ||
6940 | + {.id = PFUZE100_VGEN4, .init_data = &vgen4_init}, | ||
6941 | + {.id = PFUZE100_VGEN5, .init_data = &vgen5_init}, | ||
6942 | + {.id = PFUZE100_VGEN6, .init_data = &vgen6_init}, | ||
6943 | +}; | ||
6944 | + | ||
6945 | +static struct pfuze_platform_data pfuze100_plat = { | ||
6946 | + .flags = PFUZE_USE_REGULATOR, | ||
6947 | + .num_regulators = ARRAY_SIZE(mx6q_qmx6_pfuze100_regulators), | ||
6948 | + .regulators = mx6q_qmx6_pfuze100_regulators, | ||
6949 | + .pfuze_init = pfuze100_init, | ||
6950 | +}; | ||
6951 | + | ||
6952 | +static struct i2c_board_info __initdata pfuze100_i2c_device = { | ||
6953 | + I2C_BOARD_INFO(PFUZE100_I2C_DEVICE_NAME, PFUZE100_I2C_ADDR), | ||
6954 | + .platform_data = &pfuze100_plat, | ||
6955 | +}; | ||
6956 | + | ||
6957 | +int __init mx6q_qmx6_init_pfuze100(u32 int_gpio) | ||
6958 | +{ | ||
6959 | + pfuze100_i2c_device.irq = gpio_to_irq(int_gpio); /*update INT gpio */ | ||
6960 | + return i2c_register_board_info(1, &pfuze100_i2c_device, 1); | ||
6961 | +} | ||
6962 | diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h | ||
6963 | index bb15db1..dc5267d 100644 | ||
6964 | --- a/arch/arm/plat-mxc/include/mach/esdhc.h | ||
6965 | +++ b/arch/arm/plat-mxc/include/mach/esdhc.h | ||
6966 | @@ -36,5 +36,6 @@ struct esdhc_platform_data { | ||
6967 | unsigned int keep_power_at_suspend; | ||
6968 | unsigned int delay_line; | ||
6969 | int (*platform_pad_change)(unsigned int index, int clock); | ||
6970 | + unsigned int force_write_access; | ||
6971 | }; | ||
6972 | #endif /* __ASM_ARCH_IMX_ESDHC_H */ | ||
6973 | diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types | ||
6974 | index f6b5c0e..0b2d992 100644 | ||
6975 | --- a/arch/arm/tools/mach-types | ||
6976 | +++ b/arch/arm/tools/mach-types | ||
6977 | @@ -1118,6 +1118,7 @@ mx6q_sabrelite MACH_MX6Q_SABRELITE MX6Q_SABRELITE 3769 | ||
6978 | mx6q_sabresd MACH_MX6Q_SABRESD MX6Q_SABRESD 3980 | ||
6979 | mx6q_arm2 MACH_MX6Q_ARM2 MX6Q_ARM2 3837 | ||
6980 | mx6sl_arm2 MACH_MX6SL_ARM2 MX6SL_ARM2 4091 | ||
6981 | +mx6q_qmx6 MACH_MX6Q_QMX6 MX6Q_QMX6 4122 | ||
6982 | mx6q_hdmidongle MACH_MX6Q_HDMIDONGLE MX6Q_HDMIDONGLE 4284 | ||
6983 | mx6sl_evk MACH_MX6SL_EVK MX6SL_EVK 4307 | ||
6984 | |||
6985 | diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c | ||
6986 | index 35fd825..44483dd 100644 | ||
6987 | --- a/drivers/mmc/host/sdhci-esdhc-imx.c | ||
6988 | +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | ||
6989 | @@ -563,7 +563,7 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) | ||
6990 | case SDHCI_COMMAND: | ||
6991 | if ((host->cmd->opcode == MMC_STOP_TRANSMISSION || | ||
6992 | host->cmd->opcode == MMC_SET_BLOCK_COUNT) && | ||
6993 | - (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)) | ||
6994 | + (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)) | ||
6995 | val |= SDHCI_CMD_ABORTCMD; | ||
6996 | |||
6997 | writel(0x08800880, host->ioaddr + SDHCI_CAPABILITIES_1); | ||
6998 | @@ -719,6 +719,9 @@ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host) | ||
6999 | { | ||
7000 | struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data; | ||
7001 | |||
7002 | + if (boarddata->force_write_access) | ||
7003 | + return 0; | ||
7004 | + | ||
7005 | if (boarddata && gpio_is_valid(boarddata->wp_gpio)) | ||
7006 | return gpio_get_value(boarddata->wp_gpio); | ||
7007 | else | ||
7008 | diff --git a/drivers/net/fec.c b/drivers/net/fec.c | ||
7009 | index 71e0abc..d437fec 100755 | ||
7010 | --- a/drivers/net/fec.c | ||
7011 | +++ b/drivers/net/fec.c | ||
7012 | @@ -105,10 +105,10 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); | ||
7013 | #define FEC_FLASHMAC 0xf0006000 | ||
7014 | #elif defined(CONFIG_CANCam) | ||
7015 | #define FEC_FLASHMAC 0xf0020000 | ||
7016 | -#elif defined (CONFIG_M5272C3) | ||
7017 | +#elif defined(CONFIG_M5272C3) | ||
7018 | #define FEC_FLASHMAC (0xffe04000 + 4) | ||
7019 | #elif defined(CONFIG_MOD5272) | ||
7020 | -#define FEC_FLASHMAC 0xffc0406b | ||
7021 | +#define FEC_FLASHMAC 0xffc0406b | ||
7022 | #else | ||
7023 | #define FEC_FLASHMAC 0 | ||
7024 | #endif | ||
7025 | @@ -174,8 +174,8 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); | ||
7026 | * account when setting it. | ||
7027 | */ | ||
7028 | #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ | ||
7029 | - defined(CONFIG_M520x) || defined(CONFIG_M532x) || \ | ||
7030 | - defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28) | ||
7031 | + defined(CONFIG_M520x) || defined(CONFIG_M532x) || \ | ||
7032 | + defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28) | ||
7033 | #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16) | ||
7034 | #else | ||
7035 | #define OPT_FRAME_SIZE 0 | ||
7036 | @@ -200,8 +200,8 @@ struct fec_enet_private { | ||
7037 | |||
7038 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ | ||
7039 | unsigned char *tx_bounce[TX_RING_SIZE]; | ||
7040 | - struct sk_buff* tx_skbuff[TX_RING_SIZE]; | ||
7041 | - struct sk_buff* rx_skbuff[RX_RING_SIZE]; | ||
7042 | + struct sk_buff *tx_skbuff[TX_RING_SIZE]; | ||
7043 | + struct sk_buff *rx_skbuff[RX_RING_SIZE]; | ||
7044 | ushort skb_cur; | ||
7045 | ushort skb_dirty; | ||
7046 | |||
7047 | @@ -250,7 +250,7 @@ struct fec_enet_private { | ||
7048 | #define FEC_NAPI_ENABLE FALSE | ||
7049 | #endif | ||
7050 | |||
7051 | -static irqreturn_t fec_enet_interrupt(int irq, void * dev_id); | ||
7052 | +static irqreturn_t fec_enet_interrupt(int irq, void *dev_id); | ||
7053 | static void fec_enet_tx(struct net_device *dev); | ||
7054 | static int fec_rx_poll(struct napi_struct *napi, int budget); | ||
7055 | static void fec_enet_rx(struct net_device *dev); | ||
7056 | @@ -518,7 +518,7 @@ fec_enet_tx(struct net_device *ndev) | ||
7057 | } | ||
7058 | |||
7059 | if (status & BD_ENET_TX_READY) | ||
7060 | - printk("HEY! Enet xmit interrupt and TX_READY.\n"); | ||
7061 | + printk(KERN_INFO "HEY! Enet xmit interrupt and TX_READY.\n"); | ||
7062 | |||
7063 | /* Deferred means some collisions occurred during transmit, | ||
7064 | * but we eventually sent the packet OK. | ||
7065 | @@ -768,7 +768,7 @@ fec_enet_rx(struct net_device *ndev) | ||
7066 | ndev->stats.rx_packets++; | ||
7067 | pkt_len = bdp->cbd_datlen; | ||
7068 | ndev->stats.rx_bytes += pkt_len; | ||
7069 | - data = (__u8*)__va(bdp->cbd_bufaddr); | ||
7070 | + data = (__u8 *)__va(bdp->cbd_bufaddr); | ||
7071 | |||
7072 | if (bdp->cbd_bufaddr) | ||
7073 | dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr, | ||
7074 | @@ -927,7 +927,7 @@ static void __inline__ fec_get_mac(struct net_device *ndev) | ||
7075 | |||
7076 | /* Adjust MAC if using macaddr */ | ||
7077 | if (iap == macaddr) | ||
7078 | - ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->pdev->id; | ||
7079 | + ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->pdev->id; | ||
7080 | } | ||
7081 | |||
7082 | /* ------------------------------------------------------------------------- */ | ||
7083 | @@ -1112,6 +1112,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) | ||
7084 | const struct platform_device_id *id_entry = | ||
7085 | platform_get_device_id(fep->pdev); | ||
7086 | int err = -ENXIO, i; | ||
7087 | + struct clk *bus_clk; | ||
7088 | |||
7089 | /* | ||
7090 | * The dual fec interfaces are not equivalent with enet-mac. | ||
7091 | @@ -1137,11 +1138,10 @@ static int fec_enet_mii_init(struct platform_device *pdev) | ||
7092 | |||
7093 | fep->mii_timeout = 0; | ||
7094 | |||
7095 | - /* | ||
7096 | - * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed) | ||
7097 | - */ | ||
7098 | - fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->mdc_clk), | ||
7099 | - (FEC_ENET_MII_CLK << 2)) << 1; | ||
7100 | + /* sml 2012-11-29: MII Speed derived from 66MHz ipg-clk */ | ||
7101 | + bus_clk = clk_get(NULL, "ipg_clk"); | ||
7102 | + fep->phy_speed = (DIV_ROUND_UP(clk_get_rate(bus_clk), FEC_ENET_MII_CLK)) - 1; | ||
7103 | + | ||
7104 | /* set hold time to 2 internal clock cycle */ | ||
7105 | if (cpu_is_mx6q() || cpu_is_mx6dl()) | ||
7106 | fep->phy_speed |= FEC_ENET_HOLD_TIME; | ||
7107 | @@ -1929,7 +1929,7 @@ fec_probe(struct platform_device *pdev) | ||
7108 | |||
7109 | /* Carrier starts down, phylib will bring it up */ | ||
7110 | netif_carrier_off(ndev); | ||
7111 | - clk_disable(fep->clk); | ||
7112 | + clk_unprepare(fep->clk); | ||
7113 | |||
7114 | INIT_DELAYED_WORK(&fep->fixup_trigger_tx, fixup_trigger_tx_func); | ||
7115 | |||
7116 | diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c | ||
7117 | index 80747d2..f158bc6 100644 | ||
7118 | --- a/drivers/net/phy/micrel.c | ||
7119 | +++ b/drivers/net/phy/micrel.c | ||
7120 | @@ -187,6 +187,21 @@ static struct phy_driver ksz9021_driver = { | ||
7121 | .driver = { .owner = THIS_MODULE, }, | ||
7122 | }; | ||
7123 | |||
7124 | +static struct phy_driver ksz9031_driver = { | ||
7125 | + .phy_id = PHY_ID_KSZ9031, | ||
7126 | + .phy_id_mask = 0x00ffffff, | ||
7127 | + .name = "Micrel KSZ9031 Gigabit PHY", | ||
7128 | + .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause | ||
7129 | + | SUPPORTED_Asym_Pause), | ||
7130 | + .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | ||
7131 | + .config_init = kszphy_config_init, | ||
7132 | + .config_aneg = genphy_config_aneg, | ||
7133 | + .read_status = genphy_read_status, | ||
7134 | + .ack_interrupt = kszphy_ack_interrupt, | ||
7135 | + .config_intr = ksz9021_config_intr, | ||
7136 | + .driver = { .owner = THIS_MODULE, }, | ||
7137 | +}; | ||
7138 | + | ||
7139 | static int __init ksphy_init(void) | ||
7140 | { | ||
7141 | int ret; | ||
7142 | @@ -209,8 +224,14 @@ static int __init ksphy_init(void) | ||
7143 | if (ret) | ||
7144 | goto err5; | ||
7145 | |||
7146 | + ret = phy_driver_register(&ksz9031_driver); | ||
7147 | + if (ret) | ||
7148 | + goto err6; | ||
7149 | + | ||
7150 | return 0; | ||
7151 | |||
7152 | +err6: | ||
7153 | + phy_driver_unregister(&ksz9031_driver); | ||
7154 | err5: | ||
7155 | phy_driver_unregister(&ks8041_driver); | ||
7156 | err4: | ||
7157 | @@ -230,6 +251,7 @@ static void __exit ksphy_exit(void) | ||
7158 | phy_driver_unregister(&ksz9021_driver); | ||
7159 | phy_driver_unregister(&ks8041_driver); | ||
7160 | phy_driver_unregister(&ks8051_driver); | ||
7161 | + phy_driver_unregister(&ksz9031_driver); | ||
7162 | } | ||
7163 | |||
7164 | module_init(ksphy_init); | ||
7165 | @@ -241,6 +263,7 @@ MODULE_LICENSE("GPL"); | ||
7166 | |||
7167 | static struct mdio_device_id __maybe_unused micrel_tbl[] = { | ||
7168 | { PHY_ID_KSZ9021, 0x00ffffff }, | ||
7169 | + { PHY_ID_KSZ9031, 0x00ffffff }, | ||
7170 | { PHY_ID_KS8001, 0x00ffffff }, | ||
7171 | { PHY_ID_KS8737, 0x00ffffff }, | ||
7172 | { PHY_ID_KS8041, 0x00ffffff }, | ||
7173 | diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h | ||
7174 | index dd8da34..3222193 100644 | ||
7175 | --- a/include/linux/micrel_phy.h | ||
7176 | +++ b/include/linux/micrel_phy.h | ||
7177 | @@ -4,6 +4,7 @@ | ||
7178 | #define MICREL_PHY_ID_MASK 0x00fffff0 | ||
7179 | |||
7180 | #define PHY_ID_KSZ9021 0x00221611 | ||
7181 | +#define PHY_ID_KSZ9031 0x00221621 | ||
7182 | #define PHY_ID_KS8737 0x00221720 | ||
7183 | #define PHY_ID_KS8041 0x00221510 | ||
7184 | #define PHY_ID_KS8051 0x00221550 | ||
7185 | diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig | ||
7186 | index e30ebbe..3967a99 100644 | ||
7187 | --- a/sound/soc/imx/Kconfig | ||
7188 | +++ b/sound/soc/imx/Kconfig | ||
7189 | @@ -53,7 +53,7 @@ config SND_SOC_PHYCORE_AC97 | ||
7190 | config SND_SOC_IMX_SGTL5000 | ||
7191 | tristate "SoC Audio support for i.MX boards with sgtl5000" | ||
7192 | depends on I2C && (MACH_MX35_3DS || MACH_MX51_BABBAGE \ | ||
7193 | - || MACH_MX6Q_SABRELITE || MACH_MX6Q_ARM2) | ||
7194 | + || MACH_MX6Q_SABRELITE || MACH_MX6Q_ARM2 || MACH_MX6Q_QMX6) | ||
7195 | select SND_SOC_SGTL5000 | ||
7196 | select SND_MXC_SOC_MX2 | ||
7197 | help | ||
7198 | diff --git a/sound/soc/imx/imx-sgtl5000.c b/sound/soc/imx/imx-sgtl5000.c | ||
7199 | index 9325dc8..7c52545 100644 | ||
7200 | --- a/sound/soc/imx/imx-sgtl5000.c | ||
7201 | +++ b/sound/soc/imx/imx-sgtl5000.c | ||
7202 | @@ -363,7 +363,7 @@ static int __init imx_sgtl5000_init(void) | ||
7203 | if (ret) | ||
7204 | return -ENOMEM; | ||
7205 | |||
7206 | - if (machine_is_mx35_3ds() || machine_is_mx6q_sabrelite()) | ||
7207 | + if (machine_is_mx35_3ds() || machine_is_mx6q_sabrelite() || machine_is_mx6q_qmx6()) | ||
7208 | imx_sgtl5000_dai[0].codec_name = "sgtl5000.0-000a"; | ||
7209 | else | ||
7210 | imx_sgtl5000_dai[0].codec_name = "sgtl5000.1-000a"; | ||
7211 | -- | ||
7212 | 1.8.5.3 | ||
7213 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch new file mode 100644 index 0000000..abc02c9 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch | |||
@@ -0,0 +1,43 @@ | |||
1 | From 503daf4789dd23e4dc1e16c256de0c163fc2bf87 Mon Sep 17 00:00:00 2001 | ||
2 | From: Markus Trippelsdorf <markus@trippelsdorf.de> | ||
3 | Date: Wed, 4 Apr 2012 10:45:27 +0200 | ||
4 | Subject: [PATCH] perf tools: Fix getrusage() related build failure on glibc | ||
5 | trunk | ||
6 | MIME-Version: 1.0 | ||
7 | Content-Type: text/plain; charset=UTF-8 | ||
8 | Content-Transfer-Encoding: 8bit | ||
9 | Organization: O.S. Systems Software LTDA. | ||
10 | |||
11 | On a system running glibc trunk perf doesn't build: | ||
12 | |||
13 | CC builtin-sched.o | ||
14 | builtin-sched.c: In function ‘get_cpu_usage_nsec_parent’: builtin-sched.c:399:16: error: storage size of ‘ru’ isn’t known builtin-sched.c:403:2: error: implicit declaration of function ‘getrusage’ [-Werror=implicit-function-declaration] | ||
15 | [...] | ||
16 | |||
17 | Fix it by including sys/resource.h. | ||
18 | |||
19 | Upstream-Status: Pending | ||
20 | |||
21 | Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de> | ||
22 | Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> | ||
23 | Link: http://lkml.kernel.org/r/20120404084527.GA294@x4 | ||
24 | Signed-off-by: Ingo Molnar <mingo@kernel.org> | ||
25 | --- | ||
26 | tools/perf/builtin-sched.c | 1 + | ||
27 | 1 file changed, 1 insertion(+) | ||
28 | |||
29 | diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c | ||
30 | index dcfe887..3632c2f 100644 | ||
31 | --- a/tools/perf/builtin-sched.c | ||
32 | +++ b/tools/perf/builtin-sched.c | ||
33 | @@ -14,6 +14,7 @@ | ||
34 | #include "util/debug.h" | ||
35 | |||
36 | #include <sys/prctl.h> | ||
37 | +#include <sys/resource.h> | ||
38 | |||
39 | #include <semaphore.h> | ||
40 | #include <pthread.h> | ||
41 | -- | ||
42 | 1.8.4.rc3 | ||
43 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch new file mode 100644 index 0000000..4c31e74 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch | |||
@@ -0,0 +1,259 @@ | |||
1 | From 2235b85f1c76d98b5f1e160cbd0a61a84c15e125 Mon Sep 17 00:00:00 2001 | ||
2 | From: Ivan Djelic <ivan.djelic@parrot.com> | ||
3 | Date: Wed, 6 Mar 2013 20:09:27 +0100 | ||
4 | Subject: [PATCH] ARM: 7668/1: fix memset-related crashes caused by recent GCC | ||
5 | (4.7.2) optimizations | ||
6 | Organization: O.S. Systems Software LTDA. | ||
7 | |||
8 | Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on | ||
9 | assumptions about the implementation of memset and similar functions. | ||
10 | The current ARM optimized memset code does not return the value of | ||
11 | its first argument, as is usually expected from standard implementations. | ||
12 | |||
13 | For instance in the following function: | ||
14 | |||
15 | void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter) | ||
16 | { | ||
17 | memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter)); | ||
18 | waiter->magic = waiter; | ||
19 | INIT_LIST_HEAD(&waiter->list); | ||
20 | } | ||
21 | |||
22 | compiled as: | ||
23 | |||
24 | 800554d0 <debug_mutex_lock_common>: | ||
25 | 800554d0: e92d4008 push {r3, lr} | ||
26 | 800554d4: e1a00001 mov r0, r1 | ||
27 | 800554d8: e3a02010 mov r2, #16 ; 0x10 | ||
28 | 800554dc: e3a01011 mov r1, #17 ; 0x11 | ||
29 | 800554e0: eb04426e bl 80165ea0 <memset> | ||
30 | 800554e4: e1a03000 mov r3, r0 | ||
31 | 800554e8: e583000c str r0, [r3, #12] | ||
32 | 800554ec: e5830000 str r0, [r3] | ||
33 | 800554f0: e5830004 str r0, [r3, #4] | ||
34 | 800554f4: e8bd8008 pop {r3, pc} | ||
35 | |||
36 | GCC assumes memset returns the value of pointer 'waiter' in register r0; causing | ||
37 | register/memory corruptions. | ||
38 | |||
39 | This patch fixes the return value of the assembly version of memset. | ||
40 | It adds a 'mov' instruction and merges an additional load+store into | ||
41 | existing load/store instructions. | ||
42 | For ease of review, here is a breakdown of the patch into 4 simple steps: | ||
43 | |||
44 | Step 1 | ||
45 | ====== | ||
46 | Perform the following substitutions: | ||
47 | ip -> r8, then | ||
48 | r0 -> ip, | ||
49 | and insert 'mov ip, r0' as the first statement of the function. | ||
50 | At this point, we have a memset() implementation returning the proper result, | ||
51 | but corrupting r8 on some paths (the ones that were using ip). | ||
52 | |||
53 | Step 2 | ||
54 | ====== | ||
55 | Make sure r8 is saved and restored when (! CALGN(1)+0) == 1: | ||
56 | |||
57 | save r8: | ||
58 | - str lr, [sp, #-4]! | ||
59 | + stmfd sp!, {r8, lr} | ||
60 | |||
61 | and restore r8 on both exit paths: | ||
62 | - ldmeqfd sp!, {pc} @ Now <64 bytes to go. | ||
63 | + ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go. | ||
64 | (...) | ||
65 | tst r2, #16 | ||
66 | stmneia ip!, {r1, r3, r8, lr} | ||
67 | - ldr lr, [sp], #4 | ||
68 | + ldmfd sp!, {r8, lr} | ||
69 | |||
70 | Step 3 | ||
71 | ====== | ||
72 | Make sure r8 is saved and restored when (! CALGN(1)+0) == 0: | ||
73 | |||
74 | save r8: | ||
75 | - stmfd sp!, {r4-r7, lr} | ||
76 | + stmfd sp!, {r4-r8, lr} | ||
77 | |||
78 | and restore r8 on both exit paths: | ||
79 | bgt 3b | ||
80 | - ldmeqfd sp!, {r4-r7, pc} | ||
81 | + ldmeqfd sp!, {r4-r8, pc} | ||
82 | (...) | ||
83 | tst r2, #16 | ||
84 | stmneia ip!, {r4-r7} | ||
85 | - ldmfd sp!, {r4-r7, lr} | ||
86 | + ldmfd sp!, {r4-r8, lr} | ||
87 | |||
88 | Step 4 | ||
89 | ====== | ||
90 | Rewrite register list "r4-r7, r8" as "r4-r8". | ||
91 | |||
92 | Upstream-Status: Pending | ||
93 | |||
94 | Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com> | ||
95 | Reviewed-by: Nicolas Pitre <nico@linaro.org> | ||
96 | Signed-off-by: Dirk Behme <dirk.behme@gmail.com> | ||
97 | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | ||
98 | (cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5) | ||
99 | --- | ||
100 | arch/arm/lib/memset.S | 85 ++++++++++++++++++++++++++------------------------- | ||
101 | 1 file changed, 44 insertions(+), 41 deletions(-) | ||
102 | |||
103 | diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S | ||
104 | index 650d592..d912e73 100644 | ||
105 | --- a/arch/arm/lib/memset.S | ||
106 | +++ b/arch/arm/lib/memset.S | ||
107 | @@ -19,9 +19,9 @@ | ||
108 | 1: subs r2, r2, #4 @ 1 do we have enough | ||
109 | blt 5f @ 1 bytes to align with? | ||
110 | cmp r3, #2 @ 1 | ||
111 | - strltb r1, [r0], #1 @ 1 | ||
112 | - strleb r1, [r0], #1 @ 1 | ||
113 | - strb r1, [r0], #1 @ 1 | ||
114 | + strltb r1, [ip], #1 @ 1 | ||
115 | + strleb r1, [ip], #1 @ 1 | ||
116 | + strb r1, [ip], #1 @ 1 | ||
117 | add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) | ||
118 | /* | ||
119 | * The pointer is now aligned and the length is adjusted. Try doing the | ||
120 | @@ -29,10 +29,14 @@ | ||
121 | */ | ||
122 | |||
123 | ENTRY(memset) | ||
124 | - ands r3, r0, #3 @ 1 unaligned? | ||
125 | +/* | ||
126 | + * Preserve the contents of r0 for the return value. | ||
127 | + */ | ||
128 | + mov ip, r0 | ||
129 | + ands r3, ip, #3 @ 1 unaligned? | ||
130 | bne 1b @ 1 | ||
131 | /* | ||
132 | - * we know that the pointer in r0 is aligned to a word boundary. | ||
133 | + * we know that the pointer in ip is aligned to a word boundary. | ||
134 | */ | ||
135 | orr r1, r1, r1, lsl #8 | ||
136 | orr r1, r1, r1, lsl #16 | ||
137 | @@ -43,29 +47,28 @@ ENTRY(memset) | ||
138 | #if ! CALGN(1)+0 | ||
139 | |||
140 | /* | ||
141 | - * We need an extra register for this loop - save the return address and | ||
142 | - * use the LR | ||
143 | + * We need 2 extra registers for this loop - use r8 and the LR | ||
144 | */ | ||
145 | - str lr, [sp, #-4]! | ||
146 | - mov ip, r1 | ||
147 | + stmfd sp!, {r8, lr} | ||
148 | + mov r8, r1 | ||
149 | mov lr, r1 | ||
150 | |||
151 | 2: subs r2, r2, #64 | ||
152 | - stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time. | ||
153 | - stmgeia r0!, {r1, r3, ip, lr} | ||
154 | - stmgeia r0!, {r1, r3, ip, lr} | ||
155 | - stmgeia r0!, {r1, r3, ip, lr} | ||
156 | + stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time. | ||
157 | + stmgeia ip!, {r1, r3, r8, lr} | ||
158 | + stmgeia ip!, {r1, r3, r8, lr} | ||
159 | + stmgeia ip!, {r1, r3, r8, lr} | ||
160 | bgt 2b | ||
161 | - ldmeqfd sp!, {pc} @ Now <64 bytes to go. | ||
162 | + ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go. | ||
163 | /* | ||
164 | * No need to correct the count; we're only testing bits from now on | ||
165 | */ | ||
166 | tst r2, #32 | ||
167 | - stmneia r0!, {r1, r3, ip, lr} | ||
168 | - stmneia r0!, {r1, r3, ip, lr} | ||
169 | + stmneia ip!, {r1, r3, r8, lr} | ||
170 | + stmneia ip!, {r1, r3, r8, lr} | ||
171 | tst r2, #16 | ||
172 | - stmneia r0!, {r1, r3, ip, lr} | ||
173 | - ldr lr, [sp], #4 | ||
174 | + stmneia ip!, {r1, r3, r8, lr} | ||
175 | + ldmfd sp!, {r8, lr} | ||
176 | |||
177 | #else | ||
178 | |||
179 | @@ -74,54 +77,54 @@ ENTRY(memset) | ||
180 | * whole cache lines at once. | ||
181 | */ | ||
182 | |||
183 | - stmfd sp!, {r4-r7, lr} | ||
184 | + stmfd sp!, {r4-r8, lr} | ||
185 | mov r4, r1 | ||
186 | mov r5, r1 | ||
187 | mov r6, r1 | ||
188 | mov r7, r1 | ||
189 | - mov ip, r1 | ||
190 | + mov r8, r1 | ||
191 | mov lr, r1 | ||
192 | |||
193 | cmp r2, #96 | ||
194 | - tstgt r0, #31 | ||
195 | + tstgt ip, #31 | ||
196 | ble 3f | ||
197 | |||
198 | - and ip, r0, #31 | ||
199 | - rsb ip, ip, #32 | ||
200 | - sub r2, r2, ip | ||
201 | - movs ip, ip, lsl #(32 - 4) | ||
202 | - stmcsia r0!, {r4, r5, r6, r7} | ||
203 | - stmmiia r0!, {r4, r5} | ||
204 | - tst ip, #(1 << 30) | ||
205 | - mov ip, r1 | ||
206 | - strne r1, [r0], #4 | ||
207 | + and r8, ip, #31 | ||
208 | + rsb r8, r8, #32 | ||
209 | + sub r2, r2, r8 | ||
210 | + movs r8, r8, lsl #(32 - 4) | ||
211 | + stmcsia ip!, {r4, r5, r6, r7} | ||
212 | + stmmiia ip!, {r4, r5} | ||
213 | + tst r8, #(1 << 30) | ||
214 | + mov r8, r1 | ||
215 | + strne r1, [ip], #4 | ||
216 | |||
217 | 3: subs r2, r2, #64 | ||
218 | - stmgeia r0!, {r1, r3-r7, ip, lr} | ||
219 | - stmgeia r0!, {r1, r3-r7, ip, lr} | ||
220 | + stmgeia ip!, {r1, r3-r8, lr} | ||
221 | + stmgeia ip!, {r1, r3-r8, lr} | ||
222 | bgt 3b | ||
223 | - ldmeqfd sp!, {r4-r7, pc} | ||
224 | + ldmeqfd sp!, {r4-r8, pc} | ||
225 | |||
226 | tst r2, #32 | ||
227 | - stmneia r0!, {r1, r3-r7, ip, lr} | ||
228 | + stmneia ip!, {r1, r3-r8, lr} | ||
229 | tst r2, #16 | ||
230 | - stmneia r0!, {r4-r7} | ||
231 | - ldmfd sp!, {r4-r7, lr} | ||
232 | + stmneia ip!, {r4-r7} | ||
233 | + ldmfd sp!, {r4-r8, lr} | ||
234 | |||
235 | #endif | ||
236 | |||
237 | 4: tst r2, #8 | ||
238 | - stmneia r0!, {r1, r3} | ||
239 | + stmneia ip!, {r1, r3} | ||
240 | tst r2, #4 | ||
241 | - strne r1, [r0], #4 | ||
242 | + strne r1, [ip], #4 | ||
243 | /* | ||
244 | * When we get here, we've got less than 4 bytes to zero. We | ||
245 | * may have an unaligned pointer as well. | ||
246 | */ | ||
247 | 5: tst r2, #2 | ||
248 | - strneb r1, [r0], #1 | ||
249 | - strneb r1, [r0], #1 | ||
250 | + strneb r1, [ip], #1 | ||
251 | + strneb r1, [ip], #1 | ||
252 | tst r2, #1 | ||
253 | - strneb r1, [r0], #1 | ||
254 | + strneb r1, [ip], #1 | ||
255 | mov pc, lr | ||
256 | ENDPROC(memset) | ||
257 | -- | ||
258 | 1.8.4.rc3 | ||
259 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch new file mode 100644 index 0000000..b8d6f53 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch | |||
@@ -0,0 +1,87 @@ | |||
1 | From 2ba23fa6c4128febaaf57fe184420a7111caa237 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nicolas Pitre <nicolas.pitre@linaro.org> | ||
3 | Date: Tue, 12 Mar 2013 13:00:42 +0100 | ||
4 | Subject: [PATCH] ARM: 7670/1: fix the memset fix | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by | ||
8 | recent GCC (4.7.2) optimizations") attempted to fix a compliance issue | ||
9 | with the memset return value. However the memset itself became broken | ||
10 | by that patch for misaligned pointers. | ||
11 | |||
12 | This fixes the above by branching over the entry code from the | ||
13 | misaligned fixup code to avoid reloading the original pointer. | ||
14 | |||
15 | Also, because the function entry alignment is wrong in the Thumb mode | ||
16 | compilation, that fixup code is moved to the end. | ||
17 | |||
18 | While at it, the entry instructions are slightly reworked to help dual | ||
19 | issue pipelines. | ||
20 | |||
21 | Upstream-Status: Pending | ||
22 | |||
23 | Signed-off-by: Nicolas Pitre <nico@linaro.org> | ||
24 | Tested-by: Alexander Holler <holler@ahsoftware.de> | ||
25 | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | ||
26 | (cherry picked from commit 418df63adac56841ef6b0f1fcf435bc64d4ed177) | ||
27 | --- | ||
28 | arch/arm/lib/memset.S | 33 +++++++++++++-------------------- | ||
29 | 1 file changed, 13 insertions(+), 20 deletions(-) | ||
30 | |||
31 | diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S | ||
32 | index d912e73..94b0650 100644 | ||
33 | --- a/arch/arm/lib/memset.S | ||
34 | +++ b/arch/arm/lib/memset.S | ||
35 | @@ -14,31 +14,15 @@ | ||
36 | |||
37 | .text | ||
38 | .align 5 | ||
39 | - .word 0 | ||
40 | - | ||
41 | -1: subs r2, r2, #4 @ 1 do we have enough | ||
42 | - blt 5f @ 1 bytes to align with? | ||
43 | - cmp r3, #2 @ 1 | ||
44 | - strltb r1, [ip], #1 @ 1 | ||
45 | - strleb r1, [ip], #1 @ 1 | ||
46 | - strb r1, [ip], #1 @ 1 | ||
47 | - add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) | ||
48 | -/* | ||
49 | - * The pointer is now aligned and the length is adjusted. Try doing the | ||
50 | - * memset again. | ||
51 | - */ | ||
52 | |||
53 | ENTRY(memset) | ||
54 | -/* | ||
55 | - * Preserve the contents of r0 for the return value. | ||
56 | - */ | ||
57 | - mov ip, r0 | ||
58 | - ands r3, ip, #3 @ 1 unaligned? | ||
59 | - bne 1b @ 1 | ||
60 | + ands r3, r0, #3 @ 1 unaligned? | ||
61 | + mov ip, r0 @ preserve r0 as return value | ||
62 | + bne 6f @ 1 | ||
63 | /* | ||
64 | * we know that the pointer in ip is aligned to a word boundary. | ||
65 | */ | ||
66 | - orr r1, r1, r1, lsl #8 | ||
67 | +1: orr r1, r1, r1, lsl #8 | ||
68 | orr r1, r1, r1, lsl #16 | ||
69 | mov r3, r1 | ||
70 | cmp r2, #16 | ||
71 | @@ -127,4 +111,13 @@ ENTRY(memset) | ||
72 | tst r2, #1 | ||
73 | strneb r1, [ip], #1 | ||
74 | mov pc, lr | ||
75 | + | ||
76 | +6: subs r2, r2, #4 @ 1 do we have enough | ||
77 | + blt 5b @ 1 bytes to align with? | ||
78 | + cmp r3, #2 @ 1 | ||
79 | + strltb r1, [ip], #1 @ 1 | ||
80 | + strleb r1, [ip], #1 @ 1 | ||
81 | + strb r1, [ip], #1 @ 1 | ||
82 | + add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) | ||
83 | + b 1b | ||
84 | ENDPROC(memset) | ||
85 | -- | ||
86 | 1.8.4.rc3 | ||
87 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch new file mode 100644 index 0000000..7316351 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch | |||
@@ -0,0 +1,43 @@ | |||
1 | From d8601292ae25e0af47aa4486055221ab44113f0e Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> | ||
3 | Date: Mon, 15 Jul 2013 15:34:54 -0500 | ||
4 | Subject: [PATCH] ENGR00271136 Fix build break when CONFIG_CLK_DEBUG is | ||
5 | disabled | ||
6 | Organization: O.S. Systems Software LTDA. | ||
7 | |||
8 | clk structure member name is defined only when CONFIG_CLK_DEBUG is enabled. | ||
9 | Hence need to encapsulate the code with this config. | ||
10 | |||
11 | Patch received from imx community: | ||
12 | https://community.freescale.com/thread/308482 | ||
13 | |||
14 | Upstream-Status: Pending | ||
15 | |||
16 | Signed-off-by: xiongweihuang | ||
17 | Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> | ||
18 | --- | ||
19 | arch/arm/plat-mxc/clock.c | 4 ++-- | ||
20 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
21 | |||
22 | diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c | ||
23 | index 93347eb..1aa2664 100755 | ||
24 | --- a/arch/arm/plat-mxc/clock.c | ||
25 | +++ b/arch/arm/plat-mxc/clock.c | ||
26 | @@ -58,12 +58,12 @@ static void __clk_disable(struct clk *clk) | ||
27 | { | ||
28 | if (clk == NULL || IS_ERR(clk)) | ||
29 | return; | ||
30 | - | ||
31 | +#ifdef CONFIG_CLK_DEBUG | ||
32 | if (!clk->usecount) { | ||
33 | WARN(1, "clock enable/disable mismatch! clk %s\n", clk->name); | ||
34 | return; | ||
35 | } | ||
36 | - | ||
37 | +#endif | ||
38 | if (!(--clk->usecount)) { | ||
39 | if (clk->disable) | ||
40 | clk->disable(clk); | ||
41 | -- | ||
42 | 1.8.4.rc3 | ||
43 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch new file mode 100644 index 0000000..cb20198 --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch | |||
@@ -0,0 +1,98 @@ | |||
1 | From 538f4bb2f7a51f267395550a5be9f0ab2e426712 Mon Sep 17 00:00:00 2001 | ||
2 | From: Erik Boto <erik.boto@pelagicore.com> | ||
3 | Date: Tue, 16 Jul 2013 12:06:05 -0500 | ||
4 | Subject: [PATCH] ENGR00271359 Add Multi-touch support | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | The previous behavior of the driver did not work properly with Qt5 | ||
8 | QtQuick multi touch-point gestures, due to how touch-points are | ||
9 | reported when removing a touch-point. My interpretation of the | ||
10 | available documentation [1] was that the driver should report all | ||
11 | touch-points between SYN_REPORTs, but it is not explicitly stated so. | ||
12 | I've found another mail-thread [2] where the creator of the protocol | ||
13 | states: | ||
14 | |||
15 | "The protocol defines a generic way of sending a variable amount of | ||
16 | contacts. The contact count is obtained by counting the number of | ||
17 | non-empty finger packets between SYN_REPORT events."-Henrik Rydberg | ||
18 | |||
19 | I think this verifies my assumption that all touch-points should be | ||
20 | reported between SYN_REPORTs, otherwise it can not be used to obtain | ||
21 | the count. | ||
22 | |||
23 | [1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt | ||
24 | [2] http://lists.x.org/archives/xorg-devel/2010-March/006466.html | ||
25 | |||
26 | Upstream-Status: Pending | ||
27 | |||
28 | Signed-off-by: Erik Boto <erik.boto@pelagicore.com> | ||
29 | Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> | ||
30 | (cherry picked from commit 7cba001c5a502680f6dbf902821726779a9c9287) | ||
31 | --- | ||
32 | drivers/input/touchscreen/egalax_ts.c | 36 +++++++++++++++++------------------ | ||
33 | 1 file changed, 18 insertions(+), 18 deletions(-) | ||
34 | |||
35 | diff --git a/drivers/input/touchscreen/egalax_ts.c b/drivers/input/touchscreen/egalax_ts.c | ||
36 | index 0b6cde7..271f820 100644 | ||
37 | --- a/drivers/input/touchscreen/egalax_ts.c | ||
38 | +++ b/drivers/input/touchscreen/egalax_ts.c | ||
39 | @@ -133,7 +133,6 @@ retry: | ||
40 | } | ||
41 | |||
42 | if (down) { | ||
43 | - /* should also report old pointers */ | ||
44 | events[id].valid = valid; | ||
45 | events[id].status = down; | ||
46 | events[id].x = x; | ||
47 | @@ -144,23 +143,6 @@ retry: | ||
48 | input_report_abs(input_dev, ABS_Y, y); | ||
49 | input_event(data->input_dev, EV_KEY, BTN_TOUCH, 1); | ||
50 | input_report_abs(input_dev, ABS_PRESSURE, 1); | ||
51 | -#else | ||
52 | - for (i = 0; i < MAX_SUPPORT_POINTS; i++) { | ||
53 | - if (!events[i].valid) | ||
54 | - continue; | ||
55 | - dev_dbg(&client->dev, "report id:%d valid:%d x:%d y:%d", | ||
56 | - i, valid, x, y); | ||
57 | - | ||
58 | - input_report_abs(input_dev, | ||
59 | - ABS_MT_TRACKING_ID, i); | ||
60 | - input_report_abs(input_dev, | ||
61 | - ABS_MT_TOUCH_MAJOR, 1); | ||
62 | - input_report_abs(input_dev, | ||
63 | - ABS_MT_POSITION_X, events[i].x); | ||
64 | - input_report_abs(input_dev, | ||
65 | - ABS_MT_POSITION_Y, events[i].y); | ||
66 | - input_mt_sync(input_dev); | ||
67 | - } | ||
68 | #endif | ||
69 | } else { | ||
70 | dev_dbg(&client->dev, "release id:%d\n", id); | ||
71 | @@ -176,6 +158,24 @@ retry: | ||
72 | #endif | ||
73 | } | ||
74 | |||
75 | +#ifndef CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH | ||
76 | + /* report all pointers */ | ||
77 | + for (i = 0; i < MAX_SUPPORT_POINTS; i++) { | ||
78 | + if (!events[i].valid) | ||
79 | + continue; | ||
80 | + dev_dbg(&client->dev, "report id:%d valid:%d x:%d y:%d", | ||
81 | + i, valid, x, y); | ||
82 | + input_report_abs(input_dev, | ||
83 | + ABS_MT_TRACKING_ID, i); | ||
84 | + input_report_abs(input_dev, | ||
85 | + ABS_MT_TOUCH_MAJOR, 1); | ||
86 | + input_report_abs(input_dev, | ||
87 | + ABS_MT_POSITION_X, events[i].x); | ||
88 | + input_report_abs(input_dev, | ||
89 | + ABS_MT_POSITION_Y, events[i].y); | ||
90 | + input_mt_sync(input_dev); | ||
91 | + } | ||
92 | +#endif | ||
93 | input_sync(input_dev); | ||
94 | return IRQ_HANDLED; | ||
95 | } | ||
96 | -- | ||
97 | 1.8.4.rc3 | ||
98 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/0006-Add-support-for-DVI-monitors.patch b/recipes-kernel/linux/linux-congatec-3.0.35/0006-Add-support-for-DVI-monitors.patch new file mode 100644 index 0000000..00a6b5c --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/0006-Add-support-for-DVI-monitors.patch | |||
@@ -0,0 +1,227 @@ | |||
1 | From 3e6441d113f72b412081a2c87f39011e4c253a35 Mon Sep 17 00:00:00 2001 | ||
2 | From: Robert Winkler <robert.winkler@boundarydevices.com> | ||
3 | Date: Fri, 19 Jul 2013 19:00:41 -0700 | ||
4 | Subject: [PATCH] Add support for DVI monitors | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | Upstream-Status: Pending | ||
8 | |||
9 | Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com> | ||
10 | --- | ||
11 | arch/arm/plat-mxc/include/mach/mxc_hdmi.h | 7 +++ | ||
12 | drivers/video/mxc_hdmi.c | 98 +++++++++++++------------------ | ||
13 | 2 files changed, 49 insertions(+), 56 deletions(-) | ||
14 | |||
15 | diff --git a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h | ||
16 | index 94f7638..af59c62 100644 | ||
17 | --- a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h | ||
18 | +++ b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h | ||
19 | @@ -605,6 +605,10 @@ enum { | ||
20 | HDMI_IH_MUTE_PHY_STAT0_TX_PHY_LOCK = 0x2, | ||
21 | HDMI_IH_MUTE_PHY_STAT0_HPD = 0x1, | ||
22 | |||
23 | +/* IH and IH_MUTE convenience macro RX_SENSE | HPD*/ | ||
24 | + HDMI_DVI_IH_STAT = 0x3D, | ||
25 | + | ||
26 | + | ||
27 | /* IH_AHBDMAAUD_STAT0 field values */ | ||
28 | HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20, | ||
29 | HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10, | ||
30 | @@ -903,6 +907,9 @@ enum { | ||
31 | HDMI_PHY_HPD = 0x02, | ||
32 | HDMI_PHY_TX_PHY_LOCK = 0x01, | ||
33 | |||
34 | +/* HDMI STAT convenience RX_SENSE | HPD */ | ||
35 | + HDMI_DVI_STAT = 0xF2, | ||
36 | + | ||
37 | /* PHY_I2CM_SLAVE_ADDR field values */ | ||
38 | HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69, | ||
39 | HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49, | ||
40 | diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c | ||
41 | index c5069aa..544f352 100644 | ||
42 | --- a/drivers/video/mxc_hdmi.c | ||
43 | +++ b/drivers/video/mxc_hdmi.c | ||
44 | @@ -180,7 +180,6 @@ struct mxc_hdmi { | ||
45 | bool dft_mode_set; | ||
46 | char *dft_mode_str; | ||
47 | int default_bpp; | ||
48 | - u8 latest_intr_stat; | ||
49 | bool irq_enabled; | ||
50 | spinlock_t irq_lock; | ||
51 | bool phy_enabled; | ||
52 | @@ -1996,58 +1995,48 @@ static void hotplug_worker(struct work_struct *work) | ||
53 | struct delayed_work *delay_work = to_delayed_work(work); | ||
54 | struct mxc_hdmi *hdmi = | ||
55 | container_of(delay_work, struct mxc_hdmi, hotplug_work); | ||
56 | - u32 phy_int_stat, phy_int_pol, phy_int_mask; | ||
57 | - u8 val; | ||
58 | + u32 hdmi_phy_stat0, hdmi_phy_pol0, hdmi_phy_mask0; | ||
59 | unsigned long flags; | ||
60 | char event_string[32]; | ||
61 | char *envp[] = { event_string, NULL }; | ||
62 | |||
63 | - phy_int_stat = hdmi->latest_intr_stat; | ||
64 | - phy_int_pol = hdmi_readb(HDMI_PHY_POL0); | ||
65 | |||
66 | - dev_dbg(&hdmi->pdev->dev, "phy_int_stat=0x%x, phy_int_pol=0x%x\n", | ||
67 | - phy_int_stat, phy_int_pol); | ||
68 | + hdmi_phy_stat0 = hdmi_readb(HDMI_PHY_STAT0); | ||
69 | + hdmi_phy_pol0 = hdmi_readb(HDMI_PHY_POL0); | ||
70 | + | ||
71 | + dev_dbg(&hdmi->pdev->dev, "hdmi_phy_stat0=0x%x, hdmi_phy_pol0=0x%x\n", | ||
72 | + hdmi_phy_stat0, hdmi_phy_pol0); | ||
73 | + | ||
74 | + /* Make HPD intr active low to capture unplug event or | ||
75 | + * active high to capture plugin event */ | ||
76 | + hdmi_writeb((HDMI_DVI_STAT & ~hdmi_phy_stat0), HDMI_PHY_POL0); | ||
77 | |||
78 | /* check cable status */ | ||
79 | - if (phy_int_stat & HDMI_IH_PHY_STAT0_HPD) { | ||
80 | - /* cable connection changes */ | ||
81 | - if (phy_int_pol & HDMI_PHY_HPD) { | ||
82 | - /* Plugin event */ | ||
83 | - dev_dbg(&hdmi->pdev->dev, "EVENT=plugin\n"); | ||
84 | - mxc_hdmi_cable_connected(hdmi); | ||
85 | - | ||
86 | - /* Make HPD intr active low to capture unplug event */ | ||
87 | - val = hdmi_readb(HDMI_PHY_POL0); | ||
88 | - val &= ~HDMI_PHY_HPD; | ||
89 | - hdmi_writeb(val, HDMI_PHY_POL0); | ||
90 | - | ||
91 | - sprintf(event_string, "EVENT=plugin"); | ||
92 | - kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp); | ||
93 | + if (hdmi_phy_stat0 & HDMI_DVI_STAT) { | ||
94 | + /* Plugin event */ | ||
95 | + dev_dbg(&hdmi->pdev->dev, "EVENT=plugin\n"); | ||
96 | + mxc_hdmi_cable_connected(hdmi); | ||
97 | + | ||
98 | + sprintf(event_string, "EVENT=plugin"); | ||
99 | + kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp); | ||
100 | #ifdef CONFIG_MXC_HDMI_CEC | ||
101 | - mxc_hdmi_cec_handle(0x80); | ||
102 | + mxc_hdmi_cec_handle(0x80); | ||
103 | #endif | ||
104 | - hdmi_set_cable_state(1); | ||
105 | - | ||
106 | - } else if (!(phy_int_pol & HDMI_PHY_HPD)) { | ||
107 | - /* Plugout event */ | ||
108 | - dev_dbg(&hdmi->pdev->dev, "EVENT=plugout\n"); | ||
109 | - hdmi_set_cable_state(0); | ||
110 | - mxc_hdmi_abort_stream(); | ||
111 | - mxc_hdmi_cable_disconnected(hdmi); | ||
112 | + hdmi_set_cable_state(1); | ||
113 | |||
114 | - /* Make HPD intr active high to capture plugin event */ | ||
115 | - val = hdmi_readb(HDMI_PHY_POL0); | ||
116 | - val |= HDMI_PHY_HPD; | ||
117 | - hdmi_writeb(val, HDMI_PHY_POL0); | ||
118 | + } else { | ||
119 | + /* Plugout event */ | ||
120 | + dev_dbg(&hdmi->pdev->dev, "EVENT=plugout\n"); | ||
121 | + hdmi_set_cable_state(0); | ||
122 | + mxc_hdmi_abort_stream(); | ||
123 | + mxc_hdmi_cable_disconnected(hdmi); | ||
124 | |||
125 | - sprintf(event_string, "EVENT=plugout"); | ||
126 | - kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp); | ||
127 | + sprintf(event_string, "EVENT=plugout"); | ||
128 | + kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp); | ||
129 | #ifdef CONFIG_MXC_HDMI_CEC | ||
130 | - mxc_hdmi_cec_handle(0x100); | ||
131 | + mxc_hdmi_cec_handle(0x100); | ||
132 | #endif | ||
133 | |||
134 | - } else | ||
135 | - dev_dbg(&hdmi->pdev->dev, "EVENT=none?\n"); | ||
136 | } | ||
137 | |||
138 | /* Lock here to ensure full powerdown sequence | ||
139 | @@ -2055,12 +2044,12 @@ static void hotplug_worker(struct work_struct *work) | ||
140 | spin_lock_irqsave(&hdmi->irq_lock, flags); | ||
141 | |||
142 | /* Re-enable HPD interrupts */ | ||
143 | - phy_int_mask = hdmi_readb(HDMI_PHY_MASK0); | ||
144 | - phy_int_mask &= ~HDMI_PHY_HPD; | ||
145 | - hdmi_writeb(phy_int_mask, HDMI_PHY_MASK0); | ||
146 | + hdmi_phy_mask0 = hdmi_readb(HDMI_PHY_MASK0); | ||
147 | + hdmi_phy_mask0 &= ~HDMI_DVI_STAT; | ||
148 | + hdmi_writeb(hdmi_phy_mask0, HDMI_PHY_MASK0); | ||
149 | |||
150 | /* Unmute interrupts */ | ||
151 | - hdmi_writeb(~HDMI_IH_MUTE_PHY_STAT0_HPD, HDMI_IH_MUTE_PHY_STAT0); | ||
152 | + hdmi_writeb(~HDMI_DVI_IH_STAT, HDMI_IH_MUTE_PHY_STAT0); | ||
153 | |||
154 | if (hdmi_readb(HDMI_IH_FC_STAT2) & HDMI_IH_FC_STAT2_OVERFLOW_MASK) | ||
155 | mxc_hdmi_clear_overflow(); | ||
156 | @@ -2086,7 +2075,7 @@ static void hdcp_hdp_worker(struct work_struct *work) | ||
157 | static irqreturn_t mxc_hdmi_hotplug(int irq, void *data) | ||
158 | { | ||
159 | struct mxc_hdmi *hdmi = data; | ||
160 | - u8 val, intr_stat; | ||
161 | + u8 val; | ||
162 | unsigned long flags; | ||
163 | |||
164 | spin_lock_irqsave(&hdmi->irq_lock, flags); | ||
165 | @@ -2108,25 +2097,22 @@ static irqreturn_t mxc_hdmi_hotplug(int irq, void *data) | ||
166 | * HDMI registers. | ||
167 | */ | ||
168 | /* Capture status - used in hotplug_worker ISR */ | ||
169 | - intr_stat = hdmi_readb(HDMI_IH_PHY_STAT0); | ||
170 | - | ||
171 | - if (intr_stat & HDMI_IH_PHY_STAT0_HPD) { | ||
172 | + if (hdmi_readb(HDMI_IH_PHY_STAT0) & HDMI_DVI_IH_STAT) { | ||
173 | |||
174 | dev_dbg(&hdmi->pdev->dev, "Hotplug interrupt received\n"); | ||
175 | - hdmi->latest_intr_stat = intr_stat; | ||
176 | |||
177 | /* Mute interrupts until handled */ | ||
178 | |||
179 | val = hdmi_readb(HDMI_IH_MUTE_PHY_STAT0); | ||
180 | - val |= HDMI_IH_MUTE_PHY_STAT0_HPD; | ||
181 | + val |= HDMI_DVI_IH_STAT; | ||
182 | hdmi_writeb(val, HDMI_IH_MUTE_PHY_STAT0); | ||
183 | |||
184 | val = hdmi_readb(HDMI_PHY_MASK0); | ||
185 | - val |= HDMI_PHY_HPD; | ||
186 | + val |= HDMI_DVI_STAT; | ||
187 | hdmi_writeb(val, HDMI_PHY_MASK0); | ||
188 | |||
189 | /* Clear Hotplug interrupts */ | ||
190 | - hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); | ||
191 | + hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0); | ||
192 | |||
193 | schedule_delayed_work(&(hdmi->hotplug_work), msecs_to_jiffies(20)); | ||
194 | } | ||
195 | @@ -2282,13 +2268,13 @@ static void mxc_hdmi_fb_registered(struct mxc_hdmi *hdmi) | ||
196 | HDMI_PHY_I2CM_CTLINT_ADDR); | ||
197 | |||
198 | /* enable cable hot plug irq */ | ||
199 | - hdmi_writeb((u8)~HDMI_PHY_HPD, HDMI_PHY_MASK0); | ||
200 | + hdmi_writeb((u8)~HDMI_DVI_STAT, HDMI_PHY_MASK0); | ||
201 | |||
202 | /* Clear Hotplug interrupts */ | ||
203 | - hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); | ||
204 | + hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0); | ||
205 | |||
206 | /* Unmute interrupts */ | ||
207 | - hdmi_writeb(~HDMI_IH_MUTE_PHY_STAT0_HPD, HDMI_IH_MUTE_PHY_STAT0); | ||
208 | + hdmi_writeb(~HDMI_DVI_IH_STAT, HDMI_IH_MUTE_PHY_STAT0); | ||
209 | |||
210 | hdmi->fb_reg = true; | ||
211 | |||
212 | @@ -2522,10 +2508,10 @@ static int mxc_hdmi_disp_init(struct mxc_dispdrv_handle *disp, | ||
213 | |||
214 | /* Configure registers related to HDMI interrupt | ||
215 | * generation before registering IRQ. */ | ||
216 | - hdmi_writeb(HDMI_PHY_HPD, HDMI_PHY_POL0); | ||
217 | + hdmi_writeb(HDMI_DVI_STAT, HDMI_PHY_POL0); | ||
218 | |||
219 | /* Clear Hotplug interrupts */ | ||
220 | - hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); | ||
221 | + hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0); | ||
222 | |||
223 | hdmi->nb.notifier_call = mxc_hdmi_fb_event; | ||
224 | ret = fb_register_client(&hdmi->nb); | ||
225 | -- | ||
226 | 1.8.4.rc3 | ||
227 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch b/recipes-kernel/linux/linux-congatec-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch new file mode 100644 index 0000000..1e039fd --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch | |||
@@ -0,0 +1,6261 @@ | |||
1 | From 2e575255b8c53d3cfe2af068411696fe3c40debb Mon Sep 17 00:00:00 2001 | ||
2 | From: Loren Huang <b02279@freescale.com> | ||
3 | Date: Mon, 2 Sep 2013 12:16:48 +0800 | ||
4 | Subject: [PATCH 01/16] ENGR00278350 gpu:viante 4.6.9p13 kernel part | ||
5 | integration | ||
6 | |||
7 | Integrated 4.6.9p13 kernel part change. | ||
8 | This integration is mainly for android test. | ||
9 | Linux test will be focused on 3.10 kernel. | ||
10 | |||
11 | Signed-off-by: Loren HUANG <b02279@freescale.com> | ||
12 | Acked-by: Shawn Guo | ||
13 | --- | ||
14 | drivers/mxc/gpu-viv/Kbuild | 33 +- | ||
15 | .../GC350/hal/kernel/gc_hal_kernel_hardware_vg.c | 177 ++-- | ||
16 | .../GC350/hal/kernel/gc_hal_kernel_hardware_vg.h | 9 +- | ||
17 | .../arch/XAQ2/hal/kernel/gc_hal_kernel_context.c | 8 +- | ||
18 | .../arch/XAQ2/hal/kernel/gc_hal_kernel_context.h | 13 + | ||
19 | .../arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c | 736 ++++++++++++- | ||
20 | .../arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h | 1 + | ||
21 | drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c | 125 ++- | ||
22 | drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h | 24 +- | ||
23 | .../mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c | 57 ++ | ||
24 | .../gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c | 45 +- | ||
25 | drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c | 12 + | ||
26 | .../mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c | 29 + | ||
27 | .../hal/kernel/gc_hal_kernel_interrupt_vg.c | 3 + | ||
28 | drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c | 8 +- | ||
29 | .../hal/kernel/gc_hal_kernel_video_memory.c | 20 +- | ||
30 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h | 84 +- | ||
31 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h | 172 +++- | ||
32 | .../mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h | 142 ++- | ||
33 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h | 37 + | ||
34 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h | 46 +- | ||
35 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h | 125 ++- | ||
36 | .../mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | 86 +- | ||
37 | .../mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h | 1078 +++----------------- | ||
38 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h | 48 + | ||
39 | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h | 79 +- | ||
40 | .../mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h | 2 +- | ||
41 | .../hal/os/linux/kernel/gc_hal_kernel_device.c | 17 +- | ||
42 | .../hal/os/linux/kernel/gc_hal_kernel_device.h | 16 +- | ||
43 | .../hal/os/linux/kernel/gc_hal_kernel_driver.c | 99 +- | ||
44 | .../gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c | 655 ++++++++++-- | ||
45 | .../hal/os/linux/kernel/gc_hal_kernel_sync.c | 174 ++++ | ||
46 | .../hal/os/linux/kernel/gc_hal_kernel_sync.h | 71 ++ | ||
47 | 33 files changed, 2974 insertions(+), 1257 deletions(-) | ||
48 | create mode 100644 drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c | ||
49 | create mode 100644 drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h | ||
50 | |||
51 | diff --git a/drivers/mxc/gpu-viv/Kbuild b/drivers/mxc/gpu-viv/Kbuild | ||
52 | index 93b1259..2b277d6 100644 | ||
53 | --- a/drivers/mxc/gpu-viv/Kbuild | ||
54 | +++ b/drivers/mxc/gpu-viv/Kbuild | ||
55 | @@ -45,8 +45,6 @@ OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \ | ||
56 | $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \ | ||
57 | $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o | ||
58 | |||
59 | -ifeq ($(USE_3D_VG), 1) | ||
60 | - | ||
61 | OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \ | ||
62 | $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \ | ||
63 | $(HAL_KERNEL_DIR)/gc_hal_kernel_db.o \ | ||
64 | @@ -69,19 +67,9 @@ OBJS +=\ | ||
65 | $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_command_vg.o\ | ||
66 | $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_vg.o | ||
67 | endif | ||
68 | -else | ||
69 | - | ||
70 | -OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \ | ||
71 | - $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \ | ||
72 | - $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \ | ||
73 | - $(HAL_KERNEL_DIR)/gc_hal_kernel_interrupt.o \ | ||
74 | - $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \ | ||
75 | - $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o \ | ||
76 | - $(OS_KERNEL_DIR)/gc_hal_kernel_debug.o | ||
77 | - | ||
78 | -OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o \ | ||
79 | - $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware_command.o | ||
80 | |||
81 | +ifneq ($(CONFIG_SYNC),) | ||
82 | +OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o | ||
83 | endif | ||
84 | |||
85 | ifeq ($(KERNELRELEASE), ) | ||
86 | @@ -129,23 +117,16 @@ ifeq ($(CONFIG_DOVE_GPU), 1) | ||
87 | EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1 | ||
88 | endif | ||
89 | |||
90 | -ifeq ($(USE_POWER_MANAGEMENT), 1) | ||
91 | -EXTRA_CFLAGS += -DgcdPOWER_MANAGEMENT=1 | ||
92 | -else | ||
93 | -EXTRA_CFLAGS += -DgcdPOWER_MANAGEMENT=0 | ||
94 | -endif | ||
95 | - | ||
96 | ifneq ($(USE_PLATFORM_DRIVER), 0) | ||
97 | EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1 | ||
98 | else | ||
99 | EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0 | ||
100 | endif | ||
101 | |||
102 | -ifeq ($(USE_PROFILER), 1) | ||
103 | + | ||
104 | EXTRA_CFLAGS += -DVIVANTE_PROFILER=1 | ||
105 | -else | ||
106 | -EXTRA_CFLAGS += -DVIVANTE_PROFILER=0 | ||
107 | -endif | ||
108 | +EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1 | ||
109 | + | ||
110 | |||
111 | ifeq ($(ANDROID), 1) | ||
112 | EXTRA_CFLAGS += -DANDROID=1 | ||
113 | @@ -235,6 +216,10 @@ ifeq ($(USE_BANK_ALIGNMENT), 1) | ||
114 | endif | ||
115 | endif | ||
116 | |||
117 | +ifneq ($(CONFIG_SYNC),) | ||
118 | +EXTRA_CFLAGS += -DgcdANDROID_NATIVE_FENCE_SYNC=1 | ||
119 | +endif | ||
120 | + | ||
121 | EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc | ||
122 | EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel | ||
123 | EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel | ||
124 | diff --git a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c | ||
125 | index 70c2cd6..a17d2fd 100644 | ||
126 | --- a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c | ||
127 | +++ b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c | ||
128 | @@ -217,50 +217,17 @@ _IdentifyHardware( | ||
129 | return status; | ||
130 | } | ||
131 | |||
132 | -static gctTHREADFUNCRESULT gctTHREADFUNCTYPE | ||
133 | -_TimeIdleThread( | ||
134 | - gctTHREADFUNCPARAMETER ThreadParameter | ||
135 | +#if gcdPOWEROFF_TIMEOUT | ||
136 | +void | ||
137 | +_VGPowerTimerFunction( | ||
138 | + gctPOINTER Data | ||
139 | ) | ||
140 | { | ||
141 | - gctUINT32 currentTime = 0; | ||
142 | - gctBOOL isAfter = gcvFALSE; | ||
143 | - gceCHIPPOWERSTATE state; | ||
144 | - | ||
145 | - /* Cast the object. */ | ||
146 | - gckVGHARDWARE hardware = (gckVGHARDWARE) ThreadParameter; | ||
147 | - | ||
148 | - while(gcvTRUE) | ||
149 | - { | ||
150 | - gcmkVERIFY_OK(gckOS_WaitSignal(hardware->os, | ||
151 | - hardware->idleSignal, gcvINFINITE)); | ||
152 | - | ||
153 | - if (hardware->killThread) | ||
154 | - { | ||
155 | - break; | ||
156 | - } | ||
157 | - | ||
158 | - do | ||
159 | - { | ||
160 | - gcmkVERIFY_OK(gckOS_GetTicks(¤tTime)); | ||
161 | - | ||
162 | - gcmkVERIFY_OK( | ||
163 | - gckOS_TicksAfter(currentTime, hardware->powerOffTime, &isAfter)); | ||
164 | - | ||
165 | - if (isAfter) | ||
166 | - { | ||
167 | - gcmkVERIFY_OK(gckVGHARDWARE_SetPowerManagementState( | ||
168 | - hardware, gcvPOWER_OFF_BROADCAST)); | ||
169 | - } | ||
170 | - | ||
171 | - gcmkVERIFY_OK(gckOS_Delay(hardware->os, 200)); | ||
172 | - | ||
173 | - gcmkVERIFY_OK(gckVGHARDWARE_QueryPowerManagementState( | ||
174 | - hardware, &state)); | ||
175 | - | ||
176 | - } while (state == gcvPOWER_IDLE); | ||
177 | - } | ||
178 | - return 0; | ||
179 | + gckVGHARDWARE hardware = (gckVGHARDWARE)Data; | ||
180 | + gcmkVERIFY_OK( | ||
181 | + gckVGHARDWARE_SetPowerManagementState(hardware, gcvPOWER_OFF_TIMEOUT)); | ||
182 | } | ||
183 | +#endif | ||
184 | |||
185 | /******************************************************************************\ | ||
186 | ****************************** gckVGHARDWARE API code ***************************** | ||
187 | @@ -338,15 +305,21 @@ gckVGHARDWARE_Construct( | ||
188 | hardware->chipMinorFeatures2 = chipMinorFeatures2; | ||
189 | |||
190 | hardware->powerMutex = gcvNULL; | ||
191 | - hardware->idleSignal = gcvNULL; | ||
192 | hardware->chipPowerState = gcvPOWER_ON; | ||
193 | hardware->chipPowerStateGlobal = gcvPOWER_ON; | ||
194 | hardware->clockState = gcvTRUE; | ||
195 | hardware->powerState = gcvTRUE; | ||
196 | - hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT; | ||
197 | + | ||
198 | hardware->powerOffTime = 0; | ||
199 | - hardware->timeIdleThread = gcvNULL; | ||
200 | - hardware->killThread = gcvFALSE; | ||
201 | +#if gcdPOWEROFF_TIMEOUT | ||
202 | + hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT; | ||
203 | + | ||
204 | + gcmkVERIFY_OK(gckOS_CreateTimer(Os, | ||
205 | + _VGPowerTimerFunction, | ||
206 | + (gctPOINTER)hardware, | ||
207 | + &hardware->powerOffTimer)); | ||
208 | +#endif | ||
209 | + | ||
210 | /* Determine whether FE 2.0 is present. */ | ||
211 | hardware->fe20 = ((((gctUINT32) (hardware->chipFeatures)) >> (0 ? 28:28) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1))))))); | ||
212 | |||
213 | @@ -365,18 +338,10 @@ gckVGHARDWARE_Construct( | ||
214 | gcmkVERIFY_OK(gckVGHARDWARE_SetFastClear(hardware, -1)); | ||
215 | |||
216 | gcmkERR_BREAK(gckOS_CreateMutex(Os, &hardware->powerMutex)); | ||
217 | - gcmkERR_BREAK(gckOS_CreateSignal(Os, gcvFALSE, &hardware->idleSignal)); | ||
218 | |||
219 | /* Enable power management by default. */ | ||
220 | hardware->powerManagement = gcvTRUE; | ||
221 | |||
222 | - gcmkERR_BREAK(gckOS_StartThread( | ||
223 | - hardware->os, | ||
224 | - _TimeIdleThread, | ||
225 | - hardware, | ||
226 | - &hardware->timeIdleThread | ||
227 | - )); | ||
228 | - | ||
229 | /* Return pointer to the gckVGHARDWARE object. */ | ||
230 | *Hardware = hardware; | ||
231 | |||
232 | @@ -386,6 +351,14 @@ gckVGHARDWARE_Construct( | ||
233 | } | ||
234 | while (gcvFALSE); | ||
235 | |||
236 | +#if gcdPOWEROFF_TIMEOUT | ||
237 | + if (hardware->powerOffTimer != gcvNULL) | ||
238 | + { | ||
239 | + gcmkVERIFY_OK(gckOS_StopTimer(Os, hardware->powerOffTimer)); | ||
240 | + gcmkVERIFY_OK(gckOS_DestroyTimer(Os, hardware->powerOffTimer)); | ||
241 | + } | ||
242 | +#endif | ||
243 | + | ||
244 | if (hardware->pageTableDirty != gcvNULL) | ||
245 | { | ||
246 | gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pageTableDirty)); | ||
247 | @@ -428,10 +401,6 @@ gckVGHARDWARE_Destroy( | ||
248 | /* Verify the arguments. */ | ||
249 | gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); | ||
250 | |||
251 | - Hardware->killThread = gcvTRUE; | ||
252 | - gcmkVERIFY_OK(gckOS_Signal(Hardware->os, Hardware->idleSignal, gcvTRUE)); | ||
253 | - gcmkVERIFY_OK(gckOS_StopThread(Hardware->os, Hardware->timeIdleThread)); | ||
254 | - | ||
255 | /* Mark the object as unknown. */ | ||
256 | Hardware->object.type = gcvOBJ_UNKNOWN; | ||
257 | |||
258 | @@ -441,11 +410,10 @@ gckVGHARDWARE_Destroy( | ||
259 | Hardware->os, Hardware->powerMutex)); | ||
260 | } | ||
261 | |||
262 | - if (Hardware->idleSignal != gcvNULL) | ||
263 | - { | ||
264 | - gcmkVERIFY_OK(gckOS_DestroySignal( | ||
265 | - Hardware->os, Hardware->idleSignal)); | ||
266 | - } | ||
267 | +#if gcdPOWEROFF_TIMEOUT | ||
268 | + gcmkVERIFY_OK(gckOS_StopTimer(Hardware->os, Hardware->powerOffTimer)); | ||
269 | + gcmkVERIFY_OK(gckOS_DestroyTimer(Hardware->os, Hardware->powerOffTimer)); | ||
270 | +#endif | ||
271 | |||
272 | if (Hardware->pageTableDirty != gcvNULL) | ||
273 | { | ||
274 | @@ -1510,11 +1478,15 @@ gckVGHARDWARE_SetPowerManagementState( | ||
275 | gctBOOL commitMutex = gcvFALSE; | ||
276 | gctBOOL mutexAcquired = gcvFALSE; | ||
277 | |||
278 | +#if gcdPOWEROFF_TIMEOUT | ||
279 | + gctBOOL timeout = gcvFALSE; | ||
280 | + gctBOOL isAfter = gcvFALSE; | ||
281 | + gctUINT32 currentTime; | ||
282 | +#endif | ||
283 | + | ||
284 | gctBOOL broadcast = gcvFALSE; | ||
285 | gctUINT32 process, thread; | ||
286 | gctBOOL global = gcvFALSE; | ||
287 | - gctUINT32 currentTime; | ||
288 | - | ||
289 | |||
290 | #if gcdENABLE_PROFILING | ||
291 | gctUINT64 time, freq, mutexTime, onTime, stallTime, stopTime, delayTime, | ||
292 | @@ -1661,6 +1633,16 @@ gckVGHARDWARE_SetPowerManagementState( | ||
293 | global = gcvTRUE; | ||
294 | break; | ||
295 | |||
296 | +#if gcdPOWEROFF_TIMEOUT | ||
297 | + case gcvPOWER_OFF_TIMEOUT: | ||
298 | + /* Convert to OFF and note we are inside broadcast. */ | ||
299 | + State = gcvPOWER_OFF; | ||
300 | + broadcast = gcvTRUE; | ||
301 | + /* Check time out */ | ||
302 | + timeout = gcvTRUE; | ||
303 | + break; | ||
304 | +#endif | ||
305 | + | ||
306 | default: | ||
307 | break; | ||
308 | } | ||
309 | @@ -1719,6 +1701,31 @@ gckVGHARDWARE_SetPowerManagementState( | ||
310 | flag = flags[Hardware->chipPowerState][State]; | ||
311 | /*clock = clocks[State];*/ | ||
312 | |||
313 | +#if gcdPOWEROFF_TIMEOUT | ||
314 | + if (timeout) | ||
315 | + { | ||
316 | + gcmkONERROR(gckOS_GetTicks(¤tTime)); | ||
317 | + | ||
318 | + gcmkONERROR( | ||
319 | + gckOS_TicksAfter(Hardware->powerOffTime, currentTime, &isAfter)); | ||
320 | + | ||
321 | + /* powerOffTime is pushed forward, give up.*/ | ||
322 | + if (isAfter | ||
323 | + /* Expect a transition start from IDLE. */ | ||
324 | + || (Hardware->chipPowerState == gcvPOWER_ON) | ||
325 | + || (Hardware->chipPowerState == gcvPOWER_OFF) | ||
326 | + ) | ||
327 | + { | ||
328 | + /* Release the power mutex. */ | ||
329 | + gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex)); | ||
330 | + | ||
331 | + /* No need to do anything. */ | ||
332 | + gcmkFOOTER_NO(); | ||
333 | + return gcvSTATUS_OK; | ||
334 | + } | ||
335 | + } | ||
336 | +#endif | ||
337 | + | ||
338 | if (flag == 0) | ||
339 | { | ||
340 | /* Release the power mutex. */ | ||
341 | @@ -1742,6 +1749,18 @@ gckVGHARDWARE_SetPowerManagementState( | ||
342 | return gcvSTATUS_OK; | ||
343 | } | ||
344 | } | ||
345 | + else | ||
346 | + { | ||
347 | + if (flag & gcvPOWER_FLAG_ACQUIRE) | ||
348 | + { | ||
349 | + /* Acquire the power management semaphore. */ | ||
350 | + gcmkONERROR(gckOS_AcquireSemaphore(os, command->powerSemaphore)); | ||
351 | + acquired = gcvTRUE; | ||
352 | + | ||
353 | + /* avoid acquiring again. */ | ||
354 | + flag &= ~gcvPOWER_FLAG_ACQUIRE; | ||
355 | + } | ||
356 | + } | ||
357 | |||
358 | if (flag & (gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_CLOCK_ON)) | ||
359 | { | ||
360 | @@ -1858,14 +1877,6 @@ gckVGHARDWARE_SetPowerManagementState( | ||
361 | Hardware->chipPowerStateGlobal = State; | ||
362 | } | ||
363 | |||
364 | - if (State == gcvPOWER_IDLE) | ||
365 | - { | ||
366 | - gcmkVERIFY_OK(gckOS_Signal(os, Hardware->idleSignal, gcvTRUE)); | ||
367 | - } | ||
368 | - /* Reset power off time */ | ||
369 | - gcmkVERIFY_OK(gckOS_GetTicks(¤tTime)); | ||
370 | - Hardware->powerOffTime = currentTime + Hardware->powerOffTimeout; | ||
371 | - | ||
372 | if (commitMutex) | ||
373 | { | ||
374 | /* Acquire the mutex. */ | ||
375 | @@ -1875,6 +1886,28 @@ gckVGHARDWARE_SetPowerManagementState( | ||
376 | )); | ||
377 | } | ||
378 | |||
379 | +#if gcdPOWEROFF_TIMEOUT | ||
380 | + /* Reset power off time */ | ||
381 | + gcmkONERROR(gckOS_GetTicks(¤tTime)); | ||
382 | + | ||
383 | + Hardware->powerOffTime = currentTime + Hardware->powerOffTimeout; | ||
384 | + | ||
385 | + if (State == gcvPOWER_IDLE) | ||
386 | + { | ||
387 | + /* Start a timer to power off GPU when GPU enters IDLE or SUSPEND. */ | ||
388 | + gcmkVERIFY_OK(gckOS_StartTimer(os, | ||
389 | + Hardware->powerOffTimer, | ||
390 | + Hardware->powerOffTimeout)); | ||
391 | + } | ||
392 | + else | ||
393 | + { | ||
394 | + gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "Cancel powerOfftimer"); | ||
395 | + | ||
396 | + /* Cancel running timer when GPU enters ON or OFF. */ | ||
397 | + gcmkVERIFY_OK(gckOS_StopTimer(os, Hardware->powerOffTimer)); | ||
398 | + } | ||
399 | +#endif | ||
400 | + | ||
401 | /* Release the power mutex. */ | ||
402 | gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex)); | ||
403 | |||
404 | diff --git a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h | ||
405 | index 16b81ae..73d4594 100644 | ||
406 | --- a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h | ||
407 | +++ b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h | ||
408 | @@ -53,7 +53,6 @@ struct _gckVGHARDWARE | ||
409 | gctBOOL clockState; | ||
410 | gctBOOL powerState; | ||
411 | gctPOINTER powerMutex; | ||
412 | - gctSIGNAL idleSignal; | ||
413 | gctUINT32 powerProcess; | ||
414 | gctUINT32 powerThread; | ||
415 | gceCHIPPOWERSTATE chipPowerState; | ||
416 | @@ -61,11 +60,13 @@ struct _gckVGHARDWARE | ||
417 | gctISRMANAGERFUNC startIsr; | ||
418 | gctISRMANAGERFUNC stopIsr; | ||
419 | gctPOINTER isrContext; | ||
420 | + gctPOINTER pageTableDirty; | ||
421 | + | ||
422 | +#if gcdPOWEROFF_TIMEOUT | ||
423 | gctUINT32 powerOffTime; | ||
424 | gctUINT32 powerOffTimeout; | ||
425 | - gctTHREAD timeIdleThread; | ||
426 | - gctBOOL killThread; | ||
427 | - gctPOINTER pageTableDirty; | ||
428 | + gctPOINTER powerOffTimer; | ||
429 | +#endif | ||
430 | |||
431 | gctBOOL powerManagement; | ||
432 | }; | ||
433 | diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c | ||
434 | index 24003e7..42e6915 100644 | ||
435 | --- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c | ||
436 | +++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c | ||
437 | @@ -181,7 +181,8 @@ _FlushPipe( | ||
438 | ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | ||
439 | : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | ||
440 | | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | ||
441 | - | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))); | ||
442 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | ||
443 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))); | ||
444 | |||
445 | /* Semaphore from FE to PE. */ | ||
446 | *buffer++ | ||
447 | @@ -620,7 +621,10 @@ _InitializeContextBuffer( | ||
448 | index += _State(Context, index, 0x10180 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE); | ||
449 | index += _State(Context, index, 0x10200 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE); | ||
450 | index += _State(Context, index, 0x10280 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE); | ||
451 | - index += _State(Context, index, 0x02C00 >> 2, 0x00000000, 256, gcvFALSE, gcvFALSE); | ||
452 | + for (i = 0; i < 256 / 16; i += 1) | ||
453 | + { | ||
454 | + index += _State(Context, index, (0x02C00 >> 2) + i * 16, 0x00000000, 14, gcvFALSE, gcvFALSE); | ||
455 | + } | ||
456 | index += _State(Context, index, 0x10300 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE); | ||
457 | index += _State(Context, index, 0x10380 >> 2, 0x00321000, 32, gcvFALSE, gcvFALSE); | ||
458 | index += _State(Context, index, 0x10400 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE); | ||
459 | diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h | ||
460 | index 7554045..5d2c7c7 100644 | ||
461 | --- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h | ||
462 | +++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h | ||
463 | @@ -134,6 +134,19 @@ struct _gckCONTEXT | ||
464 | #if gcdSECURE_USER | ||
465 | gctBOOL_PTR hint; | ||
466 | #endif | ||
467 | + | ||
468 | +#if VIVANTE_PROFILER_CONTEXT | ||
469 | + gcsPROFILER_COUNTERS latestProfiler; | ||
470 | + gcsPROFILER_COUNTERS histroyProfiler; | ||
471 | + gctUINT32 prevVSInstCount; | ||
472 | + gctUINT32 prevVSBranchInstCount; | ||
473 | + gctUINT32 prevVSTexInstCount; | ||
474 | + gctUINT32 prevVSVertexCount; | ||
475 | + gctUINT32 prevPSInstCount; | ||
476 | + gctUINT32 prevPSBranchInstCount; | ||
477 | + gctUINT32 prevPSTexInstCount; | ||
478 | + gctUINT32 prevPSPixelCount; | ||
479 | +#endif | ||
480 | }; | ||
481 | |||
482 | #ifdef __cplusplus | ||
483 | diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c | ||
484 | index 00f3839..e02dc23 100644 | ||
485 | --- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c | ||
486 | +++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c | ||
487 | @@ -21,6 +21,9 @@ | ||
488 | |||
489 | #include "gc_hal.h" | ||
490 | #include "gc_hal_kernel.h" | ||
491 | +#if VIVANTE_PROFILER_CONTEXT | ||
492 | +#include "gc_hal_kernel_context.h" | ||
493 | +#endif | ||
494 | |||
495 | #define _GC_OBJ_ZONE gcvZONE_HARDWARE | ||
496 | |||
497 | @@ -69,6 +72,7 @@ _IdentifyHardware( | ||
498 | gctUINT32 numConstants = 0; | ||
499 | gctUINT32 bufferSize = 0; | ||
500 | gctUINT32 varyingsCount = 0; | ||
501 | + gctBOOL useHZ; | ||
502 | |||
503 | gcmkHEADER_ARG("Os=0x%x", Os); | ||
504 | |||
505 | @@ -209,6 +213,15 @@ _IdentifyHardware( | ||
506 | 0x00088, | ||
507 | &Identity->chipMinorFeatures3)); | ||
508 | |||
509 | + /*The BG2 chip has no compression supertiled, and the bit of GCMinorFeature3BugFixes15 is n/a*/ | ||
510 | + if(Identity->chipModel == gcv1000 && Identity->chipRevision == 0x5036) | ||
511 | + { | ||
512 | + Identity->chipMinorFeatures3 | ||
513 | + = ((((gctUINT32) (Identity->chipMinorFeatures3)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))); | ||
514 | + Identity->chipMinorFeatures3 | ||
515 | + = ((((gctUINT32) (Identity->chipMinorFeatures3)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))); | ||
516 | + } | ||
517 | + | ||
518 | /* Read chip minor featuress register #4. */ | ||
519 | gcmkONERROR( | ||
520 | gckOS_ReadRegisterEx(Os, Core, | ||
521 | @@ -244,14 +257,31 @@ _IdentifyHardware( | ||
522 | if (((Identity->chipModel == gcv1000) && ((Identity->chipRevision == 0x5035) | ||
523 | || (Identity->chipRevision == 0x5036) | ||
524 | || (Identity->chipRevision == 0x5037))) | ||
525 | - || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612))) | ||
526 | + || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612)) | ||
527 | + || ((Identity->chipModel == gcv860) && (Identity->chipRevision == 0x4647))) | ||
528 | { | ||
529 | Identity->superTileMode = 1; | ||
530 | } | ||
531 | |||
532 | + if (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5245) | ||
533 | + { | ||
534 | + useHZ = ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1))))))) | ||
535 | + || ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))); | ||
536 | + } | ||
537 | + else | ||
538 | + { | ||
539 | + useHZ = gcvFALSE; | ||
540 | + } | ||
541 | |||
542 | - /* Disable HZ when EZ is present for older chips. */ | ||
543 | - if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))))) | ||
544 | + if (useHZ) | ||
545 | + { | ||
546 | + /* Disable EZ. */ | ||
547 | + Identity->chipFeatures | ||
548 | + = ((((gctUINT32) (Identity->chipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))); | ||
549 | + } | ||
550 | + | ||
551 | + /* Disable HZ when EZ is present for older chips. */ | ||
552 | + else if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))))) | ||
553 | { | ||
554 | /* Disable HIERARCHICAL_Z. */ | ||
555 | Identity->chipMinorFeatures | ||
556 | @@ -470,6 +500,15 @@ _IdentifyHardware( | ||
557 | Identity->varyingsCount = 8; | ||
558 | } | ||
559 | |||
560 | + /* For some cores, it consumes two varying for position, so the max varying vectors should minus one. */ | ||
561 | + if ((Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5222) || | ||
562 | + (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5208) || | ||
563 | + ((Identity->chipModel == gcv2100 || Identity->chipModel == gcv2000) && Identity->chipRevision == 0x5108) || | ||
564 | + (Identity->chipModel == gcv880 && (Identity->chipRevision == 0x5107 || Identity->chipRevision == 0x5106))) | ||
565 | + { | ||
566 | + Identity->varyingsCount -= 1; | ||
567 | + } | ||
568 | + | ||
569 | /* Success. */ | ||
570 | gcmkFOOTER(); | ||
571 | return gcvSTATUS_OK; | ||
572 | @@ -535,9 +574,9 @@ _DumpDebugRegisters( | ||
573 | IN gcsiDEBUG_REGISTERS_PTR Descriptor | ||
574 | ) | ||
575 | { | ||
576 | - gceSTATUS status; | ||
577 | + gceSTATUS status = gcvSTATUS_OK; | ||
578 | gctUINT32 select; | ||
579 | - gctUINT32 data; | ||
580 | + gctUINT32 data = 0; | ||
581 | gctUINT i; | ||
582 | |||
583 | gcmkHEADER_ARG("Os=0x%X Descriptor=0x%X", Os, Descriptor); | ||
584 | @@ -643,6 +682,42 @@ OnError: | ||
585 | return status; | ||
586 | } | ||
587 | |||
588 | +gceSTATUS | ||
589 | +_FlushCache( | ||
590 | + gckHARDWARE Hardware, | ||
591 | + gckCOMMAND Command | ||
592 | + ) | ||
593 | +{ | ||
594 | + gceSTATUS status; | ||
595 | + gctSIZE_T bytes, requested; | ||
596 | + gctPOINTER buffer; | ||
597 | + | ||
598 | + /* Get the size of the flush command. */ | ||
599 | + gcmkONERROR(gckHARDWARE_Flush(Hardware, | ||
600 | + gcvFLUSH_ALL, | ||
601 | + gcvNULL, | ||
602 | + &requested)); | ||
603 | + | ||
604 | + /* Reserve space in the command queue. */ | ||
605 | + gcmkONERROR(gckCOMMAND_Reserve(Command, | ||
606 | + requested, | ||
607 | + &buffer, | ||
608 | + &bytes)); | ||
609 | + | ||
610 | + /* Append a flush. */ | ||
611 | + gcmkONERROR(gckHARDWARE_Flush( | ||
612 | + Hardware, gcvFLUSH_ALL, buffer, &bytes | ||
613 | + )); | ||
614 | + | ||
615 | + /* Execute the command queue. */ | ||
616 | + gcmkONERROR(gckCOMMAND_Execute(Command, requested)); | ||
617 | + | ||
618 | + return gcvSTATUS_OK; | ||
619 | + | ||
620 | +OnError: | ||
621 | + return status; | ||
622 | +} | ||
623 | + | ||
624 | /******************************************************************************\ | ||
625 | ****************************** gckHARDWARE API code ***************************** | ||
626 | \******************************************************************************/ | ||
627 | @@ -809,6 +884,9 @@ gckHARDWARE_Construct( | ||
628 | /* Enable power management by default. */ | ||
629 | hardware->powerManagement = gcvTRUE; | ||
630 | |||
631 | + /* Disable profiler by default */ | ||
632 | + hardware->gpuProfiler = gcvFALSE; | ||
633 | + | ||
634 | /* Return pointer to the gckHARDWARE object. */ | ||
635 | *Hardware = hardware; | ||
636 | |||
637 | @@ -1113,6 +1191,31 @@ gckHARDWARE_InitializeHardware( | ||
638 | ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))))); | ||
639 | } | ||
640 | |||
641 | + if ((gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) == gcvFALSE) | ||
642 | + || (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) && (Hardware->identity.chipRevision < 0x5422)) | ||
643 | + ) | ||
644 | + { | ||
645 | + gctUINT32 data; | ||
646 | + | ||
647 | + gcmkONERROR( | ||
648 | + gckOS_ReadRegisterEx(Hardware->os, | ||
649 | + Hardware->core, | ||
650 | + Hardware->powerBaseAddress | ||
651 | + + 0x00104, | ||
652 | + &data)); | ||
653 | + | ||
654 | + | ||
655 | + data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15))); | ||
656 | + | ||
657 | + | ||
658 | + gcmkONERROR( | ||
659 | + gckOS_WriteRegisterEx(Hardware->os, | ||
660 | + Hardware->core, | ||
661 | + Hardware->powerBaseAddress | ||
662 | + + 0x00104, | ||
663 | + data)); | ||
664 | + } | ||
665 | + | ||
666 | /* Special workaround for this core | ||
667 | ** Make sure FE and TX are on different buses */ | ||
668 | if ((Hardware->identity.chipModel == gcv2000) | ||
669 | @@ -1152,7 +1255,9 @@ gckHARDWARE_InitializeHardware( | ||
670 | } | ||
671 | |||
672 | if (Hardware->identity.chipModel >= gcv400 | ||
673 | - && Hardware->identity.chipModel != gcv420) | ||
674 | + && Hardware->identity.chipModel != gcv420 | ||
675 | + && (((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 15:15) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) != gcvTRUE) | ||
676 | + ) | ||
677 | { | ||
678 | gctUINT32 data; | ||
679 | |||
680 | @@ -2883,35 +2988,44 @@ gckHARDWARE_QueryShaderCaps( | ||
681 | OUT gctUINT * Varyings | ||
682 | ) | ||
683 | { | ||
684 | + gctUINT32 vsConstMax; | ||
685 | + gctUINT32 psConstMax; | ||
686 | + | ||
687 | gcmkHEADER_ARG("Hardware=0x%x VertexUniforms=0x%x " | ||
688 | "FragmentUniforms=0x%x Varyings=0x%x", | ||
689 | Hardware, VertexUniforms, | ||
690 | FragmentUniforms, Varyings); | ||
691 | |||
692 | + if ((Hardware->identity.chipModel == gcv2000) | ||
693 | + && (Hardware->identity.chipRevision == 0x5118)) | ||
694 | + { | ||
695 | + vsConstMax = 256; | ||
696 | + psConstMax = 64; | ||
697 | + } | ||
698 | + else if (Hardware->identity.numConstants > 256) | ||
699 | + { | ||
700 | + vsConstMax = 256; | ||
701 | + psConstMax = 256; | ||
702 | + } | ||
703 | + else if (Hardware->identity.numConstants == 256) | ||
704 | + { | ||
705 | + vsConstMax = 256; | ||
706 | + psConstMax = 256; | ||
707 | + } | ||
708 | + else | ||
709 | + { | ||
710 | + vsConstMax = 168; | ||
711 | + psConstMax = 64; | ||
712 | + } | ||
713 | + | ||
714 | if (VertexUniforms != gcvNULL) | ||
715 | { | ||
716 | - /* Return the vs shader const count. */ | ||
717 | - if (Hardware->identity.chipModel < gcv4000) | ||
718 | - { | ||
719 | - *VertexUniforms = 168; | ||
720 | - } | ||
721 | - else | ||
722 | - { | ||
723 | - *VertexUniforms = 256; | ||
724 | - } | ||
725 | + *VertexUniforms = vsConstMax; | ||
726 | } | ||
727 | |||
728 | if (FragmentUniforms != gcvNULL) | ||
729 | { | ||
730 | - /* Return the ps shader const count. */ | ||
731 | - if (Hardware->identity.chipModel < gcv4000) | ||
732 | - { | ||
733 | - *FragmentUniforms = 64; | ||
734 | - } | ||
735 | - else | ||
736 | - { | ||
737 | - *FragmentUniforms = 256; | ||
738 | - } | ||
739 | + *FragmentUniforms = psConstMax; | ||
740 | } | ||
741 | |||
742 | if (Varyings != gcvNULL) | ||
743 | @@ -3229,12 +3343,28 @@ gckHARDWARE_SetMMUv2( | ||
744 | gctBOOL commitEntered = gcvFALSE; | ||
745 | gctPOINTER pointer = gcvNULL; | ||
746 | gctBOOL acquired = gcvFALSE; | ||
747 | + gctBOOL config2D; | ||
748 | + gctSIZE_T configSize; | ||
749 | |||
750 | gcmkHEADER_ARG("Hardware=0x%x Enable=%d", Hardware, Enable); | ||
751 | |||
752 | /* Verify the arguments. */ | ||
753 | gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); | ||
754 | |||
755 | + config2D = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_3D) | ||
756 | + && gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_2D); | ||
757 | + | ||
758 | + configSize = 4 * 4; | ||
759 | + | ||
760 | + if (config2D) | ||
761 | + { | ||
762 | + configSize += | ||
763 | + /* Pipe Select. */ | ||
764 | + 4 * 4 | ||
765 | + /* Configure MMU States. */ | ||
766 | + + 4 * 4; | ||
767 | + } | ||
768 | + | ||
769 | /* Convert logical address into physical address. */ | ||
770 | gcmkONERROR( | ||
771 | gckOS_GetPhysicalAddress(Hardware->os, MtlbAddress, &config)); | ||
772 | @@ -3281,7 +3411,7 @@ gckHARDWARE_SetMMUv2( | ||
773 | commitEntered = gcvTRUE; | ||
774 | |||
775 | gcmkONERROR(gckCOMMAND_Reserve( | ||
776 | - command, 16, &pointer, &bufferSize | ||
777 | + command, configSize, &pointer, &bufferSize | ||
778 | )); | ||
779 | |||
780 | buffer = pointer; | ||
781 | @@ -3300,10 +3430,43 @@ gckHARDWARE_SetMMUv2( | ||
782 | |||
783 | buffer[3] = address; | ||
784 | |||
785 | + if (config2D) | ||
786 | + { | ||
787 | + /* LoadState(AQPipeSelect, 1), pipe. */ | ||
788 | + buffer[4] | ||
789 | + = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ||
790 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | ||
791 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))); | ||
792 | + | ||
793 | + buffer[5] = 0x1; | ||
794 | + | ||
795 | + buffer[6] | ||
796 | + = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ||
797 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | ||
798 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))); | ||
799 | + | ||
800 | + buffer[7] = config; | ||
801 | + | ||
802 | + buffer[8] | ||
803 | + = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ||
804 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0060) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | ||
805 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))); | ||
806 | + | ||
807 | + buffer[9] = address; | ||
808 | + | ||
809 | + /* LoadState(AQPipeSelect, 1), pipe. */ | ||
810 | + buffer[10] | ||
811 | + = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ||
812 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | ||
813 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))); | ||
814 | + | ||
815 | + buffer[11] = 0x0; | ||
816 | + } | ||
817 | + | ||
818 | gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, | ||
819 | "Setup MMU: config=%08x, Safe Address=%08x\n.", config, address); | ||
820 | |||
821 | - gcmkONERROR(gckCOMMAND_Execute(command, 16)); | ||
822 | + gcmkONERROR(gckCOMMAND_Execute(command, configSize)); | ||
823 | |||
824 | if (FromPower == gcvFALSE) | ||
825 | { | ||
826 | @@ -3501,6 +3664,8 @@ gckHARDWARE_Flush( | ||
827 | gctUINT32 flush = 0; | ||
828 | gctUINT32_PTR logical = (gctUINT32_PTR) Logical; | ||
829 | gceSTATUS status; | ||
830 | + gctBOOL fcFlushStall; | ||
831 | + gctUINT32 reserveBytes = 8; | ||
832 | |||
833 | gcmkHEADER_ARG("Hardware=0x%x Flush=0x%x Logical=0x%x *Bytes=%lu", | ||
834 | Hardware, Flush, Logical, gcmOPT_VALUE(Bytes)); | ||
835 | @@ -3511,6 +3676,16 @@ gckHARDWARE_Flush( | ||
836 | /* Get current pipe. */ | ||
837 | pipe = Hardware->kernel->command->pipeSelect; | ||
838 | |||
839 | + fcFlushStall | ||
840 | + = ((((gctUINT32) (Hardware->identity.chipMinorFeatures1)) >> (0 ? 31:31) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) | ||
841 | + && (Flush == gcvFLUSH_ALL) | ||
842 | + ; | ||
843 | + | ||
844 | + if (fcFlushStall) | ||
845 | + { | ||
846 | + reserveBytes += 8; | ||
847 | + } | ||
848 | + | ||
849 | /* Flush 3D color cache. */ | ||
850 | if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0)) | ||
851 | { | ||
852 | @@ -3527,6 +3702,7 @@ gckHARDWARE_Flush( | ||
853 | if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0)) | ||
854 | { | ||
855 | flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))); | ||
856 | + flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))); | ||
857 | } | ||
858 | |||
859 | /* Flush 2D cache. */ | ||
860 | @@ -3550,7 +3726,7 @@ gckHARDWARE_Flush( | ||
861 | /* Copy to command queue. */ | ||
862 | if (Logical != gcvNULL) | ||
863 | { | ||
864 | - if (*Bytes < 8) | ||
865 | + if (*Bytes < reserveBytes) | ||
866 | { | ||
867 | /* Command queue too small. */ | ||
868 | gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL); | ||
869 | @@ -3565,12 +3741,26 @@ gckHARDWARE_Flush( | ||
870 | |||
871 | gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, | ||
872 | "0x%x: FLUSH 0x%x", logical, flush); | ||
873 | + | ||
874 | + if (fcFlushStall) | ||
875 | + { | ||
876 | + logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ||
877 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0594) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | ||
878 | + | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))); | ||
879 | + | ||
880 | + logical[3] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))); | ||
881 | + | ||
882 | + | ||
883 | + gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, | ||
884 | + "0x%x: FLUSH 0x%x", logical + 3, logical[3]); | ||
885 | + } | ||
886 | + | ||
887 | } | ||
888 | |||
889 | if (Bytes != gcvNULL) | ||
890 | { | ||
891 | - /* 8 bytes required. */ | ||
892 | - *Bytes = 8; | ||
893 | + /* bytes required. */ | ||
894 | + *Bytes = reserveBytes; | ||
895 | } | ||
896 | } | ||
897 | |||
898 | @@ -4285,6 +4475,48 @@ gckHARDWARE_SetPowerManagementState( | ||
899 | } | ||
900 | } | ||
901 | |||
902 | + /* Flush Cache before Power Off. */ | ||
903 | + if (flag & gcvPOWER_FLAG_POWER_OFF) | ||
904 | + { | ||
905 | + if (Hardware->clockState == gcvFALSE) | ||
906 | + { | ||
907 | + /* Turn off the GPU power. */ | ||
908 | + gcmkONERROR( | ||
909 | + gckOS_SetGPUPower(os, | ||
910 | + Hardware->core, | ||
911 | + gcvTRUE, | ||
912 | + gcvTRUE)); | ||
913 | + | ||
914 | + Hardware->clockState = gcvTRUE; | ||
915 | + | ||
916 | + if (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_DYNAMIC_FREQUENCY_SCALING) != gcvTRUE) | ||
917 | + { | ||
918 | + /* Write the clock control register. */ | ||
919 | + gcmkONERROR(gckOS_WriteRegisterEx(os, | ||
920 | + Hardware->core, | ||
921 | + 0x00000, | ||
922 | + clocks[0])); | ||
923 | + | ||
924 | + /* Done loading the frequency scaler. */ | ||
925 | + gcmkONERROR(gckOS_WriteRegisterEx(os, | ||
926 | + Hardware->core, | ||
927 | + 0x00000, | ||
928 | + ((((gctUINT32) (clocks[0])) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))))); | ||
929 | + } | ||
930 | + } | ||
931 | + | ||
932 | + gcmkONERROR(gckCOMMAND_Start(command)); | ||
933 | + | ||
934 | + gcmkONERROR(_FlushCache(Hardware, command)); | ||
935 | + | ||
936 | + gckOS_Delay(gcvNULL, 1); | ||
937 | + | ||
938 | + /* Stop the command parser. */ | ||
939 | + gcmkONERROR(gckCOMMAND_Stop(command, gcvFALSE)); | ||
940 | + | ||
941 | + flag |= gcvPOWER_FLAG_CLOCK_OFF; | ||
942 | + } | ||
943 | + | ||
944 | /* Get time until stopped. */ | ||
945 | gcmkPROFILE_QUERY(time, stopTime); | ||
946 | |||
947 | @@ -4582,6 +4814,40 @@ gckHARDWARE_SetPowerManagement( | ||
948 | return gcvSTATUS_OK; | ||
949 | } | ||
950 | |||
951 | +/******************************************************************************* | ||
952 | +** | ||
953 | +** gckHARDWARE_SetGpuProfiler | ||
954 | +** | ||
955 | +** Configure GPU profiler function. | ||
956 | +** Only used in driver initialization stage. | ||
957 | +** | ||
958 | +** INPUT: | ||
959 | +** | ||
960 | +** gckHARDWARE Harwdare | ||
961 | +** Pointer to an gckHARDWARE object. | ||
962 | +** | ||
963 | +** gctBOOL GpuProfiler | ||
964 | +** GOU Profiler State. | ||
965 | +** | ||
966 | +*/ | ||
967 | +gceSTATUS | ||
968 | +gckHARDWARE_SetGpuProfiler( | ||
969 | + IN gckHARDWARE Hardware, | ||
970 | + IN gctBOOL GpuProfiler | ||
971 | + ) | ||
972 | +{ | ||
973 | + gcmkHEADER_ARG("Hardware=0x%x", Hardware); | ||
974 | + | ||
975 | + /* Verify the arguments. */ | ||
976 | + gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); | ||
977 | + | ||
978 | + Hardware->gpuProfiler = GpuProfiler; | ||
979 | + | ||
980 | + /* Success. */ | ||
981 | + gcmkFOOTER_NO(); | ||
982 | + return gcvSTATUS_OK; | ||
983 | +} | ||
984 | + | ||
985 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
986 | gceSTATUS | ||
987 | gckHARDWARE_SetFscaleValue( | ||
988 | @@ -5141,6 +5407,402 @@ OnError: | ||
989 | } | ||
990 | #endif | ||
991 | |||
992 | +#if VIVANTE_PROFILER_CONTEXT | ||
993 | +#define gcmkUPDATE_PROFILE_DATA(data) \ | ||
994 | + profilerHistroy->data += profiler->data | ||
995 | + | ||
996 | +gceSTATUS | ||
997 | +gckHARDWARE_QueryContextProfile( | ||
998 | + IN gckHARDWARE Hardware, | ||
999 | + IN gctBOOL Reset, | ||
1000 | + IN gckCONTEXT Context, | ||
1001 | + OUT gcsPROFILER_COUNTERS * Counters | ||
1002 | + ) | ||
1003 | +{ | ||
1004 | + gceSTATUS status; | ||
1005 | + gckCOMMAND command = Hardware->kernel->command; | ||
1006 | + gcsPROFILER_COUNTERS * profiler = Counters; | ||
1007 | + | ||
1008 | + gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters); | ||
1009 | + | ||
1010 | + /* Verify the arguments. */ | ||
1011 | + gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); | ||
1012 | + | ||
1013 | + /* Acquire the context sequnence mutex. */ | ||
1014 | + gcmkONERROR(gckOS_AcquireMutex( | ||
1015 | + command->os, command->mutexContextSeq, gcvINFINITE | ||
1016 | + )); | ||
1017 | + | ||
1018 | + /* Read the counters. */ | ||
1019 | + gcmkVERIFY_OK(gckOS_MemCopy( | ||
1020 | + profiler, &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS) | ||
1021 | + )); | ||
1022 | + | ||
1023 | + if (Reset) | ||
1024 | + { | ||
1025 | + /* Reset counters. */ | ||
1026 | + gcmkVERIFY_OK(gckOS_ZeroMemory( | ||
1027 | + &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS) | ||
1028 | + )); | ||
1029 | + } | ||
1030 | + | ||
1031 | + gcmkVERIFY_OK(gckOS_ReleaseMutex( | ||
1032 | + command->os, command->mutexContextSeq | ||
1033 | + )); | ||
1034 | + | ||
1035 | + /* Success. */ | ||
1036 | + gcmkFOOTER_NO(); | ||
1037 | + return gcvSTATUS_OK; | ||
1038 | + | ||
1039 | +OnError: | ||
1040 | + /* Return the status. */ | ||
1041 | + gcmkFOOTER(); | ||
1042 | + return status; | ||
1043 | +} | ||
1044 | + | ||
1045 | + | ||
1046 | +gceSTATUS | ||
1047 | +gckHARDWARE_UpdateContextProfile( | ||
1048 | + IN gckHARDWARE Hardware, | ||
1049 | + IN gckCONTEXT Context | ||
1050 | + ) | ||
1051 | +{ | ||
1052 | + gceSTATUS status; | ||
1053 | + gcsPROFILER_COUNTERS * profiler = &Context->latestProfiler; | ||
1054 | + gcsPROFILER_COUNTERS * profilerHistroy = &Context->histroyProfiler; | ||
1055 | + gctUINT i, clock; | ||
1056 | + gctUINT32 colorKilled, colorDrawn, depthKilled, depthDrawn; | ||
1057 | + gctUINT32 totalRead, totalWrite; | ||
1058 | + gceCHIPMODEL chipModel; | ||
1059 | + gctUINT32 chipRevision; | ||
1060 | + gctUINT32 temp; | ||
1061 | + gctBOOL needResetShader = gcvFALSE; | ||
1062 | + | ||
1063 | + gcmkHEADER_ARG("Hardware=0x%x Context=0x%x", Hardware, Context); | ||
1064 | + | ||
1065 | + /* Verify the arguments. */ | ||
1066 | + gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); | ||
1067 | + gcmkVERIFY_OBJECT(Context, gcvOBJ_CONTEXT); | ||
1068 | + | ||
1069 | + chipModel = Hardware->identity.chipModel; | ||
1070 | + chipRevision = Hardware->identity.chipRevision; | ||
1071 | + if (chipModel == gcv2000 || (chipModel == gcv2100 && chipRevision == 0x5118)) | ||
1072 | + { | ||
1073 | + needResetShader = gcvTRUE; | ||
1074 | + } | ||
1075 | + | ||
1076 | + /* Read the counters. */ | ||
1077 | + gcmkONERROR( | ||
1078 | + gckOS_ReadRegisterEx(Hardware->os, | ||
1079 | + Hardware->core, | ||
1080 | + 0x00438, | ||
1081 | + &profiler->gpuCyclesCounter)); | ||
1082 | + gcmkUPDATE_PROFILE_DATA(gpuCyclesCounter); | ||
1083 | + | ||
1084 | + gcmkONERROR( | ||
1085 | + gckOS_ReadRegisterEx(Hardware->os, | ||
1086 | + Hardware->core, | ||
1087 | + 0x00078, | ||
1088 | + &profiler->gpuTotalCyclesCounter)); | ||
1089 | + gcmkUPDATE_PROFILE_DATA(gpuTotalCyclesCounter); | ||
1090 | + | ||
1091 | + gcmkONERROR( | ||
1092 | + gckOS_ReadRegisterEx(Hardware->os, | ||
1093 | + Hardware->core, | ||
1094 | + 0x0007C, | ||
1095 | + &profiler->gpuIdleCyclesCounter)); | ||
1096 | + gcmkUPDATE_PROFILE_DATA(gpuIdleCyclesCounter); | ||
1097 | + | ||
1098 | + /* Read clock control register. */ | ||
1099 | + gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, | ||
1100 | + Hardware->core, | ||
1101 | + 0x00000, | ||
1102 | + &clock)); | ||
1103 | + | ||
1104 | + profiler->gpuTotalRead64BytesPerFrame = 0; | ||
1105 | + profiler->gpuTotalWrite64BytesPerFrame = 0; | ||
1106 | + profiler->pe_pixel_count_killed_by_color_pipe = 0; | ||
1107 | + profiler->pe_pixel_count_killed_by_depth_pipe = 0; | ||
1108 | + profiler->pe_pixel_count_drawn_by_color_pipe = 0; | ||
1109 | + profiler->pe_pixel_count_drawn_by_depth_pipe = 0; | ||
1110 | + | ||
1111 | + /* Walk through all avaiable pixel pipes. */ | ||
1112 | + for (i = 0; i < Hardware->identity.pixelPipes; ++i) | ||
1113 | + { | ||
1114 | + /* Select proper pipe. */ | ||
1115 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, | ||
1116 | + Hardware->core, | ||
1117 | + 0x00000, | ||
1118 | + ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))))); | ||
1119 | + | ||
1120 | + /* BW */ | ||
1121 | + gcmkONERROR( | ||
1122 | + gckOS_ReadRegisterEx(Hardware->os, | ||
1123 | + Hardware->core, | ||
1124 | + 0x00040, | ||
1125 | + &totalRead)); | ||
1126 | + gcmkONERROR( | ||
1127 | + gckOS_ReadRegisterEx(Hardware->os, | ||
1128 | + Hardware->core, | ||
1129 | + 0x00044, | ||
1130 | + &totalWrite)); | ||
1131 | + | ||
1132 | + profiler->gpuTotalRead64BytesPerFrame += totalRead; | ||
1133 | + profiler->gpuTotalWrite64BytesPerFrame += totalWrite; | ||
1134 | + gcmkUPDATE_PROFILE_DATA(gpuTotalRead64BytesPerFrame); | ||
1135 | + gcmkUPDATE_PROFILE_DATA(gpuTotalWrite64BytesPerFrame); | ||
1136 | + | ||
1137 | + /* PE */ | ||
1138 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorKilled)); | ||
1139 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthKilled)); | ||
1140 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorDrawn)); | ||
1141 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthDrawn)); | ||
1142 | + | ||
1143 | + profiler->pe_pixel_count_killed_by_color_pipe += colorKilled; | ||
1144 | + profiler->pe_pixel_count_killed_by_depth_pipe += depthKilled; | ||
1145 | + profiler->pe_pixel_count_drawn_by_color_pipe += colorDrawn; | ||
1146 | + profiler->pe_pixel_count_drawn_by_depth_pipe += depthDrawn; | ||
1147 | + gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_color_pipe); | ||
1148 | + gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_depth_pipe); | ||
1149 | + gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_color_pipe); | ||
1150 | + gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_depth_pipe); | ||
1151 | + } | ||
1152 | + | ||
1153 | + /* Reset clock control register. */ | ||
1154 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, | ||
1155 | + Hardware->core, | ||
1156 | + 0x00000, | ||
1157 | + clock)); | ||
1158 | + | ||
1159 | + | ||
1160 | + | ||
1161 | + | ||
1162 | + /* Reset counters. */ | ||
1163 | + gcmkONERROR( | ||
1164 | + gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 1)); | ||
1165 | + gcmkONERROR( | ||
1166 | + gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 0)); | ||
1167 | + gcmkONERROR( | ||
1168 | + gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00438, 0)); | ||
1169 | + gcmkONERROR( | ||
1170 | + gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00078, 0)); | ||
1171 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1172 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | ||
1173 | +)); | ||
1174 | + | ||
1175 | + /* SH */ | ||
1176 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1177 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->ps_inst_counter)); | ||
1178 | + if (needResetShader) | ||
1179 | + { | ||
1180 | + temp = profiler->ps_inst_counter; | ||
1181 | + profiler->ps_inst_counter -= Context->prevPSInstCount; | ||
1182 | + Context->prevPSInstCount = temp; | ||
1183 | + } | ||
1184 | + gcmkUPDATE_PROFILE_DATA(ps_inst_counter); | ||
1185 | + | ||
1186 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1187 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_pixel_counter)); | ||
1188 | + if (needResetShader) | ||
1189 | + { | ||
1190 | + temp = profiler->rendered_pixel_counter; | ||
1191 | + profiler->rendered_pixel_counter -= Context->prevPSPixelCount; | ||
1192 | + Context->prevPSPixelCount = temp; | ||
1193 | + } | ||
1194 | + gcmkUPDATE_PROFILE_DATA(rendered_pixel_counter); | ||
1195 | + | ||
1196 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1197 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vs_inst_counter)); | ||
1198 | + if (needResetShader) | ||
1199 | + { | ||
1200 | + temp = profiler->vs_inst_counter; | ||
1201 | + profiler->vs_inst_counter -= Context->prevVSInstCount; | ||
1202 | + Context->prevVSInstCount = temp; | ||
1203 | + } | ||
1204 | + gcmkUPDATE_PROFILE_DATA(vs_inst_counter); | ||
1205 | + | ||
1206 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1207 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_vertice_counter)); | ||
1208 | + if (needResetShader) | ||
1209 | + { | ||
1210 | + temp = profiler->rendered_vertice_counter; | ||
1211 | + profiler->rendered_vertice_counter -= Context->prevVSVertexCount; | ||
1212 | + Context->prevVSVertexCount = temp; | ||
1213 | + } | ||
1214 | + gcmkUPDATE_PROFILE_DATA(rendered_vertice_counter); | ||
1215 | + | ||
1216 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1217 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_branch_inst_counter)); | ||
1218 | + if (needResetShader) | ||
1219 | + { | ||
1220 | + temp = profiler->vtx_branch_inst_counter; | ||
1221 | + profiler->vtx_branch_inst_counter -= Context->prevVSBranchInstCount; | ||
1222 | + Context->prevVSBranchInstCount = temp; | ||
1223 | + } | ||
1224 | + gcmkUPDATE_PROFILE_DATA(vtx_branch_inst_counter); | ||
1225 | + | ||
1226 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1227 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_texld_inst_counter)); | ||
1228 | + if (needResetShader) | ||
1229 | + { | ||
1230 | + temp = profiler->vtx_texld_inst_counter; | ||
1231 | + profiler->vtx_texld_inst_counter -= Context->prevVSTexInstCount; | ||
1232 | + Context->prevVSTexInstCount = temp; | ||
1233 | + } | ||
1234 | + gcmkUPDATE_PROFILE_DATA(vtx_texld_inst_counter); | ||
1235 | + | ||
1236 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1237 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_branch_inst_counter)); | ||
1238 | + if (needResetShader) | ||
1239 | + { | ||
1240 | + temp = profiler->pxl_branch_inst_counter; | ||
1241 | + profiler->pxl_branch_inst_counter -= Context->prevPSBranchInstCount; | ||
1242 | + Context->prevPSBranchInstCount = temp; | ||
1243 | + } | ||
1244 | + gcmkUPDATE_PROFILE_DATA(pxl_branch_inst_counter); | ||
1245 | + | ||
1246 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1247 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_texld_inst_counter)); | ||
1248 | + if (needResetShader) | ||
1249 | + { | ||
1250 | + temp = profiler->pxl_texld_inst_counter; | ||
1251 | + profiler->pxl_texld_inst_counter -= Context->prevPSTexInstCount; | ||
1252 | + Context->prevPSTexInstCount = temp; | ||
1253 | + } | ||
1254 | + gcmkUPDATE_PROFILE_DATA(pxl_texld_inst_counter); | ||
1255 | + | ||
1256 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1257 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | ||
1258 | +)); | ||
1259 | + | ||
1260 | + /* PA */ | ||
1261 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1262 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_vtx_counter)); | ||
1263 | + gcmkUPDATE_PROFILE_DATA(pa_input_vtx_counter); | ||
1264 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1265 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_prim_counter)); | ||
1266 | + gcmkUPDATE_PROFILE_DATA(pa_input_prim_counter); | ||
1267 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1268 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_output_prim_counter)); | ||
1269 | + gcmkUPDATE_PROFILE_DATA(pa_output_prim_counter); | ||
1270 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1271 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_depth_clipped_counter)); | ||
1272 | + gcmkUPDATE_PROFILE_DATA(pa_depth_clipped_counter); | ||
1273 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1274 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_trivial_rejected_counter)); | ||
1275 | + gcmkUPDATE_PROFILE_DATA(pa_trivial_rejected_counter); | ||
1276 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1277 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_culled_counter)); | ||
1278 | + gcmkUPDATE_PROFILE_DATA(pa_culled_counter); | ||
1279 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1280 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | ||
1281 | +)); | ||
1282 | + | ||
1283 | + /* SE */ | ||
1284 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1285 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_triangle_count)); | ||
1286 | + gcmkUPDATE_PROFILE_DATA(se_culled_triangle_count); | ||
1287 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1288 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_lines_count)); | ||
1289 | + gcmkUPDATE_PROFILE_DATA(se_culled_lines_count); | ||
1290 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1291 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | ||
1292 | +)); | ||
1293 | + | ||
1294 | + /* RA */ | ||
1295 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1296 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_pixel_count)); | ||
1297 | + gcmkUPDATE_PROFILE_DATA(ra_valid_pixel_count); | ||
1298 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1299 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_quad_count)); | ||
1300 | + gcmkUPDATE_PROFILE_DATA(ra_total_quad_count); | ||
1301 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1302 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_quad_count_after_early_z)); | ||
1303 | + gcmkUPDATE_PROFILE_DATA(ra_valid_quad_count_after_early_z); | ||
1304 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1305 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_primitive_count)); | ||
1306 | + gcmkUPDATE_PROFILE_DATA(ra_total_primitive_count); | ||
1307 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1308 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_pipe_cache_miss_counter)); | ||
1309 | + gcmkUPDATE_PROFILE_DATA(ra_pipe_cache_miss_counter); | ||
1310 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1311 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_prefetch_cache_miss_counter)); | ||
1312 | + gcmkUPDATE_PROFILE_DATA(ra_prefetch_cache_miss_counter); | ||
1313 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) )); | ||
1314 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | ||
1315 | +)); | ||
1316 | + | ||
1317 | + /* TX */ | ||
1318 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1319 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_bilinear_requests)); | ||
1320 | + gcmkUPDATE_PROFILE_DATA(tx_total_bilinear_requests); | ||
1321 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1322 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_trilinear_requests)); | ||
1323 | + gcmkUPDATE_PROFILE_DATA(tx_total_trilinear_requests); | ||
1324 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1325 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_discarded_texture_requests)); | ||
1326 | + gcmkUPDATE_PROFILE_DATA(tx_total_discarded_texture_requests); | ||
1327 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1328 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_texture_requests)); | ||
1329 | + gcmkUPDATE_PROFILE_DATA(tx_total_texture_requests); | ||
1330 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1331 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_count)); | ||
1332 | + gcmkUPDATE_PROFILE_DATA(tx_mem_read_count); | ||
1333 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1334 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_in_8B_count)); | ||
1335 | + gcmkUPDATE_PROFILE_DATA(tx_mem_read_in_8B_count); | ||
1336 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1337 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_count)); | ||
1338 | + gcmkUPDATE_PROFILE_DATA(tx_cache_miss_count); | ||
1339 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1340 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_hit_texel_count)); | ||
1341 | + gcmkUPDATE_PROFILE_DATA(tx_cache_hit_texel_count); | ||
1342 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1343 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_texel_count)); | ||
1344 | + gcmkUPDATE_PROFILE_DATA(tx_cache_miss_texel_count); | ||
1345 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) )); | ||
1346 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | ||
1347 | +)); | ||
1348 | + | ||
1349 | + /* MC */ | ||
1350 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1351 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline)); | ||
1352 | + gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_pipeline); | ||
1353 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1354 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_IP)); | ||
1355 | + gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_IP); | ||
1356 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1357 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline)); | ||
1358 | + gcmkUPDATE_PROFILE_DATA(mc_total_write_req_8B_from_pipeline); | ||
1359 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) )); | ||
1360 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | ||
1361 | +)); | ||
1362 | + | ||
1363 | + /* HI */ | ||
1364 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1365 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled)); | ||
1366 | + gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_read_request_stalled); | ||
1367 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1368 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled)); | ||
1369 | + gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_request_stalled); | ||
1370 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1371 | +gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled)); | ||
1372 | + gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_data_stalled); | ||
1373 | + gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) )); | ||
1374 | +gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | ||
1375 | +)); | ||
1376 | + | ||
1377 | + /* Success. */ | ||
1378 | + gcmkFOOTER_NO(); | ||
1379 | + return gcvSTATUS_OK; | ||
1380 | + | ||
1381 | +OnError: | ||
1382 | + /* Return the status. */ | ||
1383 | + gcmkFOOTER(); | ||
1384 | + return status; | ||
1385 | +} | ||
1386 | +#endif | ||
1387 | + | ||
1388 | static gceSTATUS | ||
1389 | _ResetGPU( | ||
1390 | IN gckHARDWARE Hardware, | ||
1391 | @@ -5602,6 +6264,22 @@ gckHARDWARE_IsFeatureAvailable( | ||
1392 | && ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 2:2) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))); | ||
1393 | break; | ||
1394 | |||
1395 | + case gcvFEATURE_PIPE_2D: | ||
1396 | + available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 9:9) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))); | ||
1397 | + break; | ||
1398 | + | ||
1399 | + case gcvFEATURE_PIPE_3D: | ||
1400 | +#ifndef VIVANTE_NO_3D | ||
1401 | + available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 2:2) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))); | ||
1402 | +#else | ||
1403 | + available = gcvFALSE; | ||
1404 | +#endif | ||
1405 | + break; | ||
1406 | + | ||
1407 | + case gcvFEATURE_HALTI2: | ||
1408 | + available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures4)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))); | ||
1409 | + break; | ||
1410 | + | ||
1411 | default: | ||
1412 | gcmkFATAL("Invalid feature has been requested."); | ||
1413 | available = gcvFALSE; | ||
1414 | diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h | ||
1415 | index 37226b7..287ea60 100644 | ||
1416 | --- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h | ||
1417 | +++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h | ||
1418 | @@ -92,6 +92,7 @@ struct _gckHARDWARE | ||
1419 | #endif | ||
1420 | |||
1421 | gctBOOL powerManagement; | ||
1422 | + gctBOOL gpuProfiler; | ||
1423 | }; | ||
1424 | |||
1425 | gceSTATUS | ||
1426 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c | ||
1427 | index b7b0d28..12a5340 100644 | ||
1428 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c | ||
1429 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c | ||
1430 | @@ -128,19 +128,6 @@ _ResetFinishFunction( | ||
1431 | ** Pointer to a variable that will hold the pointer to the gckKERNEL | ||
1432 | ** object. | ||
1433 | */ | ||
1434 | -#ifdef ANDROID | ||
1435 | -#if gcdNEW_PROFILER_FILE | ||
1436 | -#define DEFAULT_PROFILE_FILE_NAME "/sdcard/vprofiler.vpd" | ||
1437 | -#else | ||
1438 | -#define DEFAULT_PROFILE_FILE_NAME "/sdcard/vprofiler.xml" | ||
1439 | -#endif | ||
1440 | -#else | ||
1441 | -#if gcdNEW_PROFILER_FILE | ||
1442 | -#define DEFAULT_PROFILE_FILE_NAME "vprofiler.vpd" | ||
1443 | -#else | ||
1444 | -#define DEFAULT_PROFILE_FILE_NAME "vprofiler.xml" | ||
1445 | -#endif | ||
1446 | -#endif | ||
1447 | |||
1448 | gceSTATUS | ||
1449 | gckKERNEL_Construct( | ||
1450 | @@ -302,17 +289,12 @@ gckKERNEL_Construct( | ||
1451 | |||
1452 | #if VIVANTE_PROFILER | ||
1453 | /* Initialize profile setting */ | ||
1454 | -#if defined ANDROID | ||
1455 | kernel->profileEnable = gcvFALSE; | ||
1456 | -#else | ||
1457 | - kernel->profileEnable = gcvTRUE; | ||
1458 | -#endif | ||
1459 | kernel->profileCleanRegister = gcvTRUE; | ||
1460 | +#endif | ||
1461 | |||
1462 | - gcmkVERIFY_OK( | ||
1463 | - gckOS_MemCopy(kernel->profileFileName, | ||
1464 | - DEFAULT_PROFILE_FILE_NAME, | ||
1465 | - gcmSIZEOF(DEFAULT_PROFILE_FILE_NAME) + 1)); | ||
1466 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1467 | + gcmkONERROR(gckOS_CreateSyncTimeline(Os, &kernel->timeline)); | ||
1468 | #endif | ||
1469 | |||
1470 | /* Return pointer to the gckKERNEL object. */ | ||
1471 | @@ -395,6 +377,13 @@ OnError: | ||
1472 | } | ||
1473 | #endif | ||
1474 | |||
1475 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1476 | + if (kernel->timeline) | ||
1477 | + { | ||
1478 | + gcmkVERIFY_OK(gckOS_DestroySyncTimeline(Os, kernel->timeline)); | ||
1479 | + } | ||
1480 | +#endif | ||
1481 | + | ||
1482 | gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, kernel)); | ||
1483 | } | ||
1484 | |||
1485 | @@ -525,6 +514,10 @@ gckKERNEL_Destroy( | ||
1486 | } | ||
1487 | #endif | ||
1488 | |||
1489 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1490 | + gcmkVERIFY_OK(gckOS_DestroySyncTimeline(Kernel->os, Kernel->timeline)); | ||
1491 | +#endif | ||
1492 | + | ||
1493 | /* Mark the gckKERNEL object as unknown. */ | ||
1494 | Kernel->object.type = gcvOBJ_UNKNOWN; | ||
1495 | |||
1496 | @@ -1310,7 +1303,8 @@ gckKERNEL_Dispatch( | ||
1497 | /* Commit a command and context buffer. */ | ||
1498 | gcmkONERROR( | ||
1499 | gckCOMMAND_Commit(Kernel->command, | ||
1500 | - gcmNAME_TO_PTR(Interface->u.Commit.context), | ||
1501 | + Interface->u.Commit.context ? | ||
1502 | + gcmNAME_TO_PTR(Interface->u.Commit.context) : gcvNULL, | ||
1503 | gcmUINT64_TO_PTR(Interface->u.Commit.commandBuffer), | ||
1504 | gcmUINT64_TO_PTR(Interface->u.Commit.delta), | ||
1505 | gcmUINT64_TO_PTR(Interface->u.Commit.queue), | ||
1506 | @@ -1600,7 +1594,15 @@ gckKERNEL_Dispatch( | ||
1507 | break; | ||
1508 | |||
1509 | case gcvHAL_READ_ALL_PROFILE_REGISTERS: | ||
1510 | -#if VIVANTE_PROFILER | ||
1511 | +#if VIVANTE_PROFILER && VIVANTE_PROFILER_CONTEXT | ||
1512 | + /* Read profile data according to the context. */ | ||
1513 | + gcmkONERROR( | ||
1514 | + gckHARDWARE_QueryContextProfile( | ||
1515 | + Kernel->hardware, | ||
1516 | + Kernel->profileCleanRegister, | ||
1517 | + gcmNAME_TO_PTR(Interface->u.RegisterProfileData.context), | ||
1518 | + &Interface->u.RegisterProfileData.counters)); | ||
1519 | +#elif VIVANTE_PROFILER | ||
1520 | /* Read all 3D profile registers. */ | ||
1521 | gcmkONERROR( | ||
1522 | gckHARDWARE_QueryProfileRegisters( | ||
1523 | @@ -1628,11 +1630,6 @@ gckKERNEL_Dispatch( | ||
1524 | #if VIVANTE_PROFILER | ||
1525 | /* Get profile setting */ | ||
1526 | Interface->u.GetProfileSetting.enable = Kernel->profileEnable; | ||
1527 | - | ||
1528 | - gcmkVERIFY_OK( | ||
1529 | - gckOS_MemCopy(Interface->u.GetProfileSetting.fileName, | ||
1530 | - Kernel->profileFileName, | ||
1531 | - gcdMAX_PROFILE_FILE_NAME)); | ||
1532 | #endif | ||
1533 | |||
1534 | status = gcvSTATUS_OK; | ||
1535 | @@ -1640,12 +1637,13 @@ gckKERNEL_Dispatch( | ||
1536 | case gcvHAL_SET_PROFILE_SETTING: | ||
1537 | #if VIVANTE_PROFILER | ||
1538 | /* Set profile setting */ | ||
1539 | - Kernel->profileEnable = Interface->u.SetProfileSetting.enable; | ||
1540 | - | ||
1541 | - gcmkVERIFY_OK( | ||
1542 | - gckOS_MemCopy(Kernel->profileFileName, | ||
1543 | - Interface->u.SetProfileSetting.fileName, | ||
1544 | - gcdMAX_PROFILE_FILE_NAME)); | ||
1545 | + if(Kernel->hardware->gpuProfiler) | ||
1546 | + Kernel->profileEnable = Interface->u.SetProfileSetting.enable; | ||
1547 | + else | ||
1548 | + { | ||
1549 | + status = gcvSTATUS_NOT_SUPPORTED; | ||
1550 | + break; | ||
1551 | + } | ||
1552 | #endif | ||
1553 | |||
1554 | status = gcvSTATUS_OK; | ||
1555 | @@ -2093,6 +2091,61 @@ gckKERNEL_Dispatch( | ||
1556 | #endif | ||
1557 | break; | ||
1558 | |||
1559 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1560 | + case gcvHAL_SYNC_POINT: | ||
1561 | + { | ||
1562 | + gctSYNC_POINT syncPoint; | ||
1563 | + | ||
1564 | + switch (Interface->u.SyncPoint.command) | ||
1565 | + { | ||
1566 | + case gcvSYNC_POINT_CREATE: | ||
1567 | + gcmkONERROR(gckOS_CreateSyncPoint(Kernel->os, &syncPoint)); | ||
1568 | + | ||
1569 | + Interface->u.SyncPoint.syncPoint = gcmPTR_TO_UINT64(syncPoint); | ||
1570 | + | ||
1571 | + gcmkVERIFY_OK( | ||
1572 | + gckKERNEL_AddProcessDB(Kernel, | ||
1573 | + processID, gcvDB_SYNC_POINT, | ||
1574 | + syncPoint, | ||
1575 | + gcvNULL, | ||
1576 | + 0)); | ||
1577 | + break; | ||
1578 | + | ||
1579 | + case gcvSYNC_POINT_DESTROY: | ||
1580 | + syncPoint = gcmUINT64_TO_PTR(Interface->u.SyncPoint.syncPoint); | ||
1581 | + | ||
1582 | + gcmkONERROR(gckOS_DestroySyncPoint(Kernel->os, syncPoint)); | ||
1583 | + | ||
1584 | + gcmkVERIFY_OK( | ||
1585 | + gckKERNEL_RemoveProcessDB(Kernel, | ||
1586 | + processID, gcvDB_SYNC_POINT, | ||
1587 | + syncPoint)); | ||
1588 | + break; | ||
1589 | + | ||
1590 | + default: | ||
1591 | + gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT); | ||
1592 | + break; | ||
1593 | + } | ||
1594 | + } | ||
1595 | + break; | ||
1596 | + | ||
1597 | + case gcvHAL_CREATE_NATIVE_FENCE: | ||
1598 | + { | ||
1599 | + gctINT fenceFD; | ||
1600 | + gctSYNC_POINT syncPoint = | ||
1601 | + gcmUINT64_TO_PTR(Interface->u.CreateNativeFence.syncPoint); | ||
1602 | + | ||
1603 | + gcmkONERROR( | ||
1604 | + gckOS_CreateNativeFence(Kernel->os, | ||
1605 | + Kernel->timeline, | ||
1606 | + syncPoint, | ||
1607 | + &fenceFD)); | ||
1608 | + | ||
1609 | + Interface->u.CreateNativeFence.fenceFD = fenceFD; | ||
1610 | + } | ||
1611 | + break; | ||
1612 | +#endif | ||
1613 | + | ||
1614 | default: | ||
1615 | /* Invalid command. */ | ||
1616 | gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT); | ||
1617 | @@ -2856,6 +2909,8 @@ gckKERNEL_Recovery( | ||
1618 | return gcvSTATUS_OK; | ||
1619 | } | ||
1620 | |||
1621 | + gcmkPRINT("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core); | ||
1622 | + | ||
1623 | /* Start a timer to clear reset flag, before timer is expired, | ||
1624 | ** other recovery request is ignored. */ | ||
1625 | gcmkVERIFY_OK( | ||
1626 | @@ -3382,7 +3437,7 @@ gckLINKQUEUE_Dequeue( | ||
1627 | IN gckLINKQUEUE LinkQueue | ||
1628 | ) | ||
1629 | { | ||
1630 | - gcmASSERT(LinkQueue->count == gcdLINK_QUEUE_SIZE); | ||
1631 | + gcmkASSERT(LinkQueue->count == gcdLINK_QUEUE_SIZE); | ||
1632 | |||
1633 | LinkQueue->count--; | ||
1634 | LinkQueue->front = (LinkQueue->front + 1) % gcdLINK_QUEUE_SIZE; | ||
1635 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h | ||
1636 | index 5896e93..1c40df2 100644 | ||
1637 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h | ||
1638 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h | ||
1639 | @@ -140,8 +140,9 @@ typedef enum _gceDATABASE_TYPE | ||
1640 | gcvDB_CONTEXT, /* Context */ | ||
1641 | gcvDB_IDLE, /* GPU idle. */ | ||
1642 | gcvDB_MAP_MEMORY, /* Map memory */ | ||
1643 | - gcvDB_SHARED_INFO, /* Private data */ | ||
1644 | - gcvDB_MAP_USER_MEMORY /* Map user memory */ | ||
1645 | + gcvDB_SHARED_INFO, /* Private data */ | ||
1646 | + gcvDB_MAP_USER_MEMORY, /* Map user memory */ | ||
1647 | + gcvDB_SYNC_POINT, /* Sync point. */ | ||
1648 | } | ||
1649 | gceDATABASE_TYPE; | ||
1650 | |||
1651 | @@ -406,9 +407,6 @@ struct _gckKERNEL | ||
1652 | /* Enable profiling */ | ||
1653 | gctBOOL profileEnable; | ||
1654 | |||
1655 | - /* The profile file name */ | ||
1656 | - gctCHAR profileFileName[gcdMAX_PROFILE_FILE_NAME]; | ||
1657 | - | ||
1658 | /* Clear profile register or not*/ | ||
1659 | gctBOOL profileCleanRegister; | ||
1660 | |||
1661 | @@ -445,6 +443,10 @@ struct _gckKERNEL | ||
1662 | #if gcdDVFS | ||
1663 | gckDVFS dvfs; | ||
1664 | #endif | ||
1665 | + | ||
1666 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1667 | + gctHANDLE timeline; | ||
1668 | +#endif | ||
1669 | }; | ||
1670 | |||
1671 | struct _FrequencyHistory | ||
1672 | @@ -496,6 +498,11 @@ struct _gckCOMMAND | ||
1673 | /* Context switching mutex. */ | ||
1674 | gctPOINTER mutexContext; | ||
1675 | |||
1676 | +#if VIVANTE_PROFILER_CONTEXT | ||
1677 | + /* Context sequence mutex. */ | ||
1678 | + gctPOINTER mutexContextSeq; | ||
1679 | +#endif | ||
1680 | + | ||
1681 | /* Command queue power semaphore. */ | ||
1682 | gctPOINTER powerSemaphore; | ||
1683 | |||
1684 | @@ -649,6 +656,8 @@ struct _gckEVENT | ||
1685 | gctPOINTER eventListMutex; | ||
1686 | |||
1687 | gctPOINTER submitTimer; | ||
1688 | + | ||
1689 | + volatile gctBOOL inNotify; | ||
1690 | }; | ||
1691 | |||
1692 | /* Free all events belonging to a process. */ | ||
1693 | @@ -668,6 +677,11 @@ gckEVENT_Stop( | ||
1694 | IN OUT gctSIZE_T * waitSize | ||
1695 | ); | ||
1696 | |||
1697 | +gceSTATUS | ||
1698 | +gckEVENT_WaitEmpty( | ||
1699 | + IN gckEVENT Event | ||
1700 | + ); | ||
1701 | + | ||
1702 | /* gcuVIDMEM_NODE structure. */ | ||
1703 | typedef union _gcuVIDMEM_NODE | ||
1704 | { | ||
1705 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c | ||
1706 | index 9ee9ea1..73dab81 100644 | ||
1707 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c | ||
1708 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c | ||
1709 | @@ -494,6 +494,11 @@ gckCOMMAND_Construct( | ||
1710 | /* Create the context switching mutex. */ | ||
1711 | gcmkONERROR(gckOS_CreateMutex(os, &command->mutexContext)); | ||
1712 | |||
1713 | +#if VIVANTE_PROFILER_CONTEXT | ||
1714 | + /* Create the context switching mutex. */ | ||
1715 | + gcmkONERROR(gckOS_CreateMutex(os, &command->mutexContextSeq)); | ||
1716 | +#endif | ||
1717 | + | ||
1718 | /* Create the power management semaphore. */ | ||
1719 | gcmkONERROR(gckOS_CreateSemaphore(os, &command->powerSemaphore)); | ||
1720 | |||
1721 | @@ -572,6 +577,13 @@ OnError: | ||
1722 | gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexContext)); | ||
1723 | } | ||
1724 | |||
1725 | +#if VIVANTE_PROFILER_CONTEXT | ||
1726 | + if (command->mutexContextSeq != gcvNULL) | ||
1727 | + { | ||
1728 | + gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexContextSeq)); | ||
1729 | + } | ||
1730 | +#endif | ||
1731 | + | ||
1732 | if (command->mutexQueue != gcvNULL) | ||
1733 | { | ||
1734 | gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexQueue)); | ||
1735 | @@ -662,6 +674,11 @@ gckCOMMAND_Destroy( | ||
1736 | /* Delete the context switching mutex. */ | ||
1737 | gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexContext)); | ||
1738 | |||
1739 | +#if VIVANTE_PROFILER_CONTEXT | ||
1740 | + if (Command->mutexContextSeq != gcvNULL) | ||
1741 | + gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexContextSeq)); | ||
1742 | +#endif | ||
1743 | + | ||
1744 | /* Delete the command queue mutex. */ | ||
1745 | gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexQueue)); | ||
1746 | |||
1747 | @@ -1127,6 +1144,10 @@ gckCOMMAND_Commit( | ||
1748 | # endif | ||
1749 | #endif | ||
1750 | |||
1751 | +#if VIVANTE_PROFILER_CONTEXT | ||
1752 | + gctBOOL sequenceAcquired = gcvFALSE; | ||
1753 | +#endif | ||
1754 | + | ||
1755 | gctPOINTER pointer = gcvNULL; | ||
1756 | |||
1757 | gcmkHEADER_ARG( | ||
1758 | @@ -1145,6 +1166,17 @@ gckCOMMAND_Commit( | ||
1759 | |||
1760 | gcmkONERROR(_FlushMMU(Command)); | ||
1761 | |||
1762 | +#if VIVANTE_PROFILER_CONTEXT | ||
1763 | + if((Command->kernel->hardware->gpuProfiler) && (Command->kernel->profileEnable)) | ||
1764 | + { | ||
1765 | + /* Acquire the context sequnence mutex. */ | ||
1766 | + gcmkONERROR(gckOS_AcquireMutex( | ||
1767 | + Command->os, Command->mutexContextSeq, gcvINFINITE | ||
1768 | + )); | ||
1769 | + sequenceAcquired = gcvTRUE; | ||
1770 | + } | ||
1771 | +#endif | ||
1772 | + | ||
1773 | /* Acquire the command queue. */ | ||
1774 | gcmkONERROR(gckCOMMAND_EnterCommit(Command, gcvFALSE)); | ||
1775 | commitEntered = gcvTRUE; | ||
1776 | @@ -2002,6 +2034,23 @@ gckCOMMAND_Commit( | ||
1777 | gcmkONERROR(gckCOMMAND_ExitCommit(Command, gcvFALSE)); | ||
1778 | commitEntered = gcvFALSE; | ||
1779 | |||
1780 | +#if VIVANTE_PROFILER_CONTEXT | ||
1781 | + if(sequenceAcquired) | ||
1782 | + { | ||
1783 | + gcmkONERROR(gckCOMMAND_Stall(Command, gcvTRUE)); | ||
1784 | + if (Command->currContext) | ||
1785 | + { | ||
1786 | + gcmkONERROR(gckHARDWARE_UpdateContextProfile( | ||
1787 | + hardware, | ||
1788 | + Command->currContext)); | ||
1789 | + } | ||
1790 | + | ||
1791 | + /* Release the context switching mutex. */ | ||
1792 | + gcmkONERROR(gckOS_ReleaseMutex(Command->os, Command->mutexContextSeq)); | ||
1793 | + sequenceAcquired = gcvFALSE; | ||
1794 | + } | ||
1795 | +#endif | ||
1796 | + | ||
1797 | /* Loop while there are records in the queue. */ | ||
1798 | while (EventQueue != gcvNULL) | ||
1799 | { | ||
1800 | @@ -2114,6 +2163,14 @@ OnError: | ||
1801 | gcmkVERIFY_OK(gckCOMMAND_ExitCommit(Command, gcvFALSE)); | ||
1802 | } | ||
1803 | |||
1804 | +#if VIVANTE_PROFILER_CONTEXT | ||
1805 | + if (sequenceAcquired) | ||
1806 | + { | ||
1807 | + /* Release the context sequence mutex. */ | ||
1808 | + gcmkVERIFY_OK(gckOS_ReleaseMutex(Command->os, Command->mutexContextSeq)); | ||
1809 | + } | ||
1810 | +#endif | ||
1811 | + | ||
1812 | /* Unmap the command buffer pointer. */ | ||
1813 | if (commandBufferMapped) | ||
1814 | { | ||
1815 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c | ||
1816 | index 76c1c10..1a7c340 100644 | ||
1817 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c | ||
1818 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c | ||
1819 | @@ -2819,6 +2819,7 @@ gckVGCOMMAND_Construct( | ||
1820 | ** Enable TS overflow interrupt. | ||
1821 | */ | ||
1822 | |||
1823 | + command->info.tsOverflowInt = 0; | ||
1824 | gcmkERR_BREAK(gckVGINTERRUPT_Enable( | ||
1825 | Kernel->interrupt, | ||
1826 | &command->info.tsOverflowInt, | ||
1827 | @@ -3406,38 +3407,26 @@ gckVGCOMMAND_Commit( | ||
1828 | gctBOOL previousExecuted; | ||
1829 | gctUINT controlIndex; | ||
1830 | |||
1831 | + gcmkERR_BREAK(gckVGHARDWARE_SetPowerManagementState( | ||
1832 | + Command->hardware, gcvPOWER_ON_AUTO | ||
1833 | + )); | ||
1834 | + | ||
1835 | + /* Acquire the power semaphore. */ | ||
1836 | + gcmkERR_BREAK(gckOS_AcquireSemaphore( | ||
1837 | + Command->os, Command->powerSemaphore | ||
1838 | + )); | ||
1839 | + | ||
1840 | /* Acquire the mutex. */ | ||
1841 | - gcmkERR_BREAK(gckOS_AcquireMutex( | ||
1842 | + status = gckOS_AcquireMutex( | ||
1843 | Command->os, | ||
1844 | Command->commitMutex, | ||
1845 | gcvINFINITE | ||
1846 | - )); | ||
1847 | - | ||
1848 | - status = gckVGHARDWARE_SetPowerManagementState( | ||
1849 | - Command->hardware, gcvPOWER_ON_AUTO); | ||
1850 | - | ||
1851 | - if (gcmIS_ERROR(status)) | ||
1852 | - { | ||
1853 | - /* Acquire the mutex. */ | ||
1854 | - gcmkVERIFY_OK(gckOS_ReleaseMutex( | ||
1855 | - Command->os, | ||
1856 | - Command->commitMutex | ||
1857 | - )); | ||
1858 | - | ||
1859 | - break; | ||
1860 | - } | ||
1861 | - /* Acquire the power semaphore. */ | ||
1862 | - status = gckOS_AcquireSemaphore( | ||
1863 | - Command->os, Command->powerSemaphore); | ||
1864 | + ); | ||
1865 | |||
1866 | if (gcmIS_ERROR(status)) | ||
1867 | { | ||
1868 | - /* Acquire the mutex. */ | ||
1869 | - gcmkVERIFY_OK(gckOS_ReleaseMutex( | ||
1870 | - Command->os, | ||
1871 | - Command->commitMutex | ||
1872 | - )); | ||
1873 | - | ||
1874 | + gcmkVERIFY_OK(gckOS_ReleaseSemaphore( | ||
1875 | + Command->os, Command->powerSemaphore)); | ||
1876 | break; | ||
1877 | } | ||
1878 | |||
1879 | @@ -3669,14 +3658,14 @@ gckVGCOMMAND_Commit( | ||
1880 | } | ||
1881 | while (gcvFALSE); | ||
1882 | |||
1883 | - gcmkVERIFY_OK(gckOS_ReleaseSemaphore( | ||
1884 | - Command->os, Command->powerSemaphore)); | ||
1885 | - | ||
1886 | /* Release the mutex. */ | ||
1887 | gcmkCHECK_STATUS(gckOS_ReleaseMutex( | ||
1888 | Command->os, | ||
1889 | Command->commitMutex | ||
1890 | )); | ||
1891 | + | ||
1892 | + gcmkVERIFY_OK(gckOS_ReleaseSemaphore( | ||
1893 | + Command->os, Command->powerSemaphore)); | ||
1894 | } | ||
1895 | while (gcvFALSE); | ||
1896 | |||
1897 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c | ||
1898 | index 673d4f7..134351a 100644 | ||
1899 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c | ||
1900 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c | ||
1901 | @@ -1307,6 +1307,18 @@ gckKERNEL_DestroyProcessDB( | ||
1902 | status = gckOS_FreeMemory(Kernel->os, record->physical); | ||
1903 | break; | ||
1904 | |||
1905 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1906 | + case gcvDB_SYNC_POINT: | ||
1907 | + /* Free the user signal. */ | ||
1908 | + status = gckOS_DestroySyncPoint(Kernel->os, | ||
1909 | + (gctSYNC_POINT) record->data); | ||
1910 | + | ||
1911 | + gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DATABASE, | ||
1912 | + "DB: SYNC POINT %d (status=%d)", | ||
1913 | + (gctINT)(gctUINTPTR_T)record->data, status); | ||
1914 | + break; | ||
1915 | +#endif | ||
1916 | + | ||
1917 | default: | ||
1918 | gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DATABASE, | ||
1919 | "DB: Correcupted record=0x%08x type=%d", | ||
1920 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c | ||
1921 | index 217f7f1..2d81a56 100644 | ||
1922 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c | ||
1923 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c | ||
1924 | @@ -931,6 +931,7 @@ gckEVENT_AddList( | ||
1925 | || (Interface->command == gcvHAL_TIMESTAMP) | ||
1926 | || (Interface->command == gcvHAL_COMMIT_DONE) | ||
1927 | || (Interface->command == gcvHAL_FREE_VIRTUAL_COMMAND_BUFFER) | ||
1928 | + || (Interface->command == gcvHAL_SYNC_POINT) | ||
1929 | ); | ||
1930 | |||
1931 | /* Validate the source. */ | ||
1932 | @@ -2131,6 +2132,9 @@ gckEVENT_Notify( | ||
1933 | gcvINFINITE)); | ||
1934 | acquired = gcvTRUE; | ||
1935 | |||
1936 | + /* We are in the notify loop. */ | ||
1937 | + Event->inNotify = gcvTRUE; | ||
1938 | + | ||
1939 | /* Grab the event head. */ | ||
1940 | record = queue->head; | ||
1941 | |||
1942 | @@ -2463,6 +2467,17 @@ gckEVENT_Notify( | ||
1943 | break; | ||
1944 | #endif | ||
1945 | |||
1946 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
1947 | + case gcvHAL_SYNC_POINT: | ||
1948 | + { | ||
1949 | + gctSYNC_POINT syncPoint; | ||
1950 | + | ||
1951 | + syncPoint = gcmUINT64_TO_PTR(record->info.u.SyncPoint.syncPoint); | ||
1952 | + status = gckOS_SignalSyncPoint(Event->os, syncPoint); | ||
1953 | + } | ||
1954 | + break; | ||
1955 | +#endif | ||
1956 | + | ||
1957 | case gcvHAL_COMMIT_DONE: | ||
1958 | break; | ||
1959 | |||
1960 | @@ -2505,6 +2520,9 @@ gckEVENT_Notify( | ||
1961 | gcmkONERROR(_TryToIdleGPU(Event)); | ||
1962 | } | ||
1963 | |||
1964 | + /* We are out the notify loop. */ | ||
1965 | + Event->inNotify = gcvFALSE; | ||
1966 | + | ||
1967 | /* Success. */ | ||
1968 | gcmkFOOTER_NO(); | ||
1969 | return gcvSTATUS_OK; | ||
1970 | @@ -2524,6 +2542,9 @@ OnError: | ||
1971 | } | ||
1972 | #endif | ||
1973 | |||
1974 | + /* We are out the notify loop. */ | ||
1975 | + Event->inNotify = gcvFALSE; | ||
1976 | + | ||
1977 | /* Return the status. */ | ||
1978 | gcmkFOOTER(); | ||
1979 | return status; | ||
1980 | @@ -2871,3 +2892,11 @@ gckEVENT_Dump( | ||
1981 | return gcvSTATUS_OK; | ||
1982 | } | ||
1983 | |||
1984 | +gceSTATUS gckEVENT_WaitEmpty(gckEVENT Event) | ||
1985 | +{ | ||
1986 | + gctBOOL isEmpty; | ||
1987 | + | ||
1988 | + while (Event->inNotify || (gcmIS_SUCCESS(gckEVENT_IsEmpty(Event, &isEmpty)) && !isEmpty)) ; | ||
1989 | + | ||
1990 | + return gcvSTATUS_OK; | ||
1991 | +} | ||
1992 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c | ||
1993 | index 8ac187b..50bc63e 100644 | ||
1994 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c | ||
1995 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c | ||
1996 | @@ -794,6 +794,9 @@ gckVGINTERRUPT_Enque( | ||
1997 | Interrupt->kernel->hardware, &triggered | ||
1998 | )); | ||
1999 | |||
2000 | + /* Mask out TS overflow interrupt */ | ||
2001 | + triggered &= 0xfffffffe; | ||
2002 | + | ||
2003 | /* No interrupts to process? */ | ||
2004 | if (triggered == 0) | ||
2005 | { | ||
2006 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c | ||
2007 | index c7f67c7..e4ca497 100644 | ||
2008 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c | ||
2009 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c | ||
2010 | @@ -1436,7 +1436,7 @@ gckMMU_AllocatePages( | ||
2011 | acquired = gcvTRUE; | ||
2012 | |||
2013 | /* Allocate page table for current MMU. */ | ||
2014 | - for (i = 0; i < mirrorPageTable->reference; i++) | ||
2015 | + for (i = 0; i < (gctINT)mirrorPageTable->reference; i++) | ||
2016 | { | ||
2017 | if (Mmu == mirrorPageTable->mmus[i]) | ||
2018 | { | ||
2019 | @@ -1446,7 +1446,7 @@ gckMMU_AllocatePages( | ||
2020 | } | ||
2021 | |||
2022 | /* Allocate page table for other MMUs. */ | ||
2023 | - for (i = 0; i < mirrorPageTable->reference; i++) | ||
2024 | + for (i = 0; i < (gctINT)mirrorPageTable->reference; i++) | ||
2025 | { | ||
2026 | mmu = mirrorPageTable->mmus[i]; | ||
2027 | |||
2028 | @@ -1500,7 +1500,7 @@ gckMMU_FreePages( | ||
2029 | |||
2030 | offset = (gctUINT32)PageTable - (gctUINT32)Mmu->pageTableLogical; | ||
2031 | |||
2032 | - for (i = 0; i < mirrorPageTable->reference; i++) | ||
2033 | + for (i = 0; i < (gctINT)mirrorPageTable->reference; i++) | ||
2034 | { | ||
2035 | mmu = mirrorPageTable->mmus[i]; | ||
2036 | |||
2037 | @@ -1639,7 +1639,7 @@ gckMMU_SetPage( | ||
2038 | _WritePageEntry(PageEntry, data); | ||
2039 | |||
2040 | #if gcdMIRROR_PAGETABLE | ||
2041 | - for (i = 0; i < mirrorPageTable->reference; i++) | ||
2042 | + for (i = 0; i < (gctINT)mirrorPageTable->reference; i++) | ||
2043 | { | ||
2044 | mmu = mirrorPageTable->mmus[i]; | ||
2045 | |||
2046 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c | ||
2047 | index 8b8bbdc..3b5dd82 100644 | ||
2048 | --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c | ||
2049 | +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c | ||
2050 | @@ -1582,6 +1582,7 @@ _NeedVirtualMapping( | ||
2051 | gctUINT32 end; | ||
2052 | gcePOOL pool; | ||
2053 | gctUINT32 offset; | ||
2054 | + gctUINT32 baseAddress; | ||
2055 | |||
2056 | gcmkHEADER_ARG("Node=0x%X", Node); | ||
2057 | |||
2058 | @@ -1601,10 +1602,16 @@ _NeedVirtualMapping( | ||
2059 | else | ||
2060 | #endif | ||
2061 | { | ||
2062 | - /* For cores which can't access all physical address. */ | ||
2063 | - gcmkONERROR(gckHARDWARE_ConvertLogical(Kernel->hardware, | ||
2064 | - Node->Virtual.logical, | ||
2065 | - &phys)); | ||
2066 | + /* Convert logical address into a physical address. */ | ||
2067 | + gcmkONERROR( | ||
2068 | + gckOS_GetPhysicalAddress(Kernel->os, Node->Virtual.logical, &phys)); | ||
2069 | + | ||
2070 | + gcmkONERROR(gckOS_GetBaseAddress(Kernel->os, &baseAddress)); | ||
2071 | + | ||
2072 | + gcmkASSERT(phys >= baseAddress); | ||
2073 | + | ||
2074 | + /* Subtract baseAddress to get a GPU address used for programming. */ | ||
2075 | + phys -= baseAddress; | ||
2076 | |||
2077 | /* If part of region is belong to gcvPOOL_VIRTUAL, | ||
2078 | ** whole region has to be mapped. */ | ||
2079 | @@ -1734,6 +1741,11 @@ gckVIDMEM_Lock( | ||
2080 | gcmkONERROR(gckOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE)); | ||
2081 | acquired = gcvTRUE; | ||
2082 | |||
2083 | +#if gcdPAGED_MEMORY_CACHEABLE | ||
2084 | + /* Force video memory cacheable. */ | ||
2085 | + Cacheable = gcvTRUE; | ||
2086 | +#endif | ||
2087 | + | ||
2088 | gcmkONERROR( | ||
2089 | gckOS_LockPages(os, | ||
2090 | Node->Virtual.physical, | ||
2091 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h | ||
2092 | index 4406d7e..7312cc2 100644 | ||
2093 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h | ||
2094 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h | ||
2095 | @@ -123,6 +123,12 @@ extern "C" { | ||
2096 | |||
2097 | #define gcvINVALID_ADDRESS ~0U | ||
2098 | |||
2099 | +#define gcmGET_PRE_ROTATION(rotate) \ | ||
2100 | + ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))) | ||
2101 | + | ||
2102 | +#define gcmGET_POST_ROTATION(rotate) \ | ||
2103 | + ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)) | ||
2104 | + | ||
2105 | /******************************************************************************\ | ||
2106 | ******************************** gcsOBJECT Object ******************************* | ||
2107 | \******************************************************************************/ | ||
2108 | @@ -1124,6 +1130,60 @@ gckOS_UnmapUserMemory( | ||
2109 | IN gctUINT32 Address | ||
2110 | ); | ||
2111 | |||
2112 | +/******************************************************************************\ | ||
2113 | +************************** Android Native Fence Sync *************************** | ||
2114 | +\******************************************************************************/ | ||
2115 | +gceSTATUS | ||
2116 | +gckOS_CreateSyncTimeline( | ||
2117 | + IN gckOS Os, | ||
2118 | + OUT gctHANDLE * Timeline | ||
2119 | + ); | ||
2120 | + | ||
2121 | +gceSTATUS | ||
2122 | +gckOS_DestroySyncTimeline( | ||
2123 | + IN gckOS Os, | ||
2124 | + IN gctHANDLE Timeline | ||
2125 | + ); | ||
2126 | + | ||
2127 | +gceSTATUS | ||
2128 | +gckOS_CreateSyncPoint( | ||
2129 | + IN gckOS Os, | ||
2130 | + OUT gctSYNC_POINT * SyncPoint | ||
2131 | + ); | ||
2132 | + | ||
2133 | +gceSTATUS | ||
2134 | +gckOS_ReferenceSyncPoint( | ||
2135 | + IN gckOS Os, | ||
2136 | + IN gctSYNC_POINT SyncPoint | ||
2137 | + ); | ||
2138 | + | ||
2139 | +gceSTATUS | ||
2140 | +gckOS_DestroySyncPoint( | ||
2141 | + IN gckOS Os, | ||
2142 | + IN gctSYNC_POINT SyncPoint | ||
2143 | + ); | ||
2144 | + | ||
2145 | +gceSTATUS | ||
2146 | +gckOS_SignalSyncPoint( | ||
2147 | + IN gckOS Os, | ||
2148 | + IN gctSYNC_POINT SyncPoint | ||
2149 | + ); | ||
2150 | + | ||
2151 | +gceSTATUS | ||
2152 | +gckOS_QuerySyncPoint( | ||
2153 | + IN gckOS Os, | ||
2154 | + IN gctSYNC_POINT SyncPoint, | ||
2155 | + OUT gctBOOL_PTR State | ||
2156 | + ); | ||
2157 | + | ||
2158 | +gceSTATUS | ||
2159 | +gckOS_CreateNativeFence( | ||
2160 | + IN gckOS Os, | ||
2161 | + IN gctHANDLE Timeline, | ||
2162 | + IN gctSYNC_POINT SyncPoint, | ||
2163 | + OUT gctINT * FenceFD | ||
2164 | + ); | ||
2165 | + | ||
2166 | #if !USE_NEW_LINUX_SIGNAL | ||
2167 | /* Create signal to be used in the user space. */ | ||
2168 | gceSTATUS | ||
2169 | @@ -1758,7 +1818,7 @@ gckKERNEL_Recovery( | ||
2170 | void | ||
2171 | gckKERNEL_SetTimeOut( | ||
2172 | IN gckKERNEL Kernel, | ||
2173 | - IN gctUINT32 timeOut | ||
2174 | + IN gctUINT32 timeOut | ||
2175 | ); | ||
2176 | |||
2177 | /* Get access to the user data. */ | ||
2178 | @@ -2078,6 +2138,12 @@ gckHARDWARE_SetPowerManagement( | ||
2179 | IN gctBOOL PowerManagement | ||
2180 | ); | ||
2181 | |||
2182 | +gceSTATUS | ||
2183 | +gckHARDWARE_SetGpuProfiler( | ||
2184 | + IN gckHARDWARE Hardware, | ||
2185 | + IN gctBOOL GpuProfiler | ||
2186 | + ); | ||
2187 | + | ||
2188 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
2189 | gceSTATUS | ||
2190 | gckHARDWARE_SetFscaleValue( | ||
2191 | @@ -2554,6 +2620,22 @@ gckHARDWARE_QueryProfileRegisters( | ||
2192 | ); | ||
2193 | #endif | ||
2194 | |||
2195 | +#if VIVANTE_PROFILER_CONTEXT | ||
2196 | +gceSTATUS | ||
2197 | +gckHARDWARE_QueryContextProfile( | ||
2198 | + IN gckHARDWARE Hardware, | ||
2199 | + IN gctBOOL Clear, | ||
2200 | + IN gckCONTEXT Context, | ||
2201 | + OUT gcsPROFILER_COUNTERS * Counters | ||
2202 | + ); | ||
2203 | + | ||
2204 | +gceSTATUS | ||
2205 | +gckHARDWARE_UpdateContextProfile( | ||
2206 | + IN gckHARDWARE Hardware, | ||
2207 | + IN gckCONTEXT Context | ||
2208 | + ); | ||
2209 | +#endif | ||
2210 | + | ||
2211 | gceSTATUS | ||
2212 | gckOS_SignalQueryHardware( | ||
2213 | IN gckOS Os, | ||
2214 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h | ||
2215 | index 44689b0..9c17114 100644 | ||
2216 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h | ||
2217 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h | ||
2218 | @@ -71,10 +71,17 @@ typedef struct _gcoFENCE * gcoFENCE; | ||
2219 | typedef struct _gcsSYNC_CONTEXT * gcsSYNC_CONTEXT_PTR; | ||
2220 | #endif | ||
2221 | |||
2222 | +typedef struct _gcoOS_SymbolsList gcoOS_SymbolsList; | ||
2223 | + | ||
2224 | /******************************************************************************\ | ||
2225 | ******************************* Process local storage ************************* | ||
2226 | \******************************************************************************/ | ||
2227 | typedef struct _gcsPLS * gcsPLS_PTR; | ||
2228 | + | ||
2229 | +typedef void (* gctPLS_DESTRUCTOR) ( | ||
2230 | + gcsPLS_PTR | ||
2231 | + ); | ||
2232 | + | ||
2233 | typedef struct _gcsPLS | ||
2234 | { | ||
2235 | /* Global objects. */ | ||
2236 | @@ -103,6 +110,12 @@ typedef struct _gcsPLS | ||
2237 | |||
2238 | /* PorcessID of the constrcutor process */ | ||
2239 | gctUINT32 processID; | ||
2240 | +#if gcdFORCE_GAL_LOAD_TWICE | ||
2241 | + /* ThreadID of the constrcutor process. */ | ||
2242 | + gctSIZE_T threadID; | ||
2243 | + /* Flag for calling module destructor. */ | ||
2244 | + gctBOOL exiting; | ||
2245 | +#endif | ||
2246 | |||
2247 | /* Reference count for destructor. */ | ||
2248 | gcsATOM_PTR reference; | ||
2249 | @@ -111,6 +124,8 @@ typedef struct _gcsPLS | ||
2250 | gctBOOL bNeedSupportNP2Texture; | ||
2251 | #endif | ||
2252 | |||
2253 | + /* Destructor for eglDisplayInfo. */ | ||
2254 | + gctPLS_DESTRUCTOR destructor; | ||
2255 | } | ||
2256 | gcsPLS; | ||
2257 | |||
2258 | @@ -148,6 +163,11 @@ typedef struct _gcsTLS | ||
2259 | #endif | ||
2260 | gco2D engine2D; | ||
2261 | gctBOOL copied; | ||
2262 | + | ||
2263 | +#if gcdFORCE_GAL_LOAD_TWICE | ||
2264 | + /* libGAL.so handle */ | ||
2265 | + gctHANDLE handle; | ||
2266 | +#endif | ||
2267 | } | ||
2268 | gcsTLS; | ||
2269 | |||
2270 | @@ -160,6 +180,7 @@ typedef enum _gcePLS_VALUE | ||
2271 | gcePLS_VALUE_EGL_DISPLAY_INFO, | ||
2272 | gcePLS_VALUE_EGL_SURFACE_INFO, | ||
2273 | gcePLS_VALUE_EGL_CONFIG_FORMAT_INFO, | ||
2274 | + gcePLS_VALUE_EGL_DESTRUCTOR_INFO, | ||
2275 | } | ||
2276 | gcePLS_VALUE; | ||
2277 | |||
2278 | @@ -577,6 +598,12 @@ gcoHAL_Call( | ||
2279 | IN OUT gcsHAL_INTERFACE_PTR Interface | ||
2280 | ); | ||
2281 | |||
2282 | +gceSTATUS | ||
2283 | +gcoHAL_GetPatchID( | ||
2284 | + IN gcoHAL Hal, | ||
2285 | + OUT gcePATCH_ID * PatchID | ||
2286 | + ); | ||
2287 | + | ||
2288 | /* Schedule an event. */ | ||
2289 | gceSTATUS | ||
2290 | gcoHAL_ScheduleEvent( | ||
2291 | @@ -637,6 +664,16 @@ gcoHAL_QuerySeparated3D2D( | ||
2292 | IN gcoHAL Hal | ||
2293 | ); | ||
2294 | |||
2295 | +gceSTATUS | ||
2296 | +gcoHAL_QuerySpecialHint( | ||
2297 | + IN gceSPECIAL_HINT Hint | ||
2298 | + ); | ||
2299 | + | ||
2300 | +gceSTATUS | ||
2301 | +gcoHAL_SetSpecialHintData( | ||
2302 | + IN gcoHARDWARE Hardware | ||
2303 | + ); | ||
2304 | + | ||
2305 | /* Get pointer to gcoVG object. */ | ||
2306 | gceSTATUS | ||
2307 | gcoHAL_GetVGEngine( | ||
2308 | @@ -786,7 +823,6 @@ gcoOS_FreeVideoMemory( | ||
2309 | IN gctPOINTER Handle | ||
2310 | ); | ||
2311 | |||
2312 | -#if gcdENABLE_BANK_ALIGNMENT | ||
2313 | gceSTATUS | ||
2314 | gcoSURF_GetBankOffsetBytes( | ||
2315 | IN gcoSURF Surfce, | ||
2316 | @@ -794,7 +830,6 @@ gcoSURF_GetBankOffsetBytes( | ||
2317 | IN gctUINT32 Stride, | ||
2318 | IN gctUINT32_PTR Bytes | ||
2319 | ); | ||
2320 | -#endif | ||
2321 | |||
2322 | /* Map user memory. */ | ||
2323 | gceSTATUS | ||
2324 | @@ -918,6 +953,21 @@ gcoOS_Flush( | ||
2325 | IN gctFILE File | ||
2326 | ); | ||
2327 | |||
2328 | +/* Close a file descriptor. */ | ||
2329 | +gceSTATUS | ||
2330 | +gcoOS_CloseFD( | ||
2331 | + IN gcoOS Os, | ||
2332 | + IN gctINT FD | ||
2333 | + ); | ||
2334 | + | ||
2335 | +/* Dup file descriptor to another. */ | ||
2336 | +gceSTATUS | ||
2337 | +gcoOS_DupFD( | ||
2338 | + IN gcoOS Os, | ||
2339 | + IN gctINT FD, | ||
2340 | + OUT gctINT * FD2 | ||
2341 | + ); | ||
2342 | + | ||
2343 | /* Create an endpoint for communication. */ | ||
2344 | gceSTATUS | ||
2345 | gcoOS_Socket( | ||
2346 | @@ -977,6 +1027,14 @@ gcoOS_GetEnv( | ||
2347 | OUT gctSTRING * Value | ||
2348 | ); | ||
2349 | |||
2350 | +/* Set environment variable value. */ | ||
2351 | +gceSTATUS | ||
2352 | +gcoOS_SetEnv( | ||
2353 | + IN gcoOS Os, | ||
2354 | + IN gctCONST_STRING VarName, | ||
2355 | + IN gctSTRING Value | ||
2356 | + ); | ||
2357 | + | ||
2358 | /* Get current working directory. */ | ||
2359 | gceSTATUS | ||
2360 | gcoOS_GetCwd( | ||
2361 | @@ -1210,6 +1268,13 @@ gcoOS_DetectProcessByEncryptedName( | ||
2362 | IN gctCONST_STRING Name | ||
2363 | ); | ||
2364 | |||
2365 | +#if defined(ANDROID) | ||
2366 | +gceSTATUS | ||
2367 | +gcoOS_DetectProgrameByEncryptedSymbols( | ||
2368 | + IN gcoOS_SymbolsList Symbols | ||
2369 | + ); | ||
2370 | +#endif | ||
2371 | + | ||
2372 | /*----------------------------------------------------------------------------*/ | ||
2373 | /*----- Atoms ----------------------------------------------------------------*/ | ||
2374 | |||
2375 | @@ -1403,6 +1468,42 @@ gcoOS_UnmapSignal( | ||
2376 | IN gctSIGNAL Signal | ||
2377 | ); | ||
2378 | |||
2379 | +/*----------------------------------------------------------------------------*/ | ||
2380 | +/*----- Android Native Fence -------------------------------------------------*/ | ||
2381 | + | ||
2382 | +/* Create sync point. */ | ||
2383 | +gceSTATUS | ||
2384 | +gcoOS_CreateSyncPoint( | ||
2385 | + IN gcoOS Os, | ||
2386 | + OUT gctSYNC_POINT * SyncPoint | ||
2387 | + ); | ||
2388 | + | ||
2389 | +/* Destroy sync point. */ | ||
2390 | +gceSTATUS | ||
2391 | +gcoOS_DestroySyncPoint( | ||
2392 | + IN gcoOS Os, | ||
2393 | + IN gctSYNC_POINT SyncPoint | ||
2394 | + ); | ||
2395 | + | ||
2396 | +/* Create native fence. */ | ||
2397 | +gceSTATUS | ||
2398 | +gcoOS_CreateNativeFence( | ||
2399 | + IN gcoOS Os, | ||
2400 | + IN gctSYNC_POINT SyncPoint, | ||
2401 | + OUT gctINT * FenceFD | ||
2402 | + ); | ||
2403 | + | ||
2404 | +/* Wait on native fence. */ | ||
2405 | +gceSTATUS | ||
2406 | +gcoOS_WaitNativeFence( | ||
2407 | + IN gcoOS Os, | ||
2408 | + IN gctINT FenceFD, | ||
2409 | + IN gctUINT32 Timeout | ||
2410 | + ); | ||
2411 | + | ||
2412 | +/*----------------------------------------------------------------------------*/ | ||
2413 | +/*----- Memory Access and Cache ----------------------------------------------*/ | ||
2414 | + | ||
2415 | /* Write a register. */ | ||
2416 | gceSTATUS | ||
2417 | gcoOS_WriteRegister( | ||
2418 | @@ -1507,7 +1608,7 @@ gcoOS_QueryProfileTickRate( | ||
2419 | # define gcmPROFILE_QUERY(start, ticks) do { } while (gcvFALSE) | ||
2420 | # define gcmPROFILE_ONLY(x) do { } while (gcvFALSE) | ||
2421 | # define gcmPROFILE_ELSE(x) x | ||
2422 | -# define gcmPROFILE_DECLARE_ONLY(x) typedef x | ||
2423 | +# define gcmPROFILE_DECLARE_ONLY(x) do { } while (gcvFALSE) | ||
2424 | # define gcmPROFILE_DECLARE_ELSE(x) x | ||
2425 | #endif | ||
2426 | |||
2427 | @@ -1579,6 +1680,28 @@ typedef struct _gcsRECT | ||
2428 | } | ||
2429 | gcsRECT; | ||
2430 | |||
2431 | +typedef union _gcsPIXEL | ||
2432 | +{ | ||
2433 | + struct | ||
2434 | + { | ||
2435 | + gctFLOAT r, g, b, a; | ||
2436 | + gctFLOAT d, s; | ||
2437 | + } pf; | ||
2438 | + | ||
2439 | + struct | ||
2440 | + { | ||
2441 | + gctINT32 r, g, b, a; | ||
2442 | + gctINT32 d, s; | ||
2443 | + } pi; | ||
2444 | + | ||
2445 | + struct | ||
2446 | + { | ||
2447 | + gctUINT32 r, g, b, a; | ||
2448 | + gctUINT32 d, s; | ||
2449 | + } pui; | ||
2450 | + | ||
2451 | +} gcsPIXEL; | ||
2452 | + | ||
2453 | |||
2454 | /******************************************************************************\ | ||
2455 | ********************************* gcoSURF Object ******************************** | ||
2456 | @@ -1795,6 +1918,18 @@ gcoSURF_SetRotation( | ||
2457 | ); | ||
2458 | |||
2459 | gceSTATUS | ||
2460 | +gcoSURF_SetPreRotation( | ||
2461 | + IN gcoSURF Surface, | ||
2462 | + IN gceSURF_ROTATION Rotation | ||
2463 | + ); | ||
2464 | + | ||
2465 | +gceSTATUS | ||
2466 | +gcoSURF_GetPreRotation( | ||
2467 | + IN gcoSURF Surface, | ||
2468 | + IN gceSURF_ROTATION *Rotation | ||
2469 | + ); | ||
2470 | + | ||
2471 | +gceSTATUS | ||
2472 | gcoSURF_IsValid( | ||
2473 | IN gcoSURF Surface | ||
2474 | ); | ||
2475 | @@ -1824,6 +1959,15 @@ gcoSURF_DisableTileStatus( | ||
2476 | IN gcoSURF Surface, | ||
2477 | IN gctBOOL Decompress | ||
2478 | ); | ||
2479 | + | ||
2480 | +gceSTATUS | ||
2481 | +gcoSURF_AlignResolveRect( | ||
2482 | + IN gcoSURF Surf, | ||
2483 | + IN gcsPOINT_PTR RectOrigin, | ||
2484 | + IN gcsPOINT_PTR RectSize, | ||
2485 | + OUT gcsPOINT_PTR AlignedOrigin, | ||
2486 | + OUT gcsPOINT_PTR AlignedSize | ||
2487 | + ); | ||
2488 | #endif /* VIVANTE_NO_3D */ | ||
2489 | |||
2490 | /* Get surface size. */ | ||
2491 | @@ -1910,6 +2054,9 @@ gcoSURF_FillFromTile( | ||
2492 | IN gcoSURF Surface | ||
2493 | ); | ||
2494 | |||
2495 | +/* Check if surface needs a filler. */ | ||
2496 | +gceSTATUS gcoSURF_NeedFiller(IN gcoSURF Surface); | ||
2497 | + | ||
2498 | /* Fill surface with a value. */ | ||
2499 | gceSTATUS | ||
2500 | gcoSURF_Fill( | ||
2501 | @@ -1949,6 +2096,19 @@ gcoSURF_SetBuffer( | ||
2502 | IN gctUINT32 Physical | ||
2503 | ); | ||
2504 | |||
2505 | +/* Set the underlying video buffer for the surface wrapper. */ | ||
2506 | +gceSTATUS | ||
2507 | +gcoSURF_SetVideoBuffer( | ||
2508 | + IN gcoSURF Surface, | ||
2509 | + IN gceSURF_TYPE Type, | ||
2510 | + IN gceSURF_FORMAT Format, | ||
2511 | + IN gctUINT Width, | ||
2512 | + IN gctUINT Height, | ||
2513 | + IN gctUINT Stride, | ||
2514 | + IN gctPOINTER *LogicalPlane1, | ||
2515 | + IN gctUINT32 *PhysicalPlane1 | ||
2516 | + ); | ||
2517 | + | ||
2518 | /* Set the size of the surface in pixels and map the underlying buffer. */ | ||
2519 | gceSTATUS | ||
2520 | gcoSURF_SetWindow( | ||
2521 | @@ -3705,6 +3865,12 @@ gcGetUserDebugOption( | ||
2522 | void | ||
2523 | ); | ||
2524 | |||
2525 | +struct _gcoOS_SymbolsList | ||
2526 | +{ | ||
2527 | + gcePATCH_ID patchId; | ||
2528 | + const char * symList[10]; | ||
2529 | +}; | ||
2530 | + | ||
2531 | #if gcdHAS_ELLIPSES | ||
2532 | #define gcmUSER_DEBUG_MSG(level, ...) \ | ||
2533 | do \ | ||
2534 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h | ||
2535 | index 8693c37..062224c 100644 | ||
2536 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h | ||
2537 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h | ||
2538 | @@ -39,12 +39,10 @@ extern "C" { | ||
2539 | #define GC_ENABLE_LOADTIME_OPT 1 | ||
2540 | #endif | ||
2541 | |||
2542 | -#define TEMP_OPT_CONSTANT_TEXLD_COORD 1 | ||
2543 | +#define TEMP_OPT_CONSTANT_TEXLD_COORD 0 | ||
2544 | |||
2545 | #define TEMP_SHADER_PATCH 1 | ||
2546 | |||
2547 | -#define ADD_PRE_ROTATION_TO_VS 0 | ||
2548 | - | ||
2549 | #define TEMP_INLINE_ALL_EXPANSION 1 | ||
2550 | /******************************* IR VERSION ******************/ | ||
2551 | #define gcdSL_IR_VERSION gcmCC('\0','\0','\0','\1') | ||
2552 | @@ -271,6 +269,7 @@ typedef enum _gcSL_OPCODE | ||
2553 | gcSL_ADDSAT, /* 0x5C */ /* Integer only. */ | ||
2554 | gcSL_SUBSAT, /* 0x5D */ /* Integer only. */ | ||
2555 | gcSL_MULSAT, /* 0x5E */ /* Integer only. */ | ||
2556 | + gcSL_DP2, /* 0x5F */ | ||
2557 | gcSL_MAXOPCODE | ||
2558 | } | ||
2559 | gcSL_OPCODE; | ||
2560 | @@ -474,6 +473,9 @@ struct _gcsHINT | ||
2561 | |||
2562 | gctBOOL clipW; | ||
2563 | |||
2564 | + /* Flag whether or not the shader has a KILL instruction. */ | ||
2565 | + gctBOOL hasKill; | ||
2566 | + | ||
2567 | /* Element count. */ | ||
2568 | gctUINT32 elementCount; | ||
2569 | |||
2570 | @@ -495,12 +497,18 @@ struct _gcsHINT | ||
2571 | /* Balance maximum. */ | ||
2572 | gctUINT32 balanceMax; | ||
2573 | |||
2574 | + /* Auto-shift balancing. */ | ||
2575 | + gctBOOL autoShift; | ||
2576 | + | ||
2577 | /* Flag whether the PS outputs the depth value or not. */ | ||
2578 | gctBOOL psHasFragDepthOut; | ||
2579 | |||
2580 | /* Flag whether the ThreadWalker is in PS. */ | ||
2581 | gctBOOL threadWalkerInPS; | ||
2582 | |||
2583 | + /* HW reg number for position of VS */ | ||
2584 | + gctUINT32 hwRegNoOfSIVPos; | ||
2585 | + | ||
2586 | #if gcdALPHA_KILL_IN_SHADER | ||
2587 | /* States to set when alpha kill is enabled. */ | ||
2588 | gctUINT32 killStateAddress; | ||
2589 | @@ -687,12 +695,12 @@ typedef enum _gceSHADER_FLAGS | ||
2590 | gcvSHADER_USE_ALPHA_KILL = 0x100, | ||
2591 | #endif | ||
2592 | |||
2593 | -#if ADD_PRE_ROTATION_TO_VS | ||
2594 | +#if gcdPRE_ROTATION && (ANDROID_SDK_VERSION >= 14) | ||
2595 | gcvSHADER_VS_PRE_ROTATION = 0x200, | ||
2596 | #endif | ||
2597 | |||
2598 | #if TEMP_INLINE_ALL_EXPANSION | ||
2599 | - gcvSHADER_INLINE_ALL_EXPANSION = 0x200, | ||
2600 | + gcvSHADER_INLINE_ALL_EXPANSION = 0x400, | ||
2601 | #endif | ||
2602 | } | ||
2603 | gceSHADER_FLAGS; | ||
2604 | @@ -827,6 +835,7 @@ typedef struct _gcOPTIMIZER_OPTION | ||
2605 | gctBOOL dumpOptimizerVerbose; /* dump result IR in each optimization phase */ | ||
2606 | gctBOOL dumpBEGenertedCode; /* dump generated machine code */ | ||
2607 | gctBOOL dumpBEVerbose; /* dump BE tree and optimization detail */ | ||
2608 | + gctBOOL dumpBEFinalIR; /* dump BE final IR */ | ||
2609 | |||
2610 | /* Code generation */ | ||
2611 | |||
2612 | @@ -945,6 +954,8 @@ extern gcOPTIMIZER_OPTION theOptimizerOption; | ||
2613 | gcmOPT_DUMP_CODEGEN_VERBOSE() ) | ||
2614 | #define gcmOPT_DUMP_CODEGEN_VERBOSE() \ | ||
2615 | (gcmGetOptimizerOption()->dumpBEVerbose != 0) | ||
2616 | +#define gcmOPT_DUMP_FINAL_IR() \ | ||
2617 | + (gcmGetOptimizerOption()->dumpBEFinalIR != 0) | ||
2618 | |||
2619 | #define gcmOPT_SET_DUMP_SHADER_SRC(v) \ | ||
2620 | gcmGetOptimizerOption()->dumpShaderSource = (v) | ||
2621 | @@ -1064,6 +1075,13 @@ typedef struct _gcNPOT_PATCH_PARAM | ||
2622 | gctINT texDimension; /* 2 or 3 */ | ||
2623 | }gcNPOT_PATCH_PARAM, *gcNPOT_PATCH_PARAM_PTR; | ||
2624 | |||
2625 | +typedef struct _gcZBIAS_PATCH_PARAM | ||
2626 | +{ | ||
2627 | + /* Driver uses this to program uniform that designating zbias */ | ||
2628 | + gctINT uniformAddr; | ||
2629 | + gctINT channel; | ||
2630 | +}gcZBIAS_PATCH_PARAM, *gcZBIAS_PATCH_PARAM_PTR; | ||
2631 | + | ||
2632 | void | ||
2633 | gcGetOptionFromEnv( | ||
2634 | IN OUT gcOPTIMIZER_OPTION * Option | ||
2635 | @@ -1556,6 +1574,43 @@ gcSHADER_AddUniform( | ||
2636 | OUT gcUNIFORM * Uniform | ||
2637 | ); | ||
2638 | |||
2639 | +/******************************************************************************* | ||
2640 | +** gcSHADER_AddPreRotationUniform | ||
2641 | +******************************************************************************** | ||
2642 | +** | ||
2643 | +** Add an uniform to a gcSHADER object. | ||
2644 | +** | ||
2645 | +** INPUT: | ||
2646 | +** | ||
2647 | +** gcSHADER Shader | ||
2648 | +** Pointer to a gcSHADER object. | ||
2649 | +** | ||
2650 | +** gctCONST_STRING Name | ||
2651 | +** Name of the uniform to add. | ||
2652 | +** | ||
2653 | +** gcSHADER_TYPE Type | ||
2654 | +** Type of the uniform to add. | ||
2655 | +** | ||
2656 | +** gctSIZE_T Length | ||
2657 | +** Array length of the uniform to add. 'Length' must be at least 1. | ||
2658 | +** | ||
2659 | +** gctINT col | ||
2660 | +** Which uniform. | ||
2661 | +** | ||
2662 | +** OUTPUT: | ||
2663 | +** | ||
2664 | +** gcUNIFORM * Uniform | ||
2665 | +** Pointer to a variable receiving the gcUNIFORM object pointer. | ||
2666 | +*/ | ||
2667 | +gceSTATUS | ||
2668 | +gcSHADER_AddPreRotationUniform( | ||
2669 | + IN gcSHADER Shader, | ||
2670 | + IN gctCONST_STRING Name, | ||
2671 | + IN gcSHADER_TYPE Type, | ||
2672 | + IN gctSIZE_T Length, | ||
2673 | + IN gctINT col, | ||
2674 | + OUT gcUNIFORM * Uniform | ||
2675 | + ); | ||
2676 | |||
2677 | /******************************************************************************* | ||
2678 | ** gcSHADER_AddUniformEx | ||
2679 | @@ -1677,6 +1732,28 @@ gcSHADER_GetUniformCount( | ||
2680 | ); | ||
2681 | |||
2682 | /******************************************************************************* | ||
2683 | +** gcSHADER_GetPreRotationUniform | ||
2684 | +******************************************************************************** | ||
2685 | +** | ||
2686 | +** Get the preRotate Uniform. | ||
2687 | +** | ||
2688 | +** INPUT: | ||
2689 | +** | ||
2690 | +** gcSHADER Shader | ||
2691 | +** Pointer to a gcSHADER object. | ||
2692 | +** | ||
2693 | +** OUTPUT: | ||
2694 | +** | ||
2695 | +** gcUNIFORM ** pUniform | ||
2696 | +** Pointer to a preRotation uniforms array. | ||
2697 | +*/ | ||
2698 | +gceSTATUS | ||
2699 | +gcSHADER_GetPreRotationUniform( | ||
2700 | + IN gcSHADER Shader, | ||
2701 | + OUT gcUNIFORM ** pUniform | ||
2702 | + ); | ||
2703 | + | ||
2704 | +/******************************************************************************* | ||
2705 | ** gcSHADER_GetUniform | ||
2706 | ******************************************************************************** | ||
2707 | ** | ||
2708 | @@ -3438,6 +3515,34 @@ gcUNIFORM_SetValueF( | ||
2709 | ); | ||
2710 | |||
2711 | /******************************************************************************* | ||
2712 | +** gcUNIFORM_ProgramF | ||
2713 | +** | ||
2714 | +** Set the value of a uniform in floating point. | ||
2715 | +** | ||
2716 | +** INPUT: | ||
2717 | +** | ||
2718 | +** gctUINT32 Address | ||
2719 | +** Address of Uniform. | ||
2720 | +** | ||
2721 | +** gctSIZE_T Row/Col | ||
2722 | +** | ||
2723 | +** const gctFLOAT * Value | ||
2724 | +** Pointer to a buffer holding the floating point values for the | ||
2725 | +** uniform. | ||
2726 | +** | ||
2727 | +** OUTPUT: | ||
2728 | +** | ||
2729 | +** Nothing. | ||
2730 | +*/ | ||
2731 | +gceSTATUS | ||
2732 | +gcUNIFORM_ProgramF( | ||
2733 | + IN gctUINT32 Address, | ||
2734 | + IN gctSIZE_T Row, | ||
2735 | + IN gctSIZE_T Col, | ||
2736 | + IN const gctFLOAT * Value | ||
2737 | + ); | ||
2738 | + | ||
2739 | +/******************************************************************************* | ||
2740 | ** gcUNIFORM_GetModelViewProjMatrix | ||
2741 | ******************************************************************************** | ||
2742 | ** | ||
2743 | @@ -3912,6 +4017,23 @@ gcRecompileShaders( | ||
2744 | IN gctUINT32 *SamplerWrapS, | ||
2745 | IN gctUINT32 *SamplerWrapT | ||
2746 | ); | ||
2747 | + | ||
2748 | +gceSTATUS | ||
2749 | +gcRecompileDepthBias( | ||
2750 | + IN gcoHAL Hal, | ||
2751 | + IN gcMACHINECODE_PTR pVsMachineCode, | ||
2752 | + /*Recompile variables*/ | ||
2753 | + IN OUT gctPOINTER *ppRecompileStateBuffer, | ||
2754 | + IN OUT gctSIZE_T *pRecompileStateBufferSize, | ||
2755 | + IN OUT gcsHINT_PTR *ppRecompileHints, | ||
2756 | + /* natvie state*/ | ||
2757 | + IN gctPOINTER pNativeStateBuffer, | ||
2758 | + IN gctSIZE_T nativeStateBufferSize, | ||
2759 | + IN gcsHINT_PTR pNativeHints, | ||
2760 | + OUT gctINT * uniformAddr, | ||
2761 | + OUT gctINT * uniformChannel | ||
2762 | + ); | ||
2763 | + | ||
2764 | /******************************************************************************* | ||
2765 | ** gcSaveProgram | ||
2766 | ******************************************************************************** | ||
2767 | @@ -4138,6 +4260,16 @@ gcSHADER_PatchNPOTForMachineCode( | ||
2768 | IN OUT gcsHINT_PTR pHints /* User needs copy original hints to this one, then passed this one in */ | ||
2769 | ); | ||
2770 | |||
2771 | +gceSTATUS | ||
2772 | +gcSHADER_PatchZBiasForMachineCodeVS( | ||
2773 | + IN gcMACHINECODE_PTR pMachineCode, | ||
2774 | + IN OUT gcZBIAS_PATCH_PARAM_PTR pPatchParam, | ||
2775 | + IN gctUINT hwSupportedInstCount, | ||
2776 | + OUT gctPOINTER* ppCmdBuffer, | ||
2777 | + OUT gctUINT32* pByteSizeOfCmdBuffer, | ||
2778 | + IN OUT gcsHINT_PTR pHints /* User needs copy original hints to this one, then passed this one in */ | ||
2779 | + ); | ||
2780 | + | ||
2781 | #ifdef __cplusplus | ||
2782 | } | ||
2783 | #endif | ||
2784 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h | ||
2785 | index b056c52..fc8c395 100644 | ||
2786 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h | ||
2787 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h | ||
2788 | @@ -166,6 +166,12 @@ typedef enum _gceHAL_COMMAND_CODES | ||
2789 | |||
2790 | /* Reset time stamp. */ | ||
2791 | gcvHAL_QUERY_RESET_TIME_STAMP, | ||
2792 | + | ||
2793 | + /* Sync point operations. */ | ||
2794 | + gcvHAL_SYNC_POINT, | ||
2795 | + | ||
2796 | + /* Create native fence and return its fd. */ | ||
2797 | + gcvHAL_CREATE_NATIVE_FENCE, | ||
2798 | } | ||
2799 | gceHAL_COMMAND_CODES; | ||
2800 | |||
2801 | @@ -723,6 +729,10 @@ typedef struct _gcsHAL_INTERFACE | ||
2802 | /* gcvHAL_READ_ALL_PROFILE_REGISTERS */ | ||
2803 | struct _gcsHAL_READ_ALL_PROFILE_REGISTERS | ||
2804 | { | ||
2805 | +#if VIVANTE_PROFILER_CONTEXT | ||
2806 | + /* Context buffer object gckCONTEXT. Just a name. */ | ||
2807 | + IN gctUINT32 context; | ||
2808 | +#endif | ||
2809 | /* Data read. */ | ||
2810 | OUT gcsPROFILER_COUNTERS counters; | ||
2811 | } | ||
2812 | @@ -978,6 +988,33 @@ typedef struct _gcsHAL_INTERFACE | ||
2813 | OUT gctUINT64 timeStamp; | ||
2814 | } | ||
2815 | QueryResetTimeStamp; | ||
2816 | + | ||
2817 | + struct _gcsHAL_SYNC_POINT | ||
2818 | + { | ||
2819 | + /* Command. */ | ||
2820 | + gceSYNC_POINT_COMMAND_CODES command; | ||
2821 | + | ||
2822 | + /* Sync point. */ | ||
2823 | + IN OUT gctUINT64 syncPoint; | ||
2824 | + | ||
2825 | + /* From where. */ | ||
2826 | + IN gceKERNEL_WHERE fromWhere; | ||
2827 | + | ||
2828 | + /* Signaled state. */ | ||
2829 | + OUT gctBOOL state; | ||
2830 | + } | ||
2831 | + SyncPoint; | ||
2832 | + | ||
2833 | + struct _gcsHAL_CREATE_NATIVE_FENCE | ||
2834 | + { | ||
2835 | + /* Signal id to dup. */ | ||
2836 | + IN gctUINT64 syncPoint; | ||
2837 | + | ||
2838 | + /* Native fence file descriptor. */ | ||
2839 | + OUT gctINT fenceFD; | ||
2840 | + | ||
2841 | + } | ||
2842 | + CreateNativeFence; | ||
2843 | } | ||
2844 | u; | ||
2845 | } | ||
2846 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h | ||
2847 | index 8481375..3fb2fe4 100644 | ||
2848 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h | ||
2849 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h | ||
2850 | @@ -323,6 +323,15 @@ gcoSURF_Resolve( | ||
2851 | IN gcoSURF DestSurface | ||
2852 | ); | ||
2853 | |||
2854 | +gceSTATUS | ||
2855 | +gcoSURF_IsHWResolveable( | ||
2856 | + IN gcoSURF SrcSurface, | ||
2857 | + IN gcoSURF DestSurface, | ||
2858 | + IN gcsPOINT_PTR SrcOrigin, | ||
2859 | + IN gcsPOINT_PTR DestOrigin, | ||
2860 | + IN gcsPOINT_PTR RectSize | ||
2861 | + ); | ||
2862 | + | ||
2863 | /* Resolve rectangular area of a surface. */ | ||
2864 | gceSTATUS | ||
2865 | gcoSURF_ResolveRect( | ||
2866 | @@ -345,6 +354,11 @@ gcoSURF_IsRenderable( | ||
2867 | IN gcoSURF Surface | ||
2868 | ); | ||
2869 | |||
2870 | +gceSTATUS | ||
2871 | +gcoSURF_IsFormatRenderableAsRT( | ||
2872 | + IN gcoSURF Surface | ||
2873 | + ); | ||
2874 | + | ||
2875 | #if gcdSYNC | ||
2876 | gceSTATUS | ||
2877 | gcoSURF_GetFence( | ||
2878 | @@ -1006,6 +1020,7 @@ typedef struct _gcsALPHA_INFO | ||
2879 | gctBOOL test; | ||
2880 | gceCOMPARE compare; | ||
2881 | gctUINT8 reference; | ||
2882 | + gctFLOAT floatReference; | ||
2883 | |||
2884 | /* Alpha blending states. */ | ||
2885 | gctBOOL blend; | ||
2886 | @@ -1040,7 +1055,8 @@ gco3D_SetAlphaCompare( | ||
2887 | gceSTATUS | ||
2888 | gco3D_SetAlphaReference( | ||
2889 | IN gco3D Engine, | ||
2890 | - IN gctUINT8 Reference | ||
2891 | + IN gctUINT8 Reference, | ||
2892 | + IN gctFLOAT FloatReference | ||
2893 | ); | ||
2894 | |||
2895 | /* Set alpha test reference in fixed point. */ | ||
2896 | @@ -1504,6 +1520,19 @@ gcoTEXTURE_UploadSub( | ||
2897 | IN gceSURF_FORMAT Format | ||
2898 | ); | ||
2899 | |||
2900 | +/* Upload YUV data to an gcoTEXTURE object. */ | ||
2901 | +gceSTATUS | ||
2902 | +gcoTEXTURE_UploadYUV( | ||
2903 | + IN gcoTEXTURE Texture, | ||
2904 | + IN gceTEXTURE_FACE Face, | ||
2905 | + IN gctUINT Width, | ||
2906 | + IN gctUINT Height, | ||
2907 | + IN gctUINT Slice, | ||
2908 | + IN gctPOINTER Memory[3], | ||
2909 | + IN gctINT Stride[3], | ||
2910 | + IN gceSURF_FORMAT Format | ||
2911 | + ); | ||
2912 | + | ||
2913 | /* Upload compressed data to an gcoTEXTURE object. */ | ||
2914 | gceSTATUS | ||
2915 | gcoTEXTURE_UploadCompressed( | ||
2916 | @@ -1621,6 +1650,13 @@ gcoTEXTURE_QueryCaps( | ||
2917 | ); | ||
2918 | |||
2919 | gceSTATUS | ||
2920 | +gcoTEXTURE_GetTiling( | ||
2921 | + IN gcoTEXTURE Texture, | ||
2922 | + IN gctINT preferLevel, | ||
2923 | + OUT gceTILING * Tiling | ||
2924 | + ); | ||
2925 | + | ||
2926 | +gceSTATUS | ||
2927 | gcoTEXTURE_GetClosestFormat( | ||
2928 | IN gcoHAL Hal, | ||
2929 | IN gceSURF_FORMAT InFormat, | ||
2930 | @@ -2001,6 +2037,14 @@ gcoHAL_SetSharedInfo( | ||
2931 | IN gctSIZE_T Bytes | ||
2932 | ); | ||
2933 | |||
2934 | +#if VIVANTE_PROFILER_CONTEXT | ||
2935 | +gceSTATUS | ||
2936 | +gcoHARDWARE_GetContext( | ||
2937 | + IN gcoHARDWARE Hardware, | ||
2938 | + OUT gctUINT32 * Context | ||
2939 | + ); | ||
2940 | +#endif | ||
2941 | + | ||
2942 | #ifdef __cplusplus | ||
2943 | } | ||
2944 | #endif | ||
2945 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h | ||
2946 | index a1d9ae5..8e3c2f8 100644 | ||
2947 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h | ||
2948 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h | ||
2949 | @@ -146,10 +146,26 @@ typedef enum _gceFEATURE | ||
2950 | gcvFEATURE_FRUSTUM_CLIP_FIX, | ||
2951 | gcvFEATURE_TEXTURE_LINEAR, | ||
2952 | gcvFEATURE_TEXTURE_YUV_ASSEMBLER, | ||
2953 | + gcvFEATURE_SHADER_HAS_INSTRUCTION_CACHE, | ||
2954 | gcvFEATURE_DYNAMIC_FREQUENCY_SCALING, | ||
2955 | gcvFEATURE_BUGFIX15, | ||
2956 | + gcvFEATURE_2D_GAMMA, | ||
2957 | + gcvFEATURE_2D_COLOR_SPACE_CONVERSION, | ||
2958 | + gcvFEATURE_2D_SUPER_TILE_VERSION, | ||
2959 | gcvFEATURE_2D_MIRROR_EXTENSION, | ||
2960 | + gcvFEATURE_2D_SUPER_TILE_V1, | ||
2961 | + gcvFEATURE_2D_SUPER_TILE_V2, | ||
2962 | + gcvFEATURE_2D_SUPER_TILE_V3, | ||
2963 | + gcvFEATURE_2D_MULTI_SOURCE_BLT_EX2, | ||
2964 | gcvFEATURE_ELEMENT_INDEX_UINT, | ||
2965 | + gcvFEATURE_2D_COMPRESSION, | ||
2966 | + gcvFEATURE_2D_OPF_YUV_OUTPUT, | ||
2967 | + gcvFEATURE_2D_MULTI_SRC_BLT_TO_UNIFIED_DST_RECT, | ||
2968 | + gcvFEATURE_2D_YUV_MODE, | ||
2969 | + gcvFEATURE_DECOMPRESS_Z16, | ||
2970 | + gcvFEATURE_LINEAR_RENDER_TARGET, | ||
2971 | + gcvFEATURE_BUG_FIXES8, | ||
2972 | + gcvFEATURE_HALTI2, | ||
2973 | } | ||
2974 | gceFEATURE; | ||
2975 | |||
2976 | @@ -203,11 +219,14 @@ typedef enum _gceSURF_TYPE | ||
2977 | gcvSURF_NO_VIDMEM = 0x200, /* Used to allocate surfaces with no underlying vidmem node. | ||
2978 | In Android, vidmem node is allocated by another process. */ | ||
2979 | gcvSURF_CACHEABLE = 0x400, /* Used to allocate a cacheable surface */ | ||
2980 | -#if gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST | ||
2981 | gcvSURF_FLIP = 0x800, /* The Resolve Target the will been flip resolve from RT */ | ||
2982 | -#endif | ||
2983 | gcvSURF_TILE_STATUS_DIRTY = 0x1000, /* Init tile status to all dirty */ | ||
2984 | |||
2985 | + gcvSURF_LINEAR = 0x2000, | ||
2986 | + | ||
2987 | + gcvSURF_TEXTURE_LINEAR = gcvSURF_TEXTURE | ||
2988 | + | gcvSURF_LINEAR, | ||
2989 | + | ||
2990 | gcvSURF_RENDER_TARGET_NO_TILE_STATUS = gcvSURF_RENDER_TARGET | ||
2991 | | gcvSURF_NO_TILE_STATUS, | ||
2992 | |||
2993 | @@ -217,6 +236,9 @@ typedef enum _gceSURF_TYPE | ||
2994 | gcvSURF_DEPTH_NO_TILE_STATUS = gcvSURF_DEPTH | ||
2995 | | gcvSURF_NO_TILE_STATUS, | ||
2996 | |||
2997 | + gcvSURF_DEPTH_TS_DIRTY = gcvSURF_DEPTH | ||
2998 | + | gcvSURF_TILE_STATUS_DIRTY, | ||
2999 | + | ||
3000 | /* Supported surface types with no vidmem node. */ | ||
3001 | gcvSURF_BITMAP_NO_VIDMEM = gcvSURF_BITMAP | ||
3002 | | gcvSURF_NO_VIDMEM, | ||
3003 | @@ -231,10 +253,8 @@ typedef enum _gceSURF_TYPE | ||
3004 | gcvSURF_CACHEABLE_BITMAP = gcvSURF_BITMAP | ||
3005 | | gcvSURF_CACHEABLE, | ||
3006 | |||
3007 | -#if gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST | ||
3008 | gcvSURF_FLIP_BITMAP = gcvSURF_BITMAP | ||
3009 | | gcvSURF_FLIP, | ||
3010 | -#endif | ||
3011 | } | ||
3012 | gceSURF_TYPE; | ||
3013 | |||
3014 | @@ -263,6 +283,9 @@ typedef enum _gceSURF_ROTATION | ||
3015 | gcvSURF_270_DEGREE, | ||
3016 | gcvSURF_FLIP_X, | ||
3017 | gcvSURF_FLIP_Y, | ||
3018 | + | ||
3019 | + gcvSURF_POST_FLIP_X = 0x40000000, | ||
3020 | + gcvSURF_POST_FLIP_Y = 0x80000000, | ||
3021 | } | ||
3022 | gceSURF_ROTATION; | ||
3023 | |||
3024 | @@ -622,21 +645,16 @@ gce2D_PORTER_DUFF_RULE; | ||
3025 | typedef enum _gce2D_YUV_COLOR_MODE | ||
3026 | { | ||
3027 | gcv2D_YUV_601= 0, | ||
3028 | - gcv2D_YUV_709 | ||
3029 | -} | ||
3030 | -gce2D_YUV_COLOR_MODE; | ||
3031 | + gcv2D_YUV_709, | ||
3032 | + gcv2D_YUV_USER_DEFINED, | ||
3033 | + gcv2D_YUV_USER_DEFINED_CLAMP, | ||
3034 | |||
3035 | -/* 2D Rotation and flipping. */ | ||
3036 | -typedef enum _gce2D_ORIENTATION | ||
3037 | -{ | ||
3038 | - gcv2D_0_DEGREE = 0, | ||
3039 | - gcv2D_90_DEGREE, | ||
3040 | - gcv2D_180_DEGREE, | ||
3041 | - gcv2D_270_DEGREE, | ||
3042 | - gcv2D_X_FLIP, | ||
3043 | - gcv2D_Y_FLIP | ||
3044 | + /* Default setting is for src. gcv2D_YUV_DST | ||
3045 | + can be ORed to set dst. | ||
3046 | + */ | ||
3047 | + gcv2D_YUV_DST = 0x80000000, | ||
3048 | } | ||
3049 | -gce2D_ORIENTATION; | ||
3050 | +gce2D_YUV_COLOR_MODE; | ||
3051 | |||
3052 | typedef enum _gce2D_COMMAND | ||
3053 | { | ||
3054 | @@ -656,21 +674,39 @@ typedef enum _gce2D_TILE_STATUS_CONFIG | ||
3055 | gcv2D_TSC_ENABLE = 0x00000001, | ||
3056 | gcv2D_TSC_COMPRESSED = 0x00000002, | ||
3057 | gcv2D_TSC_DOWN_SAMPLER = 0x00000004, | ||
3058 | + gcv2D_TSC_2D_COMPRESSED = 0x00000008, | ||
3059 | } | ||
3060 | gce2D_TILE_STATUS_CONFIG; | ||
3061 | |||
3062 | typedef enum _gce2D_QUERY | ||
3063 | { | ||
3064 | - gcv2D_QUERY_RGB_ADDRESS_MAX_ALIGN = 0, | ||
3065 | - gcv2D_QUERY_RGB_STRIDE_MAX_ALIGN, | ||
3066 | - gcv2D_QUERY_YUV_ADDRESS_MAX_ALIGN, | ||
3067 | - gcv2D_QUERY_YUV_STRIDE_MAX_ALIGN, | ||
3068 | + gcv2D_QUERY_RGB_ADDRESS_MIN_ALIGN = 0, | ||
3069 | + gcv2D_QUERY_RGB_STRIDE_MIN_ALIGN, | ||
3070 | + gcv2D_QUERY_YUV_ADDRESS_MIN_ALIGN, | ||
3071 | + gcv2D_QUERY_YUV_STRIDE_MIN_ALIGN, | ||
3072 | } | ||
3073 | gce2D_QUERY; | ||
3074 | |||
3075 | +typedef enum _gce2D_SUPER_TILE_VERSION | ||
3076 | +{ | ||
3077 | + gcv2D_SUPER_TILE_VERSION_V1 = 1, | ||
3078 | + gcv2D_SUPER_TILE_VERSION_V2 = 2, | ||
3079 | + gcv2D_SUPER_TILE_VERSION_V3 = 3, | ||
3080 | +} | ||
3081 | +gce2D_SUPER_TILE_VERSION; | ||
3082 | + | ||
3083 | typedef enum _gce2D_STATE | ||
3084 | { | ||
3085 | gcv2D_STATE_SPECIAL_FILTER_MIRROR_MODE = 1, | ||
3086 | + gcv2D_STATE_SUPER_TILE_VERSION, | ||
3087 | + gcv2D_STATE_EN_GAMMA, | ||
3088 | + gcv2D_STATE_DE_GAMMA, | ||
3089 | + gcv2D_STATE_MULTI_SRC_BLIT_UNIFIED_DST_RECT, | ||
3090 | + | ||
3091 | + gcv2D_STATE_ARRAY_EN_GAMMA = 0x10001, | ||
3092 | + gcv2D_STATE_ARRAY_DE_GAMMA, | ||
3093 | + gcv2D_STATE_ARRAY_CSC_YUV_TO_RGB, | ||
3094 | + gcv2D_STATE_ARRAY_CSC_RGB_TO_YUV, | ||
3095 | } | ||
3096 | gce2D_STATE; | ||
3097 | |||
3098 | @@ -809,6 +845,15 @@ typedef enum _gceUSER_SIGNAL_COMMAND_CODES | ||
3099 | } | ||
3100 | gceUSER_SIGNAL_COMMAND_CODES; | ||
3101 | |||
3102 | +/* Sync point command codes. */ | ||
3103 | +typedef enum _gceSYNC_POINT_COMMAND_CODES | ||
3104 | +{ | ||
3105 | + gcvSYNC_POINT_CREATE, | ||
3106 | + gcvSYNC_POINT_DESTROY, | ||
3107 | + gcvSYNC_POINT_SIGNAL, | ||
3108 | +} | ||
3109 | +gceSYNC_POINT_COMMAND_CODES; | ||
3110 | + | ||
3111 | /* Event locations. */ | ||
3112 | typedef enum _gceKERNEL_WHERE | ||
3113 | { | ||
3114 | @@ -848,6 +893,44 @@ typedef enum _gceDEBUG_MESSAGE_TYPE | ||
3115 | } | ||
3116 | gceDEBUG_MESSAGE_TYPE; | ||
3117 | |||
3118 | +typedef enum _gceSPECIAL_HINT | ||
3119 | +{ | ||
3120 | + gceSPECIAL_HINT0, | ||
3121 | + gceSPECIAL_HINT1, | ||
3122 | + gceSPECIAL_HINT2, | ||
3123 | + gceSPECIAL_HINT3, | ||
3124 | + /* For disable dynamic stream/index */ | ||
3125 | + gceSPECIAL_HINT4 | ||
3126 | +} | ||
3127 | +gceSPECIAL_HINT; | ||
3128 | + | ||
3129 | +typedef enum _gceMACHINECODE | ||
3130 | +{ | ||
3131 | + gcvMACHINECODE_HOVERJET0 = 0x0, | ||
3132 | + gcvMACHINECODE_HOVERJET1 , | ||
3133 | + | ||
3134 | + gcvMACHINECODE_TAIJI0 , | ||
3135 | + gcvMACHINECODE_TAIJI1 , | ||
3136 | + gcvMACHINECODE_TAIJI2 , | ||
3137 | + | ||
3138 | + gcvMACHINECODE_ANTUTU0 , | ||
3139 | + | ||
3140 | + gcvMACHINECODE_GLB27_RELEASE_0, | ||
3141 | + gcvMACHINECODE_GLB27_RELEASE_1, | ||
3142 | + | ||
3143 | + gcvMACHINECODE_WAVESCAPE0 , | ||
3144 | + gcvMACHINECODE_WAVESCAPE1 , | ||
3145 | + | ||
3146 | + gcvMACHINECODE_NENAMARKV2_4_0 , | ||
3147 | + gcvMACHINECODE_NENAMARKV2_4_1 , | ||
3148 | + | ||
3149 | + gcvMACHINECODE_GLB25_RELEASE_0, | ||
3150 | + gcvMACHINECODE_GLB25_RELEASE_1, | ||
3151 | + gcvMACHINECODE_GLB25_RELEASE_2, | ||
3152 | +} | ||
3153 | +gceMACHINECODE; | ||
3154 | + | ||
3155 | + | ||
3156 | /******************************************************************************\ | ||
3157 | ****************************** Object Declarations ***************************** | ||
3158 | \******************************************************************************/ | ||
3159 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | ||
3160 | index 9e2a8db..b53b618 100644 | ||
3161 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | ||
3162 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | ||
3163 | @@ -46,7 +46,7 @@ | ||
3164 | This define enables the profiler. | ||
3165 | */ | ||
3166 | #ifndef VIVANTE_PROFILER | ||
3167 | -# define VIVANTE_PROFILER 0 | ||
3168 | +# define VIVANTE_PROFILER 1 | ||
3169 | #endif | ||
3170 | |||
3171 | #ifndef VIVANTE_PROFILER_PERDRAW | ||
3172 | @@ -54,6 +54,15 @@ | ||
3173 | #endif | ||
3174 | |||
3175 | /* | ||
3176 | + VIVANTE_PROFILER_CONTEXT | ||
3177 | + | ||
3178 | + This define enables the profiler according to each hw context. | ||
3179 | +*/ | ||
3180 | +#ifndef VIVANTE_PROFILER_CONTEXT | ||
3181 | +# define VIVANTE_PROFILER_CONTEXT 1 | ||
3182 | +#endif | ||
3183 | + | ||
3184 | +/* | ||
3185 | gcdUSE_VG | ||
3186 | |||
3187 | Enable VG HAL layer (only for GC350). | ||
3188 | @@ -729,7 +738,24 @@ | ||
3189 | Use linear buffer for GPU apps so HWC can do 2D composition. | ||
3190 | */ | ||
3191 | #ifndef gcdGPU_LINEAR_BUFFER_ENABLED | ||
3192 | -# define gcdGPU_LINEAR_BUFFER_ENABLED 0 | ||
3193 | +# define gcdGPU_LINEAR_BUFFER_ENABLED 1 | ||
3194 | +#endif | ||
3195 | + | ||
3196 | +/* | ||
3197 | + gcdENABLE_RENDER_INTO_WINDOW | ||
3198 | + | ||
3199 | + Enable Render-Into-Window (ie, No-Resolve) feature on android. | ||
3200 | + NOTE that even if enabled, it still depends on hardware feature and | ||
3201 | + android application behavior. When hardware feature or application | ||
3202 | + behavior can not support render into window mode, it will fail back | ||
3203 | + to normal mode. | ||
3204 | + When Render-Into-Window is finally used, window back buffer of android | ||
3205 | + applications will be allocated matching render target tiling format. | ||
3206 | + Otherwise buffer tiling is decided by the above option | ||
3207 | + 'gcdGPU_LINEAR_BUFFER_ENABLED'. | ||
3208 | +*/ | ||
3209 | +#ifndef gcdENABLE_RENDER_INTO_WINDOW | ||
3210 | +# define gcdENABLE_RENDER_INTO_WINDOW 1 | ||
3211 | #endif | ||
3212 | |||
3213 | /* | ||
3214 | @@ -758,7 +784,11 @@ | ||
3215 | #endif | ||
3216 | |||
3217 | #ifndef gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST | ||
3218 | -# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 0 | ||
3219 | +# ifdef ANDROID | ||
3220 | +# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 1 | ||
3221 | +# else | ||
3222 | +# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 0 | ||
3223 | +# endif | ||
3224 | #endif | ||
3225 | |||
3226 | #ifndef gcdENABLE_PE_DITHER_FIX | ||
3227 | @@ -800,6 +830,10 @@ | ||
3228 | # define gcdDISALBE_EARLY_EARLY_Z 1 | ||
3229 | #endif | ||
3230 | |||
3231 | +#ifndef gcdSHADER_SRC_BY_MACHINECODE | ||
3232 | +# define gcdSHADER_SRC_BY_MACHINECODE 1 | ||
3233 | +#endif | ||
3234 | + | ||
3235 | /* | ||
3236 | gcdLINK_QUEUE_SIZE | ||
3237 | |||
3238 | @@ -849,11 +883,20 @@ | ||
3239 | #define gcdUSE_NPOT_PATCH 1 | ||
3240 | #endif | ||
3241 | |||
3242 | - | ||
3243 | #ifndef gcdSYNC | ||
3244 | # define gcdSYNC 1 | ||
3245 | #endif | ||
3246 | |||
3247 | +#ifndef gcdENABLE_SPECIAL_HINT3 | ||
3248 | +# define gcdENABLE_SPECIAL_HINT3 1 | ||
3249 | +#endif | ||
3250 | + | ||
3251 | +#if defined(ANDROID) | ||
3252 | +#ifndef gcdPRE_ROTATION | ||
3253 | +# define gcdPRE_ROTATION 1 | ||
3254 | +#endif | ||
3255 | +#endif | ||
3256 | + | ||
3257 | /* | ||
3258 | gcdDVFS | ||
3259 | |||
3260 | @@ -866,4 +909,39 @@ | ||
3261 | # define gcdDVFS_POLLING_TIME (gcdDVFS_ANAYLSE_WINDOW * 4) | ||
3262 | #endif | ||
3263 | |||
3264 | +/* | ||
3265 | + gcdANDROID_NATIVE_FENCE_SYNC | ||
3266 | + | ||
3267 | + Enable android native fence sync. It is introduced since jellybean-4.2. | ||
3268 | + Depends on linux kernel option: CONFIG_SYNC. | ||
3269 | + | ||
3270 | + 0: Disabled | ||
3271 | + 1: Build framework for native fence sync feature, and EGL extension | ||
3272 | + 2: Enable async swap buffers for client | ||
3273 | + * Native fence sync for client 'queueBuffer' in EGL, which is | ||
3274 | + 'acquireFenceFd' for layer in compositor side. | ||
3275 | + 3. Enable async hwcomposer composition. | ||
3276 | + * 'releaseFenceFd' for layer in compositor side, which is native | ||
3277 | + fence sync when client 'dequeueBuffer' | ||
3278 | + * Native fence sync for compositor 'queueBuffer' in EGL, which is | ||
3279 | + 'acquireFenceFd' for framebuffer target for DC | ||
3280 | + */ | ||
3281 | +#ifndef gcdANDROID_NATIVE_FENCE_SYNC | ||
3282 | +# define gcdANDROID_NATIVE_FENCE_SYNC 0 | ||
3283 | +#endif | ||
3284 | + | ||
3285 | +#ifndef gcdFORCE_MIPMAP | ||
3286 | +# define gcdFORCE_MIPMAP 0 | ||
3287 | +#endif | ||
3288 | + | ||
3289 | +/* | ||
3290 | + gcdFORCE_GAL_LOAD_TWICE | ||
3291 | + | ||
3292 | + When non-zero, each thread except the main one will load libGAL.so twice to avoid potential segmetantion fault when app using dlopen/dlclose. | ||
3293 | + If threads exit arbitrarily, libGAL.so may not unload until the process quit. | ||
3294 | + */ | ||
3295 | +#ifndef gcdFORCE_GAL_LOAD_TWICE | ||
3296 | +# define gcdFORCE_GAL_LOAD_TWICE 0 | ||
3297 | +#endif | ||
3298 | + | ||
3299 | #endif /* __gc_hal_options_h_ */ | ||
3300 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h | ||
3301 | index 3e450ba..aed73aa 100644 | ||
3302 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h | ||
3303 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h | ||
3304 | @@ -45,509 +45,115 @@ extern "C" { | ||
3305 | #define gcdNEW_PROFILER_FILE 1 | ||
3306 | #endif | ||
3307 | |||
3308 | -/* OpenGL ES11 API IDs. */ | ||
3309 | -#define ES11_ACTIVETEXTURE 1 | ||
3310 | -#define ES11_ALPHAFUNC (ES11_ACTIVETEXTURE + 1) | ||
3311 | -#define ES11_ALPHAFUNCX (ES11_ALPHAFUNC + 1) | ||
3312 | -#define ES11_BINDBUFFER (ES11_ALPHAFUNCX + 1) | ||
3313 | -#define ES11_BINDTEXTURE (ES11_BINDBUFFER + 1) | ||
3314 | -#define ES11_BLENDFUNC (ES11_BINDTEXTURE + 1) | ||
3315 | -#define ES11_BUFFERDATA (ES11_BLENDFUNC + 1) | ||
3316 | -#define ES11_BUFFERSUBDATA (ES11_BUFFERDATA + 1) | ||
3317 | -#define ES11_CLEAR (ES11_BUFFERSUBDATA + 1) | ||
3318 | -#define ES11_CLEARCOLOR (ES11_CLEAR + 1) | ||
3319 | -#define ES11_CLEARCOLORX (ES11_CLEARCOLOR + 1) | ||
3320 | -#define ES11_CLEARDEPTHF (ES11_CLEARCOLORX + 1) | ||
3321 | -#define ES11_CLEARDEPTHX (ES11_CLEARDEPTHF + 1) | ||
3322 | -#define ES11_CLEARSTENCIL (ES11_CLEARDEPTHX + 1) | ||
3323 | -#define ES11_CLIENTACTIVETEXTURE (ES11_CLEARSTENCIL + 1) | ||
3324 | -#define ES11_CLIPPLANEF (ES11_CLIENTACTIVETEXTURE + 1) | ||
3325 | -#define ES11_CLIPPLANEX (ES11_CLIPPLANEF + 1) | ||
3326 | -#define ES11_COLOR4F (ES11_CLIPPLANEX + 1) | ||
3327 | -#define ES11_COLOR4UB (ES11_COLOR4F + 1) | ||
3328 | -#define ES11_COLOR4X (ES11_COLOR4UB + 1) | ||
3329 | -#define ES11_COLORMASK (ES11_COLOR4X + 1) | ||
3330 | -#define ES11_COLORPOINTER (ES11_COLORMASK + 1) | ||
3331 | -#define ES11_COMPRESSEDTEXIMAGE2D (ES11_COLORPOINTER + 1) | ||
3332 | -#define ES11_COMPRESSEDTEXSUBIMAGE2D (ES11_COMPRESSEDTEXIMAGE2D + 1) | ||
3333 | -#define ES11_COPYTEXIMAGE2D (ES11_COMPRESSEDTEXSUBIMAGE2D + 1) | ||
3334 | -#define ES11_COPYTEXSUBIMAGE2D (ES11_COPYTEXIMAGE2D + 1) | ||
3335 | -#define ES11_CULLFACE (ES11_COPYTEXSUBIMAGE2D + 1) | ||
3336 | -#define ES11_DELETEBUFFERS (ES11_CULLFACE + 1) | ||
3337 | -#define ES11_DELETETEXTURES (ES11_DELETEBUFFERS + 1) | ||
3338 | -#define ES11_DEPTHFUNC (ES11_DELETETEXTURES + 1) | ||
3339 | -#define ES11_DEPTHMASK (ES11_DEPTHFUNC + 1) | ||
3340 | -#define ES11_DEPTHRANGEF (ES11_DEPTHMASK + 1) | ||
3341 | -#define ES11_DEPTHRANGEX (ES11_DEPTHRANGEF + 1) | ||
3342 | -#define ES11_DISABLE (ES11_DEPTHRANGEX + 1) | ||
3343 | -#define ES11_DISABLECLIENTSTATE (ES11_DISABLE + 1) | ||
3344 | -#define ES11_DRAWARRAYS (ES11_DISABLECLIENTSTATE + 1) | ||
3345 | -#define ES11_DRAWELEMENTS (ES11_DRAWARRAYS + 1) | ||
3346 | -#define ES11_ENABLE (ES11_DRAWELEMENTS + 1) | ||
3347 | -#define ES11_ENABLECLIENTSTATE (ES11_ENABLE + 1) | ||
3348 | -#define ES11_FINISH (ES11_ENABLECLIENTSTATE + 1) | ||
3349 | -#define ES11_FLUSH (ES11_FINISH + 1) | ||
3350 | -#define ES11_FOGF (ES11_FLUSH + 1) | ||
3351 | -#define ES11_FOGFV (ES11_FOGF + 1) | ||
3352 | -#define ES11_FOGX (ES11_FOGFV + 1) | ||
3353 | -#define ES11_FOGXV (ES11_FOGX + 1) | ||
3354 | -#define ES11_FRONTFACE (ES11_FOGXV + 1) | ||
3355 | -#define ES11_FRUSTUMF (ES11_FRONTFACE + 1) | ||
3356 | -#define ES11_FRUSTUMX (ES11_FRUSTUMF + 1) | ||
3357 | -#define ES11_GENBUFFERS (ES11_FRUSTUMX + 1) | ||
3358 | -#define ES11_GENTEXTURES (ES11_GENBUFFERS + 1) | ||
3359 | -#define ES11_GETBOOLEANV (ES11_GENTEXTURES + 1) | ||
3360 | -#define ES11_GETBUFFERPARAMETERIV (ES11_GETBOOLEANV + 1) | ||
3361 | -#define ES11_GETCLIPPLANEF (ES11_GETBUFFERPARAMETERIV + 1) | ||
3362 | -#define ES11_GETCLIPPLANEX (ES11_GETCLIPPLANEF + 1) | ||
3363 | -#define ES11_GETERROR (ES11_GETCLIPPLANEX + 1) | ||
3364 | -#define ES11_GETFIXEDV (ES11_GETERROR + 1) | ||
3365 | -#define ES11_GETFLOATV (ES11_GETFIXEDV + 1) | ||
3366 | -#define ES11_GETINTEGERV (ES11_GETFLOATV + 1) | ||
3367 | -#define ES11_GETLIGHTFV (ES11_GETINTEGERV + 1) | ||
3368 | -#define ES11_GETLIGHTXV (ES11_GETLIGHTFV + 1) | ||
3369 | -#define ES11_GETMATERIALFV (ES11_GETLIGHTXV + 1) | ||
3370 | -#define ES11_GETMATERIALXV (ES11_GETMATERIALFV + 1) | ||
3371 | -#define ES11_GETPOINTERV (ES11_GETMATERIALXV + 1) | ||
3372 | -#define ES11_GETSTRING (ES11_GETPOINTERV + 1) | ||
3373 | -#define ES11_GETTEXENVFV (ES11_GETSTRING + 1) | ||
3374 | -#define ES11_GETTEXENVIV (ES11_GETTEXENVFV + 1) | ||
3375 | -#define ES11_GETTEXENVXV (ES11_GETTEXENVIV + 1) | ||
3376 | -#define ES11_GETTEXPARAMETERFV (ES11_GETTEXENVXV + 1) | ||
3377 | -#define ES11_GETTEXPARAMETERIV (ES11_GETTEXPARAMETERFV + 1) | ||
3378 | -#define ES11_GETTEXPARAMETERXV (ES11_GETTEXPARAMETERIV + 1) | ||
3379 | -#define ES11_HINT (ES11_GETTEXPARAMETERXV + 1) | ||
3380 | -#define ES11_ISBUFFER (ES11_HINT + 1) | ||
3381 | -#define ES11_ISENABLED (ES11_ISBUFFER + 1) | ||
3382 | -#define ES11_ISTEXTURE (ES11_ISENABLED + 1) | ||
3383 | -#define ES11_LIGHTF (ES11_ISTEXTURE + 1) | ||
3384 | -#define ES11_LIGHTFV (ES11_LIGHTF + 1) | ||
3385 | -#define ES11_LIGHTMODELF (ES11_LIGHTFV + 1) | ||
3386 | -#define ES11_LIGHTMODELFV (ES11_LIGHTMODELF + 1) | ||
3387 | -#define ES11_LIGHTMODELX (ES11_LIGHTMODELFV + 1) | ||
3388 | -#define ES11_LIGHTMODELXV (ES11_LIGHTMODELX + 1) | ||
3389 | -#define ES11_LIGHTX (ES11_LIGHTMODELXV + 1) | ||
3390 | -#define ES11_LIGHTXV (ES11_LIGHTX + 1) | ||
3391 | -#define ES11_LINEWIDTH (ES11_LIGHTXV + 1) | ||
3392 | -#define ES11_LINEWIDTHX (ES11_LINEWIDTH + 1) | ||
3393 | -#define ES11_LOADIDENTITY (ES11_LINEWIDTHX + 1) | ||
3394 | -#define ES11_LOADMATRIXF (ES11_LOADIDENTITY + 1) | ||
3395 | -#define ES11_LOADMATRIXX (ES11_LOADMATRIXF + 1) | ||
3396 | -#define ES11_LOGICOP (ES11_LOADMATRIXX + 1) | ||
3397 | -#define ES11_MATERIALF (ES11_LOGICOP + 1) | ||
3398 | -#define ES11_MATERIALFV (ES11_MATERIALF + 1) | ||
3399 | -#define ES11_MATERIALX (ES11_MATERIALFV + 1) | ||
3400 | -#define ES11_MATERIALXV (ES11_MATERIALX + 1) | ||
3401 | -#define ES11_MATRIXMODE (ES11_MATERIALXV + 1) | ||
3402 | -#define ES11_MULTITEXCOORD4F (ES11_MATRIXMODE + 1) | ||
3403 | -#define ES11_MULTITEXCOORD4X (ES11_MULTITEXCOORD4F + 1) | ||
3404 | -#define ES11_MULTMATRIXF (ES11_MULTITEXCOORD4X + 1) | ||
3405 | -#define ES11_MULTMATRIXX (ES11_MULTMATRIXF + 1) | ||
3406 | -#define ES11_NORMAL3F (ES11_MULTMATRIXX + 1) | ||
3407 | -#define ES11_NORMAL3X (ES11_NORMAL3F + 1) | ||
3408 | -#define ES11_NORMALPOINTER (ES11_NORMAL3X + 1) | ||
3409 | -#define ES11_ORTHOF (ES11_NORMALPOINTER + 1) | ||
3410 | -#define ES11_ORTHOX (ES11_ORTHOF + 1) | ||
3411 | -#define ES11_PIXELSTOREI (ES11_ORTHOX + 1) | ||
3412 | -#define ES11_POINTPARAMETERF (ES11_PIXELSTOREI + 1) | ||
3413 | -#define ES11_POINTPARAMETERFV (ES11_POINTPARAMETERF + 1) | ||
3414 | -#define ES11_POINTPARAMETERX (ES11_POINTPARAMETERFV + 1) | ||
3415 | -#define ES11_POINTPARAMETERXV (ES11_POINTPARAMETERX + 1) | ||
3416 | -#define ES11_POINTSIZE (ES11_POINTPARAMETERXV + 1) | ||
3417 | -#define ES11_POINTSIZEX (ES11_POINTSIZE + 1) | ||
3418 | -#define ES11_POLYGONOFFSET (ES11_POINTSIZEX + 1) | ||
3419 | -#define ES11_POLYGONOFFSETX (ES11_POLYGONOFFSET + 1) | ||
3420 | -#define ES11_POPMATRIX (ES11_POLYGONOFFSETX + 1) | ||
3421 | -#define ES11_PUSHMATRIX (ES11_POPMATRIX + 1) | ||
3422 | -#define ES11_READPIXELS (ES11_PUSHMATRIX + 1) | ||
3423 | -#define ES11_ROTATEF (ES11_READPIXELS + 1) | ||
3424 | -#define ES11_ROTATEX (ES11_ROTATEF + 1) | ||
3425 | -#define ES11_SAMPLECOVERAGE (ES11_ROTATEX + 1) | ||
3426 | -#define ES11_SAMPLECOVERAGEX (ES11_SAMPLECOVERAGE + 1) | ||
3427 | -#define ES11_SCALEF (ES11_SAMPLECOVERAGEX + 1) | ||
3428 | -#define ES11_SCALEX (ES11_SCALEF + 1) | ||
3429 | -#define ES11_SCISSOR (ES11_SCALEX + 1) | ||
3430 | -#define ES11_SHADEMODEL (ES11_SCISSOR + 1) | ||
3431 | -#define ES11_STENCILFUNC (ES11_SHADEMODEL + 1) | ||
3432 | -#define ES11_STENCILMASK (ES11_STENCILFUNC + 1) | ||
3433 | -#define ES11_STENCILOP (ES11_STENCILMASK + 1) | ||
3434 | -#define ES11_TEXCOORDPOINTER (ES11_STENCILOP + 1) | ||
3435 | -#define ES11_TEXENVF (ES11_TEXCOORDPOINTER + 1) | ||
3436 | -#define ES11_TEXENVFV (ES11_TEXENVF + 1) | ||
3437 | -#define ES11_TEXENVI (ES11_TEXENVFV + 1) | ||
3438 | -#define ES11_TEXENVIV (ES11_TEXENVI + 1) | ||
3439 | -#define ES11_TEXENVX (ES11_TEXENVIV + 1) | ||
3440 | -#define ES11_TEXENVXV (ES11_TEXENVX + 1) | ||
3441 | -#define ES11_TEXIMAGE2D (ES11_TEXENVXV + 1) | ||
3442 | -#define ES11_TEXPARAMETERF (ES11_TEXIMAGE2D + 1) | ||
3443 | -#define ES11_TEXPARAMETERFV (ES11_TEXPARAMETERF + 1) | ||
3444 | -#define ES11_TEXPARAMETERI (ES11_TEXPARAMETERFV + 1) | ||
3445 | -#define ES11_TEXPARAMETERIV (ES11_TEXPARAMETERI + 1) | ||
3446 | -#define ES11_TEXPARAMETERX (ES11_TEXPARAMETERIV + 1) | ||
3447 | -#define ES11_TEXPARAMETERXV (ES11_TEXPARAMETERX + 1) | ||
3448 | -#define ES11_TEXSUBIMAGE2D (ES11_TEXPARAMETERXV + 1) | ||
3449 | -#define ES11_TRANSLATEF (ES11_TEXSUBIMAGE2D + 1) | ||
3450 | -#define ES11_TRANSLATEX (ES11_TRANSLATEF + 1) | ||
3451 | -#define ES11_VERTEXPOINTER (ES11_TRANSLATEX + 1) | ||
3452 | -#define ES11_VIEWPORT (ES11_VERTEXPOINTER + 1) | ||
3453 | -#define ES11_BLENDEQUATIONOES (ES11_VIEWPORT + 1) | ||
3454 | -#define ES11_BLENDFUNCSEPERATEOES (ES11_BLENDEQUATIONOES + 1) | ||
3455 | -#define ES11_BLENDEQUATIONSEPARATEOES (ES11_BLENDFUNCSEPERATEOES + 1) | ||
3456 | -#define ES11_GLMAPBUFFEROES (ES11_BLENDEQUATIONSEPARATEOES + 1) | ||
3457 | -#define ES11_GLUNMAPBUFFEROES (ES11_GLMAPBUFFEROES + 1) | ||
3458 | -#define ES11_GLGETBUFFERPOINTERVOES (ES11_GLUNMAPBUFFEROES + 1) | ||
3459 | -#define ES11_CALLS (ES11_GLGETBUFFERPOINTERVOES + 1) | ||
3460 | -#define ES11_DRAWCALLS (ES11_CALLS + 1) | ||
3461 | -#define ES11_STATECHANGECALLS (ES11_DRAWCALLS + 1) | ||
3462 | -#define ES11_POINTCOUNT (ES11_STATECHANGECALLS + 1) | ||
3463 | -#define ES11_LINECOUNT (ES11_POINTCOUNT + 1) | ||
3464 | -#define ES11_TRIANGLECOUNT (ES11_LINECOUNT + 1) | ||
3465 | - | ||
3466 | -/* OpenGL ES2X API IDs. */ | ||
3467 | -#define ES20_ACTIVETEXTURE 1 | ||
3468 | -#define ES20_ATTACHSHADER (ES20_ACTIVETEXTURE + 1) | ||
3469 | -#define ES20_BINDATTRIBLOCATION (ES20_ATTACHSHADER + 1) | ||
3470 | -#define ES20_BINDBUFFER (ES20_BINDATTRIBLOCATION + 1) | ||
3471 | -#define ES20_BINDFRAMEBUFFER (ES20_BINDBUFFER + 1) | ||
3472 | -#define ES20_BINDRENDERBUFFER (ES20_BINDFRAMEBUFFER + 1) | ||
3473 | -#define ES20_BINDTEXTURE (ES20_BINDRENDERBUFFER + 1) | ||
3474 | -#define ES20_BLENDCOLOR (ES20_BINDTEXTURE + 1) | ||
3475 | -#define ES20_BLENDEQUATION (ES20_BLENDCOLOR + 1) | ||
3476 | -#define ES20_BLENDEQUATIONSEPARATE (ES20_BLENDEQUATION + 1) | ||
3477 | -#define ES20_BLENDFUNC (ES20_BLENDEQUATIONSEPARATE + 1) | ||
3478 | -#define ES20_BLENDFUNCSEPARATE (ES20_BLENDFUNC + 1) | ||
3479 | -#define ES20_BUFFERDATA (ES20_BLENDFUNCSEPARATE + 1) | ||
3480 | -#define ES20_BUFFERSUBDATA (ES20_BUFFERDATA + 1) | ||
3481 | -#define ES20_CHECKFRAMEBUFFERSTATUS (ES20_BUFFERSUBDATA + 1) | ||
3482 | -#define ES20_CLEAR (ES20_CHECKFRAMEBUFFERSTATUS + 1) | ||
3483 | -#define ES20_CLEARCOLOR (ES20_CLEAR + 1) | ||
3484 | -#define ES20_CLEARDEPTHF (ES20_CLEARCOLOR + 1) | ||
3485 | -#define ES20_CLEARSTENCIL (ES20_CLEARDEPTHF + 1) | ||
3486 | -#define ES20_COLORMASK (ES20_CLEARSTENCIL + 1) | ||
3487 | -#define ES20_COMPILESHADER (ES20_COLORMASK + 1) | ||
3488 | -#define ES20_COMPRESSEDTEXIMAGE2D (ES20_COMPILESHADER + 1) | ||
3489 | -#define ES20_COMPRESSEDTEXSUBIMAGE2D (ES20_COMPRESSEDTEXIMAGE2D + 1) | ||
3490 | -#define ES20_COPYTEXIMAGE2D (ES20_COMPRESSEDTEXSUBIMAGE2D + 1) | ||
3491 | -#define ES20_COPYTEXSUBIMAGE2D (ES20_COPYTEXIMAGE2D + 1) | ||
3492 | -#define ES20_CREATEPROGRAM (ES20_COPYTEXSUBIMAGE2D + 1) | ||
3493 | -#define ES20_CREATESHADER (ES20_CREATEPROGRAM + 1) | ||
3494 | -#define ES20_CULLFACE (ES20_CREATESHADER + 1) | ||
3495 | -#define ES20_DELETEBUFFERS (ES20_CULLFACE + 1) | ||
3496 | -#define ES20_DELETEFRAMEBUFFERS (ES20_DELETEBUFFERS + 1) | ||
3497 | -#define ES20_DELETEPROGRAM (ES20_DELETEFRAMEBUFFERS + 1) | ||
3498 | -#define ES20_DELETERENDERBUFFERS (ES20_DELETEPROGRAM + 1) | ||
3499 | -#define ES20_DELETESHADER (ES20_DELETERENDERBUFFERS + 1) | ||
3500 | -#define ES20_DELETETEXTURES (ES20_DELETESHADER + 1) | ||
3501 | -#define ES20_DEPTHFUNC (ES20_DELETETEXTURES + 1) | ||
3502 | -#define ES20_DEPTHMASK (ES20_DEPTHFUNC + 1) | ||
3503 | -#define ES20_DEPTHRANGEF (ES20_DEPTHMASK + 1) | ||
3504 | -#define ES20_DETACHSHADER (ES20_DEPTHRANGEF + 1) | ||
3505 | -#define ES20_DISABLE (ES20_DETACHSHADER + 1) | ||
3506 | -#define ES20_DISABLEVERTEXATTRIBARRAY (ES20_DISABLE + 1) | ||
3507 | -#define ES20_DRAWARRAYS (ES20_DISABLEVERTEXATTRIBARRAY + 1) | ||
3508 | -#define ES20_DRAWELEMENTS (ES20_DRAWARRAYS + 1) | ||
3509 | -#define ES20_ENABLE (ES20_DRAWELEMENTS + 1) | ||
3510 | -#define ES20_ENABLEVERTEXATTRIBARRAY (ES20_ENABLE + 1) | ||
3511 | -#define ES20_FINISH (ES20_ENABLEVERTEXATTRIBARRAY + 1) | ||
3512 | -#define ES20_FLUSH (ES20_FINISH + 1) | ||
3513 | -#define ES20_FRAMEBUFFERRENDERBUFFER (ES20_FLUSH + 1) | ||
3514 | -#define ES20_FRAMEBUFFERTEXTURE2D (ES20_FRAMEBUFFERRENDERBUFFER + 1) | ||
3515 | -#define ES20_FRONTFACE (ES20_FRAMEBUFFERTEXTURE2D + 1) | ||
3516 | -#define ES20_GENBUFFERS (ES20_FRONTFACE + 1) | ||
3517 | -#define ES20_GENERATEMIPMAP (ES20_GENBUFFERS + 1) | ||
3518 | -#define ES20_GENFRAMEBUFFERS (ES20_GENERATEMIPMAP + 1) | ||
3519 | -#define ES20_GENRENDERBUFFERS (ES20_GENFRAMEBUFFERS + 1) | ||
3520 | -#define ES20_GENTEXTURES (ES20_GENRENDERBUFFERS + 1) | ||
3521 | -#define ES20_GETACTIVEATTRIB (ES20_GENTEXTURES + 1) | ||
3522 | -#define ES20_GETACTIVEUNIFORM (ES20_GETACTIVEATTRIB + 1) | ||
3523 | -#define ES20_GETATTACHEDSHADERS (ES20_GETACTIVEUNIFORM + 1) | ||
3524 | -#define ES20_GETATTRIBLOCATION (ES20_GETATTACHEDSHADERS + 1) | ||
3525 | -#define ES20_GETBOOLEANV (ES20_GETATTRIBLOCATION + 1) | ||
3526 | -#define ES20_GETBUFFERPARAMETERIV (ES20_GETBOOLEANV + 1) | ||
3527 | -#define ES20_GETERROR (ES20_GETBUFFERPARAMETERIV + 1) | ||
3528 | -#define ES20_GETFLOATV (ES20_GETERROR + 1) | ||
3529 | -#define ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV (ES20_GETFLOATV + 1) | ||
3530 | -#define ES20_GETINTEGERV (ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV + 1) | ||
3531 | -#define ES20_GETPROGRAMIV (ES20_GETINTEGERV + 1) | ||
3532 | -#define ES20_GETPROGRAMINFOLOG (ES20_GETPROGRAMIV + 1) | ||
3533 | -#define ES20_GETRENDERBUFFERPARAMETERIV (ES20_GETPROGRAMINFOLOG + 1) | ||
3534 | -#define ES20_GETSHADERIV (ES20_GETRENDERBUFFERPARAMETERIV + 1) | ||
3535 | -#define ES20_GETSHADERINFOLOG (ES20_GETSHADERIV + 1) | ||
3536 | -#define ES20_GETSHADERPRECISIONFORMAT (ES20_GETSHADERINFOLOG + 1) | ||
3537 | -#define ES20_GETSHADERSOURCE (ES20_GETSHADERPRECISIONFORMAT + 1) | ||
3538 | -#define ES20_GETSTRING (ES20_GETSHADERSOURCE + 1) | ||
3539 | -#define ES20_GETTEXPARAMETERFV (ES20_GETSTRING + 1) | ||
3540 | -#define ES20_GETTEXPARAMETERIV (ES20_GETTEXPARAMETERFV + 1) | ||
3541 | -#define ES20_GETUNIFORMFV (ES20_GETTEXPARAMETERIV + 1) | ||
3542 | -#define ES20_GETUNIFORMIV (ES20_GETUNIFORMFV + 1) | ||
3543 | -#define ES20_GETUNIFORMLOCATION (ES20_GETUNIFORMIV + 1) | ||
3544 | -#define ES20_GETVERTEXATTRIBFV (ES20_GETUNIFORMLOCATION + 1) | ||
3545 | -#define ES20_GETVERTEXATTRIBIV (ES20_GETVERTEXATTRIBFV + 1) | ||
3546 | -#define ES20_GETVERTEXATTRIBPOINTERV (ES20_GETVERTEXATTRIBIV + 1) | ||
3547 | -#define ES20_HINT (ES20_GETVERTEXATTRIBPOINTERV + 1) | ||
3548 | -#define ES20_ISBUFFER (ES20_HINT + 1) | ||
3549 | -#define ES20_ISENABLED (ES20_ISBUFFER + 1) | ||
3550 | -#define ES20_ISFRAMEBUFFER (ES20_ISENABLED + 1) | ||
3551 | -#define ES20_ISPROGRAM (ES20_ISFRAMEBUFFER + 1) | ||
3552 | -#define ES20_ISRENDERBUFFER (ES20_ISPROGRAM + 1) | ||
3553 | -#define ES20_ISSHADER (ES20_ISRENDERBUFFER + 1) | ||
3554 | -#define ES20_ISTEXTURE (ES20_ISSHADER + 1) | ||
3555 | -#define ES20_LINEWIDTH (ES20_ISTEXTURE + 1) | ||
3556 | -#define ES20_LINKPROGRAM (ES20_LINEWIDTH + 1) | ||
3557 | -#define ES20_PIXELSTOREI (ES20_LINKPROGRAM + 1) | ||
3558 | -#define ES20_POLYGONOFFSET (ES20_PIXELSTOREI + 1) | ||
3559 | -#define ES20_READPIXELS (ES20_POLYGONOFFSET + 1) | ||
3560 | -#define ES20_RELEASESHADERCOMPILER (ES20_READPIXELS + 1) | ||
3561 | -#define ES20_RENDERBUFFERSTORAGE (ES20_RELEASESHADERCOMPILER + 1) | ||
3562 | -#define ES20_SAMPLECOVERAGE (ES20_RENDERBUFFERSTORAGE + 1) | ||
3563 | -#define ES20_SCISSOR (ES20_SAMPLECOVERAGE + 1) | ||
3564 | -#define ES20_SHADERBINARY (ES20_SCISSOR + 1) | ||
3565 | -#define ES20_SHADERSOURCE (ES20_SHADERBINARY + 1) | ||
3566 | -#define ES20_STENCILFUNC (ES20_SHADERSOURCE + 1) | ||
3567 | -#define ES20_STENCILFUNCSEPARATE (ES20_STENCILFUNC + 1) | ||
3568 | -#define ES20_STENCILMASK (ES20_STENCILFUNCSEPARATE + 1) | ||
3569 | -#define ES20_STENCILMASKSEPARATE (ES20_STENCILMASK + 1) | ||
3570 | -#define ES20_STENCILOP (ES20_STENCILMASKSEPARATE + 1) | ||
3571 | -#define ES20_STENCILOPSEPARATE (ES20_STENCILOP + 1) | ||
3572 | -#define ES20_TEXIMAGE2D (ES20_STENCILOPSEPARATE + 1) | ||
3573 | -#define ES20_TEXPARAMETERF (ES20_TEXIMAGE2D + 1) | ||
3574 | -#define ES20_TEXPARAMETERFV (ES20_TEXPARAMETERF + 1) | ||
3575 | -#define ES20_TEXPARAMETERI (ES20_TEXPARAMETERFV + 1) | ||
3576 | -#define ES20_TEXPARAMETERIV (ES20_TEXPARAMETERI + 1) | ||
3577 | -#define ES20_TEXSUBIMAGE2D (ES20_TEXPARAMETERIV + 1) | ||
3578 | -#define ES20_UNIFORM1F (ES20_TEXSUBIMAGE2D + 1) | ||
3579 | -#define ES20_UNIFORM1FV (ES20_UNIFORM1F + 1) | ||
3580 | -#define ES20_UNIFORM1I (ES20_UNIFORM1FV + 1) | ||
3581 | -#define ES20_UNIFORM1IV (ES20_UNIFORM1I + 1) | ||
3582 | -#define ES20_UNIFORM2F (ES20_UNIFORM1IV + 1) | ||
3583 | -#define ES20_UNIFORM2FV (ES20_UNIFORM2F + 1) | ||
3584 | -#define ES20_UNIFORM2I (ES20_UNIFORM2FV + 1) | ||
3585 | -#define ES20_UNIFORM2IV (ES20_UNIFORM2I + 1) | ||
3586 | -#define ES20_UNIFORM3F (ES20_UNIFORM2IV + 1) | ||
3587 | -#define ES20_UNIFORM3FV (ES20_UNIFORM3F + 1) | ||
3588 | -#define ES20_UNIFORM3I (ES20_UNIFORM3FV + 1) | ||
3589 | -#define ES20_UNIFORM3IV (ES20_UNIFORM3I + 1) | ||
3590 | -#define ES20_UNIFORM4F (ES20_UNIFORM3IV + 1) | ||
3591 | -#define ES20_UNIFORM4FV (ES20_UNIFORM4F + 1) | ||
3592 | -#define ES20_UNIFORM4I (ES20_UNIFORM4FV + 1) | ||
3593 | -#define ES20_UNIFORM4IV (ES20_UNIFORM4I + 1) | ||
3594 | -#define ES20_UNIFORMMATRIX2FV (ES20_UNIFORM4IV + 1) | ||
3595 | -#define ES20_UNIFORMMATRIX3FV (ES20_UNIFORMMATRIX2FV + 1) | ||
3596 | -#define ES20_UNIFORMMATRIX4FV (ES20_UNIFORMMATRIX3FV + 1) | ||
3597 | -#define ES20_USEPROGRAM (ES20_UNIFORMMATRIX4FV + 1) | ||
3598 | -#define ES20_VALIDATEPROGRAM (ES20_USEPROGRAM + 1) | ||
3599 | -#define ES20_VERTEXATTRIB1F (ES20_VALIDATEPROGRAM + 1) | ||
3600 | -#define ES20_VERTEXATTRIB1FV (ES20_VERTEXATTRIB1F + 1) | ||
3601 | -#define ES20_VERTEXATTRIB2F (ES20_VERTEXATTRIB1FV + 1) | ||
3602 | -#define ES20_VERTEXATTRIB2FV (ES20_VERTEXATTRIB2F + 1) | ||
3603 | -#define ES20_VERTEXATTRIB3F (ES20_VERTEXATTRIB2FV + 1) | ||
3604 | -#define ES20_VERTEXATTRIB3FV (ES20_VERTEXATTRIB3F + 1) | ||
3605 | -#define ES20_VERTEXATTRIB4F (ES20_VERTEXATTRIB3FV + 1) | ||
3606 | -#define ES20_VERTEXATTRIB4FV (ES20_VERTEXATTRIB4F + 1) | ||
3607 | -#define ES20_VERTEXATTRIBPOINTER (ES20_VERTEXATTRIB4FV + 1) | ||
3608 | -#define ES20_VIEWPORT (ES20_VERTEXATTRIBPOINTER + 1) | ||
3609 | -#define ES20_GETPROGRAMBINARYOES (ES20_VIEWPORT + 1) | ||
3610 | -#define ES20_PROGRAMBINARYOES (ES20_GETPROGRAMBINARYOES + 1) | ||
3611 | -#define ES20_TEXIMAGE3DOES (ES20_PROGRAMBINARYOES + 1) | ||
3612 | -#define ES20_TEXSUBIMAGE3DOES (ES20_TEXIMAGE3DOES + 1) | ||
3613 | -#define ES20_COPYSUBIMAGE3DOES (ES20_TEXSUBIMAGE3DOES + 1) | ||
3614 | -#define ES20_COMPRESSEDTEXIMAGE3DOES (ES20_COPYSUBIMAGE3DOES + 1) | ||
3615 | -#define ES20_COMPRESSEDTEXSUBIMAGE3DOES (ES20_COMPRESSEDTEXIMAGE3DOES + 1) | ||
3616 | -#define ES20_FRAMEBUFFERTEXTURE3DOES (ES20_COMPRESSEDTEXSUBIMAGE3DOES + 1) | ||
3617 | -#define ES20_BINDVERTEXARRAYOES (ES20_FRAMEBUFFERTEXTURE3DOES + 1) | ||
3618 | -#define ES20_GENVERTEXARRAYOES (ES20_BINDVERTEXARRAYOES + 1) | ||
3619 | -#define ES20_ISVERTEXARRAYOES (ES20_GENVERTEXARRAYOES + 1) | ||
3620 | -#define ES20_DELETEVERTEXARRAYOES (ES20_ISVERTEXARRAYOES + 1) | ||
3621 | -#define ES20_GLMAPBUFFEROES (ES20_DELETEVERTEXARRAYOES + 1) | ||
3622 | -#define ES20_GLUNMAPBUFFEROES (ES20_GLMAPBUFFEROES + 1) | ||
3623 | -#define ES20_GLGETBUFFERPOINTERVOES (ES20_GLUNMAPBUFFEROES + 1) | ||
3624 | -#define ES20_DISCARDFRAMEBUFFEREXT (ES20_GLGETBUFFERPOINTERVOES + 1) | ||
3625 | -#define ES20_CALLS (ES20_DISCARDFRAMEBUFFEREXT + 1) | ||
3626 | -#define ES20_DRAWCALLS (ES20_CALLS + 1) | ||
3627 | -#define ES20_STATECHANGECALLS (ES20_DRAWCALLS + 1) | ||
3628 | -#define ES20_POINTCOUNT (ES20_STATECHANGECALLS + 1) | ||
3629 | -#define ES20_LINECOUNT (ES20_POINTCOUNT + 1) | ||
3630 | -#define ES20_TRIANGLECOUNT (ES20_LINECOUNT + 1) | ||
3631 | - | ||
3632 | -/* OpenVG API IDs. */ | ||
3633 | -#define VG11_APPENDPATH 1 | ||
3634 | -#define VG11_APPENDPATHDATA (VG11_APPENDPATH + 1) | ||
3635 | -#define VG11_CHILDIMAGE (VG11_APPENDPATHDATA + 1) | ||
3636 | -#define VG11_CLEAR (VG11_CHILDIMAGE + 1) | ||
3637 | -#define VG11_CLEARGLYPH (VG11_CLEAR + 1) | ||
3638 | -#define VG11_CLEARIMAGE (VG11_CLEARGLYPH + 1) | ||
3639 | -#define VG11_CLEARPATH (VG11_CLEARIMAGE + 1) | ||
3640 | -#define VG11_COLORMATRIX (VG11_CLEARPATH + 1) | ||
3641 | -#define VG11_CONVOLVE (VG11_COLORMATRIX + 1) | ||
3642 | -#define VG11_COPYIMAGE (VG11_CONVOLVE + 1) | ||
3643 | -#define VG11_COPYMASK (VG11_COPYIMAGE + 1) | ||
3644 | -#define VG11_COPYPIXELS (VG11_COPYMASK + 1) | ||
3645 | -#define VG11_CREATEFONT (VG11_COPYPIXELS + 1) | ||
3646 | -#define VG11_CREATEIMAGE (VG11_CREATEFONT + 1) | ||
3647 | -#define VG11_CREATEMASKLAYER (VG11_CREATEIMAGE + 1) | ||
3648 | -#define VG11_CREATEPAINT (VG11_CREATEMASKLAYER + 1) | ||
3649 | -#define VG11_CREATEPATH (VG11_CREATEPAINT + 1) | ||
3650 | -#define VG11_DESTROYFONT (VG11_CREATEPATH + 1) | ||
3651 | -#define VG11_DESTROYIMAGE (VG11_DESTROYFONT + 1) | ||
3652 | -#define VG11_DESTROYMASKLAYER (VG11_DESTROYIMAGE + 1) | ||
3653 | -#define VG11_DESTROYPAINT (VG11_DESTROYMASKLAYER + 1) | ||
3654 | -#define VG11_DESTROYPATH (VG11_DESTROYPAINT + 1) | ||
3655 | -#define VG11_DRAWGLYPH (VG11_DESTROYPATH + 1) | ||
3656 | -#define VG11_DRAWGLYPHS (VG11_DRAWGLYPH + 1) | ||
3657 | -#define VG11_DRAWIMAGE (VG11_DRAWGLYPHS + 1) | ||
3658 | -#define VG11_DRAWPATH (VG11_DRAWIMAGE + 1) | ||
3659 | -#define VG11_FILLMASKLAYER (VG11_DRAWPATH + 1) | ||
3660 | -#define VG11_FINISH (VG11_FILLMASKLAYER + 1) | ||
3661 | -#define VG11_FLUSH (VG11_FINISH + 1) | ||
3662 | -#define VG11_GAUSSIANBLUR (VG11_FLUSH + 1) | ||
3663 | -#define VG11_GETCOLOR (VG11_GAUSSIANBLUR + 1) | ||
3664 | -#define VG11_GETERROR (VG11_GETCOLOR + 1) | ||
3665 | -#define VG11_GETF (VG11_GETERROR + 1) | ||
3666 | -#define VG11_GETFV (VG11_GETF + 1) | ||
3667 | -#define VG11_GETI (VG11_GETFV + 1) | ||
3668 | -#define VG11_GETIMAGESUBDATA (VG11_GETI + 1) | ||
3669 | -#define VG11_GETIV (VG11_GETIMAGESUBDATA + 1) | ||
3670 | -#define VG11_GETMATRIX (VG11_GETIV + 1) | ||
3671 | -#define VG11_GETPAINT (VG11_GETMATRIX + 1) | ||
3672 | -#define VG11_GETPARAMETERF (VG11_GETPAINT + 1) | ||
3673 | -#define VG11_GETPARAMETERFV (VG11_GETPARAMETERF + 1) | ||
3674 | -#define VG11_GETPARAMETERI (VG11_GETPARAMETERFV + 1) | ||
3675 | -#define VG11_GETPARAMETERIV (VG11_GETPARAMETERI + 1) | ||
3676 | -#define VG11_GETPARAMETERVECTORSIZE (VG11_GETPARAMETERIV + 1) | ||
3677 | -#define VG11_GETPARENT (VG11_GETPARAMETERVECTORSIZE + 1) | ||
3678 | -#define VG11_GETPATHCAPABILITIES (VG11_GETPARENT + 1) | ||
3679 | -#define VG11_GETPIXELS (VG11_GETPATHCAPABILITIES + 1) | ||
3680 | -#define VG11_GETSTRING (VG11_GETPIXELS + 1) | ||
3681 | -#define VG11_GETVECTORSIZE (VG11_GETSTRING + 1) | ||
3682 | -#define VG11_HARDWAREQUERY (VG11_GETVECTORSIZE + 1) | ||
3683 | -#define VG11_IMAGESUBDATA (VG11_HARDWAREQUERY + 1) | ||
3684 | -#define VG11_INTERPOLATEPATH (VG11_IMAGESUBDATA + 1) | ||
3685 | -#define VG11_LOADIDENTITY (VG11_INTERPOLATEPATH + 1) | ||
3686 | -#define VG11_LOADMATRIX (VG11_LOADIDENTITY + 1) | ||
3687 | -#define VG11_LOOKUP (VG11_LOADMATRIX + 1) | ||
3688 | -#define VG11_LOOKUPSINGLE (VG11_LOOKUP + 1) | ||
3689 | -#define VG11_MASK (VG11_LOOKUPSINGLE + 1) | ||
3690 | -#define VG11_MODIFYPATHCOORDS (VG11_MASK + 1) | ||
3691 | -#define VG11_MULTMATRIX (VG11_MODIFYPATHCOORDS + 1) | ||
3692 | -#define VG11_PAINTPATTERN (VG11_MULTMATRIX + 1) | ||
3693 | -#define VG11_PATHBOUNDS (VG11_PAINTPATTERN + 1) | ||
3694 | -#define VG11_PATHLENGTH (VG11_PATHBOUNDS + 1) | ||
3695 | -#define VG11_PATHTRANSFORMEDBOUNDS (VG11_PATHLENGTH + 1) | ||
3696 | -#define VG11_POINTALONGPATH (VG11_PATHTRANSFORMEDBOUNDS + 1) | ||
3697 | -#define VG11_READPIXELS (VG11_POINTALONGPATH + 1) | ||
3698 | -#define VG11_REMOVEPATHCAPABILITIES (VG11_READPIXELS + 1) | ||
3699 | -#define VG11_RENDERTOMASK (VG11_REMOVEPATHCAPABILITIES + 1) | ||
3700 | -#define VG11_ROTATE (VG11_RENDERTOMASK + 1) | ||
3701 | -#define VG11_SCALE (VG11_ROTATE + 1) | ||
3702 | -#define VG11_SEPARABLECONVOLVE (VG11_SCALE + 1) | ||
3703 | -#define VG11_SETCOLOR (VG11_SEPARABLECONVOLVE + 1) | ||
3704 | -#define VG11_SETF (VG11_SETCOLOR + 1) | ||
3705 | -#define VG11_SETFV (VG11_SETF + 1) | ||
3706 | -#define VG11_SETGLYPHTOIMAGE (VG11_SETFV + 1) | ||
3707 | -#define VG11_SETGLYPHTOPATH (VG11_SETGLYPHTOIMAGE + 1) | ||
3708 | -#define VG11_SETI (VG11_SETGLYPHTOPATH + 1) | ||
3709 | -#define VG11_SETIV (VG11_SETI + 1) | ||
3710 | -#define VG11_SETPAINT (VG11_SETIV + 1) | ||
3711 | -#define VG11_SETPARAMETERF (VG11_SETPAINT + 1) | ||
3712 | -#define VG11_SETPARAMETERFV (VG11_SETPARAMETERF + 1) | ||
3713 | -#define VG11_SETPARAMETERI (VG11_SETPARAMETERFV + 1) | ||
3714 | -#define VG11_SETPARAMETERIV (VG11_SETPARAMETERI + 1) | ||
3715 | -#define VG11_SETPIXELS (VG11_SETPARAMETERIV + 1) | ||
3716 | -#define VG11_SHEAR (VG11_SETPIXELS + 1) | ||
3717 | -#define VG11_TRANSFORMPATH (VG11_SHEAR + 1) | ||
3718 | -#define VG11_TRANSLATE (VG11_TRANSFORMPATH + 1) | ||
3719 | -#define VG11_WRITEPIXELS (VG11_TRANSLATE + 1) | ||
3720 | -#define VG11_CALLS (VG11_WRITEPIXELS + 1) | ||
3721 | -#define VG11_DRAWCALLS (VG11_CALLS + 1) | ||
3722 | -#define VG11_STATECHANGECALLS (VG11_DRAWCALLS + 1) | ||
3723 | -#define VG11_FILLCOUNT (VG11_STATECHANGECALLS + 1) | ||
3724 | -#define VG11_STROKECOUNT (VG11_FILLCOUNT + 1) | ||
3725 | +#define ES11_CALLS 151 | ||
3726 | +#define ES11_DRAWCALLS (ES11_CALLS + 1) | ||
3727 | +#define ES11_STATECHANGECALLS (ES11_DRAWCALLS + 1) | ||
3728 | +#define ES11_POINTCOUNT (ES11_STATECHANGECALLS + 1) | ||
3729 | +#define ES11_LINECOUNT (ES11_POINTCOUNT + 1) | ||
3730 | +#define ES11_TRIANGLECOUNT (ES11_LINECOUNT + 1) | ||
3731 | + | ||
3732 | +#define ES20_CALLS 159 | ||
3733 | +#define ES20_DRAWCALLS (ES20_CALLS + 1) | ||
3734 | +#define ES20_STATECHANGECALLS (ES20_DRAWCALLS + 1) | ||
3735 | +#define ES20_POINTCOUNT (ES20_STATECHANGECALLS + 1) | ||
3736 | +#define ES20_LINECOUNT (ES20_POINTCOUNT + 1) | ||
3737 | +#define ES20_TRIANGLECOUNT (ES20_LINECOUNT + 1) | ||
3738 | + | ||
3739 | +#define VG11_CALLS 88 | ||
3740 | +#define VG11_DRAWCALLS (VG11_CALLS + 1) | ||
3741 | +#define VG11_STATECHANGECALLS (VG11_DRAWCALLS + 1) | ||
3742 | +#define VG11_FILLCOUNT (VG11_STATECHANGECALLS + 1) | ||
3743 | +#define VG11_STROKECOUNT (VG11_FILLCOUNT + 1) | ||
3744 | /* End of Driver API ID Definitions. */ | ||
3745 | |||
3746 | /* HAL & MISC IDs. */ | ||
3747 | -#define HAL_VERTBUFNEWBYTEALLOC 1 | ||
3748 | -#define HAL_VERTBUFTOTALBYTEALLOC (HAL_VERTBUFNEWBYTEALLOC + 1) | ||
3749 | -#define HAL_VERTBUFNEWOBJALLOC (HAL_VERTBUFTOTALBYTEALLOC + 1) | ||
3750 | -#define HAL_VERTBUFTOTALOBJALLOC (HAL_VERTBUFNEWOBJALLOC + 1) | ||
3751 | -#define HAL_INDBUFNEWBYTEALLOC (HAL_VERTBUFTOTALOBJALLOC + 1) | ||
3752 | -#define HAL_INDBUFTOTALBYTEALLOC (HAL_INDBUFNEWBYTEALLOC + 1) | ||
3753 | -#define HAL_INDBUFNEWOBJALLOC (HAL_INDBUFTOTALBYTEALLOC + 1) | ||
3754 | -#define HAL_INDBUFTOTALOBJALLOC (HAL_INDBUFNEWOBJALLOC + 1) | ||
3755 | -#define HAL_TEXBUFNEWBYTEALLOC (HAL_INDBUFTOTALOBJALLOC + 1) | ||
3756 | -#define HAL_TEXBUFTOTALBYTEALLOC (HAL_TEXBUFNEWBYTEALLOC + 1) | ||
3757 | -#define HAL_TEXBUFNEWOBJALLOC (HAL_TEXBUFTOTALBYTEALLOC + 1) | ||
3758 | -#define HAL_TEXBUFTOTALOBJALLOC (HAL_TEXBUFNEWOBJALLOC + 1) | ||
3759 | - | ||
3760 | -#define GPU_CYCLES 1 | ||
3761 | -#define GPU_READ64BYTE (GPU_CYCLES + 1) | ||
3762 | -#define GPU_WRITE64BYTE (GPU_READ64BYTE + 1) | ||
3763 | -#define GPU_TOTALCYCLES (GPU_WRITE64BYTE + 1) | ||
3764 | -#define GPU_IDLECYCLES (GPU_TOTALCYCLES + 1) | ||
3765 | - | ||
3766 | -#define VS_INSTCOUNT 1 | ||
3767 | -#define VS_BRANCHINSTCOUNT (VS_INSTCOUNT + 1) | ||
3768 | -#define VS_TEXLDINSTCOUNT (VS_BRANCHINSTCOUNT + 1) | ||
3769 | -#define VS_RENDEREDVERTCOUNT (VS_TEXLDINSTCOUNT + 1) | ||
3770 | - | ||
3771 | -#define PS_INSTCOUNT 1 | ||
3772 | -#define PS_BRANCHINSTCOUNT (PS_INSTCOUNT + 1) | ||
3773 | -#define PS_TEXLDINSTCOUNT (PS_BRANCHINSTCOUNT + 1) | ||
3774 | -#define PS_RENDEREDPIXCOUNT (PS_TEXLDINSTCOUNT + 1) | ||
3775 | - | ||
3776 | -#define PA_INVERTCOUNT 1 | ||
3777 | -#define PA_INPRIMCOUNT (PA_INVERTCOUNT + 1) | ||
3778 | -#define PA_OUTPRIMCOUNT (PA_INPRIMCOUNT + 1) | ||
3779 | -#define PA_DEPTHCLIPCOUNT (PA_OUTPRIMCOUNT + 1) | ||
3780 | -#define PA_TRIVIALREJCOUNT (PA_DEPTHCLIPCOUNT + 1) | ||
3781 | -#define PA_CULLCOUNT (PA_TRIVIALREJCOUNT + 1) | ||
3782 | - | ||
3783 | -#define SE_TRIANGLECOUNT 1 | ||
3784 | -#define SE_LINECOUNT (SE_TRIANGLECOUNT + 1) | ||
3785 | - | ||
3786 | -#define RA_VALIDPIXCOUNT 1 | ||
3787 | -#define RA_TOTALQUADCOUNT (RA_VALIDPIXCOUNT + 1) | ||
3788 | -#define RA_VALIDQUADCOUNTEZ (RA_TOTALQUADCOUNT + 1) | ||
3789 | -#define RA_TOTALPRIMCOUNT (RA_VALIDQUADCOUNTEZ + 1) | ||
3790 | -#define RA_PIPECACHEMISSCOUNT (RA_TOTALPRIMCOUNT + 1) | ||
3791 | -#define RA_PREFCACHEMISSCOUNT (RA_PIPECACHEMISSCOUNT + 1) | ||
3792 | -#define RA_EEZCULLCOUNT (RA_PREFCACHEMISSCOUNT + 1) | ||
3793 | - | ||
3794 | -#define TX_TOTBILINEARREQ 1 | ||
3795 | -#define TX_TOTTRILINEARREQ (TX_TOTBILINEARREQ + 1) | ||
3796 | -#define TX_TOTDISCARDTEXREQ (TX_TOTTRILINEARREQ + 1) | ||
3797 | -#define TX_TOTTEXREQ (TX_TOTDISCARDTEXREQ + 1) | ||
3798 | -#define TX_MEMREADCOUNT (TX_TOTTEXREQ + 1) | ||
3799 | -#define TX_MEMREADIN8BCOUNT (TX_MEMREADCOUNT + 1) | ||
3800 | -#define TX_CACHEMISSCOUNT (TX_MEMREADIN8BCOUNT + 1) | ||
3801 | -#define TX_CACHEHITTEXELCOUNT (TX_CACHEMISSCOUNT + 1) | ||
3802 | -#define TX_CACHEMISSTEXELCOUNT (TX_CACHEHITTEXELCOUNT + 1) | ||
3803 | - | ||
3804 | -#define PE_KILLEDBYCOLOR 1 | ||
3805 | -#define PE_KILLEDBYDEPTH (PE_KILLEDBYCOLOR + 1) | ||
3806 | -#define PE_DRAWNBYCOLOR (PE_KILLEDBYDEPTH + 1) | ||
3807 | -#define PE_DRAWNBYDEPTH (PE_DRAWNBYCOLOR + 1) | ||
3808 | - | ||
3809 | -#define MC_READREQ8BPIPE 1 | ||
3810 | -#define MC_READREQ8BIP (MC_READREQ8BPIPE + 1) | ||
3811 | -#define MC_WRITEREQ8BPIPE (MC_READREQ8BIP + 1) | ||
3812 | - | ||
3813 | -#define AXI_READREQSTALLED 1 | ||
3814 | -#define AXI_WRITEREQSTALLED (AXI_READREQSTALLED + 1) | ||
3815 | -#define AXI_WRITEDATASTALLED (AXI_WRITEREQSTALLED + 1) | ||
3816 | - | ||
3817 | -#define PVS_INSTRCOUNT 1 | ||
3818 | -#define PVS_ALUINSTRCOUNT (PVS_INSTRCOUNT + 1) | ||
3819 | -#define PVS_TEXINSTRCOUNT (PVS_ALUINSTRCOUNT + 1) | ||
3820 | -#define PVS_ATTRIBCOUNT (PVS_TEXINSTRCOUNT + 1) | ||
3821 | -#define PVS_UNIFORMCOUNT (PVS_ATTRIBCOUNT + 1) | ||
3822 | -#define PVS_FUNCTIONCOUNT (PVS_UNIFORMCOUNT + 1) | ||
3823 | - | ||
3824 | -#define PPS_INSTRCOUNT 1 | ||
3825 | -#define PPS_ALUINSTRCOUNT (PPS_INSTRCOUNT + 1) | ||
3826 | -#define PPS_TEXINSTRCOUNT (PPS_ALUINSTRCOUNT + 1) | ||
3827 | -#define PPS_ATTRIBCOUNT (PPS_TEXINSTRCOUNT + 1) | ||
3828 | -#define PPS_UNIFORMCOUNT (PPS_ATTRIBCOUNT + 1) | ||
3829 | -#define PPS_FUNCTIONCOUNT (PPS_UNIFORMCOUNT + 1) | ||
3830 | +#define HAL_VERTBUFNEWBYTEALLOC 1 | ||
3831 | +#define HAL_VERTBUFTOTALBYTEALLOC (HAL_VERTBUFNEWBYTEALLOC + 1) | ||
3832 | +#define HAL_VERTBUFNEWOBJALLOC (HAL_VERTBUFTOTALBYTEALLOC + 1) | ||
3833 | +#define HAL_VERTBUFTOTALOBJALLOC (HAL_VERTBUFNEWOBJALLOC + 1) | ||
3834 | +#define HAL_INDBUFNEWBYTEALLOC (HAL_VERTBUFTOTALOBJALLOC + 1) | ||
3835 | +#define HAL_INDBUFTOTALBYTEALLOC (HAL_INDBUFNEWBYTEALLOC + 1) | ||
3836 | +#define HAL_INDBUFNEWOBJALLOC (HAL_INDBUFTOTALBYTEALLOC + 1) | ||
3837 | +#define HAL_INDBUFTOTALOBJALLOC (HAL_INDBUFNEWOBJALLOC + 1) | ||
3838 | +#define HAL_TEXBUFNEWBYTEALLOC (HAL_INDBUFTOTALOBJALLOC + 1) | ||
3839 | +#define HAL_TEXBUFTOTALBYTEALLOC (HAL_TEXBUFNEWBYTEALLOC + 1) | ||
3840 | +#define HAL_TEXBUFNEWOBJALLOC (HAL_TEXBUFTOTALBYTEALLOC + 1) | ||
3841 | +#define HAL_TEXBUFTOTALOBJALLOC (HAL_TEXBUFNEWOBJALLOC + 1) | ||
3842 | + | ||
3843 | +#define GPU_CYCLES 1 | ||
3844 | +#define GPU_READ64BYTE (GPU_CYCLES + 1) | ||
3845 | +#define GPU_WRITE64BYTE (GPU_READ64BYTE + 1) | ||
3846 | +#define GPU_TOTALCYCLES (GPU_WRITE64BYTE + 1) | ||
3847 | +#define GPU_IDLECYCLES (GPU_TOTALCYCLES + 1) | ||
3848 | + | ||
3849 | +#define VS_INSTCOUNT 1 | ||
3850 | +#define VS_BRANCHINSTCOUNT (VS_INSTCOUNT + 1) | ||
3851 | +#define VS_TEXLDINSTCOUNT (VS_BRANCHINSTCOUNT + 1) | ||
3852 | +#define VS_RENDEREDVERTCOUNT (VS_TEXLDINSTCOUNT + 1) | ||
3853 | +#define VS_SOURCE (VS_RENDEREDVERTCOUNT + 1) | ||
3854 | + | ||
3855 | +#define PS_INSTCOUNT 1 | ||
3856 | +#define PS_BRANCHINSTCOUNT (PS_INSTCOUNT + 1) | ||
3857 | +#define PS_TEXLDINSTCOUNT (PS_BRANCHINSTCOUNT + 1) | ||
3858 | +#define PS_RENDEREDPIXCOUNT (PS_TEXLDINSTCOUNT + 1) | ||
3859 | +#define PS_SOURCE (PS_RENDEREDPIXCOUNT + 1) | ||
3860 | + | ||
3861 | +#define PA_INVERTCOUNT 1 | ||
3862 | +#define PA_INPRIMCOUNT (PA_INVERTCOUNT + 1) | ||
3863 | +#define PA_OUTPRIMCOUNT (PA_INPRIMCOUNT + 1) | ||
3864 | +#define PA_DEPTHCLIPCOUNT (PA_OUTPRIMCOUNT + 1) | ||
3865 | +#define PA_TRIVIALREJCOUNT (PA_DEPTHCLIPCOUNT + 1) | ||
3866 | +#define PA_CULLCOUNT (PA_TRIVIALREJCOUNT + 1) | ||
3867 | + | ||
3868 | +#define SE_TRIANGLECOUNT 1 | ||
3869 | +#define SE_LINECOUNT (SE_TRIANGLECOUNT + 1) | ||
3870 | + | ||
3871 | +#define RA_VALIDPIXCOUNT 1 | ||
3872 | +#define RA_TOTALQUADCOUNT (RA_VALIDPIXCOUNT + 1) | ||
3873 | +#define RA_VALIDQUADCOUNTEZ (RA_TOTALQUADCOUNT + 1) | ||
3874 | +#define RA_TOTALPRIMCOUNT (RA_VALIDQUADCOUNTEZ + 1) | ||
3875 | +#define RA_PIPECACHEMISSCOUNT (RA_TOTALPRIMCOUNT + 1) | ||
3876 | +#define RA_PREFCACHEMISSCOUNT (RA_PIPECACHEMISSCOUNT + 1) | ||
3877 | +#define RA_EEZCULLCOUNT (RA_PREFCACHEMISSCOUNT + 1) | ||
3878 | + | ||
3879 | +#define TX_TOTBILINEARREQ 1 | ||
3880 | +#define TX_TOTTRILINEARREQ (TX_TOTBILINEARREQ + 1) | ||
3881 | +#define TX_TOTDISCARDTEXREQ (TX_TOTTRILINEARREQ + 1) | ||
3882 | +#define TX_TOTTEXREQ (TX_TOTDISCARDTEXREQ + 1) | ||
3883 | +#define TX_MEMREADCOUNT (TX_TOTTEXREQ + 1) | ||
3884 | +#define TX_MEMREADIN8BCOUNT (TX_MEMREADCOUNT + 1) | ||
3885 | +#define TX_CACHEMISSCOUNT (TX_MEMREADIN8BCOUNT + 1) | ||
3886 | +#define TX_CACHEHITTEXELCOUNT (TX_CACHEMISSCOUNT + 1) | ||
3887 | +#define TX_CACHEMISSTEXELCOUNT (TX_CACHEHITTEXELCOUNT + 1) | ||
3888 | + | ||
3889 | +#define PE_KILLEDBYCOLOR 1 | ||
3890 | +#define PE_KILLEDBYDEPTH (PE_KILLEDBYCOLOR + 1) | ||
3891 | +#define PE_DRAWNBYCOLOR (PE_KILLEDBYDEPTH + 1) | ||
3892 | +#define PE_DRAWNBYDEPTH (PE_DRAWNBYCOLOR + 1) | ||
3893 | + | ||
3894 | +#define MC_READREQ8BPIPE 1 | ||
3895 | +#define MC_READREQ8BIP (MC_READREQ8BPIPE + 1) | ||
3896 | +#define MC_WRITEREQ8BPIPE (MC_READREQ8BIP + 1) | ||
3897 | + | ||
3898 | +#define AXI_READREQSTALLED 1 | ||
3899 | +#define AXI_WRITEREQSTALLED (AXI_READREQSTALLED + 1) | ||
3900 | +#define AXI_WRITEDATASTALLED (AXI_WRITEREQSTALLED + 1) | ||
3901 | + | ||
3902 | +#define PVS_INSTRCOUNT 1 | ||
3903 | +#define PVS_ALUINSTRCOUNT (PVS_INSTRCOUNT + 1) | ||
3904 | +#define PVS_TEXINSTRCOUNT (PVS_ALUINSTRCOUNT + 1) | ||
3905 | +#define PVS_ATTRIBCOUNT (PVS_TEXINSTRCOUNT + 1) | ||
3906 | +#define PVS_UNIFORMCOUNT (PVS_ATTRIBCOUNT + 1) | ||
3907 | +#define PVS_FUNCTIONCOUNT (PVS_UNIFORMCOUNT + 1) | ||
3908 | +#define PVS_SOURCE (PVS_FUNCTIONCOUNT + 1) | ||
3909 | + | ||
3910 | +#define PPS_INSTRCOUNT 1 | ||
3911 | +#define PPS_ALUINSTRCOUNT (PPS_INSTRCOUNT + 1) | ||
3912 | +#define PPS_TEXINSTRCOUNT (PPS_ALUINSTRCOUNT + 1) | ||
3913 | +#define PPS_ATTRIBCOUNT (PPS_TEXINSTRCOUNT + 1) | ||
3914 | +#define PPS_UNIFORMCOUNT (PPS_ATTRIBCOUNT + 1) | ||
3915 | +#define PPS_FUNCTIONCOUNT (PPS_UNIFORMCOUNT + 1) | ||
3916 | +#define PPS_SOURCE (PPS_FUNCTIONCOUNT + 1) | ||
3917 | /* End of MISC Counter IDs. */ | ||
3918 | |||
3919 | #ifdef gcdNEW_PROFILER_FILE | ||
3920 | @@ -578,8 +184,8 @@ extern "C" { | ||
3921 | #define VPG_ES11_TIME 0x170000 | ||
3922 | #define VPG_ES20_TIME 0x180000 | ||
3923 | #define VPG_FRAME 0x190000 | ||
3924 | -#define VPG_ES11_DRAW 0x200000 | ||
3925 | -#define VPG_ES20_DRAW 0x210000 | ||
3926 | +#define VPG_ES11_DRAW 0x200000 | ||
3927 | +#define VPG_ES20_DRAW 0x210000 | ||
3928 | #define VPG_END 0xff0000 | ||
3929 | |||
3930 | /* Info. */ | ||
3931 | @@ -592,7 +198,7 @@ extern "C" { | ||
3932 | #define VPC_INFOSCREENSIZE (VPC_INFODRIVERMODE + 1) | ||
3933 | |||
3934 | /* Counter Constants. */ | ||
3935 | -#define VPC_ELAPSETIME (VPG_TIME + 1) | ||
3936 | +#define VPC_ELAPSETIME (VPG_TIME + 1) | ||
3937 | #define VPC_CPUTIME (VPC_ELAPSETIME + 1) | ||
3938 | |||
3939 | #define VPC_MEMMAXRES (VPG_MEM + 1) | ||
3940 | @@ -600,404 +206,28 @@ extern "C" { | ||
3941 | #define VPC_MEMUNSHAREDDATA (VPC_MEMSHARED + 1) | ||
3942 | #define VPC_MEMUNSHAREDSTACK (VPC_MEMUNSHAREDDATA + 1) | ||
3943 | |||
3944 | -/* OpenGL ES11 Counters. */ | ||
3945 | -#define VPC_ES11ACTIVETEXTURE (VPG_ES11 + ES11_ACTIVETEXTURE) | ||
3946 | -#define VPC_ES11ALPHAFUNC (VPG_ES11 + ES11_ALPHAFUNC) | ||
3947 | -#define VPC_ES11ALPHAFUNCX (VPG_ES11 + ES11_ALPHAFUNCX) | ||
3948 | -#define VPC_ES11BINDBUFFER (VPG_ES11 + ES11_BINDBUFFER) | ||
3949 | -#define VPC_ES11BINDTEXTURE (VPG_ES11 + ES11_BINDTEXTURE) | ||
3950 | -#define VPC_ES11BLENDFUNC (VPG_ES11 + ES11_BLENDFUNC) | ||
3951 | -#define VPC_ES11BUFFERDATA (VPG_ES11 + ES11_BUFFERDATA) | ||
3952 | -#define VPC_ES11BUFFERSUBDATA (VPG_ES11 + ES11_BUFFERSUBDATA) | ||
3953 | -#define VPC_ES11CLEAR (VPG_ES11 + ES11_CLEAR) | ||
3954 | -#define VPC_ES11CLEARCOLOR (VPG_ES11 + ES11_CLEARCOLOR) | ||
3955 | -#define VPC_ES11CLEARCOLORX (VPG_ES11 + ES11_CLEARCOLORX) | ||
3956 | -#define VPC_ES11CLEARDEPTHF (VPG_ES11 + ES11_CLEARDEPTHF) | ||
3957 | -#define VPC_ES11CLEARDEPTHX (VPG_ES11 + ES11_CLEARDEPTHX) | ||
3958 | -#define VPC_ES11CLEARSTENCIL (VPG_ES11 + ES11_CLEARSTENCIL) | ||
3959 | -#define VPC_ES11CLIENTACTIVETEXTURE (VPG_ES11 + ES11_CLIENTACTIVETEXTURE) | ||
3960 | -#define VPC_ES11CLIPPLANEF (VPG_ES11 + ES11_CLIPPLANEF) | ||
3961 | -#define VPC_ES11CLIPPLANEX (VPG_ES11 + ES11_CLIPPLANEX) | ||
3962 | -#define VPC_ES11COLOR4F (VPG_ES11 + ES11_COLOR4F) | ||
3963 | -#define VPC_ES11COLOR4UB (VPG_ES11 + ES11_COLOR4UB) | ||
3964 | -#define VPC_ES11COLOR4X (VPG_ES11 + ES11_COLOR4X) | ||
3965 | -#define VPC_ES11COLORMASK (VPG_ES11 + ES11_COLORMASK) | ||
3966 | -#define VPC_ES11COLORPOINTER (VPG_ES11 + ES11_COLORPOINTER) | ||
3967 | -#define VPC_ES11COMPRESSEDTEXIMAGE2D (VPG_ES11 + ES11_COMPRESSEDTEXIMAGE2D) | ||
3968 | -#define VPC_ES11COMPRESSEDTEXSUBIMAGE2D (VPG_ES11 + ES11_COMPRESSEDTEXSUBIMAGE2D) | ||
3969 | -#define VPC_ES11COPYTEXIMAGE2D (VPG_ES11 + ES11_COPYTEXIMAGE2D) | ||
3970 | -#define VPC_ES11COPYTEXSUBIMAGE2D (VPG_ES11 + ES11_COPYTEXSUBIMAGE2D) | ||
3971 | -#define VPC_ES11CULLFACE (VPG_ES11 + ES11_CULLFACE) | ||
3972 | -#define VPC_ES11DELETEBUFFERS (VPG_ES11 + ES11_DELETEBUFFERS) | ||
3973 | -#define VPC_ES11DELETETEXTURES (VPG_ES11 + ES11_DELETETEXTURES) | ||
3974 | -#define VPC_ES11DEPTHFUNC (VPG_ES11 + ES11_DEPTHFUNC) | ||
3975 | -#define VPC_ES11DEPTHMASK (VPG_ES11 + ES11_DEPTHMASK) | ||
3976 | -#define VPC_ES11DEPTHRANGEF (VPG_ES11 + ES11_DEPTHRANGEF) | ||
3977 | -#define VPC_ES11DEPTHRANGEX (VPG_ES11 + ES11_DEPTHRANGEX) | ||
3978 | -#define VPC_ES11DISABLE (VPG_ES11 + ES11_DISABLE) | ||
3979 | -#define VPC_ES11DISABLECLIENTSTATE (VPG_ES11 + ES11_DISABLECLIENTSTATE) | ||
3980 | -#define VPC_ES11DRAWARRAYS (VPG_ES11 + ES11_DRAWARRAYS) | ||
3981 | -#define VPC_ES11DRAWELEMENTS (VPG_ES11 + ES11_DRAWELEMENTS) | ||
3982 | -#define VPC_ES11ENABLE (VPG_ES11 + ES11_ENABLE) | ||
3983 | -#define VPC_ES11ENABLECLIENTSTATE (VPG_ES11 + ES11_ENABLECLIENTSTATE) | ||
3984 | -#define VPC_ES11FINISH (VPG_ES11 + ES11_FINISH) | ||
3985 | -#define VPC_ES11FLUSH (VPG_ES11 + ES11_FLUSH) | ||
3986 | -#define VPC_ES11FOGF (VPG_ES11 + ES11_FOGF) | ||
3987 | -#define VPC_ES11FOGFV (VPG_ES11 + ES11_FOGFV) | ||
3988 | -#define VPC_ES11FOGX (VPG_ES11 + ES11_FOGX) | ||
3989 | -#define VPC_ES11FOGXV (VPG_ES11 + ES11_FOGXV) | ||
3990 | -#define VPC_ES11FRONTFACE (VPG_ES11 + ES11_FRONTFACE) | ||
3991 | -#define VPC_ES11FRUSTUMF (VPG_ES11 + ES11_FRUSTUMF) | ||
3992 | -#define VPC_ES11FRUSTUMX (VPG_ES11 + ES11_FRUSTUMX) | ||
3993 | -#define VPC_ES11GENBUFFERS (VPG_ES11 + ES11_GENBUFFERS) | ||
3994 | -#define VPC_ES11GENTEXTURES (VPG_ES11 + ES11_GENTEXTURES) | ||
3995 | -#define VPC_ES11GETBOOLEANV (VPG_ES11 + ES11_GETBOOLEANV) | ||
3996 | -#define VPC_ES11GETBUFFERPARAMETERIV (VPG_ES11 + ES11_GETBUFFERPARAMETERIV) | ||
3997 | -#define VPC_ES11GETCLIPPLANEF (VPG_ES11 + ES11_GETCLIPPLANEF) | ||
3998 | -#define VPC_ES11GETCLIPPLANEX (VPG_ES11 + ES11_GETCLIPPLANEX) | ||
3999 | -#define VPC_ES11GETERROR (VPG_ES11 + ES11_GETERROR) | ||
4000 | -#define VPC_ES11GETFIXEDV (VPG_ES11 + ES11_GETFIXEDV) | ||
4001 | -#define VPC_ES11GETFLOATV (VPG_ES11 + ES11_GETFLOATV) | ||
4002 | -#define VPC_ES11GETINTEGERV (VPG_ES11 + ES11_GETINTEGERV) | ||
4003 | -#define VPC_ES11GETLIGHTFV (VPG_ES11 + ES11_GETLIGHTFV) | ||
4004 | -#define VPC_ES11GETLIGHTXV (VPG_ES11 + ES11_GETLIGHTXV) | ||
4005 | -#define VPC_ES11GETMATERIALFV (VPG_ES11 + ES11_GETMATERIALFV) | ||
4006 | -#define VPC_ES11GETMATERIALXV (VPG_ES11 + ES11_GETMATERIALXV) | ||
4007 | -#define VPC_ES11GETPOINTERV (VPG_ES11 + ES11_GETPOINTERV) | ||
4008 | -#define VPC_ES11GETSTRING (VPG_ES11 + ES11_GETSTRING) | ||
4009 | -#define VPC_ES11GETTEXENVFV (VPG_ES11 + ES11_GETTEXENVFV) | ||
4010 | -#define VPC_ES11GETTEXENVIV (VPG_ES11 + ES11_GETTEXENVIV) | ||
4011 | -#define VPC_ES11GETTEXENVXV (VPG_ES11 + ES11_GETTEXENVXV) | ||
4012 | -#define VPC_ES11GETTEXPARAMETERFV (VPG_ES11 + ES11_GETTEXPARAMETERFV) | ||
4013 | -#define VPC_ES11GETTEXPARAMETERIV (VPG_ES11 + ES11_GETTEXPARAMETERIV) | ||
4014 | -#define VPC_ES11GETTEXPARAMETERXV (VPG_ES11 + ES11_GETTEXPARAMETERXV) | ||
4015 | -#define VPC_ES11HINT (VPG_ES11 + ES11_HINT) | ||
4016 | -#define VPC_ES11ISBUFFER (VPG_ES11 + ES11_ISBUFFER) | ||
4017 | -#define VPC_ES11ISENABLED (VPG_ES11 + ES11_ISENABLED) | ||
4018 | -#define VPC_ES11ISTEXTURE (VPG_ES11 + ES11_ISTEXTURE) | ||
4019 | -#define VPC_ES11LIGHTF (VPG_ES11 + ES11_LIGHTF) | ||
4020 | -#define VPC_ES11LIGHTFV (VPG_ES11 + ES11_LIGHTFV) | ||
4021 | -#define VPC_ES11LIGHTMODELF (VPG_ES11 + ES11_LIGHTMODELF) | ||
4022 | -#define VPC_ES11LIGHTMODELFV (VPG_ES11 + ES11_LIGHTMODELFV) | ||
4023 | -#define VPC_ES11LIGHTMODELX (VPG_ES11 + ES11_LIGHTMODELX) | ||
4024 | -#define VPC_ES11LIGHTMODELXV (VPG_ES11 + ES11_LIGHTMODELXV) | ||
4025 | -#define VPC_ES11LIGHTX (VPG_ES11 + ES11_LIGHTX) | ||
4026 | -#define VPC_ES11LIGHTXV (VPG_ES11 + ES11_LIGHTXV) | ||
4027 | -#define VPC_ES11LINEWIDTH (VPG_ES11 + ES11_LINEWIDTH) | ||
4028 | -#define VPC_ES11LINEWIDTHX (VPG_ES11 + ES11_LINEWIDTHX) | ||
4029 | -#define VPC_ES11LOADIDENTITY (VPG_ES11 + ES11_LOADIDENTITY) | ||
4030 | -#define VPC_ES11LOADMATRIXF (VPG_ES11 + ES11_LOADMATRIXF) | ||
4031 | -#define VPC_ES11LOADMATRIXX (VPG_ES11 + ES11_LOADMATRIXX) | ||
4032 | -#define VPC_ES11LOGICOP (VPG_ES11 + ES11_LOGICOP) | ||
4033 | -#define VPC_ES11MATERIALF (VPG_ES11 + ES11_MATERIALF) | ||
4034 | -#define VPC_ES11MATERIALFV (VPG_ES11 + ES11_MATERIALFV) | ||
4035 | -#define VPC_ES11MATERIALX (VPG_ES11 + ES11_MATERIALX) | ||
4036 | -#define VPC_ES11MATERIALXV (VPG_ES11 + ES11_MATERIALXV) | ||
4037 | -#define VPC_ES11MATRIXMODE (VPG_ES11 + ES11_MATRIXMODE) | ||
4038 | -#define VPC_ES11MULTITEXCOORD4F (VPG_ES11 + ES11_MULTITEXCOORD4F) | ||
4039 | -#define VPC_ES11MULTITEXCOORD4X (VPG_ES11 + ES11_MULTITEXCOORD4X) | ||
4040 | -#define VPC_ES11MULTMATRIXF (VPG_ES11 + ES11_MULTMATRIXF) | ||
4041 | -#define VPC_ES11MULTMATRIXX (VPG_ES11 + ES11_MULTMATRIXX) | ||
4042 | -#define VPC_ES11NORMAL3F (VPG_ES11 + ES11_NORMAL3F) | ||
4043 | -#define VPC_ES11NORMAL3X (VPG_ES11 + ES11_NORMAL3X) | ||
4044 | -#define VPC_ES11NORMALPOINTER (VPG_ES11 + ES11_NORMALPOINTER) | ||
4045 | -#define VPC_ES11ORTHOF (VPG_ES11 + ES11_ORTHOF) | ||
4046 | -#define VPC_ES11ORTHOX (VPG_ES11 + ES11_ORTHOX) | ||
4047 | -#define VPC_ES11PIXELSTOREI (VPG_ES11 + ES11_PIXELSTOREI) | ||
4048 | -#define VPC_ES11POINTPARAMETERF (VPG_ES11 + ES11_POINTPARAMETERF) | ||
4049 | -#define VPC_ES11POINTPARAMETERFV (VPG_ES11 + ES11_POINTPARAMETERFV) | ||
4050 | -#define VPC_ES11POINTPARAMETERX (VPG_ES11 + ES11_POINTPARAMETERX) | ||
4051 | -#define VPC_ES11POINTPARAMETERXV (VPG_ES11 + ES11_POINTPARAMETERXV) | ||
4052 | -#define VPC_ES11POINTSIZE (VPG_ES11 + ES11_POINTSIZE) | ||
4053 | -#define VPC_ES11POINTSIZEX (VPG_ES11 + ES11_POINTSIZEX) | ||
4054 | -#define VPC_ES11POLYGONOFFSET (VPG_ES11 + ES11_POLYGONOFFSET) | ||
4055 | -#define VPC_ES11POLYGONOFFSETX (VPG_ES11 + ES11_POLYGONOFFSETX) | ||
4056 | -#define VPC_ES11POPMATRIX (VPG_ES11 + ES11_POPMATRIX) | ||
4057 | -#define VPC_ES11PUSHMATRIX (VPG_ES11 + ES11_PUSHMATRIX) | ||
4058 | -#define VPC_ES11READPIXELS (VPG_ES11 + ES11_READPIXELS) | ||
4059 | -#define VPC_ES11ROTATEF (VPG_ES11 + ES11_ROTATEF) | ||
4060 | -#define VPC_ES11ROTATEX (VPG_ES11 + ES11_ROTATEX) | ||
4061 | -#define VPC_ES11SAMPLECOVERAGE (VPG_ES11 + ES11_SAMPLECOVERAGE) | ||
4062 | -#define VPC_ES11SAMPLECOVERAGEX (VPG_ES11 + ES11_SAMPLECOVERAGEX) | ||
4063 | -#define VPC_ES11SCALEF (VPG_ES11 + ES11_SCALEF) | ||
4064 | -#define VPC_ES11SCALEX (VPG_ES11 + ES11_SCALEX) | ||
4065 | -#define VPC_ES11SCISSOR (VPG_ES11 + ES11_SCISSOR) | ||
4066 | -#define VPC_ES11SHADEMODEL (VPG_ES11 + ES11_SHADEMODEL) | ||
4067 | -#define VPC_ES11STENCILFUNC (VPG_ES11 + ES11_STENCILFUNC) | ||
4068 | -#define VPC_ES11STENCILMASK (VPG_ES11 + ES11_STENCILMASK) | ||
4069 | -#define VPC_ES11STENCILOP (VPG_ES11 + ES11_STENCILOP) | ||
4070 | -#define VPC_ES11TEXCOORDPOINTER (VPG_ES11 + ES11_TEXCOORDPOINTER) | ||
4071 | -#define VPC_ES11TEXENVF (VPG_ES11 + ES11_TEXENVF) | ||
4072 | -#define VPC_ES11TEXENVFV (VPG_ES11 + ES11_TEXENVFV) | ||
4073 | -#define VPC_ES11TEXENVI (VPG_ES11 + ES11_TEXENVI) | ||
4074 | -#define VPC_ES11TEXENVIV (VPG_ES11 + ES11_TEXENVIV) | ||
4075 | -#define VPC_ES11TEXENVX (VPG_ES11 + ES11_TEXENVX) | ||
4076 | -#define VPC_ES11TEXENVXV (VPG_ES11 + ES11_TEXENVXV) | ||
4077 | -#define VPC_ES11TEXIMAGE2D (VPG_ES11 + ES11_TEXIMAGE2D) | ||
4078 | -#define VPC_ES11TEXPARAMETERF (VPG_ES11 + ES11_TEXPARAMETERF) | ||
4079 | -#define VPC_ES11TEXPARAMETERFV (VPG_ES11 + ES11_TEXPARAMETERFV) | ||
4080 | -#define VPC_ES11TEXPARAMETERI (VPG_ES11 + ES11_TEXPARAMETERI) | ||
4081 | -#define VPC_ES11TEXPARAMETERIV (VPG_ES11 + ES11_TEXPARAMETERIV) | ||
4082 | -#define VPC_ES11TEXPARAMETERX (VPG_ES11 + ES11_TEXPARAMETERX) | ||
4083 | -#define VPC_ES11TEXPARAMETERXV (VPG_ES11 + ES11_TEXPARAMETERXV) | ||
4084 | -#define VPC_ES11TEXSUBIMAGE2D (VPG_ES11 + ES11_TEXSUBIMAGE2D) | ||
4085 | -#define VPC_ES11TRANSLATEF (VPG_ES11 + ES11_TRANSLATEF) | ||
4086 | -#define VPC_ES11TRANSLATEX (VPG_ES11 + ES11_TRANSLATEX) | ||
4087 | -#define VPC_ES11VERTEXPOINTER (VPG_ES11 + ES11_VERTEXPOINTER) | ||
4088 | -#define VPC_ES11VIEWPORT (VPG_ES11 + ES11_VIEWPORT) | ||
4089 | /* OpenGL ES11 Statics Counter IDs. */ | ||
4090 | -#define VPC_ES11CALLS (VPG_ES11 + ES11_CALLS) | ||
4091 | -#define VPC_ES11DRAWCALLS (VPG_ES11 + ES11_DRAWCALLS) | ||
4092 | -#define VPC_ES11STATECHANGECALLS (VPG_ES11 + ES11_STATECHANGECALLS) | ||
4093 | -#define VPC_ES11POINTCOUNT (VPG_ES11 + ES11_POINTCOUNT) | ||
4094 | -#define VPC_ES11LINECOUNT (VPG_ES11 + ES11_LINECOUNT) | ||
4095 | -#define VPC_ES11TRIANGLECOUNT (VPG_ES11 + ES11_TRIANGLECOUNT) | ||
4096 | - | ||
4097 | -/* OpenGLES 2.x */ | ||
4098 | -#define VPC_ES20ACTIVETEXTURE (VPG_ES20 + ES20_ACTIVETEXTURE) | ||
4099 | -#define VPC_ES20ATTACHSHADER (VPG_ES20 + ES20_ATTACHSHADER) | ||
4100 | -#define VPC_ES20BINDATTRIBLOCATION (VPG_ES20 + ES20_BINDATTRIBLOCATION) | ||
4101 | -#define VPC_ES20BINDBUFFER (VPG_ES20 + ES20_BINDBUFFER) | ||
4102 | -#define VPC_ES20BINDFRAMEBUFFER (VPG_ES20 + ES20_BINDFRAMEBUFFER) | ||
4103 | -#define VPC_ES20BINDRENDERBUFFER (VPG_ES20 + ES20_BINDRENDERBUFFER) | ||
4104 | -#define VPC_ES20BINDTEXTURE (VPG_ES20 + ES20_BINDTEXTURE) | ||
4105 | -#define VPC_ES20BLENDCOLOR (VPG_ES20 + ES20_BLENDCOLOR) | ||
4106 | -#define VPC_ES20BLENDEQUATION (VPG_ES20 + ES20_BLENDEQUATION) | ||
4107 | -#define VPC_ES20BLENDEQUATIONSEPARATE (VPG_ES20 + ES20_BLENDEQUATIONSEPARATE) | ||
4108 | -#define VPC_ES20BLENDFUNC (VPG_ES20 + ES20_BLENDFUNC) | ||
4109 | -#define VPC_ES20BLENDFUNCSEPARATE (VPG_ES20 + ES20_BLENDFUNCSEPARATE) | ||
4110 | -#define VPC_ES20BUFFERDATA (VPG_ES20 + ES20_BUFFERDATA) | ||
4111 | -#define VPC_ES20BUFFERSUBDATA (VPG_ES20 + ES20_BUFFERSUBDATA) | ||
4112 | -#define VPC_ES20CHECKFRAMEBUFFERSTATUS (VPG_ES20 + ES20_CHECKFRAMEBUFFERSTATUS) | ||
4113 | -#define VPC_ES20CLEAR (VPG_ES20 + ES20_CLEAR) | ||
4114 | -#define VPC_ES20CLEARCOLOR (VPG_ES20 + ES20_CLEARCOLOR) | ||
4115 | -#define VPC_ES20CLEARDEPTHF (VPG_ES20 + ES20_CLEARDEPTHF) | ||
4116 | -#define VPC_ES20CLEARSTENCIL (VPG_ES20 + ES20_CLEARSTENCIL) | ||
4117 | -#define VPC_ES20COLORMASK (VPG_ES20 + ES20_COLORMASK) | ||
4118 | -#define VPC_ES20COMPILESHADER (VPG_ES20 + ES20_COMPILESHADER) | ||
4119 | -#define VPC_ES20COMPRESSEDTEXIMAGE2D (VPG_ES20 + ES20_COMPRESSEDTEXIMAGE2D) | ||
4120 | -#define VPC_ES20COMPRESSEDTEXSUBIMAGE2D (VPG_ES20 + ES20_COMPRESSEDTEXSUBIMAGE2D) | ||
4121 | -#define VPC_ES20COPYTEXIMAGE2D (VPG_ES20 + ES20_COPYTEXIMAGE2D) | ||
4122 | -#define VPC_ES20COPYTEXSUBIMAGE2D (VPG_ES20 + ES20_COPYTEXSUBIMAGE2D) | ||
4123 | -#define VPC_ES20CREATEPROGRAM (VPG_ES20 + ES20_CREATEPROGRAM) | ||
4124 | -#define VPC_ES20CREATESHADER (VPG_ES20 + ES20_CREATESHADER) | ||
4125 | -#define VPC_ES20CULLFACE (VPG_ES20 + ES20_CULLFACE) | ||
4126 | -#define VPC_ES20DELETEBUFFERS (VPG_ES20 + ES20_DELETEBUFFERS) | ||
4127 | -#define VPC_ES20DELETEFRAMEBUFFERS (VPG_ES20 + ES20_DELETEFRAMEBUFFERS) | ||
4128 | -#define VPC_ES20DELETEPROGRAM (VPG_ES20 + ES20_DELETEPROGRAM) | ||
4129 | -#define VPC_ES20DELETERENDERBUFFERS (VPG_ES20 + ES20_DELETERENDERBUFFERS) | ||
4130 | -#define VPC_ES20DELETESHADER (VPG_ES20 + ES20_DELETESHADER) | ||
4131 | -#define VPC_ES20DELETETEXTURES (VPG_ES20 + ES20_DELETETEXTURES) | ||
4132 | -#define VPC_ES20DEPTHFUNC (VPG_ES20 + ES20_DEPTHFUNC) | ||
4133 | -#define VPC_ES20DEPTHMASK (VPG_ES20 + ES20_DEPTHMASK) | ||
4134 | -#define VPC_ES20DEPTHRANGEF (VPG_ES20 + ES20_DEPTHRANGEF) | ||
4135 | -#define VPC_ES20DETACHSHADER (VPG_ES20 + ES20_DETACHSHADER) | ||
4136 | -#define VPC_ES20DISABLE (VPG_ES20 + ES20_DISABLE) | ||
4137 | -#define VPC_ES20DISABLEVERTEXATTRIBARRAY (VPG_ES20 + ES20_DISABLEVERTEXATTRIBARRAY) | ||
4138 | -#define VPC_ES20DRAWARRAYS (VPG_ES20 + ES20_DRAWARRAYS) | ||
4139 | -#define VPC_ES20DRAWELEMENTS (VPG_ES20 + ES20_DRAWELEMENTS) | ||
4140 | -#define VPC_ES20ENABLE (VPG_ES20 + ES20_ENABLE) | ||
4141 | -#define VPC_ES20ENABLEVERTEXATTRIBARRAY (VPG_ES20 + ES20_ENABLEVERTEXATTRIBARRAY) | ||
4142 | -#define VPC_ES20FINISH (VPG_ES20 + ES20_FINISH) | ||
4143 | -#define VPC_ES20FLUSH (VPG_ES20 + ES20_FLUSH) | ||
4144 | -#define VPC_ES20FRAMEBUFFERRENDERBUFFER (VPG_ES20 + ES20_FRAMEBUFFERRENDERBUFFER) | ||
4145 | -#define VPC_ES20FRAMEBUFFERTEXTURE2D (VPG_ES20 + ES20_FRAMEBUFFERTEXTURE2D) | ||
4146 | -#define VPC_ES20FRONTFACE (VPG_ES20 + ES20_FRONTFACE) | ||
4147 | -#define VPC_ES20GENBUFFERS (VPG_ES20 + ES20_GENBUFFERS) | ||
4148 | -#define VPC_ES20GENERATEMIPMAP (VPG_ES20 + ES20_GENERATEMIPMAP) | ||
4149 | -#define VPC_ES20GENFRAMEBUFFERS (VPG_ES20 + ES20_GENFRAMEBUFFERS) | ||
4150 | -#define VPC_ES20GENRENDERBUFFERS (VPG_ES20 + ES20_GENRENDERBUFFERS) | ||
4151 | -#define VPC_ES20GENTEXTURES (VPG_ES20 + ES20_GENTEXTURES) | ||
4152 | -#define VPC_ES20GETACTIVEATTRIB (VPG_ES20 + ES20_GETACTIVEATTRIB) | ||
4153 | -#define VPC_ES20GETACTIVEUNIFORM (VPG_ES20 + ES20_GETACTIVEUNIFORM) | ||
4154 | -#define VPC_ES20GETATTACHEDSHADERS (VPG_ES20 + ES20_GETATTACHEDSHADERS) | ||
4155 | -#define VPC_ES20GETATTRIBLOCATION (VPG_ES20 + ES20_GETATTRIBLOCATION) | ||
4156 | -#define VPC_ES20GETBOOLEANV (VPG_ES20 + ES20_GETBOOLEANV) | ||
4157 | -#define VPC_ES20GETBUFFERPARAMETERIV (VPG_ES20 + ES20_GETBUFFERPARAMETERIV) | ||
4158 | -#define VPC_ES20GETERROR (VPG_ES20 + ES20_GETERROR) | ||
4159 | -#define VPC_ES20GETFLOATV (VPG_ES20 + ES20_GETFLOATV) | ||
4160 | -#define VPC_ES20GETFRAMEBUFFERATTACHMENTPARAMETERIV (VPG_ES20 + ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV) | ||
4161 | -#define VPC_ES20GETINTEGERV (VPG_ES20 + ES20_GETINTEGERV) | ||
4162 | -#define VPC_ES20GETPROGRAMIV (VPG_ES20 + ES20_GETPROGRAMIV) | ||
4163 | -#define VPC_ES20GETPROGRAMINFOLOG (VPG_ES20 + ES20_GETPROGRAMINFOLOG) | ||
4164 | -#define VPC_ES20GETRENDERBUFFERPARAMETERIV (VPG_ES20 + ES20_GETRENDERBUFFERPARAMETERIV) | ||
4165 | -#define VPC_ES20GETSHADERIV (VPG_ES20 + ES20_GETSHADERIV) | ||
4166 | -#define VPC_ES20GETSHADERINFOLOG (VPG_ES20 + ES20_GETSHADERINFOLOG) | ||
4167 | -#define VPC_ES20GETSHADERPRECISIONFORMAT (VPG_ES20 + ES20_GETSHADERPRECISIONFORMAT) | ||
4168 | -#define VPC_ES20GETSHADERSOURCE (VPG_ES20 + ES20_GETSHADERSOURCE) | ||
4169 | -#define VPC_ES20GETSTRING (VPG_ES20 + ES20_GETSTRING) | ||
4170 | -#define VPC_ES20GETTEXPARAMETERFV (VPG_ES20 + ES20_GETTEXPARAMETERFV) | ||
4171 | -#define VPC_ES20GETTEXPARAMETERIV (VPG_ES20 + ES20_GETTEXPARAMETERIV) | ||
4172 | -#define VPC_ES20GETUNIFORMFV (VPG_ES20 + ES20_GETUNIFORMFV) | ||
4173 | -#define VPC_ES20GETUNIFORMIV (VPG_ES20 + ES20_GETUNIFORMIV) | ||
4174 | -#define VPC_ES20GETUNIFORMLOCATION (VPG_ES20 + ES20_GETUNIFORMLOCATION) | ||
4175 | -#define VPC_ES20GETVERTEXATTRIBFV (VPG_ES20 + ES20_GETVERTEXATTRIBFV) | ||
4176 | -#define VPC_ES20GETVERTEXATTRIBIV (VPG_ES20 + ES20_GETVERTEXATTRIBIV) | ||
4177 | -#define VPC_ES20GETVERTEXATTRIBPOINTERV (VPG_ES20 + ES20_GETVERTEXATTRIBPOINTERV) | ||
4178 | -#define VPC_ES20HINT (VPG_ES20 + ES20_HINT) | ||
4179 | -#define VPC_ES20ISBUFFER (VPG_ES20 + ES20_ISBUFFER) | ||
4180 | -#define VPC_ES20ISENABLED (VPG_ES20 + ES20_ISENABLED) | ||
4181 | -#define VPC_ES20ISFRAMEBUFFER (VPG_ES20 + ES20_ISFRAMEBUFFER) | ||
4182 | -#define VPC_ES20ISPROGRAM (VPG_ES20 + ES20_ISPROGRAM) | ||
4183 | -#define VPC_ES20ISRENDERBUFFER (VPG_ES20 + ES20_ISRENDERBUFFER) | ||
4184 | -#define VPC_ES20ISSHADER (VPG_ES20 + ES20_ISSHADER) | ||
4185 | -#define VPC_ES20ISTEXTURE (VPG_ES20 + ES20_ISTEXTURE) | ||
4186 | -#define VPC_ES20LINEWIDTH (VPG_ES20 + ES20_LINEWIDTH) | ||
4187 | -#define VPC_ES20LINKPROGRAM (VPG_ES20 + ES20_LINKPROGRAM) | ||
4188 | -#define VPC_ES20PIXELSTOREI (VPG_ES20 + ES20_PIXELSTOREI) | ||
4189 | -#define VPC_ES20POLYGONOFFSET (VPG_ES20 + ES20_POLYGONOFFSET) | ||
4190 | -#define VPC_ES20READPIXELS (VPG_ES20 + ES20_READPIXELS) | ||
4191 | -#define VPC_ES20RELEASESHADERCOMPILER (VPG_ES20 + ES20_RELEASESHADERCOMPILER) | ||
4192 | -#define VPC_ES20RENDERBUFFERSTORAGE (VPG_ES20 + ES20_RENDERBUFFERSTORAGE) | ||
4193 | -#define VPC_ES20SAMPLECOVERAGE (VPG_ES20 + ES20_SAMPLECOVERAGE) | ||
4194 | -#define VPC_ES20SCISSOR (VPG_ES20 + ES20_SCISSOR) | ||
4195 | -#define VPC_ES20SHADERBINARY (VPG_ES20 + ES20_SHADERBINARY) | ||
4196 | -#define VPC_ES20SHADERSOURCE (VPG_ES20 + ES20_SHADERSOURCE) | ||
4197 | -#define VPC_ES20STENCILFUNC (VPG_ES20 + ES20_STENCILFUNC) | ||
4198 | -#define VPC_ES20STENCILFUNCSEPARATE (VPG_ES20 + ES20_STENCILFUNCSEPARATE) | ||
4199 | -#define VPC_ES20STENCILMASK (VPG_ES20 + ES20_STENCILMASK) | ||
4200 | -#define VPC_ES20STENCILMASKSEPARATE (VPG_ES20 + ES20_STENCILMASKSEPARATE) | ||
4201 | -#define VPC_ES20STENCILOP (VPG_ES20 + ES20_STENCILOP) | ||
4202 | -#define VPC_ES20STENCILOPSEPARATE (VPG_ES20 + ES20_STENCILOPSEPARATE) | ||
4203 | -#define VPC_ES20TEXIMAGE2D (VPG_ES20 + ES20_TEXIMAGE2D) | ||
4204 | -#define VPC_ES20TEXPARAMETERF (VPG_ES20 + ES20_TEXPARAMETERF) | ||
4205 | -#define VPC_ES20TEXPARAMETERFV (VPG_ES20 + ES20_TEXPARAMETERFV) | ||
4206 | -#define VPC_ES20TEXPARAMETERI (VPG_ES20 + ES20_TEXPARAMETERI) | ||
4207 | -#define VPC_ES20TEXPARAMETERIV (VPG_ES20 + ES20_TEXPARAMETERIV) | ||
4208 | -#define VPC_ES20TEXSUBIMAGE2D (VPG_ES20 + ES20_TEXSUBIMAGE2D) | ||
4209 | -#define VPC_ES20UNIFORM1F (VPG_ES20 + ES20_UNIFORM1F) | ||
4210 | -#define VPC_ES20UNIFORM1FV (VPG_ES20 + ES20_UNIFORM1FV) | ||
4211 | -#define VPC_ES20UNIFORM1I (VPG_ES20 + ES20_UNIFORM1I) | ||
4212 | -#define VPC_ES20UNIFORM1IV (VPG_ES20 + ES20_UNIFORM1IV) | ||
4213 | -#define VPC_ES20UNIFORM2F (VPG_ES20 + ES20_UNIFORM2F) | ||
4214 | -#define VPC_ES20UNIFORM2FV (VPG_ES20 + ES20_UNIFORM2FV) | ||
4215 | -#define VPC_ES20UNIFORM2I (VPG_ES20 + ES20_UNIFORM2I) | ||
4216 | -#define VPC_ES20UNIFORM2IV (VPG_ES20 + ES20_UNIFORM2IV) | ||
4217 | -#define VPC_ES20UNIFORM3F (VPG_ES20 + ES20_UNIFORM3F) | ||
4218 | -#define VPC_ES20UNIFORM3FV (VPG_ES20 + ES20_UNIFORM3FV) | ||
4219 | -#define VPC_ES20UNIFORM3I (VPG_ES20 + ES20_UNIFORM3I) | ||
4220 | -#define VPC_ES20UNIFORM3IV (VPG_ES20 + ES20_UNIFORM3IV) | ||
4221 | -#define VPC_ES20UNIFORM4F (VPG_ES20 + ES20_UNIFORM4F) | ||
4222 | -#define VPC_ES20UNIFORM4FV (VPG_ES20 + ES20_UNIFORM4FV) | ||
4223 | -#define VPC_ES20UNIFORM4I (VPG_ES20 + ES20_UNIFORM4I) | ||
4224 | -#define VPC_ES20UNIFORM4IV (VPG_ES20 + ES20_UNIFORM4IV) | ||
4225 | -#define VPC_ES20UNIFORMMATRIX2FV (VPG_ES20 + ES20_UNIFORMMATRIX2FV) | ||
4226 | -#define VPC_ES20UNIFORMMATRIX3FV (VPG_ES20 + ES20_UNIFORMMATRIX3FV) | ||
4227 | -#define VPC_ES20UNIFORMMATRIX4FV (VPG_ES20 + ES20_UNIFORMMATRIX4FV) | ||
4228 | -#define VPC_ES20USEPROGRAM (VPG_ES20 + ES20_USEPROGRAM) | ||
4229 | -#define VPC_ES20VALIDATEPROGRAM (VPG_ES20 + ES20_VALIDATEPROGRAM) | ||
4230 | -#define VPC_ES20VERTEXATTRIB1F (VPG_ES20 + ES20_VERTEXATTRIB1F) | ||
4231 | -#define VPC_ES20VERTEXATTRIB1FV (VPG_ES20 + ES20_VERTEXATTRIB1FV) | ||
4232 | -#define VPC_ES20VERTEXATTRIB2F (VPG_ES20 + ES20_VERTEXATTRIB2F) | ||
4233 | -#define VPC_ES20VERTEXATTRIB2FV (VPG_ES20 + ES20_VERTEXATTRIB2FV) | ||
4234 | -#define VPC_ES20VERTEXATTRIB3F (VPG_ES20 + ES20_VERTEXATTRIB3F) | ||
4235 | -#define VPC_ES20VERTEXATTRIB3FV (VPG_ES20 + ES20_VERTEXATTRIB3FV) | ||
4236 | -#define VPC_ES20VERTEXATTRIB4F (VPG_ES20 + ES20_VERTEXATTRIB4F) | ||
4237 | -#define VPC_ES20VERTEXATTRIB4FV (VPG_ES20 + ES20_VERTEXATTRIB4FV) | ||
4238 | -#define VPC_ES20VERTEXATTRIBPOINTER (VPG_ES20 + ES20_VERTEXATTRIBPOINTER) | ||
4239 | -#define VPC_ES20VIEWPORT (VPG_ES20 + ES20_VIEWPORT) | ||
4240 | +#define VPC_ES11CALLS (VPG_ES11 + ES11_CALLS) | ||
4241 | +#define VPC_ES11DRAWCALLS (VPG_ES11 + ES11_DRAWCALLS) | ||
4242 | +#define VPC_ES11STATECHANGECALLS (VPG_ES11 + ES11_STATECHANGECALLS) | ||
4243 | +#define VPC_ES11POINTCOUNT (VPG_ES11 + ES11_POINTCOUNT) | ||
4244 | +#define VPC_ES11LINECOUNT (VPG_ES11 + ES11_LINECOUNT) | ||
4245 | +#define VPC_ES11TRIANGLECOUNT (VPG_ES11 + ES11_TRIANGLECOUNT) | ||
4246 | + | ||
4247 | /* OpenGL ES20 Statistics Counter IDs. */ | ||
4248 | -#define VPC_ES20CALLS (VPG_ES20 + ES20_CALLS) | ||
4249 | -#define VPC_ES20DRAWCALLS (VPG_ES20 + ES20_DRAWCALLS) | ||
4250 | -#define VPC_ES20STATECHANGECALLS (VPG_ES20 + ES20_STATECHANGECALLS) | ||
4251 | -#define VPC_ES20POINTCOUNT (VPG_ES20 + ES20_POINTCOUNT) | ||
4252 | -#define VPC_ES20LINECOUNT (VPG_ES20 + ES20_LINECOUNT) | ||
4253 | -#define VPC_ES20TRIANGLECOUNT (VPG_ES20 + ES20_TRIANGLECOUNT) | ||
4254 | - | ||
4255 | -/* VG11 Counters. */ | ||
4256 | -#define VPC_VG11APPENDPATH (VPG_VG11 + VG11_APPENDPATH) | ||
4257 | -#define VPC_VG11APPENDPATHDATA (VPG_VG11 + VG11_APPENDPATHDATA) | ||
4258 | -#define VPC_VG11CHILDIMAGE (VPG_VG11 + VG11_CHILDIMAGE) | ||
4259 | -#define VPC_VG11CLEAR (VPG_VG11 + VG11_CLEAR) | ||
4260 | -#define VPC_VG11CLEARGLYPH (VPG_VG11 + VG11_CLEARGLYPH) | ||
4261 | -#define VPC_VG11CLEARIMAGE (VPG_VG11 + VG11_CLEARIMAGE) | ||
4262 | -#define VPC_VG11CLEARPATH (VPG_VG11 + VG11_CLEARPATH) | ||
4263 | -#define VPC_VG11COLORMATRIX (VPG_VG11 + VG11_COLORMATRIX) | ||
4264 | -#define VPC_VG11CONVOLVE (VPG_VG11 + VG11_CONVOLVE) | ||
4265 | -#define VPC_VG11COPYIMAGE (VPG_VG11 + VG11_COPYIMAGE) | ||
4266 | -#define VPC_VG11COPYMASK (VPG_VG11 + VG11_COPYMASK) | ||
4267 | -#define VPC_VG11COPYPIXELS (VPG_VG11 + VG11_COPYPIXELS) | ||
4268 | -#define VPC_VG11CREATEFONT (VPG_VG11 + VG11_CREATEFONT) | ||
4269 | -#define VPC_VG11CREATEIMAGE (VPG_VG11 + VG11_CREATEIMAGE) | ||
4270 | -#define VPC_VG11CREATEMASKLAYER (VPG_VG11 + VG11_CREATEMASKLAYER) | ||
4271 | -#define VPC_VG11CREATEPAINT (VPG_VG11 + VG11_CREATEPAINT) | ||
4272 | -#define VPC_VG11CREATEPATH (VPG_VG11 + VG11_CREATEPATH) | ||
4273 | -#define VPC_VG11DESTROYFONT (VPG_VG11 + VG11_DESTROYFONT) | ||
4274 | -#define VPC_VG11DESTROYIMAGE (VPG_VG11 + VG11_DESTROYIMAGE) | ||
4275 | -#define VPC_VG11DESTROYMASKLAYER (VPG_VG11 + VG11_DESTROYMASKLAYER) | ||
4276 | -#define VPC_VG11DESTROYPAINT (VPG_VG11 + VG11_DESTROYPAINT) | ||
4277 | -#define VPC_VG11DESTROYPATH (VPG_VG11 + VG11_DESTROYPATH) | ||
4278 | -#define VPC_VG11DRAWGLYPH (VPG_VG11 + VG11_DRAWGLYPH) | ||
4279 | -#define VPC_VG11DRAWGLYPHS (VPG_VG11 + VG11_DRAWGLYPHS) | ||
4280 | -#define VPC_VG11DRAWIMAGE (VPG_VG11 + VG11_DRAWIMAGE) | ||
4281 | -#define VPC_VG11DRAWPATH (VPG_VG11 + VG11_DRAWPATH) | ||
4282 | -#define VPC_VG11FILLMASKLAYER (VPG_VG11 + VG11_FILLMASKLAYER) | ||
4283 | -#define VPC_VG11FINISH (VPG_VG11 + VG11_FINISH) | ||
4284 | -#define VPC_VG11FLUSH (VPG_VG11 + VG11_FLUSH) | ||
4285 | -#define VPC_VG11GAUSSIANBLUR (VPG_VG11 + VG11_GAUSSIANBLUR) | ||
4286 | -#define VPC_VG11GETCOLOR (VPG_VG11 + VG11_GETCOLOR) | ||
4287 | -#define VPC_VG11GETERROR (VPG_VG11 + VG11_GETERROR) | ||
4288 | -#define VPC_VG11GETF (VPG_VG11 + VG11_GETF) | ||
4289 | -#define VPC_VG11GETFV (VPG_VG11 + VG11_GETFV) | ||
4290 | -#define VPC_VG11GETI (VPG_VG11 + VG11_GETI) | ||
4291 | -#define VPC_VG11GETIMAGESUBDATA (VPG_VG11 + VG11_GETIMAGESUBDATA) | ||
4292 | -#define VPC_VG11GETIV (VPG_VG11 + VG11_GETIV) | ||
4293 | -#define VPC_VG11GETMATRIX (VPG_VG11 + VG11_GETMATRIX) | ||
4294 | -#define VPC_VG11GETPAINT (VPG_VG11 + VG11_GETPAINT) | ||
4295 | -#define VPC_VG11GETPARAMETERF (VPG_VG11 + VG11_GETPARAMETERF) | ||
4296 | -#define VPC_VG11GETPARAMETERFV (VPG_VG11 + VG11_GETPARAMETERFV) | ||
4297 | -#define VPC_VG11GETPARAMETERI (VPG_VG11 + VG11_GETPARAMETERI) | ||
4298 | -#define VPC_VG11GETPARAMETERIV (VPG_VG11 + VG11_GETPARAMETERIV) | ||
4299 | -#define VPC_VG11GETPARAMETERVECTORSIZE (VPG_VG11 + VG11_GETPARAMETERVECTORSIZE) | ||
4300 | -#define VPC_VG11GETPARENT (VPG_VG11 + VG11_GETPARENT) | ||
4301 | -#define VPC_VG11GETPATHCAPABILITIES (VPG_VG11 + VG11_GETPATHCAPABILITIES) | ||
4302 | -#define VPC_VG11GETPIXELS (VPG_VG11 + VG11_GETPIXELS) | ||
4303 | -#define VPC_VG11GETSTRING (VPG_VG11 + VG11_GETSTRING) | ||
4304 | -#define VPC_VG11GETVECTORSIZE (VPG_VG11 + VG11_GETVECTORSIZE) | ||
4305 | -#define VPC_VG11HARDWAREQUERY (VPG_VG11 + VG11_HARDWAREQUERY) | ||
4306 | -#define VPC_VG11IMAGESUBDATA (VPG_VG11 + VG11_IMAGESUBDATA) | ||
4307 | -#define VPC_VG11INTERPOLATEPATH (VPG_VG11 + VG11_INTERPOLATEPATH) | ||
4308 | -#define VPC_VG11LOADIDENTITY (VPG_VG11 + VG11_LOADIDENTITY) | ||
4309 | -#define VPC_VG11LOADMATRIX (VPG_VG11 + VG11_LOADMATRIX) | ||
4310 | -#define VPC_VG11LOOKUP (VPG_VG11 + VG11_LOOKUP) | ||
4311 | -#define VPC_VG11LOOKUPSINGLE (VPG_VG11 + VG11_LOOKUPSINGLE) | ||
4312 | -#define VPC_VG11MASK (VPG_VG11 + VG11_MASK) | ||
4313 | -#define VPC_VG11MODIFYPATHCOORDS (VPG_VG11 + VG11_MODIFYPATHCOORDS) | ||
4314 | -#define VPC_VG11MULTMATRIX (VPG_VG11 + VG11_MULTMATRIX) | ||
4315 | -#define VPC_VG11PAINTPATTERN (VPG_VG11 + VG11_PAINTPATTERN) | ||
4316 | -#define VPC_VG11PATHBOUNDS (VPG_VG11 + VG11_PATHBOUNDS) | ||
4317 | -#define VPC_VG11PATHLENGTH (VPG_VG11 + VG11_PATHLENGTH) | ||
4318 | -#define VPC_VG11PATHTRANSFORMEDBOUNDS (VPG_VG11 + VG11_PATHTRANSFORMEDBOUNDS) | ||
4319 | -#define VPC_VG11POINTALONGPATH (VPG_VG11 + VG11_POINTALONGPATH) | ||
4320 | -#define VPC_VG11READPIXELS (VPG_VG11 + VG11_READPIXELS) | ||
4321 | -#define VPC_VG11REMOVEPATHCAPABILITIES (VPG_VG11 + VG11_REMOVEPATHCAPABILITIES) | ||
4322 | -#define VPC_VG11RENDERTOMASK (VPG_VG11 + VG11_RENDERTOMASK) | ||
4323 | -#define VPC_VG11ROTATE (VPG_VG11 + VG11_ROTATE) | ||
4324 | -#define VPC_VG11SCALE (VPG_VG11 + VG11_SCALE) | ||
4325 | -#define VPC_VG11SEPARABLECONVOLVE (VPG_VG11 + VG11_SEPARABLECONVOLVE) | ||
4326 | -#define VPC_VG11SETCOLOR (VPG_VG11 + VG11_SETCOLOR) | ||
4327 | -#define VPC_VG11SETF (VPG_VG11 + VG11_SETF) | ||
4328 | -#define VPC_VG11SETFV (VPG_VG11 + VG11_SETFV) | ||
4329 | -#define VPC_VG11SETGLYPHTOIMAGE (VPG_VG11 + VG11_SETGLYPHTOIMAGE) | ||
4330 | -#define VPC_VG11SETGLYPHTOPATH (VPG_VG11 + VG11_SETGLYPHTOPATH) | ||
4331 | -#define VPC_VG11SETI (VPG_VG11 + VG11_SETI) | ||
4332 | -#define VPC_VG11SETIV (VPG_VG11 + VG11_SETIV) | ||
4333 | -#define VPC_VG11SETPAINT (VPG_VG11 + VG11_SETPAINT) | ||
4334 | -#define VPC_VG11SETPARAMETERF (VPG_VG11 + VG11_SETPARAMETERF) | ||
4335 | -#define VPC_VG11SETPARAMETERFV (VPG_VG11 + VG11_SETPARAMETERFV) | ||
4336 | -#define VPC_VG11SETPARAMETERI (VPG_VG11 + VG11_SETPARAMETERI) | ||
4337 | -#define VPC_VG11SETPARAMETERIV (VPG_VG11 + VG11_SETPARAMETERIV) | ||
4338 | -#define VPC_VG11SETPIXELS (VPG_VG11 + VG11_SETPIXELS) | ||
4339 | -#define VPC_VG11SHEAR (VPG_VG11 + VG11_SHEAR) | ||
4340 | -#define VPC_VG11TRANSFORMPATH (VPG_VG11 + VG11_TRANSFORMPATH) | ||
4341 | -#define VPC_VG11TRANSLATE (VPG_VG11 + VG11_TRANSLATE) | ||
4342 | -#define VPC_VG11WRITEPIXELS (VPG_VG11 + VG11_WRITEPIXELS) | ||
4343 | +#define VPC_ES20CALLS (VPG_ES20 + ES20_CALLS) | ||
4344 | +#define VPC_ES20DRAWCALLS (VPG_ES20 + ES20_DRAWCALLS) | ||
4345 | +#define VPC_ES20STATECHANGECALLS (VPG_ES20 + ES20_STATECHANGECALLS) | ||
4346 | +#define VPC_ES20POINTCOUNT (VPG_ES20 + ES20_POINTCOUNT) | ||
4347 | +#define VPC_ES20LINECOUNT (VPG_ES20 + ES20_LINECOUNT) | ||
4348 | +#define VPC_ES20TRIANGLECOUNT (VPG_ES20 + ES20_TRIANGLECOUNT) | ||
4349 | + | ||
4350 | /* OpenVG Statistics Counter IDs. */ | ||
4351 | -#define VPC_VG11CALLS (VPG_VG11 + VG11_CALLS) | ||
4352 | -#define VPC_VG11DRAWCALLS (VPG_VG11 + VG11_DRAWCALLS) | ||
4353 | -#define VPC_VG11STATECHANGECALLS (VPG_VG11 + VG11_STATECHANGECALLS) | ||
4354 | -#define VPC_VG11FILLCOUNT (VPG_VG11 + VG11_FILLCOUNT) | ||
4355 | -#define VPC_VG11STROKECOUNT (VPG_VG11 + VG11_STROKECOUNT) | ||
4356 | +#define VPC_VG11CALLS (VPG_VG11 + VG11_CALLS) | ||
4357 | +#define VPC_VG11DRAWCALLS (VPG_VG11 + VG11_DRAWCALLS) | ||
4358 | +#define VPC_VG11STATECHANGECALLS (VPG_VG11 + VG11_STATECHANGECALLS) | ||
4359 | +#define VPC_VG11FILLCOUNT (VPG_VG11 + VG11_FILLCOUNT) | ||
4360 | +#define VPC_VG11STROKECOUNT (VPG_VG11 + VG11_STROKECOUNT) | ||
4361 | |||
4362 | /* HAL Counters. */ | ||
4363 | #define VPC_HALVERTBUFNEWBYTEALLOC (VPG_HAL + HAL_VERTBUFNEWBYTEALLOC) | ||
4364 | @@ -1018,7 +248,7 @@ extern "C" { | ||
4365 | #define VPC_GPUREAD64BYTE (VPG_GPU + GPU_READ64BYTE) | ||
4366 | #define VPC_GPUWRITE64BYTE (VPG_GPU + GPU_WRITE64BYTE) | ||
4367 | #define VPC_GPUTOTALCYCLES (VPG_GPU + GPU_TOTALCYCLES) | ||
4368 | -#define VPC_GPUIDLECYCLES (VPG_GPU + GPU_IDLECYCLES) | ||
4369 | +#define VPC_GPUIDLECYCLES (VPG_GPU + GPU_IDLECYCLES) | ||
4370 | |||
4371 | /* HW: Shader Counters. */ | ||
4372 | #define VPC_VSINSTCOUNT (VPG_VS + VS_INSTCOUNT) | ||
4373 | @@ -1026,9 +256,9 @@ extern "C" { | ||
4374 | #define VPC_VSTEXLDINSTCOUNT (VPG_VS + VS_TEXLDINSTCOUNT) | ||
4375 | #define VPC_VSRENDEREDVERTCOUNT (VPG_VS + VS_RENDEREDVERTCOUNT) | ||
4376 | /* HW: PS Count. */ | ||
4377 | -#define VPC_PSINSTCOUNT (VPG_PS + PS_INSTCOUNT) | ||
4378 | -#define VPC_PSBRANCHINSTCOUNT (VPG_PS + PS_BRANCHINSTCOUNT) | ||
4379 | -#define VPC_PSTEXLDINSTCOUNT (VPG_PS + PS_TEXLDINSTCOUNT) | ||
4380 | +#define VPC_PSINSTCOUNT (VPG_PS + PS_INSTCOUNT) | ||
4381 | +#define VPC_PSBRANCHINSTCOUNT (VPG_PS + PS_BRANCHINSTCOUNT) | ||
4382 | +#define VPC_PSTEXLDINSTCOUNT (VPG_PS + PS_TEXLDINSTCOUNT) | ||
4383 | #define VPC_PSRENDEREDPIXCOUNT (VPG_PS + PS_RENDEREDPIXCOUNT) | ||
4384 | |||
4385 | |||
4386 | @@ -1071,7 +301,7 @@ extern "C" { | ||
4387 | #define VPC_PEDRAWNBYDEPTH (VPG_PE + PE_DRAWNBYDEPTH) | ||
4388 | |||
4389 | /* HW: MC Counters. */ | ||
4390 | -#define VPC_MCREADREQ8BPIPE (VPG_MC + MC_READREQ8BPIPE) | ||
4391 | +#define VPC_MCREADREQ8BPIPE (VPG_MC + MC_READREQ8BPIPE) | ||
4392 | #define VPC_MCREADREQ8BIP (VPG_MC + MC_READREQ8BIP) | ||
4393 | #define VPC_MCWRITEREQ8BPIPE (VPG_MC + MC_WRITEREQ8BPIPE) | ||
4394 | |||
4395 | @@ -1087,6 +317,7 @@ extern "C" { | ||
4396 | #define VPC_PVSATTRIBCOUNT (VPG_PVS + PVS_ATTRIBCOUNT) | ||
4397 | #define VPC_PVSUNIFORMCOUNT (VPG_PVS + PVS_UNIFORMCOUNT) | ||
4398 | #define VPC_PVSFUNCTIONCOUNT (VPG_PVS + PVS_FUNCTIONCOUNT) | ||
4399 | +#define VPC_PVSSOURCE (VPG_PVS + PVS_SOURCE) | ||
4400 | |||
4401 | #define VPC_PPSINSTRCOUNT (VPG_PPS + PPS_INSTRCOUNT) | ||
4402 | #define VPC_PPSALUINSTRCOUNT (VPG_PPS + PPS_ALUINSTRCOUNT) | ||
4403 | @@ -1094,7 +325,9 @@ extern "C" { | ||
4404 | #define VPC_PPSATTRIBCOUNT (VPG_PPS + PPS_ATTRIBCOUNT) | ||
4405 | #define VPC_PPSUNIFORMCOUNT (VPG_PPS + PPS_UNIFORMCOUNT) | ||
4406 | #define VPC_PPSFUNCTIONCOUNT (VPG_PPS + PPS_FUNCTIONCOUNT) | ||
4407 | +#define VPC_PPSSOURCE (VPG_PPS + PPS_SOURCE) | ||
4408 | |||
4409 | +#define VPC_PROGRAMHANDLE (VPG_PROG + 1) | ||
4410 | |||
4411 | #define VPG_ES20_DRAW_NO (VPG_ES20_DRAW + 1) | ||
4412 | #define VPG_ES11_DRAW_NO (VPG_ES11_DRAW + 1) | ||
4413 | @@ -1118,8 +351,8 @@ typedef struct _gcsPROFILER_COUNTERS | ||
4414 | |||
4415 | /* HW vairable counters. */ | ||
4416 | gctUINT32 gpuCyclesCounter; | ||
4417 | - gctUINT32 gpuTotalCyclesCounter; | ||
4418 | - gctUINT32 gpuIdleCyclesCounter; | ||
4419 | + gctUINT32 gpuTotalCyclesCounter; | ||
4420 | + gctUINT32 gpuIdleCyclesCounter; | ||
4421 | gctUINT32 gpuTotalRead64BytesPerFrame; | ||
4422 | gctUINT32 gpuTotalWrite64BytesPerFrame; | ||
4423 | |||
4424 | @@ -1158,7 +391,7 @@ typedef struct _gcsPROFILER_COUNTERS | ||
4425 | gctUINT32 ra_total_primitive_count; | ||
4426 | gctUINT32 ra_pipe_cache_miss_counter; | ||
4427 | gctUINT32 ra_prefetch_cache_miss_counter; | ||
4428 | - gctUINT32 ra_eez_culled_counter; | ||
4429 | + gctUINT32 ra_eez_culled_counter; | ||
4430 | |||
4431 | /* TX */ | ||
4432 | gctUINT32 tx_total_bilinear_requests; | ||
4433 | @@ -1190,7 +423,7 @@ typedef struct _gcsPROFILER | ||
4434 | gctBOOL enableHal; | ||
4435 | gctBOOL enableHW; | ||
4436 | gctBOOL enableSH; | ||
4437 | - gctBOOL isSyncMode; | ||
4438 | + gctBOOL isSyncMode; | ||
4439 | |||
4440 | gctBOOL useSocket; | ||
4441 | gctINT sockFd; | ||
4442 | @@ -1234,14 +467,17 @@ typedef struct _gcsPROFILER | ||
4443 | gctUINT32 redundantStateChangeCalls; | ||
4444 | #endif | ||
4445 | |||
4446 | - gctUINT32 prevVSInstCount; | ||
4447 | - gctUINT32 prevVSBranchInstCount; | ||
4448 | - gctUINT32 prevVSTexInstCount; | ||
4449 | - gctUINT32 prevVSVertexCount; | ||
4450 | - gctUINT32 prevPSInstCount; | ||
4451 | - gctUINT32 prevPSBranchInstCount; | ||
4452 | - gctUINT32 prevPSTexInstCount; | ||
4453 | - gctUINT32 prevPSPixelCount; | ||
4454 | + gctUINT32 prevVSInstCount; | ||
4455 | + gctUINT32 prevVSBranchInstCount; | ||
4456 | + gctUINT32 prevVSTexInstCount; | ||
4457 | + gctUINT32 prevVSVertexCount; | ||
4458 | + gctUINT32 prevPSInstCount; | ||
4459 | + gctUINT32 prevPSBranchInstCount; | ||
4460 | + gctUINT32 prevPSTexInstCount; | ||
4461 | + gctUINT32 prevPSPixelCount; | ||
4462 | + | ||
4463 | + char* psSource; | ||
4464 | + char* vsSource; | ||
4465 | |||
4466 | } | ||
4467 | gcsPROFILER; | ||
4468 | @@ -1315,6 +551,18 @@ gcoPROFILER_Count( | ||
4469 | IN gctINT Value | ||
4470 | ); | ||
4471 | |||
4472 | +gceSTATUS | ||
4473 | +gcoPROFILER_ShaderSourceFS( | ||
4474 | + IN gcoHAL Hal, | ||
4475 | + IN char* source | ||
4476 | + ); | ||
4477 | + | ||
4478 | +gceSTATUS | ||
4479 | +gcoPROFILER_ShaderSourceVS( | ||
4480 | + IN gcoHAL Hal, | ||
4481 | + IN char* source | ||
4482 | + ); | ||
4483 | + | ||
4484 | /* Profile input vertex shader. */ | ||
4485 | gceSTATUS | ||
4486 | gcoPROFILER_ShaderVS( | ||
4487 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h | ||
4488 | index bc4171e..6e4d830 100644 | ||
4489 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h | ||
4490 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h | ||
4491 | @@ -568,6 +568,23 @@ gco2D_MonoBlit( | ||
4492 | IN gceSURF_FORMAT DestFormat | ||
4493 | ); | ||
4494 | |||
4495 | +gceSTATUS | ||
4496 | +gco2D_MonoBlitEx( | ||
4497 | + IN gco2D Engine, | ||
4498 | + IN gctPOINTER StreamBits, | ||
4499 | + IN gctINT32 StreamStride, | ||
4500 | + IN gctINT32 StreamWidth, | ||
4501 | + IN gctINT32 StreamHeight, | ||
4502 | + IN gctINT32 StreamX, | ||
4503 | + IN gctINT32 StreamY, | ||
4504 | + IN gctUINT32 FgColor, | ||
4505 | + IN gctUINT32 BgColor, | ||
4506 | + IN gcsRECT_PTR SrcRect, | ||
4507 | + IN gcsRECT_PTR DstRect, | ||
4508 | + IN gctUINT8 FgRop, | ||
4509 | + IN gctUINT8 BgRop | ||
4510 | + ); | ||
4511 | + | ||
4512 | /* Set kernel size. */ | ||
4513 | gceSTATUS | ||
4514 | gco2D_SetKernelSize( | ||
4515 | @@ -942,6 +959,15 @@ gco2D_SetSourceTileStatus( | ||
4516 | ); | ||
4517 | |||
4518 | gceSTATUS | ||
4519 | +gco2D_SetTargetTileStatus( | ||
4520 | + IN gco2D Engine, | ||
4521 | + IN gce2D_TILE_STATUS_CONFIG TileStatusConfig, | ||
4522 | + IN gceSURF_FORMAT CompressedFormat, | ||
4523 | + IN gctUINT32 ClearValue, | ||
4524 | + IN gctUINT32 GpuAddress | ||
4525 | + ); | ||
4526 | + | ||
4527 | +gceSTATUS | ||
4528 | gco2D_QueryU32( | ||
4529 | IN gco2D Engine, | ||
4530 | IN gce2D_QUERY Item, | ||
4531 | @@ -955,6 +981,28 @@ gco2D_SetStateU32( | ||
4532 | IN gctUINT32 Value | ||
4533 | ); | ||
4534 | |||
4535 | +gceSTATUS | ||
4536 | +gco2D_SetStateArrayI32( | ||
4537 | + IN gco2D Engine, | ||
4538 | + IN gce2D_STATE State, | ||
4539 | + IN gctINT32_PTR Array, | ||
4540 | + IN gctINT32 ArraySize | ||
4541 | + ); | ||
4542 | + | ||
4543 | +gceSTATUS | ||
4544 | +gco2D_SetStateArrayU32( | ||
4545 | + IN gco2D Engine, | ||
4546 | + IN gce2D_STATE State, | ||
4547 | + IN gctUINT32_PTR Array, | ||
4548 | + IN gctINT32 ArraySize | ||
4549 | + ); | ||
4550 | + | ||
4551 | +gceSTATUS | ||
4552 | +gco2D_SetTargetRect( | ||
4553 | + IN gco2D Engine, | ||
4554 | + IN gcsRECT_PTR Rect | ||
4555 | + ); | ||
4556 | + | ||
4557 | #ifdef __cplusplus | ||
4558 | } | ||
4559 | #endif | ||
4560 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h | ||
4561 | index 5c0877d..14801aa 100644 | ||
4562 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h | ||
4563 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h | ||
4564 | @@ -128,6 +128,7 @@ typedef int gctBOOL; | ||
4565 | typedef gctBOOL * gctBOOL_PTR; | ||
4566 | |||
4567 | typedef int gctINT; | ||
4568 | +typedef long gctLONG; | ||
4569 | typedef signed char gctINT8; | ||
4570 | typedef signed short gctINT16; | ||
4571 | typedef signed int gctINT32; | ||
4572 | @@ -171,6 +172,7 @@ typedef void * gctFILE; | ||
4573 | typedef void * gctSIGNAL; | ||
4574 | typedef void * gctWINDOW; | ||
4575 | typedef void * gctIMAGE; | ||
4576 | +typedef void * gctSYNC_POINT; | ||
4577 | |||
4578 | typedef void * gctSEMAPHORE; | ||
4579 | |||
4580 | @@ -941,12 +943,19 @@ typedef struct _gcsHAL_FRAME_INFO | ||
4581 | OUT gctUINT readRequests[8]; | ||
4582 | OUT gctUINT writeRequests[8]; | ||
4583 | |||
4584 | + /* FE counters. */ | ||
4585 | + OUT gctUINT drawCount; | ||
4586 | + OUT gctUINT vertexOutCount; | ||
4587 | + OUT gctUINT vertexMissCount; | ||
4588 | + | ||
4589 | /* 3D counters. */ | ||
4590 | OUT gctUINT vertexCount; | ||
4591 | OUT gctUINT primitiveCount; | ||
4592 | OUT gctUINT rejectedPrimitives; | ||
4593 | OUT gctUINT culledPrimitives; | ||
4594 | OUT gctUINT clippedPrimitives; | ||
4595 | + OUT gctUINT droppedPrimitives; | ||
4596 | + OUT gctUINT frustumClippedPrimitives; | ||
4597 | OUT gctUINT outPrimitives; | ||
4598 | OUT gctUINT inPrimitives; | ||
4599 | OUT gctUINT culledQuadCount; | ||
4600 | @@ -964,18 +973,86 @@ typedef struct _gcsHAL_FRAME_INFO | ||
4601 | OUT gctUINT shaderCycles; | ||
4602 | OUT gctUINT vsInstructionCount; | ||
4603 | OUT gctUINT vsTextureCount; | ||
4604 | + OUT gctUINT vsBranchCount; | ||
4605 | + OUT gctUINT vsVertices; | ||
4606 | OUT gctUINT psInstructionCount; | ||
4607 | OUT gctUINT psTextureCount; | ||
4608 | + OUT gctUINT psBranchCount; | ||
4609 | + OUT gctUINT psPixels; | ||
4610 | |||
4611 | /* Texture counters. */ | ||
4612 | OUT gctUINT bilinearRequests; | ||
4613 | OUT gctUINT trilinearRequests; | ||
4614 | - OUT gctUINT txBytes8; | ||
4615 | + OUT gctUINT txBytes8[2]; | ||
4616 | OUT gctUINT txHitCount; | ||
4617 | OUT gctUINT txMissCount; | ||
4618 | } | ||
4619 | gcsHAL_FRAME_INFO; | ||
4620 | |||
4621 | +typedef enum _gcePATCH_ID | ||
4622 | +{ | ||
4623 | + gcePATCH_UNKNOWN = 0xFFFFFFFF, | ||
4624 | + | ||
4625 | + /* Benchmark list*/ | ||
4626 | + gcePATCH_GLB11 = 0x0, | ||
4627 | + gcePATCH_GLB21, | ||
4628 | + gcePATCH_GLB25, | ||
4629 | + gcePATCH_GLB27, | ||
4630 | + | ||
4631 | + gcePATCH_BM21, | ||
4632 | + gcePATCH_MM, | ||
4633 | + gcePATCH_MM06, | ||
4634 | + gcePATCH_MM07, | ||
4635 | + gcePATCH_QUADRANT, | ||
4636 | + gcePATCH_ANTUTU, | ||
4637 | + gcePATCH_SMARTBENCH, | ||
4638 | + gcePATCH_JPCT, | ||
4639 | + gcePATCH_NENAMARK, | ||
4640 | + gcePATCH_NENAMARK2, | ||
4641 | + gcePATCH_NEOCORE, | ||
4642 | + gcePATCH_GLB, | ||
4643 | + gcePATCH_GB, | ||
4644 | + gcePATCH_RTESTVA, | ||
4645 | + gcePATCH_BMX, | ||
4646 | + gcePATCH_BMGUI, | ||
4647 | + | ||
4648 | + /* Game list */ | ||
4649 | + gcePATCH_NBA2013, | ||
4650 | + gcePATCH_BARDTALE, | ||
4651 | + gcePATCH_BUSPARKING3D, | ||
4652 | + gcePATCH_FISHBOODLE, | ||
4653 | + gcePATCH_SUBWAYSURFER, | ||
4654 | + gcePATCH_HIGHWAYDRIVER, | ||
4655 | + gcePATCH_PREMIUM, | ||
4656 | + gcePATCH_RACEILLEGAL, | ||
4657 | + gcePATCH_BLABLA, | ||
4658 | + gcePATCH_MEGARUN, | ||
4659 | + gcePATCH_GALAXYONFIRE2, | ||
4660 | + gcePATCH_GLOFTR3HM, | ||
4661 | + gcePATCH_GLOFTSXHM, | ||
4662 | + gcePATCH_GLOFTF3HM, | ||
4663 | + gcePATCH_GLOFTGANG, | ||
4664 | + gcePATCH_XRUNNER, | ||
4665 | + gcePATCH_WP, | ||
4666 | + gcePATCH_DEVIL, | ||
4667 | + gcePATCH_HOLYARCH, | ||
4668 | + gcePATCH_MUSE, | ||
4669 | + gcePATCH_SG, | ||
4670 | + gcePATCH_SIEGECRAFT, | ||
4671 | + gcePATCH_CARCHALLENGE, | ||
4672 | + gcePATCH_HEROESCALL, | ||
4673 | + gcePATCH_MONOPOLY, | ||
4674 | + gcePATCH_CTGL20, | ||
4675 | + gcePATCH_FIREFOX, | ||
4676 | + gcePATCH_CHORME, | ||
4677 | + gcePATCH_DUOKANTV, | ||
4678 | + gcePATCH_TESTAPP, | ||
4679 | + | ||
4680 | + /* Count enum*/ | ||
4681 | + gcePATCH_COUNT, | ||
4682 | +} | ||
4683 | +gcePATCH_ID; | ||
4684 | + | ||
4685 | #if gcdLINK_QUEUE_SIZE | ||
4686 | typedef struct _gckLINKDATA * gckLINKDATA; | ||
4687 | struct _gckLINKDATA | ||
4688 | diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h | ||
4689 | index 03cb4d6..2eab666 100644 | ||
4690 | --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h | ||
4691 | +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h | ||
4692 | @@ -28,7 +28,7 @@ | ||
4693 | |||
4694 | #define gcvVERSION_PATCH 9 | ||
4695 | |||
4696 | -#define gcvVERSION_BUILD 6622 | ||
4697 | +#define gcvVERSION_BUILD 9754 | ||
4698 | |||
4699 | #define gcvVERSION_DATE __DATE__ | ||
4700 | |||
4701 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c | ||
4702 | index 4d48bd5..b029428 100644 | ||
4703 | --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c | ||
4704 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c | ||
4705 | @@ -25,7 +25,9 @@ | ||
4706 | #include <linux/mm.h> | ||
4707 | #include <linux/mman.h> | ||
4708 | #include <linux/slab.h> | ||
4709 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
4710 | #include <mach/hardware.h> | ||
4711 | +#endif | ||
4712 | #include <linux/pm_runtime.h> | ||
4713 | |||
4714 | #define _GC_OBJ_ZONE gcvZONE_DEVICE | ||
4715 | @@ -305,6 +307,7 @@ gckGALDEVICE_Construct( | ||
4716 | IN gctUINT LogFileSize, | ||
4717 | IN struct device *pdev, | ||
4718 | IN gctINT PowerManagement, | ||
4719 | + IN gctINT GpuProfiler, | ||
4720 | OUT gckGALDEVICE *Device | ||
4721 | ) | ||
4722 | { | ||
4723 | @@ -369,6 +372,10 @@ gckGALDEVICE_Construct( | ||
4724 | #if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) | ||
4725 | /*get gpu regulator*/ | ||
4726 | device->gpu_regulator = regulator_get(pdev, "cpu_vddgpu"); | ||
4727 | +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4728 | + device->gpu_regulator = regulator_get(pdev, "vddpu"); | ||
4729 | +#endif | ||
4730 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4731 | if (IS_ERR(device->gpu_regulator)) { | ||
4732 | gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER, | ||
4733 | "%s(%d): Failed to get gpu regulator %s/%s \n", | ||
4734 | @@ -541,6 +548,10 @@ gckGALDEVICE_Construct( | ||
4735 | device->kernels[gcvCORE_MAJOR]->hardware, PowerManagement | ||
4736 | )); | ||
4737 | |||
4738 | + gcmkONERROR(gckHARDWARE_SetGpuProfiler( | ||
4739 | + device->kernels[gcvCORE_MAJOR]->hardware, GpuProfiler | ||
4740 | + )); | ||
4741 | + | ||
4742 | #if COMMAND_PROCESSOR_VERSION == 1 | ||
4743 | /* Start the command queue. */ | ||
4744 | gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_MAJOR]->command)); | ||
4745 | @@ -599,6 +610,7 @@ gckGALDEVICE_Construct( | ||
4746 | device->kernels[gcvCORE_2D]->hardware, PowerManagement | ||
4747 | )); | ||
4748 | |||
4749 | + | ||
4750 | #if COMMAND_PROCESSOR_VERSION == 1 | ||
4751 | /* Start the command queue. */ | ||
4752 | gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_2D]->command)); | ||
4753 | @@ -635,6 +647,7 @@ gckGALDEVICE_Construct( | ||
4754 | device->kernels[gcvCORE_VG]->vg->hardware, | ||
4755 | PowerManagement | ||
4756 | )); | ||
4757 | + | ||
4758 | #endif | ||
4759 | } | ||
4760 | else | ||
4761 | @@ -849,6 +862,7 @@ gckGALDEVICE_Construct( | ||
4762 | } | ||
4763 | else | ||
4764 | { | ||
4765 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
4766 | mem_region = request_mem_region( | ||
4767 | ContiguousBase, ContiguousSize, "galcore managed memory" | ||
4768 | ); | ||
4769 | @@ -864,6 +878,7 @@ gckGALDEVICE_Construct( | ||
4770 | |||
4771 | gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
4772 | } | ||
4773 | +#endif | ||
4774 | |||
4775 | device->requestedContiguousBase = ContiguousBase; | ||
4776 | device->requestedContiguousSize = ContiguousSize; | ||
4777 | @@ -1107,7 +1122,7 @@ gckGALDEVICE_Destroy( | ||
4778 | pm_runtime_disable(Device->pmdev); | ||
4779 | #endif | ||
4780 | |||
4781 | -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) | ||
4782 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4783 | if (Device->gpu_regulator) { | ||
4784 | regulator_put(Device->gpu_regulator); | ||
4785 | Device->gpu_regulator = NULL; | ||
4786 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h | ||
4787 | index dde4f03..c51432f 100644 | ||
4788 | --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h | ||
4789 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h | ||
4790 | @@ -26,6 +26,15 @@ | ||
4791 | ******************************* gckGALDEVICE Structure ******************************* | ||
4792 | \******************************************************************************/ | ||
4793 | |||
4794 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4795 | +struct contiguous_mem_pool { | ||
4796 | + struct dma_attrs attrs; | ||
4797 | + dma_addr_t phys; | ||
4798 | + void *virt; | ||
4799 | + size_t size; | ||
4800 | +}; | ||
4801 | +#endif | ||
4802 | + | ||
4803 | typedef struct _gckGALDEVICE | ||
4804 | { | ||
4805 | /* Objects. */ | ||
4806 | @@ -91,12 +100,16 @@ typedef struct _gckGALDEVICE | ||
4807 | struct clk *clk_2d_axi; | ||
4808 | struct clk *clk_vg_axi; | ||
4809 | |||
4810 | -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) | ||
4811 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4812 | /*Power management.*/ | ||
4813 | struct regulator *gpu_regulator; | ||
4814 | #endif | ||
4815 | /*Run time pm*/ | ||
4816 | struct device *pmdev; | ||
4817 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4818 | + struct contiguous_mem_pool *pool; | ||
4819 | + struct reset_control *rstc[gcdMAX_GPU_COUNT]; | ||
4820 | +#endif | ||
4821 | } | ||
4822 | * gckGALDEVICE; | ||
4823 | |||
4824 | @@ -171,6 +184,7 @@ gceSTATUS gckGALDEVICE_Construct( | ||
4825 | IN gctUINT LogFileSize, | ||
4826 | IN struct device *pdev, | ||
4827 | IN gctINT PowerManagement, | ||
4828 | + IN gctINT GpuProfiler, | ||
4829 | OUT gckGALDEVICE *Device | ||
4830 | ); | ||
4831 | |||
4832 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c | ||
4833 | index bacd531..88a7e4e6 100644 | ||
4834 | --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c | ||
4835 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c | ||
4836 | @@ -1,7 +1,7 @@ | ||
4837 | /**************************************************************************** | ||
4838 | * | ||
4839 | * Copyright (C) 2005 - 2013 by Vivante Corp. | ||
4840 | -* Copyright (C) 2011-2012 Freescale Semiconductor, Inc. | ||
4841 | +* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. | ||
4842 | * | ||
4843 | * This program is free software; you can redistribute it and/or modify | ||
4844 | * it under the terms of the GNU General Public License as published by | ||
4845 | @@ -69,14 +69,26 @@ task_notify_func(struct notifier_block *self, unsigned long val, void *data) | ||
4846 | #include <mach/viv_gpu.h> | ||
4847 | #else | ||
4848 | #include <linux/pm_runtime.h> | ||
4849 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
4850 | #include <mach/busfreq.h> | ||
4851 | +#else | ||
4852 | +#include <linux/reset.h> | ||
4853 | +#endif | ||
4854 | #endif | ||
4855 | /* Zone used for header/footer. */ | ||
4856 | #define _GC_OBJ_ZONE gcvZONE_DRIVER | ||
4857 | |||
4858 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
4859 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4860 | +#include <linux/device_cooling.h> | ||
4861 | +#define REG_THERMAL_NOTIFIER(a) register_devfreq_cooling_notifier(a); | ||
4862 | +#define UNREG_THERMAL_NOTIFIER(a) unregister_devfreq_cooling_notifier(a); | ||
4863 | +#else | ||
4864 | extern int register_thermal_notifier(struct notifier_block *nb); | ||
4865 | extern int unregister_thermal_notifier(struct notifier_block *nb); | ||
4866 | +#define REG_THERMAL_NOTIFIER(a) register_thermal_notifier(a); | ||
4867 | +#define UNREG_THERMAL_NOTIFIER(a) unregister_thermal_notifier(a); | ||
4868 | +#endif | ||
4869 | #endif | ||
4870 | |||
4871 | MODULE_DESCRIPTION("Vivante Graphics Driver"); | ||
4872 | @@ -116,7 +128,11 @@ module_param(registerMemBaseVG, ulong, 0644); | ||
4873 | static ulong registerMemSizeVG = 2 << 10; | ||
4874 | module_param(registerMemSizeVG, ulong, 0644); | ||
4875 | |||
4876 | +#if gcdENABLE_FSCALE_VAL_ADJUST | ||
4877 | +static ulong contiguousSize = 128 << 20; | ||
4878 | +#else | ||
4879 | static ulong contiguousSize = 4 << 20; | ||
4880 | +#endif | ||
4881 | module_param(contiguousSize, ulong, 0644); | ||
4882 | |||
4883 | static ulong contiguousBase = 0; | ||
4884 | @@ -134,6 +150,9 @@ module_param(compression, int, 0644); | ||
4885 | static int powerManagement = 1; | ||
4886 | module_param(powerManagement, int, 0644); | ||
4887 | |||
4888 | +static int gpuProfiler = 0; | ||
4889 | +module_param(gpuProfiler, int, 0644); | ||
4890 | + | ||
4891 | static int signal = 48; | ||
4892 | module_param(signal, int, 0644); | ||
4893 | |||
4894 | @@ -786,7 +805,9 @@ static int drv_init(struct device *pdev) | ||
4895 | |||
4896 | printk(KERN_INFO "Galcore version %d.%d.%d.%d\n", | ||
4897 | gcvVERSION_MAJOR, gcvVERSION_MINOR, gcvVERSION_PATCH, gcvVERSION_BUILD); | ||
4898 | - | ||
4899 | + /* when enable gpu profiler, we need to turn off gpu powerMangement */ | ||
4900 | + if(gpuProfiler) | ||
4901 | + powerManagement = 0; | ||
4902 | if (showArgs) | ||
4903 | { | ||
4904 | printk("galcore options:\n"); | ||
4905 | @@ -818,6 +839,7 @@ static int drv_init(struct device *pdev) | ||
4906 | printk(" physSize = 0x%08lX\n", physSize); | ||
4907 | printk(" logFileSize = %d KB \n", logFileSize); | ||
4908 | printk(" powerManagement = %d\n", powerManagement); | ||
4909 | + printk(" gpuProfiler = %d\n", gpuProfiler); | ||
4910 | #if ENABLE_GPU_CLOCK_BY_DRIVER | ||
4911 | printk(" coreClock = %lu\n", coreClock); | ||
4912 | #endif | ||
4913 | @@ -841,9 +863,14 @@ static int drv_init(struct device *pdev) | ||
4914 | logFileSize, | ||
4915 | pdev, | ||
4916 | powerManagement, | ||
4917 | + gpuProfiler, | ||
4918 | &device | ||
4919 | )); | ||
4920 | |||
4921 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4922 | + device->pool = dev_get_drvdata(pdev); | ||
4923 | +#endif | ||
4924 | + | ||
4925 | /* Start the GAL device. */ | ||
4926 | gcmkONERROR(gckGALDEVICE_Start(device)); | ||
4927 | |||
4928 | @@ -1028,11 +1055,18 @@ static struct notifier_block thermal_hot_pm_notifier = { | ||
4929 | |||
4930 | |||
4931 | |||
4932 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) | ||
4933 | +static int gpu_probe(struct platform_device *pdev) | ||
4934 | +#else | ||
4935 | static int __devinit gpu_probe(struct platform_device *pdev) | ||
4936 | +#endif | ||
4937 | { | ||
4938 | int ret = -ENODEV; | ||
4939 | struct resource* res; | ||
4940 | -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
4941 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4942 | + struct contiguous_mem_pool *pool; | ||
4943 | + struct reset_control *rstc; | ||
4944 | +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
4945 | struct device_node *dn =pdev->dev.of_node; | ||
4946 | const u32 *prop; | ||
4947 | #else | ||
4948 | @@ -1077,7 +1111,22 @@ static int __devinit gpu_probe(struct platform_device *pdev) | ||
4949 | registerMemSizeVG = res->end - res->start + 1; | ||
4950 | } | ||
4951 | |||
4952 | -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
4953 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4954 | + pool = devm_kzalloc(&pdev->dev, sizeof(*pool), GFP_KERNEL); | ||
4955 | + if (!pool) | ||
4956 | + return -ENOMEM; | ||
4957 | + pool->size = contiguousSize; | ||
4958 | + init_dma_attrs(&pool->attrs); | ||
4959 | + dma_set_attr(DMA_ATTR_WRITE_COMBINE, &pool->attrs); | ||
4960 | + pool->virt = dma_alloc_attrs(&pdev->dev, pool->size, &pool->phys, | ||
4961 | + GFP_KERNEL, &pool->attrs); | ||
4962 | + if (!pool->virt) { | ||
4963 | + dev_err(&pdev->dev, "Failed to allocate contiguous memory\n"); | ||
4964 | + return -ENOMEM; | ||
4965 | + } | ||
4966 | + contiguousBase = pool->phys; | ||
4967 | + dev_set_drvdata(&pdev->dev, pool); | ||
4968 | +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
4969 | prop = of_get_property(dn, "contiguousbase", NULL); | ||
4970 | if(prop) | ||
4971 | contiguousBase = *prop; | ||
4972 | @@ -1095,30 +1144,56 @@ static int __devinit gpu_probe(struct platform_device *pdev) | ||
4973 | |||
4974 | if (!ret) | ||
4975 | { | ||
4976 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
4977 | + rstc = devm_reset_control_get(&pdev->dev, "gpu3d"); | ||
4978 | + galDevice->rstc[gcvCORE_MAJOR] = IS_ERR(rstc) ? NULL : rstc; | ||
4979 | + | ||
4980 | + rstc = devm_reset_control_get(&pdev->dev, "gpu2d"); | ||
4981 | + galDevice->rstc[gcvCORE_2D] = IS_ERR(rstc) ? NULL : rstc; | ||
4982 | + | ||
4983 | + rstc = devm_reset_control_get(&pdev->dev, "gpuvg"); | ||
4984 | + galDevice->rstc[gcvCORE_VG] = IS_ERR(rstc) ? NULL : rstc; | ||
4985 | +#endif | ||
4986 | platform_set_drvdata(pdev, galDevice); | ||
4987 | |||
4988 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
4989 | - if(galDevice->kernels[gcvCORE_MAJOR]) | ||
4990 | - register_thermal_notifier(&thermal_hot_pm_notifier); | ||
4991 | + if (galDevice->kernels[gcvCORE_MAJOR]) | ||
4992 | + REG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier); | ||
4993 | #endif | ||
4994 | gcmkFOOTER_NO(); | ||
4995 | return ret; | ||
4996 | } | ||
4997 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
4998 | - unregister_thermal_notifier(&thermal_hot_pm_notifier); | ||
4999 | + UNREG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier); | ||
5000 | +#endif | ||
5001 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5002 | + dma_free_attrs(&pdev->dev, pool->size, pool->virt, pool->phys, | ||
5003 | + &pool->attrs); | ||
5004 | #endif | ||
5005 | gcmkFOOTER_ARG(KERN_INFO "Failed to register gpu driver: %d\n", ret); | ||
5006 | return ret; | ||
5007 | } | ||
5008 | |||
5009 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) | ||
5010 | +static int gpu_remove(struct platform_device *pdev) | ||
5011 | +#else | ||
5012 | static int __devexit gpu_remove(struct platform_device *pdev) | ||
5013 | +#endif | ||
5014 | { | ||
5015 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5016 | + gckGALDEVICE device = platform_get_drvdata(pdev); | ||
5017 | + struct contiguous_mem_pool *pool = device->pool; | ||
5018 | +#endif | ||
5019 | gcmkHEADER(); | ||
5020 | #if gcdENABLE_FSCALE_VAL_ADJUST | ||
5021 | if(galDevice->kernels[gcvCORE_MAJOR]) | ||
5022 | - unregister_thermal_notifier(&thermal_hot_pm_notifier); | ||
5023 | + UNREG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier); | ||
5024 | #endif | ||
5025 | drv_exit(); | ||
5026 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5027 | + dma_free_attrs(&pdev->dev, pool->size, pool->virt, pool->phys, | ||
5028 | + &pool->attrs); | ||
5029 | +#endif | ||
5030 | gcmkFOOTER_NO(); | ||
5031 | return 0; | ||
5032 | } | ||
5033 | @@ -1254,13 +1329,17 @@ MODULE_DEVICE_TABLE(of, mxs_gpu_dt_ids); | ||
5034 | #ifdef CONFIG_PM | ||
5035 | static int gpu_runtime_suspend(struct device *dev) | ||
5036 | { | ||
5037 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
5038 | release_bus_freq(BUS_FREQ_HIGH); | ||
5039 | +#endif | ||
5040 | return 0; | ||
5041 | } | ||
5042 | |||
5043 | static int gpu_runtime_resume(struct device *dev) | ||
5044 | { | ||
5045 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
5046 | request_bus_freq(BUS_FREQ_HIGH); | ||
5047 | +#endif | ||
5048 | return 0; | ||
5049 | } | ||
5050 | |||
5051 | @@ -1284,7 +1363,11 @@ static const struct dev_pm_ops gpu_pm_ops = { | ||
5052 | |||
5053 | static struct platform_driver gpu_driver = { | ||
5054 | .probe = gpu_probe, | ||
5055 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) | ||
5056 | + .remove = gpu_remove, | ||
5057 | +#else | ||
5058 | .remove = __devexit_p(gpu_remove), | ||
5059 | +#endif | ||
5060 | |||
5061 | .suspend = gpu_suspend, | ||
5062 | .resume = gpu_resume, | ||
5063 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c | ||
5064 | index e7edc39..331c73f 100644 | ||
5065 | --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c | ||
5066 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c | ||
5067 | @@ -30,19 +30,30 @@ | ||
5068 | #include <linux/dma-mapping.h> | ||
5069 | #include <linux/slab.h> | ||
5070 | #include <linux/idr.h> | ||
5071 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | ||
5072 | #include <mach/hardware.h> | ||
5073 | +#endif | ||
5074 | #include <linux/workqueue.h> | ||
5075 | #include <linux/idr.h> | ||
5076 | #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23) | ||
5077 | #include <linux/math64.h> | ||
5078 | #endif | ||
5079 | -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
5080 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5081 | +#include <linux/reset.h> | ||
5082 | +static inline void imx_gpc_power_up_pu(bool flag) {} | ||
5083 | +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | ||
5084 | #include <mach/common.h> | ||
5085 | #endif | ||
5086 | #include <linux/delay.h> | ||
5087 | #include <linux/pm_runtime.h> | ||
5088 | |||
5089 | |||
5090 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5091 | +#include <linux/file.h> | ||
5092 | +#include "gc_hal_kernel_sync.h" | ||
5093 | +#endif | ||
5094 | + | ||
5095 | + | ||
5096 | #define _GC_OBJ_ZONE gcvZONE_OS | ||
5097 | |||
5098 | /******************************************************************************* | ||
5099 | @@ -148,6 +159,7 @@ typedef struct _gcsINTEGER_DB | ||
5100 | { | ||
5101 | struct idr idr; | ||
5102 | spinlock_t lock; | ||
5103 | + gctINT curr; | ||
5104 | } | ||
5105 | gcsINTEGER_DB; | ||
5106 | |||
5107 | @@ -180,6 +192,14 @@ struct _gckOS | ||
5108 | /* signal id database. */ | ||
5109 | gcsINTEGER_DB signalDB; | ||
5110 | |||
5111 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5112 | + /* Lock. */ | ||
5113 | + gctPOINTER syncPointMutex; | ||
5114 | + | ||
5115 | + /* sync point id database. */ | ||
5116 | + gcsINTEGER_DB syncPointDB; | ||
5117 | +#endif | ||
5118 | + | ||
5119 | gcsUSER_MAPPING_PTR userMap; | ||
5120 | gctPOINTER debugLock; | ||
5121 | |||
5122 | @@ -215,6 +235,25 @@ typedef struct _gcsSIGNAL | ||
5123 | } | ||
5124 | gcsSIGNAL; | ||
5125 | |||
5126 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5127 | +typedef struct _gcsSYNC_POINT * gcsSYNC_POINT_PTR; | ||
5128 | +typedef struct _gcsSYNC_POINT | ||
5129 | +{ | ||
5130 | + /* The reference counter. */ | ||
5131 | + atomic_t ref; | ||
5132 | + | ||
5133 | + /* State. */ | ||
5134 | + atomic_t state; | ||
5135 | + | ||
5136 | + /* timeline. */ | ||
5137 | + struct sync_timeline * timeline; | ||
5138 | + | ||
5139 | + /* ID. */ | ||
5140 | + gctUINT32 id; | ||
5141 | +} | ||
5142 | +gcsSYNC_POINT; | ||
5143 | +#endif | ||
5144 | + | ||
5145 | typedef struct _gcsPageInfo * gcsPageInfo_PTR; | ||
5146 | typedef struct _gcsPageInfo | ||
5147 | { | ||
5148 | @@ -767,7 +806,32 @@ _AllocateIntegerId( | ||
5149 | ) | ||
5150 | { | ||
5151 | int result; | ||
5152 | + gctINT next; | ||
5153 | + | ||
5154 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) | ||
5155 | + idr_preload(GFP_KERNEL | gcdNOWARN); | ||
5156 | |||
5157 | + spin_lock(&Database->lock); | ||
5158 | + | ||
5159 | + next = (Database->curr + 1 <= 0) ? 1 : Database->curr + 1; | ||
5160 | + result = idr_alloc(&Database->idr, KernelPointer, next, 0, GFP_ATOMIC); | ||
5161 | + | ||
5162 | + if (!result) | ||
5163 | + { | ||
5164 | + Database->curr = *Id; | ||
5165 | + } | ||
5166 | + | ||
5167 | + spin_unlock(&Database->lock); | ||
5168 | + | ||
5169 | + idr_preload_end(); | ||
5170 | + | ||
5171 | + if (result < 0) | ||
5172 | + { | ||
5173 | + return gcvSTATUS_OUT_OF_RESOURCES; | ||
5174 | + } | ||
5175 | + | ||
5176 | + *Id = result; | ||
5177 | +#else | ||
5178 | again: | ||
5179 | if (idr_pre_get(&Database->idr, GFP_KERNEL | gcdNOWARN) == 0) | ||
5180 | { | ||
5181 | @@ -776,8 +840,15 @@ again: | ||
5182 | |||
5183 | spin_lock(&Database->lock); | ||
5184 | |||
5185 | - /* Try to get a id greater than 0. */ | ||
5186 | - result = idr_get_new_above(&Database->idr, KernelPointer, 1, Id); | ||
5187 | + next = (Database->curr + 1 <= 0) ? 1 : Database->curr + 1; | ||
5188 | + | ||
5189 | + /* Try to get a id greater than current id. */ | ||
5190 | + result = idr_get_new_above(&Database->idr, KernelPointer, next, Id); | ||
5191 | + | ||
5192 | + if (!result) | ||
5193 | + { | ||
5194 | + Database->curr = *Id; | ||
5195 | + } | ||
5196 | |||
5197 | spin_unlock(&Database->lock); | ||
5198 | |||
5199 | @@ -790,6 +861,7 @@ again: | ||
5200 | { | ||
5201 | return gcvSTATUS_OUT_OF_RESOURCES; | ||
5202 | } | ||
5203 | +#endif | ||
5204 | |||
5205 | return gcvSTATUS_OK; | ||
5206 | } | ||
5207 | @@ -1008,6 +1080,21 @@ gckOS_Construct( | ||
5208 | /* Initialize signal id database. */ | ||
5209 | idr_init(&os->signalDB.idr); | ||
5210 | |||
5211 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5212 | + /* | ||
5213 | + * Initialize the sync point manager. | ||
5214 | + */ | ||
5215 | + | ||
5216 | + /* Initialize mutex. */ | ||
5217 | + gcmkONERROR(gckOS_CreateMutex(os, &os->syncPointMutex)); | ||
5218 | + | ||
5219 | + /* Initialize sync point id database lock. */ | ||
5220 | + spin_lock_init(&os->syncPointDB.lock); | ||
5221 | + | ||
5222 | + /* Initialize sync point id database. */ | ||
5223 | + idr_init(&os->syncPointDB.idr); | ||
5224 | +#endif | ||
5225 | + | ||
5226 | #if gcdUSE_NON_PAGED_MEMORY_CACHE | ||
5227 | os->cacheSize = 0; | ||
5228 | os->cacheHead = gcvNULL; | ||
5229 | @@ -1031,6 +1118,15 @@ gckOS_Construct( | ||
5230 | return gcvSTATUS_OK; | ||
5231 | |||
5232 | OnError: | ||
5233 | + | ||
5234 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5235 | + if (os->syncPointMutex != gcvNULL) | ||
5236 | + { | ||
5237 | + gcmkVERIFY_OK( | ||
5238 | + gckOS_DeleteMutex(os, os->syncPointMutex)); | ||
5239 | + } | ||
5240 | +#endif | ||
5241 | + | ||
5242 | if (os->signalMutex != gcvNULL) | ||
5243 | { | ||
5244 | gcmkVERIFY_OK( | ||
5245 | @@ -1104,6 +1200,15 @@ gckOS_Destroy( | ||
5246 | _FreeAllNonPagedMemoryCache(Os); | ||
5247 | #endif | ||
5248 | |||
5249 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5250 | + /* | ||
5251 | + * Destroy the sync point manager. | ||
5252 | + */ | ||
5253 | + | ||
5254 | + /* Destroy the mutex. */ | ||
5255 | + gcmkVERIFY_OK(gckOS_DeleteMutex(Os, Os->syncPointMutex)); | ||
5256 | +#endif | ||
5257 | + | ||
5258 | /* | ||
5259 | * Destroy the signal manager. | ||
5260 | */ | ||
5261 | @@ -1961,12 +2066,6 @@ gckOS_AllocateNonPagedMemory( | ||
5262 | gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); | ||
5263 | } | ||
5264 | |||
5265 | - if ((Os->device->baseAddress & 0x80000000) != (mdl->dmaHandle & 0x80000000)) | ||
5266 | - { | ||
5267 | - mdl->dmaHandle = (mdl->dmaHandle & ~0x80000000) | ||
5268 | - | (Os->device->baseAddress & 0x80000000); | ||
5269 | - } | ||
5270 | - | ||
5271 | mdl->addr = addr; | ||
5272 | |||
5273 | /* Return allocated memory. */ | ||
5274 | @@ -2307,6 +2406,7 @@ gckOS_ReadRegisterEx( | ||
5275 | |||
5276 | /* Verify the arguments. */ | ||
5277 | gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5278 | + gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]); | ||
5279 | gcmkVERIFY_ARGUMENT(Data != gcvNULL); | ||
5280 | |||
5281 | *Data = readl((gctUINT8 *)Os->device->registerBases[Core] + Address); | ||
5282 | @@ -2357,6 +2457,8 @@ gckOS_WriteRegisterEx( | ||
5283 | { | ||
5284 | gcmkHEADER_ARG("Os=0x%X Core=%d Address=0x%X Data=0x%08x", Os, Core, Address, Data); | ||
5285 | |||
5286 | + gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]); | ||
5287 | + | ||
5288 | writel(Data, (gctUINT8 *)Os->device->registerBases[Core] + Address); | ||
5289 | |||
5290 | /* Success. */ | ||
5291 | @@ -2799,16 +2901,25 @@ gckOS_MapPhysical( | ||
5292 | |||
5293 | if (mdl == gcvNULL) | ||
5294 | { | ||
5295 | +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5296 | + struct contiguous_mem_pool *pool = Os->device->pool; | ||
5297 | + | ||
5298 | + if (Physical >= pool->phys && Physical < pool->phys + pool->size) | ||
5299 | + logical = (gctPOINTER)(Physical - pool->phys + pool->virt); | ||
5300 | + else | ||
5301 | + logical = gcvNULL; | ||
5302 | +#else | ||
5303 | /* Map memory as cached memory. */ | ||
5304 | request_mem_region(physical, Bytes, "MapRegion"); | ||
5305 | logical = (gctPOINTER) ioremap_nocache(physical, Bytes); | ||
5306 | +#endif | ||
5307 | |||
5308 | if (logical == gcvNULL) | ||
5309 | { | ||
5310 | gcmkTRACE_ZONE( | ||
5311 | gcvLEVEL_INFO, gcvZONE_OS, | ||
5312 | - "%s(%d): Failed to ioremap", | ||
5313 | - __FUNCTION__, __LINE__ | ||
5314 | + "%s(%d): Failed to map physical address 0x%08x", | ||
5315 | + __FUNCTION__, __LINE__, Physical | ||
5316 | ); | ||
5317 | |||
5318 | MEMORY_UNLOCK(Os); | ||
5319 | @@ -3621,7 +3732,7 @@ gckOS_Delay( | ||
5320 | if (Delay > 0) | ||
5321 | { | ||
5322 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28) | ||
5323 | - ktime_t delay = ktime_set(0, Delay * NSEC_PER_MSEC); | ||
5324 | + ktime_t delay = ktime_set(Delay/1000, (Delay%1000) * NSEC_PER_MSEC); | ||
5325 | __set_current_state(TASK_UNINTERRUPTIBLE); | ||
5326 | schedule_hrtimeout(&delay, HRTIMER_MODE_REL); | ||
5327 | #else | ||
5328 | @@ -3881,8 +3992,13 @@ gckOS_AllocatePagedMemoryEx( | ||
5329 | |||
5330 | if (Contiguous) | ||
5331 | { | ||
5332 | - /* Get contiguous pages, and suppress warning (stack dump) from kernel when | ||
5333 | - we run out of memory. */ | ||
5334 | + gctUINT32 order = get_order(bytes); | ||
5335 | + | ||
5336 | + if (order >= MAX_ORDER) | ||
5337 | + { | ||
5338 | + gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); | ||
5339 | + } | ||
5340 | + | ||
5341 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27) | ||
5342 | addr = | ||
5343 | alloc_pages_exact(numPages * PAGE_SIZE, GFP_KERNEL | gcdNOWARN | __GFP_NORETRY); | ||
5344 | @@ -3894,12 +4010,12 @@ gckOS_AllocatePagedMemoryEx( | ||
5345 | mdl->exact = gcvTRUE; | ||
5346 | #else | ||
5347 | mdl->u.contiguousPages = | ||
5348 | - alloc_pages(GFP_KERNEL | gcdNOWARN | __GFP_NORETRY, GetOrder(numPages)); | ||
5349 | + alloc_pages(GFP_KERNEL | gcdNOWARN | __GFP_NORETRY, order); | ||
5350 | #endif | ||
5351 | if (mdl->u.contiguousPages == gcvNULL) | ||
5352 | { | ||
5353 | mdl->u.contiguousPages = | ||
5354 | - alloc_pages(GFP_KERNEL | __GFP_HIGHMEM | gcdNOWARN, GetOrder(numPages)); | ||
5355 | + alloc_pages(GFP_KERNEL | __GFP_HIGHMEM | gcdNOWARN, order); | ||
5356 | |||
5357 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27) | ||
5358 | mdl->exact = gcvFALSE; | ||
5359 | @@ -4239,13 +4355,13 @@ gckOS_LockPages( | ||
5360 | } | ||
5361 | |||
5362 | mdlMap->vma->vm_flags |= gcdVM_FLAGS; | ||
5363 | -#if !gcdPAGED_MEMORY_CACHEABLE | ||
5364 | + | ||
5365 | if (Cacheable == gcvFALSE) | ||
5366 | { | ||
5367 | /* Make this mapping non-cached. */ | ||
5368 | mdlMap->vma->vm_page_prot = gcmkPAGED_MEMROY_PROT(mdlMap->vma->vm_page_prot); | ||
5369 | } | ||
5370 | -#endif | ||
5371 | + | ||
5372 | addr = mdl->addr; | ||
5373 | |||
5374 | /* Now map all the vmalloc pages to this user address. */ | ||
5375 | @@ -5336,6 +5452,7 @@ OnError: | ||
5376 | { | ||
5377 | /* Get the user pages. */ | ||
5378 | down_read(¤t->mm->mmap_sem); | ||
5379 | + | ||
5380 | result = get_user_pages(current, | ||
5381 | current->mm, | ||
5382 | memory & PAGE_MASK, | ||
5383 | @@ -5345,105 +5462,127 @@ OnError: | ||
5384 | pages, | ||
5385 | gcvNULL | ||
5386 | ); | ||
5387 | + | ||
5388 | up_read(¤t->mm->mmap_sem); | ||
5389 | |||
5390 | if (result <=0 || result < pageCount) | ||
5391 | { | ||
5392 | struct vm_area_struct *vma; | ||
5393 | |||
5394 | - /* Free the page table. */ | ||
5395 | - if (pages != gcvNULL) | ||
5396 | + /* Release the pages if any. */ | ||
5397 | + if (result > 0) | ||
5398 | { | ||
5399 | - /* Release the pages if any. */ | ||
5400 | - if (result > 0) | ||
5401 | + for (i = 0; i < result; i++) | ||
5402 | { | ||
5403 | - for (i = 0; i < result; i++) | ||
5404 | + if (pages[i] == gcvNULL) | ||
5405 | { | ||
5406 | - if (pages[i] == gcvNULL) | ||
5407 | - { | ||
5408 | - break; | ||
5409 | - } | ||
5410 | - | ||
5411 | - page_cache_release(pages[i]); | ||
5412 | + break; | ||
5413 | } | ||
5414 | + | ||
5415 | + page_cache_release(pages[i]); | ||
5416 | + pages[i] = gcvNULL; | ||
5417 | } | ||
5418 | |||
5419 | - kfree(pages); | ||
5420 | - pages = gcvNULL; | ||
5421 | + result = 0; | ||
5422 | } | ||
5423 | |||
5424 | vma = find_vma(current->mm, memory); | ||
5425 | |||
5426 | - if (vma && (vma->vm_flags & VM_PFNMAP) ) | ||
5427 | + if (vma && (vma->vm_flags & VM_PFNMAP)) | ||
5428 | { | ||
5429 | pte_t * pte; | ||
5430 | spinlock_t * ptl; | ||
5431 | - unsigned long pfn; | ||
5432 | + gctUINTPTR_T logical = memory; | ||
5433 | |||
5434 | - pgd_t * pgd = pgd_offset(current->mm, memory); | ||
5435 | - pud_t * pud = pud_offset(pgd, memory); | ||
5436 | - if (pud) | ||
5437 | + for (i = 0; i < pageCount; i++) | ||
5438 | { | ||
5439 | - pmd_t * pmd = pmd_offset(pud, memory); | ||
5440 | - pte = pte_offset_map_lock(current->mm, pmd, memory, &ptl); | ||
5441 | - if (!pte) | ||
5442 | + pgd_t * pgd = pgd_offset(current->mm, logical); | ||
5443 | + pud_t * pud = pud_offset(pgd, logical); | ||
5444 | + | ||
5445 | + if (pud) | ||
5446 | + { | ||
5447 | + pmd_t * pmd = pmd_offset(pud, logical); | ||
5448 | + pte = pte_offset_map_lock(current->mm, pmd, logical, &ptl); | ||
5449 | + if (!pte) | ||
5450 | + { | ||
5451 | + gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5452 | + } | ||
5453 | + } | ||
5454 | + else | ||
5455 | { | ||
5456 | gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5457 | } | ||
5458 | + | ||
5459 | + pages[i] = pte_page(*pte); | ||
5460 | + pte_unmap_unlock(pte, ptl); | ||
5461 | + | ||
5462 | + /* Advance to next. */ | ||
5463 | + logical += PAGE_SIZE; | ||
5464 | } | ||
5465 | - else | ||
5466 | + } | ||
5467 | + else | ||
5468 | + { | ||
5469 | + gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5470 | + } | ||
5471 | + | ||
5472 | + /* Check if this memory is contiguous for old mmu. */ | ||
5473 | + if (Os->device->kernels[Core]->hardware->mmuVersion == 0) | ||
5474 | + { | ||
5475 | + for (i = 1; i < pageCount; i++) | ||
5476 | { | ||
5477 | - gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5478 | + if (pages[i] != nth_page(pages[0], i)) | ||
5479 | + { | ||
5480 | + /* Non-contiguous. */ | ||
5481 | + break; | ||
5482 | + } | ||
5483 | } | ||
5484 | |||
5485 | - pfn = pte_pfn(*pte); | ||
5486 | - | ||
5487 | - physical = (pfn << PAGE_SHIFT) | (memory & ~PAGE_MASK); | ||
5488 | + if (i == pageCount) | ||
5489 | + { | ||
5490 | + /* Contiguous memory. */ | ||
5491 | + physical = page_to_phys(pages[0]) | (memory & ~PAGE_MASK); | ||
5492 | |||
5493 | - pte_unmap_unlock(pte, ptl); | ||
5494 | + if (!((physical - Os->device->baseAddress) & 0x80000000)) | ||
5495 | + { | ||
5496 | + kfree(pages); | ||
5497 | + pages = gcvNULL; | ||
5498 | |||
5499 | - if ((Os->device->kernels[Core]->hardware->mmuVersion == 0) | ||
5500 | - && !((physical - Os->device->baseAddress) & 0x80000000)) | ||
5501 | - { | ||
5502 | - info->pages = gcvNULL; | ||
5503 | - info->pageTable = gcvNULL; | ||
5504 | + info->pages = gcvNULL; | ||
5505 | + info->pageTable = gcvNULL; | ||
5506 | |||
5507 | - MEMORY_MAP_UNLOCK(Os); | ||
5508 | + MEMORY_MAP_UNLOCK(Os); | ||
5509 | |||
5510 | - *Address = physical - Os->device->baseAddress; | ||
5511 | - *Info = info; | ||
5512 | + *Address = physical - Os->device->baseAddress; | ||
5513 | + *Info = info; | ||
5514 | |||
5515 | - gcmkFOOTER_ARG("*Info=0x%X *Address=0x%08x", | ||
5516 | - *Info, *Address); | ||
5517 | + gcmkFOOTER_ARG("*Info=0x%X *Address=0x%08x", | ||
5518 | + *Info, *Address); | ||
5519 | |||
5520 | - return gcvSTATUS_OK; | ||
5521 | + return gcvSTATUS_OK; | ||
5522 | + } | ||
5523 | } | ||
5524 | } | ||
5525 | - else | ||
5526 | + | ||
5527 | + /* Reference pages. */ | ||
5528 | + for (i = 0; i < pageCount; i++) | ||
5529 | { | ||
5530 | - gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5531 | + get_page(pages[i]); | ||
5532 | } | ||
5533 | } | ||
5534 | } | ||
5535 | |||
5536 | - if (pages) | ||
5537 | - { | ||
5538 | - for (i = 0; i < pageCount; i++) | ||
5539 | - { | ||
5540 | - /* Flush(clean) the data cache. */ | ||
5541 | - gcmkONERROR(gckOS_CacheFlush(Os, _GetProcessID(), gcvNULL, | ||
5542 | - (gctPOINTER)(gctUINTPTR_T)page_to_phys(pages[i]), | ||
5543 | - (gctPOINTER)(memory & PAGE_MASK) + i*PAGE_SIZE, | ||
5544 | - PAGE_SIZE)); | ||
5545 | - } | ||
5546 | - } | ||
5547 | - else | ||
5548 | + for (i = 0; i < pageCount; i++) | ||
5549 | { | ||
5550 | +#ifdef CONFIG_ARM | ||
5551 | + gctUINT32 data; | ||
5552 | + get_user(data, (gctUINT32*)((memory & PAGE_MASK) + i * PAGE_SIZE)); | ||
5553 | +#endif | ||
5554 | + | ||
5555 | /* Flush(clean) the data cache. */ | ||
5556 | gcmkONERROR(gckOS_CacheFlush(Os, _GetProcessID(), gcvNULL, | ||
5557 | - (gctPOINTER)(gctUINTPTR_T)(physical & PAGE_MASK), | ||
5558 | - (gctPOINTER)(memory & PAGE_MASK), | ||
5559 | - PAGE_SIZE * pageCount)); | ||
5560 | + (gctPOINTER)(gctUINTPTR_T)page_to_phys(pages[i]), | ||
5561 | + (gctPOINTER)(memory & PAGE_MASK) + i*PAGE_SIZE, | ||
5562 | + PAGE_SIZE)); | ||
5563 | } | ||
5564 | |||
5565 | #if gcdENABLE_VG | ||
5566 | @@ -5464,20 +5603,14 @@ OnError: | ||
5567 | (gctPOINTER *) &pageTable, | ||
5568 | &address)); | ||
5569 | } | ||
5570 | + | ||
5571 | /* Fill the page table. */ | ||
5572 | for (i = 0; i < pageCount; i++) | ||
5573 | { | ||
5574 | gctUINT32 phys; | ||
5575 | gctUINT32_PTR tab = pageTable + i * (PAGE_SIZE/4096); | ||
5576 | |||
5577 | - if (pages) | ||
5578 | - { | ||
5579 | - phys = page_to_phys(pages[i]); | ||
5580 | - } | ||
5581 | - else | ||
5582 | - { | ||
5583 | - phys = (physical & PAGE_MASK) + i * PAGE_SIZE; | ||
5584 | - } | ||
5585 | + phys = page_to_phys(pages[i]); | ||
5586 | |||
5587 | #if gcdENABLE_VG | ||
5588 | if (Core == gcvCORE_VG) | ||
5589 | @@ -6126,7 +6259,7 @@ gckOS_CacheClean( | ||
5590 | #else | ||
5591 | dma_sync_single_for_device( | ||
5592 | gcvNULL, | ||
5593 | - Physical, | ||
5594 | + (dma_addr_t)Physical, | ||
5595 | Bytes, | ||
5596 | DMA_TO_DEVICE); | ||
5597 | #endif | ||
5598 | @@ -6205,7 +6338,7 @@ gckOS_CacheInvalidate( | ||
5599 | #else | ||
5600 | dma_sync_single_for_device( | ||
5601 | gcvNULL, | ||
5602 | - Physical, | ||
5603 | + (dma_addr_t)Physical, | ||
5604 | Bytes, | ||
5605 | DMA_FROM_DEVICE); | ||
5606 | #endif | ||
5607 | @@ -6279,7 +6412,7 @@ gckOS_CacheFlush( | ||
5608 | #else | ||
5609 | dma_sync_single_for_device( | ||
5610 | gcvNULL, | ||
5611 | - Physical, | ||
5612 | + (dma_addr_t)Physical, | ||
5613 | Bytes, | ||
5614 | DMA_BIDIRECTIONAL); | ||
5615 | #endif | ||
5616 | @@ -6827,6 +6960,9 @@ gckOS_SetGPUPower( | ||
5617 | struct clk *clk_2dcore = Os->device->clk_2d_core; | ||
5618 | struct clk *clk_2d_axi = Os->device->clk_2d_axi; | ||
5619 | struct clk *clk_vg_axi = Os->device->clk_vg_axi; | ||
5620 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5621 | + int ret; | ||
5622 | +#endif | ||
5623 | |||
5624 | gctBOOL oldClockState = gcvFALSE; | ||
5625 | gctBOOL oldPowerState = gcvFALSE; | ||
5626 | @@ -6852,9 +6988,13 @@ gckOS_SetGPUPower( | ||
5627 | } | ||
5628 | if((Power == gcvTRUE) && (oldPowerState == gcvFALSE)) | ||
5629 | { | ||
5630 | -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) | ||
5631 | - if(!IS_ERR(Os->device->gpu_regulator)) | ||
5632 | - regulator_enable(Os->device->gpu_regulator); | ||
5633 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5634 | + if(!IS_ERR(Os->device->gpu_regulator)) { | ||
5635 | + ret = regulator_enable(Os->device->gpu_regulator); | ||
5636 | + if (ret != 0) | ||
5637 | + gckOS_Print("%s(%d): fail to enable pu regulator %d!\n", | ||
5638 | + __FUNCTION__, __LINE__, ret); | ||
5639 | + } | ||
5640 | #else | ||
5641 | imx_gpc_power_up_pu(true); | ||
5642 | #endif | ||
5643 | @@ -6969,7 +7109,7 @@ gckOS_SetGPUPower( | ||
5644 | pm_runtime_put_sync(Os->device->pmdev); | ||
5645 | #endif | ||
5646 | |||
5647 | -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) | ||
5648 | +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5649 | if(!IS_ERR(Os->device->gpu_regulator)) | ||
5650 | regulator_disable(Os->device->gpu_regulator); | ||
5651 | #else | ||
5652 | @@ -7033,6 +7173,10 @@ gckOS_ResetGPU( | ||
5653 | } | ||
5654 | |||
5655 | gcmkFOOTER_NO(); | ||
5656 | +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | ||
5657 | + struct reset_control *rstc = Os->device->rstc[Core]; | ||
5658 | + if (rstc) | ||
5659 | + reset_control_reset(rstc); | ||
5660 | #else | ||
5661 | imx_src_reset_gpu((int)Core); | ||
5662 | #endif | ||
5663 | @@ -8529,3 +8673,338 @@ gckOS_GetProcessNameByPid( | ||
5664 | return gcvSTATUS_OK; | ||
5665 | } | ||
5666 | |||
5667 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
5668 | + | ||
5669 | +gceSTATUS | ||
5670 | +gckOS_CreateSyncPoint( | ||
5671 | + IN gckOS Os, | ||
5672 | + OUT gctSYNC_POINT * SyncPoint | ||
5673 | + ) | ||
5674 | +{ | ||
5675 | + gceSTATUS status; | ||
5676 | + gcsSYNC_POINT_PTR syncPoint; | ||
5677 | + | ||
5678 | + gcmkHEADER_ARG("Os=0x%X", Os); | ||
5679 | + | ||
5680 | + /* Verify the arguments. */ | ||
5681 | + gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5682 | + | ||
5683 | + /* Create an sync point structure. */ | ||
5684 | + syncPoint = (gcsSYNC_POINT_PTR) kmalloc( | ||
5685 | + sizeof(gcsSYNC_POINT), GFP_KERNEL | gcdNOWARN); | ||
5686 | + | ||
5687 | + if (syncPoint == gcvNULL) | ||
5688 | + { | ||
5689 | + gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); | ||
5690 | + } | ||
5691 | + | ||
5692 | + /* Initialize the sync point. */ | ||
5693 | + atomic_set(&syncPoint->ref, 1); | ||
5694 | + atomic_set(&syncPoint->state, 0); | ||
5695 | + | ||
5696 | + gcmkONERROR(_AllocateIntegerId(&Os->syncPointDB, syncPoint, &syncPoint->id)); | ||
5697 | + | ||
5698 | + *SyncPoint = (gctSYNC_POINT)(gctUINTPTR_T)syncPoint->id; | ||
5699 | + | ||
5700 | + gcmkFOOTER_ARG("*SyncPonint=%d", syncPoint->id); | ||
5701 | + return gcvSTATUS_OK; | ||
5702 | + | ||
5703 | +OnError: | ||
5704 | + if (syncPoint != gcvNULL) | ||
5705 | + { | ||
5706 | + kfree(syncPoint); | ||
5707 | + } | ||
5708 | + | ||
5709 | + gcmkFOOTER(); | ||
5710 | + return status; | ||
5711 | +} | ||
5712 | + | ||
5713 | +gceSTATUS | ||
5714 | +gckOS_ReferenceSyncPoint( | ||
5715 | + IN gckOS Os, | ||
5716 | + IN gctSYNC_POINT SyncPoint | ||
5717 | + ) | ||
5718 | +{ | ||
5719 | + gceSTATUS status; | ||
5720 | + gcsSYNC_POINT_PTR syncPoint; | ||
5721 | + | ||
5722 | + gcmkHEADER_ARG("Os=0x%X", Os); | ||
5723 | + | ||
5724 | + /* Verify the arguments. */ | ||
5725 | + gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5726 | + gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL); | ||
5727 | + | ||
5728 | + gcmkONERROR( | ||
5729 | + _QueryIntegerId(&Os->syncPointDB, | ||
5730 | + (gctUINT32)(gctUINTPTR_T)SyncPoint, | ||
5731 | + (gctPOINTER)&syncPoint)); | ||
5732 | + | ||
5733 | + /* Initialize the sync point. */ | ||
5734 | + atomic_inc(&syncPoint->ref); | ||
5735 | + | ||
5736 | + gcmkFOOTER_NO(); | ||
5737 | + return gcvSTATUS_OK; | ||
5738 | + | ||
5739 | +OnError: | ||
5740 | + gcmkFOOTER(); | ||
5741 | + return status; | ||
5742 | +} | ||
5743 | + | ||
5744 | +gceSTATUS | ||
5745 | +gckOS_DestroySyncPoint( | ||
5746 | + IN gckOS Os, | ||
5747 | + IN gctSYNC_POINT SyncPoint | ||
5748 | + ) | ||
5749 | +{ | ||
5750 | + gceSTATUS status; | ||
5751 | + gcsSYNC_POINT_PTR syncPoint; | ||
5752 | + gctBOOL acquired = gcvFALSE; | ||
5753 | + | ||
5754 | + gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5755 | + | ||
5756 | + /* Verify the arguments. */ | ||
5757 | + gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5758 | + gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL); | ||
5759 | + | ||
5760 | + gcmkONERROR(gckOS_AcquireMutex(Os, Os->syncPointMutex, gcvINFINITE)); | ||
5761 | + acquired = gcvTRUE; | ||
5762 | + | ||
5763 | + gcmkONERROR( | ||
5764 | + _QueryIntegerId(&Os->syncPointDB, | ||
5765 | + (gctUINT32)(gctUINTPTR_T)SyncPoint, | ||
5766 | + (gctPOINTER)&syncPoint)); | ||
5767 | + | ||
5768 | + gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5769 | + | ||
5770 | + if (atomic_dec_and_test(&syncPoint->ref)) | ||
5771 | + { | ||
5772 | + gcmkVERIFY_OK(_DestroyIntegerId(&Os->syncPointDB, syncPoint->id)); | ||
5773 | + | ||
5774 | + /* Free the sgianl. */ | ||
5775 | + syncPoint->timeline = gcvNULL; | ||
5776 | + kfree(syncPoint); | ||
5777 | + } | ||
5778 | + | ||
5779 | + gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex)); | ||
5780 | + acquired = gcvFALSE; | ||
5781 | + | ||
5782 | + /* Success. */ | ||
5783 | + gcmkFOOTER_NO(); | ||
5784 | + return gcvSTATUS_OK; | ||
5785 | + | ||
5786 | +OnError: | ||
5787 | + if (acquired) | ||
5788 | + { | ||
5789 | + /* Release the mutex. */ | ||
5790 | + gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex)); | ||
5791 | + } | ||
5792 | + | ||
5793 | + gcmkFOOTER(); | ||
5794 | + return status; | ||
5795 | +} | ||
5796 | + | ||
5797 | +gceSTATUS | ||
5798 | +gckOS_SignalSyncPoint( | ||
5799 | + IN gckOS Os, | ||
5800 | + IN gctSYNC_POINT SyncPoint | ||
5801 | + ) | ||
5802 | +{ | ||
5803 | + gceSTATUS status; | ||
5804 | + gcsSYNC_POINT_PTR syncPoint; | ||
5805 | + gctBOOL acquired = gcvFALSE; | ||
5806 | + | ||
5807 | + gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5808 | + | ||
5809 | + /* Verify the arguments. */ | ||
5810 | + gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5811 | + gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL); | ||
5812 | + | ||
5813 | + gcmkONERROR(gckOS_AcquireMutex(Os, Os->syncPointMutex, gcvINFINITE)); | ||
5814 | + acquired = gcvTRUE; | ||
5815 | + | ||
5816 | + gcmkONERROR( | ||
5817 | + _QueryIntegerId(&Os->syncPointDB, | ||
5818 | + (gctUINT32)(gctUINTPTR_T)SyncPoint, | ||
5819 | + (gctPOINTER)&syncPoint)); | ||
5820 | + | ||
5821 | + gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5822 | + | ||
5823 | + /* Get state. */ | ||
5824 | + atomic_set(&syncPoint->state, gcvTRUE); | ||
5825 | + | ||
5826 | + /* Signal timeline. */ | ||
5827 | + if (syncPoint->timeline) | ||
5828 | + { | ||
5829 | + sync_timeline_signal(syncPoint->timeline); | ||
5830 | + } | ||
5831 | + | ||
5832 | + gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex)); | ||
5833 | + acquired = gcvFALSE; | ||
5834 | + | ||
5835 | + /* Success. */ | ||
5836 | + gcmkFOOTER_NO(); | ||
5837 | + return gcvSTATUS_OK; | ||
5838 | + | ||
5839 | +OnError: | ||
5840 | + if (acquired) | ||
5841 | + { | ||
5842 | + /* Release the mutex. */ | ||
5843 | + gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex)); | ||
5844 | + } | ||
5845 | + | ||
5846 | + gcmkFOOTER(); | ||
5847 | + return status; | ||
5848 | +} | ||
5849 | + | ||
5850 | +gceSTATUS | ||
5851 | +gckOS_QuerySyncPoint( | ||
5852 | + IN gckOS Os, | ||
5853 | + IN gctSYNC_POINT SyncPoint, | ||
5854 | + OUT gctBOOL_PTR State | ||
5855 | + ) | ||
5856 | +{ | ||
5857 | + gceSTATUS status; | ||
5858 | + gcsSYNC_POINT_PTR syncPoint; | ||
5859 | + | ||
5860 | + gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5861 | + | ||
5862 | + /* Verify the arguments. */ | ||
5863 | + gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); | ||
5864 | + gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL); | ||
5865 | + | ||
5866 | + gcmkONERROR( | ||
5867 | + _QueryIntegerId(&Os->syncPointDB, | ||
5868 | + (gctUINT32)(gctUINTPTR_T)SyncPoint, | ||
5869 | + (gctPOINTER)&syncPoint)); | ||
5870 | + | ||
5871 | + gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint); | ||
5872 | + | ||
5873 | + /* Get state. */ | ||
5874 | + *State = atomic_read(&syncPoint->state); | ||
5875 | + | ||
5876 | + /* Success. */ | ||
5877 | + gcmkFOOTER_ARG("*State=%d", *State); | ||
5878 | + return gcvSTATUS_OK; | ||
5879 | + | ||
5880 | +OnError: | ||
5881 | + gcmkFOOTER(); | ||
5882 | + return status; | ||
5883 | +} | ||
5884 | + | ||
5885 | +gceSTATUS | ||
5886 | +gckOS_CreateSyncTimeline( | ||
5887 | + IN gckOS Os, | ||
5888 | + OUT gctHANDLE * Timeline | ||
5889 | + ) | ||
5890 | +{ | ||
5891 | + struct viv_sync_timeline * timeline; | ||
5892 | + | ||
5893 | + /* Create viv sync timeline. */ | ||
5894 | + timeline = viv_sync_timeline_create("viv timeline", Os); | ||
5895 | + | ||
5896 | + if (timeline == gcvNULL) | ||
5897 | + { | ||
5898 | + /* Out of memory. */ | ||
5899 | + return gcvSTATUS_OUT_OF_MEMORY; | ||
5900 | + } | ||
5901 | + | ||
5902 | + *Timeline = (gctHANDLE) timeline; | ||
5903 | + return gcvSTATUS_OK; | ||
5904 | +} | ||
5905 | + | ||
5906 | +gceSTATUS | ||
5907 | +gckOS_DestroySyncTimeline( | ||
5908 | + IN gckOS Os, | ||
5909 | + IN gctHANDLE Timeline | ||
5910 | + ) | ||
5911 | +{ | ||
5912 | + struct viv_sync_timeline * timeline; | ||
5913 | + gcmkASSERT(Timeline != gcvNULL); | ||
5914 | + | ||
5915 | + /* Destroy timeline. */ | ||
5916 | + timeline = (struct viv_sync_timeline *) Timeline; | ||
5917 | + sync_timeline_destroy(&timeline->obj); | ||
5918 | + | ||
5919 | + return gcvSTATUS_OK; | ||
5920 | +} | ||
5921 | + | ||
5922 | +gceSTATUS | ||
5923 | +gckOS_CreateNativeFence( | ||
5924 | + IN gckOS Os, | ||
5925 | + IN gctHANDLE Timeline, | ||
5926 | + IN gctSYNC_POINT SyncPoint, | ||
5927 | + OUT gctINT * FenceFD | ||
5928 | + ) | ||
5929 | +{ | ||
5930 | + int fd = -1; | ||
5931 | + struct viv_sync_timeline *timeline; | ||
5932 | + struct sync_pt * pt = gcvNULL; | ||
5933 | + struct sync_fence * fence; | ||
5934 | + char name[32]; | ||
5935 | + gcsSYNC_POINT_PTR syncPoint; | ||
5936 | + gceSTATUS status; | ||
5937 | + | ||
5938 | + gcmkHEADER_ARG("Os=0x%X Timeline=0x%X SyncPoint=%d", | ||
5939 | + Os, Timeline, (gctUINT)(gctUINTPTR_T)SyncPoint); | ||
5940 | + | ||
5941 | + gcmkONERROR( | ||
5942 | + _QueryIntegerId(&Os->syncPointDB, | ||
5943 | + (gctUINT32)(gctUINTPTR_T)SyncPoint, | ||
5944 | + (gctPOINTER)&syncPoint)); | ||
5945 | + | ||
5946 | + /* Cast timeline. */ | ||
5947 | + timeline = (struct viv_sync_timeline *) Timeline; | ||
5948 | + | ||
5949 | + fd = get_unused_fd(); | ||
5950 | + | ||
5951 | + if (fd < 0) | ||
5952 | + { | ||
5953 | + /* Out of resources. */ | ||
5954 | + gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES); | ||
5955 | + } | ||
5956 | + | ||
5957 | + /* Create viv_sync_pt. */ | ||
5958 | + pt = viv_sync_pt_create(timeline, SyncPoint); | ||
5959 | + | ||
5960 | + if (pt == gcvNULL) | ||
5961 | + { | ||
5962 | + gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); | ||
5963 | + } | ||
5964 | + | ||
5965 | + /* Reference sync_timeline. */ | ||
5966 | + syncPoint->timeline = &timeline->obj; | ||
5967 | + | ||
5968 | + /* Build fence name. */ | ||
5969 | + snprintf(name, 32, "viv sync_fence-%u", (gctUINT)(gctUINTPTR_T)SyncPoint); | ||
5970 | + | ||
5971 | + /* Create sync_fence. */ | ||
5972 | + fence = sync_fence_create(name, pt); | ||
5973 | + | ||
5974 | + if (fence == NULL) | ||
5975 | + { | ||
5976 | + gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); | ||
5977 | + } | ||
5978 | + | ||
5979 | + /* Install fence to fd. */ | ||
5980 | + sync_fence_install(fence, fd); | ||
5981 | + | ||
5982 | + *FenceFD = fd; | ||
5983 | + gcmkFOOTER_ARG("*FenceFD=%d", fd); | ||
5984 | + return gcvSTATUS_OK; | ||
5985 | + | ||
5986 | +OnError: | ||
5987 | + /* Error roll back. */ | ||
5988 | + if (pt) | ||
5989 | + { | ||
5990 | + sync_pt_free(pt); | ||
5991 | + } | ||
5992 | + | ||
5993 | + if (fd > 0) | ||
5994 | + { | ||
5995 | + put_unused_fd(fd); | ||
5996 | + } | ||
5997 | + | ||
5998 | + gcmkFOOTER(); | ||
5999 | + return status; | ||
6000 | +} | ||
6001 | +#endif | ||
6002 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c | ||
6003 | new file mode 100644 | ||
6004 | index 0000000..7efae1c | ||
6005 | --- /dev/null | ||
6006 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c | ||
6007 | @@ -0,0 +1,174 @@ | ||
6008 | +/**************************************************************************** | ||
6009 | +* | ||
6010 | +* Copyright (C) 2005 - 2013 by Vivante Corp. | ||
6011 | +* | ||
6012 | +* This program is free software; you can redistribute it and/or modify | ||
6013 | +* it under the terms of the GNU General Public License as published by | ||
6014 | +* the Free Software Foundation; either version 2 of the license, or | ||
6015 | +* (at your option) any later version. | ||
6016 | +* | ||
6017 | +* This program is distributed in the hope that it will be useful, | ||
6018 | +* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
6019 | +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
6020 | +* GNU General Public License for more details. | ||
6021 | +* | ||
6022 | +* You should have received a copy of the GNU General Public License | ||
6023 | +* along with this program; if not write to the Free Software | ||
6024 | +* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
6025 | +* | ||
6026 | +*****************************************************************************/ | ||
6027 | + | ||
6028 | + | ||
6029 | +#include <linux/kernel.h> | ||
6030 | +#include <linux/file.h> | ||
6031 | +#include <linux/fs.h> | ||
6032 | +#include <linux/miscdevice.h> | ||
6033 | +#include <linux/module.h> | ||
6034 | +#include <linux/syscalls.h> | ||
6035 | +#include <linux/uaccess.h> | ||
6036 | + | ||
6037 | +#include "gc_hal_kernel_sync.h" | ||
6038 | + | ||
6039 | +#if gcdANDROID_NATIVE_FENCE_SYNC | ||
6040 | + | ||
6041 | +static struct sync_pt * | ||
6042 | +viv_sync_pt_dup( | ||
6043 | + struct sync_pt * sync_pt | ||
6044 | + ) | ||
6045 | +{ | ||
6046 | + gceSTATUS status; | ||
6047 | + struct viv_sync_pt *pt; | ||
6048 | + struct viv_sync_pt *src; | ||
6049 | + struct viv_sync_timeline *obj; | ||
6050 | + | ||
6051 | + src = (struct viv_sync_pt *) sync_pt; | ||
6052 | + obj = (struct viv_sync_timeline *) sync_pt->parent; | ||
6053 | + | ||
6054 | + /* Create the new sync_pt. */ | ||
6055 | + pt = (struct viv_sync_pt *) | ||
6056 | + sync_pt_create(&obj->obj, sizeof(struct viv_sync_pt)); | ||
6057 | + | ||
6058 | + pt->stamp = src->stamp; | ||
6059 | + pt->sync = src->sync; | ||
6060 | + | ||
6061 | + /* Reference sync point. */ | ||
6062 | + status = gckOS_ReferenceSyncPoint(obj->os, pt->sync); | ||
6063 | + | ||
6064 | + if (gcmIS_ERROR(status)) | ||
6065 | + { | ||
6066 | + sync_pt_free((struct sync_pt *)pt); | ||
6067 | + return NULL; | ||
6068 | + } | ||
6069 | + | ||
6070 | + return (struct sync_pt *)pt; | ||
6071 | +} | ||
6072 | + | ||
6073 | +static int | ||
6074 | +viv_sync_pt_has_signaled( | ||
6075 | + struct sync_pt * sync_pt | ||
6076 | + ) | ||
6077 | +{ | ||
6078 | + gceSTATUS status; | ||
6079 | + gctBOOL state; | ||
6080 | + struct viv_sync_pt * pt; | ||
6081 | + struct viv_sync_timeline * obj; | ||
6082 | + | ||
6083 | + pt = (struct viv_sync_pt *)sync_pt; | ||
6084 | + obj = (struct viv_sync_timeline *)sync_pt->parent; | ||
6085 | + | ||
6086 | + status = gckOS_QuerySyncPoint(obj->os, pt->sync, &state); | ||
6087 | + | ||
6088 | + if (gcmIS_ERROR(status)) | ||
6089 | + { | ||
6090 | + /* Error. */ | ||
6091 | + return -1; | ||
6092 | + } | ||
6093 | + | ||
6094 | + return state; | ||
6095 | +} | ||
6096 | + | ||
6097 | +static int | ||
6098 | +viv_sync_pt_compare( | ||
6099 | + struct sync_pt * a, | ||
6100 | + struct sync_pt * b | ||
6101 | + ) | ||
6102 | +{ | ||
6103 | + int ret; | ||
6104 | + struct viv_sync_pt * pt1 = (struct viv_sync_pt *) a; | ||
6105 | + struct viv_sync_pt * pt2 = (struct viv_sync_pt *) b; | ||
6106 | + | ||
6107 | + ret = (pt1->stamp < pt2->stamp) ? -1 | ||
6108 | + : (pt1->stamp == pt2->stamp) ? 0 | ||
6109 | + : 1; | ||
6110 | + | ||
6111 | + return ret; | ||
6112 | +} | ||
6113 | + | ||
6114 | +static void | ||
6115 | +viv_sync_pt_free( | ||
6116 | + struct sync_pt * sync_pt | ||
6117 | + ) | ||
6118 | +{ | ||
6119 | + struct viv_sync_pt * pt; | ||
6120 | + struct viv_sync_timeline * obj; | ||
6121 | + | ||
6122 | + pt = (struct viv_sync_pt *) sync_pt; | ||
6123 | + obj = (struct viv_sync_timeline *) sync_pt->parent; | ||
6124 | + | ||
6125 | + gckOS_DestroySyncPoint(obj->os, pt->sync); | ||
6126 | +} | ||
6127 | + | ||
6128 | +static struct sync_timeline_ops viv_timeline_ops = | ||
6129 | +{ | ||
6130 | + .driver_name = "viv_sync", | ||
6131 | + .dup = viv_sync_pt_dup, | ||
6132 | + .has_signaled = viv_sync_pt_has_signaled, | ||
6133 | + .compare = viv_sync_pt_compare, | ||
6134 | + .free_pt = viv_sync_pt_free, | ||
6135 | +}; | ||
6136 | + | ||
6137 | +struct viv_sync_timeline * | ||
6138 | +viv_sync_timeline_create( | ||
6139 | + const char * name, | ||
6140 | + gckOS os | ||
6141 | + ) | ||
6142 | +{ | ||
6143 | + struct viv_sync_timeline * obj; | ||
6144 | + | ||
6145 | + obj = (struct viv_sync_timeline *) | ||
6146 | + sync_timeline_create(&viv_timeline_ops, sizeof(struct viv_sync_timeline), name); | ||
6147 | + | ||
6148 | + obj->os = os; | ||
6149 | + obj->stamp = 0; | ||
6150 | + | ||
6151 | + return obj; | ||
6152 | +} | ||
6153 | + | ||
6154 | +struct sync_pt * | ||
6155 | +viv_sync_pt_create( | ||
6156 | + struct viv_sync_timeline * obj, | ||
6157 | + gctSYNC_POINT SyncPoint | ||
6158 | + ) | ||
6159 | +{ | ||
6160 | + gceSTATUS status; | ||
6161 | + struct viv_sync_pt * pt; | ||
6162 | + | ||
6163 | + pt = (struct viv_sync_pt *) | ||
6164 | + sync_pt_create(&obj->obj, sizeof(struct viv_sync_pt)); | ||
6165 | + | ||
6166 | + pt->stamp = obj->stamp++; | ||
6167 | + pt->sync = SyncPoint; | ||
6168 | + | ||
6169 | + /* Dup signal. */ | ||
6170 | + status = gckOS_ReferenceSyncPoint(obj->os, SyncPoint); | ||
6171 | + | ||
6172 | + if (gcmIS_ERROR(status)) | ||
6173 | + { | ||
6174 | + sync_pt_free((struct sync_pt *)pt); | ||
6175 | + return NULL; | ||
6176 | + } | ||
6177 | + | ||
6178 | + return (struct sync_pt *) pt; | ||
6179 | +} | ||
6180 | + | ||
6181 | +#endif | ||
6182 | diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h | ||
6183 | new file mode 100644 | ||
6184 | index 0000000..6fc12e5 | ||
6185 | --- /dev/null | ||
6186 | +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h | ||
6187 | @@ -0,0 +1,71 @@ | ||
6188 | +/**************************************************************************** | ||
6189 | +* | ||
6190 | +* Copyright (C) 2005 - 2013 by Vivante Corp. | ||
6191 | +* | ||
6192 | +* This program is free software; you can redistribute it and/or modify | ||
6193 | +* it under the terms of the GNU General Public License as published by | ||
6194 | +* the Free Software Foundation; either version 2 of the license, or | ||
6195 | +* (at your option) any later version. | ||
6196 | +* | ||
6197 | +* This program is distributed in the hope that it will be useful, | ||
6198 | +* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
6199 | +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
6200 | +* GNU General Public License for more details. | ||
6201 | +* | ||
6202 | +* You should have received a copy of the GNU General Public License | ||
6203 | +* along with this program; if not write to the Free Software | ||
6204 | +* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
6205 | +* | ||
6206 | +*****************************************************************************/ | ||
6207 | + | ||
6208 | + | ||
6209 | +#ifndef __gc_hal_kernel_sync_h_ | ||
6210 | +#define __gc_hal_kernel_sync_h_ | ||
6211 | + | ||
6212 | +#include <linux/types.h> | ||
6213 | + | ||
6214 | +#include <linux/sync.h> | ||
6215 | + | ||
6216 | +#include <gc_hal.h> | ||
6217 | +#include <gc_hal_base.h> | ||
6218 | + | ||
6219 | +struct viv_sync_timeline | ||
6220 | +{ | ||
6221 | + /* Parent object. */ | ||
6222 | + struct sync_timeline obj; | ||
6223 | + | ||
6224 | + /* Timestamp when sync_pt is created. */ | ||
6225 | + gctUINT stamp; | ||
6226 | + | ||
6227 | + /* Pointer to os struct. */ | ||
6228 | + gckOS os; | ||
6229 | +}; | ||
6230 | + | ||
6231 | + | ||
6232 | +struct viv_sync_pt | ||
6233 | +{ | ||
6234 | + /* Parent object. */ | ||
6235 | + struct sync_pt pt; | ||
6236 | + | ||
6237 | + /* Reference sync point*/ | ||
6238 | + gctSYNC_POINT sync; | ||
6239 | + | ||
6240 | + /* Timestamp when sync_pt is created. */ | ||
6241 | + gctUINT stamp; | ||
6242 | +}; | ||
6243 | + | ||
6244 | +/* Create viv_sync_timeline object. */ | ||
6245 | +struct viv_sync_timeline * | ||
6246 | +viv_sync_timeline_create( | ||
6247 | + const char * Name, | ||
6248 | + gckOS Os | ||
6249 | + ); | ||
6250 | + | ||
6251 | +/* Create viv_sync_pt object. */ | ||
6252 | +struct sync_pt * | ||
6253 | +viv_sync_pt_create( | ||
6254 | + struct viv_sync_timeline * Obj, | ||
6255 | + gctSYNC_POINT SyncPoint | ||
6256 | + ); | ||
6257 | + | ||
6258 | +#endif /* __gc_hal_kernel_sync_h_ */ | ||
6259 | -- | ||
6260 | 1.7.9.5 | ||
6261 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/defconfig b/recipes-kernel/linux/linux-congatec-3.0.35/defconfig new file mode 100644 index 0000000..fa861ea --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/defconfig | |||
@@ -0,0 +1,2684 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux/arm 3.0.35 Kernel Configuration | ||
4 | # | ||
5 | CONFIG_ARM=y | ||
6 | CONFIG_HAVE_PWM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_HAVE_SCHED_CLOCK=y | ||
9 | CONFIG_GENERIC_GPIO=y | ||
10 | # CONFIG_ARCH_USES_GETTIMEOFFSET is not set | ||
11 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
12 | CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y | ||
13 | CONFIG_KTIME_SCALAR=y | ||
14 | CONFIG_HAVE_PROC_CPU=y | ||
15 | CONFIG_STACKTRACE_SUPPORT=y | ||
16 | CONFIG_LOCKDEP_SUPPORT=y | ||
17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
20 | CONFIG_GENERIC_LOCKBREAK=y | ||
21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
22 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
23 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
24 | CONFIG_GENERIC_HWEIGHT=y | ||
25 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
26 | CONFIG_ZONE_DMA=y | ||
27 | CONFIG_NEED_DMA_MAP_STATE=y | ||
28 | CONFIG_FIQ=y | ||
29 | CONFIG_VECTORS_BASE=0xffff0000 | ||
30 | # CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
31 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
32 | CONFIG_HAVE_IRQ_WORK=y | ||
33 | CONFIG_IRQ_WORK=y | ||
34 | |||
35 | # | ||
36 | # General setup | ||
37 | # | ||
38 | CONFIG_EXPERIMENTAL=y | ||
39 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
40 | CONFIG_CROSS_COMPILE="" | ||
41 | CONFIG_LOCALVERSION="" | ||
42 | CONFIG_LOCALVERSION_AUTO=y | ||
43 | CONFIG_HAVE_KERNEL_GZIP=y | ||
44 | CONFIG_HAVE_KERNEL_LZMA=y | ||
45 | CONFIG_HAVE_KERNEL_LZO=y | ||
46 | CONFIG_KERNEL_GZIP=y | ||
47 | # CONFIG_KERNEL_LZMA is not set | ||
48 | # CONFIG_KERNEL_LZO is not set | ||
49 | CONFIG_DEFAULT_HOSTNAME="(none)" | ||
50 | CONFIG_SWAP=y | ||
51 | CONFIG_SYSVIPC=y | ||
52 | CONFIG_SYSVIPC_SYSCTL=y | ||
53 | # CONFIG_POSIX_MQUEUE is not set | ||
54 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
55 | # CONFIG_FHANDLE is not set | ||
56 | # CONFIG_TASKSTATS is not set | ||
57 | # CONFIG_AUDIT is not set | ||
58 | CONFIG_HAVE_GENERIC_HARDIRQS=y | ||
59 | |||
60 | # | ||
61 | # IRQ subsystem | ||
62 | # | ||
63 | CONFIG_GENERIC_HARDIRQS=y | ||
64 | CONFIG_HAVE_SPARSE_IRQ=y | ||
65 | CONFIG_GENERIC_IRQ_SHOW=y | ||
66 | # CONFIG_SPARSE_IRQ is not set | ||
67 | |||
68 | # | ||
69 | # RCU Subsystem | ||
70 | # | ||
71 | CONFIG_TREE_PREEMPT_RCU=y | ||
72 | CONFIG_PREEMPT_RCU=y | ||
73 | # CONFIG_RCU_TRACE is not set | ||
74 | CONFIG_RCU_FANOUT=32 | ||
75 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
76 | # CONFIG_TREE_RCU_TRACE is not set | ||
77 | # CONFIG_RCU_BOOST is not set | ||
78 | CONFIG_IKCONFIG=y | ||
79 | CONFIG_IKCONFIG_PROC=y | ||
80 | CONFIG_LOG_BUF_SHIFT=14 | ||
81 | # CONFIG_CGROUPS is not set | ||
82 | # CONFIG_NAMESPACES is not set | ||
83 | # CONFIG_SCHED_AUTOGROUP is not set | ||
84 | # CONFIG_SYSFS_DEPRECATED is not set | ||
85 | # CONFIG_RELAY is not set | ||
86 | CONFIG_BLK_DEV_INITRD=y | ||
87 | CONFIG_INITRAMFS_SOURCE="" | ||
88 | CONFIG_RD_GZIP=y | ||
89 | # CONFIG_RD_BZIP2 is not set | ||
90 | # CONFIG_RD_LZMA is not set | ||
91 | # CONFIG_RD_XZ is not set | ||
92 | # CONFIG_RD_LZO is not set | ||
93 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
94 | CONFIG_SYSCTL=y | ||
95 | CONFIG_ANON_INODES=y | ||
96 | CONFIG_EXPERT=y | ||
97 | CONFIG_UID16=y | ||
98 | CONFIG_SYSCTL_SYSCALL=y | ||
99 | CONFIG_KALLSYMS=y | ||
100 | CONFIG_HOTPLUG=y | ||
101 | CONFIG_PRINTK=y | ||
102 | CONFIG_BUG=y | ||
103 | CONFIG_ELF_CORE=y | ||
104 | CONFIG_BASE_FULL=y | ||
105 | CONFIG_FUTEX=y | ||
106 | CONFIG_EPOLL=y | ||
107 | CONFIG_SIGNALFD=y | ||
108 | CONFIG_TIMERFD=y | ||
109 | CONFIG_EVENTFD=y | ||
110 | CONFIG_SHMEM=y | ||
111 | CONFIG_AIO=y | ||
112 | CONFIG_EMBEDDED=y | ||
113 | CONFIG_HAVE_PERF_EVENTS=y | ||
114 | CONFIG_PERF_USE_VMALLOC=y | ||
115 | |||
116 | # | ||
117 | # Kernel Performance Events And Counters | ||
118 | # | ||
119 | CONFIG_PERF_EVENTS=y | ||
120 | # CONFIG_PERF_COUNTERS is not set | ||
121 | CONFIG_VM_EVENT_COUNTERS=y | ||
122 | CONFIG_SLUB_DEBUG=y | ||
123 | CONFIG_COMPAT_BRK=y | ||
124 | # CONFIG_SLAB is not set | ||
125 | CONFIG_SLUB=y | ||
126 | # CONFIG_SLOB is not set | ||
127 | # CONFIG_PROFILING is not set | ||
128 | CONFIG_HAVE_OPROFILE=y | ||
129 | # CONFIG_KPROBES is not set | ||
130 | CONFIG_HAVE_KPROBES=y | ||
131 | CONFIG_HAVE_KRETPROBES=y | ||
132 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
133 | CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | ||
134 | CONFIG_HAVE_CLK=y | ||
135 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
136 | CONFIG_HAVE_HW_BREAKPOINT=y | ||
137 | |||
138 | # | ||
139 | # GCOV-based kernel profiling | ||
140 | # | ||
141 | # CONFIG_GCOV_KERNEL is not set | ||
142 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
143 | CONFIG_SLABINFO=y | ||
144 | CONFIG_RT_MUTEXES=y | ||
145 | CONFIG_BASE_SMALL=0 | ||
146 | CONFIG_MODULES=y | ||
147 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
148 | CONFIG_MODULE_UNLOAD=y | ||
149 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
150 | CONFIG_MODVERSIONS=y | ||
151 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
152 | CONFIG_STOP_MACHINE=y | ||
153 | CONFIG_BLOCK=y | ||
154 | CONFIG_LBDAF=y | ||
155 | # CONFIG_BLK_DEV_BSG is not set | ||
156 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
157 | |||
158 | # | ||
159 | # IO Schedulers | ||
160 | # | ||
161 | CONFIG_IOSCHED_NOOP=y | ||
162 | CONFIG_IOSCHED_DEADLINE=y | ||
163 | CONFIG_IOSCHED_CFQ=y | ||
164 | # CONFIG_DEFAULT_DEADLINE is not set | ||
165 | CONFIG_DEFAULT_CFQ=y | ||
166 | # CONFIG_DEFAULT_NOOP is not set | ||
167 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
168 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
169 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
170 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
171 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
172 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
173 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
174 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
175 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
176 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
177 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
178 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
179 | # CONFIG_INLINE_READ_LOCK is not set | ||
180 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
181 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
182 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
183 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
184 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
185 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
186 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
187 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
188 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
189 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
190 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
191 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
192 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
193 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
194 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
195 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
196 | CONFIG_MUTEX_SPIN_ON_OWNER=y | ||
197 | CONFIG_FREEZER=y | ||
198 | |||
199 | # | ||
200 | # System Type | ||
201 | # | ||
202 | CONFIG_MMU=y | ||
203 | # CONFIG_ARCH_INTEGRATOR is not set | ||
204 | # CONFIG_ARCH_REALVIEW is not set | ||
205 | # CONFIG_ARCH_VERSATILE is not set | ||
206 | # CONFIG_ARCH_VEXPRESS is not set | ||
207 | # CONFIG_ARCH_AT91 is not set | ||
208 | # CONFIG_ARCH_BCMRING is not set | ||
209 | # CONFIG_ARCH_CLPS711X is not set | ||
210 | # CONFIG_ARCH_CNS3XXX is not set | ||
211 | # CONFIG_ARCH_GEMINI is not set | ||
212 | # CONFIG_ARCH_EBSA110 is not set | ||
213 | # CONFIG_ARCH_EP93XX is not set | ||
214 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
215 | CONFIG_ARCH_MXC=y | ||
216 | # CONFIG_ARCH_MXS is not set | ||
217 | # CONFIG_ARCH_NETX is not set | ||
218 | # CONFIG_ARCH_H720X is not set | ||
219 | # CONFIG_ARCH_IOP13XX is not set | ||
220 | # CONFIG_ARCH_IOP32X is not set | ||
221 | # CONFIG_ARCH_IOP33X is not set | ||
222 | # CONFIG_ARCH_IXP23XX is not set | ||
223 | # CONFIG_ARCH_IXP2000 is not set | ||
224 | # CONFIG_ARCH_IXP4XX is not set | ||
225 | # CONFIG_ARCH_DOVE is not set | ||
226 | # CONFIG_ARCH_KIRKWOOD is not set | ||
227 | # CONFIG_ARCH_LOKI is not set | ||
228 | # CONFIG_ARCH_LPC32XX is not set | ||
229 | # CONFIG_ARCH_MV78XX0 is not set | ||
230 | # CONFIG_ARCH_ORION5X is not set | ||
231 | # CONFIG_ARCH_MMP is not set | ||
232 | # CONFIG_ARCH_KS8695 is not set | ||
233 | # CONFIG_ARCH_W90X900 is not set | ||
234 | # CONFIG_ARCH_NUC93X is not set | ||
235 | # CONFIG_ARCH_TEGRA is not set | ||
236 | # CONFIG_ARCH_PNX4008 is not set | ||
237 | # CONFIG_ARCH_PXA is not set | ||
238 | # CONFIG_ARCH_MSM is not set | ||
239 | # CONFIG_ARCH_SHMOBILE is not set | ||
240 | # CONFIG_ARCH_RPC is not set | ||
241 | # CONFIG_ARCH_SA1100 is not set | ||
242 | # CONFIG_ARCH_S3C2410 is not set | ||
243 | # CONFIG_ARCH_S3C64XX is not set | ||
244 | # CONFIG_ARCH_S5P64X0 is not set | ||
245 | # CONFIG_ARCH_S5PC100 is not set | ||
246 | # CONFIG_ARCH_S5PV210 is not set | ||
247 | # CONFIG_ARCH_EXYNOS4 is not set | ||
248 | # CONFIG_ARCH_SHARK is not set | ||
249 | # CONFIG_ARCH_TCC_926 is not set | ||
250 | # CONFIG_ARCH_U300 is not set | ||
251 | # CONFIG_ARCH_U8500 is not set | ||
252 | # CONFIG_ARCH_NOMADIK is not set | ||
253 | # CONFIG_ARCH_DAVINCI is not set | ||
254 | # CONFIG_ARCH_OMAP is not set | ||
255 | # CONFIG_PLAT_SPEAR is not set | ||
256 | # CONFIG_ARCH_VT8500 is not set | ||
257 | CONFIG_GPIO_PCA953X=y | ||
258 | # CONFIG_KEYBOARD_GPIO_POLLED is not set | ||
259 | CONFIG_IMX_HAVE_PLATFORM_DMA=y | ||
260 | CONFIG_IMX_HAVE_PLATFORM_FEC=y | ||
261 | CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y | ||
262 | CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y | ||
263 | CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y | ||
264 | CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y | ||
265 | CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y | ||
266 | CONFIG_IMX_HAVE_PLATFORM_IMX_CAAM=y | ||
267 | CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y | ||
268 | CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y | ||
269 | CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y | ||
270 | CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y | ||
271 | CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y | ||
272 | CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y | ||
273 | CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y | ||
274 | CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y | ||
275 | CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y | ||
276 | CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y | ||
277 | CONFIG_IMX_HAVE_PLATFORM_AHCI=y | ||
278 | CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y | ||
279 | CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y | ||
280 | CONFIG_IMX_HAVE_PLATFORM_LDB=y | ||
281 | CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y | ||
282 | CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y | ||
283 | CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y | ||
284 | CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y | ||
285 | CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y | ||
286 | CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y | ||
287 | CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y | ||
288 | CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y | ||
289 | CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y | ||
290 | CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y | ||
291 | CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y | ||
292 | |||
293 | # | ||
294 | # Freescale MXC Implementations | ||
295 | # | ||
296 | # CONFIG_ARCH_MX1 is not set | ||
297 | # CONFIG_ARCH_MX2 is not set | ||
298 | # CONFIG_ARCH_MX25 is not set | ||
299 | # CONFIG_ARCH_MX3 is not set | ||
300 | # CONFIG_ARCH_MX503 is not set | ||
301 | # CONFIG_ARCH_MX51 is not set | ||
302 | CONFIG_ARCH_MX6=y | ||
303 | # CONFIG_MACH_IMX_BLUETOOTH_RFKILL is not set | ||
304 | CONFIG_ARCH_MX6Q=y | ||
305 | CONFIG_FORCE_MAX_ZONEORDER=14 | ||
306 | CONFIG_SOC_IMX6Q=y | ||
307 | # CONFIG_MACH_MX6Q_ARM2 is not set | ||
308 | # CONFIG_MACH_MX6SL_ARM2 is not set | ||
309 | # CONFIG_MACH_MX6SL_EVK is not set | ||
310 | # CONFIG_MACH_MX6Q_SABRELITE is not set | ||
311 | CONFIG_MACH_MX6Q_QMX6=y | ||
312 | # CONFIG_MACH_MX6Q_SABRESD is not set | ||
313 | # CONFIG_MACH_MX6Q_SABREAUTO is not set | ||
314 | # CONFIG_MACH_MX6Q_HDMIDONGLE is not set | ||
315 | |||
316 | # | ||
317 | # MX6 Options: | ||
318 | # | ||
319 | # CONFIG_IMX_PCIE is not set | ||
320 | CONFIG_USB_EHCI_ARC_H1=y | ||
321 | CONFIG_USB_FSL_ARC_OTG=y | ||
322 | # CONFIG_MX6_INTER_LDO_BYPASS is not set | ||
323 | # CONFIG_MX6_CLK_FOR_BOOTUI_TRANS is not set | ||
324 | # CONFIG_MX6_ENET_IRQ_TO_GPIO is not set | ||
325 | CONFIG_ISP1504_MXC=y | ||
326 | # CONFIG_MXC_IRQ_PRIOR is not set | ||
327 | CONFIG_MXC_PWM=y | ||
328 | # CONFIG_MXC_DEBUG_BOARD is not set | ||
329 | # CONFIG_MXC_REBOOT_MFGMODE is not set | ||
330 | # CONFIG_MXC_REBOOT_ANDROID_CMD is not set | ||
331 | CONFIG_ARCH_MXC_IOMUX_V3=y | ||
332 | CONFIG_ARCH_MXC_AUDMUX_V2=y | ||
333 | CONFIG_IRAM_ALLOC=y | ||
334 | CONFIG_CLK_DEBUG=y | ||
335 | CONFIG_DMA_ZONE_SIZE=184 | ||
336 | |||
337 | # | ||
338 | # System MMU | ||
339 | # | ||
340 | |||
341 | # | ||
342 | # Processor Type | ||
343 | # | ||
344 | CONFIG_CPU_V7=y | ||
345 | CONFIG_CPU_32v6K=y | ||
346 | CONFIG_CPU_32v7=y | ||
347 | CONFIG_CPU_ABRT_EV7=y | ||
348 | CONFIG_CPU_PABRT_V7=y | ||
349 | CONFIG_CPU_CACHE_V7=y | ||
350 | CONFIG_CPU_CACHE_VIPT=y | ||
351 | CONFIG_CPU_COPY_V6=y | ||
352 | CONFIG_CPU_TLB_V7=y | ||
353 | CONFIG_CPU_HAS_ASID=y | ||
354 | CONFIG_CPU_CP15=y | ||
355 | CONFIG_CPU_CP15_MMU=y | ||
356 | |||
357 | # | ||
358 | # Processor Features | ||
359 | # | ||
360 | CONFIG_ARM_THUMB=y | ||
361 | # CONFIG_ARM_THUMBEE is not set | ||
362 | # CONFIG_SWP_EMULATE is not set | ||
363 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
364 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
365 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
366 | CONFIG_OUTER_CACHE=y | ||
367 | CONFIG_OUTER_CACHE_SYNC=y | ||
368 | CONFIG_CACHE_L2X0=y | ||
369 | CONFIG_CACHE_PL310=y | ||
370 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
371 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
372 | CONFIG_CPU_HAS_PMU=y | ||
373 | # CONFIG_ARM_ERRATA_430973 is not set | ||
374 | # CONFIG_ARM_ERRATA_458693 is not set | ||
375 | # CONFIG_ARM_ERRATA_460075 is not set | ||
376 | # CONFIG_ARM_ERRATA_742230 is not set | ||
377 | # CONFIG_ARM_ERRATA_742231 is not set | ||
378 | # CONFIG_PL310_ERRATA_588369 is not set | ||
379 | # CONFIG_ARM_ERRATA_720789 is not set | ||
380 | # CONFIG_PL310_ERRATA_727915 is not set | ||
381 | CONFIG_ARM_ERRATA_743622=y | ||
382 | CONFIG_ARM_ERRATA_751472=y | ||
383 | # CONFIG_ARM_ERRATA_753970 is not set | ||
384 | CONFIG_ARM_ERRATA_754322=y | ||
385 | # CONFIG_ARM_ERRATA_754327 is not set | ||
386 | CONFIG_ARM_GIC=y | ||
387 | |||
388 | # | ||
389 | # Bus support | ||
390 | # | ||
391 | CONFIG_ARM_AMBA=y | ||
392 | # CONFIG_PCI_SYSCALL is not set | ||
393 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
394 | # CONFIG_PCCARD is not set | ||
395 | CONFIG_ARM_ERRATA_764369=y | ||
396 | # CONFIG_PL310_ERRATA_769419 is not set | ||
397 | |||
398 | # | ||
399 | # Kernel Features | ||
400 | # | ||
401 | CONFIG_TICK_ONESHOT=y | ||
402 | CONFIG_NO_HZ=y | ||
403 | CONFIG_HIGH_RES_TIMERS=y | ||
404 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
405 | CONFIG_SMP=y | ||
406 | CONFIG_SMP_ON_UP=y | ||
407 | CONFIG_HAVE_ARM_SCU=y | ||
408 | CONFIG_HAVE_ARM_TWD=y | ||
409 | # CONFIG_VMSPLIT_3G is not set | ||
410 | CONFIG_VMSPLIT_2G=y | ||
411 | # CONFIG_VMSPLIT_1G is not set | ||
412 | CONFIG_PAGE_OFFSET=0x80000000 | ||
413 | CONFIG_NR_CPUS=4 | ||
414 | CONFIG_HOTPLUG_CPU=y | ||
415 | CONFIG_LOCAL_TIMERS=y | ||
416 | # CONFIG_PREEMPT_NONE is not set | ||
417 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
418 | CONFIG_PREEMPT=y | ||
419 | CONFIG_HZ=100 | ||
420 | # CONFIG_THUMB2_KERNEL is not set | ||
421 | CONFIG_AEABI=y | ||
422 | # CONFIG_OABI_COMPAT is not set | ||
423 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
424 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
425 | CONFIG_HAVE_ARCH_PFN_VALID=y | ||
426 | CONFIG_HIGHMEM=y | ||
427 | # CONFIG_HIGHPTE is not set | ||
428 | CONFIG_HW_PERF_EVENTS=y | ||
429 | CONFIG_SELECT_MEMORY_MODEL=y | ||
430 | CONFIG_FLATMEM_MANUAL=y | ||
431 | CONFIG_FLATMEM=y | ||
432 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
433 | CONFIG_HAVE_MEMBLOCK=y | ||
434 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
435 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
436 | CONFIG_COMPACTION=y | ||
437 | CONFIG_MIGRATION=y | ||
438 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
439 | CONFIG_ZONE_DMA_FLAG=1 | ||
440 | CONFIG_BOUNCE=y | ||
441 | CONFIG_VIRT_TO_BUS=y | ||
442 | CONFIG_KSM=y | ||
443 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
444 | # CONFIG_CLEANCACHE is not set | ||
445 | CONFIG_ALIGNMENT_TRAP=y | ||
446 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
447 | # CONFIG_SECCOMP is not set | ||
448 | # CONFIG_CC_STACKPROTECTOR is not set | ||
449 | # CONFIG_DEPRECATED_PARAM_STRUCT is not set | ||
450 | |||
451 | # | ||
452 | # Boot options | ||
453 | # | ||
454 | # CONFIG_USE_OF is not set | ||
455 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
456 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
457 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" | ||
458 | CONFIG_CMDLINE_FROM_BOOTLOADER=y | ||
459 | # CONFIG_CMDLINE_EXTEND is not set | ||
460 | # CONFIG_CMDLINE_FORCE is not set | ||
461 | # CONFIG_XIP_KERNEL is not set | ||
462 | # CONFIG_KEXEC is not set | ||
463 | # CONFIG_CRASH_DUMP is not set | ||
464 | # CONFIG_AUTO_ZRELADDR is not set | ||
465 | |||
466 | # | ||
467 | # CPU Power Management | ||
468 | # | ||
469 | |||
470 | # | ||
471 | # CPU Frequency scaling | ||
472 | # | ||
473 | CONFIG_CPU_FREQ=y | ||
474 | CONFIG_CPU_FREQ_TABLE=y | ||
475 | CONFIG_CPU_FREQ_STAT=y | ||
476 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
477 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
478 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
479 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
480 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
481 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
482 | CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y | ||
483 | # CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set | ||
484 | CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
485 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
486 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
487 | CONFIG_CPU_FREQ_GOV_INTERACTIVE=y | ||
488 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | ||
489 | CONFIG_CPU_FREQ_IMX=y | ||
490 | # CONFIG_CPU_IDLE is not set | ||
491 | |||
492 | # | ||
493 | # Floating point emulation | ||
494 | # | ||
495 | |||
496 | # | ||
497 | # At least one emulation must be selected | ||
498 | # | ||
499 | CONFIG_VFP=y | ||
500 | CONFIG_VFPv3=y | ||
501 | CONFIG_NEON=y | ||
502 | |||
503 | # | ||
504 | # Userspace binary formats | ||
505 | # | ||
506 | CONFIG_BINFMT_ELF=y | ||
507 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
508 | CONFIG_HAVE_AOUT=y | ||
509 | # CONFIG_BINFMT_AOUT is not set | ||
510 | # CONFIG_BINFMT_MISC is not set | ||
511 | |||
512 | # | ||
513 | # Power management options | ||
514 | # | ||
515 | CONFIG_SUSPEND=y | ||
516 | # CONFIG_PM_TEST_SUSPEND is not set | ||
517 | CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y | ||
518 | CONFIG_SUSPEND_FREEZER=y | ||
519 | CONFIG_PM_SLEEP=y | ||
520 | CONFIG_PM_SLEEP_SMP=y | ||
521 | CONFIG_PM_RUNTIME=y | ||
522 | CONFIG_PM=y | ||
523 | CONFIG_PM_DEBUG=y | ||
524 | # CONFIG_PM_ADVANCED_DEBUG is not set | ||
525 | CONFIG_CAN_PM_TRACE=y | ||
526 | CONFIG_APM_EMULATION=y | ||
527 | CONFIG_PM_RUNTIME_CLK=y | ||
528 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
529 | CONFIG_NET=y | ||
530 | |||
531 | # | ||
532 | # Networking options | ||
533 | # | ||
534 | CONFIG_PACKET=y | ||
535 | CONFIG_UNIX=y | ||
536 | CONFIG_XFRM=y | ||
537 | # CONFIG_XFRM_USER is not set | ||
538 | # CONFIG_XFRM_SUB_POLICY is not set | ||
539 | # CONFIG_XFRM_MIGRATE is not set | ||
540 | # CONFIG_XFRM_STATISTICS is not set | ||
541 | # CONFIG_NET_KEY is not set | ||
542 | CONFIG_INET=y | ||
543 | CONFIG_IP_MULTICAST=y | ||
544 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
545 | CONFIG_IP_PNP=y | ||
546 | CONFIG_IP_PNP_DHCP=y | ||
547 | CONFIG_IP_PNP_BOOTP=y | ||
548 | # CONFIG_IP_PNP_RARP is not set | ||
549 | # CONFIG_NET_IPIP is not set | ||
550 | # CONFIG_NET_IPGRE_DEMUX is not set | ||
551 | # CONFIG_IP_MROUTE is not set | ||
552 | # CONFIG_ARPD is not set | ||
553 | # CONFIG_SYN_COOKIES is not set | ||
554 | # CONFIG_INET_AH is not set | ||
555 | # CONFIG_INET_ESP is not set | ||
556 | # CONFIG_INET_IPCOMP is not set | ||
557 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
558 | # CONFIG_INET_TUNNEL is not set | ||
559 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
560 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
561 | CONFIG_INET_XFRM_MODE_BEET=y | ||
562 | # CONFIG_INET_LRO is not set | ||
563 | CONFIG_INET_DIAG=y | ||
564 | CONFIG_INET_TCP_DIAG=y | ||
565 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
566 | CONFIG_TCP_CONG_CUBIC=y | ||
567 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
568 | # CONFIG_TCP_MD5SIG is not set | ||
569 | # CONFIG_IPV6 is not set | ||
570 | # CONFIG_NETWORK_SECMARK is not set | ||
571 | # CONFIG_NETWORK_PHY_TIMESTAMPING is not set | ||
572 | # CONFIG_NETFILTER is not set | ||
573 | # CONFIG_IP_DCCP is not set | ||
574 | # CONFIG_IP_SCTP is not set | ||
575 | # CONFIG_RDS is not set | ||
576 | # CONFIG_TIPC is not set | ||
577 | # CONFIG_ATM is not set | ||
578 | # CONFIG_L2TP is not set | ||
579 | # CONFIG_BRIDGE is not set | ||
580 | # CONFIG_NET_DSA is not set | ||
581 | # CONFIG_VLAN_8021Q is not set | ||
582 | # CONFIG_DECNET is not set | ||
583 | # CONFIG_LLC2 is not set | ||
584 | # CONFIG_IPX is not set | ||
585 | # CONFIG_ATALK is not set | ||
586 | # CONFIG_X25 is not set | ||
587 | # CONFIG_LAPB is not set | ||
588 | # CONFIG_ECONET is not set | ||
589 | # CONFIG_WAN_ROUTER is not set | ||
590 | # CONFIG_PHONET is not set | ||
591 | # CONFIG_IEEE802154 is not set | ||
592 | # CONFIG_NET_SCHED is not set | ||
593 | # CONFIG_DCB is not set | ||
594 | # CONFIG_BATMAN_ADV is not set | ||
595 | CONFIG_RPS=y | ||
596 | CONFIG_RFS_ACCEL=y | ||
597 | CONFIG_XPS=y | ||
598 | |||
599 | # | ||
600 | # Network testing | ||
601 | # | ||
602 | # CONFIG_NET_PKTGEN is not set | ||
603 | # CONFIG_HAMRADIO is not set | ||
604 | CONFIG_CAN=y | ||
605 | CONFIG_CAN_RAW=y | ||
606 | CONFIG_CAN_BCM=y | ||
607 | |||
608 | # | ||
609 | # CAN Device Drivers | ||
610 | # | ||
611 | CONFIG_CAN_VCAN=y | ||
612 | # CONFIG_CAN_SLCAN is not set | ||
613 | CONFIG_CAN_DEV=y | ||
614 | CONFIG_CAN_CALC_BITTIMING=y | ||
615 | # CONFIG_CAN_MCP251X is not set | ||
616 | CONFIG_HAVE_CAN_FLEXCAN=y | ||
617 | CONFIG_CAN_FLEXCAN=y | ||
618 | # CONFIG_CAN_SJA1000 is not set | ||
619 | # CONFIG_CAN_C_CAN is not set | ||
620 | |||
621 | # | ||
622 | # CAN USB interfaces | ||
623 | # | ||
624 | # CONFIG_CAN_EMS_USB is not set | ||
625 | # CONFIG_CAN_ESD_USB2 is not set | ||
626 | # CONFIG_CAN_SOFTING is not set | ||
627 | # CONFIG_CAN_DEBUG_DEVICES is not set | ||
628 | # CONFIG_IRDA is not set | ||
629 | CONFIG_BT=y | ||
630 | CONFIG_BT_L2CAP=y | ||
631 | CONFIG_BT_SCO=y | ||
632 | CONFIG_BT_RFCOMM=y | ||
633 | CONFIG_BT_RFCOMM_TTY=y | ||
634 | CONFIG_BT_BNEP=y | ||
635 | CONFIG_BT_BNEP_MC_FILTER=y | ||
636 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
637 | CONFIG_BT_HIDP=y | ||
638 | |||
639 | # | ||
640 | # Bluetooth device drivers | ||
641 | # | ||
642 | CONFIG_BT_HCIBTUSB=y | ||
643 | # CONFIG_BT_HCIBTSDIO is not set | ||
644 | CONFIG_BT_HCIUART=y | ||
645 | # CONFIG_BT_HCIUART_H4 is not set | ||
646 | # CONFIG_BT_HCIUART_BCSP is not set | ||
647 | CONFIG_BT_HCIUART_ATH3K=y | ||
648 | # CONFIG_BT_HCIUART_LL is not set | ||
649 | # CONFIG_BT_HCIBCM203X is not set | ||
650 | # CONFIG_BT_HCIBPA10X is not set | ||
651 | # CONFIG_BT_HCIBFUSB is not set | ||
652 | CONFIG_BT_HCIVHCI=y | ||
653 | # CONFIG_BT_MRVL is not set | ||
654 | # CONFIG_BT_ATH3K is not set | ||
655 | # CONFIG_AF_RXRPC is not set | ||
656 | CONFIG_WIRELESS=y | ||
657 | CONFIG_WIRELESS_EXT=y | ||
658 | CONFIG_WEXT_CORE=y | ||
659 | CONFIG_WEXT_PROC=y | ||
660 | CONFIG_WEXT_SPY=y | ||
661 | CONFIG_WEXT_PRIV=y | ||
662 | CONFIG_CFG80211=y | ||
663 | # CONFIG_NL80211_TESTMODE is not set | ||
664 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
665 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
666 | CONFIG_CFG80211_DEFAULT_PS=y | ||
667 | # CONFIG_CFG80211_DEBUGFS is not set | ||
668 | # CONFIG_CFG80211_INTERNAL_REGDB is not set | ||
669 | CONFIG_CFG80211_WEXT=y | ||
670 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
671 | CONFIG_LIB80211=y | ||
672 | CONFIG_LIB80211_CRYPT_WEP=y | ||
673 | CONFIG_LIB80211_CRYPT_CCMP=y | ||
674 | CONFIG_LIB80211_CRYPT_TKIP=y | ||
675 | # CONFIG_LIB80211_DEBUG is not set | ||
676 | # CONFIG_MAC80211 is not set | ||
677 | # CONFIG_WIMAX is not set | ||
678 | CONFIG_RFKILL=y | ||
679 | CONFIG_RFKILL_INPUT=y | ||
680 | # CONFIG_RFKILL_REGULATOR is not set | ||
681 | # CONFIG_RFKILL_GPIO is not set | ||
682 | # CONFIG_NET_9P is not set | ||
683 | # CONFIG_CAIF is not set | ||
684 | # CONFIG_CEPH_LIB is not set | ||
685 | |||
686 | # | ||
687 | # Device Drivers | ||
688 | # | ||
689 | |||
690 | # | ||
691 | # Generic Driver Options | ||
692 | # | ||
693 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
694 | CONFIG_DEVTMPFS=y | ||
695 | CONFIG_DEVTMPFS_MOUNT=y | ||
696 | CONFIG_STANDALONE=y | ||
697 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
698 | CONFIG_FW_LOADER=y | ||
699 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
700 | CONFIG_EXTRA_FIRMWARE="" | ||
701 | # CONFIG_SYS_HYPERVISOR is not set | ||
702 | CONFIG_CONNECTOR=y | ||
703 | CONFIG_PROC_EVENTS=y | ||
704 | CONFIG_MTD=y | ||
705 | # CONFIG_MTD_DEBUG is not set | ||
706 | # CONFIG_MTD_TESTS is not set | ||
707 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
708 | CONFIG_MTD_CMDLINE_PARTS=y | ||
709 | # CONFIG_MTD_AFS_PARTS is not set | ||
710 | # CONFIG_MTD_AR7_PARTS is not set | ||
711 | |||
712 | # | ||
713 | # User Modules And Translation Layers | ||
714 | # | ||
715 | CONFIG_MTD_CHAR=y | ||
716 | CONFIG_MTD_BLKDEVS=y | ||
717 | CONFIG_MTD_BLOCK=y | ||
718 | # CONFIG_FTL is not set | ||
719 | # CONFIG_NFTL is not set | ||
720 | # CONFIG_INFTL is not set | ||
721 | # CONFIG_RFD_FTL is not set | ||
722 | # CONFIG_SSFDC is not set | ||
723 | # CONFIG_SM_FTL is not set | ||
724 | # CONFIG_MTD_OOPS is not set | ||
725 | # CONFIG_MTD_SWAP is not set | ||
726 | |||
727 | # | ||
728 | # RAM/ROM/Flash chip drivers | ||
729 | # | ||
730 | # CONFIG_MTD_CFI is not set | ||
731 | # CONFIG_MTD_JEDECPROBE is not set | ||
732 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
733 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
734 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
735 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
736 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
737 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
738 | CONFIG_MTD_CFI_I1=y | ||
739 | CONFIG_MTD_CFI_I2=y | ||
740 | # CONFIG_MTD_CFI_I4 is not set | ||
741 | # CONFIG_MTD_CFI_I8 is not set | ||
742 | # CONFIG_MTD_RAM is not set | ||
743 | # CONFIG_MTD_ROM is not set | ||
744 | # CONFIG_MTD_ABSENT is not set | ||
745 | |||
746 | # | ||
747 | # Mapping drivers for chip access | ||
748 | # | ||
749 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
750 | # CONFIG_MTD_PLATRAM is not set | ||
751 | |||
752 | # | ||
753 | # Self-contained MTD device drivers | ||
754 | # | ||
755 | # CONFIG_MTD_DATAFLASH is not set | ||
756 | CONFIG_MTD_M25P80=y | ||
757 | CONFIG_M25PXX_USE_FAST_READ=y | ||
758 | # CONFIG_MTD_SST25L is not set | ||
759 | # CONFIG_MTD_SLRAM is not set | ||
760 | # CONFIG_MTD_PHRAM is not set | ||
761 | # CONFIG_MTD_MTDRAM is not set | ||
762 | # CONFIG_MTD_BLOCK2MTD is not set | ||
763 | |||
764 | # | ||
765 | # Disk-On-Chip Device Drivers | ||
766 | # | ||
767 | # CONFIG_MTD_DOC2000 is not set | ||
768 | # CONFIG_MTD_DOC2001 is not set | ||
769 | # CONFIG_MTD_DOC2001PLUS is not set | ||
770 | CONFIG_MTD_NAND_ECC=y | ||
771 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
772 | CONFIG_MTD_NAND=y | ||
773 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
774 | # CONFIG_MTD_NAND_ECC_BCH is not set | ||
775 | # CONFIG_MTD_SM_COMMON is not set | ||
776 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
777 | # CONFIG_MTD_NAND_GPIO is not set | ||
778 | CONFIG_MTD_NAND_IDS=y | ||
779 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
780 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
781 | # CONFIG_MTD_NAND_GPMI_NAND is not set | ||
782 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
783 | # CONFIG_MTD_ALAUDA is not set | ||
784 | # CONFIG_MTD_ONENAND is not set | ||
785 | |||
786 | # | ||
787 | # LPDDR flash memory drivers | ||
788 | # | ||
789 | # CONFIG_MTD_LPDDR is not set | ||
790 | CONFIG_MTD_UBI=y | ||
791 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
792 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
793 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
794 | # CONFIG_MTD_UBI_DEBUG is not set | ||
795 | # CONFIG_PARPORT is not set | ||
796 | CONFIG_BLK_DEV=y | ||
797 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
798 | CONFIG_BLK_DEV_LOOP=y | ||
799 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
800 | # CONFIG_BLK_DEV_DRBD is not set | ||
801 | # CONFIG_BLK_DEV_NBD is not set | ||
802 | # CONFIG_BLK_DEV_UB is not set | ||
803 | CONFIG_BLK_DEV_RAM=y | ||
804 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
805 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
806 | # CONFIG_BLK_DEV_XIP is not set | ||
807 | # CONFIG_CDROM_PKTCDVD is not set | ||
808 | # CONFIG_ATA_OVER_ETH is not set | ||
809 | # CONFIG_MG_DISK is not set | ||
810 | # CONFIG_BLK_DEV_RBD is not set | ||
811 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
812 | CONFIG_MISC_DEVICES=y | ||
813 | # CONFIG_AD525X_DPOT is not set | ||
814 | # CONFIG_INTEL_MID_PTI is not set | ||
815 | # CONFIG_ICS932S401 is not set | ||
816 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
817 | # CONFIG_APDS9802ALS is not set | ||
818 | # CONFIG_ISL29003 is not set | ||
819 | # CONFIG_ISL29020 is not set | ||
820 | # CONFIG_SENSORS_TSL2550 is not set | ||
821 | # CONFIG_SENSORS_BH1780 is not set | ||
822 | # CONFIG_SENSORS_BH1770 is not set | ||
823 | # CONFIG_SENSORS_APDS990X is not set | ||
824 | # CONFIG_HMC6352 is not set | ||
825 | # CONFIG_DS1682 is not set | ||
826 | # CONFIG_TI_DAC7512 is not set | ||
827 | # CONFIG_BMP085 is not set | ||
828 | CONFIG_MXS_PERFMON=m | ||
829 | # CONFIG_C2PORT is not set | ||
830 | |||
831 | # | ||
832 | # EEPROM support | ||
833 | # | ||
834 | # CONFIG_EEPROM_AT24 is not set | ||
835 | # CONFIG_EEPROM_AT25 is not set | ||
836 | # CONFIG_EEPROM_LEGACY is not set | ||
837 | # CONFIG_EEPROM_MAX6875 is not set | ||
838 | # CONFIG_EEPROM_93CX6 is not set | ||
839 | # CONFIG_IWMC3200TOP is not set | ||
840 | |||
841 | # | ||
842 | # Texas Instruments shared transport line discipline | ||
843 | # | ||
844 | # CONFIG_TI_ST is not set | ||
845 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
846 | # CONFIG_SENSORS_LIS3_I2C is not set | ||
847 | CONFIG_HAVE_IDE=y | ||
848 | # CONFIG_IDE is not set | ||
849 | |||
850 | # | ||
851 | # SCSI device support | ||
852 | # | ||
853 | CONFIG_SCSI_MOD=y | ||
854 | # CONFIG_RAID_ATTRS is not set | ||
855 | CONFIG_SCSI=y | ||
856 | CONFIG_SCSI_DMA=y | ||
857 | # CONFIG_SCSI_TGT is not set | ||
858 | # CONFIG_SCSI_NETLINK is not set | ||
859 | CONFIG_SCSI_PROC_FS=y | ||
860 | |||
861 | # | ||
862 | # SCSI support type (disk, tape, CD-ROM) | ||
863 | # | ||
864 | CONFIG_BLK_DEV_SD=y | ||
865 | # CONFIG_CHR_DEV_ST is not set | ||
866 | # CONFIG_CHR_DEV_OSST is not set | ||
867 | # CONFIG_BLK_DEV_SR is not set | ||
868 | # CONFIG_CHR_DEV_SG is not set | ||
869 | # CONFIG_CHR_DEV_SCH is not set | ||
870 | CONFIG_SCSI_MULTI_LUN=y | ||
871 | # CONFIG_SCSI_CONSTANTS is not set | ||
872 | # CONFIG_SCSI_LOGGING is not set | ||
873 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
874 | CONFIG_SCSI_WAIT_SCAN=m | ||
875 | |||
876 | # | ||
877 | # SCSI Transports | ||
878 | # | ||
879 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
880 | # CONFIG_SCSI_FC_ATTRS is not set | ||
881 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
882 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
883 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
884 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
885 | CONFIG_SCSI_LOWLEVEL=y | ||
886 | # CONFIG_ISCSI_TCP is not set | ||
887 | # CONFIG_ISCSI_BOOT_SYSFS is not set | ||
888 | # CONFIG_LIBFC is not set | ||
889 | # CONFIG_LIBFCOE is not set | ||
890 | # CONFIG_SCSI_DEBUG is not set | ||
891 | # CONFIG_SCSI_DH is not set | ||
892 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
893 | CONFIG_ATA=y | ||
894 | # CONFIG_ATA_NONSTANDARD is not set | ||
895 | CONFIG_ATA_VERBOSE_ERROR=y | ||
896 | # CONFIG_SATA_PMP is not set | ||
897 | |||
898 | # | ||
899 | # Controllers with non-SFF native interface | ||
900 | # | ||
901 | CONFIG_SATA_AHCI_PLATFORM=y | ||
902 | CONFIG_ATA_SFF=y | ||
903 | |||
904 | # | ||
905 | # SFF controllers with custom DMA interface | ||
906 | # | ||
907 | CONFIG_ATA_BMDMA=y | ||
908 | |||
909 | # | ||
910 | # SATA SFF controllers with BMDMA | ||
911 | # | ||
912 | # CONFIG_SATA_MV is not set | ||
913 | |||
914 | # | ||
915 | # PATA SFF controllers with BMDMA | ||
916 | # | ||
917 | # CONFIG_PATA_ARASAN_CF is not set | ||
918 | |||
919 | # | ||
920 | # PIO-only SFF controllers | ||
921 | # | ||
922 | # CONFIG_PATA_PLATFORM is not set | ||
923 | |||
924 | # | ||
925 | # Generic fallback / legacy drivers | ||
926 | # | ||
927 | # CONFIG_MD is not set | ||
928 | # CONFIG_TARGET_CORE is not set | ||
929 | CONFIG_NETDEVICES=y | ||
930 | # CONFIG_DUMMY is not set | ||
931 | # CONFIG_BONDING is not set | ||
932 | # CONFIG_MACVLAN is not set | ||
933 | # CONFIG_EQUALIZER is not set | ||
934 | # CONFIG_TUN is not set | ||
935 | # CONFIG_VETH is not set | ||
936 | CONFIG_MII=y | ||
937 | CONFIG_PHYLIB=y | ||
938 | |||
939 | # | ||
940 | # MII PHY device drivers | ||
941 | # | ||
942 | # CONFIG_MARVELL_PHY is not set | ||
943 | # CONFIG_DAVICOM_PHY is not set | ||
944 | # CONFIG_QSEMI_PHY is not set | ||
945 | # CONFIG_LXT_PHY is not set | ||
946 | # CONFIG_CICADA_PHY is not set | ||
947 | # CONFIG_VITESSE_PHY is not set | ||
948 | # CONFIG_SMSC_PHY is not set | ||
949 | # CONFIG_BROADCOM_PHY is not set | ||
950 | # CONFIG_ICPLUS_PHY is not set | ||
951 | # CONFIG_REALTEK_PHY is not set | ||
952 | # CONFIG_NATIONAL_PHY is not set | ||
953 | # CONFIG_STE10XP is not set | ||
954 | # CONFIG_LSI_ET1011C_PHY is not set | ||
955 | CONFIG_MICREL_PHY=y | ||
956 | # CONFIG_FIXED_PHY is not set | ||
957 | # CONFIG_MDIO_BITBANG is not set | ||
958 | CONFIG_NET_ETHERNET=y | ||
959 | # CONFIG_AX88796 is not set | ||
960 | # CONFIG_SMC91X is not set | ||
961 | # CONFIG_DM9000 is not set | ||
962 | # CONFIG_ENC28J60 is not set | ||
963 | # CONFIG_ETHOC is not set | ||
964 | # CONFIG_SMC911X is not set | ||
965 | CONFIG_SMSC911X=y | ||
966 | # CONFIG_SMSC911X_ARCH_HOOKS is not set | ||
967 | # CONFIG_DNET is not set | ||
968 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
969 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
970 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
971 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
972 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
973 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
974 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
975 | # CONFIG_B44 is not set | ||
976 | # CONFIG_KS8842 is not set | ||
977 | # CONFIG_KS8851 is not set | ||
978 | # CONFIG_KS8851_MLL is not set | ||
979 | CONFIG_FEC=y | ||
980 | # CONFIG_FEC_NAPI is not set | ||
981 | # CONFIG_FEC_1588 is not set | ||
982 | # CONFIG_FTMAC100 is not set | ||
983 | # CONFIG_NETDEV_1000 is not set | ||
984 | # CONFIG_NETDEV_10000 is not set | ||
985 | CONFIG_WLAN=y | ||
986 | # CONFIG_USB_ZD1201 is not set | ||
987 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
988 | CONFIG_ATH_COMMON=m | ||
989 | # CONFIG_ATH_DEBUG is not set | ||
990 | CONFIG_ATH6KL=m | ||
991 | # CONFIG_ATH6KL_DEBUG is not set | ||
992 | CONFIG_HOSTAP=y | ||
993 | # CONFIG_HOSTAP_FIRMWARE is not set | ||
994 | # CONFIG_IWM is not set | ||
995 | # CONFIG_LIBERTAS is not set | ||
996 | # CONFIG_MWIFIEX is not set | ||
997 | |||
998 | # | ||
999 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
1000 | # | ||
1001 | |||
1002 | # | ||
1003 | # USB Network Adapters | ||
1004 | # | ||
1005 | # CONFIG_USB_CATC is not set | ||
1006 | # CONFIG_USB_KAWETH is not set | ||
1007 | # CONFIG_USB_PEGASUS is not set | ||
1008 | # CONFIG_USB_RTL8150 is not set | ||
1009 | # CONFIG_USB_USBNET is not set | ||
1010 | # CONFIG_USB_HSO is not set | ||
1011 | # CONFIG_USB_IPHETH is not set | ||
1012 | # CONFIG_WAN is not set | ||
1013 | |||
1014 | # | ||
1015 | # CAIF transport drivers | ||
1016 | # | ||
1017 | # CONFIG_PPP is not set | ||
1018 | # CONFIG_SLIP is not set | ||
1019 | # CONFIG_NETCONSOLE is not set | ||
1020 | # CONFIG_NETPOLL is not set | ||
1021 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
1022 | # CONFIG_ISDN is not set | ||
1023 | # CONFIG_PHONE is not set | ||
1024 | |||
1025 | # | ||
1026 | # Input device support | ||
1027 | # | ||
1028 | CONFIG_INPUT=y | ||
1029 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
1030 | CONFIG_INPUT_POLLDEV=y | ||
1031 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
1032 | |||
1033 | # | ||
1034 | # Userland interfaces | ||
1035 | # | ||
1036 | CONFIG_INPUT_MOUSEDEV=y | ||
1037 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
1038 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
1039 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
1040 | # CONFIG_INPUT_JOYDEV is not set | ||
1041 | CONFIG_INPUT_EVDEV=y | ||
1042 | # CONFIG_INPUT_EVBUG is not set | ||
1043 | # CONFIG_INPUT_APMPOWER is not set | ||
1044 | |||
1045 | # | ||
1046 | # Input Device Drivers | ||
1047 | # | ||
1048 | CONFIG_INPUT_KEYBOARD=y | ||
1049 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
1050 | # CONFIG_KEYBOARD_ADP5589 is not set | ||
1051 | CONFIG_KEYBOARD_ATKBD=y | ||
1052 | # CONFIG_KEYBOARD_QT1070 is not set | ||
1053 | # CONFIG_KEYBOARD_QT2160 is not set | ||
1054 | # CONFIG_KEYBOARD_LKKBD is not set | ||
1055 | CONFIG_KEYBOARD_GPIO=y | ||
1056 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
1057 | # CONFIG_KEYBOARD_MATRIX is not set | ||
1058 | # CONFIG_KEYBOARD_LM8323 is not set | ||
1059 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
1060 | # CONFIG_KEYBOARD_MCS is not set | ||
1061 | # CONFIG_KEYBOARD_MPR121 is not set | ||
1062 | # CONFIG_KEYBOARD_IMX is not set | ||
1063 | # CONFIG_KEYBOARD_NEWTON is not set | ||
1064 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
1065 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
1066 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
1067 | # CONFIG_KEYBOARD_XTKBD is not set | ||
1068 | # CONFIG_INPUT_MOUSE is not set | ||
1069 | # CONFIG_INPUT_JOYSTICK is not set | ||
1070 | # CONFIG_INPUT_TABLET is not set | ||
1071 | CONFIG_INPUT_TOUCHSCREEN=y | ||
1072 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
1073 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
1074 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
1075 | # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set | ||
1076 | # CONFIG_TOUCHSCREEN_BU21013 is not set | ||
1077 | # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set | ||
1078 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
1079 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
1080 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
1081 | CONFIG_TOUCHSCREEN_EGALAX=y | ||
1082 | # CONFIG_TOUCHSCREEN_ELAN is not set | ||
1083 | # CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH is not set | ||
1084 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
1085 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
1086 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
1087 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
1088 | # CONFIG_TOUCHSCREEN_MAX11801 is not set | ||
1089 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
1090 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
1091 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
1092 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
1093 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
1094 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
1095 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
1096 | # CONFIG_TOUCHSCREEN_WM97XX is not set | ||
1097 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
1098 | # CONFIG_TOUCHSCREEN_NOVATEK is not set | ||
1099 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
1100 | # CONFIG_TOUCHSCREEN_TSC2005 is not set | ||
1101 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
1102 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
1103 | # CONFIG_TOUCHSCREEN_ST1232 is not set | ||
1104 | # CONFIG_TOUCHSCREEN_P1003 is not set | ||
1105 | # CONFIG_TOUCHSCREEN_TPS6507X is not set | ||
1106 | CONFIG_INPUT_MISC=y | ||
1107 | # CONFIG_INPUT_AD714X is not set | ||
1108 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
1109 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
1110 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
1111 | # CONFIG_INPUT_POWERMATE is not set | ||
1112 | # CONFIG_INPUT_YEALINK is not set | ||
1113 | # CONFIG_INPUT_CM109 is not set | ||
1114 | CONFIG_INPUT_UINPUT=y | ||
1115 | # CONFIG_INPUT_PCF8574 is not set | ||
1116 | # CONFIG_INPUT_PWM_BEEPER is not set | ||
1117 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
1118 | # CONFIG_INPUT_ADXL34X is not set | ||
1119 | # CONFIG_INPUT_CMA3000 is not set | ||
1120 | CONFIG_INPUT_ISL29023=y | ||
1121 | |||
1122 | # | ||
1123 | # Hardware I/O ports | ||
1124 | # | ||
1125 | CONFIG_SERIO=y | ||
1126 | CONFIG_SERIO_SERPORT=y | ||
1127 | # CONFIG_SERIO_AMBAKMI is not set | ||
1128 | CONFIG_SERIO_LIBPS2=y | ||
1129 | # CONFIG_SERIO_RAW is not set | ||
1130 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
1131 | # CONFIG_SERIO_PS2MULT is not set | ||
1132 | # CONFIG_GAMEPORT is not set | ||
1133 | |||
1134 | # | ||
1135 | # Character devices | ||
1136 | # | ||
1137 | CONFIG_VT=y | ||
1138 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
1139 | CONFIG_VT_CONSOLE=y | ||
1140 | CONFIG_HW_CONSOLE=y | ||
1141 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
1142 | CONFIG_UNIX98_PTYS=y | ||
1143 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
1144 | CONFIG_LEGACY_PTYS=y | ||
1145 | CONFIG_LEGACY_PTY_COUNT=256 | ||
1146 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
1147 | # CONFIG_N_GSM is not set | ||
1148 | # CONFIG_TRACE_SINK is not set | ||
1149 | CONFIG_DEVKMEM=y | ||
1150 | |||
1151 | # | ||
1152 | # Serial drivers | ||
1153 | # | ||
1154 | # CONFIG_SERIAL_8250 is not set | ||
1155 | |||
1156 | # | ||
1157 | # Non-8250 serial port support | ||
1158 | # | ||
1159 | # CONFIG_SERIAL_AMBA_PL010 is not set | ||
1160 | # CONFIG_SERIAL_AMBA_PL011 is not set | ||
1161 | # CONFIG_SERIAL_MAX3100 is not set | ||
1162 | # CONFIG_SERIAL_MAX3107 is not set | ||
1163 | CONFIG_SERIAL_IMX=y | ||
1164 | CONFIG_SERIAL_IMX_CONSOLE=y | ||
1165 | CONFIG_SERIAL_CORE=y | ||
1166 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
1167 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
1168 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
1169 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
1170 | # CONFIG_SERIAL_IFX6X60 is not set | ||
1171 | # CONFIG_SERIAL_XILINX_PS_UART is not set | ||
1172 | # CONFIG_TTY_PRINTK is not set | ||
1173 | CONFIG_FSL_OTP=y | ||
1174 | # CONFIG_HVC_DCC is not set | ||
1175 | # CONFIG_IPMI_HANDLER is not set | ||
1176 | CONFIG_HW_RANDOM=y | ||
1177 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
1178 | # CONFIG_R3964 is not set | ||
1179 | # CONFIG_RAW_DRIVER is not set | ||
1180 | # CONFIG_TCG_TPM is not set | ||
1181 | # CONFIG_RAMOOPS is not set | ||
1182 | CONFIG_MXS_VIIM=y | ||
1183 | CONFIG_I2C=y | ||
1184 | CONFIG_I2C_BOARDINFO=y | ||
1185 | CONFIG_I2C_COMPAT=y | ||
1186 | CONFIG_I2C_CHARDEV=y | ||
1187 | # CONFIG_I2C_MUX is not set | ||
1188 | CONFIG_I2C_HELPER_AUTO=y | ||
1189 | |||
1190 | # | ||
1191 | # I2C Hardware Bus support | ||
1192 | # | ||
1193 | |||
1194 | # | ||
1195 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
1196 | # | ||
1197 | # CONFIG_I2C_DESIGNWARE is not set | ||
1198 | # CONFIG_I2C_GPIO is not set | ||
1199 | CONFIG_I2C_IMX=y | ||
1200 | # CONFIG_I2C_OCORES is not set | ||
1201 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
1202 | # CONFIG_I2C_PXA_PCI is not set | ||
1203 | # CONFIG_I2C_SIMTEC is not set | ||
1204 | # CONFIG_I2C_XILINX is not set | ||
1205 | |||
1206 | # | ||
1207 | # External I2C/SMBus adapter drivers | ||
1208 | # | ||
1209 | # CONFIG_I2C_DIOLAN_U2C is not set | ||
1210 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
1211 | # CONFIG_I2C_TAOS_EVM is not set | ||
1212 | # CONFIG_I2C_TINY_USB is not set | ||
1213 | |||
1214 | # | ||
1215 | # Other I2C/SMBus bus drivers | ||
1216 | # | ||
1217 | # CONFIG_I2C_STUB is not set | ||
1218 | # CONFIG_I2C_DEBUG_CORE is not set | ||
1219 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
1220 | # CONFIG_I2C_DEBUG_BUS is not set | ||
1221 | CONFIG_SPI=y | ||
1222 | CONFIG_SPI_MASTER=y | ||
1223 | |||
1224 | # | ||
1225 | # SPI Master Controller Drivers | ||
1226 | # | ||
1227 | # CONFIG_SPI_ALTERA is not set | ||
1228 | CONFIG_SPI_BITBANG=y | ||
1229 | # CONFIG_SPI_GPIO is not set | ||
1230 | CONFIG_SPI_IMX_VER_2_3=y | ||
1231 | CONFIG_SPI_IMX=y | ||
1232 | # CONFIG_SPI_OC_TINY is not set | ||
1233 | # CONFIG_SPI_PL022 is not set | ||
1234 | # CONFIG_SPI_PXA2XX_PCI is not set | ||
1235 | # CONFIG_SPI_XILINX is not set | ||
1236 | # CONFIG_SPI_DESIGNWARE is not set | ||
1237 | |||
1238 | # | ||
1239 | # SPI Protocol Masters | ||
1240 | # | ||
1241 | # CONFIG_SPI_SPIDEV is not set | ||
1242 | # CONFIG_SPI_TLE62X0 is not set | ||
1243 | |||
1244 | # | ||
1245 | # PPS support | ||
1246 | # | ||
1247 | # CONFIG_PPS is not set | ||
1248 | |||
1249 | # | ||
1250 | # PPS generators support | ||
1251 | # | ||
1252 | |||
1253 | # | ||
1254 | # PTP clock support | ||
1255 | # | ||
1256 | |||
1257 | # | ||
1258 | # Enable Device Drivers -> PPS to see the PTP clock options. | ||
1259 | # | ||
1260 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
1261 | CONFIG_GPIOLIB=y | ||
1262 | CONFIG_GPIO_SYSFS=y | ||
1263 | |||
1264 | # | ||
1265 | # Memory mapped GPIO drivers: | ||
1266 | # | ||
1267 | # CONFIG_GPIO_BASIC_MMIO is not set | ||
1268 | # CONFIG_GPIO_IT8761E is not set | ||
1269 | # CONFIG_GPIO_PL061 is not set | ||
1270 | |||
1271 | # | ||
1272 | # I2C GPIO expanders: | ||
1273 | # | ||
1274 | # CONFIG_GPIO_MAX7300 is not set | ||
1275 | # CONFIG_GPIO_MAX732X is not set | ||
1276 | # CONFIG_GPIO_PCA953X_IRQ is not set | ||
1277 | # CONFIG_GPIO_PCF857X is not set | ||
1278 | # CONFIG_GPIO_SX150X is not set | ||
1279 | # CONFIG_GPIO_WM8994 is not set | ||
1280 | # CONFIG_GPIO_ADP5588 is not set | ||
1281 | |||
1282 | # | ||
1283 | # PCI GPIO expanders: | ||
1284 | # | ||
1285 | |||
1286 | # | ||
1287 | # SPI GPIO expanders: | ||
1288 | # | ||
1289 | # CONFIG_GPIO_MAX7301 is not set | ||
1290 | # CONFIG_GPIO_MCP23S08 is not set | ||
1291 | # CONFIG_GPIO_MC33880 is not set | ||
1292 | # CONFIG_GPIO_74X164 is not set | ||
1293 | |||
1294 | # | ||
1295 | # AC97 GPIO expanders: | ||
1296 | # | ||
1297 | |||
1298 | # | ||
1299 | # MODULbus GPIO expanders: | ||
1300 | # | ||
1301 | # CONFIG_W1 is not set | ||
1302 | CONFIG_POWER_SUPPLY=y | ||
1303 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
1304 | # CONFIG_PDA_POWER is not set | ||
1305 | # CONFIG_APM_POWER is not set | ||
1306 | # CONFIG_TEST_POWER is not set | ||
1307 | # CONFIG_BATTERY_DS2780 is not set | ||
1308 | # CONFIG_BATTERY_DS2782 is not set | ||
1309 | # CONFIG_BATTERY_BQ20Z75 is not set | ||
1310 | # CONFIG_BATTERY_BQ27x00 is not set | ||
1311 | # CONFIG_BATTERY_MAX17040 is not set | ||
1312 | # CONFIG_BATTERY_MAX17042 is not set | ||
1313 | # CONFIG_CHARGER_ISP1704 is not set | ||
1314 | CONFIG_CHARGER_MAX8903=y | ||
1315 | # CONFIG_SABRESD_MAX8903 is not set | ||
1316 | # CONFIG_CHARGER_GPIO is not set | ||
1317 | CONFIG_HWMON=y | ||
1318 | # CONFIG_HWMON_VID is not set | ||
1319 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1320 | |||
1321 | # | ||
1322 | # Native drivers | ||
1323 | # | ||
1324 | # CONFIG_SENSORS_AD7414 is not set | ||
1325 | # CONFIG_SENSORS_AD7418 is not set | ||
1326 | # CONFIG_SENSORS_ADCXX is not set | ||
1327 | # CONFIG_SENSORS_ADM1021 is not set | ||
1328 | # CONFIG_SENSORS_ADM1025 is not set | ||
1329 | # CONFIG_SENSORS_ADM1026 is not set | ||
1330 | # CONFIG_SENSORS_ADM1029 is not set | ||
1331 | # CONFIG_SENSORS_ADM1031 is not set | ||
1332 | # CONFIG_SENSORS_ADM9240 is not set | ||
1333 | # CONFIG_SENSORS_ADT7411 is not set | ||
1334 | # CONFIG_SENSORS_ADT7462 is not set | ||
1335 | # CONFIG_SENSORS_ADT7470 is not set | ||
1336 | # CONFIG_SENSORS_ADT7475 is not set | ||
1337 | # CONFIG_SENSORS_ASC7621 is not set | ||
1338 | # CONFIG_SENSORS_ATXP1 is not set | ||
1339 | # CONFIG_SENSORS_DS620 is not set | ||
1340 | # CONFIG_SENSORS_DS1621 is not set | ||
1341 | # CONFIG_SENSORS_F71805F is not set | ||
1342 | # CONFIG_SENSORS_F71882FG is not set | ||
1343 | # CONFIG_SENSORS_F75375S is not set | ||
1344 | # CONFIG_SENSORS_G760A is not set | ||
1345 | # CONFIG_SENSORS_GL518SM is not set | ||
1346 | # CONFIG_SENSORS_GL520SM is not set | ||
1347 | # CONFIG_SENSORS_GPIO_FAN is not set | ||
1348 | # CONFIG_SENSORS_IT87 is not set | ||
1349 | # CONFIG_SENSORS_JC42 is not set | ||
1350 | # CONFIG_SENSORS_LINEAGE is not set | ||
1351 | # CONFIG_SENSORS_LM63 is not set | ||
1352 | # CONFIG_SENSORS_LM70 is not set | ||
1353 | # CONFIG_SENSORS_LM73 is not set | ||
1354 | # CONFIG_SENSORS_LM75 is not set | ||
1355 | # CONFIG_SENSORS_LM77 is not set | ||
1356 | # CONFIG_SENSORS_LM78 is not set | ||
1357 | # CONFIG_SENSORS_LM80 is not set | ||
1358 | # CONFIG_SENSORS_LM83 is not set | ||
1359 | # CONFIG_SENSORS_LM85 is not set | ||
1360 | # CONFIG_SENSORS_LM87 is not set | ||
1361 | # CONFIG_SENSORS_LM90 is not set | ||
1362 | # CONFIG_SENSORS_LM92 is not set | ||
1363 | # CONFIG_SENSORS_LM93 is not set | ||
1364 | # CONFIG_SENSORS_LTC4151 is not set | ||
1365 | # CONFIG_SENSORS_LTC4215 is not set | ||
1366 | # CONFIG_SENSORS_LTC4245 is not set | ||
1367 | # CONFIG_SENSORS_LTC4261 is not set | ||
1368 | # CONFIG_SENSORS_LM95241 is not set | ||
1369 | # CONFIG_SENSORS_MAX1111 is not set | ||
1370 | # CONFIG_SENSORS_MAX16065 is not set | ||
1371 | # CONFIG_SENSORS_MAX1619 is not set | ||
1372 | # CONFIG_SENSORS_MAX6639 is not set | ||
1373 | # CONFIG_SENSORS_MAX6642 is not set | ||
1374 | # CONFIG_SENSORS_MAX17135 is not set | ||
1375 | # CONFIG_SENSORS_MAX6650 is not set | ||
1376 | # CONFIG_SENSORS_PC87360 is not set | ||
1377 | # CONFIG_SENSORS_PC87427 is not set | ||
1378 | # CONFIG_SENSORS_PCF8591 is not set | ||
1379 | # CONFIG_PMBUS is not set | ||
1380 | # CONFIG_SENSORS_SHT15 is not set | ||
1381 | # CONFIG_SENSORS_SHT21 is not set | ||
1382 | # CONFIG_SENSORS_SMM665 is not set | ||
1383 | # CONFIG_SENSORS_DME1737 is not set | ||
1384 | # CONFIG_SENSORS_EMC1403 is not set | ||
1385 | # CONFIG_SENSORS_EMC2103 is not set | ||
1386 | # CONFIG_SENSORS_EMC6W201 is not set | ||
1387 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
1388 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1389 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
1390 | # CONFIG_SENSORS_SCH5627 is not set | ||
1391 | # CONFIG_SENSORS_ADS1015 is not set | ||
1392 | # CONFIG_SENSORS_ADS7828 is not set | ||
1393 | # CONFIG_SENSORS_ADS7871 is not set | ||
1394 | # CONFIG_SENSORS_AMC6821 is not set | ||
1395 | # CONFIG_SENSORS_THMC50 is not set | ||
1396 | # CONFIG_SENSORS_TMP102 is not set | ||
1397 | # CONFIG_SENSORS_TMP401 is not set | ||
1398 | # CONFIG_SENSORS_TMP421 is not set | ||
1399 | # CONFIG_SENSORS_VT1211 is not set | ||
1400 | # CONFIG_SENSORS_W83781D is not set | ||
1401 | # CONFIG_SENSORS_W83791D is not set | ||
1402 | # CONFIG_SENSORS_W83792D is not set | ||
1403 | # CONFIG_SENSORS_W83793 is not set | ||
1404 | # CONFIG_SENSORS_W83795 is not set | ||
1405 | # CONFIG_SENSORS_W83L785TS is not set | ||
1406 | # CONFIG_SENSORS_W83L786NG is not set | ||
1407 | # CONFIG_SENSORS_W83627HF is not set | ||
1408 | # CONFIG_SENSORS_W83627EHF is not set | ||
1409 | CONFIG_SENSORS_MAG3110=y | ||
1410 | # CONFIG_MXC_MMA8450 is not set | ||
1411 | CONFIG_MXC_MMA8451=y | ||
1412 | CONFIG_THERMAL=y | ||
1413 | # CONFIG_THERMAL_HWMON is not set | ||
1414 | CONFIG_WATCHDOG=y | ||
1415 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
1416 | |||
1417 | # | ||
1418 | # Watchdog Device Drivers | ||
1419 | # | ||
1420 | # CONFIG_SOFT_WATCHDOG is not set | ||
1421 | # CONFIG_ARM_SP805_WATCHDOG is not set | ||
1422 | # CONFIG_MPCORE_WATCHDOG is not set | ||
1423 | # CONFIG_MAX63XX_WATCHDOG is not set | ||
1424 | CONFIG_IMX2_WDT=y | ||
1425 | |||
1426 | # | ||
1427 | # USB-based Watchdog Cards | ||
1428 | # | ||
1429 | # CONFIG_USBPCWATCHDOG is not set | ||
1430 | CONFIG_SSB_POSSIBLE=y | ||
1431 | |||
1432 | # | ||
1433 | # Sonics Silicon Backplane | ||
1434 | # | ||
1435 | # CONFIG_SSB is not set | ||
1436 | CONFIG_BCMA_POSSIBLE=y | ||
1437 | |||
1438 | # | ||
1439 | # Broadcom specific AMBA | ||
1440 | # | ||
1441 | # CONFIG_BCMA is not set | ||
1442 | CONFIG_MFD_SUPPORT=y | ||
1443 | CONFIG_MFD_CORE=y | ||
1444 | # CONFIG_MFD_88PM860X is not set | ||
1445 | # CONFIG_MFD_SM501 is not set | ||
1446 | # CONFIG_MFD_ASIC3 is not set | ||
1447 | # CONFIG_HTC_EGPIO is not set | ||
1448 | # CONFIG_HTC_PASIC3 is not set | ||
1449 | # CONFIG_HTC_I2CPLD is not set | ||
1450 | # CONFIG_UCB1400_CORE is not set | ||
1451 | # CONFIG_TPS6105X is not set | ||
1452 | # CONFIG_TPS65010 is not set | ||
1453 | # CONFIG_TPS6507X is not set | ||
1454 | # CONFIG_MFD_TPS6586X is not set | ||
1455 | # CONFIG_TWL4030_CORE is not set | ||
1456 | # CONFIG_MFD_STMPE is not set | ||
1457 | # CONFIG_MFD_TC3589X is not set | ||
1458 | # CONFIG_MFD_TMIO is not set | ||
1459 | # CONFIG_MFD_T7L66XB is not set | ||
1460 | # CONFIG_MFD_TC6387XB is not set | ||
1461 | # CONFIG_MFD_TC6393XB is not set | ||
1462 | # CONFIG_PMIC_DA903X is not set | ||
1463 | # CONFIG_PMIC_ADP5520 is not set | ||
1464 | # CONFIG_MFD_MAX8925 is not set | ||
1465 | # CONFIG_MFD_MAX8997 is not set | ||
1466 | # CONFIG_MFD_MAX8998 is not set | ||
1467 | # CONFIG_MFD_WM8400 is not set | ||
1468 | # CONFIG_MFD_WM831X_I2C is not set | ||
1469 | # CONFIG_MFD_WM831X_SPI is not set | ||
1470 | # CONFIG_MFD_WM8350_I2C is not set | ||
1471 | CONFIG_MFD_WM8994=y | ||
1472 | # CONFIG_MFD_PCF50633 is not set | ||
1473 | # CONFIG_PMIC_DIALOG is not set | ||
1474 | # CONFIG_MFD_MC_PMIC is not set | ||
1475 | # CONFIG_MFD_MC34708 is not set | ||
1476 | CONFIG_MFD_PFUZE=y | ||
1477 | # CONFIG_MFD_MC13XXX is not set | ||
1478 | # CONFIG_ABX500_CORE is not set | ||
1479 | # CONFIG_EZX_PCAP is not set | ||
1480 | # CONFIG_MFD_WL1273_CORE is not set | ||
1481 | # CONFIG_MFD_TPS65910 is not set | ||
1482 | # CONFIG_MFD_MAX17135 is not set | ||
1483 | CONFIG_MFD_MXC_HDMI=y | ||
1484 | CONFIG_REGULATOR=y | ||
1485 | # CONFIG_REGULATOR_DEBUG is not set | ||
1486 | # CONFIG_REGULATOR_DUMMY is not set | ||
1487 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
1488 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
1489 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
1490 | # CONFIG_REGULATOR_BQ24022 is not set | ||
1491 | # CONFIG_REGULATOR_MAX1586 is not set | ||
1492 | # CONFIG_REGULATOR_MAX8649 is not set | ||
1493 | # CONFIG_REGULATOR_MAX8660 is not set | ||
1494 | # CONFIG_REGULATOR_MAX8952 is not set | ||
1495 | # CONFIG_REGULATOR_WM8994 is not set | ||
1496 | # CONFIG_REGULATOR_LP3971 is not set | ||
1497 | # CONFIG_REGULATOR_LP3972 is not set | ||
1498 | # CONFIG_REGULATOR_MC34708 is not set | ||
1499 | CONFIG_REGULATOR_PFUZE100=y | ||
1500 | # CONFIG_REGULATOR_TPS65023 is not set | ||
1501 | # CONFIG_REGULATOR_TPS6507X is not set | ||
1502 | # CONFIG_REGULATOR_ISL6271A is not set | ||
1503 | # CONFIG_REGULATOR_AD5398 is not set | ||
1504 | CONFIG_REGULATOR_ANATOP=y | ||
1505 | # CONFIG_REGULATOR_TPS6524X is not set | ||
1506 | CONFIG_MEDIA_SUPPORT=y | ||
1507 | |||
1508 | # | ||
1509 | # Multimedia core support | ||
1510 | # | ||
1511 | # CONFIG_MEDIA_CONTROLLER is not set | ||
1512 | CONFIG_VIDEO_DEV=y | ||
1513 | CONFIG_VIDEO_V4L2_COMMON=y | ||
1514 | # CONFIG_DVB_CORE is not set | ||
1515 | CONFIG_VIDEO_MEDIA=y | ||
1516 | |||
1517 | # | ||
1518 | # Multimedia drivers | ||
1519 | # | ||
1520 | # CONFIG_RC_CORE is not set | ||
1521 | # CONFIG_MEDIA_ATTACH is not set | ||
1522 | CONFIG_MEDIA_TUNER=y | ||
1523 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
1524 | CONFIG_MEDIA_TUNER_SIMPLE=y | ||
1525 | CONFIG_MEDIA_TUNER_TDA8290=y | ||
1526 | CONFIG_MEDIA_TUNER_TDA827X=y | ||
1527 | CONFIG_MEDIA_TUNER_TDA18271=y | ||
1528 | CONFIG_MEDIA_TUNER_TDA9887=y | ||
1529 | CONFIG_MEDIA_TUNER_TEA5761=y | ||
1530 | CONFIG_MEDIA_TUNER_TEA5767=y | ||
1531 | CONFIG_MEDIA_TUNER_MT20XX=y | ||
1532 | CONFIG_MEDIA_TUNER_XC2028=y | ||
1533 | CONFIG_MEDIA_TUNER_XC5000=y | ||
1534 | CONFIG_MEDIA_TUNER_MC44S803=y | ||
1535 | CONFIG_VIDEO_V4L2=y | ||
1536 | CONFIG_VIDEOBUF_GEN=y | ||
1537 | CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
1538 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
1539 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
1540 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
1541 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
1542 | |||
1543 | # | ||
1544 | # Encoders, decoders, sensors and other helper chips | ||
1545 | # | ||
1546 | |||
1547 | # | ||
1548 | # Audio decoders, processors and mixers | ||
1549 | # | ||
1550 | # CONFIG_VIDEO_TVAUDIO is not set | ||
1551 | # CONFIG_VIDEO_TDA7432 is not set | ||
1552 | # CONFIG_VIDEO_TDA9840 is not set | ||
1553 | # CONFIG_VIDEO_TEA6415C is not set | ||
1554 | # CONFIG_VIDEO_TEA6420 is not set | ||
1555 | # CONFIG_VIDEO_MSP3400 is not set | ||
1556 | # CONFIG_VIDEO_CS5345 is not set | ||
1557 | # CONFIG_VIDEO_CS53L32A is not set | ||
1558 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
1559 | # CONFIG_VIDEO_WM8775 is not set | ||
1560 | # CONFIG_VIDEO_WM8739 is not set | ||
1561 | # CONFIG_VIDEO_VP27SMPX is not set | ||
1562 | |||
1563 | # | ||
1564 | # RDS decoders | ||
1565 | # | ||
1566 | # CONFIG_VIDEO_SAA6588 is not set | ||
1567 | |||
1568 | # | ||
1569 | # Video decoders | ||
1570 | # | ||
1571 | # CONFIG_VIDEO_ADV7180 is not set | ||
1572 | # CONFIG_VIDEO_BT819 is not set | ||
1573 | # CONFIG_VIDEO_BT856 is not set | ||
1574 | # CONFIG_VIDEO_BT866 is not set | ||
1575 | # CONFIG_VIDEO_KS0127 is not set | ||
1576 | # CONFIG_VIDEO_SAA7110 is not set | ||
1577 | # CONFIG_VIDEO_SAA711X is not set | ||
1578 | # CONFIG_VIDEO_SAA7191 is not set | ||
1579 | # CONFIG_VIDEO_TVP514X is not set | ||
1580 | # CONFIG_VIDEO_TVP5150 is not set | ||
1581 | # CONFIG_VIDEO_TVP7002 is not set | ||
1582 | # CONFIG_VIDEO_VPX3220 is not set | ||
1583 | |||
1584 | # | ||
1585 | # Video and audio decoders | ||
1586 | # | ||
1587 | # CONFIG_VIDEO_SAA717X is not set | ||
1588 | # CONFIG_VIDEO_CX25840 is not set | ||
1589 | |||
1590 | # | ||
1591 | # MPEG video encoders | ||
1592 | # | ||
1593 | # CONFIG_VIDEO_CX2341X is not set | ||
1594 | |||
1595 | # | ||
1596 | # Video encoders | ||
1597 | # | ||
1598 | # CONFIG_VIDEO_SAA7127 is not set | ||
1599 | # CONFIG_VIDEO_SAA7185 is not set | ||
1600 | # CONFIG_VIDEO_ADV7170 is not set | ||
1601 | # CONFIG_VIDEO_ADV7175 is not set | ||
1602 | # CONFIG_VIDEO_ADV7343 is not set | ||
1603 | # CONFIG_VIDEO_AK881X is not set | ||
1604 | |||
1605 | # | ||
1606 | # Camera sensor devices | ||
1607 | # | ||
1608 | # CONFIG_VIDEO_OV7670 is not set | ||
1609 | # CONFIG_VIDEO_MT9V011 is not set | ||
1610 | # CONFIG_VIDEO_TCM825X is not set | ||
1611 | |||
1612 | # | ||
1613 | # Video improvement chips | ||
1614 | # | ||
1615 | # CONFIG_VIDEO_UPD64031A is not set | ||
1616 | # CONFIG_VIDEO_UPD64083 is not set | ||
1617 | |||
1618 | # | ||
1619 | # Miscelaneous helper chips | ||
1620 | # | ||
1621 | # CONFIG_VIDEO_THS7303 is not set | ||
1622 | # CONFIG_VIDEO_M52790 is not set | ||
1623 | # CONFIG_VIDEO_VIVI is not set | ||
1624 | # CONFIG_VIDEO_MXC_CAMERA is not set | ||
1625 | CONFIG_VIDEO_MXC_OUTPUT=y | ||
1626 | CONFIG_VIDEO_MXC_IPU_OUTPUT=y | ||
1627 | # CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set | ||
1628 | # CONFIG_VIDEO_MXC_OPL is not set | ||
1629 | # CONFIG_VIDEO_CPIA2 is not set | ||
1630 | # CONFIG_VIDEO_TIMBERDALE is not set | ||
1631 | # CONFIG_VIDEO_SR030PC30 is not set | ||
1632 | # CONFIG_VIDEO_NOON010PC30 is not set | ||
1633 | # CONFIG_SOC_CAMERA is not set | ||
1634 | CONFIG_V4L_USB_DRIVERS=y | ||
1635 | CONFIG_USB_VIDEO_CLASS=m | ||
1636 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
1637 | CONFIG_USB_GSPCA=m | ||
1638 | # CONFIG_USB_M5602 is not set | ||
1639 | # CONFIG_USB_STV06XX is not set | ||
1640 | # CONFIG_USB_GL860 is not set | ||
1641 | # CONFIG_USB_GSPCA_BENQ is not set | ||
1642 | # CONFIG_USB_GSPCA_CONEX is not set | ||
1643 | # CONFIG_USB_GSPCA_CPIA1 is not set | ||
1644 | # CONFIG_USB_GSPCA_ETOMS is not set | ||
1645 | # CONFIG_USB_GSPCA_FINEPIX is not set | ||
1646 | # CONFIG_USB_GSPCA_JEILINJ is not set | ||
1647 | # CONFIG_USB_GSPCA_KINECT is not set | ||
1648 | # CONFIG_USB_GSPCA_KONICA is not set | ||
1649 | # CONFIG_USB_GSPCA_MARS is not set | ||
1650 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
1651 | # CONFIG_USB_GSPCA_NW80X is not set | ||
1652 | # CONFIG_USB_GSPCA_OV519 is not set | ||
1653 | # CONFIG_USB_GSPCA_OV534 is not set | ||
1654 | # CONFIG_USB_GSPCA_OV534_9 is not set | ||
1655 | # CONFIG_USB_GSPCA_PAC207 is not set | ||
1656 | # CONFIG_USB_GSPCA_PAC7302 is not set | ||
1657 | # CONFIG_USB_GSPCA_PAC7311 is not set | ||
1658 | # CONFIG_USB_GSPCA_SN9C2028 is not set | ||
1659 | # CONFIG_USB_GSPCA_SN9C20X is not set | ||
1660 | # CONFIG_USB_GSPCA_SONIXB is not set | ||
1661 | # CONFIG_USB_GSPCA_SONIXJ is not set | ||
1662 | # CONFIG_USB_GSPCA_SPCA500 is not set | ||
1663 | # CONFIG_USB_GSPCA_SPCA501 is not set | ||
1664 | # CONFIG_USB_GSPCA_SPCA505 is not set | ||
1665 | # CONFIG_USB_GSPCA_SPCA506 is not set | ||
1666 | # CONFIG_USB_GSPCA_SPCA508 is not set | ||
1667 | # CONFIG_USB_GSPCA_SPCA561 is not set | ||
1668 | # CONFIG_USB_GSPCA_SPCA1528 is not set | ||
1669 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
1670 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
1671 | # CONFIG_USB_GSPCA_SQ930X is not set | ||
1672 | # CONFIG_USB_GSPCA_STK014 is not set | ||
1673 | # CONFIG_USB_GSPCA_STV0680 is not set | ||
1674 | # CONFIG_USB_GSPCA_SUNPLUS is not set | ||
1675 | # CONFIG_USB_GSPCA_T613 is not set | ||
1676 | # CONFIG_USB_GSPCA_TV8532 is not set | ||
1677 | # CONFIG_USB_GSPCA_VC032X is not set | ||
1678 | # CONFIG_USB_GSPCA_VICAM is not set | ||
1679 | # CONFIG_USB_GSPCA_XIRLINK_CIT is not set | ||
1680 | # CONFIG_USB_GSPCA_ZC3XX is not set | ||
1681 | # CONFIG_VIDEO_PVRUSB2 is not set | ||
1682 | # CONFIG_VIDEO_HDPVR is not set | ||
1683 | # CONFIG_VIDEO_USBVISION is not set | ||
1684 | # CONFIG_USB_ET61X251 is not set | ||
1685 | # CONFIG_USB_SN9C102 is not set | ||
1686 | # CONFIG_USB_PWC is not set | ||
1687 | # CONFIG_USB_ZR364XX is not set | ||
1688 | # CONFIG_USB_STKWEBCAM is not set | ||
1689 | # CONFIG_USB_S2255 is not set | ||
1690 | # CONFIG_V4L_MEM2MEM_DRIVERS is not set | ||
1691 | # CONFIG_RADIO_ADAPTERS is not set | ||
1692 | |||
1693 | # | ||
1694 | # Graphics support | ||
1695 | # | ||
1696 | # CONFIG_DRM is not set | ||
1697 | # CONFIG_VGASTATE is not set | ||
1698 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
1699 | CONFIG_FB=y | ||
1700 | # CONFIG_FIRMWARE_EDID is not set | ||
1701 | # CONFIG_FB_DDC is not set | ||
1702 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1703 | CONFIG_FB_CFB_FILLRECT=y | ||
1704 | CONFIG_FB_CFB_COPYAREA=y | ||
1705 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
1706 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
1707 | # CONFIG_FB_SYS_FILLRECT is not set | ||
1708 | # CONFIG_FB_SYS_COPYAREA is not set | ||
1709 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
1710 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
1711 | # CONFIG_FB_SYS_FOPS is not set | ||
1712 | # CONFIG_FB_WMT_GE_ROPS is not set | ||
1713 | CONFIG_FB_DEFERRED_IO=y | ||
1714 | # CONFIG_FB_SVGALIB is not set | ||
1715 | # CONFIG_FB_MACMODES is not set | ||
1716 | # CONFIG_FB_BACKLIGHT is not set | ||
1717 | CONFIG_FB_MODE_HELPERS=y | ||
1718 | # CONFIG_FB_TILEBLITTING is not set | ||
1719 | |||
1720 | # | ||
1721 | # Frame buffer hardware drivers | ||
1722 | # | ||
1723 | # CONFIG_FB_ARMCLCD is not set | ||
1724 | # CONFIG_FB_UVESA is not set | ||
1725 | # CONFIG_FB_S1D13XXX is not set | ||
1726 | # CONFIG_FB_TMIO is not set | ||
1727 | # CONFIG_FB_UDL is not set | ||
1728 | # CONFIG_FB_VIRTUAL is not set | ||
1729 | # CONFIG_FB_METRONOME is not set | ||
1730 | # CONFIG_FB_BROADSHEET is not set | ||
1731 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
1732 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
1733 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
1734 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
1735 | CONFIG_BACKLIGHT_PWM=y | ||
1736 | # CONFIG_BACKLIGHT_ADP8860 is not set | ||
1737 | # CONFIG_BACKLIGHT_ADP8870 is not set | ||
1738 | |||
1739 | # | ||
1740 | # Display device support | ||
1741 | # | ||
1742 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1743 | CONFIG_FB_MXC=y | ||
1744 | CONFIG_FB_MXC_EDID=y | ||
1745 | CONFIG_FB_MXC_SYNC_PANEL=y | ||
1746 | # CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set | ||
1747 | CONFIG_FB_MXC_LDB=y | ||
1748 | CONFIG_FB_MXC_MIPI_DSI=y | ||
1749 | CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y | ||
1750 | # CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set | ||
1751 | # CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set | ||
1752 | # CONFIG_FB_MXC_SII902X is not set | ||
1753 | # CONFIG_FB_MXC_CH7026 is not set | ||
1754 | # CONFIG_FB_MXC_TVOUT_CH7024 is not set | ||
1755 | # CONFIG_FB_MXC_ASYNC_PANEL is not set | ||
1756 | CONFIG_FB_MXC_EINK_PANEL=y | ||
1757 | # CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE is not set | ||
1758 | # CONFIG_FB_MXC_SIPIX_PANEL is not set | ||
1759 | # CONFIG_FB_MXC_ELCDIF_FB is not set | ||
1760 | CONFIG_FB_MXC_HDMI=y | ||
1761 | |||
1762 | # | ||
1763 | # Console display driver support | ||
1764 | # | ||
1765 | CONFIG_DUMMY_CONSOLE=y | ||
1766 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
1767 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
1768 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
1769 | CONFIG_FONTS=y | ||
1770 | # CONFIG_FONT_8x8 is not set | ||
1771 | CONFIG_FONT_8x16=y | ||
1772 | # CONFIG_FONT_6x11 is not set | ||
1773 | # CONFIG_FONT_7x14 is not set | ||
1774 | # CONFIG_FONT_PEARL_8x8 is not set | ||
1775 | # CONFIG_FONT_ACORN_8x8 is not set | ||
1776 | # CONFIG_FONT_MINI_4x6 is not set | ||
1777 | # CONFIG_FONT_SUN8x16 is not set | ||
1778 | # CONFIG_FONT_SUN12x22 is not set | ||
1779 | # CONFIG_FONT_10x18 is not set | ||
1780 | CONFIG_LOGO=y | ||
1781 | CONFIG_LOGO_LINUX_MONO=y | ||
1782 | CONFIG_LOGO_LINUX_VGA16=y | ||
1783 | CONFIG_LOGO_LINUX_CLUT224=y | ||
1784 | CONFIG_SOUND=y | ||
1785 | # CONFIG_SOUND_OSS_CORE is not set | ||
1786 | CONFIG_SND=y | ||
1787 | CONFIG_SND_TIMER=y | ||
1788 | CONFIG_SND_PCM=y | ||
1789 | CONFIG_SND_HWDEP=y | ||
1790 | CONFIG_SND_RAWMIDI=y | ||
1791 | CONFIG_SND_JACK=y | ||
1792 | # CONFIG_SND_SEQUENCER is not set | ||
1793 | # CONFIG_SND_MIXER_OSS is not set | ||
1794 | # CONFIG_SND_PCM_OSS is not set | ||
1795 | # CONFIG_SND_HRTIMER is not set | ||
1796 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
1797 | CONFIG_SND_SUPPORT_OLD_API=y | ||
1798 | CONFIG_SND_VERBOSE_PROCFS=y | ||
1799 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
1800 | # CONFIG_SND_DEBUG is not set | ||
1801 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
1802 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
1803 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
1804 | # CONFIG_SND_SBAWE_SEQ is not set | ||
1805 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
1806 | CONFIG_SND_DRIVERS=y | ||
1807 | # CONFIG_SND_DUMMY is not set | ||
1808 | # CONFIG_SND_ALOOP is not set | ||
1809 | # CONFIG_SND_MTPAV is not set | ||
1810 | # CONFIG_SND_SERIAL_U16550 is not set | ||
1811 | # CONFIG_SND_MPU401 is not set | ||
1812 | CONFIG_SND_ARM=y | ||
1813 | # CONFIG_SND_ARMAACI is not set | ||
1814 | CONFIG_SND_SPI=y | ||
1815 | CONFIG_SND_USB=y | ||
1816 | CONFIG_SND_USB_AUDIO=y | ||
1817 | # CONFIG_SND_USB_UA101 is not set | ||
1818 | # CONFIG_SND_USB_CAIAQ is not set | ||
1819 | # CONFIG_SND_USB_6FIRE is not set | ||
1820 | CONFIG_SND_SOC=y | ||
1821 | # CONFIG_SND_SOC_CACHE_LZO is not set | ||
1822 | CONFIG_SND_SOC_AC97_BUS=y | ||
1823 | CONFIG_SND_IMX_SOC=y | ||
1824 | CONFIG_SND_MXC_SOC_MX2=y | ||
1825 | CONFIG_SND_MXC_SOC_SPDIF_DAI=y | ||
1826 | CONFIG_SND_SOC_IMX_SGTL5000=y | ||
1827 | CONFIG_SND_SOC_IMX_WM8958=y | ||
1828 | CONFIG_SND_SOC_IMX_WM8962=y | ||
1829 | # CONFIG_SND_SOC_IMX_SI4763 is not set | ||
1830 | CONFIG_SND_SOC_IMX_SPDIF=y | ||
1831 | CONFIG_SND_SOC_IMX_HDMI=y | ||
1832 | CONFIG_SND_SOC_I2C_AND_SPI=y | ||
1833 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
1834 | CONFIG_SND_SOC_WM_HUBS=y | ||
1835 | CONFIG_SND_SOC_MXC_HDMI=y | ||
1836 | CONFIG_SND_SOC_MXC_SPDIF=y | ||
1837 | CONFIG_SND_SOC_SGTL5000=y | ||
1838 | CONFIG_SND_SOC_WM8962=y | ||
1839 | CONFIG_SND_SOC_WM8994=y | ||
1840 | # CONFIG_SOUND_PRIME is not set | ||
1841 | CONFIG_AC97_BUS=y | ||
1842 | CONFIG_HID_SUPPORT=y | ||
1843 | CONFIG_HID=y | ||
1844 | CONFIG_HIDRAW=y | ||
1845 | |||
1846 | # | ||
1847 | # USB Input Devices | ||
1848 | # | ||
1849 | CONFIG_USB_HID=y | ||
1850 | # CONFIG_HID_PID is not set | ||
1851 | # CONFIG_USB_HIDDEV is not set | ||
1852 | |||
1853 | # | ||
1854 | # Special HID drivers | ||
1855 | # | ||
1856 | CONFIG_HID_A4TECH=m | ||
1857 | # CONFIG_HID_ACRUX is not set | ||
1858 | CONFIG_HID_APPLE=m | ||
1859 | CONFIG_HID_BELKIN=m | ||
1860 | CONFIG_HID_CHERRY=m | ||
1861 | CONFIG_HID_CHICONY=m | ||
1862 | # CONFIG_HID_PRODIKEYS is not set | ||
1863 | CONFIG_HID_CYPRESS=m | ||
1864 | # CONFIG_HID_DRAGONRISE is not set | ||
1865 | # CONFIG_HID_EMS_FF is not set | ||
1866 | # CONFIG_HID_ELECOM is not set | ||
1867 | CONFIG_HID_EZKEY=m | ||
1868 | # CONFIG_HID_KEYTOUCH is not set | ||
1869 | # CONFIG_HID_KYE is not set | ||
1870 | # CONFIG_HID_UCLOGIC is not set | ||
1871 | # CONFIG_HID_WALTOP is not set | ||
1872 | CONFIG_HID_GYRATION=m | ||
1873 | # CONFIG_HID_TWINHAN is not set | ||
1874 | # CONFIG_HID_KENSINGTON is not set | ||
1875 | # CONFIG_HID_LCPOWER is not set | ||
1876 | CONFIG_HID_LOGITECH=m | ||
1877 | # CONFIG_LOGITECH_FF is not set | ||
1878 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1879 | # CONFIG_LOGIG940_FF is not set | ||
1880 | # CONFIG_LOGIWII_FF is not set | ||
1881 | # CONFIG_HID_MAGICMOUSE is not set | ||
1882 | CONFIG_HID_MICROSOFT=m | ||
1883 | CONFIG_HID_MONTEREY=m | ||
1884 | # CONFIG_HID_MULTITOUCH is not set | ||
1885 | # CONFIG_HID_NTRIG is not set | ||
1886 | # CONFIG_HID_ORTEK is not set | ||
1887 | CONFIG_HID_PANTHERLORD=m | ||
1888 | # CONFIG_PANTHERLORD_FF is not set | ||
1889 | CONFIG_HID_PETALYNX=m | ||
1890 | # CONFIG_HID_PICOLCD is not set | ||
1891 | # CONFIG_HID_QUANTA is not set | ||
1892 | # CONFIG_HID_ROCCAT is not set | ||
1893 | # CONFIG_HID_ROCCAT_ARVO is not set | ||
1894 | # CONFIG_HID_ROCCAT_KONE is not set | ||
1895 | # CONFIG_HID_ROCCAT_KONEPLUS is not set | ||
1896 | # CONFIG_HID_ROCCAT_KOVAPLUS is not set | ||
1897 | # CONFIG_HID_ROCCAT_PYRA is not set | ||
1898 | CONFIG_HID_SAMSUNG=m | ||
1899 | CONFIG_HID_SONY=m | ||
1900 | CONFIG_HID_SUNPLUS=m | ||
1901 | # CONFIG_HID_GREENASIA is not set | ||
1902 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
1903 | # CONFIG_HID_TOPSEED is not set | ||
1904 | # CONFIG_HID_THRUSTMASTER is not set | ||
1905 | # CONFIG_HID_WACOM is not set | ||
1906 | # CONFIG_HID_ZEROPLUS is not set | ||
1907 | # CONFIG_HID_ZYDACRON is not set | ||
1908 | CONFIG_USB_SUPPORT=y | ||
1909 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1910 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
1911 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1912 | CONFIG_USB=y | ||
1913 | # CONFIG_USB_DEBUG is not set | ||
1914 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1915 | |||
1916 | # | ||
1917 | # Miscellaneous USB options | ||
1918 | # | ||
1919 | # CONFIG_USB_DEVICEFS is not set | ||
1920 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1921 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1922 | CONFIG_USB_SUSPEND=y | ||
1923 | CONFIG_USB_OTG=y | ||
1924 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1925 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1926 | # CONFIG_USB_MON is not set | ||
1927 | # CONFIG_USB_WUSB is not set | ||
1928 | # CONFIG_USB_WUSB_CBAF is not set | ||
1929 | |||
1930 | # | ||
1931 | # USB Host Controller Drivers | ||
1932 | # | ||
1933 | # CONFIG_USB_C67X00_HCD is not set | ||
1934 | CONFIG_USB_EHCI_HCD=y | ||
1935 | # CONFIG_FSL_USB_TEST_MODE is not set | ||
1936 | CONFIG_USB_EHCI_ARC=y | ||
1937 | CONFIG_USB_EHCI_ARC_OTG=y | ||
1938 | # CONFIG_USB_EHCI_ARC_HSIC is not set | ||
1939 | # CONFIG_USB_STATIC_IRAM is not set | ||
1940 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
1941 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1942 | # CONFIG_USB_EHCI_MXC is not set | ||
1943 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1944 | # CONFIG_USB_ISP116X_HCD is not set | ||
1945 | # CONFIG_USB_ISP1760_HCD is not set | ||
1946 | # CONFIG_USB_ISP1362_HCD is not set | ||
1947 | # CONFIG_USB_SL811_HCD is not set | ||
1948 | # CONFIG_USB_R8A66597_HCD is not set | ||
1949 | # CONFIG_USB_HWA_HCD is not set | ||
1950 | # CONFIG_USB_MUSB_HDRC is not set | ||
1951 | |||
1952 | # | ||
1953 | # USB Device Class drivers | ||
1954 | # | ||
1955 | # CONFIG_USB_ACM is not set | ||
1956 | # CONFIG_USB_PRINTER is not set | ||
1957 | # CONFIG_USB_WDM is not set | ||
1958 | # CONFIG_USB_TMC is not set | ||
1959 | |||
1960 | # | ||
1961 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1962 | # | ||
1963 | |||
1964 | # | ||
1965 | # also be needed; see USB_STORAGE Help for more info | ||
1966 | # | ||
1967 | CONFIG_USB_STORAGE=y | ||
1968 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1969 | # CONFIG_USB_STORAGE_REALTEK is not set | ||
1970 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1971 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1972 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1973 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1974 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1975 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1976 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1977 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1978 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1979 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1980 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1981 | # CONFIG_USB_STORAGE_ENE_UB6250 is not set | ||
1982 | # CONFIG_USB_UAS is not set | ||
1983 | # CONFIG_USB_LIBUSUAL is not set | ||
1984 | |||
1985 | # | ||
1986 | # USB Imaging devices | ||
1987 | # | ||
1988 | # CONFIG_USB_MDC800 is not set | ||
1989 | # CONFIG_USB_MICROTEK is not set | ||
1990 | |||
1991 | # | ||
1992 | # USB port drivers | ||
1993 | # | ||
1994 | # CONFIG_USB_SERIAL is not set | ||
1995 | |||
1996 | # | ||
1997 | # USB Miscellaneous drivers | ||
1998 | # | ||
1999 | # CONFIG_USB_EMI62 is not set | ||
2000 | # CONFIG_USB_EMI26 is not set | ||
2001 | # CONFIG_USB_ADUTUX is not set | ||
2002 | # CONFIG_USB_SEVSEG is not set | ||
2003 | # CONFIG_USB_RIO500 is not set | ||
2004 | # CONFIG_USB_LEGOTOWER is not set | ||
2005 | # CONFIG_USB_LCD is not set | ||
2006 | # CONFIG_USB_LED is not set | ||
2007 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
2008 | # CONFIG_USB_CYTHERM is not set | ||
2009 | # CONFIG_USB_IDMOUSE is not set | ||
2010 | # CONFIG_USB_FTDI_ELAN is not set | ||
2011 | # CONFIG_USB_APPLEDISPLAY is not set | ||
2012 | # CONFIG_USB_SISUSBVGA is not set | ||
2013 | # CONFIG_USB_LD is not set | ||
2014 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
2015 | # CONFIG_USB_IOWARRIOR is not set | ||
2016 | # CONFIG_USB_TEST is not set | ||
2017 | # CONFIG_USB_ISIGHTFW is not set | ||
2018 | # CONFIG_USB_YUREX is not set | ||
2019 | CONFIG_USB_GADGET=y | ||
2020 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
2021 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
2022 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
2023 | CONFIG_USB_GADGET_SELECTED=y | ||
2024 | CONFIG_USB_GADGET_ARC=y | ||
2025 | # CONFIG_IMX_USB_CHARGER is not set | ||
2026 | CONFIG_USB_ARC=y | ||
2027 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
2028 | # CONFIG_USB_GADGET_FUSB300 is not set | ||
2029 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
2030 | # CONFIG_USB_GADGET_PXA_U2O is not set | ||
2031 | # CONFIG_USB_GADGET_M66592 is not set | ||
2032 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
2033 | CONFIG_USB_GADGET_DUALSPEED=y | ||
2034 | # CONFIG_USB_ZERO is not set | ||
2035 | CONFIG_USB_AUDIO=m | ||
2036 | CONFIG_USB_ETH=m | ||
2037 | CONFIG_USB_ETH_RNDIS=y | ||
2038 | # CONFIG_USB_ETH_EEM is not set | ||
2039 | # CONFIG_USB_G_NCM is not set | ||
2040 | # CONFIG_USB_GADGETFS is not set | ||
2041 | # CONFIG_USB_FUNCTIONFS is not set | ||
2042 | CONFIG_USB_FILE_STORAGE=m | ||
2043 | # CONFIG_FSL_UTP is not set | ||
2044 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
2045 | # CONFIG_USB_MASS_STORAGE is not set | ||
2046 | CONFIG_USB_G_SERIAL=m | ||
2047 | # CONFIG_USB_MIDI_GADGET is not set | ||
2048 | # CONFIG_USB_G_PRINTER is not set | ||
2049 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
2050 | # CONFIG_USB_G_MULTI is not set | ||
2051 | # CONFIG_USB_G_HID is not set | ||
2052 | # CONFIG_USB_G_DBGP is not set | ||
2053 | # CONFIG_USB_G_WEBCAM is not set | ||
2054 | |||
2055 | # | ||
2056 | # OTG and related infrastructure | ||
2057 | # | ||
2058 | CONFIG_USB_OTG_UTILS=y | ||
2059 | # CONFIG_USB_GPIO_VBUS is not set | ||
2060 | # CONFIG_USB_ULPI is not set | ||
2061 | # CONFIG_NOP_USB_XCEIV is not set | ||
2062 | CONFIG_MXC_OTG=y | ||
2063 | CONFIG_MMC=y | ||
2064 | # CONFIG_MMC_DEBUG is not set | ||
2065 | CONFIG_MMC_UNSAFE_RESUME=y | ||
2066 | # CONFIG_MMC_CLKGATE is not set | ||
2067 | |||
2068 | # | ||
2069 | # MMC/SD/SDIO Card Drivers | ||
2070 | # | ||
2071 | CONFIG_MMC_BLOCK=y | ||
2072 | CONFIG_MMC_BLOCK_MINORS=8 | ||
2073 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
2074 | # CONFIG_SDIO_UART is not set | ||
2075 | # CONFIG_MMC_TEST is not set | ||
2076 | |||
2077 | # | ||
2078 | # MMC/SD/SDIO Host Controller Drivers | ||
2079 | # | ||
2080 | # CONFIG_MMC_ARMMMCI is not set | ||
2081 | CONFIG_MMC_SDHCI=y | ||
2082 | CONFIG_MMC_SDHCI_IO_ACCESSORS=y | ||
2083 | CONFIG_MMC_SDHCI_PLTFM=y | ||
2084 | CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
2085 | # CONFIG_MMC_DW is not set | ||
2086 | # CONFIG_MMC_VUB300 is not set | ||
2087 | # CONFIG_MMC_USHC is not set | ||
2088 | # CONFIG_MEMSTICK is not set | ||
2089 | CONFIG_NEW_LEDS=y | ||
2090 | CONFIG_LEDS_CLASS=y | ||
2091 | |||
2092 | # | ||
2093 | # LED drivers | ||
2094 | # | ||
2095 | # CONFIG_LEDS_LM3530 is not set | ||
2096 | # CONFIG_LEDS_PCA9532 is not set | ||
2097 | # CONFIG_LEDS_GPIO is not set | ||
2098 | # CONFIG_LEDS_LP3944 is not set | ||
2099 | # CONFIG_LEDS_LP5521 is not set | ||
2100 | # CONFIG_LEDS_LP5523 is not set | ||
2101 | # CONFIG_LEDS_PCA955X is not set | ||
2102 | # CONFIG_LEDS_DAC124S085 is not set | ||
2103 | # CONFIG_LEDS_PWM is not set | ||
2104 | # CONFIG_LEDS_REGULATOR is not set | ||
2105 | # CONFIG_LEDS_BD2802 is not set | ||
2106 | # CONFIG_LEDS_LT3593 is not set | ||
2107 | # CONFIG_LEDS_TRIGGERS is not set | ||
2108 | |||
2109 | # | ||
2110 | # LED Triggers | ||
2111 | # | ||
2112 | |||
2113 | # | ||
2114 | # LED Triggers | ||
2115 | # | ||
2116 | # CONFIG_NFC_DEVICES is not set | ||
2117 | # CONFIG_ACCESSIBILITY is not set | ||
2118 | CONFIG_RTC_LIB=y | ||
2119 | CONFIG_RTC_CLASS=y | ||
2120 | CONFIG_RTC_HCTOSYS=y | ||
2121 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
2122 | # CONFIG_RTC_DEBUG is not set | ||
2123 | |||
2124 | # | ||
2125 | # RTC interfaces | ||
2126 | # | ||
2127 | CONFIG_RTC_INTF_SYSFS=y | ||
2128 | CONFIG_RTC_INTF_PROC=y | ||
2129 | CONFIG_RTC_INTF_DEV=y | ||
2130 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
2131 | # CONFIG_RTC_DRV_TEST is not set | ||
2132 | |||
2133 | # | ||
2134 | # I2C RTC drivers | ||
2135 | # | ||
2136 | # CONFIG_RTC_DRV_DS1307 is not set | ||
2137 | # CONFIG_RTC_DRV_DS1374 is not set | ||
2138 | # CONFIG_RTC_DRV_DS1672 is not set | ||
2139 | # CONFIG_RTC_DRV_DS3232 is not set | ||
2140 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
2141 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
2142 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
2143 | # CONFIG_RTC_DRV_ISL12022 is not set | ||
2144 | # CONFIG_RTC_DRV_X1205 is not set | ||
2145 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
2146 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
2147 | # CONFIG_RTC_DRV_M41T80 is not set | ||
2148 | # CONFIG_RTC_DRV_BQ32K is not set | ||
2149 | # CONFIG_RTC_DRV_S35390A is not set | ||
2150 | # CONFIG_RTC_DRV_FM3130 is not set | ||
2151 | # CONFIG_RTC_DRV_RX8581 is not set | ||
2152 | # CONFIG_RTC_DRV_RX8025 is not set | ||
2153 | # CONFIG_RTC_DRV_EM3027 is not set | ||
2154 | # CONFIG_RTC_DRV_RV3029C2 is not set | ||
2155 | |||
2156 | # | ||
2157 | # SPI RTC drivers | ||
2158 | # | ||
2159 | # CONFIG_RTC_DRV_M41T93 is not set | ||
2160 | # CONFIG_RTC_DRV_M41T94 is not set | ||
2161 | # CONFIG_RTC_DRV_DS1305 is not set | ||
2162 | # CONFIG_RTC_DRV_DS1390 is not set | ||
2163 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
2164 | # CONFIG_RTC_DRV_R9701 is not set | ||
2165 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
2166 | # CONFIG_RTC_DRV_DS3234 is not set | ||
2167 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
2168 | |||
2169 | # | ||
2170 | # Platform RTC drivers | ||
2171 | # | ||
2172 | # CONFIG_RTC_DRV_CMOS is not set | ||
2173 | # CONFIG_RTC_DRV_DS1286 is not set | ||
2174 | # CONFIG_RTC_DRV_DS1511 is not set | ||
2175 | # CONFIG_RTC_DRV_DS1553 is not set | ||
2176 | # CONFIG_RTC_DRV_DS1742 is not set | ||
2177 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
2178 | # CONFIG_RTC_DRV_M48T86 is not set | ||
2179 | # CONFIG_RTC_DRV_M48T35 is not set | ||
2180 | # CONFIG_RTC_DRV_M48T59 is not set | ||
2181 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
2182 | # CONFIG_RTC_MXC is not set | ||
2183 | # CONFIG_RTC_DRV_MXC_V2 is not set | ||
2184 | CONFIG_RTC_DRV_SNVS=y | ||
2185 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
2186 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
2187 | # CONFIG_RTC_DRV_V3020 is not set | ||
2188 | |||
2189 | # | ||
2190 | # on-CPU RTC drivers | ||
2191 | # | ||
2192 | # CONFIG_RTC_DRV_PL030 is not set | ||
2193 | # CONFIG_RTC_DRV_PL031 is not set | ||
2194 | CONFIG_DMADEVICES=y | ||
2195 | # CONFIG_DMADEVICES_DEBUG is not set | ||
2196 | |||
2197 | # | ||
2198 | # DMA Devices | ||
2199 | # | ||
2200 | # CONFIG_AMBA_PL08X is not set | ||
2201 | # CONFIG_DW_DMAC is not set | ||
2202 | CONFIG_MXC_PXP_V2=y | ||
2203 | CONFIG_MXC_PXP_CLIENT_DEVICE=y | ||
2204 | # CONFIG_TIMB_DMA is not set | ||
2205 | CONFIG_IMX_SDMA=y | ||
2206 | # CONFIG_MXS_DMA is not set | ||
2207 | CONFIG_DMA_ENGINE=y | ||
2208 | |||
2209 | # | ||
2210 | # DMA Clients | ||
2211 | # | ||
2212 | # CONFIG_NET_DMA is not set | ||
2213 | # CONFIG_ASYNC_TX_DMA is not set | ||
2214 | # CONFIG_DMATEST is not set | ||
2215 | # CONFIG_AUXDISPLAY is not set | ||
2216 | # CONFIG_UIO is not set | ||
2217 | # CONFIG_STAGING is not set | ||
2218 | CONFIG_CLKDEV_LOOKUP=y | ||
2219 | CONFIG_CLKSRC_MMIO=y | ||
2220 | |||
2221 | # | ||
2222 | # MXC support drivers | ||
2223 | # | ||
2224 | CONFIG_MXC_IPU=y | ||
2225 | CONFIG_MXC_IPU_V3=y | ||
2226 | CONFIG_MXC_IPU_V3H=y | ||
2227 | |||
2228 | # | ||
2229 | # MXC SSI support | ||
2230 | # | ||
2231 | # CONFIG_MXC_SSI is not set | ||
2232 | |||
2233 | # | ||
2234 | # MXC Digital Audio Multiplexer support | ||
2235 | # | ||
2236 | # CONFIG_MXC_DAM is not set | ||
2237 | |||
2238 | # | ||
2239 | # MXC PMIC support | ||
2240 | # | ||
2241 | # CONFIG_MXC_PMIC_MC13783 is not set | ||
2242 | # CONFIG_MXC_PMIC_MC13892 is not set | ||
2243 | # CONFIG_MXC_PMIC_MC34704 is not set | ||
2244 | # CONFIG_MXC_PMIC_MC9SDZ60 is not set | ||
2245 | # CONFIG_MXC_PMIC_MC9S08DZ60 is not set | ||
2246 | |||
2247 | # | ||
2248 | # MXC Security Drivers | ||
2249 | # | ||
2250 | # CONFIG_MXC_SECURITY_SCC is not set | ||
2251 | # CONFIG_MXC_SECURITY_RNG is not set | ||
2252 | |||
2253 | # | ||
2254 | # MXC MPEG4 Encoder Kernel module support | ||
2255 | # | ||
2256 | # CONFIG_MXC_HMP4E is not set | ||
2257 | |||
2258 | # | ||
2259 | # MXC HARDWARE EVENT | ||
2260 | # | ||
2261 | # CONFIG_MXC_HWEVENT is not set | ||
2262 | |||
2263 | # | ||
2264 | # MXC VPU(Video Processing Unit) support | ||
2265 | # | ||
2266 | CONFIG_MXC_VPU=y | ||
2267 | # CONFIG_MXC_VPU_DEBUG is not set | ||
2268 | # CONFIG_MX6_VPU_352M is not set | ||
2269 | |||
2270 | # | ||
2271 | # MXC Asynchronous Sample Rate Converter support | ||
2272 | # | ||
2273 | CONFIG_MXC_ASRC=y | ||
2274 | |||
2275 | # | ||
2276 | # MXC Bluetooth support | ||
2277 | # | ||
2278 | |||
2279 | # | ||
2280 | # Broadcom GPS ioctrl support | ||
2281 | # | ||
2282 | |||
2283 | # | ||
2284 | # MXC Media Local Bus Driver | ||
2285 | # | ||
2286 | CONFIG_MXC_MLB=y | ||
2287 | CONFIG_MXC_MLB150=m | ||
2288 | |||
2289 | # | ||
2290 | # i.MX ADC support | ||
2291 | # | ||
2292 | # CONFIG_IMX_ADC is not set | ||
2293 | |||
2294 | # | ||
2295 | # MXC Vivante GPU support | ||
2296 | # | ||
2297 | CONFIG_MXC_GPU_VIV=y | ||
2298 | |||
2299 | # | ||
2300 | # ANATOP_THERMAL | ||
2301 | # | ||
2302 | CONFIG_ANATOP_THERMAL=y | ||
2303 | |||
2304 | # | ||
2305 | # MXC MIPI Support | ||
2306 | # | ||
2307 | CONFIG_MXC_MIPI_CSI2=y | ||
2308 | |||
2309 | # | ||
2310 | # MXC HDMI CEC (Consumer Electronics Control) support | ||
2311 | # | ||
2312 | # CONFIG_MXC_HDMI_CEC is not set | ||
2313 | |||
2314 | # | ||
2315 | # File systems | ||
2316 | # | ||
2317 | CONFIG_EXT2_FS=y | ||
2318 | # CONFIG_EXT2_FS_XATTR is not set | ||
2319 | # CONFIG_EXT2_FS_XIP is not set | ||
2320 | CONFIG_EXT3_FS=y | ||
2321 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
2322 | CONFIG_EXT3_FS_XATTR=y | ||
2323 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
2324 | # CONFIG_EXT3_FS_SECURITY is not set | ||
2325 | CONFIG_EXT4_FS=y | ||
2326 | CONFIG_EXT4_FS_XATTR=y | ||
2327 | # CONFIG_EXT4_FS_POSIX_ACL is not set | ||
2328 | # CONFIG_EXT4_FS_SECURITY is not set | ||
2329 | # CONFIG_EXT4_DEBUG is not set | ||
2330 | CONFIG_JBD=y | ||
2331 | # CONFIG_JBD_DEBUG is not set | ||
2332 | CONFIG_JBD2=y | ||
2333 | # CONFIG_JBD2_DEBUG is not set | ||
2334 | CONFIG_FS_MBCACHE=y | ||
2335 | # CONFIG_REISERFS_FS is not set | ||
2336 | # CONFIG_JFS_FS is not set | ||
2337 | # CONFIG_XFS_FS is not set | ||
2338 | # CONFIG_GFS2_FS is not set | ||
2339 | # CONFIG_BTRFS_FS is not set | ||
2340 | # CONFIG_NILFS2_FS is not set | ||
2341 | # CONFIG_FS_POSIX_ACL is not set | ||
2342 | CONFIG_FILE_LOCKING=y | ||
2343 | CONFIG_FSNOTIFY=y | ||
2344 | CONFIG_DNOTIFY=y | ||
2345 | CONFIG_INOTIFY_USER=y | ||
2346 | # CONFIG_FANOTIFY is not set | ||
2347 | # CONFIG_QUOTA is not set | ||
2348 | # CONFIG_QUOTACTL is not set | ||
2349 | CONFIG_AUTOFS4_FS=m | ||
2350 | # CONFIG_FUSE_FS is not set | ||
2351 | |||
2352 | # | ||
2353 | # Caches | ||
2354 | # | ||
2355 | # CONFIG_FSCACHE is not set | ||
2356 | |||
2357 | # | ||
2358 | # CD-ROM/DVD Filesystems | ||
2359 | # | ||
2360 | # CONFIG_ISO9660_FS is not set | ||
2361 | # CONFIG_UDF_FS is not set | ||
2362 | |||
2363 | # | ||
2364 | # DOS/FAT/NT Filesystems | ||
2365 | # | ||
2366 | CONFIG_FAT_FS=y | ||
2367 | CONFIG_MSDOS_FS=y | ||
2368 | CONFIG_VFAT_FS=y | ||
2369 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
2370 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
2371 | # CONFIG_NTFS_FS is not set | ||
2372 | |||
2373 | # | ||
2374 | # Pseudo filesystems | ||
2375 | # | ||
2376 | CONFIG_PROC_FS=y | ||
2377 | CONFIG_PROC_SYSCTL=y | ||
2378 | CONFIG_PROC_PAGE_MONITOR=y | ||
2379 | CONFIG_SYSFS=y | ||
2380 | CONFIG_TMPFS=y | ||
2381 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
2382 | # CONFIG_TMPFS_XATTR is not set | ||
2383 | # CONFIG_HUGETLB_PAGE is not set | ||
2384 | # CONFIG_CONFIGFS_FS is not set | ||
2385 | CONFIG_MISC_FILESYSTEMS=y | ||
2386 | # CONFIG_ADFS_FS is not set | ||
2387 | # CONFIG_AFFS_FS is not set | ||
2388 | # CONFIG_HFS_FS is not set | ||
2389 | # CONFIG_HFSPLUS_FS is not set | ||
2390 | # CONFIG_BEFS_FS is not set | ||
2391 | # CONFIG_BFS_FS is not set | ||
2392 | # CONFIG_EFS_FS is not set | ||
2393 | CONFIG_JFFS2_FS=y | ||
2394 | CONFIG_JFFS2_FS_DEBUG=0 | ||
2395 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
2396 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
2397 | # CONFIG_JFFS2_SUMMARY is not set | ||
2398 | # CONFIG_JFFS2_FS_XATTR is not set | ||
2399 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
2400 | CONFIG_JFFS2_ZLIB=y | ||
2401 | # CONFIG_JFFS2_LZO is not set | ||
2402 | CONFIG_JFFS2_RTIME=y | ||
2403 | # CONFIG_JFFS2_RUBIN is not set | ||
2404 | CONFIG_UBIFS_FS=y | ||
2405 | # CONFIG_UBIFS_FS_XATTR is not set | ||
2406 | # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | ||
2407 | CONFIG_UBIFS_FS_LZO=y | ||
2408 | CONFIG_UBIFS_FS_ZLIB=y | ||
2409 | # CONFIG_UBIFS_FS_DEBUG is not set | ||
2410 | # CONFIG_LOGFS is not set | ||
2411 | CONFIG_CRAMFS=y | ||
2412 | # CONFIG_SQUASHFS is not set | ||
2413 | # CONFIG_VXFS_FS is not set | ||
2414 | # CONFIG_MINIX_FS is not set | ||
2415 | # CONFIG_OMFS_FS is not set | ||
2416 | # CONFIG_HPFS_FS is not set | ||
2417 | # CONFIG_QNX4FS_FS is not set | ||
2418 | # CONFIG_ROMFS_FS is not set | ||
2419 | # CONFIG_PSTORE is not set | ||
2420 | # CONFIG_SYSV_FS is not set | ||
2421 | # CONFIG_UFS_FS is not set | ||
2422 | CONFIG_NETWORK_FILESYSTEMS=y | ||
2423 | CONFIG_NFS_FS=y | ||
2424 | CONFIG_NFS_V3=y | ||
2425 | # CONFIG_NFS_V3_ACL is not set | ||
2426 | # CONFIG_NFS_V4 is not set | ||
2427 | CONFIG_ROOT_NFS=y | ||
2428 | # CONFIG_NFSD is not set | ||
2429 | CONFIG_LOCKD=y | ||
2430 | CONFIG_LOCKD_V4=y | ||
2431 | CONFIG_NFS_COMMON=y | ||
2432 | CONFIG_SUNRPC=y | ||
2433 | # CONFIG_CEPH_FS is not set | ||
2434 | # CONFIG_CIFS is not set | ||
2435 | # CONFIG_NCP_FS is not set | ||
2436 | # CONFIG_CODA_FS is not set | ||
2437 | # CONFIG_AFS_FS is not set | ||
2438 | |||
2439 | # | ||
2440 | # Partition Types | ||
2441 | # | ||
2442 | CONFIG_PARTITION_ADVANCED=y | ||
2443 | # CONFIG_ACORN_PARTITION is not set | ||
2444 | # CONFIG_OSF_PARTITION is not set | ||
2445 | # CONFIG_AMIGA_PARTITION is not set | ||
2446 | # CONFIG_ATARI_PARTITION is not set | ||
2447 | # CONFIG_MAC_PARTITION is not set | ||
2448 | CONFIG_MSDOS_PARTITION=y | ||
2449 | # CONFIG_BSD_DISKLABEL is not set | ||
2450 | # CONFIG_MINIX_SUBPARTITION is not set | ||
2451 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
2452 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
2453 | # CONFIG_LDM_PARTITION is not set | ||
2454 | # CONFIG_SGI_PARTITION is not set | ||
2455 | # CONFIG_ULTRIX_PARTITION is not set | ||
2456 | # CONFIG_SUN_PARTITION is not set | ||
2457 | # CONFIG_KARMA_PARTITION is not set | ||
2458 | CONFIG_EFI_PARTITION=y | ||
2459 | # CONFIG_SYSV68_PARTITION is not set | ||
2460 | CONFIG_NLS=y | ||
2461 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
2462 | CONFIG_NLS_CODEPAGE_437=y | ||
2463 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
2464 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
2465 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
2466 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
2467 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
2468 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
2469 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
2470 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
2471 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
2472 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
2473 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
2474 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
2475 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
2476 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
2477 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
2478 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
2479 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
2480 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
2481 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
2482 | # CONFIG_NLS_ISO8859_8 is not set | ||
2483 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
2484 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
2485 | CONFIG_NLS_ASCII=m | ||
2486 | CONFIG_NLS_ISO8859_1=y | ||
2487 | # CONFIG_NLS_ISO8859_2 is not set | ||
2488 | # CONFIG_NLS_ISO8859_3 is not set | ||
2489 | # CONFIG_NLS_ISO8859_4 is not set | ||
2490 | # CONFIG_NLS_ISO8859_5 is not set | ||
2491 | # CONFIG_NLS_ISO8859_6 is not set | ||
2492 | # CONFIG_NLS_ISO8859_7 is not set | ||
2493 | # CONFIG_NLS_ISO8859_9 is not set | ||
2494 | # CONFIG_NLS_ISO8859_13 is not set | ||
2495 | # CONFIG_NLS_ISO8859_14 is not set | ||
2496 | # CONFIG_NLS_ISO8859_15 is not set | ||
2497 | # CONFIG_NLS_KOI8_R is not set | ||
2498 | # CONFIG_NLS_KOI8_U is not set | ||
2499 | CONFIG_NLS_UTF8=m | ||
2500 | |||
2501 | # | ||
2502 | # Kernel hacking | ||
2503 | # | ||
2504 | # CONFIG_PRINTK_TIME is not set | ||
2505 | CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 | ||
2506 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
2507 | CONFIG_ENABLE_MUST_CHECK=y | ||
2508 | CONFIG_FRAME_WARN=1024 | ||
2509 | # CONFIG_MAGIC_SYSRQ is not set | ||
2510 | # CONFIG_STRIP_ASM_SYMS is not set | ||
2511 | # CONFIG_UNUSED_SYMBOLS is not set | ||
2512 | CONFIG_DEBUG_FS=y | ||
2513 | # CONFIG_HEADERS_CHECK is not set | ||
2514 | # CONFIG_DEBUG_SECTION_MISMATCH is not set | ||
2515 | # CONFIG_DEBUG_KERNEL is not set | ||
2516 | # CONFIG_HARDLOCKUP_DETECTOR is not set | ||
2517 | # CONFIG_SLUB_DEBUG_ON is not set | ||
2518 | # CONFIG_SLUB_STATS is not set | ||
2519 | # CONFIG_SPARSE_RCU_POINTER is not set | ||
2520 | CONFIG_DEBUG_BUGVERBOSE=y | ||
2521 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
2522 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 | ||
2523 | CONFIG_RCU_CPU_STALL_VERBOSE=y | ||
2524 | # CONFIG_LKDTM is not set | ||
2525 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
2526 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
2527 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
2528 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
2529 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
2530 | CONFIG_HAVE_C_RECORDMCOUNT=y | ||
2531 | CONFIG_TRACING_SUPPORT=y | ||
2532 | # CONFIG_FTRACE is not set | ||
2533 | # CONFIG_DYNAMIC_DEBUG is not set | ||
2534 | # CONFIG_DMA_API_DEBUG is not set | ||
2535 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
2536 | # CONFIG_SAMPLES is not set | ||
2537 | CONFIG_HAVE_ARCH_KGDB=y | ||
2538 | # CONFIG_TEST_KSTRTOX is not set | ||
2539 | # CONFIG_STRICT_DEVMEM is not set | ||
2540 | CONFIG_ARM_UNWIND=y | ||
2541 | # CONFIG_DEBUG_USER is not set | ||
2542 | CONFIG_OC_ETM=y | ||
2543 | |||
2544 | # | ||
2545 | # Security options | ||
2546 | # | ||
2547 | # CONFIG_KEYS is not set | ||
2548 | # CONFIG_SECURITY_DMESG_RESTRICT is not set | ||
2549 | # CONFIG_SECURITY is not set | ||
2550 | # CONFIG_SECURITYFS is not set | ||
2551 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
2552 | CONFIG_DEFAULT_SECURITY="" | ||
2553 | CONFIG_CRYPTO=y | ||
2554 | |||
2555 | # | ||
2556 | # Crypto core or helper | ||
2557 | # | ||
2558 | CONFIG_CRYPTO_ALGAPI=y | ||
2559 | CONFIG_CRYPTO_ALGAPI2=y | ||
2560 | CONFIG_CRYPTO_AEAD2=y | ||
2561 | CONFIG_CRYPTO_BLKCIPHER=y | ||
2562 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
2563 | CONFIG_CRYPTO_HASH=y | ||
2564 | CONFIG_CRYPTO_HASH2=y | ||
2565 | CONFIG_CRYPTO_RNG2=y | ||
2566 | CONFIG_CRYPTO_PCOMP2=y | ||
2567 | CONFIG_CRYPTO_MANAGER=y | ||
2568 | CONFIG_CRYPTO_MANAGER2=y | ||
2569 | CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | ||
2570 | # CONFIG_CRYPTO_GF128MUL is not set | ||
2571 | # CONFIG_CRYPTO_NULL is not set | ||
2572 | # CONFIG_CRYPTO_PCRYPT is not set | ||
2573 | CONFIG_CRYPTO_WORKQUEUE=y | ||
2574 | # CONFIG_CRYPTO_CRYPTD is not set | ||
2575 | # CONFIG_CRYPTO_AUTHENC is not set | ||
2576 | CONFIG_CRYPTO_TEST=m | ||
2577 | # CONFIG_CRYPTO_CRYPTODEV is not set | ||
2578 | |||
2579 | # | ||
2580 | # Authenticated Encryption with Associated Data | ||
2581 | # | ||
2582 | # CONFIG_CRYPTO_CCM is not set | ||
2583 | # CONFIG_CRYPTO_GCM is not set | ||
2584 | # CONFIG_CRYPTO_SEQIV is not set | ||
2585 | |||
2586 | # | ||
2587 | # Block modes | ||
2588 | # | ||
2589 | CONFIG_CRYPTO_CBC=y | ||
2590 | # CONFIG_CRYPTO_CTR is not set | ||
2591 | # CONFIG_CRYPTO_CTS is not set | ||
2592 | CONFIG_CRYPTO_ECB=y | ||
2593 | # CONFIG_CRYPTO_LRW is not set | ||
2594 | # CONFIG_CRYPTO_PCBC is not set | ||
2595 | # CONFIG_CRYPTO_XTS is not set | ||
2596 | |||
2597 | # | ||
2598 | # Hash modes | ||
2599 | # | ||
2600 | # CONFIG_CRYPTO_HMAC is not set | ||
2601 | # CONFIG_CRYPTO_XCBC is not set | ||
2602 | # CONFIG_CRYPTO_VMAC is not set | ||
2603 | |||
2604 | # | ||
2605 | # Digest | ||
2606 | # | ||
2607 | # CONFIG_CRYPTO_CRC32C is not set | ||
2608 | # CONFIG_CRYPTO_GHASH is not set | ||
2609 | # CONFIG_CRYPTO_MD4 is not set | ||
2610 | # CONFIG_CRYPTO_MD5 is not set | ||
2611 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
2612 | # CONFIG_CRYPTO_RMD128 is not set | ||
2613 | # CONFIG_CRYPTO_RMD160 is not set | ||
2614 | # CONFIG_CRYPTO_RMD256 is not set | ||
2615 | # CONFIG_CRYPTO_RMD320 is not set | ||
2616 | # CONFIG_CRYPTO_SHA1 is not set | ||
2617 | # CONFIG_CRYPTO_SHA256 is not set | ||
2618 | # CONFIG_CRYPTO_SHA512 is not set | ||
2619 | # CONFIG_CRYPTO_TGR192 is not set | ||
2620 | # CONFIG_CRYPTO_WP512 is not set | ||
2621 | |||
2622 | # | ||
2623 | # Ciphers | ||
2624 | # | ||
2625 | CONFIG_CRYPTO_AES=y | ||
2626 | # CONFIG_CRYPTO_ANUBIS is not set | ||
2627 | CONFIG_CRYPTO_ARC4=y | ||
2628 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
2629 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
2630 | # CONFIG_CRYPTO_CAST5 is not set | ||
2631 | # CONFIG_CRYPTO_CAST6 is not set | ||
2632 | # CONFIG_CRYPTO_DES is not set | ||
2633 | # CONFIG_CRYPTO_FCRYPT is not set | ||
2634 | # CONFIG_CRYPTO_KHAZAD is not set | ||
2635 | # CONFIG_CRYPTO_SALSA20 is not set | ||
2636 | # CONFIG_CRYPTO_SEED is not set | ||
2637 | # CONFIG_CRYPTO_SERPENT is not set | ||
2638 | # CONFIG_CRYPTO_TEA is not set | ||
2639 | # CONFIG_CRYPTO_TWOFISH is not set | ||
2640 | |||
2641 | # | ||
2642 | # Compression | ||
2643 | # | ||
2644 | CONFIG_CRYPTO_DEFLATE=y | ||
2645 | # CONFIG_CRYPTO_ZLIB is not set | ||
2646 | CONFIG_CRYPTO_LZO=y | ||
2647 | |||
2648 | # | ||
2649 | # Random Number Generation | ||
2650 | # | ||
2651 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
2652 | # CONFIG_CRYPTO_USER_API_HASH is not set | ||
2653 | # CONFIG_CRYPTO_USER_API_SKCIPHER is not set | ||
2654 | CONFIG_CRYPTO_HW=y | ||
2655 | # CONFIG_CRYPTO_DEV_FSL_CAAM is not set | ||
2656 | # CONFIG_CRYPTO_DEV_FSL_CAAM_SM is not set | ||
2657 | # CONFIG_BINARY_PRINTF is not set | ||
2658 | |||
2659 | # | ||
2660 | # Library routines | ||
2661 | # | ||
2662 | CONFIG_BITREVERSE=y | ||
2663 | CONFIG_RATIONAL=y | ||
2664 | CONFIG_CRC_CCITT=m | ||
2665 | CONFIG_CRC16=y | ||
2666 | # CONFIG_CRC_T10DIF is not set | ||
2667 | # CONFIG_CRC_ITU_T is not set | ||
2668 | CONFIG_CRC32=y | ||
2669 | # CONFIG_CRC7 is not set | ||
2670 | # CONFIG_LIBCRC32C is not set | ||
2671 | CONFIG_ZLIB_INFLATE=y | ||
2672 | CONFIG_ZLIB_DEFLATE=y | ||
2673 | CONFIG_LZO_COMPRESS=y | ||
2674 | CONFIG_LZO_DECOMPRESS=y | ||
2675 | # CONFIG_XZ_DEC is not set | ||
2676 | # CONFIG_XZ_DEC_BCJ is not set | ||
2677 | CONFIG_DECOMPRESS_GZIP=y | ||
2678 | CONFIG_GENERIC_ALLOCATOR=y | ||
2679 | CONFIG_HAS_IOMEM=y | ||
2680 | CONFIG_HAS_IOPORT=y | ||
2681 | CONFIG_HAS_DMA=y | ||
2682 | CONFIG_CPU_RMAP=y | ||
2683 | CONFIG_NLATTR=y | ||
2684 | # CONFIG_AVERAGE is not set | ||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch b/recipes-kernel/linux/linux-congatec-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch new file mode 100644 index 0000000..815d02c --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch | |||
@@ -0,0 +1,31 @@ | |||
1 | From b37a944f55a5010bd08297a63db0275540922f32 Mon Sep 17 00:00:00 2001 | ||
2 | From: Otavio Salvador <otavio@ossystems.com.br> | ||
3 | Date: Thu, 22 Aug 2013 16:31:29 -0300 | ||
4 | Subject: [PATCH] drm/vivante: Add ":00" sufix in returned bus Id | ||
5 | |||
6 | This makes the 3.0.35 compatible with a Xorg driver build for 3.5.7 or | ||
7 | newer kernels. | ||
8 | |||
9 | Upstream-Status: Inapropriate [embedded specific] | ||
10 | |||
11 | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> | ||
12 | --- | ||
13 | drivers/gpu/drm/vivante/vivante_drv.c | 2 +- | ||
14 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
15 | |||
16 | diff --git a/drivers/gpu/drm/vivante/vivante_drv.c b/drivers/gpu/drm/vivante/vivante_drv.c | ||
17 | index 4224608..cea360d 100644 | ||
18 | --- a/drivers/gpu/drm/vivante/vivante_drv.c | ||
19 | +++ b/drivers/gpu/drm/vivante/vivante_drv.c | ||
20 | @@ -55,7 +55,7 @@ | ||
21 | |||
22 | #include "drm_pciids.h" | ||
23 | |||
24 | -static char platformdevicename[] = "Vivante GCCore"; | ||
25 | +static char platformdevicename[] = "Vivante GCCore:00"; | ||
26 | static struct platform_device *pplatformdev; | ||
27 | |||
28 | static struct drm_driver driver = { | ||
29 | -- | ||
30 | 1.8.4.rc1 | ||
31 | |||
diff --git a/recipes-kernel/linux/linux-congatec-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch b/recipes-kernel/linux/linux-congatec-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch new file mode 100644 index 0000000..0a20b3f --- /dev/null +++ b/recipes-kernel/linux/linux-congatec-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch | |||
@@ -0,0 +1,143 @@ | |||
1 | From 149545df26169d257b144ff78934ce9cb5b6818b Mon Sep 17 00:00:00 2001 | ||
2 | From: Otavio Salvador <otavio@ossystems.com.br> | ||
3 | Date: Sat, 19 Oct 2013 10:55:11 -0300 | ||
4 | Subject: [PATCH] epdc: Rename mxcfb_epdc_kernel.h to mxc_epdc.h | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | This allow for forward compatibility with imx-test >= 3.10.9-1.0.0. | ||
8 | |||
9 | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> | ||
10 | --- | ||
11 | drivers/video/mxc/mxc_epdc_fb.c | 2 +- | ||
12 | include/linux/mxcfb_epdc.h | 49 +++++++++++++++++++++++++++++++++++++++ | ||
13 | include/linux/mxcfb_epdc_kernel.h | 49 --------------------------------------- | ||
14 | 3 files changed, 50 insertions(+), 50 deletions(-) | ||
15 | create mode 100644 include/linux/mxcfb_epdc.h | ||
16 | delete mode 100644 include/linux/mxcfb_epdc_kernel.h | ||
17 | |||
18 | diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c | ||
19 | index 4103498..b3ef8ea 100644 | ||
20 | --- a/drivers/video/mxc/mxc_epdc_fb.c | ||
21 | +++ b/drivers/video/mxc/mxc_epdc_fb.c | ||
22 | @@ -43,7 +43,7 @@ | ||
23 | #include <linux/dmaengine.h> | ||
24 | #include <linux/pxp_dma.h> | ||
25 | #include <linux/mxcfb.h> | ||
26 | -#include <linux/mxcfb_epdc_kernel.h> | ||
27 | +#include <linux/mxcfb_epdc.h> | ||
28 | #include <linux/gpio.h> | ||
29 | #include <linux/regulator/driver.h> | ||
30 | #include <linux/fsl_devices.h> | ||
31 | diff --git a/include/linux/mxcfb_epdc.h b/include/linux/mxcfb_epdc.h | ||
32 | new file mode 100644 | ||
33 | index 0000000..06fea6f | ||
34 | --- /dev/null | ||
35 | +++ b/include/linux/mxcfb_epdc.h | ||
36 | @@ -0,0 +1,49 @@ | ||
37 | +/* | ||
38 | + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
39 | + * | ||
40 | + * This program is free software; you can redistribute it and/or modify | ||
41 | + * it under the terms of the GNU General Public License as published by | ||
42 | + * the Free Software Foundation; either version 2 of the License, or | ||
43 | + * (at your option) any later version. | ||
44 | + * | ||
45 | + * This program is distributed in the hope that it will be useful, | ||
46 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
47 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
48 | + * GNU General Public License for more details. | ||
49 | + * | ||
50 | + * You should have received a copy of the GNU General Public License | ||
51 | + * along with this program; if not, write to the Free Software | ||
52 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
53 | + * | ||
54 | + */ | ||
55 | +#ifndef _MXCFB_EPDC_KERNEL | ||
56 | +#define _MXCFB_EPDC_KERNEL | ||
57 | + | ||
58 | +void mxc_epdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes, | ||
59 | + struct fb_info *info); | ||
60 | +int mxc_epdc_fb_set_temperature(int temperature, struct fb_info *info); | ||
61 | +int mxc_epdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info); | ||
62 | +int mxc_epdc_fb_send_update(struct mxcfb_update_data *upd_data, | ||
63 | + struct fb_info *info); | ||
64 | +int mxc_epdc_fb_wait_update_complete( | ||
65 | + struct mxcfb_update_marker_data *marker_data, | ||
66 | + struct fb_info *info); | ||
67 | +int mxc_epdc_fb_set_pwrdown_delay(u32 pwrdown_delay, | ||
68 | + struct fb_info *info); | ||
69 | +int mxc_epdc_get_pwrdown_delay(struct fb_info *info); | ||
70 | +int mxc_epdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info); | ||
71 | + | ||
72 | +void mxc_spdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes, | ||
73 | + struct fb_info *info); | ||
74 | +int mxc_spdc_fb_set_temperature(int temperature, struct fb_info *info); | ||
75 | +int mxc_spdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info); | ||
76 | +int mxc_spdc_fb_send_update(struct mxcfb_update_data *upd_data, | ||
77 | + struct fb_info *info); | ||
78 | +int mxc_spdc_fb_wait_update_complete( | ||
79 | + struct mxcfb_update_marker_data *marker_data, | ||
80 | + struct fb_info *info); | ||
81 | +int mxc_spdc_fb_set_pwrdown_delay(u32 pwrdown_delay, | ||
82 | + struct fb_info *info); | ||
83 | +int mxc_spdc_get_pwrdown_delay(struct fb_info *info); | ||
84 | +int mxc_spdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info); | ||
85 | +#endif | ||
86 | diff --git a/include/linux/mxcfb_epdc_kernel.h b/include/linux/mxcfb_epdc_kernel.h | ||
87 | deleted file mode 100644 | ||
88 | index 06fea6f..0000000 | ||
89 | --- a/include/linux/mxcfb_epdc_kernel.h | ||
90 | +++ /dev/null | ||
91 | @@ -1,49 +0,0 @@ | ||
92 | -/* | ||
93 | - * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. | ||
94 | - * | ||
95 | - * This program is free software; you can redistribute it and/or modify | ||
96 | - * it under the terms of the GNU General Public License as published by | ||
97 | - * the Free Software Foundation; either version 2 of the License, or | ||
98 | - * (at your option) any later version. | ||
99 | - * | ||
100 | - * This program is distributed in the hope that it will be useful, | ||
101 | - * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
102 | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
103 | - * GNU General Public License for more details. | ||
104 | - * | ||
105 | - * You should have received a copy of the GNU General Public License | ||
106 | - * along with this program; if not, write to the Free Software | ||
107 | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
108 | - * | ||
109 | - */ | ||
110 | -#ifndef _MXCFB_EPDC_KERNEL | ||
111 | -#define _MXCFB_EPDC_KERNEL | ||
112 | - | ||
113 | -void mxc_epdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes, | ||
114 | - struct fb_info *info); | ||
115 | -int mxc_epdc_fb_set_temperature(int temperature, struct fb_info *info); | ||
116 | -int mxc_epdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info); | ||
117 | -int mxc_epdc_fb_send_update(struct mxcfb_update_data *upd_data, | ||
118 | - struct fb_info *info); | ||
119 | -int mxc_epdc_fb_wait_update_complete( | ||
120 | - struct mxcfb_update_marker_data *marker_data, | ||
121 | - struct fb_info *info); | ||
122 | -int mxc_epdc_fb_set_pwrdown_delay(u32 pwrdown_delay, | ||
123 | - struct fb_info *info); | ||
124 | -int mxc_epdc_get_pwrdown_delay(struct fb_info *info); | ||
125 | -int mxc_epdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info); | ||
126 | - | ||
127 | -void mxc_spdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes, | ||
128 | - struct fb_info *info); | ||
129 | -int mxc_spdc_fb_set_temperature(int temperature, struct fb_info *info); | ||
130 | -int mxc_spdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info); | ||
131 | -int mxc_spdc_fb_send_update(struct mxcfb_update_data *upd_data, | ||
132 | - struct fb_info *info); | ||
133 | -int mxc_spdc_fb_wait_update_complete( | ||
134 | - struct mxcfb_update_marker_data *marker_data, | ||
135 | - struct fb_info *info); | ||
136 | -int mxc_spdc_fb_set_pwrdown_delay(u32 pwrdown_delay, | ||
137 | - struct fb_info *info); | ||
138 | -int mxc_spdc_get_pwrdown_delay(struct fb_info *info); | ||
139 | -int mxc_spdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info); | ||
140 | -#endif | ||
141 | -- | ||
142 | 1.8.4.rc3 | ||
143 | |||