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authorOtavio Salvador <otavio@ossystems.com.br>2015-11-05 19:49:27 -0200
committerOtavio Salvador <otavio@ossystems.com.br>2016-04-19 15:03:22 -0300
commit807a649c3fd0c1668cc69f236efa8515412e7a0f (patch)
tree7ce952e305c187e6a1b369270bdd8c2602f12717 /recipes-bsp
parent6bf6b345fbebb3542cec6e9173adde8147b4f153 (diff)
downloadmeta-freescale-807a649c3fd0c1668cc69f236efa8515412e7a0f.tar.gz
u-boot-fslc: Update revision to 1b6aee7
This includes following backported changes from 2016.01 development tree: 1b6aee7 mx7dsabresd: add secure boot support 54021ea imx: hab: add mx7 secure boot support eea967b imx: hab: use read_fuse for secure boot settings cca95ea arm: imx: add secure boot fuse details for imx7 SoC 5ef219e arm: imx: add secure boot fuse details for imx6 SoC b2842cc imx: hab: add secure boot fuse details 31454f2 imx: hab: rework unified rom section for mx7 9ac3e4b imx: hab: use unified rom section for mx6sx and mx6ul 20235de imx: hab: rework secure boot support for imx6 8574461 imx: cpu: move common chip revision id's a0c37ef imx: mx6sabresd: add i.MX6DQP Sabresd support 93bcc5f imx35, flea3: add FIT image support 10ca202 ts4800: add CONFIG_OF_LIBFDT 4198580 arm, imx6, aristainetos2: set gpr register after reset e06ab75 arm, imx: add some gpr register defines 8af784c driver: misc: add MXC_OCOTP Kconfig entry a022163 imx-common: timer: clean up code Besides those, it also include: 4238786 cgtqmx6eval: Fix SPL support Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'recipes-bsp')
-rw-r--r--recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb2
-rw-r--r--recipes-bsp/u-boot/u-boot-fslc_2015.10.bb2
2 files changed, 2 insertions, 2 deletions
diff --git a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb
index ecbf2a3e..c8c9a436 100644
--- a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb
+++ b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2015.10.bb
@@ -7,7 +7,7 @@ PROVIDES = "u-boot-mxsboot"
7 7
8PV = "v2015.10+git${SRCPV}" 8PV = "v2015.10+git${SRCPV}"
9 9
10SRCREV = "23575d2d1b958952c42348e4aee96969eab3e1f2" 10SRCREV = "1b6aee73e60023ae4ba16b11ce7bc23e0e8552f7"
11SRCBRANCH = "2015.10+fslc" 11SRCBRANCH = "2015.10+fslc"
12 12
13SRC_URI = "git://github.com/Freescale/u-boot-fslc.git;branch=${SRCBRANCH}" 13SRC_URI = "git://github.com/Freescale/u-boot-fslc.git;branch=${SRCBRANCH}"
diff --git a/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb b/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb
index ac763787..d326abe5 100644
--- a/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb
+++ b/recipes-bsp/u-boot/u-boot-fslc_2015.10.bb
@@ -2,5 +2,5 @@ include u-boot-fslc.inc
2 2
3PV = "v2015.10+git${SRCPV}" 3PV = "v2015.10+git${SRCPV}"
4 4
5SRCREV = "23575d2d1b958952c42348e4aee96969eab3e1f2" 5SRCREV = "1b6aee73e60023ae4ba16b11ce7bc23e0e8552f7"
6SRCBRANCH = "2015.10+fslc" 6SRCBRANCH = "2015.10+fslc"