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authorTing Liu <ting.liu@nxp.com>2021-10-14 15:57:26 +0800
committerTing Liu <ting.liu@nxp.com>2021-10-15 21:17:52 +0800
commit115d33d607bbf3b743a8047861883e0275271222 (patch)
tree435b3cf5de775b3dbd4bf20cda110ca40fdabcab /recipes-bsp/atf
parent426a8d3ddc8ef0b2e293d8f0d82b56be64884025 (diff)
downloadmeta-freescale-115d33d607bbf3b743a8047861883e0275271222.tar.gz
qoriq-atf: upgrade to 2.4
Signed-off-by: Ting Liu <ting.liu@nxp.com>
Diffstat (limited to 'recipes-bsp/atf')
-rw-r--r--recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch709
-rw-r--r--recipes-bsp/atf/qoriq-atf-2.3.inc13
-rw-r--r--recipes-bsp/atf/qoriq-atf-2.4.inc10
-rw-r--r--recipes-bsp/atf/qoriq-atf-tools_2.4.bb (renamed from recipes-bsp/atf/qoriq-atf-tools_2.3.bb)5
-rw-r--r--recipes-bsp/atf/qoriq-atf_1.5.bb248
-rw-r--r--recipes-bsp/atf/qoriq-atf_2.3.bb175
-rw-r--r--recipes-bsp/atf/qoriq-atf_2.4.bb186
7 files changed, 198 insertions, 1148 deletions
diff --git a/recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch b/recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch
deleted file mode 100644
index e3b6f860..00000000
--- a/recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch
+++ /dev/null
@@ -1,709 +0,0 @@
1From 9f85f9e3796f1c351bbc4c8436dc66d83c140b71 Mon Sep 17 00:00:00 2001
2From: Joel Hutton <Joel.Hutton@Arm.com>
3Date: Wed, 21 Mar 2018 11:40:57 +0000
4Subject: [PATCH] Clean usage of void pointers to access symbols
5
6Void pointers have been used to access linker symbols, by declaring an
7extern pointer, then taking the address of it. This limits symbols
8values to aligned pointer values. To remove this restriction an
9IMPORT_SYM macro has been introduced, which declares it as a char
10pointer and casts it to the required type.
11
12Upstream-Status: Backport
13
14Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
15Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
16---
17 bl1/bl1_private.h | 12 +++----
18 common/runtime_svc.c | 4 +--
19 drivers/auth/img_parser_mod.c | 9 +++---
20 include/common/bl_common.h | 32 ++++++++++++-------
21 include/common/runtime_svc.h | 4 +--
22 include/lib/utils_def.h | 19 ++++++++++-
23 include/plat/common/common_def.h | 24 ++------------
24 include/services/secure_partition.h | 12 +++----
25 lib/locks/bakery/bakery_lock_normal.c | 6 ++--
26 lib/pmf/pmf_main.c | 19 +++++------
27 plat/hisilicon/hikey/hikey_bl1_setup.c | 21 ++-----------
28 plat/hisilicon/hikey960/hikey960_bl1_setup.c | 16 ++--------
29 plat/hisilicon/poplar/bl1_plat_setup.c | 13 ++------
30 plat/mediatek/mt6795/bl31_plat_setup.c | 11 +++----
31 plat/mediatek/mt8173/bl31_plat_setup.c | 28 +++--------------
32 plat/nvidia/tegra/common/tegra_bl31_setup.c | 33 +++++++-------------
33 plat/rockchip/common/bl31_plat_setup.c | 13 ++------
34 services/std_svc/spm/spm_shim_private.h | 14 +++------
35 18 files changed, 103 insertions(+), 187 deletions(-)
36
37diff --git a/bl1/bl1_private.h b/bl1/bl1_private.h
38index 6ac3b8c67..42a74d22f 100644
39--- a/bl1/bl1_private.h
40+++ b/bl1/bl1_private.h
41@@ -1,5 +1,5 @@
42 /*
43- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
44+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
45 *
46 * SPDX-License-Identifier: BSD-3-Clause
47 */
48@@ -8,18 +8,16 @@
49 #define __BL1_PRIVATE_H__
50
51 #include <types.h>
52+#include <utils_def.h>
53
54 /*******************************************************************************
55 * Declarations of linker defined symbols which will tell us where BL1 lives
56 * in Trusted ROM and RAM
57 ******************************************************************************/
58-extern uintptr_t __BL1_ROM_END__;
59-#define BL1_ROM_END (uintptr_t)(&__BL1_ROM_END__)
60+IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END);
61
62-extern uintptr_t __BL1_RAM_START__;
63-extern uintptr_t __BL1_RAM_END__;
64-#define BL1_RAM_BASE (uintptr_t)(&__BL1_RAM_START__)
65-#define BL1_RAM_LIMIT (uintptr_t)(&__BL1_RAM_END__)
66+IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE);
67+IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT);
68
69 /******************************************
70 * Function prototypes
71diff --git a/common/runtime_svc.c b/common/runtime_svc.c
72index 0ea4cd093..de80f30c2 100644
73--- a/common/runtime_svc.c
74+++ b/common/runtime_svc.c
75@@ -1,5 +1,5 @@
76 /*
77- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
78+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
79 *
80 * SPDX-License-Identifier: BSD-3-Clause
81 */
82@@ -19,8 +19,6 @@
83 * 'rt_svc_descs_indices' array. This gives the index of the descriptor in the
84 * 'rt_svc_descs' array which contains the SMC handler.
85 ******************************************************************************/
86-#define RT_SVC_DESCS_START ((uintptr_t) (&__RT_SVC_DESCS_START__))
87-#define RT_SVC_DESCS_END ((uintptr_t) (&__RT_SVC_DESCS_END__))
88 uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
89 static rt_svc_desc_t *rt_svc_descs;
90
91diff --git a/drivers/auth/img_parser_mod.c b/drivers/auth/img_parser_mod.c
92index 6a0107115..63160141d 100644
93--- a/drivers/auth/img_parser_mod.c
94+++ b/drivers/auth/img_parser_mod.c
95@@ -1,5 +1,5 @@
96 /*
97- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
98+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
99 *
100 * SPDX-License-Identifier: BSD-3-Clause
101 */
102@@ -12,11 +12,10 @@
103 #include <limits.h>
104 #include <stdint.h>
105 #include <string.h>
106+#include <utils_def.h>
107
108-extern uintptr_t __PARSER_LIB_DESCS_START__;
109-extern uintptr_t __PARSER_LIB_DESCS_END__;
110-#define PARSER_LIB_DESCS_START ((uintptr_t) (&__PARSER_LIB_DESCS_START__))
111-#define PARSER_LIB_DESCS_END ((uintptr_t) (&__PARSER_LIB_DESCS_END__))
112+IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_START__, PARSER_LIB_DESCS_START);
113+IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_END__, PARSER_LIB_DESCS_END);
114 static unsigned int parser_lib_indices[IMG_MAX_TYPES];
115 static img_parser_lib_desc_t *parser_lib_descs;
116
117diff --git a/include/common/bl_common.h b/include/common/bl_common.h
118index 4ef916f53..09a394dd1 100644
119--- a/include/common/bl_common.h
120+++ b/include/common/bl_common.h
121@@ -64,33 +64,41 @@
122 #include <types.h>
123 #include <utils_def.h> /* To retain compatibility */
124
125+
126 /*
127 * Declarations of linker defined symbols to help determine memory layout of
128 * BL images
129 */
130 #if SEPARATE_CODE_AND_RODATA
131-extern uintptr_t __TEXT_START__;
132-extern uintptr_t __TEXT_END__;
133-extern uintptr_t __RODATA_START__;
134-extern uintptr_t __RODATA_END__;
135+IMPORT_SYM(unsigned long, __TEXT_START__, BL_CODE_BASE);
136+IMPORT_SYM(unsigned long, __TEXT_END__, BL_CODE_END);
137+IMPORT_SYM(unsigned long, __RODATA_START__, BL_RO_DATA_BASE);
138+IMPORT_SYM(unsigned long, __RODATA_END__, BL_RO_DATA_END);
139 #else
140-extern uintptr_t __RO_START__;
141-extern uintptr_t __RO_END__;
142+IMPORT_SYM(unsigned long, __RO_START__, BL_CODE_BASE);
143+IMPORT_SYM(unsigned long, __RO_END__, BL_CODE_END);
144 #endif
145
146 #if defined(IMAGE_BL2)
147-extern uintptr_t __BL2_END__;
148+IMPORT_SYM(unsigned long, __BL2_END__, BL2_END);
149 #elif defined(IMAGE_BL2U)
150-extern uintptr_t __BL2U_END__;
151+IMPORT_SYM(unsigned long, __BL2U_END__, BL2U_END);
152 #elif defined(IMAGE_BL31)
153-extern uintptr_t __BL31_END__;
154+IMPORT_SYM(unsigned long, __BL31_END__, BL31_END);
155 #elif defined(IMAGE_BL32)
156-extern uintptr_t __BL32_END__;
157+IMPORT_SYM(unsigned long, __BL32_END__, BL32_END);
158 #endif /* IMAGE_BLX */
159
160+/*
161+ * The next 2 constants identify the extents of the coherent memory region.
162+ * These addresses are used by the MMU setup code and therefore they must be
163+ * page-aligned. It is the responsibility of the linker script to ensure that
164+ * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
165+ * page-aligned addresses.
166+ */
167 #if USE_COHERENT_MEM
168-extern uintptr_t __COHERENT_RAM_START__;
169-extern uintptr_t __COHERENT_RAM_END__;
170+IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE);
171+IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL_COHERENT_RAM_END);
172 #endif
173
174 /*******************************************************************************
175diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h
176index d12af227e..5d9fa3908 100644
177--- a/include/common/runtime_svc.h
178+++ b/include/common/runtime_svc.h
179@@ -122,8 +122,8 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
180 void runtime_svc_init(void);
181 uintptr_t handle_runtime_svc(uint32_t smc_fid, void *cookie, void *handle,
182 unsigned int flags);
183-extern uintptr_t __RT_SVC_DESCS_START__;
184-extern uintptr_t __RT_SVC_DESCS_END__;
185+IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_START__, RT_SVC_DESCS_START);
186+IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_END__, RT_SVC_DESCS_END);
187 void init_crash_reporting(void);
188
189 extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
190diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
191index 4a5c3e0bc..8abc73c09 100644
192--- a/include/lib/utils_def.h
193+++ b/include/lib/utils_def.h
194@@ -1,5 +1,5 @@
195 /*
196- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
197+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
198 *
199 * SPDX-License-Identifier: BSD-3-Clause
200 */
201@@ -99,4 +99,21 @@
202 ((ARM_ARCH_MAJOR > _maj) || \
203 ((ARM_ARCH_MAJOR == _maj) && (ARM_ARCH_MINOR >= _min)))
204
205+/*
206+ * Import an assembly or linker symbol as a C expression with the specified
207+ * type
208+ */
209+#define IMPORT_SYM(type, sym, name) \
210+ extern char sym[];\
211+ static const __attribute__((unused)) type name = (type) sym;
212+
213+/*
214+ * When the symbol is used to hold a pointer, its alignment can be asserted
215+ * with this macro. For example, if there is a linker symbol that is going to
216+ * be used as a 64-bit pointer, the value of the linker symbol must also be
217+ * aligned to 64 bit. This macro makes sure this is the case.
218+ */
219+#define ASSERT_SYM_PTR_ALIGN(sym) assert(((size_t)(sym) % __alignof__(*(sym))) == 0)
220+
221+
222 #endif /* __UTILS_DEF_H__ */
223diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
224index a841c3dbf..84923b9a7 100644
225--- a/include/plat/common/common_def.h
226+++ b/include/plat/common/common_def.h
227@@ -1,5 +1,5 @@
228 /*
229- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
230+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
231 *
232 * SPDX-License-Identifier: BSD-3-Clause
233 */
234@@ -74,33 +74,13 @@
235 * page of it with the right memory attributes.
236 */
237 #if SEPARATE_CODE_AND_RODATA
238-#define BL_CODE_BASE (unsigned long)(&__TEXT_START__)
239-#define BL_CODE_END (unsigned long)(&__TEXT_END__)
240-#define BL_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
241-#define BL_RO_DATA_END (unsigned long)(&__RODATA_END__)
242
243 #define BL1_CODE_END BL_CODE_END
244-#define BL1_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
245+#define BL1_RO_DATA_BASE BL_RO_DATA_BASE
246 #define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
247 #else
248-#define BL_CODE_BASE (unsigned long)(&__RO_START__)
249-#define BL_CODE_END (unsigned long)(&__RO_END__)
250 #define BL_RO_DATA_BASE 0
251 #define BL_RO_DATA_END 0
252-
253 #define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
254-#define BL1_RO_DATA_BASE 0
255-#define BL1_RO_DATA_END 0
256 #endif /* SEPARATE_CODE_AND_RODATA */
257-
258-/*
259- * The next 2 constants identify the extents of the coherent memory region.
260- * These addresses are used by the MMU setup code and therefore they must be
261- * page-aligned. It is the responsibility of the linker script to ensure that
262- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
263- * page-aligned addresses.
264- */
265-#define BL_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
266-#define BL_COHERENT_RAM_END (unsigned long)(&__COHERENT_RAM_END__)
267-
268 #endif /* __COMMON_DEF_H__ */
269diff --git a/include/services/secure_partition.h b/include/services/secure_partition.h
270index 93df2a137..f68f711be 100644
271--- a/include/services/secure_partition.h
272+++ b/include/services/secure_partition.h
273@@ -1,5 +1,5 @@
274 /*
275- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
276+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
277 *
278 * SPDX-License-Identifier: BSD-3-Clause
279 */
280@@ -11,15 +11,11 @@
281 #include <types.h>
282 #include <utils_def.h>
283
284-/* Linker symbols */
285-extern uintptr_t __SP_IMAGE_XLAT_TABLES_START__;
286-extern uintptr_t __SP_IMAGE_XLAT_TABLES_END__;
287+/* Import linker symbols */
288+IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_START__, SP_IMAGE_XLAT_TABLES_START);
289+IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_END__, SP_IMAGE_XLAT_TABLES_END);
290
291 /* Definitions */
292-#define SP_IMAGE_XLAT_TABLES_START \
293- (uintptr_t)(&__SP_IMAGE_XLAT_TABLES_START__)
294-#define SP_IMAGE_XLAT_TABLES_END \
295- (uintptr_t)(&__SP_IMAGE_XLAT_TABLES_END__)
296 #define SP_IMAGE_XLAT_TABLES_SIZE \
297 (SP_IMAGE_XLAT_TABLES_END - SP_IMAGE_XLAT_TABLES_START)
298
299diff --git a/lib/locks/bakery/bakery_lock_normal.c b/lib/locks/bakery/bakery_lock_normal.c
300index 8f59215e3..37697f521 100644
301--- a/lib/locks/bakery/bakery_lock_normal.c
302+++ b/lib/locks/bakery/bakery_lock_normal.c
303@@ -1,5 +1,5 @@
304 /*
305- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
306+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
307 *
308 * SPDX-License-Identifier: BSD-3-Clause
309 */
310@@ -10,6 +10,7 @@
311 #include <cpu_data.h>
312 #include <platform.h>
313 #include <string.h>
314+#include <utils_def.h>
315
316 /*
317 * Functions in this file implement Bakery Algorithm for mutual exclusion with the
318@@ -49,8 +50,7 @@ CASSERT((PLAT_PERCPU_BAKERY_LOCK_SIZE & (CACHE_WRITEBACK_GRANULE - 1)) == 0, \
319 * Use the linker defined symbol which has evaluated the size reqiurement.
320 * This is not as efficient as using a platform defined constant
321 */
322-extern void *__PERCPU_BAKERY_LOCK_SIZE__;
323-#define PERCPU_BAKERY_LOCK_SIZE ((uintptr_t)&__PERCPU_BAKERY_LOCK_SIZE__)
324+IMPORT_SYM(uintptr_t, __PERCPU_BAKERY_LOCK_SIZE__, PERCPU_BAKERY_LOCK_SIZE);
325 #endif
326
327 #define get_bakery_info(cpu_ix, lock) \
328diff --git a/lib/pmf/pmf_main.c b/lib/pmf/pmf_main.c
329index 2cf260ec1..0208948fe 100644
330--- a/lib/pmf/pmf_main.c
331+++ b/lib/pmf/pmf_main.c
332@@ -1,5 +1,5 @@
333 /*
334- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
335+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
336 *
337 * SPDX-License-Identifier: BSD-3-Clause
338 */
339@@ -11,6 +11,7 @@
340 #include <platform.h>
341 #include <pmf.h>
342 #include <string.h>
343+#include <utils_def.h>
344
345 /*******************************************************************************
346 * The 'pmf_svc_descs' array holds the PMF service descriptors exported by
347@@ -21,16 +22,12 @@
348 * index of the descriptor in the 'pmf_svc_descs' array which contains the
349 * service function pointers.
350 ******************************************************************************/
351-extern uintptr_t __PMF_SVC_DESCS_START__;
352-extern uintptr_t __PMF_SVC_DESCS_END__;
353-#define PMF_SVC_DESCS_START ((uintptr_t)(&__PMF_SVC_DESCS_START__))
354-#define PMF_SVC_DESCS_END ((uintptr_t)(&__PMF_SVC_DESCS_END__))
355-extern void *__PERCPU_TIMESTAMP_SIZE__;
356-#define PMF_PERCPU_TIMESTAMP_SIZE ((uintptr_t)&__PERCPU_TIMESTAMP_SIZE__)
357-extern uintptr_t __PMF_TIMESTAMP_START__;
358-#define PMF_TIMESTAMP_ARRAY_START ((uintptr_t)&__PMF_TIMESTAMP_START__)
359-extern uintptr_t __PMF_TIMESTAMP_END__;
360-#define PMF_TIMESTAMP_ARRAY_END ((uintptr_t)&__PMF_TIMESTAMP_END__)
361+
362+IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_START__, PMF_SVC_DESCS_START);
363+IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_END__, PMF_SVC_DESCS_END);
364+IMPORT_SYM(uintptr_t, __PERCPU_TIMESTAMP_SIZE__, PMF_PERCPU_TIMESTAMP_SIZE);
365+IMPORT_SYM(intptr_t, __PMF_TIMESTAMP_START__, PMF_TIMESTAMP_ARRAY_START);
366+IMPORT_SYM(uintptr_t, __PMF_TIMESTAMP_END__, PMF_TIMESTAMP_ARRAY_END);
367
368 #define PMF_SVC_DESCS_MAX 10
369
370diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
371index 69b194a53..9ede1dbc7 100644
372--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
373+++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
374@@ -23,23 +23,6 @@
375 #include "hikey_def.h"
376 #include "hikey_private.h"
377
378-/*
379- * Declarations of linker defined symbols which will help us find the layout
380- * of trusted RAM
381- */
382-extern unsigned long __COHERENT_RAM_START__;
383-extern unsigned long __COHERENT_RAM_END__;
384-
385-/*
386- * The next 2 constants identify the extents of the coherent memory region.
387- * These addresses are used by the MMU setup code and therefore they must be
388- * page-aligned. It is the responsibility of the linker script to ensure that
389- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
390- * page-aligned addresses.
391- */
392-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
393-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
394-
395 /* Data structure which holds the extents of the trusted RAM for BL1 */
396 static meminfo_t bl1_tzram_layout;
397
398@@ -103,8 +86,8 @@ void bl1_plat_arch_setup(void)
399 bl1_tzram_layout.total_size,
400 BL1_RO_BASE,
401 BL1_RO_LIMIT,
402- BL1_COHERENT_RAM_BASE,
403- BL1_COHERENT_RAM_LIMIT);
404+ BL_COHERENT_RAM_BASE,
405+ BL_COHERENT_RAM_END);
406 }
407
408 /*
409diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
410index 9cadba0bb..6a07f0924 100644
411--- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c
412+++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
413@@ -37,18 +37,6 @@ enum {
414 * Declarations of linker defined symbols which will help us find the layout
415 * of trusted RAM
416 */
417-extern unsigned long __COHERENT_RAM_START__;
418-extern unsigned long __COHERENT_RAM_END__;
419-
420-/*
421- * The next 2 constants identify the extents of the coherent memory region.
422- * These addresses are used by the MMU setup code and therefore they must be
423- * page-aligned. It is the responsibility of the linker script to ensure that
424- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
425- * page-aligned addresses.
426- */
427-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
428-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
429
430 /* Data structure which holds the extents of the trusted RAM for BL1 */
431 static meminfo_t bl1_tzram_layout;
432@@ -131,8 +119,8 @@ void bl1_plat_arch_setup(void)
433 bl1_tzram_layout.total_size,
434 BL1_RO_BASE,
435 BL1_RO_LIMIT,
436- BL1_COHERENT_RAM_BASE,
437- BL1_COHERENT_RAM_LIMIT);
438+ BL_COHERENT_RAM_BASE,
439+ BL_COHERENT_RAM_END);
440 }
441
442 static void hikey960_ufs_reset(void)
443diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
444index 39551135f..25eed5938 100644
445--- a/plat/hisilicon/poplar/bl1_plat_setup.c
446+++ b/plat/hisilicon/poplar/bl1_plat_setup.c
447@@ -1,5 +1,5 @@
448 /*
449- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
450+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
451 *
452 * SPDX-License-Identifier: BSD-3-Clause
453 */
454@@ -23,13 +23,6 @@
455 #include "hi3798cv200.h"
456 #include "plat_private.h"
457
458-/* Symbols from link script for conherent section */
459-extern unsigned long __COHERENT_RAM_START__;
460-extern unsigned long __COHERENT_RAM_END__;
461-
462-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
463-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
464-
465 /* Data structure which holds the extents of the trusted RAM for BL1 */
466 static meminfo_t bl1_tzram_layout;
467
468@@ -92,8 +85,8 @@ void bl1_plat_arch_setup(void)
469 bl1_tzram_layout.total_size,
470 BL1_RO_BASE, /* l-loader and BL1 ROM */
471 BL1_RO_LIMIT,
472- BL1_COHERENT_RAM_BASE,
473- BL1_COHERENT_RAM_LIMIT);
474+ BL_COHERENT_RAM_BASE,
475+ BL_COHERENT_RAM_END);
476 }
477
478 void bl1_platform_setup(void)
479diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c
480index 803f1ed85..32f015721 100644
481--- a/plat/mediatek/mt6795/bl31_plat_setup.c
482+++ b/plat/mediatek/mt6795/bl31_plat_setup.c
483@@ -1,5 +1,5 @@
484 /*
485- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
486+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
487 *
488 * SPDX-License-Identifier: BSD-3-Clause
489 */
490@@ -21,22 +21,21 @@
491 #include <plat_private.h>
492 #include <platform.h>
493 #include <string.h>
494+#include <utils_def.h>
495 #include <xlat_tables.h>
496+
497 /*******************************************************************************
498 * Declarations of linker defined symbols which will help us find the layout
499 * of trusted SRAM
500 ******************************************************************************/
501-unsigned long __RO_START__;
502-unsigned long __RO_END__;
503-
504 /*
505 * The next 2 constants identify the extents of the code & RO data region.
506 * These addresses are used by the MMU setup code and therefore they must be
507 * page-aligned. It is the responsibility of the linker script to ensure that
508 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
509 */
510-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
511-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
512+IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE);
513+IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT);
514
515 /*
516 * Placeholder variables for copying the arguments that have been passed to
517diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c
518index 7b2930771..e51bdbb9e 100644
519--- a/plat/mediatek/mt8173/bl31_plat_setup.c
520+++ b/plat/mediatek/mt8173/bl31_plat_setup.c
521@@ -1,5 +1,5 @@
522 /*
523- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
524+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
525 *
526 * SPDX-License-Identifier: BSD-3-Clause
527 */
528@@ -17,24 +17,6 @@
529 #include <platform.h>
530 #include <spm.h>
531
532-/*******************************************************************************
533- * Declarations of linker defined symbols which will help us find the layout
534- * of trusted SRAM
535- ******************************************************************************/
536-unsigned long __RO_START__;
537-unsigned long __RO_END__;
538-
539-/*
540- * The next 3 constants identify the extents of the code, RO data region and the
541- * limit of the BL31 image. These addresses are used by the MMU setup code and
542- * therefore they must be page-aligned. It is the responsibility of the linker
543- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
544- * refer to page-aligned addresses.
545- */
546-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
547-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
548-#define BL31_END (unsigned long)(&__BL31_END__)
549-
550 static entry_point_info_t bl32_ep_info;
551 static entry_point_info_t bl33_ep_info;
552
553@@ -156,10 +138,10 @@ void bl31_plat_arch_setup(void)
554 plat_cci_init();
555 plat_cci_enable();
556
557- plat_configure_mmu_el3(BL31_RO_BASE,
558- BL_COHERENT_RAM_END - BL31_RO_BASE,
559- BL31_RO_BASE,
560- BL31_RO_LIMIT,
561+ plat_configure_mmu_el3(BL_CODE_BASE,
562+ BL_COHERENT_RAM_END - BL_CODE_BASE,
563+ BL_CODE_BASE,
564+ BL_CODE_END,
565 BL_COHERENT_RAM_BASE,
566 BL_COHERENT_RAM_END);
567 }
568diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
569index d89ad7b94..2fe4e7dbc 100644
570--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
571+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
572@@ -1,5 +1,5 @@
573 /*
574- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
575+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
576 *
577 * SPDX-License-Identifier: BSD-3-Clause
578 */
579@@ -23,6 +23,7 @@
580 #include <string.h>
581 #include <tegra_def.h>
582 #include <tegra_private.h>
583+#include <utils_def.h>
584
585 /* length of Trusty's input parameters (in bytes) */
586 #define TRUSTY_PARAMS_LEN_BYTES (4096*2)
587@@ -33,29 +34,17 @@ extern void zeromem16(void *mem, unsigned int length);
588 * Declarations of linker defined symbols which will help us find the layout
589 * of trusted SRAM
590 ******************************************************************************/
591-extern unsigned long __TEXT_START__;
592-extern unsigned long __TEXT_END__;
593-extern unsigned long __RW_START__;
594-extern unsigned long __RW_END__;
595-extern unsigned long __RODATA_START__;
596-extern unsigned long __RODATA_END__;
597-extern unsigned long __BL31_END__;
598+
599+IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
600+IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END);
601+IMPORT_SYM(unsigned long, __RODATA_START__, BL31_RODATA_BASE);
602+IMPORT_SYM(unsigned long, __RODATA_END__, BL31_RODATA_END);
603+IMPORT_SYM(unsigned long, __TEXT_START__, TEXT_START);
604+IMPORT_SYM(unsigned long, __TEXT_END__, TEXT_END);
605
606 extern uint64_t tegra_bl31_phys_base;
607 extern uint64_t tegra_console_base;
608
609-/*
610- * The next 3 constants identify the extents of the code, RO data region and the
611- * limit of the BL3-1 image. These addresses are used by the MMU setup code and
612- * therefore they must be page-aligned. It is the responsibility of the linker
613- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
614- * refer to page-aligned addresses.
615- */
616-#define BL31_RW_START (unsigned long)(&__RW_START__)
617-#define BL31_RW_END (unsigned long)(&__RW_END__)
618-#define BL31_RODATA_BASE (unsigned long)(&__RODATA_START__)
619-#define BL31_RODATA_END (unsigned long)(&__RODATA_END__)
620-#define BL31_END (unsigned long)(&__BL31_END__)
621
622 static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info;
623 static plat_params_from_bl2_t plat_bl31_params_from_bl2 = {
624@@ -311,8 +300,8 @@ void bl31_plat_arch_setup(void)
625 unsigned long rw_size = BL31_RW_END - BL31_RW_START;
626 unsigned long rodata_start = BL31_RODATA_BASE;
627 unsigned long rodata_size = BL31_RODATA_END - BL31_RODATA_BASE;
628- unsigned long code_base = (unsigned long)(&__TEXT_START__);
629- unsigned long code_size = (unsigned long)(&__TEXT_END__) - code_base;
630+ unsigned long code_base = TEXT_START;
631+ unsigned long code_size = TEXT_END - TEXT_START;
632 const mmap_region_t *plat_mmio_map = NULL;
633 #if USE_COHERENT_MEM
634 unsigned long coh_start, coh_size;
635diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
636index 6199edae2..e5ee68f14 100644
637--- a/plat/rockchip/common/bl31_plat_setup.c
638+++ b/plat/rockchip/common/bl31_plat_setup.c
639@@ -1,5 +1,5 @@
640 /*
641- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
642+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
643 *
644 * SPDX-License-Identifier: BSD-3-Clause
645 */
646@@ -17,21 +17,14 @@
647 #include <platform_def.h>
648 #include <uart_16550.h>
649
650-/*******************************************************************************
651- * Declarations of linker defined symbols which will help us find the layout
652- * of trusted SRAM
653- ******************************************************************************/
654-unsigned long __RO_START__;
655-unsigned long __RO_END__;
656-
657 /*
658 * The next 2 constants identify the extents of the code & RO data region.
659 * These addresses are used by the MMU setup code and therefore they must be
660 * page-aligned. It is the responsibility of the linker script to ensure that
661 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
662 */
663-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
664-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
665+IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE);
666+IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT);
667
668 static entry_point_info_t bl32_ep_info;
669 static entry_point_info_t bl33_ep_info;
670diff --git a/services/std_svc/spm/spm_shim_private.h b/services/std_svc/spm/spm_shim_private.h
671index ad953cde7..8408d1e04 100644
672--- a/services/std_svc/spm/spm_shim_private.h
673+++ b/services/std_svc/spm/spm_shim_private.h
674@@ -1,5 +1,5 @@
675 /*
676- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
677+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
678 *
679 * SPDX-License-Identifier: BSD-3-Clause
680 */
681@@ -8,21 +8,17 @@
682 #define __SPM_SHIM_PRIVATE__
683
684 #include <types.h>
685+#include <utils_def.h>
686
687 /* Assembly source */
688-extern uintptr_t spm_shim_exceptions_ptr;
689+IMPORT_SYM(uintptr_t, spm_shim_exceptions_ptr, SPM_SHIM_EXCEPTIONS_PTR);
690
691 /* Linker symbols */
692-extern uintptr_t __SPM_SHIM_EXCEPTIONS_START__;
693-extern uintptr_t __SPM_SHIM_EXCEPTIONS_END__;
694+IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_START__, SPM_SHIM_EXCEPTIONS_START);
695+IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_END__, SPM_SHIM_EXCEPTIONS_END);
696
697 /* Definitions */
698-#define SPM_SHIM_EXCEPTIONS_PTR (uintptr_t)(&spm_shim_exceptions_ptr)
699
700-#define SPM_SHIM_EXCEPTIONS_START \
701- (uintptr_t)(&__SPM_SHIM_EXCEPTIONS_START__)
702-#define SPM_SHIM_EXCEPTIONS_END \
703- (uintptr_t)(&__SPM_SHIM_EXCEPTIONS_END__)
704 #define SPM_SHIM_EXCEPTIONS_SIZE \
705 (SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
706
707--
7082.25.1
709
diff --git a/recipes-bsp/atf/qoriq-atf-2.3.inc b/recipes-bsp/atf/qoriq-atf-2.3.inc
deleted file mode 100644
index bc8b912a..00000000
--- a/recipes-bsp/atf/qoriq-atf-2.3.inc
+++ /dev/null
@@ -1,13 +0,0 @@
1LICENSE = "BSD"
2LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
3
4PV = "2.3+git${SRCPV}"
5
6SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/atf;nobranch=1 \
7 git://github.com/ARMmbed/mbedtls;nobranch=1;destsuffix=git/mbedtls;name=mbedtls \
8"
9SRCREV = "4e40e24590ab908773ef842cd0e17faf233767d4"
10SRCREV_mbedtls = "85da85555e5b086b0250780693c3ee584f63e79f"
11SRCREV_FORMAT = "atf"
12
13S = "${WORKDIR}/git"
diff --git a/recipes-bsp/atf/qoriq-atf-2.4.inc b/recipes-bsp/atf/qoriq-atf-2.4.inc
new file mode 100644
index 00000000..28045c7c
--- /dev/null
+++ b/recipes-bsp/atf/qoriq-atf-2.4.inc
@@ -0,0 +1,10 @@
1DESCRIPTION = "ARM Trusted Firmware"
2
3LICENSE = "BSD"
4LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
5
6SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/atf.git;nobranch=1"
7SRCREV = "bb4957067d4b96a6ee197a333425948e409e990d"
8
9S = "${WORKDIR}/git"
10
diff --git a/recipes-bsp/atf/qoriq-atf-tools_2.3.bb b/recipes-bsp/atf/qoriq-atf-tools_2.4.bb
index d4be32be..eccf12c8 100644
--- a/recipes-bsp/atf/qoriq-atf-tools_2.3.bb
+++ b/recipes-bsp/atf/qoriq-atf-tools_2.4.bb
@@ -1,6 +1,4 @@
1require qoriq-atf-${PV}.inc 1require recipes-bsp/atf/qoriq-atf-2.4.inc
2
3SUMMARY = "Tools for ARM Trusted Firmware, e.g. FIP image creation tool"
4 2
5DEPENDS += "openssl" 3DEPENDS += "openssl"
6 4
@@ -12,3 +10,4 @@ do_install () {
12} 10}
13 11
14BBCLASSEXTEND = "native" 12BBCLASSEXTEND = "native"
13
diff --git a/recipes-bsp/atf/qoriq-atf_1.5.bb b/recipes-bsp/atf/qoriq-atf_1.5.bb
deleted file mode 100644
index fb686c94..00000000
--- a/recipes-bsp/atf/qoriq-atf_1.5.bb
+++ /dev/null
@@ -1,248 +0,0 @@
1DESCRIPTION = "ARM Trusted Firmware"
2
3LICENSE = "BSD"
4LIC_FILES_CHKSUM = "file://license.rst;md5=e927e02bca647e14efd87e9e914b2443"
5
6PV = "1.5+git${SRCPV}"
7
8inherit deploy
9
10DEPENDS += "u-boot-mkimage-native u-boot openssl openssl-native mbedtls rcw cst-native"
11DEPENDS:append:lx2160a = " ddr-phy"
12do_compile[depends] += "u-boot:do_deploy rcw:do_deploy uefi:do_deploy"
13
14S = "${WORKDIR}/git"
15
16SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/atf;nobranch=1 \
17 file://0001-Clean-usage-of-void-pointers-to-access-symbols.patch \
18"
19SRCREV = "5ae5233c064e94a8bd1b4a1652a03b87b0be63f6"
20
21COMPATIBLE_MACHINE = "(qoriq)"
22
23PACKAGE_ARCH = "${MACHINE_ARCH}"
24
25PLATFORM = "${MACHINE}"
26PLATFORM:ls1088ardb-pb = "ls1088ardb"
27PLATFORM_ADDITIONAL_TARGET ??= ""
28PLATFORM_ADDITIONAL_TARGET:ls1012afrwy = "ls1012afrwy_512mb"
29
30RCW_FOLDER ?= "${MACHINE}"
31RCW_FOLDER:ls1088ardb-pb = "ls1088ardb"
32
33# requires CROSS_COMPILE set by hand as there is no configure script
34export CROSS_COMPILE="${TARGET_PREFIX}"
35export ARCH="arm64"
36
37# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is
38# a standalone application
39CFLAGS[unexport] = "1"
40LDFLAGS[unexport] = "1"
41AS[unexport] = "1"
42LD[unexport] = "1"
43
44EXTRA_OEMAKE += "HOSTCC='${BUILD_CC} ${BUILD_CPPFLAGS} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}'"
45
46BOOTTYPE ?= "nor nand qspi flexspi_nor sd emmc"
47OTABOOTTYPE ?= "nor qspi flexspi_nor"
48BUILD_SECURE = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'true', 'false', d)}"
49BUILD_OPTEE = "${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'true', 'false', d)}"
50BUILD_FUSE = "${@bb.utils.contains('DISTRO_FEATURES', 'fuse', 'true', 'false', d)}"
51BUILD_OTA = "${@bb.utils.contains('DISTRO_FEATURES', 'ota', 'true', 'false', d)}"
52
53PACKAGECONFIG ??= " \
54 ${@bb.utils.filter('COMBINED_FEATURES', 'optee', d)} \
55"
56PACKAGECONFIG[optee] = ",,optee-os-qoriq"
57
58uboot_boot_sec ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa-secure-boot"
59uboot_boot ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa"
60rcw ?= ""
61rcw:ls1012a = "_default"
62rcwsec ?= "_sben"
63
64chassistype ?= "ls2088_1088"
65chassistype:ls1012a = "ls104x_1012"
66chassistype:ls1043a = "ls104x_1012"
67chassistype:ls1046a = "ls104x_1012"
68
69ddrphyopt ?= ""
70ddrphyopt:lx2160a = "fip_ddr_sec"
71
72do_configure[noexec] = "1"
73
74do_compile() {
75 export LIBPATH="${RECIPE_SYSROOT_NATIVE}"
76 install -d ${S}/include/tools_share/openssl
77 cp -r ${RECIPE_SYSROOT}/usr/include/openssl/* ${S}/include/tools_share/openssl
78 if [ ! -f ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ]; then
79 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_keys 1024
80 else
81 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ${S}
82 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pub ${S}
83 fi
84
85 if [ "${BUILD_FUSE}" = "true" ]; then
86 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_fusescr ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/input_files/gen_fusescr/${chassistype}/input_fuse_file
87 fuseopt="fip_fuse FUSE_PROG=1 FUSE_PROV_FILE=fuse_scr.bin"
88 fi
89 if [ "${BUILD_SECURE}" = "true" ]; then
90 secureopt="TRUSTED_BOARD_BOOT=1 ${ddrphyopt} CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst"
91 secext="_sec"
92 bl33="${uboot_boot_sec}"
93 if [ ${chassistype} = ls104x_1012 ]; then
94 rcwtemp="${rcwsec}"
95 else
96 rcwtemp="${rcw}"
97 fi
98 else
99 bl33="${uboot_boot}"
100 rcwtemp="${rcw}"
101 fi
102
103 if [ "${BUILD_OPTEE}" = "true" ]; then
104 bl32="${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin"
105 bl32opt="BL32=${bl32}"
106 spdopt="SPD=opteed"
107 fi
108
109 if [ "${BUILD_OTA}" = "true" ]; then
110 otaopt="POLICY_OTA=1"
111 btype="${OTABOOTTYPE}"
112 else
113 btype="${BOOTTYPE}"
114 fi
115
116 if [ -f ${DEPLOY_DIR_IMAGE}/ddr-phy/ddr4_pmu_train_dmem.bin ]; then
117 cp ${DEPLOY_DIR_IMAGE}/ddr-phy/*.bin ${S}/
118 fi
119
120 for d in ${btype}; do
121 case $d in
122 nor)
123 rcwimg="${RCWNOR}${rcwtemp}.bin"
124 uefiboot="${UEFI_NORBOOT}"
125 ;;
126 nand)
127 rcwimg="${RCWNAND}${rcwtemp}.bin"
128 ;;
129 qspi)
130 rcwimg="${RCWQSPI}${rcwtemp}.bin"
131 uefiboot="${UEFI_QSPIBOOT}"
132 if [ "${BUILD_SECURE}" = "true" ] && [ ${MACHINE} = ls1046ardb ]; then
133 rcwimg="RR_FFSSPPPH_1133_5559/rcw_1600_qspiboot_sben.bin"
134 fi
135 ;;
136 auto)
137 rcwimg="${RCWAUTO}${rcwtemp}.bin"
138 ;;
139 sd)
140 rcwimg="${RCWSD}${rcwtemp}.bin"
141 ;;
142 emmc)
143 rcwimg="${RCWEMMC}${rcwtemp}.bin"
144 ;;
145 flexspi_nor)
146 rcwimg="${RCWXSPI}${rcwtemp}.bin"
147 uefiboot="${UEFI_XSPIBOOT}"
148 ;;
149 esac
150
151 if [ -f "${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg}" ]; then
152 oe_runmake V=1 -C ${S} realclean
153 oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
154 cp -r ${S}/build/${PLATFORM}/release/bl2_${d}*.pbl ${S}
155 cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}
156 if [ "${BUILD_FUSE}" = "true" ]; then
157 cp -f ${S}/build/${PLATFORM}/release/fuse_fip.bin ${S}
158 fi
159
160 if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
161 oe_runmake V=1 -C ${S} realclean
162 oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM_ADDITIONAL_TARGET} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
163 cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/bl2_qspi${secext}.pbl ${S}/bl2_${d}${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
164 cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fip.bin ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
165 if [ "${BUILD_FUSE}" = "true" ]; then
166 cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fuse_fip.bin ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
167 fi
168 fi
169 if [ -n "${uefiboot}" -a -f "${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot}" ]; then
170 oe_runmake V=1 -C ${S} realclean
171 oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
172 cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}/fip_uefi.bin
173 fi
174 fi
175 rcwimg=""
176 uefiboot=""
177 done
178}
179
180do_install() {
181 install -d ${D}/boot/atf
182 cp -r ${S}/srk.pri ${D}/boot/atf
183 cp -r ${S}/srk.pub ${D}/boot/atf
184 if [ "${BUILD_SECURE}" = "true" ]; then
185 secext="_sec"
186 fi
187 if [ -f "${S}/fip_uefi.bin" ]; then
188 cp -r ${S}/fip_uefi.bin ${D}/boot/atf/fip_uefi.bin
189 fi
190 if [ -f "${S}/fuse_fip.bin" ]; then
191 cp -r ${S}/fuse_fip.bin ${D}/boot/atf/fuse_fip.bin
192 fi
193 if [ -f "${S}/fip.bin" ]; then
194 cp -r ${S}/fip.bin ${D}/boot/atf/fip.bin
195 fi
196 for d in ${BOOTTYPE}; do
197 if [ -e ${S}/bl2_${d}${secext}.pbl ]; then
198 cp -r ${S}/bl2_${d}${secext}.pbl ${D}/boot/atf/bl2_${d}${secext}.pbl
199 fi
200 done
201 if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
202 cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
203 cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${D}/boot/atf/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
204 if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
205 cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
206 fi
207 fi
208 chown -R root:root ${D}
209 if [ -f "${S}/fip_ddr_sec.bin" ]; then
210 cp -r ${S}/fip_ddr_sec.bin ${D}/boot/atf/fip_ddr_sec.bin
211 fi
212}
213
214do_deploy() {
215 install -d ${DEPLOYDIR}/atf
216 cp -r ${D}/boot/atf/srk.pri ${DEPLOYDIR}/atf
217 cp -r ${D}/boot/atf/srk.pub ${DEPLOYDIR}/atf
218 if [ "${BUILD_SECURE}" = "true" ]; then
219 secext="_sec"
220 fi
221
222 if [ -f "${S}/fuse_fip.bin" ]; then
223 cp -r ${D}/boot/atf/fuse_fip.bin ${DEPLOYDIR}/atf/fuse_fip${secext}.bin
224 fi
225
226 if [ -e ${D}/boot/atf/fip_uefi.bin ]; then
227 cp -r ${D}/boot/atf/fip_uefi.bin ${DEPLOYDIR}/atf/fip_uefi.bin
228 fi
229 cp -r ${D}/boot/atf/fip.bin ${DEPLOYDIR}/atf/fip_uboot${secext}.bin
230 for d in ${BOOTTYPE}; do
231 if [ -e ${D}/boot/atf/bl2_${d}${secext}.pbl ]; then
232 cp -r ${D}/boot/atf/bl2_${d}${secext}.pbl ${DEPLOYDIR}/atf/bl2_${d}${secext}.pbl
233 fi
234 done
235 if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
236 cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${DEPLOYDIR}/atf/
237 cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${DEPLOYDIR}/atf/fip_uboot${secext}_${PLATFORM_ADDITIONAL_TARGET}.bin
238 if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
239 cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}${secext}.bin
240 fi
241 fi
242 if [ -f "${S}/fip_ddr_sec.bin" ]; then
243 cp -r ${D}/boot/atf/fip_ddr_sec.bin ${DEPLOYDIR}/atf/fip_ddr_sec.bin
244 fi
245}
246addtask deploy after do_install
247FILES:${PN} += "/boot"
248BBCLASSEXTEND = "native nativesdk"
diff --git a/recipes-bsp/atf/qoriq-atf_2.3.bb b/recipes-bsp/atf/qoriq-atf_2.3.bb
deleted file mode 100644
index f2922c91..00000000
--- a/recipes-bsp/atf/qoriq-atf_2.3.bb
+++ /dev/null
@@ -1,175 +0,0 @@
1require qoriq-atf-${PV}.inc
2
3DESCRIPTION = "ARM Trusted Firmware"
4
5inherit deploy
6
7DEPENDS += "cst-native"
8do_compile[depends] += "u-boot:do_deploy rcw:do_deploy ddr-phy:do_deploy"
9
10PACKAGE_ARCH = "${MACHINE_ARCH}"
11
12PLATFORM = "${MACHINE}"
13MBEDTLS_FOLDER ?= "${S}/mbedtls"
14RCW_FOLDER ?= "${MACHINE}"
15
16# requires CROSS_COMPILE set by hand as there is no configure script
17export CROSS_COMPILE="${TARGET_PREFIX}"
18export ARCH="arm64"
19
20# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is
21# a standalone application
22CFLAGS[unexport] = "1"
23LDFLAGS[unexport] = "1"
24AS[unexport] = "1"
25LD[unexport] = "1"
26
27EXTRA_OEMAKE += "HOSTCC='${BUILD_CC} ${BUILD_CPPFLAGS} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}'"
28
29BOOTTYPE ?= "flexspi_nor sd emmc"
30ARM_COT = "${@bb.utils.contains('DISTRO_FEATURES', 'arm-cot', 'true', 'false', d)}"
31NXP_COT = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'true', 'false', d)}"
32BUILD_OPTEE = "${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'true', 'false', d)}"
33
34PACKAGECONFIG ??= " \
35 ${@bb.utils.contains('DISTRO_FEATURES', 'arm-cot', 'optee', '', d)} \
36 ${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'optee', '', d)} \
37 ${@bb.utils.filter('COMBINED_FEATURES', 'optee', d)} \
38"
39PACKAGECONFIG[optee] = ",,optee-os-qoriq"
40
41uboot_sec ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa-secure-boot"
42uboot ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa"
43
44do_configure[noexec] = "1"
45
46do_compile() {
47 if [ "${NXP_COT}" = "true" -a "${ARM_COT}" = "true" ]; then
48 bbfatal " \
49 Error!, Both ARM CoT and NXP CoT are enabled. Only one CoT is built in a yocto build, \
50 Don't add nxp-cot and arm-cot into DISTRO_FEATURES:append at the same time."
51 fi
52
53 if [ "${NXP_COT}" = "true" ]; then
54 rm -fr ${S}/nxp-cot
55 mkdir -p ${S}/nxp-cot
56 outputdir="${S}/nxp-cot"
57 elif [ "${ARM_COT}" = "true" ]; then
58 rm -fr ${S}/arm-cot
59 mkdir -p ${S}/arm-cot
60 outputdir="${S}/arm-cot"
61 else
62 outputdir="${S}"
63 fi
64
65 if [ "${NXP_COT}" = "true" -o "${ARM_COT}" = "true" ]; then
66 if [ ! -f ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ]; then
67 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_keys 1024
68 else
69 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ${S}
70 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pub ${S}
71 fi
72
73 bl32="${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin"
74 bl33="${uboot_sec}"
75 secext="_sec"
76 else
77 bl33="${uboot}"
78 fi
79
80 for d in ${BOOTTYPE}; do
81 case $d in
82 sd)
83 rcwimg="${RCWSD}.bin"
84 ;;
85 emmc)
86 rcwimg="${RCWEMMC}.bin"
87 ;;
88 flexspi_nor)
89 rcwimg="${RCWXSPI}.bin"
90 ;;
91 esac
92
93 if [ -f "${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg}" ]; then
94 oe_runmake V=1 -C ${S} realclean
95 if [ "${ARM_COT}" = "true" ]; then
96 mkdir -p ${S}/build/${PLATFORM}/release
97 if [ -f ${outputdir}/rot_key.pem ]; then
98 cp -fr ${outputdir}/*.pem ${S}/build/${PLATFORM}/release
99 fi
100 oe_runmake V=1 -C ${S} fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} SPD=opteed BL32=${bl32} \
101 BL33=${bl33} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} TRUSTED_BOARD_BOOT=1 \
102 GENERATE_COT=1 MBEDTLS_DIR=${MBEDTLS_FOLDER} CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst
103
104 if [ ! -f ${outputdir}/ddr_fip_sec.bin ]; then
105 oe_runmake V=1 -C ${S} fip_ddr PLAT=${PLATFORM} TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 \
106 MBEDTLS_DIR=${MBEDTLS_FOLDER} DDR_PHY_BIN_PATH=${DEPLOY_DIR_IMAGE}/ddr-phy
107 cp -r ${S}/build/${PLATFORM}/release/ddr_fip_sec.bin ${outputdir}
108 cp -r ${S}/build/${PLATFORM}/release/*.pem ${outputdir}
109 fi
110 elif [ "${NXP_COT}" = "true" ]; then
111 oe_runmake V=1 -C ${S} fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} SPD=opteed BL32=${bl32} \
112 BL33=${bl33} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} TRUSTED_BOARD_BOOT=1 \
113 CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst
114
115 if [ ! -f ${outputdir}/ddr_fip_sec.bin ]; then
116 oe_runmake V=1 -C ${S} fip_ddr PLAT=${PLATFORM} TRUSTED_BOARD_BOOT=1 \
117 CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst DDR_PHY_BIN_PATH=${DEPLOY_DIR_IMAGE}/ddr-phy
118 cp -r ${S}/build/${PLATFORM}/release/ddr_fip_sec.bin ${outputdir}
119 fi
120 elif [ "${BUILD_OPTEE}" = "true" ]; then
121 bl32="${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin"
122 oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} SPD=opteed BL32=${bl32} \
123 RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33}
124 else
125 oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} \
126 RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33}
127 fi
128
129 cp -r ${S}/build/${PLATFORM}/release/bl2_${d}${secext}.pbl ${outputdir}
130 cp -r ${S}/build/${PLATFORM}/release/fip.bin ${outputdir}
131 fi
132 rcwimg=""
133 done
134}
135
136do_install() {
137 install -d ${D}/boot/atf
138 if [ "${ARM_COT}" = "true" ]; then
139 outputdir="${S}/arm-cot"
140 secext="_sec"
141 elif [ "${NXP_COT}" = "true" ]; then
142 outputdir="${S}/nxp-cot"
143 secext="_sec"
144 else
145 outputdir="${S}"
146 fi
147 if [ -f "${outputdir}/fip.bin" ]; then
148 cp -r ${outputdir}/fip.bin ${D}/boot/atf/fip_uboot${secext}.bin
149 fi
150 if [ -f "${outputdir}/ddr_fip_sec.bin" ]; then
151 cp -r ${outputdir}/ddr_fip_sec.bin ${D}/boot/atf/
152 fi
153 for d in ${BOOTTYPE}; do
154 if [ -e ${outputdir}/bl2_${d}${secext}.pbl ]; then
155 cp -r ${outputdir}/bl2_${d}${secext}.pbl ${D}/boot/atf/bl2_${d}${secext}.pbl
156 fi
157 done
158 chown -R root:root ${D}
159}
160
161do_deploy() {
162 if [ "${ARM_COT}" = "true" ]; then
163 outputdir="atf:arm-cot"
164 elif [ "${NXP_COT}" = "true" ]; then
165 outputdir="atf_nxp-cot"
166 else
167 outputdir="atf"
168 fi
169
170 install -d ${DEPLOYDIR}/${outputdir}
171 cp -fr ${D}/boot/atf/* ${DEPLOYDIR}/${outputdir}/
172}
173addtask deploy after do_install
174FILES:${PN} += "/boot"
175COMPATIBLE_MACHINE = "(lx2160a|lx2162a)"
diff --git a/recipes-bsp/atf/qoriq-atf_2.4.bb b/recipes-bsp/atf/qoriq-atf_2.4.bb
new file mode 100644
index 00000000..9c8937a2
--- /dev/null
+++ b/recipes-bsp/atf/qoriq-atf_2.4.bb
@@ -0,0 +1,186 @@
1require recipes-bsp/atf/qoriq-atf-2.4.inc
2
3inherit deploy
4
5DEPENDS += "u-boot-mkimage-native u-boot openssl openssl-native mbedtls rcw cst-native bc-native"
6DEPENDS:append:lx2160a += "ddr-phy"
7DEPENDS:append:lx2162a += "ddr-phy"
8do_compile[depends] += "u-boot:do_deploy rcw:do_deploy uefi:do_deploy"
9
10SRC_URI += "git://github.com/ARMmbed/mbedtls;nobranch=1;destsuffix=git/mbedtls;name=mbedtls"
11SRCREV_mbedtls = "0795874acdf887290b2571b193cafd3c4041a708"
12SRCREV_FORMAT = "atf"
13
14COMPATIBLE_MACHINE = "(qoriq)"
15
16PACKAGE_ARCH = "${MACHINE_ARCH}"
17
18PLATFORM = "${MACHINE}"
19PLATFORM:ls1088ardb-pb = "ls1088ardb"
20PLATFORM_ADDITIONAL_TARGET ??= ""
21PLATFORM_ADDITIONAL_TARGET:ls1012afrwy = "ls1012afrwy_512mb"
22
23RCW_FOLDER ?= "${MACHINE}"
24RCW_FOLDER:ls1088ardb-pb = "ls1088ardb"
25RCW_FOLDER:lx2160ardb = "lx2160ardb_rev2"
26
27RCW_SUFFIX ?= ".bin"
28RCW_SUFFIX:ls1012a = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', '_sben.bin', '_default.bin', d)}"
29RCW_SUFFIX:ls1043a = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', '_sben.bin', '.bin', d)}"
30RCW_SUFFIX:ls1046a = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', '_sben.bin', '.bin', d)}"
31
32UBOOT_BINARY ?= "${@bb.utils.contains('DISTRO_FEATURES', 'secure', '${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa-secure-boot', '${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa', d)}"
33
34SECURE_EXTENTION ?= "${@bb.utils.contains('DISTRO_FEATURES', 'secure', '_sec', '', d)}"
35
36BOOTTYPE ?= "nor nand qspi flexspi_nor sd emmc"
37
38chassistype ?= "ls2088_1088"
39chassistype:ls1012a = "ls104x_1012"
40chassistype:ls1043a = "ls104x_1012"
41chassistype:ls1046a = "ls104x_1012"
42
43DDR_PHY_BIN_PATH ?= ""
44DDR_PHY_BIN_PATH:lx2160a = "${DEPLOY_DIR_IMAGE}/ddr-phy"
45DDR_PHY_BIN_PATH:lx2162a = "${DEPLOY_DIR_IMAGE}/ddr-phy"
46
47# requires CROSS_COMPILE set by hand as there is no configure script
48export CROSS_COMPILE="${TARGET_PREFIX}"
49export ARCH="arm64"
50
51# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is
52# a standalone application
53CFLAGS[unexport] = "1"
54LDFLAGS[unexport] = "1"
55AS[unexport] = "1"
56LD[unexport] = "1"
57
58EXTRA_OEMAKE += "HOSTCC='${BUILD_CC} ${BUILD_CPPFLAGS} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}'"
59EXTRA_OEMAKE += "\
60 ${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'BL32=${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin SPD=opteed', '', d)} \
61 ${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'TRUSTED_BOARD_BOOT=1 CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst', '', d)} \
62 ${@bb.utils.contains('DISTRO_FEATURES', 'arm-cot', 'GENERATE_COT=1 MBEDTLS_DIR=${S}/mbedtls', '', d)} \
63 ${@bb.utils.contains('DISTRO_FEATURES', 'fuse', 'fip_fuse FUSE_PROG=1 FUSE_PROV_FILE=fuse_scr.bin', '', d)} \
64"
65
66PACKAGECONFIG ??= " \
67 ${@bb.utils.filter('COMBINED_FEATURES', 'optee', d)} \
68"
69PACKAGECONFIG[optee] = ",,optee-os-qoriq"
70
71python() {
72 if bb.utils.contains("DISTRO_FEATURES", "arm-cot", True, False, d):
73 if not bb.utils.contains("DISTRO_FEATURES", "secure", True, False, d):
74 bb.fatal("arm-cot needs 'secure' being set in DISTRO_FEATURES")
75}
76
77do_configure[noexec] = "1"
78
79do_compile() {
80 if [ ! -f ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ]; then
81 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_keys 1024
82 else
83 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri .
84 cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pub .
85 fi
86
87 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_fusescr \
88 ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/input_files/gen_fusescr/${chassistype}/input_fuse_file
89
90 for d in ${BOOTTYPE}; do
91 case $d in
92 nor)
93 rcwimg="${RCWNOR}${RCW_SUFFIX}"
94 uefiboot="${UEFI_NORBOOT}"
95 ;;
96 nand)
97 rcwimg="${RCWNAND}${RCW_SUFFIX}"
98 ;;
99 qspi)
100 rcwimg="${RCWQSPI}${RCW_SUFFIX}"
101 uefiboot="${UEFI_QSPIBOOT}"
102 if [ -n "${SECURE_EXTENTION}" ] && [ "${MACHINE}" = ls1046ardb ]; then
103 rcwimg="RR_FFSSPPPH_1133_5559/rcw_1600_qspiboot_sben.bin"
104 fi
105 ;;
106 auto)
107 rcwimg="${RCWAUTO}${RCW_SUFFIX}"
108 ;;
109 sd)
110 rcwimg="${RCWSD}${RCW_SUFFIX}"
111 ;;
112 emmc)
113 rcwimg="${RCWEMMC}${RCW_SUFFIX}"
114 ;;
115 flexspi_nor)
116 rcwimg="${RCWXSPI}${RCW_SUFFIX}"
117 uefiboot="${UEFI_XSPIBOOT}"
118 ;;
119 esac
120
121 if [ -f ${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/$rcwimg ]; then
122 make V=1 realclean
123 if [ -f rot_key.pem ];then
124 mkdir -p build/${PLATFORM}/release/
125 cp *.pem build/${PLATFORM}/release/
126 fi
127
128 oe_runmake V=1 all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${UBOOT_BINARY}
129 cp build/${PLATFORM}/release/bl2_${d}${SECURE_EXTENTION}.pbl .
130 cp build/${PLATFORM}/release/fip.bin fip_uboot${SECURE_EXTENTION}.bin
131 if [ -e build/${PLATFORM}/release/fuse_fip.bin ]; then
132 cp build/${PLATFORM}/release/fuse_fip.bin .
133 fi
134
135 if [ -n "${SECURE_EXTENTION}" -a -n "${DDR_PHY_BIN_PATH}" -a ! -f ddr_fip_sec.bin ]; then
136 oe_runmake V=1 fip_ddr PLAT=${PLATFORM} DDR_PHY_BIN_PATH=${DDR_PHY_BIN_PATH}
137 if [ -e build/${PLATFORM}/release/ddr_fip_sec.bin ]; then
138 cp build/${PLATFORM}/release/ddr_fip_sec.bin .
139 fi
140 fi
141
142 if [ -e build/${PLATFORM}/release/rot_key.pem ] && [ ! -f rot_key.pem ]; then
143 cp build/${PLATFORM}/release/*.pem .
144 fi
145
146 if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
147 make V=1 realclean
148 oe_runmake V=1 all fip pbl PLAT=${PLATFORM_ADDITIONAL_TARGET} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${UBOOT_BINARY}
149 cp build/${PLATFORM_ADDITIONAL_TARGET}/release/bl2_${d}${SECURE_EXTENTION}.pbl bl2_${d}${SECURE_EXTENTION}_${PLATFORM_ADDITIONAL_TARGET}.pbl
150 cp build/${PLATFORM_ADDITIONAL_TARGET}/release/fip.bin fip_uboot${SECURE_EXTENTION}_${PLATFORM_ADDITIONAL_TARGET}.bin
151 if [ -e build/${PLATFORM_ADDITIONAL_TARGET}/release/fuse_fip.bin ]; then
152 cp build/${PLATFORM_ADDITIONAL_TARGET}/release/fuse_fip.bin fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
153 fi
154 fi
155
156 if [ -z "${SECURE_EXTENTION}" -a -f "${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot}" ]; then
157 make V=1 realclean
158 oe_runmake V=1 all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot}
159 cp build/${PLATFORM}/release/fip.bin fip_uefi.bin
160 fi
161 fi
162 rcwimg=""
163 uefiboot=""
164 done
165}
166
167do_install() {
168 install -d ${D}/boot/atf/
169 cp srk.pri ${D}/boot/atf/
170 cp srk.pub ${D}/boot/atf/
171 cp *.pbl ${D}/boot/atf/
172 if [ ! -e fuse_fip.bin ]; then
173 rm -f fuse_scr.bin
174 fi
175 cp *.bin ${D}/boot/atf/
176 chown -R root:root ${D}
177}
178
179do_deploy() {
180 install -d ${DEPLOYDIR}/atf/
181 cp ${D}/boot/atf/* ${DEPLOYDIR}/atf/
182}
183addtask deploy after do_install
184
185FILES:${PN} += "/boot"
186BBCLASSEXTEND = "native nativesdk"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-14 12:27:13 +0000