diff options
| author | C.R. Guo <chunrong.guo@nxp.com> | 2018-03-21 16:32:55 +0800 |
|---|---|---|
| committer | Otavio Salvador <otavio@ossystems.com.br> | 2018-04-02 10:30:13 -0300 |
| commit | 9546e300e536d7fceaa305554891fee9f216e7ed (patch) | |
| tree | ffa46569ea17fcd691bf8a06455f6ebfe516ebba | |
| parent | 995ecb75626007a5b749dcf948d13dfa87ce24ff (diff) | |
| download | meta-freescale-9546e300e536d7fceaa305554891fee9f216e7ed.tar.gz | |
u-boot-qoriq: update to
*include the following changes:
00cde47 - driver: net: fsl-mc: remove usage of CONFIG_FSL_MC_ENET
a2d3f26 - powerpc: configs: Set initrd_high environment varible
cab48d3 - armv8: ls1043ardb_sdcard: delete CONFIG_SPL_FSL_LS_PPA
6f8b6dd - mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
03560b1 - armv8: sec_firmware: Remove JR3 from device tree node in all cases
123ee86 - ls1088a: qspi: Enable XIP mode above 16 MB addresses
eb3ddd0 - PowerPC: phy: enable all phylib drivers when use phylib and tsec enet
2efee07 - ls2081a: qspi: Enable config to write aligned data to TxFIFO
b32402c - ls2088a: qspi: Enable config to write aligned data to TxFIFO
e7f0b4a - ls2080a: qspi: Enable config to write aligned data to TxFIFO
1c693ab - ls1088a: qspi: Enable config to write aligned data to TxFIFO
edcb0a5 - Kconfig: qspi: Add SPI_ALIGNED_TXFIFO config details
c6a9fe0 - qspi: Add code to send only aligned data to TxFIFO
1f13780 - ls1088a: Moving CONFIG_FSL_QSPI to defconfig
4cbef43 - EHCI: Fix endian access issue on EHCI intinalization
901ad16 - ARMv8: ls1046a: Enable PCIe and E1000 in lpuart defconfig
7340b38 - armv8: ls1088: Add CONFIG_SPI_FLASH_SPANSION to sdcard defconfigs
a17a22d - armv8: ls1088a: Move CONFIG_BOOTARGS and CONFIG_CMD_GREPENV to defconfig
226adb1 - armv8: ls1088: Add qixis offsets for lbmap and rcw_src
71fed5f - fsl: common :qixis: Add ifc and emmc switch support in qixis
2705761 - board:ls1012a2g5rdb: define PFE firmware address in kconfig
ec53bd9 - board: ls1012a: update mdio, phy parameters based on serdes protocol
cce1563 - board: ls1012a2g5rdb: avoid phy reset
621dd47 - dm: pci: change bus number register setting compliant with Linux
f5285a8 - armv8: ls1088ardb: secure boot: Use tiny printf to save spl size
a6932b4 - armv8: ls1088a: vid: Add some function in SPL for VID
adc2721 - ls1088a: Add VID support for QDS and RDB platforms
318f7c4 - common: board_f: vid: Add VID specific API to adjust core voltage
d0d1638 - ls1088a: ddr: configure DDR for 0.9v for VID support
55540f3 - ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs
2586b3a - board: common: vid: Add support for LTC3882 voltage regulator chip
dfbc0d1 - Kconfig: Add LTC3882 voltage regulator config
f5f238d - board: common: vid: Move IR chip specific code in flag
094c483 - board: common: vid: Add board specific vdd adjust API
9d25d53 - board: common:vid: Add LS1088A VID Supported voltage values
fe1dc63 - armv8: lsch3: Add serdes and DDR voltage setup
Signed-off-by: Chunrong Guo <chunrong.guo@nxp.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| -rw-r--r-- | recipes-bsp/u-boot/u-boot-qoriq_2017.12.bb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/recipes-bsp/u-boot/u-boot-qoriq_2017.12.bb b/recipes-bsp/u-boot/u-boot-qoriq_2017.12.bb index 0d75fa78..11964ba3 100644 --- a/recipes-bsp/u-boot/u-boot-qoriq_2017.12.bb +++ b/recipes-bsp/u-boot/u-boot-qoriq_2017.12.bb | |||
| @@ -20,7 +20,7 @@ DEPENDS_append_qoriq-ppc = " boot-format-native" | |||
| 20 | 20 | ||
| 21 | SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/u-boot;nobranch=1 \ | 21 | SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/u-boot;nobranch=1 \ |
| 22 | " | 22 | " |
| 23 | SRCREV = "9f7df1b406ff11409021cd2112beedd6b57bb600" | 23 | SRCREV = "00cde476c84275124a51cb55a53a253cd75fba6c" |
| 24 | 24 | ||
| 25 | S = "${WORKDIR}/git" | 25 | S = "${WORKDIR}/git" |
| 26 | 26 | ||