From cd3411088f6bb4393d79c50b5f7eef3f11a83435 Mon Sep 17 00:00:00 2001 From: Tudor Florea Date: Fri, 10 Oct 2014 00:31:33 +0200 Subject: initial commit for Enea Linux 4.0-140929 Migrated from the internal git server on the daisy-enea-point-release branch Signed-off-by: Tudor Florea --- .../0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 recipes-kernel/linux/linux-3.0.6/acp3448v2/0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch (limited to 'recipes-kernel/linux/linux-3.0.6/acp3448v2/0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch') diff --git a/recipes-kernel/linux/linux-3.0.6/acp3448v2/0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch b/recipes-kernel/linux/linux-3.0.6/acp3448v2/0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch new file mode 100644 index 0000000..4c5e0ef --- /dev/null +++ b/recipes-kernel/linux/linux-3.0.6/acp3448v2/0005-Patch-arch_powerpc_mm_tlb_nohash_c.patch @@ -0,0 +1,85 @@ +From c1707a8d6ec37484edeb8d0221ebd6de41b3f4ad Mon Sep 17 00:00:00 2001 +From: Jerry Pei +Date: Mon, 23 Apr 2012 14:54:32 +0800 +Subject: [PATCH 5/7] Patch arch_powerpc_mm_tlb_nohash_c to support lsi acp + +Signed-off-by: Jerry Pei +--- + arch/powerpc/mm/tlb_nohash.c | 35 ++++++++++++++++++++++++++++++++++- + 1 files changed, 34 insertions(+), 1 deletions(-) + +diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c +index 0bdad3a..b4e065b 100644 +--- a/arch/powerpc/mm/tlb_nohash.c ++++ b/arch/powerpc/mm/tlb_nohash.c +@@ -36,6 +36,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -152,6 +153,16 @@ EXPORT_SYMBOL(local_flush_tlb_page); + * And here are the SMP non-local implementations + */ + #ifdef CONFIG_SMP ++static int amp; ++ ++#ifdef CONFIG_44x ++void __init early_init_mmu_44x(void) ++{ ++ unsigned long root = of_get_flat_dt_root(); ++ if (of_flat_dt_is_compatible(root, "ibm,47x-AMP")) ++ amp = 1; ++} ++#endif /* CONFIG_44x */ + + static DEFINE_RAW_SPINLOCK(tlbivax_lock); + +@@ -232,7 +243,7 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, + cpu_mask = mm_cpumask(mm); + if (!mm_is_core_local(mm)) { + /* If broadcast tlbivax is supported, use it */ +- if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) { ++ if (!amp && mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) { + int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL); + if (lock) + raw_spin_lock(&tlbivax_lock); +@@ -266,6 +277,17 @@ EXPORT_SYMBOL(flush_tlb_page); + + #endif /* CONFIG_SMP */ + ++#ifdef CONFIG_PPC_47x ++void __init early_init_mmu_47x(void) ++{ ++#ifdef CONFIG_SMP ++ unsigned long root = of_get_flat_dt_root(); ++ if (of_get_flat_dt_prop(root, "cooperative-partition", NULL)) ++ mmu_clear_feature(MMU_FTR_USE_TLBIVAX_BCAST); ++#endif /* CONFIG_SMP */ ++} ++#endif /* CONFIG_PPC_47x */ ++ + /* + * Flush kernel TLB entries in the given range + */ +@@ -584,4 +606,15 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base, + /* Finally limit subsequent allocations */ + memblock_set_current_limit(first_memblock_base + ppc64_rma_size); + } ++#else /* ! CONFIG_PPC64 */ ++void __init early_init_mmu(void) ++{ ++#if defined(CONFIG_SMP) && defined(CONFIG_PPC_44x) ++ early_init_mmu_44x(); ++#endif ++#ifdef CONFIG_PPC_47x ++ early_init_mmu_47x(); ++#endif ++} + #endif /* CONFIG_PPC64 */ ++ +-- +1.7.0.4 + -- cgit v1.2.3-54-g00ecf