The fpgautil command line tool provides an easy-to-use interface for FPGA
management. It allows the loading of fpga via overlay or through sysfs
interface, as well as reading fpga configurations using the Xilinx zynqMP fpga
manager.

Usage: fpgautil -b <bin file path> -o <dtbo file path>

Options: -b <binfile> (Bin file path)
    -o <dtbofile> (DTBO file path)
    -f <flags> Optional: <Bitstream type flags>
        f := <Full | Partial >
        Default: <Full>
    -s <secure flags> Optional: <Secure flags>
        s := <AuthDDR | AuthOCM | EnUsrKey | EnDevKey | AuthEnUsrKeyDDR |
            AuthEnUsrKeyOCM | AuthEnDevKeyDDR | AuthEnDevKeyOCM>
    -k <AesKey> Optional: <AES User Key>
    -r <Readback> Optional: <file name>
        Default: By default Read back contents will be stored in readback.bin
file
    -t Optional: <Readback Type>
        0 - Configuration Register readback
        1 - Configuration Data Frames readback
        Default: 0 (Configuration register readback)
    -R Optional: Remove overlay from a live tree

Examples:
    (Load Full bitstream using Overlay)
        fpgautil -b top.bit.bin -o can.dtbo
    (Load Partial bitstream through the sysfs interface)
        fpgautil -b top.bit.bin -f Partial
    (Load Authenticated bitstream through the sysfs interface)
        fpgautil -b top.bit.bin -f Full -s AuthDDR
    (Load Parital Encrypted Userkey bitstream using Overlay)
        fpgautil -b top.bit.bin -o pl.dtbo -f Partial -s EnUsrKey -k <32byte
key value>

NOTE:
    A binary file built for testing purposes can be downloaded from the
following location:
http://linux.enea.com/EneaLinux8.0/Xilinx-utils/fpga.bin.tar.bz2

In order to load the fpga with the example file, do the following:
1. Extract the binary file under /lib/firmware rootfs folder
    $ tar -xpf system.bin.tar.bz2 -C <rootfs_nfs_path>/lib/firmware

2. (Re)Boot the target

3. Load the binary file
    $ fpgautil -b /lib/firmware/system.bin

[ 39.243008] fpga_manager fpga0: writing system.bin to Xilinx ZynqMP FPGA
Manager
Time taken to load BIN is 15500.000000 Milli Seconds
BIN FILE loaded through zynqMP FPGA manager successfully