From 1b32f7896686cc3ab94c6ebc6d703bda647d34f4 Mon Sep 17 00:00:00 2001 From: Adrian Calianu Date: Thu, 10 Aug 2017 11:12:17 +0200 Subject: add Cavium CN8304 BSP Kernel sources and device tree sources(DTS) are taken from Cavium OCTEONTX_SDK_6_1_0_p2_build_17 Kernel sources are kept on a teporarly git repo and waiting to be defined a final git repo location. Kernel configs are taken from OCTEONTX_SDK_6_1_0_p2_build_17 and used minimal version/tiny. Kernel image type is "Image", "bzImage" is not supported". Signed-off-by: Adrian Calianu --- .../linux/linux-cavium/dts/asim-cn81xx-linux.dts | 541 ++++ .../linux/linux-cavium/dts/asim-cn83xx-linux.dts | 490 ++++ .../linux/linux-cavium/dts/cn81xx-linux.dtsi | 469 ++++ .../linux/linux-cavium/dts/cn83xx-linux.dtsi | 762 ++++++ .../linux/linux-cavium/dts/ebb8004-linux.dts | 488 ++++ .../linux/linux-cavium/dts/ebb8104-linux.dts | 623 +++++ .../linux/linux-cavium/dts/ebb8304-linux.dts | 992 +++++++ .../linux/linux-cavium/dts/ebb8604-linux.dts | 49 + .../linux/linux-cavium/dts/ebb8604-phy.dtsi | 123 + .../linux/linux-cavium/dts/ebb8800-phy.dtsi | 123 + .../linux/linux-cavium/dts/generic-linux.dts | 54 + .../linux/linux-cavium/dts/generic-linux.dtsi | 2721 ++++++++++++++++++++ .../linux/linux-cavium/dts/nas8104-linux.dts | 165 ++ .../linux/linux-cavium/dts/rbd8030-linux.dts | 199 ++ .../linux/linux-cavium/dts/sff8104-linux.dts | 301 +++ recipes-kernel/linux/linux-cavium_4.9.bb | 34 + 16 files changed, 8134 insertions(+) create mode 100644 recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi create mode 100644 recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi create mode 100644 recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi create mode 100644 recipes-kernel/linux/linux-cavium/dts/generic-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi create mode 100644 recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts create mode 100644 recipes-kernel/linux/linux-cavium_4.9.bb (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts b/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts new file mode 100644 index 0000000..006e00e --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts @@ -0,0 +1,541 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + rgmii00: rgmii00 { + reg = <3> ; + compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22"; + }; + }; + + mdio1@87e005003880 { + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii02 { + qlm-mode = "0x002,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii03 { + qlm-mode = "0x003,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi00: xfi00 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi01 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi02: xfi02 { + qlm-mode = "0x002,xfi","0x002,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi03: xfi03 { + qlm-mode = "0x003,xfi","0x003,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui00: xlaui00 { + qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui00: xaui00 { + qlm-mode = "0x000,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui00 { + qlm-mode = "0x000,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui01: rxaui01 { + qlm-mode = "0x001,rxaui"; + reg = <2> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <1> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <2> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <3> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + + sgmii10: sgmii10 { + qlm-mode = "0x010,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii11 { + qlm-mode = "0x011,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii12 { + qlm-mode = "0x012,sgmii"; + reg = <10> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii13 { + qlm-mode = "0x013,sgmii"; + reg = <11> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi10: xfi10 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi11 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi12 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi13 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <11> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui10 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui10: xaui10 { + qlm-mode = "0x010,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui10 { + qlm-mode = "0x010,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui11: rxaui11 { + qlm-mode = "0x011,rxaui"; + reg = <10> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii10: qsgmii10 { + qlm-mode = "0x010,qsgmii"; + reg = <8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii11: qsgmii11 { + qlm-mode = "0x011,qsgmii"; + reg = <9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii12: qsgmii12 { + qlm-mode = "0x012,qsgmii"; + reg = <10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii13: qsgmii13 { + qlm-mode = "0x013,qsgmii"; + reg = <11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + rgx0 { + rgmii00 { + reg = <3>; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rgmii00>; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + // SGMII + sgmii00 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii00>; + }; + sgmii01 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii01>; + }; + sgmii02 { + reg = <2>; + qlm-mode = "0x002,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii02>; + }; + sgmii03 { + reg = <3>; + qlm-mode = "0x003,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii03>; + }; + xfi00 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi01 { + reg = <1>; + qlm-mode = "0x001,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi02 { + reg = <2>; + qlm-mode = "0x002,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi03 { + reg = <3>; + qlm-mode = "0x003,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + // 10g-kr + xfi-10g-kr00 { + reg = <0>; + qlm-mode = "0x000,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi-10g-kr01 { + reg = <1>; + qlm-mode = "0x001,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi-10g-kr02 { + reg = <2>; + qlm-mode = "0x002,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi-10g-kr03 { + reg = <3>; + qlm-mode = "0x003,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + xlaui00 { + reg = <0>; + qlm-mode = "0x000,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xlaui-40g-kr00 { + reg = <0>; + qlm-mode = "0x000,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xaui00 { + reg = <0>; + qlm-mode = "0x000,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui00>; + }; + rxaui00 { + reg = <0>; + qlm-mode = "0x000,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui00>; + }; + rxaui01 { + reg = <1>; + qlm-mode = "0x001,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui01>; + }; + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii00>; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii01>; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii02>; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii03>; + }; + }; + bgx1 { + sgmii10 { + reg = <0>; + qlm-mode = "0x010,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */ + }; + sgmii11 { + reg = <1>; + qlm-mode = "0x011,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii11>; + }; + sgmii12 { + reg = <2>; + qlm-mode = "0x012,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii12>; + }; + sgmii13 { + reg = <3>; + qlm-mode = "0x013,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii13>; + }; + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi12 { + reg = <2>; + qlm-mode = "0x012,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi13 { + reg = <3>; + qlm-mode = "0x013,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + // 10g_kr + xfi-10g-kr10 { + reg = <0>; + qlm-mode = "0x010,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi-10g-kr11 { + reg = <1>; + qlm-mode = "0x011,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi-10g-kr12 { + reg = <2>; + qlm-mode = "0x012,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi-10g-kr13 { + reg = <3>; + qlm-mode = "0x013,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + xlaui10 { + reg = <0>; + qlm-mode = "0x010,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xlaui-40g-kr-10 { + reg = <0>; + qlm-mode = "0x010,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xaui10 { + reg = <0>; + qlm-mode = "0x010,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui10>; + }; + rxaui10 { + reg = <8>; + qlm-mode = "0x010,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui10>; + }; + rxaui11 { + reg = <9>; + qlm-mode = "0x011,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui11>; + }; + qsgmii10 { + reg = <0>; + qlm-mode = "0x010,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii10>; + }; + qsgmii11 { + reg = <1>; + qlm-mode = "0x011,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii11>; + }; + qsgmii12 { + reg = <2>; + qlm-mode = "0x012,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii12>; + }; + qsgmii13 { + reg = <3>; + qlm-mode = "0x013,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii13>; + }; + }; +}; + +&i2c_9_0 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; +}; + diff --git a/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts b/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts new file mode 100644 index 0000000..e1c90f7 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts @@ -0,0 +1,490 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn83xx-linux.dtsi" + +/ { + soc@0 { + uaa0: serial@87e028000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x28000000 0x0 0x1000>; + interrupts = <0 5 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + uaa1: serial@87e029000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x29000000 0x0 0x1000>; + interrupts = <0 6 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + uaa2: serial@87e02a000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x2a000000 0x0 0x1000>; + interrupts = <0 7 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + uaa3: serial@87e02b000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x2b000000 0x0 0x1000>; + interrupts = <0 8 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + pci@848000000000 { + mrml-bridge0@1,0 { + mdio-nexus@1,3 { + mdio0@87e005003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003800 0x0 0x30>; + + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii02 { + qlm-mode = "0x002,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii03 { + qlm-mode = "0x003,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi00: xfi00 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi01 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi02: xfi02 { + qlm-mode = "0x002,xfi","0x002,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi03: xfi03 { + qlm-mode = "0x003,xfi","0x003,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui00: xlaui00 { + qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui00: xaui00 { + qlm-mode = "0x000,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui00 { + qlm-mode = "0x000,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui01: rxaui01 { + qlm-mode = "0x001,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <1> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <2> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <3> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + + sgmii10: sgmii10 { + qlm-mode = "0x010,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii11 { + qlm-mode = "0x011,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii12 { + qlm-mode = "0x012,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii13 { + qlm-mode = "0x013,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi10: xfi10 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi11 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi12 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi13 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <11> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui10 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui10: xaui10 { + qlm-mode = "0x010,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui10 { + qlm-mode = "0x010,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui11: rxaui11 { + qlm-mode = "0x011,rxaui"; + reg = <9> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii10: qsgmii10 { + qlm-mode = "0x010,qsgmii"; + reg = <8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii11: qsgmii11 { + qlm-mode = "0x011,qsgmii"; + reg = <9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii12: qsgmii12 { + qlm-mode = "0x012,qsgmii"; + reg = <10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii13: qsgmii13 { + qlm-mode = "0x013,qsgmii"; + reg = <11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + + mdio1@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + + sgmii20: sgmii20 { + qlm-mode = "0x020,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + + }; + sgmii21: sgmii21 { + qlm-mode = "0x021,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii22: sgmii22 { + qlm-mode = "0x022,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii23: sgmii23 { + qlm-mode = "0x023,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi20: xfi20 { + qlm-mode = "0x020,xfi","0x020,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi21: xfi21 { + qlm-mode = "0x021,xfi","0x021,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi22: xfi22 { + qlm-mode = "0x022,xfi","0x022,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi23: xfi23 { + qlm-mode = "0x023,xfi","0x023,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui20: xlaui20 { + qlm-mode = "0x020,xlaui","0x020,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui20: xaui20 { + qlm-mode = "0x020,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui20: rxaui20 { + qlm-mode = "0x020,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui21: rxaui21 { + qlm-mode = "0x021,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii20: qsgmii20 { + qlm-mode = "0x020,qsgmii"; + reg = <0> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii21: qsgmii21 { + qlm-mode = "0x021,qsgmii"; + reg = <1> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii22: qsgmii22 { + qlm-mode = "0x022,qsgmii"; + reg = <2> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii23: qsgmii23 { + qlm-mode = "0x023,qsgmii"; + reg = <3> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + + sgmii30: sgmii30 { + qlm-mode = "0x030,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii31: sgmii31 { + qlm-mode = "0x011,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi30: xfi30 { + qlm-mode = "0x030,xfi","0x030,xfi-10g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi31: xfi31 { + qlm-mode = "0x031,xfi","0x031,xfi-10g-kr"; + reg = <9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi32: xfi32 { + qlm-mode = "0x032,xfi","0x032,xfi-10g-kr"; + reg = <10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi33: xfi33 { + qlm-mode = "0x033,xfi","0x033,xfi-10g-kr"; + reg = <11> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui30: xlaui30 { + qlm-mode = "0x030,xlaui","0x030,xlaui-40g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui30: xaui30 { + qlm-mode = "0x030,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui30: rxaui30 { + qlm-mode = "0x030,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui31: rxaui31 { + qlm-mode = "0x031,rxaui"; + reg = <9> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii30: qsgmii30 { + qlm-mode = "0x030,qsgmii"; + reg = <8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii31: qsgmii31 { + qlm-mode = "0x031,qsgmii"; + reg = <9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii32: qsgmii32 { + qlm-mode = "0x032,qsgmii"; + reg = <10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii33: qsgmii33 { + qlm-mode = "0x033,qsgmii"; + reg = <11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + }; + }; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi new file mode 100644 index 0000000..7a36ea4 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi @@ -0,0 +1,469 @@ +/* + * Cavium Thunder DTS file - Thunder SoC description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/ { + model = "Cavium ThunderX CN81XX board"; + compatible = "cavium,thunder-81xx"; + interrupt-parent = <&gic0>; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + }; + }; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "psci"; + /* socket 0 */ + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x001>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x002>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x003>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + }; + + thunderx_L2_0: l2-cache0 { + compatible = "cache"; + numa-node-id = <0>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 4>, + <1 14 4>, + <1 11 4>, + <1 10 4>; + }; + + pmu { + compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; + interrupts = <1 7 4>; + }; + + gic0: interrupt-controller@801000000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + #redistributor-regions = <1>; + ranges; + interrupt-controller; + reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */ + <0x8010 0x80000000 0x0 0x600000>; /* GICR */ + interrupts = <1 9 4>; + + its: gic-its@801000020000 { + compatible = "arm,gic-v3-its"; + reg = <0x8010 0x20000 0x0 0x200000>; + msi-controller; + numa-node-id = <0>; + }; + }; + + soc@0 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + numa-node-id = <0>; + + refclkuaa: refclkuaa { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <116640000>; + clock-output-names = "refclkuaa"; + }; + + sclk: sclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <800000000>; + clock-output-names = "sclk"; + }; + + uaa0: serial@87e028000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x28000000 0x0 0x1000>; + interrupts = <0 5 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + uaa1: serial@87e029000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x29000000 0x0 0x1000>; + interrupts = <0 6 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + watch-dog@8440000a0000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x8440 0xa0000 0x0 0x1000>, <0x8440 0xb0000 0x0 0x1000>; + interrupts = <0 9 4>; + }; + + pbus0: nor@0 { + compatible = "cfi-flash"; + reg = <0x8000 0x0 0x0 0x800000>; + device-width = <1>; + bank-width = <1>; + clocks = <&sclk>; + }; + + smmu0@830000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8300 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>; + + mmu-masters = <&ecam0 0x100>, + <&pem0 0x200>, + <&pem1 0x300>, + <&pem2 0x400>; + + }; + + ecam0: pci@848000000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + u-boot,dm-pre-reloc; + dma-coherent; + reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x080 0x00000000>, /* mem ranges */ + <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>, /* SATA */ + <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x28000000>, /* UARTs */ + <0x03000000 0x87e0 0x2a000000 0x87e0 0x2a000000 0x000 0x96000000>, /* PEMs */ + <0x03000000 0x8400 0x00000000 0x8400 0x00000000 0x010 0x00000000>, /* RNM */ + <0x03000000 0x8430 0x00000000 0x8430 0x00000000 0x02 0x00000000>, /* NIC0*/ + <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>; + + mrml_bridge: mrml-bridge0@1,0 { + compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>; + reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */ + device_type = "pci"; + u-boot,dm-pre-reloc; + + mdio-nexus@1,3 { + compatible = "cavium,thunder-8890-mdio-nexus"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */ + assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>; + ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>; + mdio0@87e005003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003800 0x0 0x30>; + }; + mdio1@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + }; + }; + + mmc_1_4: mmc@1,4 { + compatible = "cavium,thunder-8890-mmc"; + reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */ + #address-cells = <1>; + #size-cells = <0>; + clocks = <&sclk>; + }; + + i2c_9_0: i2c@9,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c"; + reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */ + clock-frequency = <100000>; + clocks = <&sclk>; + u-boot,dm-pre-reloc; + }; + + i2c_9_1: i2c@9,1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c"; + reg = <0x4900 0 0 0 0>; /* DEVFN = 0x49 (9:1) */ + clock-frequency = <100000>; + clocks = <&sclk>; + u-boot,dm-pre-reloc; + }; + + rgx0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x9000 0 0 0 0>; /* DEVFN = 0x90 (16:1) */ + }; + bgx0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */ + }; + bgx1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */ + }; + }; + + spi_7_0: spi@7,0 { + compatible = "cavium,thunder-8190-spi", "cavium,thunderx-spi"; + reg = <0x3800 0x0 0x0 0x0 0x0>; /* DEVFN = 0x38 (7:0) */ + #address-cells = <1>; + #size-cells = <0>; + clocks = <&sclk>; + }; + + gpio_6_0: gpio0@6,0 { + #gpio-cells = <2>; + compatible = "cavium,thunder-8890-gpio"; + gpio-controller; + reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */ + u-boot,dm-pre-reloc; + }; + + nfc: nand@b,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,cn8130-nand"; + reg = <0x5800 0 0 0 0>; /* DEVFN = 0x58 (b:0) */ + clocks = <&sclk>; + }; + }; + + pem0: pci@87e0c0000000 { + + /* "cavium,pci-host-thunder-pem" implies that + the first bus in bus-range has config access + via the "PEM space", subsequent buses have + config assess via the "Configuration space". + The "mem64 PEM" range is used to map the PEM + BAR0, which is used by the AER and PME MSI-X + sources. UEFI and Linux must assign the same + bus number to each device, otherwise Linux + enumeration gets confused. Because UEFI + skips the PEM bus and its PCIe-RC bridge it + uses a numbering that starts 1 bus higher. + */ + + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */ + }; + + pem1: pci@87e0c1000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */ + }; + + pem2: pci@87e0c2000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */ + }; + + tdm: tdm@d,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,thunder-8190-tdm"; + reg = <0x6800 0 0 0>; /* DEVFN = 0x68 (d:0) */ + clocks = <&sclk>; + }; + }; + + aliases { + serial0 = &uaa0; + serial1 = &uaa1; + i2c0 = &i2c_9_0; + i2c1 = &i2c_9_1; + spi0 = &spi_7_0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + + memory@0 { + device_type = "memory"; + reg = <0x0 0x01400000 0x0 0x7EC00000>; + /* socket 0 */ + numa-node-id = <0>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi new file mode 100644 index 0000000..8cb10ec --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi @@ -0,0 +1,762 @@ +/* + * Cavium Thunder DTS file - Thunder SoC description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/ { + model = "Cavium ThunderX CN83XX board"; + compatible = "cavium,thunder-83xx"; + interrupt-parent = <&gic0>; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + core4 { + cpu = <&CPU4>; + }; + core5 { + cpu = <&CPU5>; + }; + core6 { + cpu = <&CPU6>; + }; + core7 { + cpu = <&CPU7>; + }; + core8 { + cpu = <&CPU8>; + }; + core9 { + cpu = <&CPU9>; + }; + core10 { + cpu = <&CPU10>; + }; + core11 { + cpu = <&CPU11>; + }; + core12 { + cpu = <&CPU12>; + }; + core13 { + cpu = <&CPU13>; + }; + core14 { + cpu = <&CPU14>; + }; + core15 { + cpu = <&CPU15>; + }; + core16 { + cpu = <&CPU16>; + }; + core17 { + cpu = <&CPU17>; + }; + core18 { + cpu = <&CPU18>; + }; + core19 { + cpu = <&CPU19>; + }; + core20 { + cpu = <&CPU20>; + }; + core21 { + cpu = <&CPU21>; + }; + core22 { + cpu = <&CPU22>; + }; + core23 { + cpu = <&CPU23>; + }; + }; + }; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "psci"; + /* socket 0 */ + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x001>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x002>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x003>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU4: cpu@4 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x004>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU5: cpu@5 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x005>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU6: cpu@6 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x006>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU7: cpu@7 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x007>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU8: cpu@8 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x008>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU9: cpu@9 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x009>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU10: cpu@a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00a>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU11: cpu@b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00b>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU12: cpu@c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00c>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU13: cpu@d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00d>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU14: cpu@e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00e>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU15: cpu@f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00f>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU16: cpu@100 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU17: cpu@101 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU18: cpu@102 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU19: cpu@103 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU20: cpu@104 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x104>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU21: cpu@105 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x105>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU22: cpu@106 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x106>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU23: cpu@107 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x107>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + }; + + thunderx_L2_0: l2-cache0 { + compatible = "cache"; + numa-node-id = <0>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 4>, + <1 14 4>, + <1 11 4>, + <1 10 4>; + }; + + pmu { + compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; + interrupts = <1 7 4>; + }; + + gic0: interrupt-controller@801000000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + #redistributor-regions = <1>; + ranges; + interrupt-controller; + reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */ + <0x8010 0x80000000 0x0 0x600000>; /* GICR */ + interrupts = <1 9 4>; + + its: gic-its@801000020000 { + compatible = "arm,gic-v3-its"; + reg = <0x8010 0x20000 0x0 0x200000>; + msi-controller; + numa-node-id = <0>; + }; + }; + + soc@0 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + numa-node-id = <0>; + + refclkuaa: refclkuaa { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <116640000>; + clock-output-names = "refclkuaa"; + }; + + sclk: sclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <800000000>; + clock-output-names = "sclk"; + }; + + uaa0: serial@87e028000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x28000000 0x0 0x1000>; + interrupts = <0 5 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + uaa1: serial@87e029000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x29000000 0x0 0x1000>; + interrupts = <0 6 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + uboot,skip-init; + }; + + watch-dog@8440000a0000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x8440 0xa0000 0x0 0x1000>, <0x8440 0xb0000 0x0 0x1000>; + interrupts = <0 9 4>; + }; + + smmu0@830000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8300 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>; + + mmu-masters = <&ecam0 0x100>, + <&pem0 0x200>, + <&pem1 0x300>, + <&pem2 0x400>, + <&pem3 0x500>; + + }; + + smmu1@831000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8310 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 70 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>; + + mmu-masters = <&ecam1 0x100>; + }; + + + ecam0: pci@848000000000 { + compatible = "cavium,pci-host-octeontx-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x0 0xff>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */ + ranges = <0x03000000 0x8030 0x00000000 0x8030 0x00000000 0x050 0x00100000>, /* mem ranges */ + <0x03000000 0x8280 0x00000000 0x8280 0x00000000 0x007 0x02000000>, + <0x03000000 0x8400 0x00800000 0x8400 0x00800000 0x00f 0xfc040000>, + <0x03000000 0x8580 0x00000000 0x8580 0x00000000 0x0a8 0x04000000>, + <0x03000000 0x86e0 0x00000000 0x86e0 0x00000000 0x100 0x28000000>, + <0x03000000 0x87e0 0x40000000 0x87e0 0x40000000 0x000 0x6c800000>, + <0x03000000 0x87e0 0xd0000000 0x87e0 0xd0000000 0x010 0xaf100000>, + <0x03000000 0x0000 0x01400000 0x0000 0x01400000 0x000 0x00A00000>; /* SSO mailbox */ + + + mrml_bridge: mrml-bridge0@1,0 { + compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge"; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>; + reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */ + device_type = "pci"; + u-boot,dm-pre-reloc; + + mdio-nexus@1,3 { + compatible = "cavium,thunder-8890-mdio-nexus"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */ + assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>; + ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>; + + mdio0@87e005003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003800 0x0 0x30>; + + }; + + mdio1@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + + + }; + }; + + mmc_1_4: mmc@1,4 { + compatible = "cavium,thunder-8890-mmc"; + reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */ + #address-cells = <1>; + #size-cells = <0>; + clocks = <&sclk>; + }; + + i2c_9_0: i2c@9,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c"; + reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */ + clock-frequency = <100000>; + clocks = <&sclk>; + u-boot,dm-pre-reloc; + }; + + i2c_9_1: i2c@9,1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c"; + reg = <0x4900 0 0 0 0>; /* DEVFN = 0x49 (9:1) */ + clock-frequency = <100000>; + clocks = <&sclk>; + u-boot,dm-pre-reloc; + }; + + bgx0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */ + }; + bgx1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */ + }; + + bgx2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8200 0 0 0 0>; /* DEVFN = 0x82 (16:0) */ + }; + + bgx3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8300 0 0 0 0>; /* DEVFN = 0x83 (16:0) */ + }; + }; + + spi_7_0: spi@7,0 { + compatible = "cavium,thunder-8190-spi", "cavium,thunderx-spi"; + reg = <0x3800 0x0 0x0 0x0 0x0>; /* DEVFN = 0x38 (7:0) */ + #address-cells = <1>; + #size-cells = <0>; + clocks = <&sclk>; + }; + + gpio_6_0: gpio0@6,0 { + #gpio-cells = <2>; + compatible = "cavium,thunder-8890-gpio"; + gpio-controller; + reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */ + u-boot,dm-pre-reloc; + }; + }; + + ecam1: pci@849000000000 { + compatible = "cavium,pci-host-octeontx-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x10000 0x10000>; + bus-range = <0x0 0xff>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8490 0x00000000 0 0x10000000>; /* Configuration space */ + ranges = <0x03000000 0x8090 0x00000000 0x8090 0x00000000 0x0c0 0x00300000>, /* mem ranges */ + <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x000 0x30800000>, + <0x03000000 0x8430 0x00000000 0x8430 0x00000000 0x000 0xf0000000>, + <0x03000000 0x8540 0x00000000 0x8540 0x00000000 0x004 0x02000000>, + <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x040 0x02000000>, + <0x03000000 0x87f1 0x80000000 0x87f1 0x80000000 0x000 0x80000000>, /* LMTLINE */ + <0x03000000 0x0000 0x01E00000 0x0000 0x01E00000 0x000 0x00A00000>; /* PKI emulated VF space */ + }; + + pem0: pci@87e0c0000000 { + + /* "cavium,pci-host-thunder-pem" implies that + the first bus in bus-range has config access + via the "PEM space", subsequent buses have + config assess via the "Configuration space". + The "mem64 PEM" range is used to map the PEM + BAR0, which is used by the AER and PME MSI-X + sources. UEFI and Linux must assign the same + bus number to each device, otherwise Linux + enumeration gets confused. Because UEFI + skips the PEM bus and its PCIe-RC bridge it + uses a numbering that starts 1 bus higher. + */ + + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */ + }; + + pem1: pci@87e0c1000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */ + }; + + pem2: pci@87e0c2000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */ + }; + + pem3: pci@87e0c3000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0xc7 0xff>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x88c0 0xc7000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00030000 0x88f0 0x00030000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x88d0 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x88e0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 28 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 29 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 30 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 31 4>; /* INTD */ + }; + }; + + aliases { + serial0 = &uaa0; + serial1 = &uaa1; + }; + + chosen { + stdout-path = &uaa0; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x02800000 0x0 0x7EC00000>; + /* socket 0 */ + numa-node-id = <0>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts new file mode 100644 index 0000000..cc80f31 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts @@ -0,0 +1,488 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + rgmii00: rgmii00 { + reg = <3> ; + compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22"; + }; + }; + + mdio1@87e005003880 { + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi00: xfi00 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi01 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <1> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <2> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <3> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + + sgmii10: sgmii10 { + qlm-mode = "0x010,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii11 { + qlm-mode = "0x011,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii12 { + qlm-mode = "0x012,sgmii"; + reg = <10> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii13 { + qlm-mode = "0x013,sgmii"; + reg = <11> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi10: xfi10 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi11 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi12 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi13 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <11> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui10 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui10: xaui10 { + qlm-mode = "0x010,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui10 { + qlm-mode = "0x010,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui11: rxaui11 { + qlm-mode = "0x011,rxaui"; + reg = <10> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii10: qsgmii10 { + qlm-mode = "0x010,qsgmii"; + reg = <8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii11: qsgmii11 { + qlm-mode = "0x011,qsgmii"; + reg = <9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii12: qsgmii12 { + qlm-mode = "0x012,qsgmii"; + reg = <10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii13: qsgmii13 { + qlm-mode = "0x013,qsgmii"; + reg = <11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + rgx0 { + rgmii00 { + reg = <3>; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rgmii00>; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + // SGMII + sgmii00 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii00>; + }; + sgmii01 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii01>; + }; + xfi00 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi01 { + reg = <1>; + qlm-mode = "0x001,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + // 10g-kr + xfi-10g-kr00 { + reg = <0>; + qlm-mode = "0x000,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi-10g-kr01 { + reg = <1>; + qlm-mode = "0x001,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii00>; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii01>; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii02>; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii03>; + }; + }; + bgx1 { + sgmii10 { + reg = <0>; + qlm-mode = "0x010,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */ + }; + sgmii11 { + reg = <1>; + qlm-mode = "0x011,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii11>; + }; + sgmii12 { + reg = <2>; + qlm-mode = "0x012,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii12>; + }; + sgmii13 { + reg = <3>; + qlm-mode = "0x013,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii13>; + }; + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi12 { + reg = <2>; + qlm-mode = "0x012,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi13 { + reg = <3>; + qlm-mode = "0x013,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + // 10g_kr + xfi-10g-kr10 { + reg = <0>; + qlm-mode = "0x010,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi-10g-kr11 { + reg = <1>; + qlm-mode = "0x011,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi-10g-kr12 { + reg = <2>; + qlm-mode = "0x012,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi-10g-kr13 { + reg = <3>; + qlm-mode = "0x013,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + xlaui10 { + reg = <0>; + qlm-mode = "0x010,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xlaui-40g-kr-10 { + reg = <0>; + qlm-mode = "0x010,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xaui10 { + reg = <0>; + qlm-mode = "0x010,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui10>; + }; + rxaui10 { + reg = <8>; + qlm-mode = "0x010,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui10>; + }; + rxaui11 { + reg = <9>; + qlm-mode = "0x011,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui11>; + }; + qsgmii10 { + reg = <0>; + qlm-mode = "0x010,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii10>; + }; + qsgmii11 { + reg = <1>; + qlm-mode = "0x011,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii11>; + }; + qsgmii12 { + reg = <2>; + qlm-mode = "0x012,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii12>; + }; + qsgmii13 { + reg = <3>; + qlm-mode = "0x013,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii13>; + }; + }; +}; + +&mmc_1_4 { + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 26 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 27 1>; + + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 24 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 25 1>; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; +}; + +&i2c_9_0 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; + gpio1: cpld@6c { + compatible = "gpio-i2c", "cavium,cpld8104"; + reg = <0x6c>; + gpio_base = <48>; + #gpio-cells = <160>; // 8bits for each reg 0..0x13 + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts new file mode 100644 index 0000000..e39bded --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts @@ -0,0 +1,623 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + rgmii00: rgmii00 { + reg = <3> ; + compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22"; + }; + }; + + mdio1@87e005003880 { + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii02 { + qlm-mode = "0x002,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii03 { + qlm-mode = "0x003,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi00: xfi00 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi01 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi02: xfi02 { + qlm-mode = "0x002,xfi","0x002,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi03: xfi03 { + qlm-mode = "0x003,xfi","0x003,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui00: xlaui00 { + qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui00: xaui00 { + qlm-mode = "0x000,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui00 { + qlm-mode = "0x000,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui01: rxaui01 { + qlm-mode = "0x001,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <1> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <2> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <3> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + + sgmii10: sgmii10 { + qlm-mode = "0x010,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii11 { + qlm-mode = "0x011,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii12 { + qlm-mode = "0x012,sgmii"; + reg = <10> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii13 { + qlm-mode = "0x013,sgmii"; + reg = <11> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi10: xfi10 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi11 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi12 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi13 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <11> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui10 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui10: xaui10 { + qlm-mode = "0x010,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui10 { + qlm-mode = "0x010,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui11: rxaui11 { + qlm-mode = "0x011,rxaui"; + reg = <9> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii10: qsgmii10 { + qlm-mode = "0x010,qsgmii"; + reg = <8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii11: qsgmii11 { + qlm-mode = "0x011,qsgmii"; + reg = <9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii12: qsgmii12 { + qlm-mode = "0x012,qsgmii"; + reg = <10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii13: qsgmii13 { + qlm-mode = "0x013,qsgmii"; + reg = <11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + rgx0 { + rgmii00 { + reg = <3>; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rgmii00>; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + // SGMII + sgmii00 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii00>; + }; + sgmii01 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii01>; + }; + sgmii02 { + reg = <2>; + qlm-mode = "0x002,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii02>; + }; + sgmii03 { + reg = <3>; + qlm-mode = "0x003,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii03>; + }; + xfi00 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi01 { + reg = <1>; + qlm-mode = "0x001,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi02 { + reg = <2>; + qlm-mode = "0x002,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi03 { + reg = <3>; + qlm-mode = "0x003,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + // 10g-kr + xfi-10g-kr00 { + reg = <0>; + qlm-mode = "0x000,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi-10g-kr01 { + reg = <1>; + qlm-mode = "0x001,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi-10g-kr02 { + reg = <2>; + qlm-mode = "0x002,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi-10g-kr03 { + reg = <3>; + qlm-mode = "0x003,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + xlaui00 { + reg = <0>; + qlm-mode = "0x000,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xlaui-40g-kr00 { + reg = <0>; + qlm-mode = "0x000,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xaui00 { + reg = <0>; + qlm-mode = "0x000,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui00>; + }; + rxaui00 { + reg = <0>; + qlm-mode = "0x000,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui00>; + }; + rxaui01 { + reg = <1>; + qlm-mode = "0x001,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui01>; + }; + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii00>; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii01>; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii02>; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii03>; + }; + }; + bgx1 { + sgmii10 { + reg = <0>; + qlm-mode = "0x010,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */ + }; + sgmii11 { + reg = <1>; + qlm-mode = "0x011,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii11>; + }; + sgmii12 { + reg = <2>; + qlm-mode = "0x012,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii12>; + }; + sgmii13 { + reg = <3>; + qlm-mode = "0x013,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii13>; + }; + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi12 { + reg = <2>; + qlm-mode = "0x012,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi13 { + reg = <3>; + qlm-mode = "0x013,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + // 10g_kr + xfi-10g-kr10 { + reg = <0>; + qlm-mode = "0x010,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi-10g-kr11 { + reg = <1>; + qlm-mode = "0x011,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi-10g-kr12 { + reg = <2>; + qlm-mode = "0x012,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi-10g-kr13 { + reg = <3>; + qlm-mode = "0x013,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + xlaui10 { + reg = <0>; + qlm-mode = "0x010,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xlaui-40g-kr-10 { + reg = <0>; + qlm-mode = "0x010,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xaui10 { + reg = <0>; + qlm-mode = "0x010,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui10>; + }; + rxaui10 { + reg = <8>; + qlm-mode = "0x010,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui10>; + }; + rxaui11 { + reg = <9>; + qlm-mode = "0x011,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui11>; + }; + qsgmii10 { + reg = <0>; + qlm-mode = "0x010,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii10>; + }; + qsgmii11 { + reg = <1>; + qlm-mode = "0x011,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii11>; + }; + qsgmii12 { + reg = <2>; + qlm-mode = "0x012,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii12>; + }; + qsgmii13 { + reg = <3>; + qlm-mode = "0x013,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii13>; + }; + }; +}; + +&mmc_1_4 { + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 26 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 27 1>; + + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 24 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 25 1>; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; +}; + +&i2c_9_0 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + rtcmodel = <1>; + }; + gpio1: cpld@6c { + compatible = "gpio-i2c", "cavium,cpld8104"; + gpio-controller; + reg = <0x6c>; + ngpios = <160>; // 8bits for each reg 0..0x13 + #gpio-cells = <2>; + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "jedec,spi-nor", "spi-flash"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; + slic0@2 { + compatible = "silabs,si32260", "linux,spidev"; + reg = <2>; + spi-max-frequency = <2500000>; + reset-gpios = <&gpio1 74 1>; + irq-gpios = <&gpio_6_0 3>; + tx = <&tdm 0>; + rx = <&tdm 1>; + }; + slic1@3 { + compatible = "silabs,si32260", "linux,spidev"; + reg = <3>; + spi-max-frequency = <2500000>; + reset-gpios = <&gpio1 75 1>; + irq-gpios = <&gpio_6_0 5>; + tx = <&tdm 2>; + rx = <&tdm 3>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts new file mode 100644 index 0000000..38edad8 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts @@ -0,0 +1,992 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn83xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + sgmii20: sgmii20 { + qlm-mode = "0x020,sgmii"; + reg = <0x14>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii21: sgmii21 { + qlm-mode = "0x021,sgmii"; + reg = <0x15>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii22: sgmii22 { + qlm-mode = "0x022,sgmii"; + reg = <0x16>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii23: sgmii23 { + qlm-mode = "0x023,sgmii"; + reg = <0x17>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi20: xfi20 { + qlm-mode = "0x020,xfi","0x020,xfi-10g-kr"; + reg = <0x14> ; + compatible = "cortina,cs4223-slice"; + }; + xfi21: xfi21 { + qlm-mode = "0x021,xfi","0x021,xfi-10g-kr"; + reg = <0x15> ; + compatible = "cortina,cs4223-slice"; + }; + xfi22: xfi22 { + qlm-mode = "0x022,xfi","0x022,xfi-10g-kr"; + reg = <0x16> ; + compatible = "cortina,cs4223-slice"; + }; + xfi23: xfi23 { + qlm-mode = "0x023,xfi","0x023,xfi-10g-kr"; + reg = <0x17> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui20: xlaui20 { + qlm-mode = "0x020,xlaui","0x020,xlaui-40g-kr"; + reg = <0x14> ; + compatible = "cortina,cs4223-slice"; + }; + xaui20: xaui20 { + qlm-mode = "0x020,xaui"; + reg = <0x14> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui20: rxaui20 { + qlm-mode = "0x020,rxaui"; + reg = <0x14> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui21: rxaui21 { + qlm-mode = "0x021,rxaui"; + reg = <0x15> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii20: qsgmii20 { + qlm-mode = "0x020,qsgmii"; + reg = <0x14> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii21: qsgmii21 { + qlm-mode = "0x021,qsgmii"; + reg = <0x15> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii22: qsgmii22 { + qlm-mode = "0x022,qsgmii"; + reg = <0x16> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii23: qsgmii23 { + qlm-mode = "0x023,qsgmii"; + reg = <0x17> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + sgmii30: sgmii30 { + qlm-mode = "0x030,sgmii"; + reg = <0x10>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii31: sgmii31 { + qlm-mode = "0x031,sgmii"; + reg = <0x11>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii32: sgmii32 { + qlm-mode = "0x032,sgmii"; + reg = <0x12>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii33: sgmii33 { + qlm-mode = "0x033,sgmii"; + reg = <0x13>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi30: xfi30 { + qlm-mode = "0x030,xfi","0x030,xfi-10g-kr"; + reg = <0x10> ; + compatible = "cortina,cs4223-slice"; + }; + xfi31: xfi31 { + qlm-mode = "0x031,xfi","0x031,xfi-10g-kr"; + reg = <0x11> ; + compatible = "cortina,cs4223-slice"; + }; + xfi32: xfi32 { + qlm-mode = "0x032,xfi","0x032,xfi-10g-kr"; + reg = <0x12> ; + compatible = "cortina,cs4223-slice"; + }; + xfi33: xfi33 { + qlm-mode = "0x033,xfi","0x033,xfi-10g-kr"; + reg = <0x13> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui30: xlaui30 { + qlm-mode = "0x030,xlaui","0x030,xlaui-40g-kr"; + reg = <0x10> ; + compatible = "cortina,cs4223-slice"; + }; + xaui30: xaui30 { + qlm-mode = "0x030,xaui"; + reg = <0x10> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui30: rxaui30 { + qlm-mode = "0x030,rxaui"; + reg = <0x10> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui31: rxaui31 { + qlm-mode = "0x031,rxaui"; + reg = <0x11> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii30: qsgmii30 { + qlm-mode = "0x030,qsgmii"; + reg = <0x10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii31: qsgmii31 { + qlm-mode = "0x031,qsgmii"; + reg = <0x11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii32: qsgmii32 { + qlm-mode = "0x032,qsgmii"; + reg = <0x12> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii33: qsgmii33 { + qlm-mode = "0x033,qsgmii"; + reg = <0x13> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + + mdio1@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0x8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <0x9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii02 { + qlm-mode = "0x002,sgmii"; + reg = <0xa> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii03 { + qlm-mode = "0x003,sgmii"; + reg = <0xb> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi00: xfi00 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0x8> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi01 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <0x9> ; + compatible = "cortina,cs4223-slice"; + }; + xfi02: xfi02 { + qlm-mode = "0x002,xfi","0x002,xfi-10g-kr"; + reg = <0xa> ; + compatible = "cortina,cs4223-slice"; + }; + xfi03: xfi03 { + qlm-mode = "0x003,xfi","0x003,xfi-10g-kr"; + reg = <0xb> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui00: xlaui00 { + qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr"; + reg = <0x8> ; + compatible = "cortina,cs4223-slice"; + }; + xaui00: xaui00 { + qlm-mode = "0x000,xaui"; + reg = <0x8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui00 { + qlm-mode = "0x000,rxaui"; + reg = <0x8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui01: rxaui01 { + qlm-mode = "0x001,rxaui"; + reg = <0x9> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0x8> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <0x9> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <0xa> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <0xb> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + sgmii10: sgmii10 { + qlm-mode = "0x010,sgmii"; + reg = <0xc>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii11 { + qlm-mode = "0x011,sgmii"; + reg = <0xd>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii12 { + qlm-mode = "0x012,sgmii"; + reg = <0xe>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii13 { + qlm-mode = "0x013,sgmii"; + reg = <0xf>; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi10: xfi10 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <0xc> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi11 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <0xd> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi12 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <0xe> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi13 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <0xf> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui10 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <0xc> ; + compatible = "cortina,cs4223-slice"; + }; + xaui10: xaui10 { + qlm-mode = "0x010,xaui"; + reg = <0xc> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui10 { + qlm-mode = "0x010,rxaui"; + reg = <0xc> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui11: rxaui11 { + qlm-mode = "0x011,rxaui"; + reg = <0xd> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + qsgmii10: qsgmii10 { + qlm-mode = "0x010,qsgmii"; + reg = <0xc> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii11: qsgmii11 { + qlm-mode = "0x011,qsgmii"; + reg = <0xd> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii12: qsgmii12 { + qlm-mode = "0x012,qsgmii"; + reg = <0xe> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii13: qsgmii13 { + qlm-mode = "0x013,qsgmii"; + reg = <0xf> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + sgmii00 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii00>; + }; + sgmii01 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii01>; + }; + sgmii02 { + reg = <2>; + qlm-mode = "0x002,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii02>; + }; + sgmii03 { + reg = <3>; + qlm-mode = "0x003,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii03>; + }; + xfi00 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi01 { + reg = <1>; + qlm-mode = "0x001,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi02 { + reg = <2>; + qlm-mode = "0x002,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi03 { + reg = <3>; + qlm-mode = "0x003,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + xfi-10g-kr00 { + reg = <0>; + qlm-mode = "0x000,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + xfi-10g-kr01 { + reg = <1>; + qlm-mode = "0x001,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi01>; + }; + xfi-10g-kr02 { + reg = <2>; + qlm-mode = "0x002,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi02>; + }; + xfi-10g-kr03 { + reg = <3>; + qlm-mode = "0x003,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi03>; + }; + xlaui00 { + reg = <0>; + qlm-mode = "0x000,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xlaui-40g-kr00 { + reg = <0>; + qlm-mode = "0x000,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui00>; + }; + xaui00 { + reg = <0>; + qlm-mode = "0x000,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui00>; + }; + rxaui00 { + reg = <0>; + qlm-mode = "0x000,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui00>; + }; + rxaui01 { + reg = <1>; + qlm-mode = "0x001,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui01>; + }; + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii00>; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii01>; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii02>; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii03>; + }; + }; + bgx1 { + sgmii10 { + reg = <0>; + qlm-mode = "0x010,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */ + }; + sgmii11 { + reg = <1>; + qlm-mode = "0x011,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii11>; + }; + sgmii12 { + reg = <2>; + qlm-mode = "0x012,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii12>; + }; + sgmii13 { + reg = <3>; + qlm-mode = "0x013,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii13>; + }; + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi12 { + reg = <2>; + qlm-mode = "0x012,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi13 { + reg = <3>; + qlm-mode = "0x013,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + xfi-10g-kr10 { + reg = <0>; + qlm-mode = "0x010,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + xfi-10g-kr11 { + reg = <1>; + qlm-mode = "0x011,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + xfi-10g-kr12 { + reg = <2>; + qlm-mode = "0x012,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi12>; + }; + xfi-10g-kr13 { + reg = <3>; + qlm-mode = "0x013,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi13>; + }; + xlaui10 { + reg = <0>; + qlm-mode = "0x010,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xlaui-40g-kr-10 { + reg = <0>; + qlm-mode = "0x010,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui10>; + }; + xaui10 { + reg = <0>; + qlm-mode = "0x010,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui10>; + }; + rxaui10 { + reg = <8>; + qlm-mode = "0x010,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui10>; + }; + rxaui11 { + reg = <9>; + qlm-mode = "0x011,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui11>; + }; + qsgmii10 { + reg = <0>; + qlm-mode = "0x010,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii10>; + }; + qsgmii11 { + reg = <1>; + qlm-mode = "0x011,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii11>; + }; + qsgmii12 { + reg = <2>; + qlm-mode = "0x012,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii12>; + }; + qsgmii13 { + reg = <3>; + qlm-mode = "0x013,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii13>; + }; + }; + + bgx2 { + sgmii20 { + reg = <0>; + qlm-mode = "0x020,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii20>; + }; + sgmii21 { + reg = <1>; + qlm-mode = "0x021,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii21>; + }; + sgmii22 { + reg = <2>; + qlm-mode = "0x022,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii22>; + }; + sgmii23 { + reg = <3>; + qlm-mode = "0x023,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii23>; + }; + xfi20 { + reg = <0>; + qlm-mode = "0x020,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi20>; + }; + xfi21 { + reg = <1>; + qlm-mode = "0x021,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi21>; + }; + xfi22 { + reg = <2>; + qlm-mode = "0x022,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi22>; + }; + xfi23 { + reg = <3>; + qlm-mode = "0x023,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi23>; + }; + xfi-10g-kr20 { + reg = <0>; + qlm-mode = "0x020,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi20>; + }; + xfi-10g-kr21 { + reg = <1>; + qlm-mode = "0x021,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi21>; + }; + xfi-10g-kr22 { + reg = <2>; + qlm-mode = "0x022,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi22>; + }; + xfi-10g-kr23 { + reg = <3>; + qlm-mode = "0x023,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi23>; + }; + xlaui20 { + reg = <0>; + qlm-mode = "0x020,xlaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui20>; + }; + xlaui-40g-kr20 { + reg = <0>; + qlm-mode = "0x020,xlaui-40g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xlaui20>; + }; + xaui20 { + reg = <0>; + qlm-mode = "0x020,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui20>; + }; + rxaui20 { + reg = <0>; + qlm-mode = "0x020,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui20>; + }; + rxaui21 { + reg = <1>; + qlm-mode = "0x021,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui21>; + }; + qsgmii20 { + reg = <0>; + qlm-mode = "0x020,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii20>; + }; + qsgmii21 { + reg = <1>; + qlm-mode = "0x021,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii21>; + }; + qsgmii22 { + reg = <2>; + qlm-mode = "0x022,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii22>; + }; + qsgmii23 { + reg = <3>; + qlm-mode = "0x023,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii23>; + }; + }; + + bgx3 { + sgmii30 { + reg = <0>; + qlm-mode = "0x030,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii30>; + }; + sgmii31 { + reg = <1>; + qlm-mode = "0x031,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii31>; + }; + xfi30 { + reg = <0>; + qlm-mode = "0x030,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi30>; + }; + xfi31 { + reg = <1>; + qlm-mode = "0x031,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi31>; + }; + xfi-10g-kr30 { + reg = <0>; + qlm-mode = "0x030,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi30>; + }; + xfi-10g-kr31 { + reg = <1>; + qlm-mode = "0x031,xfi-10g-kr"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi31>; + }; + xaui30 { + reg = <0>; + qlm-mode = "0x030,xaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xaui30>; + }; + rxaui30 { + reg = <0>; + qlm-mode = "0x030,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui30>; + }; + rxaui31 { + reg = <1>; + qlm-mode = "0x031,rxaui"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rxaui31>; + }; + qsgmii30 { + reg = <0>; + qlm-mode = "0x030,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii30>; + }; + qsgmii31 { + reg = <1>; + qlm-mode = "0x031,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii31>; + }; + qsgmii32 { + reg = <2>; + qlm-mode = "0x032,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii32>; + }; + qsgmii33 { + reg = <3>; + qlm-mode = "0x033,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii33>; + }; + }; +}; + +&mmc_1_4 { + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 22 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 23 1>; + + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* Write-protect */ + wp-gpios = <&gpio_6_0 24 0>; + /* Card detect */ + cd-gpios = <&gpio_6_0 25 1>; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* High-speed mode is supported */ + cap-sd-highspeed; + cap-mmc-highspeed; + }; +}; + +&i2c_9_0 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + rtcmodel = <1>; + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "micron,n25q128a13", "jedec,spi-nor", "spi-flash"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts new file mode 100644 index 0000000..6a4037d --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts @@ -0,0 +1,49 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2014, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "generic-linux.dtsi" + +/include/ "ebb8604-phy.dtsi" \ No newline at end of file diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi b/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi new file mode 100644 index 0000000..7cbc016 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi @@ -0,0 +1,123 @@ + + +/ { + soc@0 { + pci@848000000000 { + mrml-bridge@1,0 { + mdio-nexus@1,3 { + mdio@87e005003880 { + sgmii00: sgmii@8 { + qlm-mode = "0x000,sgmii"; + reg = <8> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + + }; + sgmii01: sgmii@9 { + qlm-mode = "0x001,sgmii"; + reg = <9> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii@a { + qlm-mode = "0x002,sgmii"; + reg = <0xa> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii@b { + qlm-mode = "0x003,sgmii"; + reg = <0xb> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xaui00: xaui@8 { + qlm-mode = "0x000,xaui"; + reg = <8> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui@8 { + qlm-mode = "0x000,rxaui"; + reg = <8> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui02: rxaui@9 { + qlm-mode = "0x002,rxaui"; + reg = <9> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + + + sgmii10: sgmii@c { + qlm-mode = "0x010,sgmii"; + reg = <0xc> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii@d { + qlm-mode = "0x011,sgmii"; + reg = <0xd> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii@e { + qlm-mode = "0x012,sgmii"; + reg = <0xe> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii@f { + qlm-mode = "0x013,sgmii"; + reg = <0xf> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xaui10: xaui@c { + qlm-mode = "0x010,xaui"; + reg = <0xc> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui@c { + qlm-mode = "0x010,rxaui"; + reg = <0xc> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui12: rxaui@d { + qlm-mode = "0x012,rxaui"; + reg = <0xd> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + }; + }; + }; + +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi b/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi new file mode 100644 index 0000000..410ac4b --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi @@ -0,0 +1,123 @@ + + +/ { + soc@0 { + pci@848000000000 { + mrml-bridge@1,0 { + mdio-nexus@1,3 { + mdio@87e005003800 { + sgmii00: sgmii@0 { + qlm-mode = "0x000,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + + }; + sgmii01: sgmii@1 { + qlm-mode = "0x001,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii02: sgmii@2 { + qlm-mode = "0x002,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii03: sgmii@3 { + qlm-mode = "0x003,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xaui00: xaui@0 { + qlm-mode = "0x000,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui00: rxaui@0 { + qlm-mode = "0x000,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui02: rxaui@2 { + qlm-mode = "0x002,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + }; + mdio@87e005003880 { + sgmii10: sgmii@4 { + qlm-mode = "0x010,sgmii"; + reg = <4> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii11: sgmii@5 { + qlm-mode = "0x011,sgmii"; + reg = <5> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii12: sgmii@6 { + qlm-mode = "0x012,sgmii"; + reg = <6> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii13: sgmii@7 { + qlm-mode = "0x013,sgmii"; + reg = <7> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xaui10: xaui@4 { + qlm-mode = "0x010,xaui"; + reg = <4> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui10: rxaui@0 { + qlm-mode = "0x010,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui12: rxaui@2 { + qlm-mode = "0x012,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + }; + }; + }; + +}; \ No newline at end of file diff --git a/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts new file mode 100644 index 0000000..53b9813 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts @@ -0,0 +1,54 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2014, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "generic-linux.dtsi" + +/include/ "ebb8800-phy.dtsi" \ No newline at end of file diff --git a/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi new file mode 100644 index 0000000..68fc692 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi @@ -0,0 +1,2721 @@ +/* + * Cavium Thunder DTS file - Thunder SoC description + * + * Copyright (C) 2014-2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/ { + model = "Cavium ThunderX CN88XX board"; + compatible = "cavium,thunder-88xx"; + interrupt-parent = <&gic0>; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + core4 { + cpu = <&CPU4>; + }; + core5 { + cpu = <&CPU5>; + }; + core6 { + cpu = <&CPU6>; + }; + core7 { + cpu = <&CPU7>; + }; + core8 { + cpu = <&CPU8>; + }; + core9 { + cpu = <&CPU9>; + }; + core10 { + cpu = <&CPU10>; + }; + core11 { + cpu = <&CPU11>; + }; + core12 { + cpu = <&CPU12>; + }; + core13 { + cpu = <&CPU13>; + }; + core14 { + cpu = <&CPU14>; + }; + core15 { + cpu = <&CPU15>; + }; + core16 { + cpu = <&CPU16>; + }; + core17 { + cpu = <&CPU17>; + }; + core18 { + cpu = <&CPU18>; + }; + core19 { + cpu = <&CPU19>; + }; + core20 { + cpu = <&CPU20>; + }; + core21 { + cpu = <&CPU21>; + }; + core22 { + cpu = <&CPU22>; + }; + core23 { + cpu = <&CPU23>; + }; + core24 { + cpu = <&CPU24>; + }; + core25 { + cpu = <&CPU25>; + }; + core26 { + cpu = <&CPU26>; + }; + core27 { + cpu = <&CPU27>; + }; + core28 { + cpu = <&CPU28>; + }; + core29 { + cpu = <&CPU29>; + }; + core30 { + cpu = <&CPU30>; + }; + core31 { + cpu = <&CPU31>; + }; + core32 { + cpu = <&CPU32>; + }; + core33 { + cpu = <&CPU33>; + }; + core34 { + cpu = <&CPU34>; + }; + core35 { + cpu = <&CPU35>; + }; + core36 { + cpu = <&CPU36>; + }; + core37 { + cpu = <&CPU37>; + }; + core38 { + cpu = <&CPU38>; + }; + core39 { + cpu = <&CPU39>; + }; + core40 { + cpu = <&CPU40>; + }; + core41 { + cpu = <&CPU41>; + }; + core42 { + cpu = <&CPU42>; + }; + core43 { + cpu = <&CPU43>; + }; + core44 { + cpu = <&CPU44>; + }; + core45 { + cpu = <&CPU45>; + }; + core46 { + cpu = <&CPU46>; + }; + core47 { + cpu = <&CPU47>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU48>; + }; + core1 { + cpu = <&CPU49>; + }; + core2 { + cpu = <&CPU50>; + }; + core3 { + cpu = <&CPU51>; + }; + core4 { + cpu = <&CPU52>; + }; + core5 { + cpu = <&CPU53>; + }; + core6 { + cpu = <&CPU54>; + }; + core7 { + cpu = <&CPU55>; + }; + core8 { + cpu = <&CPU56>; + }; + core9 { + cpu = <&CPU57>; + }; + core10 { + cpu = <&CPU58>; + }; + core11 { + cpu = <&CPU59>; + }; + core12 { + cpu = <&CPU60>; + }; + core13 { + cpu = <&CPU61>; + }; + core14 { + cpu = <&CPU62>; + }; + core15 { + cpu = <&CPU63>; + }; + core16 { + cpu = <&CPU64>; + }; + core17 { + cpu = <&CPU65>; + }; + core18 { + cpu = <&CPU66>; + }; + core19 { + cpu = <&CPU67>; + }; + core20 { + cpu = <&CPU68>; + }; + core21 { + cpu = <&CPU69>; + }; + core22 { + cpu = <&CPU70>; + }; + core23 { + cpu = <&CPU71>; + }; + core24 { + cpu = <&CPU72>; + }; + core25 { + cpu = <&CPU73>; + }; + core26 { + cpu = <&CPU74>; + }; + core27 { + cpu = <&CPU75>; + }; + core28 { + cpu = <&CPU76>; + }; + core29 { + cpu = <&CPU77>; + }; + core30 { + cpu = <&CPU78>; + }; + core31 { + cpu = <&CPU79>; + }; + core32 { + cpu = <&CPU80>; + }; + core33 { + cpu = <&CPU81>; + }; + core34 { + cpu = <&CPU82>; + }; + core35 { + cpu = <&CPU83>; + }; + core36 { + cpu = <&CPU84>; + }; + core37 { + cpu = <&CPU85>; + }; + core38 { + cpu = <&CPU86>; + }; + core39 { + cpu = <&CPU87>; + }; + core40 { + cpu = <&CPU88>; + }; + core41 { + cpu = <&CPU89>; + }; + core42 { + cpu = <&CPU90>; + }; + core43 { + cpu = <&CPU91>; + }; + core44 { + cpu = <&CPU92>; + }; + core45 { + cpu = <&CPU93>; + }; + core46 { + cpu = <&CPU94>; + }; + core47 { + cpu = <&CPU95>; + }; + }; + }; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "psci"; + /* socket 0 */ + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x001>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x002>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x003>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU4: cpu@4 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x004>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU5: cpu@5 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x005>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU6: cpu@6 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x006>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU7: cpu@7 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x007>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU8: cpu@8 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x008>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU9: cpu@9 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x009>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU10: cpu@a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00a>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU11: cpu@b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00b>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU12: cpu@c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00c>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU13: cpu@d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00d>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU14: cpu@e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00e>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU15: cpu@f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x00f>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU16: cpu@100 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU17: cpu@101 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU18: cpu@102 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU19: cpu@103 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU20: cpu@104 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x104>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU21: cpu@105 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x105>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU22: cpu@106 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x106>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU23: cpu@107 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x107>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU24: cpu@108 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x108>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU25: cpu@109 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x109>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU26: cpu@10a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10a>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU27: cpu@10b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10b>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU28: cpu@10c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10c>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU29: cpu@10d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10d>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU30: cpu@10e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10e>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU31: cpu@10f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10f>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU32: cpu@200 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU33: cpu@201 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x201>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU34: cpu@202 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x202>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU35: cpu@203 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x203>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU36: cpu@204 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x204>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU37: cpu@205 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x205>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU38: cpu@206 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x206>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU39: cpu@207 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x207>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU40: cpu@208 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x208>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU41: cpu@209 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x209>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU42: cpu@20a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20a>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU43: cpu@20b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20b>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU44: cpu@20c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20c>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU45: cpu@20d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20d>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU46: cpu@20e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20e>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU47: cpu@20f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x20f>; + enable-method = "psci"; + numa-node-id = <0>; + next-level-cache = <&thunderx_L2_0>; + }; + CPU48: cpu@10000 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10000>; + enable-method = "psci"; + /* socket 1 */ + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU49: cpu@10001 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10001>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU50: cpu@10002 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10002>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU51: cpu@10003 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10003>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU52: cpu@10004 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10004>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU53: cpu@10005 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10005>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU54: cpu@10006 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10006>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU55: cpu@10007 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10007>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU56: cpu@10008 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10008>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU57: cpu@10009 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10009>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU58: cpu@1000a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000a>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU59: cpu@1000b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000b>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU60: cpu@1000c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000c>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU61: cpu@1000d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000d>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU62: cpu@1000e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000e>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU63: cpu@1000f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1000f>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU64: cpu@10100 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10100>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU65: cpu@10101 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10101>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU66: cpu@10102 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10102>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU67: cpu@10103 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10103>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU68: cpu@10104 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10104>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU69: cpu@10105 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10105>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU70: cpu@10106 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10106>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU71: cpu@10107 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10107>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU72: cpu@10108 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10108>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU73: cpu@10109 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10109>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU74: cpu@1010a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010a>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU75: cpu@1010b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010b>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU76: cpu@1010c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010c>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU77: cpu@1010d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010d>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU78: cpu@1010e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010e>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU79: cpu@1010f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1010f>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU80: cpu@10200 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10200>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU81: cpu@10201 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10201>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU82: cpu@10202 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10202>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU83: cpu@10203 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10203>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU84: cpu@10204 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10204>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU85: cpu@10205 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10205>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU86: cpu@10206 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10206>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU87: cpu@10207 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10207>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU88: cpu@10208 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10208>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU89: cpu@10209 { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x10209>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU90: cpu@1020a { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020a>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU91: cpu@1020b { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020b>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU92: cpu@1020c { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020c>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU93: cpu@1020d { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020d>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU94: cpu@1020e { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020e>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + CPU95: cpu@1020f { + device_type = "cpu"; + compatible = "cavium,thunder", "arm,armv8"; + reg = <0x0 0x1020f>; + enable-method = "psci"; + numa-node-id = <1>; + next-level-cache = <&thunderx_L2_1>; + }; + thunderx_L2_0: l2-cache0 { + compatible = "cache"; + numa-node-id = <0>; + }; + thunderx_L2_1: l2-cache1 { + compatible = "cache"; + numa-node-id = <1>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 4>, + <1 14 4>, + <1 11 4>, + <1 10 4>; + }; + + pmu { + compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3"; + interrupts = <1 7 4>; + }; + + gic0: interrupt-controller@801000000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + #redistributor-regions = <2>; + ranges; + interrupt-controller; + reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */ + <0x8010 0x80000000 0x0 0x600000>, /* GICR Node 0 */ + <0x9010 0x80000000 0x0 0x600000>; /* GICR Node 1 */ + interrupts = <1 9 4>; + + its: gic-its@801000020000 { + compatible = "arm,gic-v3-its"; + reg = <0x8010 0x20000 0x0 0x200000>; + msi-controller; + numa-node-id = <0>; + }; + + its1: gic-its@901000020000 { + compatible = "arm,gic-v3-its"; + reg = <0x9010 0x20000 0x0 0x200000>; + msi-controller; + numa-node-id = <1>; + }; + }; + + soc@0 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + numa-node-id = <0>; + + gpio-keys { + compatible = "gpio-keys"; + button@1 { + lable = "GPIO Key Power"; + /* 116 is the value of KEY_POWER, which + is defined in include/uapi/linux/input.h + of Linux kernel code */ + linux,code = <116>; + /* Interrupt type: SPI; + Interrupt nunmber: 0, which corresponds to + KEY_POWER_IRQ definition in + plat/thunder/include/thunder_io.h of ATF code; + Flag: 1, edge triggered */ + interrupts = <0 0 1>; + }; + }; + + refclkuaa: refclkuaa { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <116640000>; + clock-output-names = "refclkuaa"; + }; + + sclk: sclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <800000000>; + clock-output-names = "sclk"; + }; + + uaa0: serial@87e024000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x24000000 0x0 0x1000>; + interrupts = <0 5 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + }; + + uaa1: serial@87e025000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x87e0 0x25000000 0x0 0x1000>; + interrupts = <0 6 4>; + clocks = <&refclkuaa>; + clock-names = "apb_pclk"; + }; + + smmu0@830000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8300 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, + <0 69 4>, <0 69 4>, <0 69 4>; + + mmu-masters = <&ecam0 0x100>; + }; + + smmu1@831000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8310 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 70 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, + <0 71 4>, <0 71 4>, <0 71 4>; + + mmu-masters = <&ecam1 0x100>, + <&pem0 0x200>, + <&pem1 0x300>, + <&pem2 0x400>; + }; + + smmu2@832000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8320 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 72 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, + <0 73 4>, <0 73 4>, <0 73 4>; + + mmu-masters = <&ecam2 0x100>; + }; + + smmu3@833000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8330 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 74 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, + <0 75 4>, <0 75 4>, <0 75 4>; + + mmu-masters = <&ecam3 0x100>, + <&pem3 0x200>, + <&pem4 0x300>, + <&pem5 0x400>; + }; + + ecam0: pci@848000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8020 0x00000000 0x8020 0x00000000 0x060 0x00000000>, /* mem ranges */ + <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x0a0 0x00000000>, /* ZIP et al. */ + <0x03000000 0x8460 0x00000000 0x8460 0x00000000 0x020 0x00000000>, /* DFA et al. */ + <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x24000000>, /* hole for UARTs */ + <0x03000000 0x87e0 0x26000000 0x87e0 0x26000000 0x000 0x9a000000>, /* hole for PEMs */ + <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>; + + mrml-bridge@1,0 { + compatible = "cavium,thunder-8890-mrml-bridge"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>; + reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */ + + mdio-nexus@1,3 { + compatible = "cavium,thunder-8890-mdio-nexus"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */ + assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>; + ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>; + + mdio@87e005003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003800 0x0 0x30>; + + xfi00: xfi@0 { + qlm-mode = "0x000,xfi","0x000,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi01: xfi@1 { + qlm-mode = "0x001,xfi","0x001,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi02: xfi@2 { + qlm-mode = "0x002,xfi","0x002,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi03: xfi@3 { + qlm-mode = "0x003,xfi","0x003,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui00: xlaui@0 { + qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + }; + + mdio@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + + xfi10: xfi@0 { + qlm-mode = "0x010,xfi","0x010,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi11: xfi@1 { + qlm-mode = "0x011,xfi","0x011,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi12: xfi@2 { + qlm-mode = "0x012,xfi","0x012,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi13: xfi@3 { + qlm-mode = "0x013,xfi","0x013,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui10: xlaui@0 { + qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + }; + }; + +// I2C configuration for EBB8800 testing +// i2c@9,0 { +// #address-cells = <1>; +// #size-cells = <0>; +// compatible = "cavium,thunder-8890-twsi"; +// reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */ +// clock-frequency = <100000>; +// clocks = <&sclk>; +// +// rtc@68 { +// compatible = "dallas,ds1337"; +// reg = <0x68>; +// }; +// }; +// + bgx0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */ + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + // SGMII + sgmii@0 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii00>; + }; + sgmii@1 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii01>; + }; + sgmii@2 { + reg = <2>; + qlm-mode = "0x002,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii02>; + }; + sgmii@3 { + reg = <3>; + qlm-mode = "0x003,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii03>; + }; + xfi@0 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi00>; + }; + xfi@1 { + reg = <1>; + qlm-mode = "0x001,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi01>; + }; + xfi@2 { + reg = <2>; + qlm-mode = "0x002,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi02>; + }; + xfi@3 { + reg = <3>; + qlm-mode = "0x003,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi03>; + }; + // 10g-kr + xfi-10g-kr@0 { + reg = <0>; + qlm-mode = "0x000,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi00>; + }; + xfi-10g-kr@1 { + reg = <1>; + qlm-mode = "0x001,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi01>; + }; + xfi-10g-kr@2 { + reg = <2>; + qlm-mode = "0x002,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi02>; + }; + xfi-10g-kr@3 { + reg = <3>; + qlm-mode = "0x003,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi03>; + }; + xlaui@0 { + reg = <0>; + qlm-mode = "0x000,xlaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui00>; + }; + xlaui-40g-kr@0 { + reg = <0>; + qlm-mode = "0x000,xlaui-40g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui00>; + }; + xaui@0 { + reg = <0>; + qlm-mode = "0x000,xaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xaui00>; + }; + rxaui@0 { + reg = <0>; + qlm-mode = "0x000,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui00>; + }; + rxaui@2 { + reg = <2>; + qlm-mode = "0x002,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui02>; + }; + }; + + bgx1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */ + + sgmii@0 { + reg = <0>; + qlm-mode = "0x010,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */ + }; + sgmii@1 { + reg = <1>; + qlm-mode = "0x011,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii11>; + }; + sgmii@2 { + reg = <2>; + qlm-mode = "0x012,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii12>; + }; + sgmii@3 { + reg = <3>; + qlm-mode = "0x013,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii13>; + }; + xfi@0 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi10>; + }; + xfi@1 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi11>; + }; + xfi@2 { + reg = <2>; + qlm-mode = "0x012,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi12>; + }; + xfi@3 { + reg = <3>; + qlm-mode = "0x013,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi13>; + }; + // 10g_kr + xfi-10g-kr@0 { + reg = <0>; + qlm-mode = "0x010,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi10>; + }; + xfi-10g-kr@1 { + reg = <1>; + qlm-mode = "0x011,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi11>; + }; + xfi-10g-kr@2 { + reg = <2>; + qlm-mode = "0x012,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi12>; + }; + xfi-10g-kr@3 { + reg = <3>; + qlm-mode = "0x013,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi13>; + }; + xlaui@0 { + reg = <0>; + qlm-mode = "0x010,xlaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui10>; + }; + xlaui-40g-kr-@0 { + reg = <0>; + qlm-mode = "0x010,xlaui-40g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui10>; + }; + xaui@0 { + reg = <0>; + qlm-mode = "0x010,xaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xaui10>; + }; + rxaui@0 { + reg = <0>; + qlm-mode = "0x010,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui10>; + }; + rxaui@2 { + reg = <2>; + qlm-mode = "0x012,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui12>; + }; + }; + }; + +// SPI configuration for EBB8800 testing +// spi@7,0 { +// compatible = "cavium,thunder-8890-spi"; +// reg = <0x3800 0 0 0 0>; /* DEVFN = 0x38 (7:0) */ +// #address-cells = <1>; +// #size-cells = <0>; +// clocks = <&sclk>; +// +// flash@0 { +// compatible = "jedec,spi-nor"; +// reg = <0>; +// spi-max-frequency = <16000000>; +// #address-cells = <1>; +// #size-cells = <1>; +// }; +// }; +// + }; + + ecam1: pci@849000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x10000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8490 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>; /* mem ranges */ + }; + + ecam2: pci@84a000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x20000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x84a0 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8420 0x00000000 0x8420 0x00000000 0x20 0x00000000>; /* mem ranges */ + }; + + ecam3: pci@84b000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x30000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x84b0 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8180 0x00000000 0x8180 0x00000000 0x80 0x00000000>; /* mem ranges */ + }; + + pem0: pci@87e0c0000000 { + + /* "cavium,pci-host-thunder-pem" implies that + the first bus in bus-range has config access + via the "PEM space", subsequent buses have + config assess via the "Configuration space". + The "mem64 PEM" range is used to map the PEM + BAR0, which is used by the AER and PME MSI-X + sources. UEFI and Linux must assign the same + bus number to each device, otherwise Linux + enumeration gets confused. Because UEFI + skips the PEM bus and its PCIe-RC bridge it + uses a numbering that starts 1 bus higher. + */ + + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x10000 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */ + }; + + pem1: pci@87e0c1000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x10000 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */ + }; + + pem2: pci@87e0c2000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x10000 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */ + }; + + pem3: pci@87e0c3000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x30000 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8900 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00030000 0x8930 0x00030000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8910 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8920 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 28 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 29 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 30 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 31 4>; /* INTD */ + }; + + pem4: pci@87e0c4000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x30000 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8940 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc4000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00040000 0x8970 0x00040000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8950 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8960 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc4000000 0x87e0 0xc4000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 32 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 33 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 34 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 35 4>; /* INTD */ + }; + + pem5: pci@87e0c5000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its>; + msi-map = <0 &its 0x30000 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8980 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc5000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00050000 0x89b0 0x00050000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8990 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x89a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc5000000 0x87e0 0xc5000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 36 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 37 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 38 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 39 4>; /* INTD */ + }; + + }; + + soc@100000000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x8000 0 0x9000 0x00000000 0x1000 0x00000000>; + numa-node-id = <1>; + + smmu4@830000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8300 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 76 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, + <0 77 4>, <0 77 4>, <0 77 4>; + + mmu-masters = <&ecam4 0x100>; + }; + + smmu5@831000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8310 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 78 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, + <0 79 4>, <0 79 4>, <0 79 4>; + + mmu-masters = <&ecam5 0x100>, + <&pem6 0x200>, + <&pem7 0x300>, + <&pem8 0x400>; + }; + + smmu6@832000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8320 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + interrupts = <0 80 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, + <0 81 4>, <0 81 4>, <0 81 4>; + + mmu-masters = <&ecam6 0x100>; + }; + + smmu7@833000000000 { + compatible = "cavium,smmu-v2"; + reg = <0x8330 0x0 0x0 0x2000000>; + #global-interrupts = <1>; + + interrupts = <0 82 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, + <0 83 4>, <0 83 4>, <0 83 4>; + + mmu-masters = <&ecam7 0x100>, + <&pem9 0x200>, + <&pem10 0x300>, + <&pem11 0x400>; + }; + + + ecam4: pci@848000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0x80000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8020 0x00000000 0x8020 0x00000000 0x060 0x00000000>, /* mem ranges */ + <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x0a0 0x00000000>, /* ZIP et al. */ + <0x03000000 0x8460 0x00000000 0x8460 0x00000000 0x020 0x00000000>, /* DFA et al. */ + <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x24000000>, /* hole for UARTs */ + <0x03000000 0x87e0 0x26000000 0x87e0 0x26000000 0x000 0x9a000000>, /* hole for PEMs */ + <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>; + + mrml-bridge@1,0 { + compatible = "cavium,thunder-8890-mrml-bridge"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>; + reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */ + + mdio-nexus@1,3 { + compatible = "cavium,thunder-8890-mdio-nexus"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */ + assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>; + ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>; + + mdio@87e05003800 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003800 0x0 0x30>; + + sgmii20: sgmii@0 { + qlm-mode = "0x100,sgmii"; + reg = <0> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */ + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii21: sgmii@1 { + qlm-mode = "0x101,sgmii"; + reg = <1> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii22: sgmii@2 { + qlm-mode = "0x102,sgmii"; + reg = <2> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii23: sgmii@3 { + qlm-mode = "0x103,sgmii"; + reg = <3> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi20: xfi@0 { + qlm-mode = "0x100,xfi","0x100,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi21: xfi@1 { + qlm-mode = "0x101,xfi","0x101,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi22: xfi@2 { + qlm-mode = "0x102,xfi","0x102,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi23: xfi@3 { + qlm-mode = "0x103,xfi","0x103,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui20: xlaui@0 { + qlm-mode = "0x100,xlaui","0x100,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui20: xaui@0 { + qlm-mode = "0x100,xaui"; + reg = <0> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui20: rxaui@0 { + qlm-mode = "0x100,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui22: rxaui@1 { + qlm-mode = "0x102,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + }; + + mdio@87e005003880 { + compatible = "cavium,thunder-8890-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x87e0 0x05003880 0x0 0x30>; + + sgmii30: sgmii@4 { + qlm-mode = "0x110,sgmii"; + reg = <4> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii31: sgmii@5 { + qlm-mode = "0x111,sgmii"; + reg = <5> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + + }; + sgmii32: sgmii@6 { + qlm-mode = "0x112,sgmii"; + reg = <6> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + sgmii33: sgmii@7 { + qlm-mode = "0x113,sgmii"; + reg = <7> ; + compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22"; + marvell,reg-init = <3 0x10 0 0x8665>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x8a08>; + }; + xfi30: xfi@0 { + qlm-mode = "0x110,xfi","0x110,xfi-10g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xfi31: xfi@1 { + qlm-mode = "0x111,xfi","0x111,xfi-10g-kr"; + reg = <1> ; + compatible = "cortina,cs4223-slice"; + }; + xfi32: xfi@2 { + qlm-mode = "0x112,xfi","0x112,xfi-10g-kr"; + reg = <2> ; + compatible = "cortina,cs4223-slice"; + }; + xfi33: xfi@3 { + qlm-mode = "0x113,xfi","0x113,xfi-10g-kr"; + reg = <3> ; + compatible = "cortina,cs4223-slice"; + }; + xlaui30: xlaui@0 { + qlm-mode = "0x110,xlaui","0x110,xlaui-40g-kr"; + reg = <0> ; + compatible = "cortina,cs4223-slice"; + }; + xaui30: xaui@4 { + qlm-mode = "0x110,xaui"; + reg = <4> ; + compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45"; + broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>; + }; + rxaui30: rxaui@0 { + qlm-mode = "0x110,rxaui"; + reg = <0> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + rxaui32: rxaui@1 { + qlm-mode = "0x112,rxaui"; + reg = <1> ; + compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + + + bgx2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */ + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + // SGMII + sgmii@0 { + reg = <0>; + qlm-mode = "0x100,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii20>; + }; + sgmii@1 { + reg = <1>; + qlm-mode = "0x101,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii21>; + }; + sgmii@2 { + reg = <2>; + qlm-mode = "0x102,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii22>; + }; + sgmii@3 { + reg = <3>; + qlm-mode = "0x103,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii23>; + }; + xfi@0 { + reg = <0>; + qlm-mode = "0x100,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi20>; + }; + xfi@1 { + reg = <1>; + qlm-mode = "0x101,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi21>; + }; + xfi@2 { + reg = <2>; + qlm-mode = "0x102,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi22>; + }; + xfi@3 { + reg = <3>; + qlm-mode = "0x103,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi23>; + }; + // 10g-kr + xfi-10g-kr@0 { + reg = <0>; + qlm-mode = "0x100,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi20>; + }; + xfi-10g-kr@1 { + reg = <1>; + qlm-mode = "0x101,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi21>; + }; + xfi-10g-kr@2 { + reg = <2>; + qlm-mode = "0x102,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi22>; + }; + xfi-10g-kr@3 { + reg = <3>; + qlm-mode = "0x103,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi23>; + }; + xlaui@0 { + reg = <0>; + qlm-mode = "0x100,xlaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui20>; + }; + xlaui-40g-kr@0 { + reg = <0>; + qlm-mode = "0x100,xlaui-40g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui20>; + }; + xaui@0 { + reg = <0>; + qlm-mode = "0x100,xaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xaui20>; + }; + rxaui@0 { + reg = <0>; + qlm-mode = "0x100,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui20>; + }; + rxaui@2 { + reg = <2>; + qlm-mode = "0x102,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui22>; + }; + }; + + bgx3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */ + + sgmii@0 { + reg = <0>; + qlm-mode = "0x110,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii30>; /*"sgmmi"+bgx+no */ + }; + sgmii@1 { + reg = <1>; + qlm-mode = "0x111,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii31>; + }; + sgmii@2 { + reg = <2>; + qlm-mode = "0x112,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii32>; + }; + sgmii@3 { + reg = <3>; + qlm-mode = "0x113,sgmii"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&sgmii33>; + }; + xfi@0 { + reg = <0>; + qlm-mode = "0x110,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi30>; + }; + xfi@1 { + reg = <1>; + qlm-mode = "0x111,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi31>; + }; + xfi@2 { + reg = <2>; + qlm-mode = "0x112,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi32>; + }; + xfi@3 { + reg = <3>; + qlm-mode = "0x113,xfi"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi33>; + }; + // 10g_kr + xfi-10g-kr@0 { + reg = <0>; + qlm-mode = "0x110,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi30>; + }; + xfi-10g-kr@1 { + reg = <1>; + qlm-mode = "0x111,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi31>; + }; + xfi-10g-kr@2 { + reg = <2>; + qlm-mode = "0x112,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi32>; + }; + xfi-10g-kr@3 { + reg = <3>; + qlm-mode = "0x113,xfi-10g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xfi33>; + }; + xlaui@0 { + reg = <0>; + qlm-mode = "0x110,xlaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui30>; + }; + xlaui-40g-kr@0 { + reg = <0>; + qlm-mode = "0x110,xlaui-40g-kr"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xlaui30>; + }; + xaui@0 { + reg = <0>; + qlm-mode = "0x110,xaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&xaui30>; + }; + rxaui@0 { + reg = <0>; + qlm-mode = "0x110,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui30>; + }; + rxaui@2 { + reg = <2>; + qlm-mode = "0x112,rxaui"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rxaui32>; + }; + }; + }; + }; + + ecam5: pci@849000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0x90000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8490 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>; /* mem ranges */ + }; + + ecam6: pci@84a000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0xa0000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x84a0 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8420 0x00000000 0x8420 0x00000000 0x20 0x00000000>; /* mem ranges */ + }; + + ecam7: pci@84b000000000 { + compatible = "cavium,pci-host-thunder-ecam"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0xb0000 0x10000>; + bus-range = <0 31>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x84b0 0x00000000 0 0x02000000>; /* Configuration space */ + ranges = <0x03000000 0x8180 0x00000000 0x8180 0x00000000 0x80 0x00000000>; /* mem ranges */ + }; + + pem6: pci@87e0c0000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0x90000 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 40 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 41 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 42 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 43 4>; /* INTD */ + }; + + pem7: pci@87e0c1000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0x90000 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 44 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 45 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 46 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 47 4>; /* INTD */ + }; + + pem8: pci@87e0c2000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0x90000 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 48 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 49 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 50 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 51 4>; /* INTD */ + }; + + pem9: pci@87e0c3000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0xb0000 0x10000>; + bus-range = <0x1f 0x57>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8900 0x1f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00030000 0x8930 0x00030000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8910 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8920 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 52 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 53 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 54 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 55 4>; /* INTD */ + }; + + pem10: pci@87e0c4000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0xb0000 0x10000>; + bus-range = <0x57 0x8f>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8940 0x57000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc4000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00040000 0x8970 0x00040000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8950 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x8960 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc4000000 0x87e0 0xc4000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 56 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 57 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 58 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 59 4>; /* INTD */ + }; + + pem11: pci@87e0c5000000 { + compatible = "cavium,pci-host-thunder-pem"; + device_type = "pci"; + msi-parent = <&its1>; + msi-map = <0 &its1 0xb0000 0x10000>; + bus-range = <0x8f 0xc7>; + #size-cells = <2>; + #address-cells = <3>; + #stream-id-cells = <1>; + dma-coherent; + reg = <0x8980 0x8f000000 0x0 0x39000000>, /* Configuration space */ + <0x87e0 0xc5000000 0x0 0x01000000>; /* PEM space */ + ranges = <0x01000000 0x00 0x00050000 0x89b0 0x00050000 0x00 0x00010000>, /* I/O */ + <0x03000000 0x00 0x10000000 0x8990 0x10000000 0x0f 0xf0000000>, /* mem64 */ + <0x43000000 0x10 0x00000000 0x89a0 0x00000000 0x10 0x00000000>, /* mem64-pref */ + <0x03000000 0x87e0 0xc5000000 0x87e0 0xc5000000 0x00 0x01000000>; /* mem64 PEM */ + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic0 0 0 0 60 4>, /* INTA */ + <0 0 0 2 &gic0 0 0 0 61 4>, /* INTB */ + <0 0 0 3 &gic0 0 0 0 62 4>, /* INTC */ + <0 0 0 4 &gic0 0 0 0 63 4>; /* INTD */ + }; + }; + + aliases { + serial0 = &uaa0; + serial1 = &uaa1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x01400000 0x3 0xFEC00000>; + /* socket 0 */ + numa-node-id = <0>; + }; + + memory@10000000000 { + device_type = "memory"; + reg = <0x100 0x00400000 0x3 0xFFC00000>; + /* socket 1 */ + numa-node-id = <1>; + }; + + distance-map { + compatible = "numa-distance-map-v1"; + distance-matrix = <0 0 10>, + <0 1 20>, + <1 1 10>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts new file mode 100644 index 0000000..96e6bdf --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts @@ -0,0 +1,165 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + sgmii00: sgmii00 { + qlm-mode = "0x000,sgmii"; + reg = <0x0> ; + compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22"; + }; + sgmii01: sgmii01 { + qlm-mode = "0x001,sgmii"; + reg = <0x1> ; + compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22"; + }; + }; + mdio1@87e005003880 { + xfi10: xfi10 { + qlm-mode = "0x010,xfi"; + reg = <0x0>; + compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + sgmii+bgx0+sgmmi0 + */ + sgmii00 { + reg = <0>; + qlm-mode = "0x000,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii00>; + }; + sgmii01 { + reg = <1>; + qlm-mode = "0x001,sgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&sgmii01>; + }; + + }; + + bgx1 { + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi10>; + }; + }; +}; + +&mmc_1_4 { + /* NOTE: the BDK is responsible for swapping the two slots. + * Unfortunately there does not appear to be any way to read the + * position of SW2-7 in software. + */ + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 4 bits maximum */ + bus-width = <4>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* SD UHS SDR50 is supported */ + sd-uhs-ddr50; + /* SD UHS DDR50 is supported */ + sd-uhs-sdr50; + /* High-speed mode is supported */ + cap-sd-highspeed; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* High-speed mode is supported */ + cap-mmc-highspeed; + /* eMMC device is soldered onto the board */ + non-removable; + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "macronix,mx25l3206e", "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts b/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts new file mode 100644 index 0000000..238abe1 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts @@ -0,0 +1,199 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + rgmii00: rgmii00 { + reg = <0> ; + compatible = "vitesse,vsc8531", "ethernet-phy-ieee802.3-c22"; + }; + }; + mdio1@87e005003880 { + xfi11: xfi11 { + qlm-mode = "0x011,xfi"; + reg = <0>; + compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + rgx0 { + rgmii00 { + reg = <0>; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rgmii00>; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + qsgmii+bgx0+sgmmi0 + */ + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + }; + + bgx1 { + /* vitesse vsc7224 */ + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + cavium,disable-autonegotiation; + }; + /* aquantia aqr107 */ + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi11>; + }; + }; +}; + +&mmc_1_4 { + /* NOTE: the BDK is responsible for swapping the two slots. + * Unfortunately there does not appear to be any way to read the + * position of SW2-7 in software. + */ + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 4 bits maximum */ + bus-width = <4>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* SD UHS SDR50 is supported */ + sd-uhs-ddr50; + /* SD UHS DDR50 is supported */ + sd-uhs-sdr50; + /* High-speed mode is supported */ + cap-sd-highspeed; + /* speed up device probing */ + no-sdio; + no-mmc; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* High-speed mode is supported */ + cap-mmc-highspeed; + /* eMMC device is soldered onto the board */ + non-removable; + /* speed up device probing */ + no-sdio; + no-sd; + }; +}; + +&i2c_9_0 { + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "micron,n25q128a13", "spi-flash"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts new file mode 100644 index 0000000..0190995 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts @@ -0,0 +1,301 @@ +/* + * Cavium Thunder DTS file - Thunder board description + * + * Copyright (C) 2016, Cavium Inc. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/include/ "cn81xx-linux.dtsi" + +&mrml_bridge { + mdio-nexus@1,3 { + mdio0@87e005003800 { + rgmii00: rgmii00 { + reg = <0> ; + compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22"; + }; + + qsgmii00: qsgmii00 { + qlm-mode = "0x000,qsgmii"; + reg = <0x10> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii01: qsgmii01 { + qlm-mode = "0x001,qsgmii"; + reg = <0x11> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii02: qsgmii02 { + qlm-mode = "0x002,qsgmii"; + reg = <0x12> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + qsgmii03: qsgmii03 { + qlm-mode = "0x003,qsgmii"; + reg = <0x13> ; + compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22"; + }; + }; + mdio1@87e005003880 { + xfi00: xfi00 { + qlm-mode = "0x000,xfi"; + reg = <0x0>; + compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + rgx0 { + rgmii00 { + reg = <0>; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&rgmii00>; + }; + }; + + bgx0 { + /* typename+qlm+typenumber eg : + qsgmii+bgx0+sgmmi0 + */ + qsgmii00 { + reg = <0>; + qlm-mode = "0x000,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii00>; + }; + qsgmii01 { + reg = <1>; + qlm-mode = "0x001,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii01>; + }; + qsgmii02 { + reg = <2>; + qlm-mode = "0x002,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii02>; + }; + qsgmii03 { + reg = <3>; + qlm-mode = "0x003,qsgmii"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&qsgmii03>; + }; + + xfi00 { + reg = <0>; + qlm-mode = "0x000,xfi"; + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <&xfi00>; + }; + }; + + bgx1 { + xfi10 { + reg = <0>; + qlm-mode = "0x010,xfi"; + local-mac-address = [00 00 00 00 00 00]; + }; + + xfi11 { + reg = <1>; + qlm-mode = "0x011,xfi"; + local-mac-address = [00 00 00 00 00 00]; + }; + }; + + +}; + +&mmc_1_4 { + /* NOTE: the BDK is responsible for swapping the two slots. + * Unfortunately there does not appear to be any way to read the + * position of SW2-7 in software. + */ + /* Power on GPIO 8, active high, shared */ + power-gpios = <&gpio_6_0 8 0>; + + mmc-slot@0 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <0>; + /* Only 3.3v is supported */ + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 4 bits maximum */ + bus-width = <4>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* SD UHS SDR25 is supported */ + sd-uhs-sdr25; + /* SD UHS SDR50 is supported */ + sd-uhs-ddr50; + /* SD UHS DDR50 is supported */ + sd-uhs-sdr50; + /* High-speed mode is supported */ + cap-sd-highspeed; + /* speed up device probing */ + no-sdio; + no-mmc; + }; + mmc-slot@1 { + compatible = "cavium,thunder-8890-mmc-slot"; + reg = <1>; + voltage-ranges = <3300 3300>; + max-frequency = <26000000>; + /* 1.8v is not supported */ + no-1-8-v; + /* Bus width is only 8 bits maximum */ + bus-width = <8>; + /* No write-protect switch is present */ + disable-wp; + /* There is no card detection available; polling must be used. */ + broken-cd; + /* High-speed mode is supported */ + cap-mmc-highspeed; + /* eMMC device is soldered onto the board */ + non-removable; + /* speed up device probing */ + no-sdio; + no-sd; + }; +}; + +&i2c_9_0 { + /* another pca9535 at 0x20 is only visible via jtag */ + gpio1: gpio-i2c@21 { + compatible = "nxp,pca9535"; + gpio-controller; + reg = <0x21>; + gpio_base = <48>; + pins = <48 16>; + ngpios = <16>; // standard + n_gpios = <16>; // deprecated, driver required + #gpio-cells = <2>; + }; + + gpio2: gpio-i2c@22 { + compatible = "nxp,pca9535"; + gpio-controller; + reg = <0x22>; + gpio_base = <64>; + pins = <64 16>; + ngpios = <16>; // standard + n_gpios = <16>; // deprecated, driver required + #gpio-cells = <2>; + }; +}; + +&i2c_9_1 { + rom@54 { + compatible = "atmel,24c256"; + reg = <0x54>; + pagesize = <64>; + }; + + rtc@68 { + compatible = "isil,isl12057"; + reg = <0x68>; + }; +}; + +&spi_7_0 { + flash@0 { + compatible = "micron,n25q128a13", "spi-flash"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&nfc { + nand@1 { + reg = <0x1>; + nand-ecc-mode = "hw"; + }; +}; + +&tdm { + // need corresponding mmc_etc.enable = <&gpio_6_0 39 1>; + pcm-enable-gpios = <&gpio_6_0 39 0>; +}; + +&spi_7_0 { + spi-mux-gpios = <&gpio1 4 1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <16000000>; + #address-cells = <1>; + #size-cells = <1>; + }; + + slic@4 { + compatible = "silabs,si32260", "linux,spidev"; + reg = <4>; + spi-max-frequency = <2500000>; + reset-gpios = <&gpio1 0 1>; + irq-gpios = <&gpio_6_0 13>; + tx = <&tdm 0>; + rx = <&tdm 1>; + }; + + framer@5 { + compatible = "maxim,ds26521", "linux,spidev"; + reg = <5>; + spi-max-frequency = <2500000>; + reset-gpios = <&gpio_6_0 11 1>; + irq-gpios = <&gpio_6_0 14>; + tx = <&tdm 2>; + rx = <&tdm 3>; + }; +}; diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb new file mode 100644 index 0000000..4894ea3 --- /dev/null +++ b/recipes-kernel/linux/linux-cavium_4.9.bb @@ -0,0 +1,34 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +require recipes-kernel/linux/linux-yocto.inc +require recipes-kernel/linux/linux-deploy-kconfig.inc + +# board specific branches +KBRANCH_cn8304 ?= "cavium-4.9" +KBRANCH_qemuarm64 ?= "cavium-4.9" + +SRCREV_machine_cn8304 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" +SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" +SRCREV_metaenea ?= "29062141ab9f807e7fc83e2e68fc93a5fe0a622a" +KENEABRANCH = "cavium-4.9" + +SRC_URI = "git://git.enea.se/personal/adca/linux/linux-cavium.git;name=machine;branch=${KBRANCH} \ + git://git@git.enea.com/linux/enea-kernel-cache.git;protocol=ssh;type=kmeta;name=metaenea;branch=${KENEABRANCH};destsuffix=enea-kernel-cache \ + file://dts \ + " + +LINUX_KERNEL_TYPE = "tiny" +LINUX_VERSION ?= "4.9.0" +LINUX_VERSION_EXTENSION = "-cavium-${LINUX_KERNEL_TYPE}" +PV = "4.9-octeontx.sdk.6.1.0.p2.build.17" + +KERNEL_DEVICETREE_cn8304 = "cavium/ebb8304-linux.dtb" + +COMPATIBLE_MACHINE = "cn8304|qemuarm64" +KMACHINE_cn8304 = "cavium-cn8304" +KMACHINE_qemuarm64 = "cavium-cn8304" + +do_patch_append() { + install -D ${S}/arch/${ARCH}/boot/dts + install ${WORKDIR}/dts/* ${S}/arch/${ARCH}/boot/dts/cavium/ +} -- cgit v1.2.3-54-g00ecf From 46833b661545c11dc39957b0ccc7c7fbd3ef7dc7 Mon Sep 17 00:00:00 2001 From: Adrian Calianu Date: Fri, 11 Aug 2017 11:31:10 +0200 Subject: add Cavium kernel with debug features enabled Signed-off-by: Adrian Calianu --- recipes-kernel/linux/linux-cavium-sdk_4.9.bb | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 recipes-kernel/linux/linux-cavium-sdk_4.9.bb (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium-sdk_4.9.bb b/recipes-kernel/linux/linux-cavium-sdk_4.9.bb new file mode 100644 index 0000000..5e4cbfe --- /dev/null +++ b/recipes-kernel/linux/linux-cavium-sdk_4.9.bb @@ -0,0 +1,10 @@ +require linux-cavium_4.9.bb + +# Debug tools support +KERNEL_FEATURES_append = " features/debug/debug_kernel_y.scc" +KERNEL_FEATURES_append = " features/kgdb/kgdb_y.scc" +KERNEL_FEATURES_append = " features/lttng/lttng_y.scc" +KERNEL_FEATURES_append = " features/latencytop/latencytop_y.scc" +KERNEL_FEATURES_append = " features/perf/perf_y.scc" +KERNEL_FEATURES_append = " features/systemtap/systemtap_y.scc" +KERNEL_FEATURES_append = " features/oprofile/oprofile_y.scc" -- cgit v1.2.3-54-g00ecf From 9f4e365335a5838d97894c54db51c75665aa4f4f Mon Sep 17 00:00:00 2001 From: Adrian Calianu Date: Fri, 18 Aug 2017 14:43:38 +0200 Subject: linux-cavium: enable ethernet BGX ports Signed-off-by: Adrian Calianu --- recipes-kernel/linux/linux-cavium_4.9.bb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb index 4894ea3..d2950f3 100644 --- a/recipes-kernel/linux/linux-cavium_4.9.bb +++ b/recipes-kernel/linux/linux-cavium_4.9.bb @@ -9,7 +9,7 @@ KBRANCH_qemuarm64 ?= "cavium-4.9" SRCREV_machine_cn8304 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" -SRCREV_metaenea ?= "29062141ab9f807e7fc83e2e68fc93a5fe0a622a" +SRCREV_metaenea ?= "57e44dd5c710b8e70f9a27ef1aec20523012fb33" KENEABRANCH = "cavium-4.9" SRC_URI = "git://git.enea.se/personal/adca/linux/linux-cavium.git;name=machine;branch=${KBRANCH} \ @@ -28,6 +28,8 @@ COMPATIBLE_MACHINE = "cn8304|qemuarm64" KMACHINE_cn8304 = "cavium-cn8304" KMACHINE_qemuarm64 = "cavium-cn8304" +KERNEL_FEATURES_append_cn8304 += "features/net/thunderx/thunderx_nic.scc" + do_patch_append() { install -D ${S}/arch/${ARCH}/boot/dts install ${WORKDIR}/dts/* ${S}/arch/${ARCH}/boot/dts/cavium/ -- cgit v1.2.3-54-g00ecf From 574516da2931d9300483f6028690ccf764ac1734 Mon Sep 17 00:00:00 2001 From: Martin Borg Date: Wed, 23 Aug 2017 15:24:00 +0200 Subject: Update enea-kernel-cache revision to include Cavium netdevices Signed-off-by: Martin Borg --- recipes-kernel/linux/linux-cavium_4.9.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb index d2950f3..610f12c 100644 --- a/recipes-kernel/linux/linux-cavium_4.9.bb +++ b/recipes-kernel/linux/linux-cavium_4.9.bb @@ -9,7 +9,7 @@ KBRANCH_qemuarm64 ?= "cavium-4.9" SRCREV_machine_cn8304 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" -SRCREV_metaenea ?= "57e44dd5c710b8e70f9a27ef1aec20523012fb33" +SRCREV_metaenea ?= "6afba91aeb01e8f7c1dd7048c180c1744c9fdc74" KENEABRANCH = "cavium-4.9" SRC_URI = "git://git.enea.se/personal/adca/linux/linux-cavium.git;name=machine;branch=${KBRANCH} \ -- cgit v1.2.3-54-g00ecf From 04cb00bb7289d72c407dbdde97f3e11f8bffefa5 Mon Sep 17 00:00:00 2001 From: Martin Borg Date: Thu, 24 Aug 2017 09:42:04 +0200 Subject: linux-cavium: change SRC_URI to git.enea.com Signed-off-by: Martin Borg --- recipes-kernel/linux/linux-cavium_4.9.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb index 610f12c..3205577 100644 --- a/recipes-kernel/linux/linux-cavium_4.9.bb +++ b/recipes-kernel/linux/linux-cavium_4.9.bb @@ -12,7 +12,7 @@ SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" SRCREV_metaenea ?= "6afba91aeb01e8f7c1dd7048c180c1744c9fdc74" KENEABRANCH = "cavium-4.9" -SRC_URI = "git://git.enea.se/personal/adca/linux/linux-cavium.git;name=machine;branch=${KBRANCH} \ +SRC_URI = "git://git@git.enea.com/linux/linux-cavium.git;protocol=ssh;name=machine;branch=${KBRANCH} \ git://git@git.enea.com/linux/enea-kernel-cache.git;protocol=ssh;type=kmeta;name=metaenea;branch=${KENEABRANCH};destsuffix=enea-kernel-cache \ file://dts \ " -- cgit v1.2.3-54-g00ecf From 97dc5192259e56be224477602c471d2864d57807 Mon Sep 17 00:00:00 2001 From: Martin Borg Date: Thu, 24 Aug 2017 15:16:37 +0200 Subject: Update enea-kernel-cache revision to include USB network drivers Signed-off-by: Martin Borg --- recipes-kernel/linux/linux-cavium_4.9.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'recipes-kernel') diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb index 3205577..c5a4595 100644 --- a/recipes-kernel/linux/linux-cavium_4.9.bb +++ b/recipes-kernel/linux/linux-cavium_4.9.bb @@ -9,7 +9,7 @@ KBRANCH_qemuarm64 ?= "cavium-4.9" SRCREV_machine_cn8304 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09" -SRCREV_metaenea ?= "6afba91aeb01e8f7c1dd7048c180c1744c9fdc74" +SRCREV_metaenea ?= "85a500385477e07d144fc3fcfa4ec62e6aabc8e8" KENEABRANCH = "cavium-4.9" SRC_URI = "git://git@git.enea.com/linux/linux-cavium.git;protocol=ssh;name=machine;branch=${KBRANCH} \ -- cgit v1.2.3-54-g00ecf