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-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi123
1 files changed, 0 insertions, 123 deletions
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi b/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi
deleted file mode 100644
index 410ac4b..0000000
--- a/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi
+++ /dev/null
@@ -1,123 +0,0 @@
1
2
3/ {
4 soc@0 {
5 pci@848000000000 {
6 mrml-bridge@1,0 {
7 mdio-nexus@1,3 {
8 mdio@87e005003800 {
9 sgmii00: sgmii@0 {
10 qlm-mode = "0x000,sgmii";
11 reg = <0> ;
12 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
13 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
14 marvell,reg-init = <3 0x10 0 0x8665>,
15 <3 0x11 0 0x00aa>,
16 <3 0x12 0 0x4105>,
17 <3 0x13 0 0x8a08>;
18
19 };
20 sgmii01: sgmii@1 {
21 qlm-mode = "0x001,sgmii";
22 reg = <1> ;
23 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
24 marvell,reg-init = <3 0x10 0 0x8665>,
25 <3 0x11 0 0x00aa>,
26 <3 0x12 0 0x4105>,
27 <3 0x13 0 0x8a08>;
28 };
29 sgmii02: sgmii@2 {
30 qlm-mode = "0x002,sgmii";
31 reg = <2> ;
32 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
33 marvell,reg-init = <3 0x10 0 0x8665>,
34 <3 0x11 0 0x00aa>,
35 <3 0x12 0 0x4105>,
36 <3 0x13 0 0x8a08>;
37 };
38 sgmii03: sgmii@3 {
39 qlm-mode = "0x003,sgmii";
40 reg = <3> ;
41 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
42 marvell,reg-init = <3 0x10 0 0x8665>,
43 <3 0x11 0 0x00aa>,
44 <3 0x12 0 0x4105>,
45 <3 0x13 0 0x8a08>;
46 };
47 xaui00: xaui@0 {
48 qlm-mode = "0x000,xaui";
49 reg = <0> ;
50 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
51 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
52 };
53 rxaui00: rxaui@0 {
54 qlm-mode = "0x000,rxaui";
55 reg = <0> ;
56 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
57 };
58 rxaui02: rxaui@2 {
59 qlm-mode = "0x002,rxaui";
60 reg = <1> ;
61 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
62 };
63 };
64 mdio@87e005003880 {
65 sgmii10: sgmii@4 {
66 qlm-mode = "0x010,sgmii";
67 reg = <4> ;
68 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii11: sgmii@5 {
75 qlm-mode = "0x011,sgmii";
76 reg = <5> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 sgmii12: sgmii@6 {
84 qlm-mode = "0x012,sgmii";
85 reg = <6> ;
86 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
87 marvell,reg-init = <3 0x10 0 0x8665>,
88 <3 0x11 0 0x00aa>,
89 <3 0x12 0 0x4105>,
90 <3 0x13 0 0x8a08>;
91 };
92 sgmii13: sgmii@7 {
93 qlm-mode = "0x013,sgmii";
94 reg = <7> ;
95 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
96 marvell,reg-init = <3 0x10 0 0x8665>,
97 <3 0x11 0 0x00aa>,
98 <3 0x12 0 0x4105>,
99 <3 0x13 0 0x8a08>;
100 };
101 xaui10: xaui@4 {
102 qlm-mode = "0x010,xaui";
103 reg = <4> ;
104 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
105 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
106 };
107 rxaui10: rxaui@0 {
108 qlm-mode = "0x010,rxaui";
109 reg = <0> ;
110 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
111 };
112 rxaui12: rxaui@2 {
113 qlm-mode = "0x012,rxaui";
114 reg = <1> ;
115 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
116 };
117 };
118 };
119 };
120 };
121 };
122
123}; \ No newline at end of file